Stellaris LM3S1968 Evaluation Board User`s Manual (Rev. A)
Contents
1. Description ges Description Description din Description ud PB4 CO 1 PB1 CCP2 18 PA6 I2C1SCL 35 PG3 52 GND 2 PBO CCPO 19 PA7 I2C1SDA 36 PD1 PWM1 53 PB5 C1 3 GND 20 PA4 SSIORX 37 PD2 U1RX 54 6 4 PF1 IDX1 21 PA5 SSIOTX 38 GND 55 PB7 TRST 5 PF2 PWM4 22 PA2 SSIOCLK 39 PDO IDXO 56 PHO PWM2 6 PF3 PWM5 23 PA3 SSIOFSS 40 ADC3 57 PH1 PWMS 7 4 00 24 PAO UORX 41 GND 58 PH2 8 HIBn 25 PA1 UOTX 42 ADC1 59 PH3 FAULT 9 PFO PHBO 26 43 ADC2 60 PC2 TDI 10 PF5 27 GND 44 ADC4 61 PC3 TDO SWO 11 PF6 CCP1 28 PC6 C2 45 ADCO 62 PE3 SSI1TX 12 PF7 29 PC5 C1 46 ADC6 63 PE2 SSHRX 13 PG4 30 PGO U2RX 47 ADC5 64 PE1 SSI1FSS 14 PG5 31 PC7 C2 48 GND 65 PE0 SSI1CLK 15 GND 32 PG2 PWMO 49 ADC7 66 PBS3 I2COSDA 16 PG7 PHB1 33 PG1 U2TX 50 PB2 I2COSCL 17 PG6 PHA1 34 PD3 U1TX 51 January 6 2010 27 Recommended Connectors Recommended Connectors Connection can be made by soldering wires directly to pads or using 0 1 pitch headers and sockets Table B 2 Recommended Connectors Pins 1 66 2 x 33 way PCB Socket Sullins PPPC332LFBN RC Digikey S7136 ND Pin Header Sullins PEC20DAAN Digikey S2012E 20 ND ARM Target Pinout In ICDI input and output mode the Stellaris LM3S1968 Evaluation Kit supports ARM s standard 20 pin JTAG SWD configuration The same pin configuration can be used for debugging over serial wire debug SWD and JTAG interfaces The debugger software running on th2. Ul PAO UORX PBO CCPO 6 _ 467 PBUCCP2 433V PBUCCP2 g ER DCOSCL PA2 SSIOCLK PB2 I2COSCL 20 5510 55 PBSDCOSDA fgh Ri PA4 SSIORX PBA CO iK PAS SSIOTX PBS CI AI PAG DCISCL 9 PROD PB7 TRST PB7 TRST PCO TCK SWCLK PDOADXO 19 PO PCI TMS SWDIO PDUPWMI PC2 TDI PDIUIRX PRAT PC3 TDO SWO PD3 UITX 3__PDSUTTX PCA PhAO 5 1 PC6 C2 PC7 C2 PEO SSIICLK PFO PHBO at PEU SSIIFSS PFI IDX1 IA PE2 SSIIRX PF2 PWM4 PE3 SSIITX PEMPWMS TEEN PFA COO posao ADCO PFS z ADCI c ADC2 ADC3 ADCA PGO U2RX 19 PGO USRX ADCS PGI U2TX 18 PGUUPTIX 17 PG2 PWMO ADC6 PG2 PWMO poss e 16 pad PGS E RST PG7 PHB1 26 PHUPWND ES PHUPWMS EE pur ee MOSCin q PH MOSCout PHSFAULT 83 FAULT OSC32in 3 OSC32out AVDD WAKE VDD33 HIB VDD33 VDD33 CMODI 44 433v VDD3 5 VDD33 s 1 1 4 1 93 C7 C8 c9 C10 c11 033UF 0330H 470 GND GND GND GND GND vBAT L3 BAT GND GND LDO GND GND n cis GND VDD2S 4 GND VDD25 28 AGND VDD2S 62 AGND VDD25 35 1968 C12 C14 C15 4 7UF 033UH 0 1UF C16 0 1UF On board Peripheral Signals Ju
3. BC e 66 88592 47K vici eel z 44 INT 45 x TDUDI 46 B2 TDO DO 41 A3 B3 TMS OUTEN 48 bA xe AS B5 TARGETCABLEn SRSTN 3 Bank 0 Bank 1 45 B6 AT B7 DBG_JTAG_EN 2 B8 DBGOUTLED iE 5 9 z B9 VCP TX RESET 10 28 B10 PB7 TRST 13 TO zz 5 z HI Al2 afm B12 MCURSTn I 5 3 10 DBG 3 3V 29 Ban oS 55 mmm VCP RX SWO_EN I DBG 3 3V CTRL HIBERNATEn MODE VCP TX SWO MODE is reserved for future use ola 2 5V 5 SW DEGAN t JTAG SWD Interface R22 Input Output lt PC2 TDI 4 AV C39 C40 27 R23 0 1UF 0 1UF 0 1UF 27 R25 jh e a TMS SWDIO 3 4 27 XTDI MC or XTMS D 2 XTCK 140 27 nom n XTDO j PC3 TDO SWO 4 AW J 15 16 27 17 18 19 20 Header 10X2 DBG43 3v TARGETCABLEn 4 7K Texas INSTRUMENTS Drawing Tite Stellaris LM3S1968 Evaluation Board USB and Debugger Interfaces Size p Document Number 14351968 Date 3 4 2008 Sheet 3 of 4 Rev B 6 6 D 5V U3 8 DBG 3 3V 2 IN our H RII 6 SENSE 3 IM VEN 5 BYPASS lt 24 C25 0 033UF 4 GND GND 0 LP3981ILD 3 3
4. Modes 2 and 3 automatically detect the presence of an external debug cable When the debugger software connected to the EVB s USB controller the EVB automatically selects Mode 2 and illuminates the red Debug Out LED January 6 2010 Stellaris amp LM3S1968 Evaluation Board Debug In Considerations Debug Mode 3 supports evaluation board debugging using an external debug interface Mode 3 is automatically selected when a device such as a Segger J Link or Keil ULINK is connected Boards marked Revision B or later automatically configure pin 1 to be a 3 3 V reference if an external debugger is connected To determine the revision of your board locate the product number on the bottom of the board for example EK LM3S6965 B The last character of the product number identifies the board revision A configuration or board level change may be necessary when using an external debug interface with revision A of this evaluation board Because the evaluation board supports both debug out and debug in modes pin 1 of the 20 pin JTAG SWD header is by default not connected to 3 3 V Consequently devices requiring a voltage on pin 1 to power their line buffers may not work Two solutions exist Some debugger interfaces such as ULINK have an internal power jumper that in this case should be set to internal 3 3 V power Refer to debugger interface documentation for full details However if your debugger interface does not have a selectable power
5. the LED will not be on Clocking The EVB uses an 8 0 MHz crystal to complete the LM3S1968 microcontroller s main internal clock circuit An internal PLL configured in software multiples this clock to 50 MHz for core and peripheral timing The real time clock oscillator is part of the microcontroller s Hibernation module and uses a 4 194304 MHz crystal for timing This frequency divides by 128 to generate a 32 7680 kHz standard timing frequency Reset LM3S1968 microcontroller shares its external reset input with the OLED display In the EVB reset sources are gated through the CPLD though in a typical application a simple wired OR arrangement is sufficient External reset is asserted active low under any one of three conditions Power on reset Reset push switch SW1 held down January 6 2010 11 Hardware Description internal debug mode By the USB device controller U5 FT2232 when instructed by debugger LM3S1968 microcontroller has an internal power on reset so the external circuits used in the EVB are not required in typical applications Power Supplies In normal operating mode the LM3S1968 is powered from a 3 3 V supply A low drop out LDO regulator converts 5 V power from the USB cable to 3 3 V 3 3 V power is available for powering external circuits If 5 V is removed the Hibernation module will remain powered by the 3 V lithium battery Other microcontroller and boa
6. 10 us response Control Interface The OLED display has a built in controller IC with synchronous serial and parallel interfaces Synchronous serial SSI is used on the EVB as it requires fewer microcontroller pins Data cannot be read from the OLED controller only one data line is necessary The Stellaris Firmware Development Package included on the Documentation and Software CD contains complete drivers with source code for the OLED display Power Supply 15 V supply is needed to bias the OLED display A FAN5331 device from Fairchild combines with a few external components to complete a boost converter A GPIO PH3 FAULT is assigned to turn on and off the controller as necessary for power rail sequencing When the OLED display is operating a small amount of power can be drawn from the 15 V supply to power other devices Design Guidelines The OLED display has a lifetime of about 13 000 hours It is also prone to degradation due to burn in similar to CRT and plasma displays The quickstart application includes both a screen saver and a power down mode to extend display life These factors should be considered when developing EVB applications that use the OLED display Further Reference For additional information on the RiT OLED display visit www ritekdisplay com 14 January 6 2010 Stellaris amp LM3S1968 Evaluation Board Other Peripherals Speaker The LM3S1968 evaluation board s speaker circuit can be used in either
7. Debugger 3 3V 200mA Power Supply 9 DBG 3 3V OMIT 04 17 4 2 N our H 5 R12 6 SENSE 3 IM VEN BYPASS C27 4 7UF HIBERNATEn gt C28 4 7UF 0 033UF 4 GND GND LP3981ILD 3 3 Main 3 3V 300mA Power Supply 45V 35 DI NR4018T100M 10uH MBRO0520 029 200K 120pF EN 15V R15 10K FAN5331 R14 17 8K 15V 50mA Power Supply for OLED Display BA 470 45 Texas INSTRUMENTS Drawing Tite Stellaris LM3S1968 Evaluation Board USB Debugger Interfaces and Power Size B Document Number EK LM3S1968 Date 3499098 Sheet 4 of 4 Rev p 6 VCP TX EN TCK TDI DO FTDI TDO DI TMS FTDIJTAGEN gt FTDI SRSTn FTDI DBG DBGOUT 4 DBG JTAGEN FTDI DBG DBGOUT 18 INTDBG DBGLED gg TEST 1102 33 TRSTn EXTCABLEn MCURSTn HIBn gt A Em Texas Instrumens Inc LM3S1968 Evaluation Kit JTAG Logic with Auto Mode Detect and Hibernate A
8. I O available on labeled break out pads Block Diagram Figure 1 2 LM3S1968 Evaluation Board Block Diagram 5572 128 d 0 9 O 0 0 0 0 9 9 0 0 9 9 1 O Signal Break out JTAG SWD o Output Input 8 OLED Display 128 x 96 USB Cable 3V to debug interface I O Signals 3V to MCU and peripherals Signal Break out LM3S1968 00000090999009999999999999 Evaluation Board OO0G00000000000000000000000 8 January 6 2010 Stellaris amp LM3S1968 Evaluation Board Evaluation Kit Contents The evaluation kit contains everything needed to develop and run applications for Stellaris microcontrollers including LM3S1968 evaluation board EVB USB cable 20 pin JTAG SWD target cable CD containing A supported version of one of the following including a toolchain specific Quickstart guide Keil RealView Microcontroller Development Kit MDK ARM AR Embedded Workbench Code Sourcery GCC development tools Code Red Technologies development tools Texas Instruments Code Composer Studio IDE Complete documentation Quickstart application source code St
9. List of Figures Figure 1 1 Stellaris LM3S1968 Evaluation Board 7 Figure 1 2 LM3S1968 Evaluation Board Block 8 Figure 2 1 ICD Interface 16 Fig re B 1 Component Locations cete e o acta e 25 Figure B 2 LM3S1968 Evaluation Board 26 January 6 2010 5 January 6 2010 CHAPTER 1 Stellaris LM3S1968 Evaluation Board Figure 1 1 Lithium coin cell JTAG SWD OLED Graphics The Stellaris 0 351968 Evaluation Board is a compact and versatile evaluation platform for the Stellaris LM3S1968 ARM Cortex M3 based microcontroller The evaluation kit design highlights the LM3S1968 microcontroller s peripherals and its Hibernation module A 8V lithium battery included in the kit supplies power to the Hibernation module and maintains data and real time clock information for about two years in the absence of USB power You can use the EVB either as an evaluation platform or as a low cost in circuit debug interface ICDI In debug interface mode the on board microcontroller is disabled allowing connection of the debug signals to an external Stellaris microcontroller target The kit is also compatible with high performance external JTAG debuggers This evaluation kit enables quick evaluation prototype development and creat
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12. 8 evaluation board includes a range of useful peripherals and an integrated in circuit debug interface ICDI This chapter describes how these peripherals operate and interface to the microcontroller LM3S1968 Evaluation Board LM3S1968 Microcontroller Overview The heart of the EVB is a Stellaris LM3S1968 ARM Cortex M3 based microcontroller The LM3S1968 offers 256 KB Flash memory 50 MHz operation and a wide range of peripherals Refer to the LM3S1968 data sheet order number DS LM3S1 968 for complete device details The LM3S1968 microcontroller is factory programmed with a quickstart demo program quickstart program resides in the LM3S1968 on chip Flash memory and runs each time power is applied unless the quickstart has been replaced with a user program Hibernation Module The Hibernation Module manages removal and restoration of power to the microcontroller and peripherals while maintaining a real time clock RTC and non volatile memory The EVB includes a 3 V Lithium battery to maintain Hibernate module power when USB power is unavailable The Hibernation state is initiated in software Leaving Hibernation mode requires either an RTC timer match event or assertion of the WAKE signal Pressing the Select switch on the EVB asserts WAKE The Hibernate LED LED4 signals that the EVB is in Hibernate state 3 3 V disabled as long as USB power is present When USB power is removed the EVB will remain in the Hibernate state however
13. D Display Switches and Audio Size B Document Number EK LM3S1968 Date 3 4 2008 Sheet of 4 6 6 D USB Inter lace 54819 0572 60ohm 100 MHz USB Device Controller 07 R18 1 5K V 08 1 54 vec cs TINC sk 5 Di 5 GND CAT93C46 1K 64X16 Debug Interface Logic PLD_TCK 2 PLD TMS PLD P3 PLD TP PLD JTAG TEST POINTS ADBUSO 3V30UT ADBUSI ADBUS2 ADBUS3 USBDM ADBUSA ADBUSS USBDP ADBUSG ADBUS7 ACBUSO ACBUSI ACBUS2 ACBUS3 SUWUA BDBUSO BDBUSI BDBUS2 BDBUS3 BDBUS4 EEcs BDBUSS EESK BDBUS6 EEDATA BDBUS7 TEST BCBUSO XTIN BCBUSI XTOUT BCBUS2 BCBUS3 SI WUB RESET RSTOUT PWREN 9 i GND GND GND VCCIOA 34 GND VCCIOB AGND AVCC FT2232D Channel SW Debug Channel B Virtual Com Port TPS DBG33 3V DBG43 9 DBG 3 3V DBG 3 3V ss 3m U6 UU LC4032V 75TN48C
14. E ater ido cate uus 15 Bypassing Periphierals educ eria stet ier e esee qub e EE AB de FO S 15 Interracing to sac y te dto eui ebat ton dette tede Ee Ede 16 Using the In Circuit Debugger 16 Appendix 5 5 c 19 Appendix B Connection Details 25 Component Ocations ERE eet cee 25 Evaluation Board 5 26 VO Breakout Pads ma S Ruka 27 Recomended Connectors doa d ae e e a ged aes 28 ARM Target xtate eri ee neo ate Dei 28 RHelerences censeo LEE ots se SIRE at TT 29 January 6 2010 3 List of Tables Table 2 1 Stellaris LM3S1968 Evaluation Board Hardware Debugging Configurations 12 Table 2 2 Isolating On Board 15 1 Breakout Pads nsi ad 27 Table 2 Recommended 5 28 Table B 3 20 JTAG SWD 28 4 6 2010 Stellaris amp LM3S1968 Evaluation Board
15. Hibernation Module ir dott oed aan Dee Pere ide Ede ever e e Dre Ae ERE 11 GIOCKING n ub et ng Eire diet ellen dell ed doce go EE HIPH ber Pede utu o onde 11 HeSOL Qha om oa eie d ea pio itai mist cepted aida tait eh 11 Power Suppligs s bietet mio datei Ea a M peer na 12 Debugging ai hebes ED NI hunt ah tht et 12 USB Device Controller Functions 13 5 wp ee 13 USB to TAG SWD2 st tint cet tut eO e ere ee ta xa e fe 13 Virtual COM Port idm tere dea fetus de erede ee Dei HT eas Ane eeu ee 13 Seral Wire OUt 14 Organic LED DISplay 14 Eealules ott eene bare npe ads ede i tin ed AS 14 14 Power aa eal and le 14 Design nil ieee na itis aoe 14 Further Retereice s sio eiut tem usate 14 Other Peripherals ertt te e Ee eite ttt Us Pact at tete read ier Fee cte s 15 Seir itecto eni Ar Reece it 15 PUSI SWITCHES u m ne det 15 EEDs a Sea itt ot ama im ue RE Saha t pt cad ON
16. Stellaris LM3S1968 Evaluation Board User s Manual 4 TEXAS INSTRUMENTS EK LM3S1968 03 Copyright 2007 2010 Texas Instruments Copyright Copyright 2007 2010 Texas Instruments Inc All rights reserved Stellaris and StellarisWare are registered trademarks of Texas Instruments ARM and Thumb are registered trademarks and Cortex is a trademark of ARM Limited Other names and brands may be claimed as the property of others Texas Instruments 108 Wild Basin Suite 350 P Austin TX 78746 http www ti com stellaris T Cortex Intelligent Processors by ARM 2 January 6 2010 Stellaris amp LM3S1968 Evaluation Board Table of Contents Chapter 1 Stellaris LM3S1968 Evaluation Board u 7 Features cite citer NEED tete oir tete un Lets eret ced 8 av nem nm net i neis 8 Evaluation Kit RANDE ARE 9 Evaluation Board Specifications 9 Features of the LM3S1968 Microcontroller sess 9 Chapter 2 Hardware Description J l l u u J J 11 LM3S1968 Evaluation 11 LM3S1968 Microcontroller Overview 11
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18. UG 23 2007 Connection Details This appendix contains the following sections Component Locations Evaluation Board Dimensions Breakout Pads ARM Target Pinout References Component Locations Figure B 1 Component Locations 7 LUMINARYMICRO LM381968 EVALUATION BOARD SCLo NS og IDX1 SICLK SIRX PC3 FAULT PWM3 7 0 01 02 PWM4 GND CCP2 SDAO SIFS 517 PC2 H2 0 GND January 6 2010 25 Evaluation Board Dimensions Evaluation Board Dimensions Figure 2 0 351968 Evaluation Board Dimensions W H TIONI a umum mH NN IIIIIIIIIIIISM a m m G m 26 January 6 2010 Breakout Pads The LM3S1968 EVB has 58 I O pads 13 power pads 1 control connection for a total of 71 pads Connection can be made by soldering wires directly to these pads or by using 0 1 pitch headers and sockets Stellaris amp LM3S1968 Evaluation Board Note In Table B 1 an asterisk by a signal name also on the EVB PCB indicates the signal is normally used for on board functions Normally you should cut the associated jumper JP 1 15 before using an assigned signal for external interfacing Table B 1 I O Breakout Pads
19. aris M3S1968 Evaluation Board Page Title LM3S1968 Microcontroller Sir Document Number gx 351968 Date 3 4 2008 Sheeley Boras 6 6 D Reset SWI R4 10K RESET_SWn SW B3S1000 C18 OMIT Select Power Sw2 SW B3S1000 Up 59 3 a WAKEn User Switches 4 o o SW B38S1000 Down SW4 UP_SWn gt o SW B3S 1000 Left SWS DOWN_SWn gt o SW B3S 1000 Right SW6 sm LEFT_SWn gt FDG6322C o SW B38S1000 RIGHT SWn 3 3 FDG6322C SOUND Q3A FDG6322C x SOUND 0 2W Audio Amplifier U2 1 Nc VCOMH LVSS VSS BSI BS2 200K 9 IREF OLEDCSn MCURSTn ij RES OLEDDC 72 R Wn OLEDCLK DO SCLK OLEDDIN 168 1751 24 03 ee DS 20 33V zi 06 21 voo XIV 2 ES 55 C 9 NC O 1UF OLED R 128x96 OLED Graphics Display R6 LED gt 330 LEDI Green R7 DBGOUTLED gt 330 LED2 43 3V R10 330 LED3 Green DBG 3 3V 30 330 LED4 Weed HIBERNATE Status LEDs Status Debug Out Power Hibernate 45 Texas INSTRUMENTS Drawing Tite Stellaris M3S1968 Evaluation Board Page Title OLE
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21. cation number SW DRL UG Stellaris LM3S1968 Data Sheet publication DS LM3S1968 Additional references include January 6 2010 Solomon Systech SSD0323 OLED Controller Datasheet Future Technology Devices Incorporated FT2232C Datasheet Information on development tool being used RealView MDK web site www keil com arm rvmdkkit asp AR Embedded Workbench web site www iar com Code Sourcery GCC development tools web site www codesourcery com gnu_toolchains arm Code Red Technologies development tools web site www code red tech com Texas Instruments Code Composer Studio IDE web site www ti com ccs 29 References 30 January 6 2010 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries Tl reserve the right to make corrections modifications enhancements improvements and other changes to its products and services at any time and to discontinue any product or service without notice Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete All products are sold subject to Tl s terms and conditions of sale supplied at the time of order acknowledgment TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with Tl s standard warranty Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty Except
22. e PC determines which interface protocol is used The Stellaris target board should have a 2x10 0 1 pin header with signals as indicated in Table B 3 This applies to both an external Stellaris microcontroller target Debug Output mode and to external JTAG SWD debuggers Debug Input mode Table B 3 20 Pin JTAG SWD Configuration Function Pin Pin Function VCC optional 1 2 nc nc 3 4 GND TDI 5 6 GND TMS 7 8 GND TCK 9 10 GND nc 11 12 GND TDO 13 14 GND nc 15 16 GND nc 17 18 GND nc 19 20 GND ICDI does not control RST device reset or TRST test reset signals Both reset functions are implemented as commands over JTAG SWD so these signals are not necessary It is recommended that connections be made to all GND pins however both targets and external debug interfaces must connect pin 18 and at least one other GND pin to GND 28 January 6 2010 Stellaris amp LM3S1968 Evaluation Board References In addition to this document the following references are included on the Stellaris LM3S1968 Evaluation Kit CD ROM and are also available for download at www ti com stellaris Stellaris LM3S1968 Evaluation Kit Quickstart Guide for appropriate tool kit see Evaluation Kit Contents on page 9 Stellaris LM3S1968 Read Me First for the CAN Evaluation Kit StellarisWare Driver Library Order number SW DRL Stellaris Ware Driver Library User s Manual publi
23. ellaris amp Firmware Development Package with example source code Evaluation Board Specifications Board supply voltage 4 37 5 25 Vdc from USB connector Board supply current 130 mA typ fully active CPU at 50 MHz 17 uA Hibernate mode operating from battery Break out power output 3 3 Vdc 60 mA max 15 Vdc 15 mA max Speaker power 0 3 W max Dimensions 3 20 x 3 50 x 0 5 LxWxH RoHS status Compliant Features of the LM3S1968 Microcontroller 32 bit RISC performance using ARM Cortex M3 v7M architecture January 6 2010 50 MHz operation Hardware division and single cycle multiplication Integrated Nested Vectored Interrupt Controller NVIC 42 interrupt channels with eight priority levels 256 KB single cycle Flash 64 KB single cycle SRAM Four general purpose 32 bit timers Three fully programmable 16C550 type UARTs Stellaris amp LM3S1968 Evaluation Board 10 Eight 10 bit ADC channels inputs when used as single ended inputs Three independent integrated analog comparators Two 12 modules Three PWM generator blocks One 16 bit counter Two comparators Produces two independent PWM signals One dead band generator Two QEI modules with position integrator for tracking encoder position 5 to 52 GPIOs depending on user configuration On chip low drop out LDO voltage regulator Hibernation module January 6 2010 Hardware Description In addition to a microcontroller the Stellaris LM3S196
24. ion of application specific designs using the LM3S1968 s broad range of peripherals The kit also includes extensive source code examples allowing you to start building C code applications quickly Stellaris LM3S1968 Evaluation Board Layout JTAG SWD input and output USB Device Interface 20700 18 itl m AY P kien T In circuit Debug Interface Display Reset switch ee Speaker Navigation Switches LES r P Jue C T3 T7 EE crit Jus Status LEDs x DEBUG cours LN E LM3S1968 m EVALUATION BOARD Power LED i 1 J Select switch Hibernate LED Stellaris LM3S1968 8666 6568588885556555868668555866 5 t1T111111111111 66 pin break out Microcontroller 82282 g 2 header January 6 2010 Stellaris amp LM3S1968 Evaluation Board Features The Stellaris LM3S1968 Evaluation Kit includes the following features Stellaris LM3S1968 microcontroller Simple setup USB cable provides serial communication debugging and power OLED graphics display with 128 x 96 pixel resolution User LED navigation switches and select pushbuttons 8Q magnetic speaker with class D amplifier Internal 3 V battery and support for on chip hibernation module USB interface for debugging and power supply Standard ARM 20 pin JTAG debug connector with input and output modes LM3S1968
25. itch JP7 Pin 40 PG5 Left switch JP8 Pin 41 PG4 Down switch JP9 Pin 31 PA5 SSIOTX OLED display data in JP10 Pin 28 PA2 SSIOCLK OLED display clock JP11 Pin 34 PA6 I2C1SCL OLED display data control select JP12 Pin 27 PA1 UOTX Virtual COM port transmit JP13 Pin 86 PHO PWM2 Sound JP14 Pin 85 PH1 PWM3 Sound JP15 Interfacing to the EVB An array of accessible signals makes it easy to interface the EVB to external circuits All LM3S1968 lines except those with both JTAG SWD functions are brought out to 0 1 pitch pads For quick reference silk screened labels on the PCB show primary pin functions Table B 2 on page 28 has a complete list of I O signals as well as recommended connectors Most LM3S1968 signals are 5 V tolerant Refer to the LM3S1968 data sheet for detailed electrical specifications Using the In Circuit Debugger Interface The Stellaris LM3S1968 Evaluation Kit can operate as an In Circuit Debugger Interface ICDI ICDI acts as a USB to the JTAG SWD adaptor allowing debugging of any external target board that uses a Stellaris microcontroller See Debugging Modes on page 12 for a description of how Figure 2 1 16 to enter Debug Out mode ICD Interface Mode Connecting Pin 18 to GND sets JTAG or SWD connects to the external microcontroller external debug mode PC with IDE debugger MM 3 Stellaris MCU A TCK SWCLK bypasses the on boa
26. mpers can be cut to free GPIO lines as required Power Break out Header 15V Break out Header n T 66 65 g VCP_RX ADCS 9 JP13 ADCO o J 2 PAL UOTx ADC2 05 5 PDOIDXO 9 PD2 UIRX o o PDIPWMI PAZ SSIOCLK PG3 PD3 UITX SO gt m OLEDCLK PGI UZTX S S PG2 PWMO 7 2 PGO U2RX PASSSIOFSS c o OLEDCSR PCS CI PC6 C2 JP12 PCUPhAO PATOOTS PAVOR PA3 SSIOFSS PA2 SSIOCLK Gene E PAS SSIOTX 88 PAd SSIORX PAS SSIOTX_ OLEDDIN PATIDCISDA o PAG I2CISCL PG6 PHAI o PG7 PHBI PHO PWM2 oo BT UG O SOUND 5 15 PFO PHBO PHIPWM3 PF3 PWM5 SOUND SOUND PF2 PWM4 28 PEUIDXT E PBUCCP2 99 EM PBYDCOSDA PEO SSTICLK S oS ISV PEL SSIIFSS O o PEZSSIIRX JP2 55 o o CY TDO SWO PGXPWMO PC2 TDI PH3 FAULT PH2 PHO PWM2 EBI TRST T PB6 C0 PBS CI ull PBA CO 23 JP9 PI DOWN SWn JP8 PGS O LEFT SWa JP6 PGUPHAL RIGHT SWn JP7 D2 PGT PHBI sy SELECT SWn E WAREN MBR0520 BTI Li Battery CR2032 45 Texas INSTRUMENTS Drawing Tite Stell
27. on of the USB device after each wake transition To avoid powering the microcontroller the CPLD sets its output signals to a high impedance state whenever the Hibernation signal is asserted Virtual COM Port The Virtual COM Port VCP allows Windows applications such as HyperTerminal to communicate with UARTO on the LM3S1968 over USB Once the FT2232 VCP driver is installed Windows assigns a COM port number to the VCP channel January 6 2010 13 Hardware Description Serial Wire Out The evaluation board supports the Cortex M3 serial wire output SWO trace capabilities Under debugger control the CPLD can route the SWO datastream to the virtual communication port VCP transmit channel The debugger can then decode and interpret the trace information received from the VCP The normal VCP connection to UARTO is interrupted when using SWO Not all debuggers support SWO Refer to the Stellaris LM3S3748 data sheet for additional information on the trace port interface unit TPIU Organic LED Display The EVB features an Organic LED OLED graphics display with 128 x 96 pixel resolution OLED is a new technology that offers many advantages over LCD display technology The display is protected during shipping by a thin protective plastic film The film can be removed using a pair of tweezers Features RiT Display P14201 series display 128 columns by 96 rows High contrast typ 500 1 Excellent brightness 120 cd m m Fast
28. rd functions will not function until power is restored 15 V power is available when the OLED display power supply is active The speaker and OLED display boost converter operate directly from the 5 V power Debugging Stellaris microcontrollers support programming and debugging using either JTAG or SWD JTAG uses the signals TCK TMS TDI and SWD requires fewer signals SWCLK SWDIO and optionally 510 for trace The debugger determines which debug protocol is used For example Keil RealView tools support only JTAG debugging The JTAG TRST signal is not required for debugging and is not connected to the 20 pin JTAG SWD header TRST may be asserted by the CPLD in debug Mode 2 Debugging Modes 12 LM3S1968 evaluation board supports a range of hardware debugging configurations Table 2 1 summarizes these configurations Table 2 1 Stellaris LM3S1968 Evaluation Board Hardware Debugging Configurations Mode Debug Function Use Selected by 1 Internal ICDI Debug on board LM3S1968 Default mode microcontroller over USB interface 2 ICDI out to JTAG SWD The EVB is used as USB to Connecting to an external header SWD JTAG interface to an target and starting debug external target software The red Debug Out LED will be ON 3 In from JTAG SWD header For users who prefer an Connecting an external external debug interface debugger to the JTAG SWD ULINK JLINK etc with the header EVB
29. rd microcontroller January 6 2010 Stellaris amp LM3S1968 Evaluation Board The debug interface operates in either serial wire debug SWD or full JTAG mode depending on the configuration in the debugger IDE The IDE debugger does not distinguish between the on EVB Stellaris microcontroller and an external Stellaris microcontroller The only requirement is that the correct Stellaris device is selected in the project configuration January 6 2010 17 Hardware Description 18 January 6 2010 Schematics This section contains the schematics for the LM3S1968 Evaluation Board m 1 351968 Microcontroller on page 20 OLED Display Switches and Audio on page 21 USB and Debugger Interfaces on 22 W USB Debugger Interfaces and Power on page 23 JTAG Logic with Auto Mode Detect and Hibernate on page 24 January 6 2010 19 6 D History INT_TCK lt TMS SWDIO gt PC2 TDI lt PC3 TDO SWO MCURSTn PAO UORX 26 PAI U0TX 27 PA2 SSIOCLK 28 PA amp DCISCL 34 PAT DCISDA 35 10PF 10PF Final prototype release Production release with simplified wake cct Add TVCC control to debug circuit 48 49 ae 53 R2 1M 50 HIBERNATEn al Yi Y2 65 1 2 1 2 8 00MHz 4 194304MHz 53 C4 27 Stellaris LM3S1968 Microcontroller
30. s current into the PG7 pin when in the Hibernate state User LED A user LED LED3 is provided for general use The LED is connected to PG2 PWMO allowing the option of either GPIO or PWM control brightness control Refer to the Quickstart Application source code for an example of PWM control Bypassing Peripherals The EVB s on board peripheral circuits require 15 GPIO lines This leaves 31 GPIO lines and 8 ADC channels immediately available for connection to external circuits If an application requires more GPIO lines the on board hardware can be disconnected The EVB is populated with 15 jumper links which can be cut with a knife to isolate on board hardware The process can be reversed by installing 0603 0 ohm chip resistors Table 2 2 shows the microcontroller assignments and how to isolate specific pins Important The quickstart application will not run if one or more jumpers are removed Table 2 2 Isolating On Board Hardware Microcontroller Pin Microcontroller Assignment To Isolate Remove Pin 16 PG3 Up switch JP1 Pin 17 PG2 PWMO User LED JP2 Pin 26 PAO UORX Virtual COM port receive JP4 January 6 2010 15 Hardware Description Table 2 2 Isolating On Board Hardware Continued Microcontroller Pin Microcontroller Assignment To Isolate Remove Pin 29 PA3 SSIOFSS OLED display chip select JP5 Pin 37 PG6 PHA1 Right switch JP6 Pin 36 PG7 PHB1 Select sw
31. source it may be necessary to install a 0 resistor on the evaluation board to route power to pin 1 Refer to the schematics and board drawing in the appendix of this manual for the location of this resistor USB Device Controller Functions USB Overview An FT2232 device from Future Technology Devices International Ltd manages USB to serial conversion The FT2232 is factory configured to implement a JTAG SWD port synchronous serial on channel A and a Virtual COM Port VCP on channel B This feature allows two simultaneous communications links between the host computer and the target device using a single USB cable Separate Windows drivers for each function are provided on the Documentation and Software CD A small serial EEPROM holds the FT2232 configuration data The EEPROM is not accessible by the LM3S1968 microcontroller For full details on FT2232 operation go to www ftdichip com USB to JTAG SWD The FT2232 USB device performs JTAG SWD serial operations under the control of the debugger A CPLD U6 multiplexes SWD and JTAG functions and when working in SWD mode provides direction control for the bidirectional data line The CPLD also implements logic to select between the three debug modes The target microcontroller selection is determined by multiplexing TCK SWCLK and asserting TRST In Hibernate state the JTAG SWD interface circuit remains powered Although debugging is not possible maintaining power avoids re enumerati
32. tone or waveform mode The quick start application uses tone mode In tone mode the LM3S1968 microcontroller s PWM module directly generates tones within the audible frequency range The width of the pulses determines the volume If only one PWM signal PWM2 or PWM3 is used the non PWM signal should be configured as a general purpose output For increased speaker volume PWM2 PWM3 can be configured as complementary drive signals In tone mode be careful to avoid large DC currents in the speaker Waveform mode uses two high frequency PWM signals to drive a MOSFET H bridge with an output filter This circuit is essentially a Class D amplifier The symmetrical 2nd order low pass L C filter has a cut off frequency of approximately 33 kHz The microcontroller s PWM module should be configured with a PWM frequency of at least 100 kHz Using 500 kHz improves audio quality even further Once configured audio waveform data can be used to update the PWM duty cycle at a rate equal to the audio sampling rate The speaker on the evaluation board has standard 80 impedance Audio quality can be enhanced by adding a small vented enclosure around the speaker Push Switches The EVB has five general purpose input switches Four are arranged in a navigation style configuration The fifth functions as a Select switch on PG7 The Select switch also connects to the WAKE signal of the Hibernate module which has an internal pull up resistor A diode D2 block
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