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Embedded System Development and Labs for ARM

1. 2 3 4 DPY 5 a 7 BEEN s B g 4 R 4 10 d 9 Figure 4 14 8 Segment LED Table 4 28 Common Used Character Segment Coding Character dp g f e d b a Common Common Cathode Anode 0 0 0 1 1 1 1 1 1 1 0 0 0 0 0 1 1 0 06 F9H 2 0 1 0 1 1 0 1 1 5 A4H 3 0 1 0 0 1 1 1 1 4 4 0 1 1 0 0 1 1 0 66 99 5 0 1 1 0 1 1 0 1 6DH 92H 6 0 1 1 1 1 1 0 1 DH 82H 7 0 0 0 0 0 1 1 1 07 F8H 8 0 1 1 1 1 1 1 1 7FH 80H 9 0 1 1 0 1 1 1 1 6FH 90H A 0 1 1 1 0 1 1 1 77 88 0 1 1 1 1 1 0 0 7CH 83H 0 0 1 1 1 0 0 1 39H C6H D 0 1 0 1 1 1 1 0 5 0 1 1 1 1 0 0 1 79 86 0 1 1 1 0 0 0 1 71H 8EH _ 0 1 0 0 0 0 0 0 40 1 0 0 0 0 0 0 0 80H 7FH Extinguishes 0 0 0 0 0 0 0 0 00H FFH NOTE dp decimal point 4 Display Method The 8 SEG LED has two ways of displaying and these are static and dynamic 186 Embedded Systems Development and Labs The English Edition Static Display When the 8 SEG LED displays a character the control signals remain the same Dynamic Display When the 8 SEG LED displays a character the control signals are alternately changing The control signal is valid in a period of time 1 ms Because of the human s eyes vision the display of LEDs appears stable 2 Principles of Circuits In the circuit of S3CEV40 common anode type of 8 S
2. ae ae void IISInit void 1 rPCONE rPCONE amp Oxffff 2 lt lt 16 Set port output CODECLK signal iDMADone 0 initialize philips UDA1341 chip Init1341 PLAY name Init1341 func Init philips 1341 chip para none ret none modify comment void Init1341 char mode 1 Port Initialize 0x1ff set PA9 as output and connect to L3D 0x7CF set PG5 L3M connect to PG4 L3C tPDATB L3M L3C L3M H start condition L3C H start condition L3 Interface _WrL3Addr 0x14 2 status 000101xx 10 ifdef FS441KHZ _WrL3Data 0x60 0 0 1 10 000 0 reset 256fs no DCfilter iis else _WrL3Data 0x40 0 0 1 00 000 0 reset 512fs no DCfilter iis endif _WrL3Addr 0x14 2 status 000101xx 10 ifdef FS441KHZ _WrL3Data 0x20 0 0 0 10 000 0 no reset 256fs no DCfilter 1is else _WrL3Data 0x00 0 0 0 00 000 0 no reset 512fs no DCfilter 1is endif 264 Embedded Systems Development and Labs The English Edition _WrL3Addr 0x14 2 status 000101xx 10 _WrL3Data 0x8 1 0 1 0 0 0 0 0 11 OGS 0 IGS 0 ADC NLDAC NLsngl speed AonDon
3. SF SF SF SF SR ae oR R R ake define LCD PutPixel x INT32U LCD VIRTUAL BUFFER y SCR_XSIZE 2 8 4 INT32U LCD_VIRTUAL_BUFFER y SCR_XSIZE 2 8 4 amp 0xf0000000 gt gt x 768 4 IKC lt lt 7 amp 8 4 define LCD Active PutPixel x c INT32U LCD ACTIVE BUFFER SCR_XSIZE 2 319 8 4 INT32U LCD_ACTIVE_BUFFER SCR XSIZE 2 319 x 8 4 amp A 0xf0000000 gt gt 319 8 4 lt lt 7 319 8 4 201 Embedded Systems Development and Labs The English Edition 2 Rectangle Display The rectangle consists of two horizon lines and two vertical lines Drawing a rectangle on the LCD is accomplished by calling the line draw function The line draw function is alternately calling the pixel control function 3 Character Display Characters can be displayed using many fonts The font size is W x H or H x W suchas 8 x 8 8 x 16 16x 16 16 x 24 24 x 24 etc The users can make use of different character libraries for displaying different fonts For example the Lab system uses the 8 x 16 font to display ASCII characters In order to display an ASCII character first we have to access the look up predefined character table This table used for storing characters is cal
4. void led2 on 1 led state led state 0x2 Led Display led state SF SF SF SF SF OF SF SF SF SF name led2 off func led 2 off para none ret none modify comment ak eak ak ak ak ak ak ak void led2 off 1 led state led state amp Oxfd Led Display led state define LIB LED off LIB LED off don t use LIB settings ifndef LIB LED off SF SF SF SF SR SF afe afe name Led Display func Led Display control function para LedStatus led s status ret none modify comment ak eak ak ak ak ak ak ak a SF SF SF SF SF SF SF SF void Led Display int LedStatus 152 Embedded Systems Development and Labs The English Edition led state LedStatus if LedStatus amp 0x01 0x01 IPDATB rPDATB amp Ox5ff else rPDATB rPDATB 0x200 if LedStatus amp 0x02 0x02 rPDATB rPDATB amp 0x3 ff else rPDATB rPDATB 0x400 4 2 7 Exercises Write a program to implement LED1 and LED2 display 00 11 in a loop
5. term eb40 files Processor Remote Debug Directory Compiler Assemb 4 gt l 7 3 C Source Category Y ASM Source Link Script Download file HEP term eb4Ua files debug term_eb63 elf ja C Source C1 ASM Source Download verify Link Script T Download address Execute program from ASM Source ox2000000 C Don t care 9 20 Link Script EH term eb55 files Execute until Download address 2 Source C Program entry point 9 20 ASM Source Link Script term eb63 files m3 Source Figure 2 36 Debug Download Settings 3 Memory Maps Settings If the memory map file is used select this item Map file is used to control the memory read and write as shown in Figure 2 32 57 Embedded Systems Development and Labs The English Edition Project Settings E Processor Remote Debug Directory Compiler Assemb 4 Category Settings term eb40 files C Source ASM Source Link Script term eb4Ua files C Source ASM Source Link Script term eb4 2 files 28 Source zd ASM Source 3 Link Script term eb55 files E C Source J ASM Source Link Script term eb53 files Source
6. SF SF SR SF void leds off Led Display 0x0 SF SF SF SF name ledi on func led 1 on para none ret none modify comment ak eak ak ak ak ak ak ak ak SF SF SF SF SF SF akk ake afe ake ake void 41 on 1 led state led state 0x1 Led Display led state SF SF SF SF name ledl off func led 1 off para none ret none modify comment ak eak ak ak ak ak ak ak akk akk R R R ake ake void off 1 led state led state amp Oxfe Led Display led state 151 Embedded Systems Development and Labs The English Edition ake SF SF SF afe fe name led2 on func led 2 on para none ret none modify comment ak eak ak ak ak ak ak ak a
7. Memory Map C No map file Use map file S EMBEST_IDE Targets at91 targets eb63 eb63 m 1 A E E Cancel Figure 2 37 Debug Memory Maps Settings 4 Directory Settings If users want to trace driver function library and programs in function library select this item Shown in Figure 2 37 Froject Settings Settings For Processor Remote Debug Directory Compiler Assemi lt gt Workspace term 1 project Show directories for z C3 Source Additional source file directory J ASM Source C3 Link Script Directories objdump D Work EmbestIDE Targets at91 drivers terminal 58 Embedded Systems Development and Labs The English Edition Figure 2 38 Directory Settings Dialog 5 Compiler Settings The compiler settings are shown in Figure 2 39 of the settings in this page will be displayed in the Compile Options edit window The users can manually edit the Compile Options but need to follow the GNU rules Compiler General Settings The compiler general setting is shown in Figure 2 39 e Include Directory header files directory e Object files location the directory of object files e Preprocessor Definitions Define the pre compile micros Project Settings x Settings
8. SF SF SF SF Lcd Draw VLine 206 Embedded Systems Development and Labs The English Edition func Draw vertical line with appointed color para usX0 usY0 line s start point coordinate usY 1 line s end point Y coordinate ucColor appointed color value us Width line s width ret none modify comment ak eak ak ak ak ak ak ake sk void Lcd Draw VLine INT16 usY0 INT16 usY1 INT16 usX0 INT8U ucColor INT16U usWidth INT16 usLen if usY1 lt usYO GUISWAP usY 1 usY0 j while usWidth gt 0 usLen usY1 usYO 1 while usLen gt 0 LCD_PutPixel usX0 usY0 usLen ucColor usX0 3 Bit Map Display Function SF SF name BitmapView func display bitmap para pot s X Y coordinate Stru_Bitmap bitmap struct ret none modify comment ak eak ak ak ak ak ak ak a SF SF SF SF sk ok ak ak void BitmapView INT16U INTI6U y STRU BITMAP Stru Bitmap 1 Embedded Systems Development and Labs The English Edition INT32U i j INTSU uc
9. gt 0 Disable DMA gt Int whenever transferred gt Write time on the fly gt Block 4 word transfer mode n gt whole service reEnable ZDMA transfer rZDICNTO 1 lt lt 20 lafter ES3 rZDCONO 0x1 start Delay 500 while ucZdma0Done wait for DMA finish 5 1 8 Exercises Refer to the sample program display the 4 x 4 keyboard values on the LCD panel 5 2 The 4 x 4 Keyboard Control Lab 5 2 1 Purpose e Understand the design method of keyboard interrupt control program e Understand the design of the keyboard interrupt test program e Understand the interrupt service routine programming using the ARM core processor 5 2 2 Lab Equipment e Hardware Embest S3CEV40 hardware platform Embest Standard Power Emulator e Software Embest IDE 2003 Windows 98 2000 NT XP operation system 5 2 3 Content of the Lab Develop a project that accepts the keys of the keyboard pad through interrupt service routine and display the values on the 8 SEG LED 5 2 4 Principles of the Lab For the matrix keyboard interface there are normally three ways of getting the keyboard values through interrupts through scanning and through inversion e Interrupts When a key is pressed CPU will receive an interrupt signal The interrupt service routine will 209 Embedded Systems Development and Labs The En
10. DP3 5 0x01F00028 RAW Dithering pattem duty 3 5 register xa5a5f Please refer to a sample program source for the latest value of this register 0x01F0002C Dithering pattem duty 2 3 register Please refer to a sample program source for the latest value of this register 0x01F 00030 Dithering pattem duty 5 7 register Oxeb7b5ed Please refer to a sample program source for the latest value of this register DP3_4 0x01F00034 RAW Dithering pattern duty 3 4 register x7dbe Please refer to a sample program source for the latest value of this register Dithering pattern duty 4 5 register Please refer to a sample program source for the latest value of this register Dithering pattern duty 6 7 register Ox7fdfbfe Please refer to a sample program source for the latest value of this register DITHMODE Dithering Mode Register This register reset value is Ox00000 But users will have to change this value to 0x12210 Please refer to a sample program source for the latest value of this register 196 Embedded Systems Development and Labs The English Edition The following description is just a simple introduction to these registers For detailed usage information please refer to the S3C44B0X User s Manual 6 LCD Controller Main Parameter Settings In order to use the LCD controller 18 registers must be configured The control signal VFRME VCLK VLINE and VM can be configured by the contr
11. 3 3 3 3 3 9 3 3 3 3 3 3 void delay int times Function Name start Input Parameters none Output Parameters none start os int i 5 for delay i Function Name delay Input Parameters times Output Parameters none void delay times int i j 8 for i 8 i lt times i i for j 8 j418 j i NA t 2 cl cs sample source code stop stop target CPU regwrite sp 0x1000 initialize stack set stack pointer at 0 1000 3 5 7 Exercises Write an assembly program Use B or BL instruction to jump to the main function of the C language program Use the ev40boot cs as command script file Watch the memory settings by executing this command script file 3 6 C Language Program Lab 2 3 6 1 Purpose e Create a complete ARM project including boot code linker script etc 108 Embedded Systems Development and Labs The English Edition e Understand the boot process of ARM7 Learn how to write simple C language programs and assembly language boot program e Master the linker commands e Learn how to specify a code entry address and entry point e Learn the usage of Memory Register Watch Variable windows 3 6 2 Lab Equipment e Hardware PC e Software Embest IDE 2003
12. 2 Gi 5 if sTIME i lt num0 amp sTIME i gt num9 N09 1 183 Embedded Systems Development and Labs The English Edition break i if N09 0 1 tmp sTIME 0 lt lt 4 0x0f amp sTIME 1 0xf0 if tmp gt 0 amp tmp 0x24 1 STIME 2 tmp gt shour tmp sTIME 3 lt lt 4 0x0f amp sTIME 4 Oxf0 if tmp lt 0x59 sTIME 5 tmp gt smin tmp sTIME 6 lt lt 4 0x0f amp sTIME 7 0xf0 if tmp lt 0x59 break all right Af min lt 59 Af 0 lt hour lt 24 H Aif num 0 9 09 1 Uart Printf n Wrong value To set again Y N Uart Getch want to set Time again if yn 0 4 0x6E yn 0x59 yn 0 79 SendByte yn while yn 0 04 0x59 yn 0x79 if N09 0 1 rRTCCON 0x01 R W enable 1 32768 Normal merge No reset rBCDHOUR sTIME 2 gt shour rBCDMIN 5 5 gt smin rBCDSEC sTIME 6 4 0x0f amp STIME T7 0xf0 gt ssec rRTCCON 0x00 R W disable velse Uart_Printf n n Use Current TIME Settings Wn Uart_Printf n Use Current Settings n return 1 end if want to set Please check RTC or maybe it s Wrong n 184 Embedded Systems Development and Labs The English Edition return 0 end if check 4 5 8 Exercises Write a program detecting RTC clock a
13. 13 DQM L3CLOCK CODE SYSCL 44B0 UDA1341 Figure 6 20 IIS Interface Circuit 262 Embedded Systems Development and Labs The English Edition II 4 Gao Esse zs AWWRADC VREADCEDALC TIKLI ADAC AA YDUTL 1 Tura YOT MLTR YR AT ACESTAT YIN TEXT n TESTI c pim 4 L nes IELK LAEE nk LAT A Figure 6 20 IIS Interface Circuit 6 3 5 Sample Programs function code akk ake afe name Test lis func Test IIS circuit para none ret none modify comment SF SF e 9 9 9 afe 9k 9k void Test 5 14 1 IISInit initialize IIS Uart Printf press R to Record any key to play wav t wav n if Uart Getch R Record Iis test record Playwave 5 play wave 5 times IISClose close IIS ak ak ak ak ak ak name IISInit func Initialize IIS circuit para none 263 Embedded Systems Development and Labs The English Edition ret none modify comment akk ake ae
14. return struct stTest x 0 3 int loop_test int loop_num t int i int b b 0 for i 0 i lt loop num i t 9 b b se 6 test2 b struct test3 uoid test2 bbs int test1 return b int main 2 mais Ze Ready 144 Col 1 Dos NUM 2 Figure 6 69 Double Click the Function in the Function List 2 4 6 Flash Programmer The Embest IDE ARM provides flash programming tool that can erase on board flash or burn file to the flash The software dialog window is shown in Figure 2 70 Embest Online Flash Programmer oj xi File Setting Help Program ceu Flash C EmbestIDE Tools FlashProgrammer at91eb40_Lower cfg Blank cheek CPU Type 91840807 Flash Device aT29Lv1024 p Erase CPU Endian Little Flash Start 5 01000000 Program RAM Start 2 02000000 Flash width 16 fi room Auto Erase if Program With Sector From fi To 512 lt Auto Verify zii gt Checksum Program D work EmbestIDE Tools FlashProgramm Flat Bin x ZB Protect Upload D Work EmbestIDE Tools FlashProgramm X upload Figure 2 70 Flash programmer settings 1 Features and Functions of the Flash Programmer e Supports all microprocessors based on ARM7 and ARM such as AT91R4087 EP7312 S3C4510 and 53 2410 etc 76 e Embedded Systems Development and Labs The Englis
15. sRWramtest Uart_Printf n Press any key to continue n Uart_Getch step sizeof int Access by Word for i 0 i lt RWNum step it int RWBase i step 0 55 55 int RWBase RWNum i step int RWBase i step 143 Embedded Systems Development and Labs The English Edition Uart_Printf Memory Read Write C code gt Word Test n Uart Printf Base Address is Vox n RWBase Memory Units is x n RWNum Printf Access Memory Times is d n 1 Uart_Printf n Press any key to continue n Uart Getch step sizeof short Access by half Word for i 0 i lt RWNum step i short RWBase i step OxFF00 short RWBase RWNum H step short RWBase 1 step Uart_Printf Memory Read Write C code gt halfWord Test Uart Printf Base Address is Vox n RWBase Uart Printf Memory Units is x n RWNum Uart_Printf Access Memory Times is Vodin 1 Uart_Printf n Press any key to continue n Uart_Getch step sizeof char Access by Byte for i 0 i lt RWNum step i char RWBase i step OxBB char RWBase RWNum i step char RWBase 1 Uart_Printf Memory Read Write C code gt Byte Test n Uart Printf Base Address is x n RWBase Printf Memory Units is x n RWNum Uart_Printf Access Memory Times 15 d n 1
16. while 1 1 for i 0 1 lt 16 i OSSemPend UART sem 0 amp err NowTime OSTimeGet iE AHALr printf Run Times at od r NowTime OSSemPost UART sem OSTimeDly 180 void Task3 void Id 1 char Msg int 170 print task s id 282 Embedded Systems Development and Labs The English Edition OSSemPend UART sem 0 amp err uHALr printf Task c Called n char Id OSSemPost UART sem while 1 1 OSTimeDly 900 OSSemPend UART sem 0 amp err 40 Disp OSSemPost UART sem void Task2 void Id 1 int value char Msg print task s id OSSemPend UART sem 0 amp err uHALr Task c Called n char Id OSSemPost UART sem while 1 1 value key read display in 8 segment LED if value gt 1 1 Digit Led Symbol value OS TimeDly 90 OSTimeDly 90 void TaskStart void 1 1 char 141 1 char 142 2 char 143 3 283 Embedded Systems Development and Labs The English Edition char 144 4 create the first Semaphore in the pipeline with 1 to get the task started UART sem OSSemCreate 1 uHALr InitTimers enable timer counter interrupt create the tasks in uC OS and assign decreasing priority to them OSTaskCreate Task1 void amp Id1 amp Stack1 STACKSIZE 1 2 OS TaskCreate Task2 void amp Id2 amp Stack2 STACKSIZE 1 3 OSTaskCreate
17. 4 3 Interrupt Lab 4 3 1 Purpose e Get familiar with ARM interrupt methods and principles e Get familiar with the details of ISR Interrupt Service Routine programming in ARM based systems 4 3 2 Lab Equipment e Hardware Embest S3CEV40 hardware platform Embest Standard Power Emulator PC e Software Embest IDE 2003 Windows 98 2000 NT XP operation system 4 3 3 Content of the Lab Learn the principals of ARM interrupt system Get familiar with S3C44BO0X interrupt registers Learn various programming methods used in dealing with interrupts Write programs that implement an interrupt service routine e Use button SB2 to trigger the interrupt EINT6 The interrupt will turn LEDI on then the 8 SEG LED will display the characters 0 to 1 time then the LEDI will be turned off e Use button SB3 to trigger the interrupt EINT7 The interrupt will turn LED1 on then the 8 SEG LED will display the characters 0 to 1 time then the LEDI will be turned off To understand the interface to the 8 SEG LED display please refer to the 8 SEG LED Display Lab presented in Section 4 6 153 Embedded Systems Development and Labs The English Edition 4 3 4 Principles of the Lab The integrated interrupt controller of the 3 44 processor can process 30 interrupt requests These interrupt sources include internal peripherals such as the DMA controller UART SIO etc In these interrupt sources the four external interrupts EINT4 5 6 7 are
18. EZ m v E controller mu mem IIC Other Interface Other Interface JTAG POWER Figure 2 13 Embest S3CEV40 Function Block Diagram 2 Memory System The Lab system has one 1Mx16 Flash chip SST39VF160 and a 4Mx16 SDRAM chip HY57V65160B The flash chip interconnection diagram is shown in Figure 2 14 The pin nGCSO of 44B0X microprocessor chip is connected to the pin nCE of SST39VF160 flash chip Because the flash chip is 16 bit the address bus A1 A20 of 44B0X CPU is connected to the A0 A19 of the SST39VF160 flash chip The memory space address of the Flash is 0x000000 0x00200000 The SDRAM circuit interconnection diagram is shown at Figure 2 15 The SDRAM has four banks Each bank has 1Mx16 bit The address of the bank is decided by pin BA1 and 00 selects Bank0 01 selects bank1 10 selects Bank2 and 11 selects Bank3 The row address pulse RAS and the column address pulse CAS are used in addressing each banks The Lab system provides jumpers for the users to upgrade the capability of SDRAM up to 4x2M x16 bit The upgrade method is done by connecting the 1 of SDRAM chip to the pins A21 A22 A23 of CPU chip The SDRAM will be the chip selected by a specified chip selection signal nSCSO of the CPU The SDRAM memory space is 0x0C000000 0x0C 8000000 38 Embedded Systems Development and Labs The English Edition A 20 1 A 19 0 D 15 0 DQ 15 0 nGCS0 _ nCE nO
19. On Chip Debugging 22 Embedded Systems Development and Labs The English Edition File Edit Tools Build Remote Debug Version Config Help gt Ps hello bld test cxx user lnk hello c sortbynm c demo h Elutils bld strings xsort c q h q cxx aprint f Filename Fe Type Builder Output Window Version Control program LC C 1inker file LC LC include file program Ada C include_file Fortran Target ppc Figure 1 6 Project Builder Click to single st Click to continue Click to display inter Click to display the Click to displ ister Click to edit th the program start he program oad rcelassembly call stack winde Corrent int age cnt slen Click to display local lao char name 256 linebuf 256 buffBUFSIZ variables Click on a green dot 41 struct element pfirst pprev pthis 7 Siek on asop sign 2 struct element plist pp ii to clear a breakpoint locals ve 4 1 main 0 argc 0 fu a filename 0xcc50 amp _rnerr 0x1 0 gt 46 open file containing data records format fp 0 Feri ri n if argc 1 fp fopen fleneme 17 else fp fopen roster r cnt 5 Double click on a variable 51 3 1 display that variable gt 4 ow
20. clear EXTINTPND reg rINTMOD 0x0 rINTCON 0 1 rINTMSK BIT_GLOBAL BIT_EINT1 BIT_EINT4567 set EINT interrupt handler pISR_EINT4567 ant Eint4567Isr pISR_EINT1 int Keylsr PORT G rPCONG Oxffff EINT7 0 rPUPG 0 0 pull up enable rEXTINT rEXTINT 0x22220020 EINTI j EINT4567 falling edge mode rI ISPC BIT_EINT1 BIT_EINT4567 rEXTINTPND Oxf clear EXTINTPND reg 3 Interrupt Service Routine SF SF SF SF Eint4567Isr func para none ret none modify comment ak eak ak ak ak ak ak ak SF SF void Eint4567Isr void 1 if IntNesting 1 IntNesting Uart_Printf IntNesting Yod n IntNesting An Extern Intrrupt had been occur before dealing with one 164 Embedded Systems Development and Labs The English Edition which int rEXTINTPND rEXTINTPND Oxf clear EXTINTPND reg rl ISPC BIT_EINT4567 clear pending bit 4 3 7 Exercises 1 Get familiar with the S3CA4BOX timer controller the related registers and the principle of timer interrupt 2 Write a program and make usage of timer interrupt to implement LED1 and LED2 flashing every 1s 4 4 Serial Port Communication Lab 4 4 1 Purpose e Get familiar with the S3
21. Figure 2 4 Flash Programmer Windows The following are the features of the Flash Programmer e Supports all ARM7 and ARM 9 microprocessors ATMEL AT91 INTEL 28 Series SST 29 39 49 series Flash empty memory space checking memory erasing memory programming file verification protection and uploading 31 Embedded Systems Development and Labs The English Edition Specific memory sector operations without changing other memory sectors 8 bit 16 bit and 32 bit read write width Support for 1 to 4 flash chips programming program files doesn t need to be split Support for Windows 98 2000 NT and XP operating systems 2 1 4 Embest S3CCEV40 Development Board Embest S3CEV40 is the hardware platform of the Lab development system It is an ARM development board developed by Embest Inc with full functions This board provides various resources and is based on the Samsung S3C44B0X microprocessor ARM7TDMI The hardware consists mostly of commonly used devices to develop an embedded system These devices are serial port Ethernet port voice output port LCD and TSP touch screen 4x4 small keyboard Solid State Hard Disc Flash SDRAM etc After this course users could not only finish the examples that are provided by the Lab system but also could build their own target systems The hardware platform is shown in Figure 2 5 Figure 2 5 Lab System Hardware Platform The following are the basic features of the S3CEV40 developmen
22. Header Length Service Type Total Length Time to Live Protocol Header Checksum Figure 6 14 IPv4 Data Package Format The C structure of the IP header is defined as following struct ip header t v 4 Version hk 4 Header Length UINTS8 tos Service Type UINT16 ip len Total Length 248 Embedded Systems Development and Labs The English Edition UINT16 ip id Identification UINT16 ip off Fragment Offset UINT8 ttl Time to Live UINT8 ip p Higher layer Protocol UINT16 ip sum checksum struct in_addr ip src ip dst Source and Destination IP Address The description of these parameters are as following ip v Ip protocol version Ipv is 4 Ipv6 is 6 ip hl IP Header length Based on 4 bytes unit The length of IP header is fixed as 20 bytes If there are no options included this value is 5 ip tos Service type describes the priority of services ip len IP package length Use byte as a unit ip id Identification of this package ip off Fragment Offset Used with the above IP for reunite fragments ip ttl Time to live Minus 1 when passing a route throw away the data package until this value becomes 0 ip p Protocol The higher layer protocols that create this package or UDP for example ip sum Header checksum It is used to provide verification to the IP header ip src ip dst Sender and receiver IP add
23. LCDBANK 0xc300000 gt gt 22 0x30 LCDBASEU 0 100000 gt gt 1 0x8000 LCDBASEL 0 8000 0x50 0x200 Oxef 1 0xa2b00 2 LCD Panel 320 x 240 16 gray scale dual scan mode LINEVAL 120 1 0x77 PAGEWIDTH 320 x 4 16 0x50 OFFSIZE 512 0x200 LCDBANK 0xc300000 gt gt 22 0x30 LCDBASEU 0 100000 gt gt 1 0 8000 LCDBASEL 0x8000 0x50 0x200 x 0x77 1 0xa91580 5 1 5 Lab Design 1 Circuit Design The control circuit for LCD panel must provide power supply bias voltage and LCD control The S3C44B0X has its on chip LCD controller that can drive the LCD panel on the development board As a result the control circuitry must provide the power supply and the bias voltage supply 1 The Circuit on LCD Panel The circuit on LCD panel is shown in Figure 5 10 tcp LOAD DF VF iDorr Va LCD PANEL TABLET Ver 320X240 DOTS VF FRAME Figure 5 10 LCD Panel Architecture Diagram 2 Pin Description The pin description of LCD panel is shown in Table 5 6 Table 5 6 LCD Panel Pin Descriptions 199 Embedded Systems Development and Labs The English Edition ney Z HHB gt FS TSS DATA the common driver shft register Van I24 be AS i4 6 Common driver chtashift signalalea bitches FIT the data of the line immediately akowe HL H Display ON dE bEY ASO 2 3
24. OS TASK SW 272 Embedded Systems Development and Labs The English Edition STMFD Ir save pc STMFD Ir save lr STMFD sp 10 112 save register file and ret address MRS r4 CPSR STMFD r4 save current PSR MRS r4 SPSR YYY STMFD r4 YYY save SPSR OSPrioCur OSPrioHighRdy LDR r4 addr_OSPrioCur LDR r5 addr_OSPrioHighRdy LDRB 16 r5 STRB 16 14 Get current task TCB address LDR r4 addr OSTCBCur LDR r5 r4 STR sp r5 store sp in preempted tasks s TCB Get highest priority task TCB address LDR r6 addr OSTCBHighRdy LDR r6 LDR 5 get new task s stack pointer OSTCBCur OSTCBHighRdy STR r6 r4 set new current task TCB address LDMFD r4 MSR SPSR cxsf r4 LDMFD sp r4 YYY MSR CPSR cxsf r4 YYY LDMFD sp 10 112 Ir pc YYY 3 RunNewTask RunNewTask SUB Ir lr 4 STR Ir SAVED LR STR Ir pc SAVED LR 8 Change Supervisor mode r12 register don t preserved r12 that PC of task MRS Ir SPSR AND Ir lr 4OXFFFFFFEO ORR Ir Ir 20x13 MSR CPSR cxsf Ir Now Supervisor mode STR 112 sp 7 8 saved r12 LDR 112 SAVED LR QLDR r12 pc ZSAVED LR 8 STMFD 112 r12 that PC of task SUB Sp Sp 4 inclease stack point LDMIA r12 restore r12 STMFD Ir save lr STMFD 10 112 save register file an
25. Source amp led swi i bep count 8 2 23 ASM Source 1 uint i 8 cstartup s LedSpeed 500080 D walt 1 mi amp wait irq s 3 Link Script at91 clock open PIOB DESC periph id Set up PIO Func zi Files 4 04 nin m3 en ontan rcp rn arr of I targets at91 targets eb63 o debug wait_irg o arm elf ld T targets at91 targets sram_ice ld EL L build xgcc arm el L build xgcc arm elf lib gcc lib arm elf 3 6 2 arm inter o debug debug led_swing o debug wait_irg o Targets at91 drivers lib_ dru Targets at91 parts m63266 arm inter m63266_11b32 1ib lc lgcc n mm successfully executed Tr y Build Debug Command j Find in Files 1 j 2 Lnl Coll DOS NUM 7 Figure 2 53 Project Build Menu and Tools Bar 2 4 5 Load Debugging The Embest IDE for ARM includes a software emulator The user can debug software without the hardware If the users debug software with the hardware the emulator needs to be connected Select Debug Remote Connect and then select Download from the menu If Automatic Download is selected in the project settings the online debugging will be launched immediately after the file is downloaded 1 Break Point Setting and Single Stepping The Embest IDE can set break points in source program disassemble program code sourc
26. amp OSTickI Figure 2 56 Program Stops at Break Point The user can select Debug Breakpoints item and a dialog box will list all the break points as shown in Figure 2 57 69 Embedded Systems Development and Labs The English Edition CK x Address Location Count When Comman 0x0200012c e embestide targets at91 t memwrite 0 02000138 eX embestide targets at91 0 02000120 eX embestide targets at91 0x02000164 eXembestide targets at91 0x02000188 e embestide targets at91 t 0x02000178 e embestide targets at91 t 0 02000194 e embestide targets at91 t 0x0200019c e embestide targets at91 gt Modify Delete Delete All View Code Cancel Figure 2 57 Break Point List The user can click the Modify button to modify break point information as shown in Figure 2 58 Breakpoint moaity M 0 0200012 SS Function Cancel Source File Je embestide targets at91 targ Enable Count o Advanced gt gt Figure 2 58 Break Point Information Modification In this dialog user can click the Advanced button to add condition information as shown in Figure 2 58 70 Embedded Systems Development and Labs The English Edition Li x Location 0x020001 2c Function Cancel Source File eembestidetargetstat9Titarg Enable Count o lt lt Advanced Advance Option When stk 0 15 Command memwrite Oxffe00000 0x01002529 Figure
27. ofa Snurre term_eb40a files H Source J ASM Source Link Script El term_eb42 files H 0 C Source xi Settings Processor Remote Debug Directory Compiler Assemb gt term_eb40 files H E C Source Category General m 9 21 ASM Source amp C3 Link Script Symbol file Mebugiterm eb63 el RI Action after connected None C Auto download C Command script Figure 2 35 Debug General Settings 2 Download Settings Download settings page is shown in Figure 2 36 convert it into a binary file Execute program from Download file Symbol file name and its directory Symbol file includes debug information Normally the symbol file is an elf format file or a binary file When download as an elf file the system will automatically Download verification Automatically compare the downloaded file if it is the same as the original file Download address The downloaded file will be stored from this address gt Don t care After download the system s PC program counter will not change Download address After download the system will execute from this address 56 gt Program entry point After download the system will set the PC to the program entry point Embedded Systems Development and Labs The English Edition e Execute until The last symbol the system will execute after the download Project Settings B Settings For
28. volatile unsigned 0x1d04010 Zdefine volatile unsigned 0x1d00014 Zdefine rUERSTAT1 volatile unsigned 0x1d04014 define rUFSTATO volatile unsigned 0x1d00018 define rUFSTAT1 volatile unsigned 0 1404018 define TUMSTATO volatile unsigned 0x1d0001c define rUMSTAT 1 volatile unsigned 0x1d0401c define rUBRDIV0 volatile unsigned 0x1d00028 define TUBRDIV 1 volatile unsigned 0 1404028 ifdef BIG ENDIAN define TUTXHO volatile unsigned char 0x1d00023 define rUTXH1 volatile unsigned char 0x1d04023 define rURXH0 volatile unsigned char 0x1d00027 define rURXH1 volatile unsigned char 0x1d04027 define WrUTXHO ch volatile unsigned char 0x1d00023 unsigned char ch define WrUTXHl ch volatile unsigned char 0x1d04023 unsigned char ch Zdefine RHURXHO volatile unsigned char 0x1d00027 define RHURXHI volatile unsigned char 0x1d04027 define UTXHO 0x1d00020 3 byte access address by BDMA define UTXHI 0x1d04020 3 define URXHO 0x1d00024 3 define URXHI 0x1d04024 3 else Little Endian define TUTXHO volatile unsigned char 0x1d00020 define rUTXH1 volatile unsigned char 0x1d04020 define rURXH0 volatile unsigned char 0x1d00024 168 Embedded Systems Development and Labs The English Edition define TURXHI volatile unsigned char 0x1d04024 define WrUTXHO ch
29. which performs the jump to the corresponding service routine Compared with the previous software method it will reduce the interrupt latency dramatically 1 Interrupt Controller Operation 1 F bit and I bit of PSR program status register If the F bit of PSR program status register in ARM7TDMI CPU is set to 1 the CPU does not accept the FIQ fast interrupt request from the interrupt controller If I bit of PSR program status register in ARM7TDMI CPU is set to 1 the CPU does not accept the IRQ interrupt request from the interrupt controller So to enable the interrupt reception the F bit or I bit of PSR has to be cleared to 0 and also the corresponding bit of INTMSK has to be cleared to 0 2 Interrupt Mode ARMT7TTDMI has 2 types of interrupt mode or IRQ the interrupt sources determine the mode of interrupt to be used at interrupt request 3 Interrupt Pending Register Indicates whether or not an interrupt request is pending Whenever a pending bit is set the interrupt service routine starts if the I flag or F flag is cleared to 0 The Interrupt Pending Register is a read only register so the service routine must clear the pending condition by writing a 1 to I ISPC or F ISPC 4 Interrupt Mask Register Indicates that an interrupt has been disabled if the corresponding mask bit is 1 If an interrupt mask bit of INTMSK is 0 the interrupt will be serviced normally If the corresponding mask bit is 1 and the interrupt
30. 01060004 IIC Bus control status register 0000 0000 Mode selection IIC bus master slave Tx Rx mode select bits 00 Slave receive mode 01 Slave transmit mode 10 Master receive mode 11 Master transmit mode IIC Bus busy signal status bit 0 read IIC bus not busy when read write IIC bus STOP signal generation 1 read IIC bus busy when read write IIC bus START signal generation The data in IICDS will be transferred automatically just after the start signal Serial output enable IIC bus data output enable disable bit O Disable RXTx 1 Rx Tx Arbitration 3 IIC bus arbitration procedure status flag bit status flag 0 Bus arbitration successful Busy signal status START STOP condition 1 Bus arbitration failed during serial I O Address as slave status flag IIC bus address as slave status flag bit 0 cleared when START STOP condition was detected 1 Received slave address matches the address value in the IICADD IIC bus address zero status flag bit 0 cleared when START STOP condition was detected 1 Received slave address 15 000000006 Address zero status flag 3 MULTI MASTER IIC BUS ADDRESS REGISTER IICADD IICADD 0x01D60008 IIC Bus address register Not mapped 0 Slave address 7 bit slave address latched from the IIC bus XXXX XXXX When serial output enable 0 in the IICSTAT IICADD is write enabled The IICADD value can be read any time
31. 2 Run the PC Hyper Terminal set to 115200 bits per second 8 data bits none parity 1 stop bits none flow control 3 Connect the Embest Emulator to the target board Open the Display ews project file in the BMP Display sub directory of the Example directory After compiling and linking connect to the target board 202 Embedded Systems Development and Labs The English Edition and download the program 4 The hyper terminal should display the followings Please press on one key on keyboard and look at LED Embest 44B0X evaluation board S3CEV40 LCD display test example please look at LCD screen 5 Watch the LCD screen and you will see many rectangles ASCII characters mouse bitmap etc 6 After understanding the details of the lab finish the Lab exercises 5 1 7 Sample Programs 1 Initialization Program screen color define M5D n n amp Ox1fffff define BLACK Oxf define WHITE 0x0 3C44B0X LCD control register addresses define ILCDCONI volatile unsigned 0x1f00000 define rLCDCON2 volatile unsigned 0x1f00004 define TLCDCON3 volatile unsigned 0x1f00040 define ILCDSADDRI volatile unsigned 0x1f00008 define rLCDSADDR2 volatile unsigned 0x1f0000c define rLCDSADDR3 volatile unsigned 0x1f00010 define rREDLUT volatile unsigned 0x1f00014 define rGREENLUT volatile unsigned 0x1f00018 define rBLUELUT volatile unsigned 0x1f0001c defi
32. 2 SF SF void TSInt void 1 int i char fail 0 ULONG tmp ULONG Pt 6 lt X Position Read TSPX GPE4_Q4 TSPY GPES Q3 TSMY GPE6_Q2 TSMX GPE7 01 0 1 1 0 rPDATE 0x68 rADCCON 0x1 lt lt 2 AINI DelayTime 1000 delay to set up the next channel for 1 0 1 lt 5 i rADCCON 0x1 Start X position A D conversion while rADCCON amp 0 1 Check if Enable start is low while rADCCON amp 0x40 Check ECFLG 0x3ff amp rADCDAT 227 Embedded Systems Development and Labs The English Edition j read X position average value Pt 5 Pt 0 Pt 1 Pt 2 Pt 3 Pt 4 5 tmp Pt 5 Y Position Read TSPX GPE4 Q4 TSPY GPES_Q3 TSMY GPE6_Q2 TSMX GPE7_QI1 1 0 0 1 rPDATE 0x98 rADCCON 0x0 2 AINO DelayTime 1000 delay to set up the next channel for 1 0 155 i 1 rADCCON 0 1 Start Y position conversion while rADCCON amp 0 1 Check if Enable start is low while rADCCON amp 0x40 Check ECFLG Pt 1 Ox3ff amp rADCDAT read Y position average value Pt 5 Pt 0 Pt 1 Pt 2 Pt 3 Pt 4 5 if CheckTSP tmp lt Xmin tmp gt Xmax Pt 5 lt Ymin Pt 5 gt Ymax 15 valid value 1 tmp 320 tmp Xmin Xmax Xmin position Uart_Printf X Posion AIN1 15 04
33. 5 SEGMENT A SEGMENT B SEGMENT C SEGMENT D SEGMENT E SEGMENT SEGMENT SEGMENT SF SF SF SF name Digit Led Segment 215 Embedded Systems Development and Labs The English Edition func 8 segment digit LED s segment display control function para seg num segment number ret none modify comment Aak ak ak ak ak ak ak a ake a ake ake 2 eak ak void Digit Led Segment int seg num 1 segment control if seg num gt 0 amp amp seg num lt 8 LED8ADDR Seg seg num 4 Key Detection Program There are 4 different addresses that are used in the 4 x 4 keyboard detection program The sample program 1 as following SF SF SF SF name key read func read key value para none ret key value 1 error modify comment inline int key read 1 int value char temp read line 1 temp keyboard_base Oxfd not OxF mean key down if temp amp KEY VALUE MASK KEY VALUE MASK if temp amp 0x1 0 value 3 else if temp amp 0
34. 6 7 m EN Lt 4 ta 17 D to a 3 Control Circuit Design The power supply of LCD panel 15 21 5V The development board power supply is or 5V So a voltage converter is needed The development board has MAX629 power management module for LCD panel power supply Figure 5 11 shows the S3CEV40 development board power supply and bias voltage supply circuit 200 Embedded Systems Development and Labs The English Edition D1 MBR0540 15 15K 180K 15K 15K Figure 5 11 Power Supply and Bias Voltage Supply Circuit 2 Software Design The Lab implementation includes 3 parts display rectangles characters and bit maps 1 A Thought on Design The basic principle of LCD display is pixel control The pixel storage and transfer determines the effect obtained on the display As a result the graphics can be displayed by controlling the pixels Storing the pixels in some order can display characters such as ASCII characters language characters etc Embest ARM development system for pixel control functions are the following SF SF SF SF ake ake afe 2d S3CEV40 LCD pixel display micro definition LCD LCD PutPixel x y c Send the pixel to the virtual buffer LCD Active PutPixel x y c Send the pixel to the display buffer directly drive LCD
35. Analyze whether the buttons on L1 line are pressed Because the third pin of J7 is in the off status and high logic on A4 causes that the first pin is disconnected with the fifth pin of J7 output of data bus from U10 is still OxF e Xxx10111 is low logic Analyze whether the buttons on L2 line are pressed Because the second 211 Embedded Systems Development and Labs The English Edition pin of J7 is in the off status and high logic on A4 causes that the first pin is disconnected with the fifth pin of J7 output of data bus from U10 is still OxF e Xxx01111 A4 is low logic Analyze whether the buttons on L3 line are pressed Because the first pin 15 connected with the fifth pin of J7 and low logic on A4 causes that input of data bus pass through the loop from U11 to U10 the output of data bus DO is pulled down U10 and becomes OxE The interrupt service routine ISR can analyze whether the button SB16 is pressed according to the rules The addresses and the data for the 16 keys are shown in Table 5 7 Table 5 7 Key value decisions A4 A2 Al AO Address D3 D2 DI DO Data SB1 1 1 1 0 1 OxFDH 0 1 1 1 0 7 SB2 1 1 0 1 1 OxFBH 0 1 1 1 0 7 SB3 1 0 1 1 1 OxF7H 0 1 1 1 0 7 84 0 1 1 1 1 OxEFH 0 1 1 1 0 7 SB5 1 1 1 0 1 OxFDH 1 0 1 1 OxBH SB6 1 1 0 1 1 OxFBH 1 0 1 1 OxBH SB7 1 0 1 1 1 OxF7H 1 0 1 1 OxBH
36. DADDR and the read write page address PADDR should be given These two addresses form the operation address OPADDR as following 1010 A2 Al R W In the Embest ARM Development system pins A2A1AO0 are 000 and the system can access all pages of the AT24C04 4k The format of the read write data operation to an address ADDR 1010 A2 A1 R W is as following 1 Write Format The time sequence diagram for writing one byte to the address ADDR W is shown in Figure 6 3 The write format is START OPADDR W ACK ADDR W ACK data ACK STOP C B T R 5 T R DEVICE T T ADDRESS E WORD ADDRESS DATA P ss M M L A A 8 S C amp B BWK B BK K Figure 6 3 Write One Byte The time sequence diagram for writing n bytes to the address ADDR_W is shown in Figure 6 4 The write format is START OPADDR W ADDR W datal ACK datal datan ACK STOP_C 8 w T R 8 I T R DEVICE T T ADDRESS E WORD ADDRESS n DATA DATA n 1 1 P M LRA 5 sic C B BW K K K K K 232 Embedded Systems Development and Labs The English Edition Figure 6 4 Writing N Bytes 2 Read Format The time sequence diagram for reading n bytes from the address ADDR W is shown in Figure 6 5 The read format is START C OPADDR ADDR OPADDR data STOP C R B E T DEVICE A G G o ADDRESS D K K K 54 eee bE HE D
37. Embedded Systems Development and Labs The English Edition The interrupt controller generates the machine code for branching to the vector address of each interrupt source For example if EINTO is IRQ the interrupt controller must generate the branch instruction which branches to 0x20 instead of 0x18 As a result the interrupt controller generates the machine code 0xea000000 The user program code must locate the branch instruction which branches to the corresponding ISR interrupt service routine at each vector address The machine code branch instruction at the corresponding vector address is calculated as follows Branch Instruction machine code for vectored interrupt mode 0xea000000 lt destination address gt vector address gt 0x8 gt gt 2 Note A relative address must be calculated for the branch instruction Table 4 20 The Vector Addresses of Interrupt Sources For example if Timer 0 interrupt is to be processed in vector interrupt mode the branch instruction which jumps to the ISR is located at 0x00000060 The ISR start address is 0x10000 The following 32bit machine code is written at 0x00000060 The machine code at 0x00000060 is 000000 0 10000 0 60 0 8 gt gt 2 0xea000000 0x3 fe6 0xea003fe6 156 Embedded Systems Development and Labs The English Edition The assembler usually generates the machine code automatically and therefore the machine code does not have to be calculated as abov
38. OR ed to the interrupt controller The UARTO and 1 Error interrupt are OR ed as well The role of the interrupt controller is to ask for the FIQ or IRQ interrupt request to the ARM7TDMI core after making the arbitration process when there are multiple interrupt requests from internal peripherals and external interrupt request pins Originally ARM7TDMI core permits only the FIQ or IRQ interrupt which is the arbitration process based on priority by software For example if you define all interrupt sources as IRQ Interrupt Mode Setting and if there are 10 interrupt requests at the same time you can determine the interrupt service priority by reading the interrupt pending register which indicates the type of interrupt request that will occur This kind of interrupt process requires a long interrupt latency until to jump to the exact service routine The S3C44B0X may support this kind of interrupt processing To reduce the interrupt latency S3CA4BOX microcontroller supports a new interrupt processing called vectored interrupt mode which is a general feature of the CISC type microcontrollers To accomplish this the hardware inside the S3C44BOX interrupt controller provides the interrupt service vector directly When the multiple interrupt request sources are present the hardware priority logic determines which interrupt should be serviced At the same time this hardware logic applies the jump instruction of the vector table to 0x18 or 0 1
39. PB9 and 24 PB10 respectively These two pins belong to Port B and have been configured as outputs Writing a 1 or a 0 to the specific bit of the PDATAB register can make the pin s output low or high When the pin 23 24 is low the LEDs will be on lit When the pin 23 24 is high the LEDs will be off LEDI R95 NGCS4 NGCSS S3C44B0X VDD33 Figure 4 5 Connection diagram to LED 1 and LED 2 4 2 5 Operation Steps 1 Prepare the Lab environment Connect the Embest Emulator to the target board Connect the target board UARTO to the PC serial port through the serial cable provided by the Embest development system 2 Run the PC Hyper Terminal set to 115200 bits per second 8 data bits none parity 1 stop bits none flow control 3 Connect the Embest Emulator to the target board Open the LED test ews project file that is located in the EmbestIDE Examples Samsung S3CEV40 directory Compile and link the project Connect to the target 148 Embedded Systems Development and Labs The English Edition board and download the program NOTE please note that the debug window should be set as in Figure 4 5a Processor Remote Debug Directory Compiler Assemb 4 gt Processor Remote Debug Directory Compiler Assemb 4 gt Category General category I Symbol file Download file MebugiLed Testelf MebudiLed Teste B Action after connected Download verify None Download
40. Windows 98 2000 NT XP 3 6 3 Content of the Lab Write a delay function using C language Use embedded assembly code 3 6 4 Principles of the Lab 1 ARM Exception Vector Table An exception takes place when the normal program execution flow is interrupted For example the process of an external interrupt causes an exception Before the processor core processes the exceptions the current status must be preserved When the exception process is finished the processor will return to the interrupted program The ARM exception Vector Table is shown in Table 3 4 Table 3 4 ARM Exception Vector table Vector Address Exception Mode 0x00000000 Reset SVC 0x00000004 Undefined Instruction UND 0x00000008 Software interrupt 0x0000000C Prefetch abort Abort 0x00000010 Data abort Abort 0x00000014 Reserved Reserved 0x00000018 IRQ IRQ 0x0000001C FIQ FIQ Multiple exceptions can arise at the same time As a result a priority order in which the exceptions are handled is defined High Priorities Reset highest priority 2 Data abort 3 FIQ 4 IRQ 5 Prefetch Abort 6 SWI undefined instruction including absent coprocessor this is the lowest priority These are mutually exclusive instruction encodings and therefore cannot occur simultaneously Reset starts the 109 Embedded Systems Development and Labs The English Edition processor from a known state and renders all other pendin
41. development that target real world applications Chapter Seven Introduces the uC OS II real time operating system porting and real time application development based on the Embest tools Through the Labs of this chapter the students will learn how to port uC OS II to the ARM processor and how to build simple real time applications based on the uC OS II kernel They will learn the porting steps of the uC OS II kernel to the ARM7 microprocessor the boot flow of the uc OS II the task management the inter task communication the synchronization and the memory management under uc OS II kernel Appendix A and B Instruction Quick Reference Table and Instruction Set Coding Table Embedded Systems Development and Labs The English Edition Appendix C An introduction to Embest ARM products Appendix D An introduction to the contents of the CD attached to this book The CD attached to this book 1s IDE Pro a free educational version of the IDE software that Embest Inc provides to the readers of this book The readers can install this software and edit compile and debug the sample programs on a software target emulator After this software is installed the readers can find the basic Lab sample software of Chapter 3 of this manual in the EmbestIDE Examples S3CEV40 directory To run the rest of the sample programs of the manual the readers need to purchase the full version of the Embest IDE the Embest development board and ICE emulator The
42. e Hardware PC e Software Embest IDE 2003 Windows 98 2000 NT XP 3 6 3 Content of the Lab Write a random number generation function using assembly language Call this function from a C program to produce a series of random umbers and save them in the memory 3 6 4 Principles of the Lab 1 ARM procedure call ATPCS ARM ATPCS is a series of basic rules that are used in mutual calls between programs These rules cover Support data stack limitation check Support read only section position irrelevant ROPI Support read write section position irrelevant RWPI Support mixed usage of ARM program and Thumb program Process float computing When using the above rules the application program must follow the following rules 118 Embedded Systems Development and Labs The English Edition e Programming must follow the ATPCS e Use registers and data stack to transfer variables e Assembler uses apcs parameters For the other ATPCS rules users can read the related ARM processor books or visit ARM website Following the rules of ATPCS users can write programs using different languages The main problem is resolving the parameter transfer The interim registers and data stack are used for parameter transfer The 1 4 parameters use RO R4 registers If the program has more than 4 parameters these parameters should be transferred using data stack As a result the receiving program should know how many parameters are tra
43. wait until tx shifter is empty else while rUTRSTAT1 amp 0x4 wait until tx shifter is empty char Uart GetKey void 173 Embedded Systems Development and Labs The English Edition if whichUart 0 1 IffrUTRSTATO amp Ox1 Receive data ready return RHURXHO0 else return 0 else IffrUTRSTATI amp 0 1 X Receive data ready return rURXHI else return 0 void Uart GetString char string char string2 string char c while c Uart_GetchQ r if c b if int string2 lt int string Uart_Printf b b string else string c Uart_SendByte c string 0 Uart SendByte n 174 Embedded Systems Development and Labs The English Edition int Uart GetIntNum void 1 char str 30 char string str int base 10 int minus 0 int lastIndex int result 0 int 1 Uart_GetString string if string 0 1 minus 1 string if string 0 0 amp amp string 1 x string 1 X 1 base 16 string 2 lastIndex strlen string 1 if string lastIndex h string lastIndex H 1 base 16 string lastIndex 0 lastIndex if base 10 1 result atoi string result minus 1 result result else 1 for i 0 1 lt lastIndex i 1 Embedded Systems Development and Labs The English Edition if isalpha string 1 1 if isupper string i result result lt lt 4 string i A t
44. 12 Port A PortA Pin function PortA Pin function PortA Pin function ADDRO 4 ADDRIO9 ADDR23 PAI ADDRI6 PAS ADDR20 PA9 OUTPUT lIS PA2 ADDRI7 ADDR2I PA3 ADDRIS PA7 ADDR22 PCONA access address 0X01D20000 PDATA access address 0X01D20004 PCONA reset value OX1FF Table 4 13 Port B Port B Pin function PortB Pin function Port B Pin function PBO SCKE 4 OUTPUT IS PB8 NGCS3 PBI SCLE PB5 OUTPUT IIS PB9 OUTPUT LED1 PB2 nSCAS PB6 81 10 OUTPUT LED2 PB3 nSRAS PB7 NGCS2 PCONB access address 0X01D20008 PDATB access address 0X01D2000C PCONB reset value OX7FF Table 4 14 Port C Port C Pin function Port C Pin function Port Pin function PCO IISLRCK PC6 VD5 PCI2 TXDI PCI IISDO PC7 VD4 PCI3 RXDI PC2 IISDI 8 INPUT UART 14 INPUT UART PC3 IISCLK PC9 INPUT UART 15 INPUT UART 4 VD7 PCIO RTSI 5 VD6 PCI CTSI PCONC access address 0X01D20010 PDATC access address 0X01D20014 146 Embedded Systems Development and Labs The English Edition PUPC access address 0X01D20018 PCONC reset value OXOFFOFFFF Table 4 15 Port D Port D Pin function PortD Pin function Port D Pin function PDO VDO PD3 VD3 PD6 VM PDI VDI PD4 VCLK PD7 VFRAME PD2 VD2 PD5 VLINE PCOND access address 0X01D2001C PDATD access address 0X01D20020 PUPD access address 0X01D20024 PCOND reset value OXAAAA Table 4 16 Port E
45. 13 4 x 4 Keyboard Recognition Circuit 3 Circuit Functionality As shown in Figure5 13 the keyboard connection electric circuit a 4x4 matrix keyboard port is expanded on the board This keyboard supports the interrupt mode and the scanning mode 4 data wires represent the rows and 4 address wires represent the columns Row wires are connected with pull up resistors to maintain high level These row signals are used to generate the EXINT1 MCU s interrupt signal through a 74HC08 AND gate The column wires are connected with pull down resistors to maintain low level When some key is pressed down the row wires are pulled to low level which causes EXINTI input to become low and activate the MCU interrupt system After the interrupt is recognized the pressed key can be found by scanning the rows and columns of the keyboard then the corresponding key is processed Chip 74HC541 is selected through the chip select signal nGCS3 This guarantees that MCU reads the row wire s information only when the keyboard is used For example if the key that connects pinl and pin5 of J7 is pressed the interrupt routine will read data using the following addresses x means 0 or 1 e Xxx11101 Al is logic low Analyze whether the button on LO line is pressed Because the fourth pin on J7 is in the off status and high logic on A4 causes that the first pin is disconnected with the fifth pin of J7 output of data bus from U10 is still OxF e Xxx11011 A2 is low logic
46. 2 59 Add Break Point Condition Information 2 Disassembly Window The disassembly window is shown in Figure 2 60 Break points can be set in disassembly window Embest IDE Disassembly amp File Edit View Project Build Debug Tools Window Help Ds ug 5 8 2 JE 4 d TR EE amp amp Rn E a mix 96 use for that the option ru base 6x34 ehaga C3 Source 99 ldr pc pc 0 18 C3 ASM Source 8x 82088828 ldr pc pc 18 0x20080848 28 Link Script 188 ldr pe pc 6x18 term_eb42 files 8x 62666024 ldr pc pc 18 6x2600044 28 Source 161 ldr pc pc 0x18 C3 ASM Source 6x02 000028 ldr pc pc 18 0x2000858 182 ldr C 0 18 I retis 6x 62 66602c ldr pe 10 m 183 ldr pc pc 6x18 C1 C Source 6x 62000036 ldr pc pc 18 0x2000858 22 ASM Source 185 nop 28 Link Script 9 62 666634 nop mov r8 r8 term_eb63 files 185 ldr pc pc OxF26 C Source 0x 82008038 ldr pc pc HFFFFF0e0 Ox1fFFI2Z0 8 term c 186 ldr pc pc 6xF26 D ER Cha enon 6x 02 08803c ldr pc pc FFFFF0e0 Ox1FFFI24 9 62 6666486 andeq r8 r8 84 6x 0288080545 andeq r8 r8 88 4 Figure 2 60 Source File and Its Disassembly Instructions 71 Embedded Systems Development a
47. 5 6 7 8 1 2 3 4 dst 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 end 3 3 7 Exercises Write a program switch the state processor from ARM state to Thumb state In ARM state put the value 0x12345678 to R2 in Thumb state put the value 0x87654321 to R2 Watch and record the value of CPSR and SPSR Analyze each of the flag bits 3 4 ARM State Mode Labs 3 4 1 Purpose e Learn how to change ARM state mode by using MRS MMSR instruction Watching the registers in different mode and get a better understanding of the CPU architecture e Learn how to specify a start address of the text segment by using command line in ld 3 4 2 Lab Equipment e Hardware PC e Software Embest IDE 2003 Windows 98 2000 NT XP 3 4 3 Content of the Lab Through ARM instructions switch the processor mode and watch the behavior of the registers in different modes Master the different ARM mode entry and exit 3 4 4 Principles of the Lab 1 ARM Processor Modes Most programs operate in user mode However ARM has other privileged operating modes which are used to handle exceptions and supervisor calls which are sometimes called software interrupts The current operating mode is defined by the bottom five bits of the CPSR The interpretation of these modes is summarized in Table 3 2 Where the register set is not the user registers the relevant shaded registers shown below replace the corresponding user registers and the current SPSR Saved Program Status Re
48. 9 name init keyboard func init keyboard interrupt para none ret none modify comment ak eak ak ak ak ak ak eak ak ak ak void init keyboard enable interrupt rINTMOD 0x0 rINTCON 0 1 set EINTI interrupt handler rINTMSK BIT_GLOBAL BIT_EINT1 BIT_EINT4567 214 Embedded Systems Development and Labs The English Edition pISR_EINT1 int KeyboardInt pISR_EINT4567 int Eint4567Isr PORT G rPCONG Oxffff EINT7 0 rPUPG 0x0 pull up enable rEXTINT rEXTINT 0x20 EINT falling edge mode rl ISPC BIT_EINT1 BIT_EINT4567 clear pending bit rEXTINTPND Oxf clear EXTINTPND reg 3 Interrupt Routine A A SF SF SF SF oF F 2 sfe afe afe afe ake ae ae name KeyboardInt func keyboard interrupt handler function para none ret none modify comment keak ak ak ak ak ak ak a ake ake ake sk 2 eak ok ok void KeyboardInt void 1 int value rl ISPC BIT EINTI clear pending bit value key read if value gt 1 1 Digit Led Symbol value Uart_Printf Key is x r value 8 SEG LED is used in the LAB For the related programs please refer to Section 4 6 8 SEG LED Display Lab int 5
49. BX these instructions change the program counter and therefore flush the instruction pipeline Note The state switching between Thumb and ARM doesn t change the processor modes and contents of the registers ARM processor can be switched between the two working states 2 Thumb State Register Set The register set of the Thumb stream 1s a subset of the register set of ARM stream The user can directly use the 8 general registers RO R7 PC SP LR and CPSP Each supervisor mode has its own SP LR and SPSR e The RO R7 in Thumb state is the same as the RO R7 in ARM state e The CPSR and SPSR in Thumb state is the same as CPSR and SPSR in ARM state 93 Embedded Systems Development and Labs The English Edition e The SP in Thumb state is mapped to R13 in ARM state e The LR in Thumb state is mapped to R14 in ARM state e The PC in Thumb state is mapped to PC R15 in ARM state The relationship between the thumb registers and ARM registers is shown in Figure 3 7 3 The as operation in this Lab 1 code 16 32 The operation is used in selecting the current assembly instruction set The parameter 16 will select the Thumb instruction set the parameter 32 will select the ARM instruction set Thumb State ARM State RO 1 RO n F Hr v RI R2 R2 R3 R3 p Low Reg R5 ee R5 R6 R7 MM R7 R8 R9 R10 R11 R12
50. Branch must be performed by an interworking call as either an ARM or Thumb main C function must be supported This makes the code not position independant A Branch with link would generate errors den Eee EE ERG extern main Idr 10 main mov Ir pc bx ro a i P Loop for ever EEEE NASE End of application Normally never occur Could jump on Software Reset B 0x0 end 3 Idscript source code SECTIONS 117 Embedded Systems Development and Labs The English Edition 1 0x0 text text data data rodata rodata bss bss 3 6 7 Exercises 1 Improve the exercise ARM Assembly Instruction Lab 1 in 3 1 Define globe and local variables in the C file Use the linker script file in compiling and linking Use the Disassemble all in the Tools menu to generate objdump file Watch the storage of code and variables in the target output file 2 In the above C language files add embedded assembly language code Implement read write memory using assembly code Primarily master the usage of embedded assembly code 3 7 Assembly and C Language Mutual Calls 3 6 1 Purpose e Read Embest S3CEV40 boot code Watch the boot process of the processor e Learn how to interpret the debug results using Embest IDE debug windows e Learn how to write compile and debug assembly and C language mutual call programs 3 6 2 Lab Equipment
51. Gray Mode Operation Two gray modes are supported by LCD controller within the S3CA4BOX 2 bit per pixel gray 4 level gray scale or 4 bit per pixel gray 16 level gray scale The 2 bit per pixel gray mode uses a lookup table which allows selection on 4 gray levels among 16 possible gray levels The 2 bit per pixel gray lookup table uses the BULEVAL 15 0 in BLUELUT Blue Lookup Table register as same as blue lookup table in color mode The gray level 0 will be denoted by BLUEVAL 3 0 value If BLUEVAL 3 0 is 9 level 0 will be represented by gray level 9 among 16 gray levels If BLUEVAL 3 0 is 15 level 0 will be represented by gray level 15 among 16 gray levels and so on As same as in the case of level 0 level 1 will also be denoted by BLUEVAL 7 4 the level 2 by BLUEVAL 11 8 and the level 3 by BLUEVAL 15 12 These four groups among BLUEVAL 15 0 will represent level 0 level 1 level 2 and level 3 In 16 gray levels of course there is no selection as in the 4 gray levels When the Embest S3CEV40 development board uses 16 level gray scale screen the LCD controller parameter setting can apply the following two rules 1 LCD Panel 320 x 240 16 gray scale single scan mode Data frame start address 0xC300000 offset dot numbers 2048 512 half words Parameter setting is as following LINEVAL 240 1 OxEF PAGEWIDTH 320 x 4 16 0x50 OFFSIZE 512 0x200 198 Embedded Systems Development and Labs The English Edition
52. Li Figure 6 10 Ethernet architecture schematic drawing 2 Types e Ethernet IEEE802 3 using coaxial cable the data transfer rate could be 10Mb s e 100M Ethernet uses twisted pair wire data transfer rate could be 100Mb s e 1000M Ethernet using optical cable or twisted pair wire 3 Work Principles The transportation method in Ethernet is Media Access Control technology that is also called Carrier Sense Multiple Access Collision Detection CSMA CD The following are the descriptions of this technology e Carrier Sense When your computer is trying to send information to another computer on the networks your computer should first monitor if there are information currently transferring on the network or if the channel id idle e Channel Busy If the channel is busy then wait until the network channel is idle e Channel Idle If the channel is idle then transmit the message Because the whole network is being shared the same communication bus all the network station can receive your message but only the network station you selected can receive your message e Collision Detection When a network station is transmitting message it needs to monitor the network channels detects 1f other network station are transmitting messages on the network If yes the messages sent from two stations will be in collision that cause the message be damaged e Stop If there 15 network collision on the network the transmission should stop
53. Main Parameters Model LRH9J515XA External 93 8x75 1x5mm Weight 45g Dimension Picture 320 x 240 Picture Size 9 6cm 3 8inch Color 16 Level Element gradation Voltage 21 5V 25 Width 0 24 mm dot Attach Cable ment connected Embedded Systems Development and Labs The English Edition Figure 5 2 LRH9J515XA STN BW 2 Driver and Display LCD panel has specific driver circuitry The driver circuit provides power lamp voltage and LCD driver logic The display control circuit can be a separate IC unit such as EPSON LCD drivers etc or the LCD driver can be an internal module of the microprocessor The Embest development board uses the on chip S3C44B0X LCD module that includes the LCD controller the LCD driver logic and its peripheral circutry 2 S3C44B0X LCD Controller See the S3C44BOX User s Manual for a complete description S3C44BOX integrated LCD controller supports 4 bit Single Scan Display 4 bit Dual Scan Display and 8 bit Single Scan Display The on chip RAM is used as display buffer and supports screen scrolling DMA direct memory access is used in data transfer for minimum delay Programming according to the hardware could enable the on chip LCD controller to support many kinds of LCD panels The LCD controller within the 3C44BO0X is used to transfer the video data and to generate the necessary control signals The LCD controller block diagram is shown in Figure 5 3 System Bus REGB
54. Management Window and the IDE will open a new dialog box for file selection This is shown in Figure 2 30 Look in D07 explasm debug File name randtest c Files of type Source Files c cpp cc cp ce v Cancel Figure 2 30 Add Source Files to a Project 5 Set Active Project If there are more than one project in the workspace the user can activate any of these projects by right clicking the project and select Set as Active Project This is shown in Figure 2 31 53 Embedded Systems Development and Labs The English Edition ali 5 29 Workspace 5 project s H E term_eb40 files H E term eb42 Build EH term eb55 C New Folder gf term eb63 Add Files to Project Sig Func 8 Fies Figure 2 31 Color Icon and Right Click to Select Active Project 2 4 3 Project Basic Settings 1 Processor Settings Select Project gt Settings The IDE will open a new dialog box Select the Processor page as shown in Figure 2 32 Embest IDE for ARM supports ARM series microprocessor and GNU build tools Project Settings Settings Remote Debug Directory Compiler Assemb 4 gt term eb40 files Cj Source CPU arm7 Endian 2 ASM Source Little Endian C Link Script Support for ARM family term_eb40a files
55. MicroC OS II The Real Time Kernel Second Edition CMPBooks 2002 Todd D Morton Embedded Microcontrollers Prentice Hall 2001 Nimal Nissanke Realtime Systems Pearson Education 1997 Embest Info amp Tech Ltd Embest ARM Teaching System User Manual version2 01 2003 Embest Info amp Tech Ltd Embest S3CEV40 Evaluation Board Manual Embest Info amp Tech Ltd Embest S3CEV40 Evaluation Board Schematics Embest Info amp Tech Ltd Embest IDE User Manual Jingjian Lu Haoqiao Xiao Embedded Processor Classes and Current Status http www bol system com Jingjian Lu Haoqiao Xiao An Overview of 21 Century Oriented Embedded Systems http www bol system com Philips Ltd UDA1341TS_datasheet pdf SAMSUNG Ltd S3C44B0X User s Manual 291
56. Q2 Q3 O4 and the A D conversion 221 Embedded Systems Development and Labs The English Edition PEO R3 9 06 J5 USD LCD amp TSP PD7 PD6 PD5 PD4 PD2 PD1 PDO GNDGND 74 14 10 4 1 Figure 5 25 Touch Panel Circuit 2 Software Design The touch screen related software includes the serial port data transfer program the LCD display program the touch screen calibration and interrupt service routine and other auxiliary programs For the serial port data transfer program please refer to the Serial Port Communication Lab For the LCD display program please refer to the LCD Display and Control Lab The touch screen calibration of this Lab uses two dots diagonal calibration The flow diagram of touch screen control program is shown in Figure 5 26 222 Embedded Systems Development and Labs The English Edition Interrupt Routine Open Q2 Q4 AINI ADC Coordinates Getting X Y Calculation Open Q1 Q3 X Y Range Calibrated Environment Initialization LCD Initialization Interrupt Pressed Routine AINO ADC Coordinates Calculation Output data via serial port and exit ISR Figure 5 26 Touch Screen Software Flow Diagram 5 3 6 Operational Steps 1 Prepare the Lab environment Connect the Embest Emulator to the target board Connect the target board UARTO to the PC serial port with the seri
57. SB8 0 1 1 1 1 OxEFH 1 0 1 1 OxBH SB9 1 1 1 0 1 OxFDH 1 1 0 1 OxDH SB10 1 1 0 1 1 OxFBH 1 1 0 1 OxDH SB11 1 0 1 1 1 OxF7H 1 1 0 1 OxDH SB12 0 1 1 1 1 OxEFH 1 1 0 1 OxDH SB13 1 1 1 0 1 OxFDH 1 1 1 0 OxEH 814 1 1 0 1 1 OxFBH 1 1 1 0 OxEH SB15 1 0 1 1 1 OxF7H 1 1 1 0 OxEH SB16 0 1 1 1 1 OxEFH 1 1 1 0 OxEH 1 1 1 1 1 Initial 1 1 1 1 Initial 4 Key Display Control When a key is pressed the corresponding key value will be displayed on the 8 SEG LED The circuit of 8 SEG LED is shown in Figure 5 14 Refer to Section 4 6 8 SEG LED Display Lab 212 Embedded Systems Development and Labs The English Edition U2 Ul a 74LS573 470E R5 8 LED ND OE 20 470 2 DO 2 19 R8 a a 0 0 m D 4 17 470E R6 _ Q2 5 a D 5 mM 03 16 7 d D4 6 15 R4 470E dp f Jo D4 8 g D 7 ES 5 14 s 15 0 M D 8 EN 71 470 R2 od v5 3 Q6 10 d D 9 12 EDD GND B uu R3 470 vec 74HC14 Figure 5 14 8 SEG LED Control Circuit 2 Software Program Design Write the programs according to the hardware architecture The program includes keyboard interrupt routine key recognition program and key display program The flow diagram of the program is present bellow Interrupt Routine Key Pressed Read Ax is low Environment Initialization Keyboard Data Initialization Recognition Read 1 Display Interrupt
58. SP tl SPE R13 High Reg LR 186814 PC _ PC RI5 CPSR p_a CPSR SPSR SPSR Figure 3 7 Register State Diagram Syntax Format code 16 32 2 thumb as same as code 16 3 arm 94 Embedded Systems Development and Labs The English Edition as ame as code 32 4 align Alignment method Add filling bits to make the current address meet the alignment Syntax Format align alignment fill alignment the alignment method possibly 2 xxx default is 4 fill contents of filling default is 0 max maximum number of filling bits If the number of filling bits exceeds the max the alignment will not process Example align 3 3 5 Operation Steps of Lab 3 3 3 6 Sample Programs 1 Lab A Sample Source Code global start text Start arm header ADR BX NOP thumb Tstart MOV MOV BL stop B stop doadd ADD MOV end r0 Tstart 1 10 rl 3 doadd r0 rO rl pe Ir Subsequent instructions are ARM Processor starts in ARM state so small ARM code header used to call Thumb main program Set up parameters Call subroutine Subroutine code Return from subroutine Mark end of file 95 Embedded Systems Development and Labs The English Edition 2 Lab B Sample Source Code global start text equ num 20 Start
59. Stack Window 9 Register Window 10 and Source Code Window 11 Turpe 1 _ E tie t ww Dot Odd Jods Window tiep gia vm EL nO Ant nain Begin i Seurce int i 9 J Link Script char pt_ste str d tenm_eb Ska m Source 2 Tormimal initialisation terminal 1 usart cesc RUSRARTQ DESC terminal 1 term data amp terminal data 1 terminal 1 53 d rito u int 240538 08 terminal 1 format int lS RSVNC HIDE termed dom handler 4191 ire len J Open terminal at9 1 treninel oger 5terminal 1 Tranzmdt tr ur i i trlen str tert i at terninzI witecbterrinal 1 85tr testpip executes refresh refresh help display ii disase disassent rese reset tari T step step stat stop Stop targ Y 1 gt x E 18 97 ES 18 pt str 2006 7 Fe ES 18 9r 33 CS 19 r 6120 FF 1 20 FF sor TF 5 5 00 00 T veglict list all ez on X reqread display SR AA vequrite set regis er no A display m s 37 m wite to i rS w pos Figure 2 26 Embest IDE Main Window 2 4 2 Project
60. Systems Development and Labs The English Edition 3 ADC Data Register ADCDAT ADCDAT A D converter output data value 2 A D Conversion Time When the system clock frequency is 66MHz and the prescaler value is 20 the total 10 bit conversion time is the following 66 MHz 2 20 1 16 at least 16 cycle by 10 bit operation 98 2 KHz 10 2 us NOTE Because this A D converter has no sample and hold circuit the analog input frequency should not exceed 100Hz for accurate conversion although the maximum conversion rate is 100KSPS 3 Programming the ADC e The ADC conversion error is decreased if the ADCPSR 1 large in comparison to the above ADC conversion time If you want accurate ADC conversion the ADCPSR should be as large as possible e Because our ADC has no sample amp hold circuit the input frequency bandwidth is small 0 100Hz e Ifthe ADC channel is changed a channel setup time min 15us is needed e After the ADC exits the sleep mode the initial state is the sleep mode there is 10 wait needed for the ADC reference voltage stabilization before the first AD conversion can take place e Our ADC has ADC start by read feature This feature can be used for DMA to move the ADC data to memory 5 3 5 Lab Design 1 Touch Panel Circuit Design The touch panel circuit is shown in Figure 5 25 When the touch panel is pressed the CPU will receive an interrupt signal The interrupt service routine will process the Q1
61. Task3 void amp Id3 amp Stack3 STACKSIZE 1 4 OSTaskCreate Task4 void amp Id4 amp Stack4 STACKSIZE 1 5 ARMTargetStart Delete current task OSTaskDel OS_PRIO_SELF void Main void int argc char argv 1 char 140 4 ARMTargetInit needed by uC OS OSInit OSTimeSet 0 create the start task OSTaskCreate TaskStart void 0 amp StackMain S TACKSIZE 1 0 start the operating system OSStart 284 Embedded Systems Development and Labs The English Edition 7 3 4 Lab Exercise Using the examples presented so far in this chapter implement an intruder alarm application using the uC OS II kernel The following describes the intruder alarm application Intruder Alarm Description An intruder alarm system receives information about the state of the monitored building from a number of sensors located at every possible entrance and exit Sensors function basically as switches indicating whether a given sensor has detected an intruder or not The alarm is located inside the building It is set armed and reset disarmed from inside the building A digital code of fixed length is required for both setting and resetting the alarm One of the entrances which also functions as an exit 15 nominated as the entrance and the exit after the alarm has been set Timing information 1 crucial for proper functioning of an intruder alarm When the alarm is initially set a specific
62. Views Syitem Views Execute ai ie REG Fifty Int 2 Loc One Fifty Int i Loc char Pa Ri numealion Enum Pa Enumeration Enua_Loc fec Ponte Pu Pet Str_30 Str i Loc m 10 Str 30 Str 2 Loc neni int m Furc Sv Pa Pel ch 3 6 Horsen oR oe m Proc IAec Ponte Py Val Par Proc GiEnumetabon Erum Val Initiolizetions Ptr Glob Rec Pointer malloc sizeof Rec Type Ptr Glob Rec Pointer malloc sizeot Rec 81 82 83 84 85 85 87 88 89 90 91 33 Ptr Glob Ptr Coap Wext Ptr Glob 35 Ptr Glob Discr Ident 1 96 Ptr Glob variant var 1 an Dap 97 Ptr_Glob varient var 1 Int Comp 98 stropy Ptr Glob variant var 1 Str cum 35 PROGRAM SOME STRING 190 strepy Str 1 Loc DHRYSTONE PROGRAM 1 STRING i rr 2 Glob 8 7 gt 10 103 as HUE program Without statenent 104 rad 2_Glob TOR salsa 105 a Warning Vith 16 Bit processors and Muaber Of Rune gt 32000 ds overflow may occur tor this array element 1i H 108 ut 112 LH printf n Print Drystan Benchmark Version 2 1 Language C n printf af det 4 04 00 00 DA 17 00 00 EA 01 00 67 E2 FF OO OO F2 m 4 00 70 AO E1 F6 EA 43 10 AO 07 00 Ei p oyy CO AQ 4 E4 FE 60 10 DD ES 01 00 50 Ei OC OO OO
63. Width The data bus width of BANKO nGCSO should be configured as one of 8 bit 16 bit and 32 bit Because the is the booting ROM bank mapped to 0x0000 0000 the bus width of BANKO should be determined before the first ROM access which will be determined by the logic level of OM 1 0 at Reset 134 Embedded Systems Development and Labs The English Edition Table 4 2 Big Samll Endian ENDIAN Input Reset ENDIAN Mode Table 4 3 Bus Width Selections OM1 Operating Mode 1 Operating Mode 0 Booting ROM Data width EET k Test Mods 3 Memory Controller Specific Registers Memory Controller Specific Registers includes Bus Width amp Wait Control Register BWSCON Bank Control Register BANKCONn nGCS0 nGC55 Refresh Control Register Banksize Register SDRAM Mode Register Set Register MRSR shown in Table 4 4 to Table 4 8 The format of Bus Width amp Wait Control Register BWSCON is shown in Figure 4 2 Table 4 4 Bus Width amp Wait Control Register BWSCON Register Description Reset Value BWSCON 00180000 Bus Width amp Wait Status Control Register 0x000000 135 Embedded Systems Development and Labs The English Edition awscon ee Description mansus 31 This bit determines SRAM for using UB LB for bank 7 0 Not using UB LB Pin 14 11 is ded
64. address Execute program from C Auto download 000 C Don t care Command script N Download address Execute until xamples Samsung S3CEV40 common ev40boot cs EI C Program entry point Figure 4 5a Debug settings for the project 4 Watch the hyper terminal output The following should be displayed Embest 44B0X Evaluation Board S3CEV40 LED Test Example 5 The LED1 and LED2 will be in the following states LED2 LEDI and LED2 on LED2 off gt LED off 4 2 6 Sample Programs oR oR oF oF oF F SF SF SF SF SF SF af ae oR R R File Name light c Author embest Description control board s two LEDs on or offf History oF e oi F SE ie sk SF SE oe oe k k k eak ak ak ak ak ak ak ake ak SF SF SF ak tele de include files include 44b h include 44blib h global variables int led_state LED status function declare void Led Test LED test void leds on allledson void leds off all leds off void ledl on led 1 on s void ledl off ledloff 149 Embedded Systems Development and Labs The English Edition void 2 on led 2 on voidled2 off led2off void Led D
65. are currently using the ARM processors Among them 19 of the 20 largest semiconductor companies are developing chips based on the ARM architecture These semiconductor companies include TI Philips Intel etc The excellent processor performance and the punctual marketing enabled ARM to get tremendous resources These resources greatly accelerated many kinds of system chips developed for different applications ARM has already established its lead position in the embedded technologies and the ARM technologies are being widely used ARM has gained great success in the field of high performance embedded applications and the number one position in 32 bit embedded applications in the world In 2002 ARM processors occupied 79 5 of 32 bits and 64 bit microprocessor market in the world There were 20 billion ARM cores used by 2002 Nowadays ARM processors are almost in everybody s pocket Embedded Systems Development and Labs The English Edition because almost all of the mobile phones PDAs are developed based on ARM cores As a result in order to keep up with the modern embedded technologies people need to study the embedded development technologies that are based on 32 bit ARM processors and also need to study its development environment and platform technologies If integrated circuit and related technologies are the drivers of PC development that have increased the IT technologies in the last twenty years we could say that besides the PC technologies
66. can treat the solid state hard disk and the USB port together as a U disc The user can also store his program and data on the solid state hard disk The solid state hard disk practical application includes e Stores the gathered data on the solid state hard disk and upload these data to PC through USB for backup and analysis purposes e Save certain system parameters in the solid state hard disk and make real time revision when the system is running Protect data when electricity drops e When system source code quantity is extremely large and unable to run in 2M FLASH memory the system source code can be stored in the solid state hard disk When the system is powered a start up code in the FLASH memory can load the code in the SDRAM This function is extremely useful when running big operation system applications D 7 0 1 0 7 0 NXDACKO R B NXDREQO CE PF6 ALE PFS CLE nWE gt RUE CS2 RE 44B0X K9F2808 Figure 2 21 Solid State Hard Disc Circuit Diagram 10 IDE Interface This port is a general 8 bit 16 bit bus extension port It can connect with hard disk or CF card compact Flash card as well as the user s own expanded peripheral components When the port is connected to the hard disk or CF card LED_D4 hard disk working indicator lamp is on This port occupies three chip select signals CS3 CS4 and CS5 and two external interrupts EXINT4 EXINT5 11 LCD and TSP Circuits Because 44BOC chip
67. cesped Routine Key Value 213 Embedded Systems Development and Labs The English Edition Figure 5 15 Flow Diagram 5 2 6 Operation Steps 1 Prepare the Lab environment Connect the Embest Emulator to the target board Connect the target board UARTO to PC serial port with the serial cable provided by the Embest development system 2 Run the PC Hyper Terminal set to 115200 bits per second 8 data bits none parity 1 stop bits none flow control 3 Connect the Embest Emulator to the target board Open the Keyboard Test ews project file found in the Keyboard Test sub directory of the Examples directory After compiling and linking connect to the target board and download the program 4 Watch that the hyper terminal output is the following Embest 44B0X Evaluation Board S3CEV40 Keyboard Test Example Please press one key on keyboard and look at LED 5 User can press keys on the 4 x 4 keyboard The 8 SEG LED will display the results 6 After understanding and mastering the lab finish the Lab exercises 5 2 7 Sample Programs 1 Variable Initialization The external interrupt 1 is used in hardware The related variables interrupt controller registers etc should be initialized in the program volatile UCHAR keyboard base UCHAR 0x06000000 define KEY VALUE MASK 0x0f 2 Keyboard Inicialization SF SF SF SF SF aie
68. debugging 3 After understanding and mastering the Lab B do the exercises at the end of the Lab 2 90 Embedded Systems Development and Labs The English Edition 3 2 6 Sample Programs of Lab 2 1 Sample Program of Lab A S C Examples Samsungasmi Lab2A Lab2A s ox global _start text equ num 20 number of words to be copied start LDR LDR MOU blockcopy MOUS BEQ STHFD octcopy LDMIA STHIR SUBS BNE LDHFD copywords ANDS BEQ wordcopy LDR STR SUBS BNE long end rB src r1 dst r2 sp 6x466 r3 r2 LSR 3 copywords spt rh r11 r8 r4 r11 rit r4 r11 r3 r3 1 octcopy spt r4 r11 r2 r2 7 stop r3 r8 4 r3 ri 4 F2 F2 41 wordcopy stop 8 pointer to source block r1 pointer to destination block r2 number of words to copy x set up stack pointer r13 x S set the flags R2 8 branch if less than 8 words to move save the working registers load 8 words from source block and put them at the destination x decrement the counter x more x don t need these now restore originals number of odd words to copy No words left to copy copy a word from the source x store a word to the destination x decrement the counter copy more x 1 2 3 5 5 6 7 8 9 10 11 12 13 15 15 16 17 18 19 28 8 8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 G 91 Embedded System
69. ea eae enean 145 4 2 4 Principles of the Lab a 145 42 5 Operation Steps scc eet ee ede Re ro es 148 42 6 Saniple Programs x n ive ah teo 149 LIU Cup Mm 153 Inter ere exce cc eei c uite 153 Ai 3 PULP OSE 2 25 ettet aetates Sorte vitem Sem tei tens 153 4 3 2 Eab Equipiment etse ad ie he 153 Embedded Systems Development and Labs The English Edition 4 3 3 Content of the Lab 153 4 3 4 Principles of the 154 4 3 5 Operation Steps sss 161 4 357 165 4 4 Serial Port Communication Lab neret neret eterne 165 44 1 P rpose eoe piene E OE ERE DRE EO EUR TOR EUER Iesv aet 165 4 42 Lab Equipment Z au sn lu n edu 165 4 4 3 Content of set baa u wa aa aw ia N 165 4 44 Principles of the Bab S u S 165 4 4 5 Operation Steps isses eene pee eii eris 171 4 5 6 Sample Programs cccccesccsesscesseeeeseeeececescecseseceeseeenseecssceeseecseeeseseeesseseneeenseeensaeensaees 171 176 4 5 Real Time Timer suya asa e ree e eR e NER NEEDS 176 4 5 1 PUTOS na eee eee ERO EO EGO EUH 176 4 5 2 Lab EguIpinentu sa a su a l SS u a Su DOS SQ un innen enne nnne nnn ent
70. er 1187865 C Big Endian Source 2 ASM Source C3 Link Script CPU Peripheral term eb4 2 files C3 Source Family ARM7 Maker ATMEL a pe ey Member ARM7 Chip ars1M63200 gt term ebb55 files 3 Source 29 ASM Source Build Tools J Link Script GNU Tools for ARM Source of b AAA oA m m m BE mm Figure 2 32 Processor Settings Dialog 2 Emulator Settings 54 Embedded Systems Development and Labs The English Edition Select Project Settings The IDE will open a new dialog box Select the Remote page shown in Figure 2 33 x Settings For Processor Remote Debug Directory Compiler Assemb gt Workspace interrupt 42 N Remote device interrupt files C ARM C Source Files amp 3 ASM Source Files Embest JTAG emulator for amp C3 Link Script er 1122361 B interrupt flash files 9 ARM C Source Files aA ASM Source Files Speed H A Link Script z Communication type PARALLEL LPT1 C LPT2 OK Cancel Figure 2 33 Emulator Connection Settings Dialog If the software emulator is used the Simarm7 should be selected If Power ICE is used the PowerlceArm7 should be selected If a parallel port cable is used in connecting PC and ICE Parallel Port should be selected Only the emul
71. files It is based on the UDP protocol It supports user receive send files from to a remote host computer This protocol is suitable only for small files It doesn t have same functions as the FTP protocol It can only receive or write files from to the host server computer It can t list file directory no verification it only transfers 8 bit type data Because TFTP uses UDP and UDP uses IP and IP can communicate using other methods a TFTP data package includes the following segments local header IP header data package header TFTP header and the TFTP data The TFTP doesn t specify any data in the IP header but it uses UDP source and target address and length The TID used in TFTP is a port number that must be within 0 65535 range The initial connection needs to send WRQ Write Remote Request or RRQ Read Remote Request and receive an acknowledgment message a definite data package or the first data block Normally an acknowledgment package includes a package number Every data package has its block number The block number start from 0 and the numbers are continuous The WRQ is a special package and its block number is 0 If the receiver receives a wrong package the received package will be rejected When a connection is created the two communicating parts will randomly select a TID Because the selection is random the chance of the same TID is very small Each package has two IDs one is for the sender and the other is for the receiver In the
72. first request the package will be sent to port 69 of the receiver host When the receiver host sends an acknowledgment it will use a selected TID as the source TID and use the TID in the former package as its target TID These two IDs will be used in the entire process of communication After the connection is created the first data package with series number 1 will be sent from the host Later on the two hosts must guarantee to communicate with the specified TIDs If the source ID 1 not the same as the specified ID the data package will be thrown away as a message that is being sent to a wrong address For more detailed information about TFTP please refer to related RFC documentation 3 Development Methods of Network Application Programs There are two methods of developing network application programs One is by using the BSD Socket standard interface Using this method the programs can be ported to other systems The other method is by using directly the transmission layer interface This method is more efficient 1 BSD Socket Interface Programming Methods Socket is a programming method of communicating to other programs via standard FD Each socket uses a half related description protocol local address local port A completed socket uses a completed description protocol local address local port remote address remote port Each socket has a local number that is specified by the operating system Socket has three types 252
73. from the new task s stack Execute a return from interrupt instruction Note that OSStartHighRdy never returns to OSStart 2 OSCtxSw function This function is responsible for the context switch OSCtxSw is generally written in assembly language because most C compilers cannot manipulate CPU registers directly from C This function is responsible for pushing the registers of the current task on the stack changing the SP to the new stack value restore the registers of the new task execute and return from the interrupt instruction This function is called by OS TASK SW which in turn is called by the OSSched function OSSched function is responsible for scheduling the tasks 3 OSIntCtxSw function This function is called by OSIntExit function to perform a context switch from an ISR OSIntExit is called by OSTickISR function Because OSIntCtxSw is called from an ISR it is assumed that all the processor registers are already properly saved onto the interrupted task s stack OSIntCtxSw function responds for switching the tasks in timer interruptions The OSCtxSw function and OSIntCtxSw function are responsible for the switching between tasks OSIntCtxSw function is responsible for saving the current task pointer and recover the register values from the stack 271 Embedded Systems Development and Labs The English Edition 4 OSTIcKISR function is a time tick function generated by the timer interrupt OSTickISRQ i
74. host must know the hardware address network card physical address of the target host Address resolution is a process that maps the host IP address to the hardware address Address Resolution Protocol ARP is used to get the hardware addresses in the same network The local network resolution process is as following 1 When host needs to communicate with another host it initializes an ARP request If the IP protocol has identified its local IP address the source host will check out the hardware address of the target host from the ARP buffer 2 Ifthe target address of the target host mapping cannot be found the ARP protocol will broadcast the source host IP address and hardware address hosts in the network will receive this request via 251 Embedded Systems Development and Labs The English Edition multicasting and process the request 3 Every host in the network receives the muticast request and searches for the corresponding IP address 4 When the target host finds that the IP address broadcasted is the same as its own IP address the target host will send an ARP reply to inform its hardware address to the source host The target host also updates its ARP buffer with the source host IP address and hardware address The source host will establish a communication after receives the reply For more detailed information about ARP please refer to related RFC documentation 6 TFTP Protocol TFTP is a simple protocol for transferring
75. imi 66666636 03 62 68 82 92 82 64 37 83 h d7 8888883F 02 E4 18 66 01 AS 61 88 88 a 66666648 56 68 66 66 58 Bee ere x 88888851 18 66 61 88 FE FF 66 88 I Bis Sire dee 6666665A FF FF ra 92 A8 83 HE nnnnnn a A nn AA AA AA AA zi Figure 2 64 Memory Window The user can modify the address from the pull down menu at the top of the Memory Window The pull down menu can record 10 start addresses as shown in Figure 2 65 73 Embedded Systems Development and Labs The English Edition z Address 6x 62 6662 66 626661 66 9 02000300 82 8881 89 8x 62666466 82888112 09x 02088065 68 Figure 2 65 Memory Start Address Pull Down List 5 Data Watch Window Select View Debug Window Watch item and the Data Watch Window will be open The Data Watch Window is used to display variables or expressions that the user wants to watch This is shown in Figure 2 66 Oxed Oxe N Ox4234 Ox1c44 Ox4a059024 Oxelecle39 Oxfdfbdffb uli OxTfefd53T un test O0x203ffd8 Lost test Ox9c6550f6 5 0x11 sin b 0 8657287040 Figure 2 66 Data Watch Window 6 Variable Window Select View Debug Window Variables and the Variable Window will be open The Variable Window is used to display the values of global or local variables as shown in Figure 2 67 7A Embedded Systems Development and Labs The English Edition Variables test_str
76. immediately and a collision signal should be sent to the network to let other stations know the collision has happen e Multiple Access If the network station encountered collisions and stop transmission it should wait for a while and return to the first step start the carrier sensing and transmission until the data 15 successfully transmitted the network stations are transmitting messages through the above 6 steps Because at the same time there is only one network station transmitting messages and other stations can only receive or wait the collision chances are increase when more network station added to the network The network stations will alternately follow the process monitor transmit stop transmit wait retransmit 4 Ethernet IEEE 802 3 Frame The frame structure of the Ethernet IEEE 802 3 protocol is shown in the following figure 243 Embedded Systems Development and Labs The English Edition Field Length in Bytes n Ethernet 8 6 6 2 46 1500 4 Destination Source Preamble Panas Data FCS Address Address Field Length n Bytes A Byte IEEE 802 3 7 1 6 2 46 1500 4 T T t So 202 2 Preamble O Destination Source Length 802 2 Header FCS Address Address and Data SOF Start of Frame Delimiter 7 FCS Frame Check Sequence Figure 6 11 Ethernet 802 3 Frame Architecture Preamble consists of alternative 0 and 1 that informs network stations to get ready The IE
77. is generated the pending bit will be set If the global mask bit is set to 1 the interrupt pending bit will be set but all 154 Embedded Systems Development and Labs The English Edition interrupts will not be serviced 2 Interrupt Sources Among 30 interrupt sources 26 sources are provided for the interrupt controller Four external interrupt EINT4 5 6 7 requests are OR ed to provide a single interrupt source to the interrupt controller and two UART error interrupts UERRORO 1 use the ORed configuration NOTE EINT4 5 6 7 share the same interrupt request line Therefore the ISR interrupt service routine will discriminate these four interrupt sources by reading the EXTINPHD 3 0 register EXTINPND 3 0 must be cleared by writing a 1 in the ISR after the corresponding ISR has been completed Table 4 19 mamme 3 Vectored Interrupt Mode Only for IRQ S3C44BOX has a new feature the vectored interrupt mode in order to reduce the interrupt latency time When the ARM7TDMI core receives the IRQ interrupt request from the interrupt controller ARM7TDMI executes the instruction located at address 0x00000018 In vectored interrupt mode the interrupt controller will load branch instructions on the data bus when ARM7TDMI fetches the instructions at 0x00000018 The branch instructions let the program counter be a unique address corresponding to each interrupt source 155
78. operation R W 1 Addr device page and address 236 Embedded Systems Development and Labs The English Edition START AG P amp R Add ACK P amp R DATA nByt ACK STOP C Note P amp OPADDR R 1010xxx higher 7bit Start read operation again 6 1 5 Lab Design 1 Program Design The flow diagram of IIC program is shown is Figure 6 8 Configure to Master TX Mode Writing address to IICDS Stop master mode Writing data to address IICDS Clear interrupt flag Data shift to SDA IICSTA write to OxDO Clear interrupt flag Wait for Figure 6 8 IIC Program Flow Diagram 237 Embedded Systems Development and Labs The English Edition 2 Circuit Design In the Embest S3CEV40 the S3C44B0X on chip controller is the master and the AT24C04 EEPROM is the slave The circuit design is shown in Figure 6 9 U18 AT24LC04 AO VDD p vpp33 0 7 Al WP 2 SCL IICSCL GND uM GND Figure 6 9 AT24C04 EEPROM Control Diagram 6 1 6 Operational Steps 1 Prepare the Lab environment Connect the Embest Emulator to the target board Connect the target board UARTO to the PC serial port using the serial cable provided by the Embest development system 2 Run the PC Hyper Terminal set to 115200 bits per second 8 data bits none parity 1 stop bits none flow control 3 Connect the Embest Emulator to
79. port It is used for monochrome and color displays 2 LCD Controller Time Sequence The LCD Controller Time Sequence is shown is Figure 5 4 i First Line Check amp Data Timing VFRAME zn i 1 V M 1 1 VLINE VCLK VD 7 0 VDLY Figure 5 4 LCD Controller Time Sequence 3 Supported Scan Modes The scan mode of S3C44B0X LCD controller can be set through DISMOD LCDCON1 6 5 The selection of scan mode is shown in Table 5 3 DISMOD 6 5 00 01 10 11 4 bit dual 4 bit single 8 bit single Mode display Not used scan scan scan Table 5 3 Scan Mode Selections 1 4 bit Single Scan the LCD controller scan line is started from the left top corner of the LCD panel The displayed data is VD 3 0 The correspondence between the VD bits and the RGB color digits is shown in Figure 5 5 193 Embedded Systems Development and Labs The English Edition Figure 5 5 4 bit Single Scan 2 4 bit Dual Scan The LCD controller uses two scan lines for data display The higher scan display data is available from VD 3 0 The lower scan display data is available from VD 7 4 The correspondence between the VD bits and the RGB color digits is shown in Figure 5 6 VD2 VD1 vDO vD2 VD1 R1 G1 B1 R2 2 B2 G3 VD vD6 vD5 vD4 VD7 vD6 vD5 vD4 R1 G1 B1 R2 G2 2 Figure 5 6 4 bit Dual Scan 3 8 bit Single Scan the LCD
80. sockaddr amp their addr amp addr_len 1 1 perror recvfrom exit 1 b printf got packet from s n inet_ntoa their_addr sin_addr printf packet is 9od bytes long Wn numbytes buf numbytes 0 printf packet contains V 9osV An buf close sockfd 255 Embedded Systems Development and Labs The English Edition 2 Transmission Layer Specific Interface Programming Methods Network protocols can provide specific function call interfaces for higher layer interlayer protocols applications Users can call the specific interfaces provided by the protocol source code to implement a fast data transfer The Embest development board provides TFTP protocol specific interface functions The user can use this interface to receive data from the host computer The main interface functions are the following e TftpRecv int receives data The network library automatically finishes the connection process The maximum length of each reception is determined by len parameter Before the function returns the len will be changed by actual length of received data The function returns a pointer value to the first address of data If it returns Null it means that a communication error has happed e MakeAnswer Every time after the data has been processed this function should be called in order to send a acknowledge signal to the host The receiving of the ACK will allow the transmission to continue 6 2 5 Operat
81. supports external power supply This is important for debugging devices such as mobile phones battery power supply devices etc The following are the advantages of the Multi ICE emulation e Rapid download and single step program execution e User controlled input output at bit level e Programmable JTAG bit transfer rates 25 Embedded Systems Development and Labs The English Edition e Open interface support for non ARM cores and DSPs e Multiple debuggers can be connected to the network e Target board power supply or external power supply 1 4 How to Study Embedded System Application Development Based on ARM First the readers need to study the basic knowledge related to the microprocessor organization and interfacing Flash SRAM SDRAM Catch Timer GPIO Watchdog USB etc understand one CPU architecture understand operating system basics interrupt priority inter task communication and synchronization etc For programming readers need to master C C and assembly language programming at least C language programming understand microprocessor architecture instruction set programming modes application development etc Secondly the student of embedded system development needs a good development platform Also good development system with basic examples and typical real life application are essential 26 Embedded Systems Development and Labs The English Edition Chapter 2 Embest ARM Lab Devel
82. system a 1 3 1 ARM SDT it eite Pet eiit eere EERE ede eine ES ADS S entera HER EU UR ENDE UM EE UR t S E kra Mut 2000 LIA Embeds IDE TEARM oss s io eire et e reg epe c oe ee avene A Pe e AR enean 1 3 5 OPENice32 A900 nnne nne tree enne nennen ens 1 3 6 Multi ICE 1 4 How to Study Embedded System Application Development Based on ARM Chapter 2 Embest ARM Lab Development system 27 2 1 An Overview of the Lab Development 2 2 1 1 The Embest IDE iaa ri eR ORE REI Rs 2 1 2 Embest Emulator for ARM nente nennen eterne ens 22193 Flash Pro Crammer aora 2 1 4 Embest S3CCEVA0 Development Board essen 2 1 5 Connection Cables and Power Adapters ener 2 2 The Installation of Lab Development system sess 2 2 1 The Installation of Embest IDE u uM a R 2 2 2 The Installation of Flash Programmer eene enne 2 2 3 The Interconnection of Software and Hardware Platforms 2 3 Lab Development system Hardware Circuits a 2
83. the system is in the sleep mode panel not touched Q4 Q2 and are closed and Q1 is opened When the screen is touched X axial surface resistance and Y axial surface resistance is opened at the touching point Since the resistance value is very small about several hundred ohms a low level signal is generated at EXINT2 which results into interrupt MCU causes Q2 Q4 to be opened and Q1 Q3 to be closed by controlling the I O port S3C44B0X A D converter channel AINI reads X axis coordinates then closes Q2 Q4 and causes Q1 Q3 to pass S3C44B0X A D converter channel AINO reads Y axis coordinates When the system reaches the coordinate value Q4 Q2 Q3 are closed and Q1 is opened The system returns to original state waiting for the next touch TSP occupies 44B0X external interrupt EXINT2 as well as 4 general I O ports PE4 PE7 EXINT2 Figure 5 19 The equivalent circuit when touching the screen 2 A D Converter Circuit The 10 bit CMOS ADC Analog to Digital Converter of the S3C44B0X controller consists of an 8 channel analog input multiplexer auto zeroing comparator clock generator 10 bit successive approximation register SAR and an output register This ADC provides software selection power down sleep mode Figure 5 23 shows the functional block diagram of S3C440BX A D converter The ADC conversion features are Resolution 10 bit Differential Linearity Error 1 LSB Integral Linearity Erro
84. the current receive buffer to the last page of the buffer 2 IP Network Protocols TCP IP protocol is a group of protocols including TCP Transmission Control Protocol and IP Internet Protocol UDP User Datagram Protocol ICMP Internet Control Message Protocol etc TCP IP was first time introduced in 1973 by two researchers at Stanford University At that time the US ARPA Advanced Research Project Agency planed to implement interconnections between different networks ARPA aided the research and development of inter network connections In 1977 1979 the TCP IP architecture and standard was developed and is almost the same as the current TCP IP architecture Around 1980s the US DARPA started to port all the machines to the TCP IP network From 1985 NSF National Scientific 246 Embedded Systems Development and Labs The English Edition Foundation started to support TCP IP research and gradually played an important role NFS aided the establishment of the global Internet network and used TCP IP as its communication protocol 1 Architecture TCP IP is a four layers protocol Every layer is independent and has its own specific function The TCP IP layer structure is shown in Figure 6 13 Application Layer Layer 4 Transmission Layer Layer 3 Internet Layer Layer2 Network Interface Layer Layer 1 Figure 6 13 TCP IP Layered Protocol e Network Interface Layer Responsible for receiving and sending physical frames This layer def
85. the other tasks will not be blocked to wait for the display 7 3 3 Stopwatch Implementation Code Open the Workspace for the project ucos_44b0_200 ews found in the Samsung ucos_1i directory Study and understand the stopwatch implementation presented in this section Specifically understand the main c file The main function and all of the required task functions used in the start stop watch implementation are found in this file main c file include includes h uC OS interface include Sems h Semaphore task stack size ifdef SEMIHOSTED define TASK STACK SIZE 64 SEMIHOSTED_ STACK NEEDS else define TASK STACK SIZE 10 1024 endif Task definition allocate memory for tasks stacks define STACKSIZE 128 Global Variable unsigned int Stack1 STACKSIZE unsigned int Stack2 STACKSIZE unsigned int Stack3 STACKSIZE unsigned int Stack4 STACKSIZE unsigned int StackMain STACKSIZE void Task1 void Id 1 281 Embedded Systems Development and Labs The English Edition print task s id OSSemPend UART sem 0 amp err uHALr printf Task c Called n char Id OSSemPost UART sem while 1 1 on led2 off OSTimeDly 800 ledl off led2 on OSTimeDly 800 void Task4 void Id int i INT32U NowTime print task s id OSSemPend UART sem 0 amp err uHALr printf Task c Called n char Id OSSemPost UART sem
86. the portable mobile and Internet related embedded Internet information processing devices will be the main drivers that will enable a Post PC time becomes true in the next few decades Currently the embedded Internet is merely limited to some applications such as mobile business intelligent electronic home devices control and intelligent devices etc With the development of related technologies embedded technology will be developed more and more at an unimaginable speed with more complex applications The area of embedded applications will be expanded and the embedded systems and applications will be more valuable to the society Currently the Wintel Microsoft an Intel federation established at early 90s has dominated the computer industry With the development of information technology and network technology the embedded technology will make this monopoly not exist in the Post PC time Embedded System will be the main portion of non PC devices Current Status of Embedded System Tools for Teaching and Development Human resource is the key of developing embedded system technology Enhancing the embedded technology teaching in the universities is to provide the embedded development human resources On the other hand the existing engineering staffs in the companies are also needed to be trained by modern embedded technology The engineering staffs in companies welcome the embedded system training courses that are based on ARM To this point establi
87. the target board Connect the target board UARTO to PC serial port using the serial cable that comes with the Embest development system 2 Run the PC Hyper Terminal set to 115200 bits per second 8 data bits none parity 1 stop bits none flow control 3 Connect the Embest Emulator to the target board Open the test ews project file located in XEmbestIDE Examples Samsung S3CEVAOWRTC test directory After compiling and linking connect to the target board and download the program 4 Watch the main window of the hyper terminal the following information is shown RTC Working now To set time Y N y 5 User can select for timer settings When a wrong item 15 introduced a prompt will ask to input it again The prompt information is as following Current day is 200d 1e 27 TUE To set day yy mm dd w 2003 11 07 5 Current time is 1f 08 18 To set time hh mm ss 15 10 00 6 At last the hyper terminal will display 2003 11 07 FRI 15 10 14 7 After understanding and learning the contents of the lab perform the Lab exercises 4 5 7 Sample Programs 1 Environments and Function Declare char RTC_ok int year int month day weekday hour min sec 180 Embedded Systems Development and Labs The English Edition int Test Alarm void void Rtc Init void void Read Rtc void void Display Rtc void void Test Rtc Tick void void Rtc Int void _ attribute interrupt IRQ voi
88. the target board Open the IIC Test ews project file found in the IIC Test sub directory in the Example directory After compiling and linking connect to the target board and download the program 4 Watch the hyper terminal The sample program write read data to from the same address and compare the results If write read is successful the following will be displayed Embest 44B0X Evaluation Board S3CEV40 IIC operation test example test using AT24C04 Write char 0 f into AT24C04 Read 16 bytes from AT24C04 0 1 2 3 4 5 6 7 8 9 a b c d e f If read write has error the following will be displayed Embest 44B0X Evaluation Board S3CEV40 IIC operation test example test using AT24C04 Write char 0 f into AT24C04 Read 16 bytes from AT24C04 f f f f f f f f f f f f f f f f 5 After understanding and mastering the lab finish the Lab exercises 238 Embedded Systems Development and Labs The English Edition 6 1 7 Sample Programs 1 Initialization Program define rIICCON volatile unsigned 0x1d60000 define rIICSTAT volatile unsigned 0x1d60004 define rIICADD volatile unsigned 0x1d60008 define rIICDS volatile unsigned 0x1d6000c S3C44B0X slave address rIICADD 0x10 Enable ACK interrupt ICCLK MCLK 16 Enable ACK 64Mhz 16 15 1 257Khz rIICCON O0xaf enbale TX RX rIICSTAT 0x10 2 Interrupt Declaration enable interrupt pISR IIC unsi
89. the user reads the registers from BCDYEAR to BCDMIN and the result is is 1959 Year 12 Month 31 Date 23 Hour and 177 Embedded Systems Development and Labs The English Edition 59 Minute If the user reads the BCDSEC register and the result is a value from 1 to 59 Second there is no problem but if the result is 0 sec the year month date hour and minute may be changed to 1960 Year 1 Month 1 Date O Hour and 0 Minute because of the one second deviation that was mentioned In this case when BCDSEC is zero the user should re read from BCDYEAR to BCDSEC 2 Backup Battery Operation The logic can be driven by the backup battery which supplies the power through the RTCVDD pin into RTC block even if the system s power is off When the system is off the interfaces of the CPU and RTC logic are blocked and the backup battery only drives the oscillator circuit and the BCD counters in order to minimize power dissipation 3 Alarm Function The generates an alarm signal at a specified time in the power down mode or normal operation mode In normal operation mode the alarm interrupt ALMINT is activated In the power down mode the power management wakeup PMWKUP signal is activated as well as the ALMINT The RTC alarm register RTCALM determines the alarm enable disable and the condition of the alarm time setting 4 Tick Time Interrupt The tick time is used for interrupt request The TICNT register has a
90. transmitter mode Slave receiver mode In the Master Transmitter Mode the microprocessor communicates to the serial devices via IIC bus using the following registers 1 MULTI MASTER IIC BUS CONTROL REGISTER IICCON IICCON 0 01060000 IIC Bus control register Acknowledge 7 IIC bus acknowledge enable bit enable 1 O Disable ACK generation 1 Enable ACK generation In Tx mode the IICSDA is free in the ack time In Rx mode the IICSDA is L in the ack time Tx clock source Source clock of IIC bus transmit clock prescaler selection bit selection 0 IICCLK faci 16 1 IICCLK factk 512 Tx Rx Interrupt IIC Bus Tx Rx interrupt enable disable bit enable 0 Disable interupt 1 Enable intemupt Interrupt pending IIC bus Tx Rx interrupt pending flag flag 2 3 Writing 1 is impossible When this bit is read as 1 the IICSCL is tied to L and the IIC is stopped To resume the operation clear this bit as 0 1 No interrupt pending when read 2 Clear pending condition amp Resume the operation when write 1 1 Interrupt is pending when read 2 N A when write Transmit clock IIC Bus transmit clock prescaler Undefined value 4 IIC Bus transmit clock frequency is determined by this 4 bit prescaler value according to the following formula Tx clock IICCLK IICCON 3 0 1 2 MULTI MASTER CONTROL STATUS REGISTER IICSTAT 234 Embedded Systems Development and Labs The English Edition IICSTAT 0
91. 00 C Don t C Auto download C Download address C Command script Execute until jus Program entry point Figure 3 5 Debugger Settings of the Workspace 3 LabB 1 Right click the mouse the Workspace in the project management window and select New Project to Workspace 2 Refer to Lab A build project sam_b 3 Refer to Lab A finish the object code generation and debugging 4 After understanding and mastering the Lab A do the exercises at the end of the Lab 1 3 1 6 Sample Programs of Lab 1 1 Lab A Sample Program Bi C EmbestIDE Examples asm1 asm_a s x 45 set x to 45 x equ y 64 set y to 64 x equ stack top 8x1888 set stack top to 6x1660 global start text start entry point x MOU sp stack_top HOU r8 Hx move 45 to x STR r8 sp store RO to stack HOU r8 ity move 64 toy x LDR ri sp load 45 to R1 r8 r8 r1 add R R1 gt x STR r8 sp stop B stop branch to stop end 2 Lab B Sample Program 84 Embedded Systems Development and Labs The English Edition Bi CXEmbestIDEVE amplesSamsung asmi asm b s equ x45 X 4S x equ y 64 y 65 xf equ 2 87 2 87 equ stack_top 6x1666 stack top 8x1888 x global start text start start of the program x c HOU r6 itx RO 45 x HOU r8 r8 1sl 8 R8 R8 x 256 x MOU r1 1ty R1 65 x ADD r2 r
92. 0510 0479 User touch coordinate X Y is 0364 0382 Touch screen coordinate range in Xmix Ymin is 0200 0120 Xmax Y max is 0750 0620 To use current settings press N n key Want to use again Y N After the coordinates are calibrated the user can press on the touch panel in the valid range The hyper terminal will output the coordinate values Want to Set Agin Y N n Pixel 320 X 240 Coordinate Range in 0 0 320 240 LCD TouchScreen Test Example please touch LCD screen Press any key to exit X Position AINI is 0135 Y Position AINO is 0145 X Position AIN1 is 0135 Y Position AINO is 0162 X Position AIN1 is 0230 Y Position AINO is 0180 X Position AINI is 0229 Y Position AINO is 0183 5 After understanding and mastering the lab finish the Lab exercises 5 3 7 Sample Programs Because the LCD and serial pot are used the initialization code should include LCD initialization and serial port initialization The initialization of A D converter could be done at run time 1 Environment Variable Initialization Port Init 224 Embedded Systems Development and Labs The English Edition RIISPC 0xffffffff Init 0 115200 char oneTouch unsigned int Vx unsigned int Vy unsigned int Xmax unsigned int Ymax unsigned int Xmin unsigned int Ymin TSPX GPE4_Q4 TSPY GPES_Q3 TSMY GPE6_Q2 TEMX GPE7 01 0 0 Pull
93. 1 DYMO O 1544 60 10 8D E2 00 00 AO 87 20 OO 8D 2 Atpye D EF BF 2 OE 11 6 OK 11 AO EO OO 9E CiDACDW CcnD en D For Help pem i Debut OOO Figure 1 4 ADS Windows 1 3 3 Multi 2000 Multi 2000 is developed by Green Hills www ghs com Multi 2000 supports Embedded Ada95 and Fortran etc programming languages It can be run on Windows and Unix and supports remote debugging Multi 2000 supports various 16 bit 32 bit and 64 bit CPUs and DSPs such as PowerPC ARM MIPS X86 Sparc Tricore and SH DSP etc Multi2000 also supports multiple CPU debugging Multi 2000 consists of Project Builder Figure 1 6 Source Level Debugger Figure 1 7 Event Analyzer Figure 1 8 Performance Profiler Figure 1 9 Run Time Error Checking Graphic Browser Figure 1 10 Text Editor and Version Control System MULTI INTEGRATED DEVELOPMENT ENVIRONMENT Text Editor Version Control Builder Compilers Source Level EventAnalyzer Debugger Run Time Error Profiler Checking DEBUG SERVER Green Hills RTOS RTserv 3rd Party RTOS Servers Home Grown RTOS Servers RTserv ROM Monitor Servers In Circuit Emulator Servers OCD Servers Simulator Instruction Set Servers Simulators Figure 1 5 Multi 2000 TARGET ENVIRONMENT INTEGRITY 3rd Party RTOS Home Grown RTOS includes INDRT ROM Monitors In Circuit Emulators
94. 10 else result result lt lt 4 string i a 10 else 1 result result lt lt 4 string i 0 result minus 1 result result return result Exercises 1 Write a program that displays the characters received from serial port on the LCD 2 Based on the sample program in this Lab add an error detection function 4 5 Real Time Clock RTC Lab 4 5 1 Purpose e Get familiar with the hardware functionally of the Real Time Clock and its programming functions e Master S3C44B0X programming methods 4 5 2 Lab Equipment e Hardware Embest S3CEV40 hardware platform Embest Standard Power Emulator PC e Software Embest IDE 2003 Windows 98 2000 NT XP operation system 4 5 3 Content of the Lab Learn the functionality and the usage of the S3CEV40 RTC module Write programs that use RTC Modify the setting of time and date Display the current system clock time through the serial port 4 5 4 Principles of the Lab 1 Real Time Clock The RTC unit is a specific module or separate IC that can provide date time data storage and other functions It is often used as timer resource and parameter storage circuit in computer systems The communication 176 Embedded Systems Development and Labs The English Edition between the CPU and the RTC normally uses simple serial protocols such as IIC SPI MICROWARE CAN etc These serial ports have 2 3 lines that include synchronization and synchronism 2 S3C44
95. 19 D8 19 AING 20 o GND 20 D AINS 20 GND 20 AINS 21D PCO 21 o 21 x PCO 21 s AIN4 22 PC1 2 b AIN3 22 PC1 22 AIN3 23 PC2 23 AIN2 23 PC2 23 AIN2 24 PC3 24 AIN1 24 O PC3 24 AIN1 25 PC4 25 O AINO 25 4 25 o AINO 26 PC5 26 D GND 26 5 26 GND 27 PC6 27 GND 27 PC6 27 GND 2 52 28 Pi 28 PS r 29 gt 29 nO 29 Oo oo O 30 P __ BE PES _ 30 0 8 _ 30 0 85 _ 31 o5 R8 3 ot 31 5 8 _ 31 pt 32 5 25 _ 32 p 16 _ BE PC _ 32 L MKSC _ 33 PC11 33 IICSDA 33 O PC11 33 IICSDA E BP wau S 36 _ 36 V 37 Sm _ 37 o o m __ 38 p GND 38 P _ 38 _ Kio 39 GPE1 39 D GND 39 GPE1 39 N GND 40 GPE2 40 GND 40 O GPE2 40 gt GND HEADER 20X2 HEADER 20X2 HEADER 20X2 HEADER 20X2 Figure 2 25 Bus Expansion Interface Definition 50 Embedded Systems Development and Labs The English Edition 2 4 The Usage of Embest IDE 2 4 1 Embest IDE Main Window To step into Embest IDE for ARM just run Embest IDE exe Embest IDE user interface consists of an integrated set of windows tools menus directories and other elements that allow you to create test and debug your applications The main window of Embest IDE is shown in Figure 2 26 The Embest IDE main Window includes Title Bar Menu Bar 1 Tools Bar 2 Project Management Window 3 Data Watch Window 4 Status Bar 5 Memory Window 6 Output Window 7 Variable Window 8
96. 2 20 MOV R13 21 MOV R14 22 into SVC mode MRS RO CPSR BIC R0 RO Z0x1F ORR R0 R0 20x13 MSR CPSR RO MOV R13 23 MOV R14 24 into Abort mode MRS RO CPSR BIC RO RO 0x1F ORR RO RO 0x17 MSR CPSR RO MOV R13 25 MOV R14 26 into IRQ mode MRS RO CPSR BIC RO RO 0x1F ORR RO RO 0x12 MSR CPSR RO MOV R13 27 MOV R14 28 Embedded Systems Development and Labs The English Edition into UNDEF mode MRS RO CPSR BIC RO RO 0x1F ORR RO R0 0x1b MSR CPSR RO MOV R13 29 MOV R14 30 B Reset Handler end 3 4 7 Exercises Refer to the example of this Lab change the system mode to user mode compile and debug the program watch the result of the program execution Prompt You can t switch the mode directly from user mode to system mode Use SWI instruction to switch to supervisor mode first 3 5 C Language Program Lab 1 3 5 1 Purpose e Learn how to write and debug simple C language program using Embest IDE e Learn how to write and use command script files e Analyze the result through the Memory Register Watch and Variable windows 3 5 2 Lab Equipment e Hardware PC e Software Embest IDE 2003 Windows 98 2000 NT XP 3 5 3 Content of the Lab Use the command script to initialize the stack pointer Use C language to create a delay function 3 5 4 Principles of the Lab 1 Command Script When the user connects the IDE to the target board for debugging or execution of programs sometimes the user needs to p
97. 2 22 104 3 5 PUtDOSE si siete Nt ts tei det st stet tte bett evt 104 3 5 2 Eab Equipments 222 104 3 5 3 Content of the Lab u tee ede eei edis eret deir dedere 104 3 5 4 Principles of the Lab 104 3 5 5 Operation Steps a u u m ede Ee Re e HE p ERR 107 37550 Sample PrOSramsi a e reme ct m een pe 107 3 57 DUUM 108 3 6 C Language Program Labuan u qu spa nene a eterne Sui enne 108 3 6 PULP OSE zie estera t ete uut 108 3 6 2 Eab Equipment tea eie taie tie oe 109 Embedded Systems Development and Labs The English Edition 3 6 3 Content of the Lab a eet edet eredi ied e deor deo erede reed de 109 3 6 4 Principles of the 109 3 6 5 Operation Steps ener entrent en 111 3 6 6 Sample Programs s s eie de OT HH EE ERHIELT HERR 115 3 6 7 Goo v Op DR ERR DER RSEN AEN RII ERIS 118 3 7 Assembly and C Language Mutual Call ener 118 3 6 ces 118 3 6 2 Lab Equipment Sec eee iet isti EGRE 118 3 6 3 Content of the 118 3 6 4 Principles of the Lab eee eee eee RE edens 118 3 7 5 Operation Step
98. 2 or SB3 Watch the changes of LEDI LED2 and 8 SEG LED on the target board 7 After understanding and leaning the Lab do the exercises at the end of the Lab 1 Environment Initialization Code macro HANDLER HandleLabel sub 4 decrement sp to store jump address stmfd sp r0 PUSH the work register to stack Ir does t push because it return to original address Idr r0 HandleLabel load the address of HandleX XX to Idr r0 r0 load the contents service routine start address of HandleX XX str 0 5 4 store the contents ISR of HandleX XX to stack ldmfd sp r0 pc POP the work register and pc jump to ISR endm ENTRY b ResetHandler for debug b HandlerUndef handlerUndef b WI SWI interrupt b HandlerPabort handlerPAbort b HandlerDabort handlerDAbort b handlerReserved b HandlerIRQ b HandlerFIQ 2 Interrupt Initialization SF SF SF SF name init Eint func para none ret none 163 Embedded Systems Development and Labs The English Edition modify comment SF SF void init Eint void 1 enable interrupt rI ISPC Ox3ffffff rEXTINTPND Oxf
99. 21C_0000 0X021F_FFFF 0X0400_0000 0X05FF_FFFF 0X0600_0000 0X07FF_FFFF 0X0800_0000 0X09FF_FFFF OX0A00_0000 0X0BFF_FFFF OXOE00_0000 0X1FFF_FFFF The I O port A G pin definitions are listed in Table 2 3 to Table 2 9 Table 2 3 Port A ADDRO ADDR17 zr PCONA access address 0X01D20000 zs ADDR19 ADDR21 ADDR22 ADDR20 OUTPUT IIS 47 Embedded Systems Development and Labs The English Edition PDATA access address 0X01D20004 PCONA reset value OXIFF Table 2 4 Port B OUTPUT IIS NGCS3 OUTPUT IIS OUTPUT LED1 nGCS1 PB10 OUTPUT LED2 PCONB access address 0X01D20008 PDATB access address 0X01D2000C PCONB reset value OX7FF Table 2 5 Port C treten rane rtr string mouce PCONC access address 0X01D20010 PDATC access address 0X01D20014 PUPC access address 0X01D20018 PCONC reset value OXOFFOFFFF Table 2 6 Port D 48 Embedded Systems Development and Labs The English Edition PCOND access address 0X01D2001C PDATD access address 0X01D20020 PUPD access address 0X01D20024 PCOND reset value OXAAAA Table 2 7 Port E OUTPUT LCD RESERVE PES OUTPUT TSP TXDO OUTPUT TSP OUTPUT TSP PCONE access address 0X01D20028 PDATE access address 0X01D2002C PUPE access address 0X01D20030 PCONE reset value 0X25529 Table 2 8 Port F IICSDA RESERVED solid state hard drive SSHD PCONF access address 0X01D20034 PDATF access address 0X01D20038 PUPF access add
100. 3 1 An Overview of Lab Development Hardware 2 3 2 Hardware Reference for Software Design nennen 2 3 3 ut p iet doe 2 4 The Usage of Embest IDE sitas st Sed stated 2 4 1 Embest IDE Mam WindOW u eate teal ee lea el RARE ER a a 2 4 2 Project Managementi a a iai entente 2 4 3 Project Basic Settings riranna i aii riesi aiai 2 4 4 Project Compiling and Linking sss 24 5 Load R ERUNT 2 4 6 Flash Programmer 35 eee pn ern e RE ER GER ERST EN TERS Chapter 3 Embedded System Development Basic Labs 78 3 1 ARM Assembly Instructions Lab L eene enn entren nnne SST IPULPOSC s t e OB E ie tpe ee gentes ie ies NT REPRE tsk Embedded Systems Development and Labs The English Edition 3 1 2 Lab BEquipnient ee eO RE OR OT DH RN 78 3 1 3 Content of the Lab L luan aasawa 78 3 1 4 Principles of the Lab 1 78 3 1 5 Eab T Operation Steps su eee e gr o e rer e he 80 3 156 Sample Programs of Lab 1 oat o nei er p o RD 84 3 1 7 1 87 3 2 ARM Assembly Instruction Lab 2 eene enne nnne nnne 87 siste Sese etaed e
101. 8 r1 151 1 R2 RO R1 x 2 MOU sp 6x1666 SP 8x1888 STR r2 sp R2 gt mem location 8x1888 x HOU r8 1tz 87 x AND r6 r6 6xFF R R8 and x HOU ri Hu R1 64 x ADD r2 r6 r1 lsr 1 R2 R R1 2 x LDR r8 sp mem location 8x1888 gt RO x MOU r1 6x61 R1 8x81 x ORR r8 r8 r1 R8 R8 or R1 x MOU r1 r2 R2 gt R1 ADD r2 r6 r1 lsr 1 x R2 RB R1 2 stop B stop infinit loop to stop end Executing the above program step your register window and memory window will show how the values of the registers and memory locations change when each instruction execute For example stepping through the above program the following figures show the content of the windows 85 Embedded Systems Development and Labs The English Edition Bi C EmbestIDE ExamplesSamsung asm1 asm_b s equ equ equ equ global text start ADD MOU STR HOU gt AND x 45 X 4S x y 64 I 64 x 2 87 2 87 x stack top 68x18688 stack top 0 1000 start start of the program x 45 x R8 x 256 x 64 x r6 itx r8 r8 1s1 8 r1 ity r2 r80 r1 1s1 1 R1 x 2 x 5 0 1909 8x1888 x r2 sp R2 gt mem location 8x1888 TNH o0 5 R R R R 87 x rB itz R8 8 RG and OxFF x a Ma iid r1 ity R1 64 x r2 r8 rl lsr 1 R2 RB R1 2 x r6 sp mem locati
102. ANK VD 3 0 LCDCDMA VD 7 4 Figure 5 3 LCD Controller Block Diagram 1 LCD Controller Interface The following describes the external LCD interface signals that are commonly used e VFRAME this is the frame synchronous signal between the LCD controller and the LCD driver It signals the LCD panel of the start of a new frame The LCD controller asserts VFRAME after a full 192 Embedded Systems Development and Labs The English Edition frame of display as shown if Figure 5 4 e VLINE This is the line synchronization pulse signal between the LCD controller and the LCD driver and it is used by the LCD driver to transfer the contents of its horizontal line shift register to the LCD panel for display The LCD controller asserts VLINE after an entire horizontal line of data has been shifted into the LCD driver e VCLK This pin is the pixel clock signal between the LCD controller and the LCD driver and data is sent by the LCD controller on the rising edge of the VCLK and is sampled by the LCD driver on the falling edge of the VCLK e VM This is the AC signal for the LCD driver The VM signal is used by the LCD driver to alternate the polarity of the row and column voltage used to turn the pixel on and off The VM signal can be toggled on every frame or toggled on the programmable number of the VLINE signal e VD 3 0 This is the LCD pixel data output port It is used for monochrome displays e VD 7 0 This is the LCD pixel data output
103. ATA n DATA n 1 DATA n 2 DATA n x WK oz Figure 6 5 Read One Byte The time sequence diagram for reading 1 byte from the address ADDR from the same page is shown in Figure 6 6 The read format is START OPADDR ACK ADDR R ACK OPADDR R ACK data STOP C 1 H 1 R 5 A l DEVICE E T R DEVICE T WORD ADDRESS T ADDRESS E ADDRESS n T D P TTE E si RE ERES pp 7 3 B BWK B B G DUMMY WRITE K Figure 6 6 Read N Bytes In reading 1 bytes operation besides the read address ADDR_R the operation address OPADD R is also needed As a result before the 1 byte of data is read a one byte writing operation is needed Notice that there 15 no ACK after the read operation 4 S3C44B0X Processor Interface 1 An introduction to the S3CA4BOX IIC interface The S3C44B0X RISC microprocessor can support multi master IIC bus serial interface There are dedicated 233 Embedded Systems Development and Labs The English Edition serial data line SDA and a serial clock line SCL carry information between bus masters and peripheral devices that are connected to the IIC bus The SDA and SCL lines are bi directional A High to Low transition on SDA can initiate a Start condition Low to High transition on SDA can initiate a Stop condition while SCL remains steady at High Level The S3C44BO0X IIC bus interface has four operation modes Master transmitter mode Master receiver mode Slave
104. B0X Real Time Timer The RTC Real Time Clock unit is a peripheral device inside the S3CA4BOX The function diagram is shown in Figure 4 12 The backup battery can operate the RTC Real Time Clock unit while the system power is off The RTC can transmit 8 bit data to CPU as BCD Binary Coded Decimal values using the STRB LDRB ARM operation The data include second minute hour date day month and year The RTC unit works with an external 32 768 KHz crystal and also can perform the alarm function Time Tick Generator TIME TICK RTCRST Reset Register Leap Year Generator RTCCON RTCALM PMWKUP PWDN ALMINT Figure 4 12 S3CEV40 RTC Module Function Diagram The following are the features of the RTC Real Time Clock unit e BCD number second minute hour date day month year e Leap year generator e Alarm function alarm interrupt or wake up from power down mode e Year 2000 problem is removed e Independent power pin VDDRTC e Supports millisecond tick time interrupt for RTOS kernel time tick e Round reset function 1 Read Write Registers Bit 0 of the RTCCON register must be set in order to read and write the register in RTC block To display the sec min hour date month and year the CPU should read the data in BCDSEC BCDMIN BCDHOUR BCDDAY BCDDATE BCDMON and BCDYEAR registers respectively in the RTC block However a one second deviation may exist because multiple registers are read For example suppose that
105. C44B0X UART architecture and principles of serial communication e Master ARM processor serial port programming methods 4 4 2 Lab Equipment e Hardware Embest S3CEV40 hardware platform Embest Standard Power Emulator PC e Software Embest IDE 2003 Windows 98 2000 NT XP operation system 4 4 3 Content of the Lab Learn the functions of the S3CA4BOX UART related registers Get familiar with the S3C44B0X UART related interface Write a serial port communication program Monitor the S3CEV40 serial port and return the received characters 4 4 4 Principles of the Lab 1 S3C44B0X Serial Communication Unit UART The S3C44B0X UART Universal Asynchronous Receiver and Transmitter unit provides two independent asynchronous serial I O SIO ports each of which can operate in interrupt based or DMA based mode In other words UART can generate an interrupt or DMA request to transfer data between CPU and UART It can support bit rates of up to 115 2K bps Each UART channel contains two 16 byte FIFOs for receive and transmit data The S3C44B0X UART includes programmable baud rates infra red IR transmit receive one or two stop bit insertion 5 bit 6 bit 7 bit or 8 bit data width and parity checking Each UART contains a baud rate generator transmitter receiver and control unit as shown in Figure 10 1 The baud rate generator can be clocked by MCLK The transmitter and the receiver contain 16 byte FIFOs and data shifters Data which is to be trans
106. CS Use the 26bit APCS 10 FP architecture 11 FP architecture No FP multiple Instructions FP Instructions The code is position independent or reentrant Assemble Options mthumb interwork gdwarf2 S SOURCE FILE o AdebugiS OBJ FILE STET Figure 3 15 Embest IDE Assembler Settings 126 Embedded Systems Development and Labs The English Edition Project Settings Settings For General Compiler Assembler Workspace Pr Category 54g interwork files F J Arm Files Instructions sets 8 readme txt C ARM only Default C ARM interworking SES Thumb Files C Thumb only amp Thumb interworking H Other files Little endian mode default Big endian mode Hardware FP instructions Lib calls for FP operations APCS 26 bit Option APCS 32 bit Option APCS stack frame No APCS stack frame Specify the name of the target CPU No Specified Compile Options mthumb mthumb interwork gdwarf c S SOURCE FILE oAdebugiS OBJ FILE Cancel Figure 3 16 Embest IDE Compiler Settings Project Settings Settings General Compiler Assembler El Workspace interwork 1 pr interwork files Reset E Arm Files S readme txt Always use custom assemble options Reset mx TT Files 8 00 Other files Individual compiling and assembling options can be set for
107. Cancel Figure 3 1 Create a New Workspace Click OK button and a new project will be created A new workspace will also be created using the same name with the project In the work space window the new workspace and project will be opened by the IDE Note In order to add a new project to the workspace right click on the Workspace name n project s that appears in the left window after a workspace name is created Normally n represents the total number of projects that are currently in the workspace In order to build your new project you have to activate the project 2 Create a Source File Select File New and a new editor window without a specific title will appear The input cursor will be at the first line of the window Input the sample source code asm a s After the edition of the source file is finished save the file as asm a s in the project directory 3 Add a Source File to the Project First click project source then do the followings Select Project gt Add To Project gt Files or right click the project name in the project window A file selection dialog will appear Select the file asm a s that has just been created 4 Basic Settings Select Project Settings or press AlttF7 The project settings dialog will open Select the Processor page shown in Figure 3 2 Set the target board processor as arm7 81 Embedded Systems Development and Labs The English Edition Settings Proc
108. Color i 0 i Stru Bitmap usHeight i 1 for J 0 J lt Stru_Bitmap us Width j 1 if ucColor INT8SU Stru Bitmap pucStart i Stru Bitmap usWidth j TRANSPARENCY 1 LCD PutPixel x J y 1 ucColor E 4 DMA Transfer Display Data Function SF SF SF SF SF SF SF SF ale ae name Lcd Dma Trans func dma transport virtual LCD screen to LCD actual screen para none ret none modify comment oF SF sk sk oR R ak ak ak void Lcd Dma Trans void INTSU err ucZdma0Done 1 define LCD VIRTUAL BUFFER 0xc400000 define LCD ACTIVE BUFFER LCD VIRTUAL BUFFER SCR XSIZE SCR YSIZE 2 DMA ON define LCD ACTIVE BUFFER LCD VIRTUAL BUFFER DMA OFF define LCD BUF SIZE SCR XSIZE SCR YSIZE 2 So the Led Buffer Low area is from LCD VIRTUAL BUFFER to LCD ACTIVE BUFFER SCR XSIZE SCR YSIZE 2 rNCACHBElI unsigned LCD ACTIVE BUFFER gt gt 12 lt lt 16 unsigned LCD VIRTUAL gt gt 12 rZDISRCO DW 30 1 28 LCD VIRTUAL BUFFER inc 208 Embedded Systems Development and Labs The English Edition rZDIDES0 2 30 1 28 LCD ACTIVE BUFFER inc rZDICNTO 2 lt lt 28 1 lt lt 26 3 lt lt 22 0 lt lt 20 LCD_BUF_SIZE
109. E nOE nWE z nWE 44B0X SST39VF160 FLASH Figure 2 14 Flash Interconnection Circuit Diagram A 12 1 A 11 0 D 15 0 D 15 0 nSRAS nRAS nSCAS C C n AS nSCS0 C nCS nOE n DQMO LDQM DOMI 7 4 UDQM 21 RI A22 BAO R2 A23 UNLOAD BAI R3 44B0X R4 SDRAM UNLOAD Figure 2 15 SDRAM Interconnection Circuit Diagram 3 EEPROM Interface The Lab system provides a EEPROM chip AT24C04 that supports the bus The is a two direction two wires serial simple bus that is used for internal IC control The data transfer speed is 100kb s in the standard mode The data transfer speed can be as high as 400kb s in the high speed mode 4 Serial Interface The serial interface of the circuit is shown in Figure 2 16 The Lab system provides two serial ports DB9 One is the main port UART that is used to communicate with the PC or the MODEM Because the S3CA4BOX doesn t provides the I O modem interface signals DCD DTR DSR RIC the MCU general purpose I O must be used The other serial interface 15 UARTO that has two wires RxD and TxD for simple data receiving transmitting The UARTI port uses MAX3243E for voltage conversion The UARTO uses MAX3221E for voltage conversion 39 Embedded Systems Development and Labs The English Edition 44B0X MAX3221E DB9 UARTO GPEI IN TOUT 2 GPE2 ROUT 3 RIN MAX3243E DB9 UARTI PC12 TII
110. EDO DRAM DCD 0x00960000 953 Refresh REFEN 1 TREFMD 0 Trp 3 5 Tchr 3 DCD 0x0 Bank Size 32MB 32MB DCD 0x20 MRSR 6 CL 2 DCD 0x20 MRSR 7 CL 2 The 13 control registers are located at consequent memory addresses starting from 0x01C80000 As a result the instruction stmia rO rl r13 writes the configuration data to the corresponding registers The Embest S3CEV40 memory SROM DRAM SDRAM address pin connection are shown in Table 4 9 4 Memory SROM DRAM SDRAM Address Pin Connections The Embest S3CEV40 chips select signals usage is shown in Table 4 10 137 Embedded Systems Development and Labs The English Edition Table 4 9 Memory SROM DRAM SDRAM Address Pin Connections MEMORY ADDR PIN S3CA4B0X ADDR 8 bit DATA BUS S3C44B0X ADDR S3C44B0X ADDR 16bit DATA BUS 32 bit DATA BUS Table 4 10 chips select signal usage Chip Select signal CS NGCSO NGCS6 NSCSO NGCS1 A20 A19 A18 0 0 0 CS1 0 0 1 CS2 0 1 0 CS3 0 1 1 CS4 1 0 0 CS5 1 0 1 CS6 1 1 0 CS7 1 1 1 CS8 5 Peripherals accesses address settings Chips or External Modules FLASH SDRAM USB Solid state Hard Disc Nand Flash IDE 8 SEG ETHERNET LCD The peripherals accesses address settings is shown in Table 4 11 Table 4 11 Peripherals accesses address settings Peripheral CS FLASH NGCSO SDRAM NGCS6 USB CSI CS register Address space BANKCONO OX0000_0000 0X01BF_FFFF BANKCON6 0XO0COO 0000 0XODF FFF
111. EE802 3 preamble is 7 bytes followed by one byte of SOF The Preamble includes the SOF so its total length is 8 bytes Start of Frame SOF is one byte ended with two consequent 1 This byte stands for the start of the frame Destination and Source Addresses means the addresses of the sending workstation and receiving workstation The destination address 15 a single address or a broadcast address Data Ethernet will be transferred to higher protocols after the data has been processed in the physical layer and the logic link layer The minimum length of data 15 46 bytes Data 802 3 will be filled to 64 bytes if the length of data is not more than 64 bytes Frame Check Sequence FCS consists of a 4 byte CRC that is generated by the sending device The receiving device will recalculate the CRC and compare is with the received CRC in order to make sure that data has been transferred correctly 5 Ethernet Driver Development Methods Developing Ethernet drivers involves initializing and programming the RTL8019AS Ethernet interface chip and providing data input output and control interface to higher level protocols The RTL8019 chip is an Ethernet controller made by the Realtek company of Taiwan Because of its high performance and low price it is widely used in commercial products The main features of the RTL8019AS are Meets Ethernet II and 802 3 10 Base 10 Base2 and 10 BaseT standards Full duplex and maximum 10 Mb s in sending and rec
112. EG is used The control signals for each segment are controlled by lower 8 bits of S3C44BO data bus through 74LS573 flip latch The resisters R1 R8 can modify the brightness of the LED The chip selection for the 74L S573 flip latch is shown in Figure 4 15 The flip latch chip select signal CS6 is generated by S3C44B0 nGCS1 and A18 A19 A20 Shown in Figure 4 16 When nGCS1 A18 A20 are high and A19 is low the CS6 is valid At this time the contents in the lower 8 bits of data bus will be displayed at the 8 SEG LED VDD33 R7 U2 UI A 74LS573 470E R5 8 LED DO ms bs RS AINE 2 m Di 3 ES Q0 3 E 07 37 01 Qi m 410 DY D 5 ES AIT A o D 6 EN 1 R4 470E 7 b Ds 7 04 Lei D6 s Q5 n5 470E R2 2 e Dy o _ P IND GND 1 R3 6 vec 470 RI 4T0E U8C VDD33 6 5 CS6 74HC14 Figure 4 15 8 SEG LED Control Circuit U7 TALV 138 AS l Ao VDD VDD33 A19 2 1 CSI R35 A20 EE E714 CS2 22E A2 Y Oe nGCSl 4 3 13 CS3 5 52 12 CS4 7DD33 ES me oS R32 CS8 7 Y Ys 10 CS6 10K VSS Y6 2 CS Figure 4 15 S3CEV40 Chip Select Signal Decode Circuit 187 Embedded Systems Development and Labs The English Edition The start address and end address of the S3C44B0 storage area 1 is fixed The address range of storage area 1 is 0x02000000 0x2FFFFFF When the microprocessor accesses this area the nGCS1 is valid Compound with A18 A19 A20 CS6 will b
113. Embedded Systems Development and Labs The English Edition Embedded System Development and Application Course Series Embedded System Development and Labs for ARM Edited revised and updated by Radu Muresan Compound with Embest ARM Labs System Compound with Multimedia Teaching Demo Modules Embedded System Development and Application Course Series Embedded Systems Development and Labs The English Edition To Readers Embedded System Application Development and Labs Textbook is compounded with the Embest ARM Development System that was developed by Embst Inc at Shenzhen China Any reader who is interested in using the Embest development tools for ARM can contact Embest Inc The following is the Embest contact information Room 509 Luohu Science amp Technology Building 85 Taining Road Shenzhen Guangdong China ZIP 518020 Tel 86 755 25635656 25635626 Fax 86 755 25616057 Web http www armkits com http www embedinfo com E mail market embedinfo com Embedded System Development and Applications Textbook and Embedded System Application Development and Labs Textbook are compounded with teaching demo modules separately If you are interested in any of these demo modules please contact Embest Inc Embedded Systems Development and Labs The English Edition An Introduction to This Book This book 1 a Lab manual and is part of the Embedded System Development and Application course series This Lab manu
114. Embedded Systems Development and Labs The English Edition e Stream Socket STREAM The stream socket provides a reliable stream oriented communication connection It uses the TCP protocol and guarantees the correct data transmission and series number checking e Datagram Socket SOCK DGRAM The Datagram Socket defines a non connection service Data is transferred independently and the order 1 not relevant It doesn t guarantee that the data transmission 15 reliable and correct It uses the UDP protocol e Original Socket The original socket allows the user to directly use the lower level protocol IP or ICMP for example The original socket is powerful but not convenient to use It is mostly used in developing other protocols The Socket programming flow diagram is shown at Figure 6 17 Server End Create a server end socket Server end socket binds to a port Client End Listen to the connection Create a client end socket requests from clients Program blocks until the client Send a connection request via send a connection request the server IP address and the server port number Send data to server Receive data from clients Process the data Figure 6 17 Socket Programming Flow Diagram The most commonly used Socket interface functions are the following Socket Create a socket bind specify a local address 253 Embedded Systems Development and Labs The English Edition co
115. Embest IDE version During the installation process of the IDE Education Version the source code of Chapter 3 is automatically copied in the directory C Embest Examples Samsung S3CEV40 A basic model of Embest ARM development system is shown in Figure 2 1 27 Embedded Systems Development and Labs The English Edition Embast S3CEV4D Embest powerlCE Figure 2 1 Model diagram of the Labs 2 1 1 The Embest IDE 1 An Overview of Embest IDE Embest is a new generation of integrated development environment that is being used in embedded software development It provides high efficiency and clear graphic interface for embedded software development It provides a set of development and debugging tools that include editor compiler linker project manager etc The style of the Embest IDE is similar to that of the Microsoft Visual Studio It is a set of visual development system for embedded software development In this IDE the user can conveniently create or open projects create or open files compile link run or debug various kinds of embedded programs The Embest IDE interface is shown in Figure2 2 28 Embedded Systems Development and Labs The English Edition Fmhest IDF F Fxamples at1 example_terminalterm c 3 1 xi Edi View Project Buld Debug Tools Window Hep lel x D sagai he cin ps 4 4 e 2 SHH 0 mp gms Tm sts int yui
116. Embest Online Flash Programmer for ARM install program This program will install Embest Online Flash Programmer on your computer It is strongly recommended that you exit all windows program before running this setup program Click Cancel to quit setup and then clase any programs you have running Click Next to continue with the setup program Unauthorized reproduction or distribution of this program or any portion of it may result in severe civil and criminal penalties and will be prosecuted to the maximum extent possible under law EMBEST Copyright 2003 ShenZhen Embest Info amp Tech Co Ltd Figure 2 11 Flash Programmer Installation Interface Follow the installation steps and finish the installation 36 Embedded Systems Development and Labs The English Edition 2 2 3 The Interconnection of Software and Hardware Platforms As shown in Figure 2 12 the Emulator is connected to the PC via a parallel cable and is connected to the target board via a 20 pin JTAG cable lt aS _ Embas SSCEV4D w Embest powerlCE ksi Figure 2 12 Lab Platform Interconnection Diagram 2 3 Lab Development System Hardware Circuits 2 3 1 An Overview of the Lab Development system Hardware 1 Embest ARM Lab Development system The Embest ARM Development system block diagram is shown at Figure 2 13 37 Embedded Systems Development and Labs The English Edition 8 SEG Driver 5 wW H wD 4X4keyboard LCD amp TSP
117. F BANKCON1 0X0200 0000 0 0203 FFFF 138 Embedded Systems Development and Labs The English Edition Solid state Hard Disc CS2 BANKCON1 0X0204_0000 0X0207_FFFF IDE IOR W C53 BANKCON1 0X0208 0000 0X020B FFFF IDE KEY 54 BANKCON1 OX020C_0000 0X020F_FFFF IDE PDIAG C S5 BANKCON1 0X0210_0000 0X0213_FFFF 8 SEG CS6 BANKCON1 0X0214 0000 0 0217 FFFF ETHERNET 57 1 0X0218_0000 0X021B_FFFF LCD CS8 BANKCON1 0X021C 0000 0X021F FFFF NO USE NGCS2 BANKCON2 0X0400 0000 0XO05FF FFFF KEYBOARD NGCS3 BANKCON3 OX0600_0000 0X07FF_FFFF NO USE NGCS4 BANKCON4 0X0800 0000 0X09FF FFFF NO USE NGCS5 5 0000 0XOBFF FFFF NO USE NGCS7 BANKCON7 0000 0X1FFF FFFF 2 Circuit Design The memory system of the development board includes a 1IMx16bit Flash SST39VF160 and a 4Mx16bit SDRAM HY57V65160B As shown in Figure 4 3 the Flash chip is enabled by the nGCSO signal The Flash address space is from 0x00000000 0x00200000 As a result the processor s address bits A0 A19 are used Figure 4 4 presents the SDRAM connection diagram The SDRAM memory is divided into 4 equal memory banks of 1Mx16 bits The BANK s address is determined by pins 00 corresponds to BANKO 01 corresponds to BANKI 10 corresponds to 2 11 corresponds to BANK3 Each bank uses the row address pulse to select RAS and the column address pulse to select CAS to carry on the addressing This development board also has Jumper
118. FFF I_PSLU 6x1b1b1b1b I PHST 6x66661f1b I_CSLU 6x1b1b1b1b I CHST 6x6666381b 9 I ISPC Urite0nlu F_ISPC WriteOnly m ii DMA 3 3 Register Peripheral Figure 4 7 IDE Peripheral Register Window El 4 Set a break point at the entry point of Eint4567Isr c as shown in Figure 4 8 Execute the program press SB2 or SB3 the program will stop at the break point Double click the INTPND and I ISPR the register window will be open Watch the value changes in these registers Watch the value change at bit21 before and after the program executed void Eints567Isr void qd unsigned char which int uhich int rEXTINTPND rEXTINTPND Oxf rI ISPC EINT4567 if which int 4 lt ledi on D8Led Direction 8 ledli off Figure 4 8 At the Interrupt Time 5 Cancel all of the above break points Set a break point at main function shown in Figure 4 9 Execute the program When the program will stop at the break point watch the value changes at bit21 of these two registers again Through these operations understand the functions of INTPND and I ISPR register in the interrupt processing 162 Embedded Systems Development and Labs The English Edition leds off D8Led init init Exth567 Uart Printf XnXrEmbest Uart Printf XnXrExtern o fort 5 i Figure 4 9 After Interrupt Finished 6 Cancel all the above break points Execute the program press SB
119. FO 6 The UART modem status register UMSTATn can show the current CTS status of MODEM 7 UART Transmit Holding Buffer Register UTXHn and UART Receive Holding Buffer Register URXHn can hold transmit hold receive 8 bits of data NOTE When an overrun error occurs the URXHn must be read If not the next received data will also make an overrun error even though the overrun bit of USTATn had been cleared 4 UART Baud Rate Division Register UBRDIV The baud rate divisor register UBRDIVn controls the baud rate The serial Tx Rx clock rate baud rate is calculated as follows UBRDIVn round off MCLK bps x 16 1 The divisor should be from 1 to 216 1 For example if the baud rate is 115200 bps and MCLK is 40 MHz UBRDIVn is UBRDIVn int 40000000 115200 x 16 0 5 1 int 21 7 0 5 1 167 Embedded Systems Development and Labs The English Edition 22 1 21 Following presents the register definition used in common 44b h UART define TULCONO volatile unsigned 0x1d00000 define rULCON 1 volatile unsigned 0x1d04000 define TUCONO volatile unsigned 0x1d00004 define TUCONI volatile unsigned 0x1d04004 define TUFCONO volatile unsigned 0x1d00008 define rUFCON1 volatile unsigned 0x1d04008 define rTUMCONO volatile unsigned 0x1d0000c define TUMCONI volatile unsigned 0x1d0400c define TUTRSTATO volatile unsigned 0x1d00010 define rUTRSTAT1
120. For Processor Remote Debug Directory Compiler Assemi Workspace swing 1 r J C Source 29 ASM Source 22 Link Script objdump Category Include Directories MargetsVat91 Object files location debug Preprocessor Definitions SEMIHOSTING ATMEL Compile Options gdwarf c DSEMIHOSTING DATMEL I targets at91 S SOURCE FILE oAdebugiS OBJ FILE Figure 2 39 Compiler General Settings b Compiler Warning Options The compiler warning setting is shown in Figure 2 40 59 Embedded Systems Development and Labs The English Edition Project Settings Settings For Debug Directory Compiler Assembler Linker G kempp 5 eee Waring Options C Source Suppress Warnings 18 led swing c C E z n 2 80 ASM Source Iv A variable is unused Trigraphs encountered 8 cstartup s Unqualified pointer cast Missing Declarations 2 wait irq s Incompatible func cast ANSIC extension 2C Link Script Confusing type conversions 38 Idscript Inlined function cannot be inlined objdump One local variable shadows another Automatic variables are uninitialized Alignment increased when pointer cast Compile Options gdwarf unused c 1 191 SOURCE FILE o debug OBJ_FILE Cancel Figure 2 40 Compiler Warning Settings c Compiler De
121. Function When the program includes the main function the main function can initialize the C run time library This initialization is done through gccmain function At the entry of the main function the compiler will call the gcemain first and then executes the rest of the code _ gccmain function is implemented in the standard C library When the application program doesn t include main function the C run time library will not be initialized and many functions from the run time library cannot be used in the application program In the basic Lab manual the function library is not included As a result the usage of function library will not be given here If the main function is used as the main function of the application program an empty gccmain function can be added to the source code Using either C language or assembly language 3 7 5 Operation Steps 1 Refer to the former Labs create a new project and name it as explsam 2 Refer to the sample programs edit them and add them to the project and save them as randtest init s random s and ldscript 3 Refer to the former Labs follow the process of compiling gt assembler setting linker setting debugger setting to set the new project Compile and link the project shown in Figure 3 14 4 Download the debug file open the Memory Register Watch Variable Call stack windows single step execute the program Through the above windows watch and analyze the result of the
122. ICDS end receive rIICSTAT 0x90 stop Master Rx condition Oxaf resumes operation DelayMs 5 wait until stop condition is in effect data recv_byte store the data 6 1 8 Exercises Write a program to write words such as date etc and read them out through serial port or LCD panel 6 2 Ethernet Communication Lab 6 2 1 Purpose e Get familiar with Ethernet communication principles and driver program development e Learn the IP network protocol and network application software development using the Embest development system 6 2 2 Lab Equipment e Hardware Embest S3CEV40 hardware platform Embest Standard Power Emulator PC Ethernet hub e Software Embest IDE 2003 Windows 98 2000 NT XP operation system 6 2 3 Content of the Lab Download the code to the target board through the local LAN using TFTP IP protocol 6 2 4 Principles of the Lab 1 Principles of Ethernet Communication The company Xerox developed the Ethernet protocol based on the Carrier Sense Multiple Access Collision Detection CSMA CD mechanism The communication medium is a coaxial cable The data transfer rate could be 10Mb s If using twisted pair wires the data transfer rate could be 100Mb s Currently the Ethernet follows the IEEE802 3 standard 1 Architecture The architecture of an Ethernet based system is shown in Figure 6 10 242 Embedded Systems Development and Labs The English Edition img Ethernet
123. ICSTAT 0xd0 stop Master Tx condition rIICCON Oxaf resumes IIC operation DelayMs 5 wait until stop condtion is in effect 4 Read AT24C04 Program ak ak ak ak ak ak ak ak name Rd24C080 240 Embedded Systems Development and Labs The English Edition func read data from 24C080 para slvAddr chip slave address addr data address data data pointer ret none modify comment RR 9k R OR void Rd24C040 U32 slvAddr U32 addr U8 data 1 char byte iGetACK 0 send control byte rIICDS slvAddr send the device address 0 rIICSTAT O0xf0 Master Tx Start while iGetACK 0 wait ACK IGetACK 0 send address rIICDS addr rIICCON Oxaf resumes operation while 1GetACK 0 wait IGetACK 0 send control byte rIICDS slvAddr send the device address 0 again rIICS TAT 0xb0 Master Rx Start rIICCON Oxaf resumes IIC operation while iGetACK 0 wait iGetACK 0 get data byte rIICDS 0x2f DelayMs 1 delay 241 Embedded Systems Development and Labs The English Edition get data byte rI
124. K and MCLK Most LCD drivers need their own adequate frame rate The frame rate 1 calculated as follows frame rate Hz 1 1 VCLK x HOZVAL 1 1 MCLK WLH WDLY LINEBLANK x LINEVAL 1 VCLK Hz HOZVAL 1 1 frame rate x LINEVAL 1 WLH WDLY LINEBLANK MCLK 197 Embedded Systems Development and Labs The English Edition Table 5 5 Relation between VCLK and CLK VAL MCLK 60MHz CLKVAL 60MHz X VCLK 60 MHz 4 15 0 MHz 60 MHz 2046 3 Dada Frame Display Control Settings e LCDBASEU These bits indicate A 21 1 of the start address of the upper address counter which is for the upper frame memory of dual scan LCD or the frame memory of single scan LCD e LCDBASEL These bits indicate A 21 1 of the start address of the lower address counter which is used for the lower frame memory of dual scan LCD e LCDBASEL LCDBASEU PAGEWIDTH OFFSIZE x LINEVAL 1 e PAGEWIDTH Virtual screen page width the number of half words this value defines the width of the view port in the frame e OFFSIZE Virtual screen offset size the number of half words This value defines the difference between the address of the last half word displayed on the previous LCD line and the address of the first half word to be displayed in the new LCD line e LCDBANK These bits indicate A 27 22 of the bank location for the video buffer in the system memory LCDBANK value cannot be changed even when moving the view port 7
125. L IPDATA vPdata L3D L for j 0 j 4 j tey L3 gt 500ns IPDATB L3C L3C H IPDATA vPdata L3D L for 0 j 4 j tey L3 gt 500ns data gt gt 1 rPDATG L3C L3M L3M H L3C H SF SF SF SF name _ WrL3Data func write control data to 1341 through L3 interface para data control data E halt halt operate ret none modify comment ak akak ak ak ak ak ak ak 2 SF akk SF SF SF e ae ae ae 2 e e ak ake ake ae a oF ake akk akk akk akk ake afe 2 afe SF SF ke ake 2 ake ake ae 2 void WrL3Data U8 data int halt U32 vPdata 0x0 L3D L U32 vPdatb 0x0 L3M L3C L S32 ij 266 Embedded Systems Development and Labs The English Edition if halt 1 rPDATB L3C L3C H while tstp L3 interface halt condition for j 0 j lt 4 j tstp L3 gt 190ns rPDATB L3C L3M L3M H in data transfer mode for j 0 j lt 4 j tsu L3 D gt 190ns 2 PA9 L3MODE PG6 L3DATA PG7 L3CLOCK for 120 1 lt 8 i if data amp 0x1 if data bit is H rPDATB L3M L3C L rPDATA L3D L3D H for j 0 j 4 j tcy L3 gt 500ns rPDATB L3C L3M L3C H L3D H 13 for j 0 j 4 j tcy L3 gt 5001 else if data bit is L 1 rPDATB L3M L3C L IPDATA vPdata
126. L3D L for j 0 j 4 j tcy L3 gt 500ns rPDATB L3C L3M L3C H IPDATA vPdata L3D L for j 0 j 4 j tcy L3 gt 500ns E j data gt gt 1 rPDATB L3C L3M L3M H L3C H 267 Embedded Systems Development and Labs The English Edition 6 3 6 Exercises 1 Write a program that implements the function of adjusting the voice volume via button 2 Write a program that implements the recording function 268 Embedded Systems Development and Labs The English Edition Chapter7 Real Time Operation System Labs 7 1 uC OS Porting Lab 6 3 1 Purpose e Get familiar with the uC OS II porting conditions and uC OS II kernel basic architecture e Understand the steps of porting the uC OS II kernel to the ARM processor 7 1 2 Lab Equipment e Hardware Embest S3CEV40 hardware platform Embest Standard Power Emulator PC e Software Embest IDE 2003 Windows 98 2000 NT XP operation system 7 1 3 Content of the Lab Learn how to port the uC OS II kernel to the S3C44B0 ARM processor Test its functionality using the Embest IDE 7 1 4 Principles of the Lab 1 uC OS II File System The file system of the uC OS II real time kernel is shown in Figure 7 1 The application software layer is the code based on uC OS II kernel The uC OS II includes the following three parts e Kernel Code This part has no relationship with the microprocessor The kernel code includes 7 source files and 1 header file The 7 s
127. Management 1 An Introduction to the Project Manager The project is an important concept for Embest IDE It is a basic architecture for users to organize source files set compile and linking options generate debug information and finally generate the BIN file for the target processor The Embest IDE project management functions include 1 File management in a Project Management Window Figure2 27 51 Embedded Systems Development and Labs The English Edition Workspace Workspace Examples 12 project s analog test files Source Files 30 ASM Source Files 8 irq s 8 cstartup s F J Header Source Files amp 3 Link Script File 2 example_i2c files s I interrupt files Bulld led blink files CY New Folder t led swing files Add Files to Project 9 polling files Set as Active Project set flash sram file Setting term files time files Docking View timer files Hide ar ucos files ES Properties Figure2 27 Project Management Window 2 Provides dialogs for microprocessor debug device selection and settings configuration of debug information compiler assembly linker settings etc 3 Provides Build menu and tool buttons and output build information the Build page in Output Window Figure 2 28 Building project rantest arm elf as D EmbestIDE Examples a
128. N Super Twisted Nematic LCD panel displays in light green or orange color STN LCD panel is a type of liquid crystal whereas the alignment surface and therefore the LC molecules are oriented 90 from each surface of glass This device produces images in two modes Positive and Negative Positive Mode provides white background with black segments Negative Mode provides black background and white segments When two polarizing filters are arranged along perpendicular axes as in the first illustration light passes through the lead filter and follows the helix arrangement of the liquid crystal molecules The light is twisted 90 degrees thus allowing it to pass through the lower filter When voltage is applied however the liquid crystal molecules straighten out of their helix pattern Light is blocked by lower filter and the screen appears black because of there being no twisting effect 2 TFT Color LCD Panel TFT Thin Film Transistor color LCD panels are widely used in computers like notebook computers and monitors 190 The main parameters of LCD are size differentiate dot width and color mode etc The mian parameters of Embedded Systems Development and Labs The English Edition S3C40 development board LCD panel LRH9J515XA STN BW are shown in Table 5 1 The size parameters are shown in Figure 5 1 The outlook is shown is Figure 5 2 Figure 5 1 Size Parameters The unit of the numbers are mm Table 5 1 LRH9J515XA STN BW LCD Panel
129. N TIOUT PC10 I2IN T2OUT 15 I3IN T3OUT PC13 RIOUT PCII 200 R2IN PC8 R3OUT R3IN PC9 RAOUT RAIN 14 R5OUT RSIN Figure 2 16 Serial Port Circuit Diagram 5 USB Circuit Module The USB module circuit is shown in Figure 2 17 The IC chip is USBN9603 A company named NS makes this USB controller The USB controller supports the USBI 0 and USBI 1 communication protocols and has a parallel bus It has three work modes that are Non Multiplexing Parallel Interface Mode Multiplexed Parallel Interface Mode and MICROWIRE Interface Mode The mode selection is decided by the pins and MODE2 If the MODEI MODE2 are connected to ground the work mode is defined as Non Multiplexing Parallel Interface Mode In this mode the pin DACK should be connected to high because DMA is not used The MCP will select the USB controller using chip selection signal CSI that 1s generated by the decoder The USBN9603 sends the interrupt request to the MCU through the pin EXINTO D 7 0 Al nOE 44B0X nWE nRESET EXINTO CSI D D RE USBN9603 WE INTR CS XIN Figure 2 17 USB Circuit Diagram 6 Ethernet Circuit Module 2 USBPORT 3 fiu ILES C2 The Ethernet circuit module is shown in Figure 2 17 The Embest Development system uses REALTEK s 40 Embedded Systems Development and Labs The English Edition RTL8019AS a full duplex Ethernet contro
130. PSR R14 R0 CPSR The other bits of status register are reserved for extension in the future 3 The Command Line Parameters of Id Used in This Lab Ttext org The org is used as the start address of the text segment Org must be a hex number 3 4 5 Operation Steps of the Lab 1 Refer to Step 1 of 3 1 5 Lab A create a new project and name it as ARMMode 2 Refer to Step 2 of 3 1 5 Lab A and the sample source file input the source code of the Lab After the edition finished save the file as ARMMode s 3 Select Project gt Add To Project Files item or right click the project management window and select the same item A dialog will open Select the source file that has just been created 4 Refer to Step 2 of 3 1 5 Lab A finish the related settings Note At the Link Option in the Linker page manually add Ttext 0x0 that specifies the start address of the data segment This is shown in Figure 3 8 5 Refer to Step 5 of 3 1 5 Lab A generate the object code 6 In the Download Address the download address should be the same as the start address at the Linker page 7 Select Debug gt Remote Connection to connect the software emulator Execute the download command open the register window 8 Single step execute the program Watch and record how the value changes in RO and CPSR and in the 36 registers after the value is written Specially notice the value changes in of R13 and R14 in every mode 100 Emb
131. Port E Pin function Port E Pin function Port E Pin function PEO OUTPUT LCD RESERVE PE6 OUTPUT TSP PEI TXDO PE4 OUTPUT TSP PE7 OUTPUT TSP PE2 RXDO PES OUTPUT TSP CODECLK PCONE access address 0X01D20028 PDATE access address 0X01D2002C PUPE access address 0X01D20030 PCONE reset value 0X25529 Table 4 17 Port F PortF Pin function PortF Pin function Port Pin function PFO IICSCL PF3 IN Nand Flash PF6 out Nand Flash IICSDA 4 out Nand Flash PF7 IN bootloader PF2 RESERVED 5 out Nand Flash IN bootloader PCONF access address 0X01D20034 PDATF access address 0X01D20038 PUPF access address 0X01D2003C reset value 0X00252A 147 Embedded Systems Development and Labs The English Edition Table 4 18 Port G PortG Pin function Pin function Port G Pin function PGO EXINTO PG3 EXINT3 PG6 EXINT6 PGI EXINTI PG4 EXINT4 PG7 EXINT7 PG2 EXINT2 PGS EXINT5 PCONG access address 0X01D20040 PDATG access address 0X01D20044 PUPG access address 0X01D20048 PCONG reset value OXFFFF 2 The Description of the Circuit In Table 4 13 PB9 and PB10 pins are defined as outputs and are connected to and LED2 Figure 4 5 shows the circuit connections for the LED1 and LED2 The anodes of LED1 and LED2 are connected to the pin 47 of S3C44B0X which is VDD33 VDD33 pin provides a 3 3V dc voltage The cathodes of LED1 and LED2 are connected to pin 23
132. S3C44B0 chip This development board has memory I O digital LCD display touch screen keyboard IIS Ethernet interface USB interface IIC interface advanced extension including IDE hard disk CF card flash disk etc The Embest software and hardware tools are complete reliable and easy to use These qualities are most needed in an university environment and made us use these tools for Embedded Systems Development and Labs The English Edition our embedded based courses NOTE that other microprocessor and interfacing courses and textbooks can provide the basic background for using the Embest development system The Prerequisites for Studying This Course Series Before studying this course students should have studied courses such as Microcomputer Interfacing C Language Programming and have some basic knowledge of operating systems computer architecture and network protocols The text book series have also presented background knowledge of basic networks protocol touch panel basics keyboard interface programming basic etc Embedded Systems Development and Labs The English Edition Thanks from Radu Muresan I am using this book to teach the Real Time Systems Design course at the University of Guelph Canada I want to thank the Embest engineers Liuchi Zhang Guorui Xu Guangfeng Baidong for their full support during editing the English version of this book They have provided detailed technical support and materials for the a
133. SEGMENT D define DIGIT D SEGMENT SEGMENT SEGMENT D SEGMENT SEGMENT define DIGIT SEGMENT SEGMENT D SEGMENT SEGMENT G define DIGIT B SEGMENT SEGMENT D SEGMENT F SEGMENT E SEGMENT G define DIGIT A SEGMENT A SEGMENT B SEGMENT C SEGMENT SEGMENT E SEGMENT G define DIGIT 9 SEGMENT A SEGMENT SEGMENT SEGMENT SEGMENT define DIGIT 8 SEGMENT A SEGMENT B SEGMENT SEGMENT D SEGMENT F 188 Embedded Systems Development and Labs The English Edition SEGMENT E SEGMENT G define DIGIT 7 SEGMENT SEGMENT C define DIGIT 6 SEGMENT SEGMENT C SEGMENT D SEGMENT SEGMENT E SEGMENT G define DIGIT 5 SEGMENT SEGMENT C SEGMENT D SEGMENT SEGMENT G define DIGIT 4 SEGMENT SEGMENT C SEGMENT SEGMENT G define DIGIT 3 SEGMENT SEGMENT SEGMENT C SEGMENT SEGMENT define DIGIT 2 SEGMENT SEGMENT SEGMENT D SEGMENT SEGMENT P define DIGIT 1 SEGMENT B SEGMENT C define DIGIT 0 SEGMENT A SEGMENT B SEGMENT SEGMENT D SEGMENT E SEGMENT G 8led control register address define LEDS8ADDR volatile unsigned char 0x2140000 name Digit Led Test func 8 segment digit LED test f
134. URXHI 3 Character Send Program void Uart SendByte int data 1 if whichUart 0 if data n while rUTRSTATO amp 0 2 Delay 10 because the slow response of hyper terminal WrUTXHO r j while rUTRSTATO amp 0 2 Wait until THR is empty Delay 10 WrUTXHO0 data else if data n 1 while f UTRSTAT1 amp 0x2 Delay 10 because the slow response of hyper_terminal rUTXHI1 r while frUTRSTAT1 amp 0 2 Wait until THR is empty Delay 10 rUTXHI data 2 RS232 Interface 170 Embedded Systems Development and Labs The English Edition In the schematic of S3CEV40 the serial port circuit is shown as Figure 4 10 The development board provides two serial ports DB9 The UARTI is the main serial port that can be connected to PC or MODEM Because 44B0X didn t provide standard I O signals such as DCD DTE DSR RIC etc the general I O port signals are used UARTO has only 2 lines RXD and TXD that can be used only for simple data transmitting and receiving The full UARTI connects to MAX3243E voltage converter The simple UARTO connects to MAX3221 voltage converter 44B0X MAX3221E DB9 UARTO GPEI IN TOUT 2 GPE2 ROUT 3 RIN MAX3243E DB9 UARTI PCI2 TIN TIOUT PC10 IgPIN T20UT 15 I3IN T3OUT PC13 RIOUT 11 200 R2IN 8 R3OUT R3IN PC9 RAOUT RAIN PC14 R5OUT RSIN Figure 4 10 Serial port circuit signa
135. Uart_Printf n Press any key to continue n Uart_Getch Uart_Printf Memory Test Success n Uart_Printf n lt lt CACHE gt gt Test Y y to continue any key skip it n input char Uart Getch if input char Y input char Test 144 Embedded Systems Development and Labs The English Edition 4 1 7 Exercises Write a program to read and write a consequent RAM memory space using assembly and C language 4 2 Interface Lab 4 2 1 Purpose e Get familiar with the ARM chip and the I O interface devices e Learn to interface the ARM chip with the LED chip 4 2 2 Lab Equipment e Hardware Embest S3CEV40 hardware platform Embest Standard Power Emulator PC e Software Embest IDE 2003 Windows 98 2000 NT XP operation system 4 2 3 Content of the Lab The ARM chip I O ports are normally used with other I O pins Get familiar with the method of configuring the ARM port via programming Implement the lighting and winking LED1 LED2 of the hardware board 4 2 4 Principles of the Lab The S2C44B0X has 71 multi functional I O pins that combine 7 groups of I O interfaces 2 nine bits I O interface port E and F 2 eight bits I O interface port D and G 1 sixteen bits I O interface port C 1 ten bits I O interface port A 1 eleven bits I O interface port B Each of the port can be configured through registers by software to meet the requirements of different configuratio
136. _WrL3Addr 0x14 0 DATAO 000101xx 00 _WrL3Data 0x0A 0 record if mode _WrL3Addr 0x14 2 STATUS 000101 10 _WrL3Data 0xa2 0 1 0 1 0 0 0 10 OGS 0 IGS 1 ADC_NI DAC_NI sngl speed AonDoff _WrL3Addr 0x14 0 DATAO 000101xx 00 WrL3Data 0xc2 0 11000 010 DATAO Extended addr 010 _ WrL3Data 0x44 0 010 011 01 DATAO MS 9dB 1 Ch2 off record SF SF SF SF SF SF name _ WrL3Addr func write control data address to 1341 through L3 interface para data control data address ret none modify comment void WrL3Addr U8 data 1 U32 vPdata 0x0 L3D L U32 vPdatb 0x0 L3M L in address mode L3C L 532 1 vPdatb L3M L rPDATB L3C L3C H for j 0 j lt 4 j tsu L3 gt 190ns E PA9 L3D PG6 L3M PG7 L3C for 1 0 1 lt 8 i 1 265 Embedded Systems Development and Labs The English Edition if data amp 0x1 if data bit is H 1 IPDATB vPdatb L3C L rPDATA L3D L3D H for j 0 j 4 j tey L3 gt 500ns L3C L3C H rPDATA L3D L3D H for j 0 j 4 j tey L3 gt 500ns else if data bit is L 1 IPDATB vPdatb L3C
137. accept one interrupt request at one time In another word when SB2 is pressed the CPU will not process the EXINT interrupt routine that was generated by pressing SB7 until the EXINT6 interrupt routine is processed Please note this functionality in the operation of the Lab The 8 SEG LED display circuit is not given here If needed please refer to the 8 SEG LED Display Lab presented in Section 4 6 LEDI NGCS4 NGCS5 S3C44B0X Figure 4 6 Interrupt Circuit 4 3 5 Operation Steps 1 Prepare the Lab environment Connect the Embest Emulator to the target board and turn on the power supply of the target board 2 Open the ExInt4567 ews project file that Is located in the EmbestIDE Examples Samsung S3CEV40 ExInt4567 directory Compile and link the project connect to the target board and download the program Please note that the common ev40boot cs must be used as a command file to configure the memory before the download can take place 3 Select View Debug Windows Register or press Alt 5 In the Register window select peripheral register Peripheral Open the INTERRUPT registers watch the value changes in the INTPND and I ISPR registers as shown in Figure 4 7 161 Embedded Systems Development and Labs The English Edition Per I ISPR 0 00000000 PLLCON 6x66638621 INTERRUPT INTCON 9 00000003 INTPND 6x6668466c INTHOD 9 00000000 INTHSK OxO3FFF
138. ady when SCL is low The data will be transferred in 8 bit unit that begin with MSB bit The time sequence diagram is shown is Figure 6 2 Figure 6 2 IIC Time Sequence Diagram 3 EEPROM Read Write Operation 1 24 04 Architecture and Application 24 04 consists of an input buffer and an EEPROM array Because the write time is 5 10ms if data is written to the EPROM directly from the data bus there will be a 5 10ms wait time for every byte that needs to be written in To speedup the writing operation the EEPROM has an input buffer In this case the write operation is actually a write operation to the buffer After the data is loaded into the buffer an automatic writing logic will be 231 Embedded Systems Development and Labs The English Edition launched to write all the data from the buffer into the EPROM array Writing to buffer is called page writing The capability of the buffer is called page write byte The page write byte of AT24C04 is 8 It occupies the lowest three bits of the address line When the amount of data is not exceeding the page write byte the write operation to EPROM is the same as the write operation to SRAM When the amount of data is exceeding the page write byte another write operation to EPROM will be initiated after a 5 10ms wait time 2 Device Address DADDR The AT24C04 device address 15 1010 3 AT24CXX Data Operation Format In order to write or read the EPROM memory both the device address
139. ak oF ak ake SF SF SF SF SF ae ae ae ae ae e e eak oR ak 2 ake ake a akk akk akk OF akk akk 2 2 SF ale name Lcd Active func clear LCD screen para none ret none modify comment SF SF SF void Lcd Active Clr void 1 INT32U i INT32U pDisp INT32U LCD ACTIVE BUFFER 205 Embedded Systems Development and Labs The English Edition for i 0 i lt SCR XSIZE SCR YSIZE 2 4 i 1 WHITE 2 Draw Line Functions A 2 name Lcd Draw HLine func Draw horizontal line with appointed color para usX0 usY0 line s start point coordinate usX1 line s end point X coordinate ucColor appointed color value usWidth line s width ret none modify comment ak eak ak ak ak ak ak ak a SF SF SF SF ae ae sk 2k e keak ak void Lcd Draw HLine INT16 usX0 INT16 usX1 INT16 usY0 INT8U ucColor INT16U usWidth INT16 usLen if usX1 lt 05 0 GUISWAP usX1 usX0 j while usWidth gt 0 usLen usX1 usX0 1 while usLen gt 0 LCD PutPixel usXO0 usLen usY0 ucColor j usY0
140. al cable provided by the Embest development system 2 Run the PC Hyper Terminal set to 115200 bits per second 8 data bits none parity 1 stop bits none flow control 3 Connect the Embest Emulator to the target board Open the TouchScreen test ews project file found in the TouchScreen sub directory of the Examples directory After compiling and linking connect to the target board and download the program 4 Watch the main window of the hyper terminal the following information should be displayed Pixel 320 X 240 Coordinate range designing Touch screen coordinate range in Xmix Ymin is 0200 0120 Xmax Y max is 0750 0620 To use current settings Press N n key Want to set again Y N 223 Embedded Systems Development and Labs The English Edition The information gives the current valid coordinate range These are factory default values The user can select to calibrate TSP again Otherwise use the default value When calibrating the TSP is selected any two points of the diagonal should be pressed using a finger or a small stick The hyper terminal will show the coordinate values that the user inputted and will decide if they are valid The touch screen program will output the new coordinate values The user can accept them or calibrate the screen coordinates again The hyper terminal will show the following Touch TSP s corner to ensure Xmax Y max Xmin Ymin User touch coordinate X Y is
141. al is based on the Embest ARM Labs System development platform hardware which uses an ARM processor as its core The Lab manual is a complete teaching and training tool for developing Embedded Systems The book contains 22 Labs that include Labs for the embedded software development fundamentals Labs for basic interfaces Labs for human machine interface Labs for communication and audio interfaces Labs for uC OS II embedded real time operating system porting and application etc This book offers many examples for the embedded system learners The Labs form an embedded system teaching or training tool and are introduced in a gradual manner from simple to complex applications that are close related to the engineering world This book is accompanied by a free CD that contains the Embest IDE Pro Education Version software produced by Embest Inc This book can be used as a Lab teaching material for embedded and real time embedded systems at undergraduate or graduate level with majors in Commuter Science Computer Engineering Electrical Engineering or for professional engineers Embedded Systems Development and Labs The English Edition About the Editor of the English Version of the Embedded System Development and Labs Radu Muresan is the editor of the English version of the Embedded System Development and Labs book offered first in Chinese by Embest as an accompaniment book to their ARM development platform Radu Muresan has a PhD in Electri
142. ank5 are fixed The start address of Bank 6 is fixed but its size is changeable Bank 7 memory can be configured as 2 4 8 16 32 Mb and its start address and size are not fixed The detailed relationship between the memory address and memory size of Bank 6 and Bank 7 memory is shown in Table 4 1 133 Embedded Systems Development and Labs The English Edition SROMDRAM SDRAM nGCS7 SROMDRAMISDRAM nGCS6 0 0 00_0000 o8 nGCS5 Ox0 aO0 0000 Lom nGCS4 Refer to Table 4 1 256MB SA 27 0 Accessable Region I SROM nGCS3 0x0600_0000 nGCS2 Ox0400 0000 nGCS1 Ox0200 0000 OxO1c0 0000 SROM nGCS0 Ox0000 0000 Special function Registers 4M bytes NOTE SROM means ROM or SRAM type memory Note SROM means ROM or SRAM Figure 4 1 S3C44B0X Memory Space after reset Table 4 1 Bank6 Bank7 Addresses T ze A me Start address 0 00_ 0000 OxcOO 0000 OxcOO 0000 0 00 0000 0 00_ 0000 End address oe Bank 7 0 20 0000 Oxc40 0000 0000 00 0000 Oxe00 0000 End address 1 Big Small Endian Selection While nRESET is L the ENDIAN pin defines which endian mode should be selected If the ENDIAN pin is connected to Vss with a pull down resistor the little endian mode is selected If the pin is connected to Vdd with a pull up resistor the big endian mode is selected This is shown in Table 4 2 2 Bank0 Bus
143. arm MOV ADR BX thumb Tstart LDR LDR MOV blockcopy LSR BEQ PUSH quadcopy LDMIA STMIA SUB BNE POP copywords MOV AND BEQ wordcopy LDMIA STMIA SUB BNE sp 0x400 r0 Tstart 1 rO r0 sre rl dst r2 num 13 12 2 copywords r4 r7 0 r4 r7 r1 14 77 1 quadcopy r4 r7 13 3 I2 r3 stop r0 r3 r1 r3 r2 1 wordcopy Set number of words to be copied Subsequent instructions are ARM header set up user mode stack pointer 113 Processor starts in ARM state so small ARM code header used to call Thumb main program Subsequent instructions are Thumb r0 pointer to source block r pointer to destination block r2 number of words to copy number of four word multiples less than four words to move save some working registers load 4 words from the source and put them at the destination decrement the counter copy more don t need these now restore originals bottom two bits represent number of odd words left to copy No words left to copy a word from the source store a word to the destination decrement the counter copy more 96 Embedded Systems Development and Labs The English Edition stop B stop align src Jong 1 2 3 4 5 6 7 8 1 2 3 4
144. as control bits When exception happens the control bits can be changed when the processor working at the supervisor mode these bits can be changed by software e Interruption disable bit The I and bits are the interrupt disable bits When set these disable the IRQ and FIQ interrupts respectively e The T bit This reflects the operating state When this bit is set the processor is executing in THUMB state otherwise it is executing in ARM state The instructions that can switch the states between ARM and Thumb can be used freely e Mode Bits The 4 M2 MI and MO bits M 4 0 are the mode bits These determine the processor s operating mode as shown in Table 3 3 99 Embedded Systems Development and Labs The English Edition Table 3 3 ARM Work Modes M 4 0 Visible THUMB state Visible ARM state registers registers 10000 User R7 RO PC CPSR 10001 FIQ R7 R0 LR fiq SP tiq PC CPSR SPSR fiq 10010 IRQ R7 RO LR irq SP_irq CPSR SPSR LR svc SP svc PC CPSR SPSR svc 10111 Abort R7 RO PC CPSR SPSR abt 11011 Undefined R7 RO LR_und SP_und PC CPSR SPSR_und 11111 System R7 RO LR SP PC CPSR 3 Other Bits R14 R0 CPSR 7 R14 fiq R8 fiq PC CPSR SPSR fiq R12 R0 R14 irq R13 PC CPSR SPSR R12 R0 R14 svc R13 svc PC CPSR SPSR svc R12 R0 R14_abt R13_abt PC CPSR SPSR abt R12 R0 R14_und R13_und PC C
145. ator supported download speed is valid when you select the download speed for emulators Power ICE for ARM supports all speeds x Settings For Processor Remote Debug Directory Compiler Assemb E amp g Workspace led swing 2 r Bemotedevice swing files PowerlCEARM7 j ASM Source Embest PowerlCE for ARM amp Link Script er 1142841 led_swing_flash files J Source 29 ASM Source Speed 1 Link Script Full Speed ad TN Figure 2 34 Embest Power ICE for ARM Emulator Download Speed Support 55 Embedded Systems Development and Labs The English Edition 3 Debugging Settings The debug related settings are shown in Figure 2 35 There are the following three options 1 General Download file Symbol file name and its directory Symbol file includes debug information Normally symbol file is an elf format file or a coff format file Action after connected There are three ways for selection gt None No actions after the IDE connected to target gt Auto download After the IDE is connected to the target the file will be automatically downloaded to the board gt Command script After the IDE is connected to the target a script file will be executed first 9 1 ASM Source H Link Script term_eb55 files J J C Source 9 20 ASM Source H Link Script E term eb63 files
146. ber The damaged package will be re transmitted The TCP sends its package to the higher layer programs such as Telnet service program or client programs Application programs will alternatively send the message back to the TCP layer The TCP layer will send the message down to the lower IP layer device driver and physical media and at last to the end receiver The format of the TCP protocol data package header is shown in Figure 6 15 IUJAIP SIF Reserved R C S Y I Window IGIK HININ Checksum Emergency Pointer Figure 6 15 TCP Protocol Data Package Header Format For detail information about the TCP protocol please refer to the related documentations A TCP session is established by a three times handshake initialization The purpose of three times handshake initialization is to synchronize the data transmission inform other hosts about the data quantity it can be received at one time and establish the virtual connection The simplified process of three times handshake initialization is as following 1 Initialize the host and send a session request 2 The receiver host replies by sending a data segment with the following items synchronization flag the 250 Embedded Systems Development and Labs The English Edition series number of the data that will be sent acknowledgment with the next series number of next data segment that will be received 3 Request the host to send another data segment with a
147. bug Optimization Settings The compiler debug optimization setting is shown in Figure 2 41 Project Settings Settings For Debug Directory Compiler Assembler Linker gt E S TEN led Swing 1 F Category DebugiOptimisation a Source Debug Options i led swing c 5 1 ASM Source cstartup s Iv Generate DWARF 1 format debug output amp wait irq s 2C Link Script Generate DV AHE 2 debug output 8 Idscript m objdump Jo Generate extended DWARF I format debug output Generate default debug format output Optimization Options B Compile Options 02 gdwarf unused c I targets at91 S SOURCE FILE o AXdebugiS OBJ FILE Figure 2 41 Compiler Debug Optimization Settings 60 Embedded Systems Development and Labs The English Edition d Compiler Target Specific Options Settings The compiler target specific options setting is shown in Figure 2 42 Project Settings c mEETEP CC i Target Specific Options 3 Source 9 No Specified mthumb interwork 02 gdwarf Wunused c 1 Margetsyat91 S SOURCE FILE o AdebugiS OBJ FILE Figure 2 42 Compiler Target Specific Options Settings e Compiler Code Generation Settings The code generation setting is shown in Figure 2 43 61 Embedded Systems Development and Labs The English Edition Project Settings Settings For Debug Directory Compiler Assembler Linker 4 oe
148. c Table 4 21 Interrupt Control Register Bit Description Pr bit disables enables vector mode for Vectored interrupt mode 1 Non vectored interrupt mode bit enables IRQ interrupt request line to CPU RQ interrupt enable 1 Reserved Note Before using the IRQ interrupt this bit must be cleared This bit enables interrupt request line to CPU 0 FIQ interrupt enable Not allowed vectored interrupt mode 1 Reserved Note Before using the FIQ interrupt this bit must be cleared NOTE FIQ interrupt mode does not support vectored interrupt mode 2 Interrupt Pending Register INTPND Each of the 26 bits in the interrupt pending register INTPND corresponds to an interrupt source When an 158 Embedded Systems Development and Labs The English Edition interrupt request is generated the corresponding interrupt bit in INTPND will be set to 1 The interrupt service routine must then clear the pending condition by writing 1 to the corresponding bit of I ISPC F ISPC When several interrupt sources generate requests simultaneously the INTPND will indicate all interrupt sources that have generated an interrupt request Even if the interrupt source is masked by INTMSK the corresponding pending bit can be set to 1 Table 4 23 Interrupt Pending Register Register Address RW Description Reset Value INTPND 0 01 00004 Indicates the interrupt request stat
149. cRWramtest void 1 unsigned long 0x0c010200 RWram unsigned short ptrh 0x0c010200 RWram unsigned char ptrb 0x0c010200 RWram char i unsigned char tmpb unsigned short tmph unsignedlong tmpw ptr 55 55 tmpw ptr Read by Word ptr tmpw l1 Write by Word tmph ptrh Read by half Word ptrh tmph 1 Write by half Word tmpb ptrb Read by half Byte ptrb tmpbt 1 Write by half Byte main c source code define RWNum 100 define RWBase 0x0c030000 function declare void Test MEM void void main void 142 Embedded Systems Development and Labs The English Edition extern function extern void sRWramtest void SF SF func code entry para none ret none modify comment ak aek ak ak ak ak ak ak void main void 1 Sys init Initial 44BOX s Interrupt Port and UART _LinkQ Print Misc info Test Uart_Printf n Press any key to exit Memory Test n Uart_Getch asm mov pc 0 return void Test MEM void 1 int i step volatile char input char Printf n Memory Read Write Access Test n Uart_Printf n Memory Read Write ASM code Test n
150. cal and Computer Engineering from the University of Waterloo Canada and is currently an assistant professor at the University of Guelph Canada He is currently teaching the Real Time Systems Design course in the School of Engineering using the Embedded System Development and Labs book and the Embest development platform and tools Embedded Systems Development and Labs The English Edition FOREWORD The Evolution of the Embedded Technology The embedded systems based on 8 bits single chip microprocessors have already being used in many fields Even today most of the embedded applications are still belonging to the early stage of embedded system A general characteristic of these applications is that they include a MCU micro controller unit sensors monitoring or testing devices service systems display devices etc Also these applications have functions such as testing displaying processing and automatic control of information In some industrial control applications such as automobile electronic systems and intelligent home electronic devices these MCUS are interconnected in a network through common buses such as CAN RS 232 RS 485 etc This kind of network has limited applications The related communication protocols are relatively simple and excluded to the Internet that 15 being widely used Today Internet has become a fundamental communication system that is serving the society and also becomes an important way of exchanging informat
151. cation development an overview of ARM technology ARM instruction set the foundation of embedded program design based on ARM development samples based ARM open sourced real time operating system uC OS II and uCLinux porting and application software development The readers can completely master the basic concepts and the design flow of developing an embedded system the embedded software development skills based on ARM the basic concept of porting and application development of embedded operating systems Embedded System Application Development and Labs Textbook Compound with Embest ARM Labs System Compound with Multimedia Teaching Demo Modules Major Contents The embedded system application development Labs is based on the Embest ARM development system The Labs are coordinated with the course textbook Embedded System development and Applications The Labs include five parts basic labs for embedded development basic device interfacing labs complex human machine interfacing labs communication and voice interface labs embedded RTOS Real Time Operating Systems porting and application development These five parts have 22 Labs in total The labs increase in their difficulty as the book progresses through more material The labs are very practical and target real world applications The readers can quickly master the skills that are needed to develop real projects The purpose of this book is to develop students creation ability design ab
152. ce The setting of symbol file should be the same as the download file The user can copy the system default output file setting from the Linker page the download address of the Lab 1 is 0x8000 that is the start address of the text segment used by GNU as assembler Because the Assembler and Linker page doesn t need setting the default values are used So the start address of text segment is started from 0x8000 7 Select Debug Remote Connect Select Debug gt Download Open the Register window by clicking the Register window in the tool bar 8 Open the Memory window watch the content in the address 0x8000 0x801F and the content in the address OxFFO OxFFF 9 Single step to execute the program and watch and record the values in the memory 10 Watch the program run and study the related technical details Get a good understanding of the usage of the ARM instructions 11 After understanding and mastering the Lab A do the exercises at the end of the Lab 1 83 Embedded Systems Development and Labs The English Edition Processor Remote Debug Directory Compiler Assemb 4 M Essen Directory EESTI ESSERE d p load Category General nen Download file CAEmbestiDE Exampl Tideb CAEmbestiDEVExamplestasmTidebuglasmi elf mn DEV cemple dias eugiat El Download verify Action after connected Download address Execute program from None 080
153. cknowledges series number and acknowledge number 3 UDP Protocol UDP is at the same layer as the TCP protocol UDP do not perform data package series error checking or retransmission As a result UDP is not used to virtual circuit services or connection oriented services UDP is mainly used by those polling answer services NFS for example These services require less information exchanging than FTP or Telnet UDP services include NTP Network Time Protocol and DNS DNS also use The header of UDP package is shown at Figure 6 16 UDP Datagram Length UDP Datagram Checksum Figure 6 16 UDP Protocol Data Package Header Format For more detailed information please refer to related RFC documentation UDP protocol is often used in software applications that don t need acknowledgment and that transmit small amounts of data 4 ICMP Protocol ICMP is at the same layer as the IP protocol and is used to transmit the IP control message It is mainly used to provide route information of the target address The Redirect message of ICMP provides more accurate route information for the host that connects to other systems The Unreachable message means routing problems If a route cannot be used ICMP can decently terminate a TCP connection PING is the most often used ICMP based service For more detailed information about ICMP please refer to the related RFC documentation 5 ARP Protocol In order to communicate between networks a
154. content in the Memoryl window Single step execute the program and watch the changes in Memory 1 window According to the program master the method of visiting memory using assembly language 7 When the program stops at the line ptr 0xAA55AA55 watch the content in the Memory2 window Single step execute the program and watch the changes in Memory2 window According to the program master the method of visiting memory using C language 8 After understanding and mastering the lab finish the Lab exercises 4 4 6 Sample Programs 44binit s 44blib c these source files can be found in the Samsung S3CEV40 Common directory RWrams s source code RAM read write using assembly language sRWramtest LDR 12 RWBase LDR 13 0x55AA55AA STR 13 12 LDR 13 12 Read by Word ADD 13 73 21 STR 13 r2 Write by Word LDR 12 RWBase LDRH 13 12 Read by half Word ADD 13 03 21 STRH 13 12 2 Write by half Word STRH r3j r2 LDR 12 RWBase LDRB 13 r12 Read by half Byte LDRB 13 0xDD STRB 13 12 1 Write by half Byte LDRB r3 0xBB STRB 13 r2 1 141 Embedded Systems Development and Labs The English Edition LDRB 3 0 22 STRB 13 12 1 LDRB 13 0x11 STRB r3 r2 mov The LR register may be not valid for the mode changes RWramc c source code RAM read write using C language define RWram unsigned long 0x0c010200 void
155. controller scan line is started from the left top corner of the LCD panel The displayed data is VD 7 0 The correspondence between the VD bits and the RGB color digits is shown in Figure 5 7 VD vD6 vD5 vD4 vD3 vD2 VD1 VDO R1 G1 B1 R2 2 2 G3 1 Figure 5 7 8 bit Single Scan 194 Embedded Systems Development and Labs The English Edition 4 Data Storage and Display The data transferred by LCD controller represent the attribute of a pixel 4 gray scale screens use 2 bits data 16 gray scale screens use 4 bits data Color RGB screen uses 8 bits data R 7 5 G 4 2 B 1 0 The data stored in the display buffer should meet the configuration requirement of hardware and software specifically the length of data The data storage of 4 bit Single Scan and 8 bit Single Scan are shown in Figure 5 8 The data storage of 4 bit Dual Scan is shown in Figure 5 9 A 31 A 30 A 29 AJO B 31 B 30 0 C 31 C 0 Mono 4 bit Single Scan Display amp 8 bit Single Scan Display Video Buffer Memory Address Data 0000H A 31 0 0004H B 21 0 0008H C 31 0 Figure 5 8 4 bit Single Scan and 8 bit Single Scan Video Buffer Mernory A 31 A 30 A O B 31 B 30 Address Data 0000H A 31 0 0004H 31 0 L 21 L 30 M 31 M 20 MIO 1000H L 31 0 1004H M 31 0 Figure 5 9 4 bit Dual Scan In 4 level gray mode 2 bits of video data correspond t
156. ction Set Code Table B 2 Multiplex and Other Read Write Memory Instructions Table B 3 Other Instructions Table B 4 Thumb Instruction Set Code Figure B 1 Thumb Instruction Set Code 288 Embedded Systems Development and Labs The English Edition Appendix C Embest ARM Related Products 1 EmbestIDE 2 Flash Programmer 3 ARM JTAG Emulator 1 Embest Easy ICE for ARM 2 Embest Emulator for ARM 3 Embest PowerICE for ARM Figure C 1 Standard Emulator Figure C 2 Enhanced Emulator 4 ARM Development Boards 1 Embest S3CEV40 Full Function Development Board Figure C 3 2 Embest AT91EB40X Development Board Figure C 4 3 AT91EB55 Development Board Figure C 5 4 AT91EB63 Development Board Figure C 6 5 NET START Development Board Figure C 7 6 ML674000 Development Board Figure C 8 289 Embedded Systems Development and Labs The English Edition Appendix D Content of CD ROM 1 Content of CD ROM 2 CD ROM directory architecture 3 Usage of CD ROM 290 Embedded Systems Development and Labs The English Edition Reference Documentations ye tes 14 15 ARM Ltd ARM Architecture Reference Manual 2000 ARM Ltd The ARM Thumb Procedure Call Standard 2000 ARM Processor Architecture and Embedded Application Basics Translated by Zhongmei Ma Guangyun Ma Yinghui Xu Ze Tian Beihang Press 2002 Steve Furber Shystem on Chip Architecture Second Edition Addison Wesley 2000 Jean J Lambrosse
157. d Rtc_Tick void attribute interrupt IRQ 2 Time Tick Control Program void Test Rtc Tick void 1 pISR_TICK unsigned Rtc_ Tick rINTMSK BIT GLOBAL BIT TICK sec tick l rTICINT 127 1 lt lt 7 START void Rtc_Tick void 1 rl ISPC BIT TICK Uart_Printf b b b b b b b 03d sec sec_tick 3 Timer Configuration Control Program char check RTC void 1 char alr 0 check RTC code char 0x59 while yn 0x0d yn 0x59 yn 0x79 RTC_alr 0 1 Uart_Printf n Check Y N yn Uart_Getch if yn 0x4E yn 0x6E yn 0x59 yn 0x79 SendByte yn if yn 0x0d yn 0x59 yn 0x79 alr Test_Rtc_Alarm Display Rtc else break 181 Embedded Systems Development and Labs The English Edition if RTC alr break alr Test Alarm Display Rtc return char USE RTC void 1 char yn tmp 1 N09 1 char num0 0x30 0 char num9 0x39 9 char schar 0 char sSDATE 12 Xxxx Xx xx x char sSTIME 8 xx xx xx if check RTC 1 Uart_Printf n RTC Working now To set time Y N yn Uart_Getch if yn 0x4E yn 0x6E yn 0x59 yn 0 79 SendByte yn if yn 0x0d yn 0x59 yn 0x79 want to set time 1 IMMA Uart_Printf nCurrent day is 04x 02x 02x s To set day yy mm dd w year month day date w
158. d r3 13 1 add r4 r4 1 add r5 r5 1 add 1 subs r0 r0 1 bne loopO ADR RO Thumb Entry l BX RO thumb thumb Thumb Entry mov r0 count mov rl 0 mov r2 0 mov r3 0 mov r4 0 mov r5 0 mov 0 loopl add rl 1 add 12 1 add r3 1 add r4 1 add r5 1 add 1 sub r0 1 bne loopl bl Thumb function end 3 random s Random number generator This uses a 33 bit feedback shift register to generate a pseudo randomly ordered sequence of numbers which repeats in a cycle of length 2 33 1 NOTE randomseed should not be set to 0 otherwise a zero will be generated 130 Embedded Systems Development and Labs The English Edition continuously not particularly random This is a good application of direct ARM assembler because the 33 bit shift register can be implemented using RRX which uses reg carry An ANSI C version would be less efficient as the compiler would not use RRX AREA Random code CODE READONLY GLOBAL randomnumber randomnumber on exit al low 32 65 of pseudo random number 2 high bit 1f you want to know it LDR Ip seedpointer LDMIA ip al a2 TST a2 a2 LSR 1 to bit into carry MOVS a3 al RRX 33 bit rotate right ADC a2 a2 a2 carry into LSB of a2 EOR 33 a3 al LSL 12 involved i EOR al a3 a3 LSR 20 similarly involved STMIA ip al a2 MOV pe Ir seedpoint
159. d ret address MRS r4 CPSR STMFD r4 save current PSR MRS r4 SPSR STMFD r4 Y YY save SPSR OSPrioCur OSPrioHighRdy LDR r4 addr OSPrioCur LDR r5 addr OSPrioHighRdy LDRB r6 r5 STRB r6 r4 Get current task TCB address LDR r4 addr OSTCBCur LDR r5 r4 STR sp r5 store sp in preempted tasks s TCB Get highest priority task TCB address LDR r6 addr OSTCBHighRdy LDR r6 LDR sp r6 get new task s stack pointer OSTCBCur OSTCBHighRdy STR r6 r4 set new current task TCB address LDMFD spl r4 YYY Embedded Systems Development and Labs The English Edition 274 Embedded Systems Development and Labs The English Edition AND r4 r4 20 ORR r4 r4 0x13 MSR SPSR cxsf r4 LDMFD sp 14 YYY AND r4 r4 0xFFFFFF20 ORR r4 r4 0x13 MSR CPSR cxsf r4 Idr 0 0 4000000 BL SysENInterrupt LDMFD sp 10 112 Ir pc Exercises 1 Expand the function of uC OS II Add time calculation of task switching 2 Trace OsTickISRQ function Watch the task switching process in timer pacing 7 2 uC OS Application Lab 7 2 1 Purpose e Get familiar with the uC OS II boot flow e Get familiar with the uC OS II task management e Learn how to use the inter task communication synchronization and memory management functions provided by uC OS II 7 1 2 Lab Equipment e Hardware Embest S3CEV40 ha
160. d sends this data to the lower layer The IP data package is not reliable because IP does not support mechanisms to check the data integrity and the transmission order of the packages The IP data package has its sender s IP address source address and its receiver s IP address target address IP protocol is a non connection protocol and is mainly responsible for addressing between the hosts and setting the route for data packages Before the data is exchanged it doesn t establish sessions because it doesn t guarantees error free data transfers On the other hand when data is being received IP doesn t need to receive acknowledgment information As a result the IP protocol is not a reliable protocol If the IP address is for the current host the IP will send the data directly to this host If the IP address is for a remote host the IP will check 247 Embedded Systems Development and Labs The English Edition the route of the remote host from the route table in the local host like we dial 114 If a route is found the IP will use this route to transfer data if no route is found the data package will be sent to a default gateway of the source host this gate way is also called a router The current IP protocol includes the IPv4 version and the v6 version IPv4 is currently being widely used IPv6 is the basic protocol that will be used in the next generation of high speed Internet The header of IP protocol is shown in Figure 6 14 Version
161. de default Big endian mode Use the 32bit APCS Use the 26bit APCS 10 FP architecture 11 FP architecture No FP multiple Instructions No FP Instructions The code is position independent or reentrant Assemble Options mthumb interwork mthumb gdwarf2 S SOURCE FILE o debug OBJ_FILE Figure 3 19 Select Setting the Output Format of the Target Code of Assembly Programs 4 Use elf2bin to convert the elf file into bin file Compare the source code and objdump file in the IDE and get a better understanding of the linking location of the source code 128 Embedded Systems Development and Labs The English Edition 5 Single step execute the ARM and Thumb mutual call disassembled programs analyze the status changing process of ARM core 6 After understanding and mastering the lab finish the Lab exercises 3 8 6 Sample Programs 1 arm c extern char arm 20 static void delay int time 1 int i j 0 1 0 i lt time i 1 for j 0 j lt 1000 j k void arm function void 1 int i char p Hello from ARM world for i 0 1 lt 20 i arm i p delay 10 2 entry s equ count 20 global Thumb function text mov r0 count mov rl 0 mov r2 0 mov r3 0 mov r4 0 mov r5 0 mov 0 loop0 add rl rl 1 129 Embedded Systems Development and Labs The English Edition add r2 12 1 ad
162. ding errors generated in writing or debugging the software It is a direct reference for the software engineers to find out the software inefficiency and optimize the software The content of the objdump includes code location for example the definition and distribution of the text segment data segment and other segments program address space distribution hardware instruction lines and assembly code variables and label location The following is a part of objdump file INT testelf file format elf32 littlearm Disassembly of section text 0x0c000000 lt Entry gt 000000 ea000125 b 00049 lt gt 000004 ea00005d b c00180 lt HandlerUndef gt 000008 000062 b c00198 lt HandlerSWI gt c00000c ea00006d c001c8 HandlerPabort 000010 ea000066 b c001bO HandlerDabort c000014 eafffffe b c00014 Image RO 0 14 gt c000018 62000052 b c00168 lt HandlerIRQ gt 00001 ea00004b b c00150 lt HandlerFIQ gt 3 The last Work of Software Development For the software project that has passed debugging use elf2bin tool to convert it to a bin file The Embest online Flash Programmer can download the bin file to the hardware ROM space This software can be watched in a read hardware environment This is the last step of software development 125 Embedded Systems Development and Labs The English Edition After the software is burnt into the hardware the users can use the hardware debuggin
163. e 4 Example of Vectored Interrupt Mode In the vectored interrupt mode CPU will branch to each interrupt address when an interrupt request is generated As a result at the corresponding interrupt address there must be a branch instruction that jumps to the corresponding ISR ENTRY b ResetHandler 0x00 b HandlerUndef 0x04 b HandlerSWI 0x08 b HandlerPabort 0xOc b HandlerDabort 0x10 0x14 b HandlerIRQ 0x18 b HandlerFIQ 0 1 ldr pc HandlerEINTO 0x20 ldr pc HandlerEINT1 ldr pc HandlerEINT2 ldr pc HandlerEINT3 ldr pc HandlerEINT4567 ldr pc HandlerTICK 0x34 b b ldr pc HandlerZDMAO 0x40 ldr pc HandlerZDMA1 ldr pc HandlerBDMAO ldr pc HandlerBDMA 1 ldr pc HandlerWDT ldr pc HandlerUERRO1 0x54 b b ldr pc HandlerTIMERO 0x60 ldr pc HandlerTIMER1 ldr pc HandlerTIMER2 ldr pc HandlerTIMER3 ldr pc HandlerTIMER4 ldr pc HandlerTIMERS 0x74 157 Embedded Systems Development and Labs The English Edition b b ldr pc 7HandlerURXDO 0x80 ldr pc HandlerURXD1 ldr pc HandlerlIC ldr pc HandlerSIO ldr pc HandlerUTXDO ldr pe HandlerUTXD1 0x94 b b ldr pc HandlerRTC 0xa0 c c c c cc ldr pc HandlerADC Oxb4 5 Interrupt Controller Special Registers 1 Interrupt Control Register INTCON Table 4 21 Interrupt Control Registers Register Address RW Description J Reset Valuo INTOON 0x01E00000 RW Interrupt control Register O
164. e 5 3 Link Script A A Margetsiat91 objdump Margetsyat9Tipartsiym63200 4 targets at9 1 targets eb63 Include Directories Object files location Predefines 63200 1 91 63 1 91_ _1 1 Assemble Options S SOURCE FILE AT91M63200 1 defsym AT91EBB3 1 defsym AT91 DEBUG ICE 1 1 A A Margetslat91 1 targets at9 1 parts m63200 A A Margetslat9TytargetsYeb63 o debug OBJ_FILE OK Cancel g Figure 2 44 Assembler General Settings b Assembler Code Generation Settings The assembler warning setting is shown in Figure 2 45 Project Settings Settings For Remote Debug Directory Compiler Assembler Linker 4 Pe z m Source H ASM Source Link Script S objdump Iv Generate DWARF2 debugging information Generate listing file Keep local symbols Assemble in compatibility mode Strip local absolute symbols Assemble Options gdwarf2 defsym AT91M63200 1 defsym 91 63 1 defsym AT91 DEBUG ICE 1 I targets at91 1 targets at9 1 parts m63200 1 targets at91 targets eb63 S SOURCE FILE TUN El Figure 2 45 Code Generation Settings 63 Embedded Systems Development and Labs The English Edition Assembler Target Specific Settings The assembler target specific setting is shown in Figure 2 46 Project Setti
165. e 32 bits wide e 6 status registers The status registers are also 32 bit wide but only 12 bits are used The registers are arranged in partially overlapping banks with a different register bank for each processor mode At any time 15 general purpose registers RO to R14 one or two status registers and the program counter are visible Here we study only the general registers The status registers will be studied in Section 3 2 4 1 ARM General Registers The general purpose registers RO R15 can be split into 3 groups These groups differ in the way they are banked and in their special purpose uses A The unbanked registers RO R7 This means that each of them refers to the same 32 bit physical register in all processor modes They are completely general purpose registers with no special uses implied by the architecture and can be used wherever an instruction allows a general purpose register to be specified B The banked registers R8 R14 The physical register referred to by each of them depends on the current processor mode Where a particular physical register is intended without depending on the current processor mode a more specific name as described below 15 used Almost all instructions allow the banked registers to be used wherever a general purpose register 15 allowed Registers R8 to R12 have two banked physical registers each One is used in all processor modes other than FIQ mode and the other is used in FIQ mode Wher
166. e 4 5 Bank Control Register BANKCONn nGCS0 nGCS5 Register Ames Description T Reset vas BANKCON4 0 01 80014 Bank 4 control register 0 0700 BANKCONS 0x01C80018 Bank 5 control register 0 0700 BANKCON6 0 01 8001 Bank 6 control register BANKCON7 0x01C80020 Bank 7 control register Table 4 6 Refresh Control Register RW REFRESH 0x01C80024 RW DRAM SDRAM refresh control register 0 0000 136 Embedded Systems Development and Labs The English Edition Table 4 7 Banksize Register BANKSIZE 0 01 80028 Flexible bank size register Table 4 8 SDRAM Mode Register Set Register MRSR Register Address RW Description Reset Value MRSRB6 0 01 8002 Mode register set register banks MRSRB7 0 01 80030 Mode register set register bank For the detailed definition of the above registers please refer to S3C44B0X specification The following is an example of the 14 memory control registers settings ldr r0 SMRDATA loads r0 with the address SMRDATA Idmia r0 11 113 loads registers rl to r13 with the consecutive words stored at SMRDATA ldr r0 0 01 80000 BWSCON Address stmia r0 r1 r13j SMRDATA DATA DCD 0x22221210 BWSCON DCD 0x00000600 GCSO DCD 0x00000700 GCSI DCD 0x00000700 GCS2 DCD 0x00000700 GCS3 DCD 0x00000700 GCS4 DCD 0 00000700 GCS5 DCD 0x0001002a GCS6 EDO DRAM Trcd 3 Tcas 2 1 CAN 1 0bit DCD 0x0001002a GCS7
167. e Lab 1 IIC Interface and EEPROM IIC bus is a serial synchronized data transfer bus Its standard data transfer rate is 100kb s The enhanced bus data transfer rate is 400kb s The IIC bus control can be organized as multi master system or master slave system In multi master system the system gets the bus control via hardware arbitration or software arbitration In applications master slave system is most often used The master slave system has only one main control point while other devices on the bus are all slaves The addresses of the devices on the IIC bus are determined by the address bus interconnection The lowest bit of the address determines the direction of read and write Currently most of the memory chips are EEPROM and their most often used communication protocols are two wires serial interconnection protocol IIC and three wires serial interconnection protocol There are many models of IIC EPROM The AT24CXX series are common used model The AT24CXX series include AT2401 02 04 08 16 etc They support 2 5V low voltage operation and their bit capability bits page is 128x8 256x8 512x8 1024 x8 2048x8 AT24Series chips are manufactured using the CMOS technology With an internal high voltage charge pump AT24Series chips can work from a single power supply The standard package is 8 pin DIP package as shown in Figure 6 1 Figure 6 1 Standard Package Pins 230 Embedded Systems Development and Labs The English Edition T
168. e UDA1341TS is a voice CODEC made by Philips UDA1341TS can convert analog dimensional stereo sound into digital signal and vise versa It can process the analog signal using PGA Programmable Gain Access and AGC Automatic Gain Control functions For digital signals this chip also provides special DSP functions UDA134 ITS is widely used in MDs CDs Notebooks PCs and Camcoders The UDA1341TS provides two groups of voice signal input lines one group of signal output lines one group of IIS bus interface lines and one group of L3 bus lines The IIS bus interface lines include clock line word selection line WS data input line data output line DATAO and voice system clock SYSCLK The L3 bus lines includes microprocessor interface data line L3DATA microprocessor interface mode line L3MODE microprocessor interface clock line L3CLOCK The microprocessor can configure the UDA1341TS voice processing parameters and system control parameters through the L3 bus However the S3C44B0X has no L3bus and the general I O ports must be used to connect to the UDA1341TS L3 bus For the L3 bus time sequence and control methods please refer to UDA1341TS datasheet 3 Circuit Interconnection The IIS interface circuit is shown in Figure 6 20 r WS VOUT vour SPEAK 050 1 4 DAT ISD DATA 4 L3DAT VNL Micropho
169. e assembly mixed program There are following ways of setting break points e Use Insert Remove Break Point button e Use e Use Hand pointer e Use Debug Toggle Breakpoint menu item A valid break point sample is shown in Figure 2 54 68 Embedded Systems Development and Labs The English Edition at91 tc write amp TCO DESC timer value Software Trigger on Timer generates a software trigger simultaneouslu for each of the chan 91 2 DESC TRIG CHANNEL at91 irq open TCO DESC periph id 7 SRCTVPE INT EDGE TRIGGERED 20 Figure 2 54 A Valid Break Point If a break point is set at a non executable line the break point is not valid The non valid break point is shown in Figure 2 55 Qu define led at PIO output at91 pio open amp PIO DESC LED MASK PIO OUTPUT define switch at PIO input at91 pio open amp PIO DESC SW_MASK PIO INPUT Timer initialization at91 tc open amp TCO DESC TC_WAVE TC_CPCTRGITC_CLKS_MCK8 0 0 Figure 2 55 An Invalid Break Point When the program is executed it will stop at the first break point as shown in Figure 2 56 at91 tc urite amp TCO DESC timer value Software Trigger on Timer generates a software trigger simultaneously for each of the channels at91_tc_trig_cmd amp TCO_DESC CHANNEL at91 irq open TCO DESC periph id 7 AIC_SRCTYPE_INT_EDGE_TRIGGERED
170. e ista tet t ivre MCN Te 87 3 2 2 Eab Equipment 87 3 2 3 Content of the Lab 2 eese 88 3 2 4 Principles of the Lab 2 enne nennen nnne ener enne 88 3125 Lab Operation Steps s dee He eee e en e ent 90 3 2 6 Sample Programs of aeterne de tcd oder aie edunt 9 RM NEDIULIHUM 92 3 3 Thumb Assembly Instruction Lab nennen ener enne 93 3 37 i secto stet ete te tama ste tasse ttes 93 33 2 Lab Equipments c oerte ro t t te t tte td reta e A eh aa 93 3 3 3 Content of the Lab ettet it etti eit rented ede edens 93 3 3 4 Principles of the Lab 93 3 3 5 Operation Steps of Lab 3 er ter oe e tete 95 33 6 Sample Programm 53 6 ceo rn D NO I M e E a ea es 95 ERAD e 97 3 4 ARM Work Mode eub ete ee ir 97 n aan ivit est tee EUR 97 3 4 2 Cap Equipment a n A l aa m a uu u u Qa 97 3 4 3 Content of the 97 3 4 4 Principles of the Lab r 97 3 4 5 Operation Steps of the Lab a 100 3 4 6 Sample Programs of the 102 e E 104 3 5 C Language Program Lab 1
171. e it is necessary to be specific about which version is being referred to the registers of the first group are referred to as R8 usr to R12 usr and the second group as R8 fiq to R12 fiq Registers R8 to R12 do not have any dedicated special purposes in the architecture However for interrupts that are simple enough to be processed using registers R8 to R14 only the existence of separate FIQ mode versions of these registers allows very fast interrupt processing Registers R13 and R14 have six banked physical registers each One is used in User and System modes while each of the remaining five is used in one of the five exception modes Where it is necessary to be specific about 78 Embedded Systems Development and Labs The English Edition which version is being referred to you use names of the form mode R14 mode Where mode is the appropriate one of usr svc for Supervisor mode abt und irq and fiq Register R13 is normally used as a stack pointer and is also know as the SP In the ARM instruction set this is by convention only as there are no defined instructions or other functionality which use R13 in a special case manner However there are such instructions in the Thumb instruction set Each exception mode has its own banked version of R13 which should normally be initialized to point to a stack dedicated to that exception mode On entry the exception handler typically stores to this stack the values of other
172. e of the files listed in the List as the first parameter file in the linker command When the Image Entry Point is set this item can be empty e Image entry point the entry point of executable file 65 Embedded Systems Development and Labs The English Edition Project Settings Settings For Debug Directory Compiler Assembler Linker 4 El Workspace swing 1 r 7 DETTO Category Image Entry Options 8 4 C Source Select entry file cstartup o ASM Source H Link Script objdump led_swing o wait irq o Image entry point _entry Link Options e entry T targets at91 targets Idscript L A 4 Abuildyxgcc arm elfMibYgcc libYarm elf3 0 2Yarm inter L A A Abuildyxgcc arm elfarm elfMibYarm inter o debug led_swing elf S amp cstartup o OBJ FILES Cancel Figure 2 49 Linker Image Entry Options Settings El c Linker Code Generate Option Settings The code generation option setting is shown in Figure 2 50 Project Settings Settings Debug Directory Compiler Assembler Linker 4 nme all E swing files Category Code Generation Options H Source Generate relocateable output Optimize output file 9 01 ASM Source Do link against shared libraries Link Script E objdump Output lots of information during link Warn about common symbols Warn only once
173. e partial entry and awaits for the next attempt The user is allowed as many attempts as possible to enter the correct code within the allocated time If the alarm has already been set off after this period it cannot be reset except by an appointed independent authority Some reasonable limiting values for the timing parameters involved are a Time allowed for setting the alarm and leaving the building 30 seconds Time between detecting an intruder and triggering the alarm off 5 seconds Time allowed for re entry through the nominated entrance and start resetting the alarm 2 minutes Duration for resetting the alarm after re entry 1 minute Maximum duration for entering the code at each attempt 20 seconds m Duration of the siren sound 5 minutes 285 Embedded Systems Development and Labs The English Edition NOTE In this application you can use the keypad in order to simulate the entrance and exit switches the 8 SEG LED or the LCD to perform the flashing the earphone to simulate the siren sound 286 Embedded Systems Development and Labs The English Edition Appendix A ARM Instruction ARM Addressing and Thumb Instruction Quick Reference Table A 1 ARM Instruction Quick Reference Table A 2 ARM Addressing Quick Reference Table A 3 Thumb Instruction Quick Reference 287 Embedded Systems Development and Labs The English Edition Appendix B ARM and Thumb Instruction Code Table B 1 ARM Instru
174. e valid when the microprocessor accesses the address 0x02140000 0x0217FFFF In the program the 8SEG LED is displayed by sending data to the address 0x02140000 4 6 5 Operation Steps 1 Prepare the Lab environment Connect the Embest Emulator to the target board Connect the target board UARTO to PC serial port using the serial cable that comes with the Embest development system 2 Run the PC Hyper Terminal set to 115200 bits per second 8 data bits none parity 1 stop bits none flow control 3 Connect the Embest Emulator to the target board Open the testews project file located in EmbestIDE Examples Samsung S3CEV40 8LED test directory After compiling and linking connect to the target board and download the program 4 The hyper terminal should output the following messages Embest 44B0X Evaluation Board S3CEV40 8 segment Digit LED Test Example Please look at LED 5 The lab system 8 SEG LED will display 0 F alternately 6 After understanding and learning the contents of the lab perform the Lab exercises 4 6 6 Sample Programs macro defines Bitmaps for 8 segment define SEGMENT A 0x80 define SEGMENT 0x40 define SEGMENT C 0x20 define SEGMENT D 0x08 define SEGMENT 0x04 define SEGMENT 0x02 define SEGMENT G 0x01 define SEGMENT P 0x10 define DIGIT SEGMENT SEGMENT SEGMENT P define DIGIT E SEGMENT SEGMENT G SEGMENT SEGMENT
175. each folder the files in the folder will compiled or assembled ith it s options instead of the project s the two reset buttons can be used to set the folder s compile or assemble options as same as the project s Cancel Figure 3 17 Select If Use Specific Compile Settings 127 Embedded Systems Development and Labs The English Edition Project Settings Settings For General Compiler Assembler Workspace Pr Category 54g interwork files F J Arm Files Instructions sets 8 readme txt C ARM only Default C ARM interworking Thumb Files C Thumb only amp Thumb interworking H Other files Little endian mode default Big endian mode Hardware FP instructions Lib calls for FP operations APCS 26 bit Option APCS 32 bit Option APCS stack frame No APCS stack frame Specify the name of the target CPU No Specified Compile Options mthumb mthumb interwork gdwarf c S SOURCE FILE oAdebugiS OBJ FILE Cancel Figure 3 18 Select Setting the Output Format of the Target Code of C Programs Project Settings Settings For General Compiler Assembler El Workspace interwork 1 pr specs Caegov 9 Arm Files Allow any instruction Only allow Thumb instructions E readme txt Make the assembled code as supporting interworking mx TT Files Other files Little endian mo
176. ecutive address locations The init s program initializes the SP register VERY IMPORTANT and jumps to the main function of the C program 4 Refer to the former Labs and compile the project Set the Linker page options as explained in Chapter 2 Also Figures 3 12a to 3 12d show the correct settings for this project Build the c2 project Set the debug options 5 Download the program open the Memory Register Watch Variable windows single step execute the program and analyze the results In the Watch window input the variable I that need to be watched Specially watch and record the changes of the variable I 6 Combined with the contents ofthe Lab and related technology materials watch the program run Get a deeper understanding of the usage of the registers in different modes 7 After understanding and mastering the lab finish the Lab exercises 112 Embedded Systems Development and Labs The English Edition Project Settings ag Workspace c2 1 project s ties 3 Project Source Files 28 Project Header Files Link Script 8 readme txt T ldscript o debug c2 elf S Xinit o OBJ FILES Image Entry Options Project Source File 3 Project Header File Idscript 4 Project Source File 3 Project Header File PARALLEL EF Lab2A files 29 Project Source File 4 Project Header File c O ese Figure 3 12a Remote page setting first step 113 E
177. edded Systems Development and Labs The English Edition Adebug ARMmode elf Ttext 0 0 o debug ARMmode elf lt armmode o gt OBJ_FILES Figure 3 8 Embest IDE Linker Settings LIII e ww wawww Figure 3 9 Embest IDE Debug Settings 9 Combined with the contents of the Lab and related technology materials watch the program run Get a deeper 101 Embedded Systems Development and Labs The English Edition understanding of the usage of the registers in different modes 10 After understanding and mastering the lab finish the Lab exercises 3 4 6 Sample Programs of the Lab global start text Start Setup interrupt exception vectors B Reset Handler Undefined Handler B Undefined Handler B SWI Handler Prefetch Handler B Prefetch Handler Abort Handler B Abort Handler NOP Reserved vector IRQ Handler B IRQ Handler FIQ Handler B FIQ Handler SWI Handler mov pc lr Reset Handler into System mode MRS RO CPSR BIC RO RO0 0x1F ORR RO RO 0x1F MSR CPSR RO MOV 1 MOV 2 MOV R2 3 MOV R3 4 MOV R4 5 MOV RS 6 MOV R6 7 MOV R7 8 102 Embedded Systems Development and Labs The English Edition MOV RS 9 MOV R9 10 MOV R10 11 MOV R11 12 MOV R12 13 MOV R13 14 MOV R14 15 into FIQ mode MRS RO CPSR BIC RO RO 0x1F ORR RO RO 0x11 MSR CPSR RO MOV R8 16 MOV R9 17 MOV R10 18 MOV R11 19 MOV R1
178. eekday Uart_GetString sDATE if sDATE 0 0x32 1 if SDATE 4 schar 1 amp sDATE 7 schar 1 amp sDATE 10 schar 2 1 if sDATE 11 gt 0 sDATE 11 8 1 170 N09 0 while i lt 12 1 4 G 7 G 10 1 If SDATE 1 lt amp sDATE i gt num9 182 Embedded Systems Development and Labs The English Edition 09 1 break i if N09 0 break all right if date 1 7 or if 32 21th century 09 1 Uart Printf n Wrong value To set again Y N yn Uart Getch want to set DATE again if yn 0x4E yn 0x6E yn 0x59 yn 0 79 SendByte yn while yn 0x0d yn 0x59 yn 0x79 if N09 0 1 rRTCCON 0 01 R W enable 1 32768 Normal merge No reset rBCDYEAR sDATE 2 lt lt 4 0x0f amp sDATE 3 0xf0 gt syear rBCDMON sDATE 5 lt lt 4 0x0f amp sDATE 6 0xf0 gt smonth rBCDDAY sDATE 8 lt lt 4 0x0f amp sDATE 9 0xf0 gt sday tmp SDATE 11 amp 0x0f 1 if tmp 8 rBCDDATE 1 SUN 1 MON 2 TUE 3 WED 4 THU 5 FRI 6 SAT 7 else rBCDDATE tmp rRTCCON 0x00 R W disable velse Uart_Printf n n Use Current DATE Settings n WI BB TT dof Uart_Printf nCurrent time is 02x 02x 02x To set time hh mm ss hour min sec Uart_GetString sTIME If STIME 2 schar 3 amp sTIME 5 schar 3 i 0 N09 0 while i lt 8
179. eiving Supports 8 16 bits data bus 8 interrupt line and 16 base I O addresses Supports ITP AUI and BNC automatic detection Supports auto polarity correction for 10BaseT Support 4 diagnostic LED pins with programmable outputs 244 Embedded Systems Development and Labs The English Edition e 100 pins PQFQ package RTL8019 consists of the following interfaces remote DMA local DMA MAC media access control logic data CODEC and others The remote interface 1 an ISA bus that the processor write read data to from the RAM inside the RTL8019 Microprocessor deals with remote DMA interface only The local DMA interface is an interconnection channel between RTL8019AS and network cable Bellow the MAC media access control logic completes the function e when the processor transmits data to the network the processor transmits first a frame of data to the transmit buffer via the remote DMA channel e then the processor sends a transmit command when the RTL8019AS finishes the current frame transmission it starts to transmit the next frame e the RTL8019As receives the data the MAC comparison After the CRC verification the data is transferred to buffer via FIFO e when the frame is full the RTL8019As will inform the microprocessor through the interrupt or the register flag bit FIFO receive send 16 bytes data is used as a tampon buffer to reduce the DMA request frequency The RTL8019 has two internal RAM blocks One is 16Kb and occup
180. em and Embest JTAG emulator Chapter Three Basic Labs of embedded software development based on ARM including ARM basic instruction set Thumb instruction set assembly programming ARM processor mode switching embedded C programming C and assembly language mix programming overview of programming This chapter provides the basic knowledge of embedded software development basic programming skills usage of IDE Chapter Four Labs that target basic peripheral interfacing in embedded systems The chapter includes applications using memory I O interface interrupts serial communication real time clock and simple digital LED interface These Labs teach the student the basic principles of peripheral interfacing in embedded systems Chapter Five Complex applications that introduce the human machine interfacing This chapter includes a Lab using the LCD display a Lab using the keyboard control a Lab using the touch screen control These Labs are more complex difficult and closer to the real engineering applications These labs require good skills in using the Embest development system Chapter Six Complex labs for developing applications using communication interfacing and IIS voice interfacing This chapter includes a Lab of IIC serial communication bus a Lab of Ethernet communication and Lab of IIS voice bus interface communication Chapters 4 5 and 6 can prepare the students to develop applications using various interfaces and device
181. ent and Labs The English Edition example stop 3 5 5 Operation Steps 1 Refer to the former Labs and create a new project project name is c1 2 Refer to the sample program edit the source file c1 c and cl cs and add them to the project Add the cl cs to the root directory of the project 3 Refer to the former Labs finish the standard settings One thing to be noted is that the command script file needs to be added as well in the settings This is shown in Figure 3 10 Processor Remote Debug Directory Compiler Assemb 4 Category Symbol file Adebug ct elf r Action after connected C None C Auto download Command script Figure 3 10 Embest IDE Debug Settings 4 Refer to the former Labs and compile the program 5 Download the program and open the Memory Register Watch Variable windows Single step through the program and analyze the results through the Memory Register Watch Variable windows In the Watch window input the variable I and J that need to be watched 6 Refer to the contents of the Lab and related technology materials watch the program run 7 After understanding and mastering the Lab do the exercises 3 5 6 Sample Programs 1 cl c sample program source code 107 Embedded Systems Development and Labs The English Edition x File Name C1 a c Author embest x Desc History 3 3 3 3 3 3 3
182. ent and Labs The English Edition to watch the operation of the program and the status of the CPU use Watch or Variable Windows to watch variables of the program use the Operation Console to execute special commands With the additional right click menu items users can implement or find any part of the program modify any errors during development time or run time 2 Embest IDE Software Tools 1 Elf to Bin Tool Elf to Bin Tool is a binary executable file generation tool The Elf file generated by the IDE compiler can be converted to a binary executable file that can be downloaded to the hardware Select Tools Elf to Bin item a Bin file that has the same name as the Elf file will be created in the debug directory The users can use the direct command line method to accomplish the same thing The command s executable file elf2bin exe 15 located in the Tools sub directory of the Embest installation directory The elf2bin command can be input at the control console For the software project that has already passed the debugging step the elf2bin can convert it to an executable file This file can be loaded into the ROM using the Embest Online Flash Programmer software 2 Disassemble all The user can use disassemble tool to disassemble the debug symbol file to objdump file with detailed information This file can be used to watch the program lines address distribution location of the variables and code etc Also it can be used for fin
183. ents some basic knowledge e The program entry point is start The default start address of text segment is 0x8000 e as is often used as a pseudo operator 1 equ equ can be used to define a symbol such as a variable a value based on a register a label in the program etc Syntax Format equ symbol expr expr can be an address value of a register a 32 bit address variable or a 32 bit variable symbol can be a character name of expr defined by equ Example equ Version 0 1 2 global and globl global declares a global variable that can be used by other files global and globl is the same Syntax Format global symbol symbol is a character name that is defined by global It is case sensitive Example global My AsmFunc 3 text The text pseudo operator tells the compiler to put the compiled code to start from text of the code section or subsection Syntax Format text subsection Example text 4 end end is the end notation of the assembly file The code after this notation will not be processed Syntax Format end 3 1 5 Lab 1 Operation Steps 1 Lab A 1 Create a New Project Run the Embest IDE and select File gt New Workspace menu item A new dialog window will pop up Input the contents shown in Figure 3 1 80 Embedded Systems Development and Labs The English Edition Create a New Project x Project name 1 Location CAEmbestIDEYExamplestasm Ej
184. er LONG seed global gecmain gccmain mov GLOBAL seed seed LONG 0355555555 LONG 0355555555 END 4 thumb c extern void arm_function void char arm 22 char thumb 22 static void delay int time 131 Embedded Systems Development and Labs The English Edition 1 int i J 0 for 1 0 i lt time i 1 for j 0 j lt 1000 j k int Thumb function void 1 int i char p Hello from Thumb World arm function delay 10 for 1 0 1 lt 22 i thumb i while 1 3 8 7 Exercises 1 Read 44binit s boot file try to understand every line of this program 2 Write an assembly program and a C Language program to implement transferring parameters from a C mathematic function to an assembly mathematical function and return the result from the C function Name the new project as smath Add the 44init s to the project Refer to the project settings in the basic Labs Use the Idscript linker script file in the common directory After the compiling and linking use the Embest tools to disassemble all and elf2bin to convert and analyze the output file Connect the software emulator and download file at 0 0 000000 to start the debugging tracing and program execution 132 Embedded Systems Development and Labs The English Edition Chapter 4 Basic Interface Labs 4 1 Memory Lab 4 4 1 Purpose e Get familiar with the ARM memory space e Get familiar wi
185. er I believe that this lab book is an excellent tool for teaching embedded systems based on the ARM architecture I have used other IDEs and I can say that the Embest engineers have developed an excellent product I want to congratulate the Embest engineers for putting together this product Radu Muresan 2005 Embedded Systems Development and Labs The English Edition PREFACE Theory teaching and Lab teaching are two important parts of the modern advanced education Lab course is an important part in the teaching process This book is the Lab manual of the Embedded System Development Course Series that provides teachers and students with complete embedded system training tools based on the ARM architectures In this Lab manual we focus mainly on developing complete embedded applications using the Embest development system The applications provide the software and hardware details of the designs We integrated complex embedded system application sample modules porting of embedded operating systems etc Using this manual the students can learn not only the basics of the embedded system development but also can learn how to develop complex interface modules that apply to real world applications The following outlines the content of the chapters Chapter One overview of embedded system development embedded system IDE ARM embedded development system embedded study etc Chapter Two Embest embedded IDE for ARM Embest ARM development syst
186. erform automatically some specific functions such as reset the target board clear the watch dog mask the interrupt register and memory etc By executing a series of commands we can perform various specific functions The file that contains a group of sequential commands is called command script file Embest uses cs as the file extension for a command script file 66 99 Each command has name and appropriate parameters In each command line the indicates the beginning of 104 Embedded Systems Development and Labs The English Edition the comment Every command that can be used in the debug window can also be used in the command script file including the executing command SCRIPT For the debug commands and detailed contents please refer to Debug Command List in the user guide document UserGuide chm found on the CD that accompanies the EmbestIDE ARM development system The commands in the script will be executed automatically in a sequential order 2 The Executing Methods of the Command Scripts There are two methods of executing a command script e Input the SCRIPT command in the command window script command script file name gt e the Debug page of Project Settings Dialog specify the command script file at the Action After Connected The IDE will first execute the command script file after the connection established 3 The Often Used Commands 1 GO Execute target program syntax go description Execute
187. es The Embest IDE interface is shown is Figure 1 11 24 Embedded Systems Development and Labs The English Edition Embest IDE d rsamsungs3cev40 common 44blib c D xl File Edi View project Build Debug Tools Window Help jsix Bic Eg S JE amp 4 6 05 em gm Em mm Re CD ga es e S void Delay int time 8x6 Uart SendByte int data 6x26 int uHRLr printf unsigned char const format 6x5c void Task3 void Id 0xc818815 f rUTCON HCLK 1888888 1 448 2 lt lt 3 5 10 64 Wat M ax rTDAT 6xF FFF Workspace ucos 44b0 21 4 rUTCNT OxFFFF amp ucos 4460 200 files rUTCON MCLK 1600006 1 lt lt 8 2 lt lt 3 1445 1M 6L APP src 5 8led c for time gt 6 time 5 main c A For i 8 i lt delayLoopCount i APP inc if adjust 1 objdump 1 E ProgramFlash txt 2 readme txt ucos src y 8 Os_core c H A OS MBOX c ag Current RG 0 0000000 R1 0x8c88ec7 R2 0x88080122 9 R3 9 00000023 9 0x00800089 9 RS 8x8c88fba68 9 R6 0x000000081 9 R7 8x08008808 R8 0x00000000 R9 0 00000000 R18 0 00000000 R11 8x8c8Ofcd8 R12 8x8c7ff3bc for i 0 i lt 1888xms time i R13 8x8c88FfcbS8 i T 22 Register Peripheral 4 b 8x01C8001C 0x08 nemurite success memurite 6x61C86626 6
188. ess parameter and system control parameter via this bus interface But S3C44B0X doesn t have connections to this bus interface This bus interface could be extended via I O port ws VOUT VOUT SPEAK 150 4 DAT USD n DATA SCL c BC 7 L3DAT VINL Micropho 13 VNR DQM 1 4 L3CLOCK CODE SYSCL 44B0 UDA1341 Figure 2 19 IIS Interface Circuit Diagram 8 8 segments LED The lab system has an 8 segments LED shown in Figure 2 10 The low level signal lights the LED The CPU data bus DATA 0 7 drives the LED through 74LC573 driver Its chip select signal is select by nGCS1 and CS6 which is generated by the CODEC from 3 address wires A20 A19 A18 The low data wires of CPU determine the contents of the 8 segments LED Q0 D 7 0 7 0 Q DPY Q E Q4 44B0X e L l dp CS6 gt 2 07 74LCX573 Figure 2 20 8 SEG LED Circuit Diagram 9 Solid State Hard Disc As shown in Figure 2 21 Embest development board has a 16MB solid state hard disk Nand Flash The chip model is K9F2808 Its chip select pin is CS2 which is decoded from NGCS1 by 74LS138 The general I O 42 Embedded Systems Development and Labs The English Edition ports PF6 PF5 NXDREQO are connected to ALE CLE R B and CE port of K9F2080 separately The user
189. essor Remete Debug Directory Compiler Assemb 3 3 Workspace asm1 1 proje Ee CPU s 3 Project Source Files Litle Endian 28 Project Header Files ver for ARM family er 1187865 C Big Endian CPU Peripheral Family ARM Maker Member 7 Chip Build Tools GNU Tools for ARM Figure 3 2 Processor Settings at New Work Space 5 Generate Object Code Select Build Build asm a or press F7 to generate the object code Or click the button on tool bar shown in Figure 3 3 Figure 3 3 Embest IDE Compiling Buttons 6 Debug Settings Select Project Settings or press Alt F7 The Project Settings dialog will pop up Select the Remote page to set the debug devices as shown in Figure 3 4 82 Embedded Systems Development and Labs The English Edition Project Settings d x Settings Workspace asm1 1 proje asm files 9 Project Source Files 22 Project Header Files Processor Remote Debug Directory Compiler Assemb Remote device Simarmz Embest simulator for ARM er 1126435 Speed Communication type PARALLEL m D Port LPTI C LPT2 Cancel Figure 3 4 Emulator Settings in New Work Space Select Debug page to set the debug module shown in Figure 3 5 Noti
190. ets eb63 S SOURCE FILE TUN El 64 Embedded Systems Development and Labs The English Edition Figure 2 47 Assembler Warning Options Settings 7 Linker Settings The linker settings are shown in Figure 2 48 All the settings in this page will be displayed in the Link Options edit window The users can manually edit the Link Options but need to follow the GNU rules a Linker General Settings The linker general setting is shown in Figure 2 48 e Executable file generate executable file e Library generate library file e Linker script file select this item only when executable output file is selected e Output file name could be elf or lib file Project Settings Settings Debug Directory Compiler Assembler Linker Category General J ASM Source 4 Link Script objdump Executable file file type Linker script file rgets at91 targets Idscript E Output file name debug led_swing elf Link Options T targets at91 targets Ildscript L A A Abuildyxgcc arm elfMibYgcc libyarm elfi3 0 2Yarm inter L A A Abuildyxgcc arm elfjarm elfilibyarm inter o debug led_swing elf S cstartup o OBJ FILES El Cancel Figure 2 48 Linker General Settings b Linker Image Entry Options Settings The assembler warning settings are shown in Figure 2 49 e Select Entry file select on
191. etting program implements functions such as detecting timer work status verifying the setup data For detailed implementations please refer to Section 4 5 7 Timer Setting Control Program and to the S3C44BOX User s Manual 2 Time Display The time parameters are transferred through the serial port 0 to the hyper terminal The display content includes year month day hour minute second The parameters are transferred as BCD code The users can use the serial port communication program refer to Section 4 4 Serial Port Communication Lab to transfer the time parameters The following presents the C code of the RTC display control program void Display Rtc void 1 Read Rtc Printf Current Time is 02 02 02 96s year month day date weekday Printf 02 02 02 hour min sec void Read Rtc void 1 Uart Printf This test should be excuted once RTC test Alarm for RTC initialization n rRTCCON 0x01 R W enable 1 32768 Normal merge No reset while 1 1 179 Embedded Systems Development and Labs The English Edition ifrBCDYEAR 0x99 year 0x1999 else year 0x2000 rBCDYEAR month rBCDMON day rBCDDAY weekday rBCDDATE hour rBCDHOUR min rBCDMIN sec rBCDSEC if sec 0 break j rRTCCON 0x0 R W disable for power consumption 1 32768 Normal merge No reset 4 5 6 Operation Steps 1 Prepare the Lab environment Connect the Embest Emulator to
192. finitions are in Os cup h e Defines the data type related to compiler In order to port uC OS II applications there should be no int unsigned int etc definitions in the program UC OS has its own data type such as INT16U which represents 16 bit unsigned integer For 32 bit ARM processor the INT16U is unsigned short For a 16 bit ARM processor the INT16U is unsigned int e Defines interrupt enable or disable e Defines stack growing direction After defining the growing direction of stack the value of OS_STK_GROWTH is defined e Define the micro OS _ TASK SW OS TASK SW is a called when a uc OS II lower priority task is switched with higher priority task There are two ways to define it One way is by using software interrupt and make the interrupt vector to point to the OSCtxSw function Another way is to call the OSCrxSw function directly 2 Porting OS CPU A ASM Assembly File In the OS CPU A ASM there are four functions that need to be ported 1 OSStartHighRdy function This function is called by OSStart function to start the highest priority task ready to run OSStart is responsible for setting the tasks in the ready status The functions of this routine are described in the MicroC OS II book using pseudocode language This pseudocode must be converted in ARM assembly language OSStartHighRdy function loads the stack pointer of the CPU with the top of stack pointer of the highest priority task Restore all processor registers
193. ftware 15 cheap and it doesn t need any other hardware debugging emulators The inconvenient of this software is that it can be used only after the hardware is in a stable state 3 The In Circuit Emulator ICE is a CPU emulation device The ICE can completely emulate a target CPU such as the ARM processor and provides deeper debug functions Embedded Systems Development and Labs The English Edition Serial port network port and USB port are also the communication channels of ICE ICE can emulate high speed ARM processor ICE is expensive and normally used in hardware development It is seldom used in software development 1 2 2 Software Emulator Software Emulator can partly emulates the target hardware It is normally an instruction set emulator Software emulator can only be used as a primary debug tool because its function is limited and can t completely emulate the real hardware 1 2 3 Evaluation Board The evaluation board is also called a development board It is useful for the developers Experienced engineers can also make their own development board A good development board has complete documentation hardware and software implementations schematic sample programs source code etc for development references 1 2 4 Embedded Operation System Embedded real time operation system RTOS provides memory management task management and resource management etc RTOS can save a lot of troubles in complicated applications But if
194. g exceptions irrelevant The most complex scenario is where a FIQ an IRQ and a third exception which is not Reset happen simultaneously FIQ has higher priority than IRQ and also masks it out so the IRQ will be ignored until the FIQ handler explicitly enables IRQ or returns to the user code If the third exception is a data abort the processor will enter the data abort handler and then immediately enter the handler since data abort entry does not mask FIQs out The data abort is remembered in the return path and will be processed when the FIQ handler returns If the third exception is not a data abort the FIQ will be entered immediately When the FIQ and IRQ have both completed the program returns to the instruction which generated the third exception and in all the remaining cases the exception will recur and be handled accordingly From the above the reset entry is the start point of all the programs So the first executed line of the program will be executed at 0x00000000 Generally the following code is used Setup interrupt exception vectors B Reset Handler Undefined Handler B Undefined Handler SWI Handler B SWI Handler Prefetch Handler B Prefetch Handler Abort Handler B Abort Handler NOP Reserved vector IRQ Handler B IRQ Handler FIQ Handler B FIQ Handler Reset Handler LDR sp 0 00002000 2 Linker Script The Linker Script controls all the linking process The Linker Script is written
195. g function provided by Embest to debug or improve the software that is executed by the real hardware 3 8 5 Operation Steps 1 Open the interwork project at the sample program directory C EmbestIDE Examples Samsung S3CEV40 and perform the following project settings a At the Assembler page select Make the assembled code as supporting interworking shown in Figure 3 15 b At the Compiler page select ARM interworking shown in Figure 3 16 c Click on the Thumb files select the options shown in Figure 3 17 to Figure 3 19 2 Refer to the former Labs compile and link the interwork project files Download and debug single step execute program analyze the result through the Memory Register Watch Variable windows 3 Use Embest IDE Disassemble all tool convert the elf file to objdump file Open and watch the storage of the code check the definition of the text section defined at linker script compare it with the real source code master the problem searching method through the objdump file and the source files Project Settings Settings For Remote Debug Directory Compiler Assembler Linker 4 gt SOT Category Target Specific Options 9 23 Arm Files Allow any instruction Only allow Thumb instructions readme txt Make the assembled code as supporting interworking J Thumb Files 5 Other files Little endian mode default Big endian mode Use the 32bit AP
196. ge e eive n tied 209 5 24 x4 Keyboard Control ss Eo GNE A 209 5 2 DIP tposesaisae dedii 209 Embedded Systems Development and Labs The English Edition 5 2 2 Lab Equipnient ee RE OE EUREN Een 209 5 2 3 Content of the Lab e eie deinde ride deter iode e deoa ade 209 5 2 4 Principles of the Lab nennen enne inneren enne 209 5 2 5 2 senem eee ee e de ph 210 5 26 Operation Steps usine eie tei 214 5 2 7 Sample Programs 214 5 32 8 at ine textu n etd et A eO e E E 218 5 3 Touch Panel Control e ede A ee 218 5 2 D PULDOSe dei tiit eth aa qasa Sad te AA Lug ipta s UT ss s 218 5 22 Lab Equipnient eee eee ee On e ERE Ep ders 218 5 2 3 Content OF 218 5 2 4 Principles of the Lab dee ee ee reed Se ee tee teneis 218 SES DESI E tea ce aeons 221 5 3 6 Operation Steps ee GER 223 5 3 7 Sample Programs 224 5 3 S iem eate Rede tati tenete tees dietus 229 Chapter 6 Communication and Voice Interface Labs 230 6 1 Serial Communication Lab nennt neret 230 6 ia ERR ERINNERUNG 230 6 12 Lab Equipment 5 i eee Se ep eot e et ep 230 6 1 3 Contentor the aeos om TE 230 6 1 4 P
197. get board the emulation is closer to the hardware Some interfacing problems such as high frequency restriction AC and DA parameter matching problems length of wires etc have been minimized The combination of IDE and JTAG Emulator is the most commonly used way of debugging The Embest Emulator for ARM is shown in Figure 2 3 30 Embedded Systems Development and Labs The English Edition Embest JTAG Figure 2 3 Embest Emulator for ARM JTAG 2 1 3 Flash Programmer After the programming is finished the user needs to download the binary code into the flash memory for run time testing Embest Inc provides a Flash Programmer that allows the user to directly write the flash of the development board The Flash Programmer needs to work together with the Embest Emulator for ARM JTAG The windows interface is shown in Figure 2 4 Embest Online Flash Programmer LN 15 xl File Setting Tools Help Program Flash E EmbestIDE Tools FlashProgrammer s304510 netstart_boot cfg CPU Type 634510 Flash Device awzstvieoB DB CPU Endian ue Flash Start oxo1s00000 RAM Start oxooooooo0 Flash width he x fr Program With gos ed To F Auto Verify Blank Check Erase 52 Program Checksum File Program E EmbestIDE Tools FlashProgrammer Mat 8 Flat Bin 7 Upload JE EmbestIDE Tools FlashProgrammer Mati J Protect SERRI D Upload
198. gister I ISPC F ISPC I ISPC F ISPC clears the interrupt pending bit INTPND I ISPC F ISPC also informs the interrupt controller of the end of corresponding ISR interrupt service routine At the end of ISR interrupt service routine the corresponding pending bit must be cleared A bit of INTPND is clear to zero by writing 1 on I ISPC F ISPC This feature reduces the code size to clear the INTPND NOTE to clear the I ISPC F ISPC the following two rules has to be obeyed e The I ISPC F ISPC registers are accessed only once in ISR e The pending bit in I ISPR INTPND register should be cleared by writing I ISPC register Table 4 27 IRQ FIQ Interrupt Service Pending Clear Register LISPC 0 01 00024 IRQ interrupt service pending clear register 15 Ox01E0003C FIQ interrupt service pending clear register 160 Embedded Systems Development and Labs The English Edition 6 Circuit Description As shown in Figure 4 6 the external interrupts EXINT6 and EXINT7 are used in this Lab The button SB2 and SB3 generate interrupts When the buttons are pressed EXINT6 and EXINT7 are connected to the ground and OV signal is present at these pins This will initiate an interrupt request After the CPU accepts the requests the corresponded ISRs are executed to implement LED1 and LED2 display From the presentation of the interrupt functionality the EXINT6 and EXINT7 are using the same interrupt controller As a result the CPU will only
199. gister also become accessible The privileged modes can only be entered through controlled mechanisms with suitable memory protection 97 Embedded Systems Development and Labs The English Edition they allow a fully protected operating system to be built Most ARMs are used in embedded systems where such protection is inappropriate but the privileged modes can still be used to give a weaker level of protection that is useful for trapping errant software Processor Modes Explanation User usr Normal user code FIQ fiq Processing fast instructions IRQ irq Processing standard instructions SVC svc Processing software interrupts Abort abt Processing memory faults Undefined und Handling undefined instruction traps System sys Running privileged OS tasks Table 3 2 Processor Modes The mode can be changed through software Interrupts and exceptions can also change the mode of the processor When the processor is working in the user mode the executing program can t use some of the system resources that are protected In the privileged modes the system resources can be freely used and the modes can be changed as well 5 of these modes are called exception modes FIQ Fast Interrupt reQuest IRQ Interrupt ReQuest Management Supervisor Abort Abort Undefined undefined When a specific exception happens the processor enters the related mode Each mode has its own additional registers to avoid t
200. glish Edition read the keyboard status on the data bus through different addresses and determine which key is pressed e Scanning Send low voltage to one horizontal line and high level to the other horizontal lines If any vertical line is low the key that sits at the intersection of the selected row and column is pressed e Inversion Send low voltage to the horizontal lines and read the vertical lines If any vertical line is low it indicates one key is pressed on that column Then send low voltage to the vertical lines and read the horizontal lines If any horizontal line is low it indicates one key is pressed on that row The intersection of the identified row and column will give the position of the key 5 2 5 Lab Design 1 Keyboard Hardware Circuit Design 1 4x 4 Keyboard The 4 x 4 keyboard has 4 rows and 4 columns The circuit is shown in Figure 5 12 Any pressed key will generate a pass route Figure 5 12 4 x 4 Keyboard Circuit 2 CPU Recognition Circuit The keyboard recognition circuit is shown bellow 210 Embedded Systems Development and Labs The English Edition UL U10 14 aum 74HC541 1312 10 G 6Y 6A GND 1210 9 44 5Y 5A A8 LI 8 8 AY 4 7 7 55 2 1 3 Dil 5 2Y 2 AS I A4 AO 74HC17 10 DO 18 R58 Do 15 E A2 ink NGCSB a 2 n D334 2 vce Gl 1 2 3 4 5 6 8 7 8 KEYBOARD Figure 5
201. glish Edition void TaskStart void 1 1 char 141 1 char 142 2 char 143 3 char 144 4 create the first Semaphore in the pipeline with 1 to get the task started UART sem OSSemCreate 1 uHALr InitTimers enable timer counter interrupt create the tasks in uC OS and assign decreasing priority to them OSTaskCreate Task1 void amp Id1 amp Stack1 STACKSIZE 1 2 OS TaskCreate Task2 void amp Id2 amp Stack2 STACKSIZE 1 3 OSTaskCreate Task3 void amp Id3 amp Stack3 STACKSIZE 1 4 OSTaskCreate Task4 void amp Id4 amp Stack4 STACKSIZE 1 5 ARMTargetStart Delete current task OSTaskDel OS PRIO SELF void Main void int argc char argv 1 char 140 4 ARMTargetInit hardware initialization needed by uC OS OSInit uC OS initialization OSTimeSet 0 timer setting create the start task OSTaskCreate TaskStart void 0 amp StackMain S TACKSIZE 1 0 start the operating system ARM TargetStart enable timer interrupt OSStart start the OS 279 Embedded Systems Development and Labs The English Edition 7 2 6 Exercises Improve the program by implementing inter task communication and synchronization such that every time when the 8 SEG LED displays a character the serial port also outputs the same character 7 3 uC OS Application Lab 7 3 1 Content of the Lab Wri
202. gned IicInt 3 Interrupt Routine name IicInt func IIC interrupt handler para none ret none modify comment oe e ake OR ae void IicInt void rl ISPC BIT IIC IGetACK 1 4 Write AT24C04 Program name Wr24C040 func write data to 24C080 239 Embedded Systems Development and Labs The English Edition para slvAddr chip slave address addr data address data data value ret none modify comment ak akak ak ak ak ak ak ak a SF SF SF void Wr24C040 U32 slvAddr U32 addr U8 data 1 iGetACK 0 send control byte rIICDS slvAddr send the device address 0 rIICSTAT 0x10 Master Tx Start while iGetACK 0 wait ACK iGetACK 0 send address rIICDS addr rIICCON Oxaf resumes operation while iGetACK 0 wait ACK iGetACK 0 send data rIICDS data rIICCON Oxaf resumes IIC operation while 1GetACK 0 wait ACK iGetACK 0 end send rI
203. h Edition Supports most of flash products such as ATMEL 29 series Intel 28 series and SST 29 39 49 series etc Supports flash empty checking erasing programming verifying files protecting upload operations etc the flash operation can be located to specific sectors Support 8 bit 16 bit 32 bit flash visit width Support one chip two chips and four chips programming As a result the program file doesn t need to be separated Other Characters of Flash Programmer The programming configuration data can be saved Can read registers before program and test the target Can specify the individual sectors Simple and direct microprocessor register configuration interface TI Embedded Systems Development and Labs The English Edition Chapter 3 Embedded System Development Basic Labs 3 1 ARM Assembly Instructions Lab 1 3 1 1 Purpose e Learn how to use Embest IDE for ARM and ARM Software Emulator e Use basic ARM instructions 3 1 2 Lab Equipment e Hardware PC e Software Embest IDE 2003 Windows 98 2000 NT XP 3 1 3 Content of the Lab 1 e Introduction to the development environment and learn how to work with registers and memory using LDR STR MOV etc instructions e Learn the basic arithmetic logic instructions such as ADD SUB LSL AND etc 3 1 4 Principles of the Lab 1 The ARM processor has a total of 37 registers e 31 general purpose registers including a program counter PC These registers ar
204. h programming The value for the frequency division can be from 0 to 16 The relationship of CODECLK and sample frequency is shown is Table 6 1 It needs to correctly select ISLRCK and CODEECLK IISLRCK 8 000 11 025 16 000 22 050 32 000 44 100 48 000 64 000 88 200 96 000 fs KHz KHz KHz KHz KHz KHz KHz KHz KHz KHz 256fs MHz 384fs s RE Table 6 1 The Relationship of CODECLK and IISRCK 2 Registers There are three registers related to IIS e IIS Control Register IISCON IISCON can access the FIFO ready flag enable or disable transmit DMA service enable IISLRCK IIS prescaler and IIS interface e IIS Mode Register ISMOD IISMOD can select master slave mode send receive mode active level serial data bit per channel select CODECLK and IISRCK e IIS Prescaler Register IISPSR 3 Data Transfer Normal mode or DMA mode can be selected for data transferring In normal mode the microprocessor transfers data according to the status of FIFO The microprocessor itself accomplishes the data transfer from FIFO to the IIS bus The status of FIFO is available via IISFCON register The data can be directly written into the FIFO register IISFIF In DMA mode the DMA controller completely controls the data transfer to from FIFO The DMA controller automatically sends receives data according to the status of the FIFO 2 UDA1341TS Chip 261 Embedded Systems Development and Labs The English Edition Th
205. has already provided the LCD controller driver and input output port the base LCD port pins are already connected to the corresponding CPU base pins inside the chip The LCD control and the driver that is integrated in the 44B0X chip can support single color 4 gray levels 16 gray level LCD and single color 256 color STN LCD or DSTN LCD The typical actual screen sizes are 640 x 468 320 x 240 160 x 160 Pixels The special function registers can be configured to determine the actual LCD types The chip select signal the LCD occupies is CS8 As to TSP since 44B0X chip did not provide controller function the general port can be configured and used TSP includes two surface resistances namely X axial surface resistance Y axial surface resistance Therefore TSP has 4 terminals Its connection is shown in Figure 2 22 When the system is in the sleep mode Q4 Q2 Q3 are closed and Q1 is opened When the screen is touched X axial surface resistance and Y axial surface resistance is opened at the touch point Since the resistance value is very 43 Embedded Systems Development and Labs The English Edition small about several hundred ohms a low level is gained at EXINT2 which generates an interrupt signal to the MCU The MCU causes Q2 O4 to be opened and Q1 to be closed through controlling I O ports AIN1 reads X axis coordinates then closes Q2 Q4 and causes Q1 to pass AINO reads Y axis coordinates When the system reaches t
206. he coordinate value Q4 Q2 are closed Q1 is opened and the system returns to its original state and waits for the next touch TSP occupies 44B0X external interrup EXINT2 as well as 4 general I O port PE4 PE7 EXINT2 Figure 2 22 TSP Circuit Module 12 4x4 Keyboard Circuit As shown in Figure 2 23 a 4 x 4 matrix keyboard port is extended on the board This keyboard can work in interrupting mode or scanning modes 4 data wires act as rows and 4 address wires act as columns Row wires are connected through resistances to high level and connect the output signal with MCU s interrupt EXIT1 through the AND gates of 74HC08 Column wires are connected through resistances to low level When some key is pressed down row wires are pulled down to low level which causes the EXINTI input to become low and interrupt MCU After the interruption the pressed key can be found by scanning the rows and columns of the keyboard Chip 74HC541 is selected by chip select signal nGCS3 This assures that MCU does not read the row wire s information when the keyboard is not used 44 Embedded Systems Development and Labs The English Edition U100 U101 3 74HC541 6Y 6A Y8 IP 5 5 Y7 o e 4Y 4A Y6 y 3A Y5 gt Y 2A Y4 1 NGCS3 19 VDD33 qt VCC D10 1N4148 74HC08 VDD33 4 Figure 2 23 Keyboard Interface Circuit Diagra
207. he pin description is the following SCL Serial clock input Follow ISO IEC7816 standard This pin is open drain driven The SCL input 18 used to positive edge clock data into each EEPROM device and negative edge clock data out of each device SDA The SDA pin is bi directional and is used for serial data transfer This pin is open drain driven and may be wire ORed with any number of other open drain or open collector devices A2 A1 A0 A2 Al AO are input pins of the component page address The A2 Al and AO pins are device address inputs that are hard wired for the 24 and the AT24C02 WP The AT24C01A 02 04 16 has a Write Protect pin that provides hardware data protection The Write Protect pin allows normal read write operations when connected to ground GND When the Write Protect pin is connected to VCC the write protection feature is enabled VCC GND 5 V 0V power supply 2 IIC Bus Read Write Control Logic e Start Condition Signal START C A Start condition can be initiated with a High to Low transition of the SDA line while the clock signal of SCL is High e Stop Condition Signal STOP C A stop condition is a Low to High transition of the SDA line while SCL is High e ACK Signal ACK In Stop Condition ACK will make the SDA line low when a word was received e READ WRITE Signal READ WRITE After the IIC bus started and got an acknowledgment the serial data will be transferred when SCL is high the data will be re
208. he user mode to enter in some unstable state when the exception happens The supervisor mode is only available for the higher versions of ARM system architecture The processor can t enter this mode by any exceptions The supervisor mode has the same registers as the user mode It is not limited as the user mode because it is an authorized mode It is used by the operation system task when the operation system needs to use the system s resources without using the same registers that the exception mode used The task states will be stable when the additional registers are not used when exceptions happen 2 Program Status Register 98 Embedded Systems Development and Labs The English Edition The program status register CPSR and SPAR in 3 2 4 includes condition code flags interrupt disable bit current processor mode bits etc Each exception mode has a Saved Program Status Registers SPSR When exceptions happen SPSR is used to save the status of CPSR The format of CPSR and SPSR is as following condition code flags reserved control bits 30 29 28 27 26 25 24 23 N Overflow T F Mode bits Carry State bit Borrow Exfe FIQ disable Zero IRQ disable Negative Less Than 1 Condition Code Flags The N Z C and V bits are the condition code flags that most of ARM instruction can be detected These flags can be used to decide how to execute the programs 2 Control Bits The bottom 8 bits I F T M M M M M are used
209. icated nWBE 3 0 1 Using LIBAB Pin 14 11 is dedicated nBE 3 0 WS7 30 This bit determines WAIT status for bank 7 or bank has DRAM or SDRAM WAIT function is not supported WAIT disable 1 WAIT enable 29 28 These two bits determine data bus width for bank 7 00 8 bit 01 16 bit 10 32 bit 27 This bit determines SRAM for using UB LB for bank 6 0 Not using UB LB Pin 14 11 is dedicated nWBE 3 0 1 Using Pin 14 11 is dedicated nBE 3 0 WS6 26 This bit determines WAIT status for bank 6 If bank6 has DRAM or SDRAM WAIT function is not supported 0 WAIT disable 1 WAIT enable 25 24 These two bits determine data bus width for bank 6 00 8 bit 01 16 bit 10 32 bit 23 This bit determines SRAM for using UB LB for bank 5 0 Not using Pin 14 11 is dedicated nWBE 3 0 1 Using UBILB Pin 14 11 is dedicated nBE 3 0 WS5 22 This bit determines WAIT status for bank 5 0 WAIT disable 1 WAIT enable 21 20 These two bits determine data bus width for bank 5 00 8 bit 01 16 bit 10 32 bit This bit determines SRAM for using UB LB for bank 4 0 Not using UB LB Pin 14 11 is dedicated nWBE 3 0 1 Using LIBAB Pin 14 11 is dedicated nBE 3 0 This bit determines WAIT status for bank 4 0 WAIT disable 1 WAIT enable 17 16 These two bits determine data bus width for bank 4 00 8 bit 01 16 bit 10 32 bit Figure 4 2 BWSCON Register Format Tabl
210. ies the address space 0x4000 0x7FFF The other is 32Kb and occupies the address space 0x0000 0x001F The RAM is divided into pages of 256 bytes Generally the first 12 pages 0x4000 0x4BFF are used as the transmission buffer The following 52 pages 0x4C00 0x7FFF are used as the receiver buffer The page 0 is only 32 bytes 0x0000 0x001F and is the PROM page The PROM page is used for storing the Ethernet physical address In order to read write data packages the DMA mode is needed to read write the data to the 16 Kb RAM in the RTL8019AS The RTL8019 has 32 bit input output addresses The address offset is 0x00 Ox1F where x00 0x0F are 16 register addresses These registers hold the pages addresses They PAGEO PAGE2 and PAGE3 The bit PS1 and bit PS2 of CR Command Register determines which page will be visited But only the first 3 pages are compatible with NE2000 Page 3 is RTL8019 self defined page and is not compatible with other NE2000 chips such as DM9008 The remote address is 0x10 0x17 and is used as remote DMA port The reset port is Ox18 Ox1F 8 addresses that is used to reset RTL8019AS The application diagram of ATL8019As 1 shown in Figure 6 12 245 Embedded Systems Development and Labs The English Edition HBOX EILS9A Figure 6 12 RTL8019A C application schematic diagram Ethernet c is the driver program of the RTL8019AS chip The following describes briefly its functions NicInit 8019 i
211. ility real world engineering project development ability In order to coordinate with the course teaching and Lab teaching we developed Multimedia Demo Modules for the Embedded System Development and Applications and Embedded System Application Development and Labs courses a start point we will continually change or add new course textbooks lab textbooks or multimedia demo modules based on real practical teaching techniques and the evolution of related technologies This set of textbook combined with class teaching and lab teaching provides a solution for students to master embedded system development technologies based on ARM The tools used in the ARM embedded application development include the Integrated Development Environment IDE the Embedded Real Time Operating System the evaluation board the JTAG emulator and other auxiliary tools Generally an Integrated Development Environment IDE with its basic functions is the only nedded tool for embedded system development Others tools are optional The major IDEs used in the world include SDT and ADS from ARM Multi2000from GreenHill Embest IDE for ARM from Embest Inc etc The emulators used are Muti ICE from ARM and ARM JTAG Emulater from Embest Inc SDT and ADS is the IDE produced by ARM Ltd in its early state discontinued The S3C series chips from SAMSUNG are the most widely used ARM based microprocessors Embest Inc has developed the Embest ARM Development board based on the
212. immediately received This feature allows the processor to verify the internal transmit and to receive the data path of each SIO channel This mode can be selected by setting the loopback bit in the UART control register UCONn Break Condition The break condition is defined as a continuous low level signal for more than one frame transmission time on the transmit data output UART Special Registers See the S3C44BOX User s Manual The main registers of UART are the following 1 UART Line Control Register ULCONn There are two UART line control registers in the UART block The bit 6 of these registers determines whether or not to use the Infra Red mode Bit 5 3 determines the parity mode Bit 2 determines the length of the bits Bit 1 and 0 indicates the number of data bits to be transmitted or received per frame 2 UART Control Register UCONn There are two UART control registers in the UART block that control the two UART channels These registers determine the modes of UART 3 UART FIFO control register UFCONn and UART MODEM control register UMCONn determines the UART FIFO mode and MODEM mode The bit 0 of UFCONn determines whether FIFO is used or not The bit 0 of UMCONn is send request bit 4 The UART Tx Rx status registers UTRSTATn and UART Rx error status registers UERSTATn can show the read write status and errors separately 5 The UART FIFO status registers UFSTATn can show if the FIFO is full and the number of bytes in the FI
213. ince the task period is 10ms it is designed for switch bounce times less than 20ms It also rejects noise pulses up to 10ms wide Notice that the task period does not have to be exactly 10ms It can vary as much as 2096 without causing significant errors When a valid keypress is accepted ScanSw signals a semaphore event flag SwFlag This flag can than be used by other tasks to service a keypress In this application the timer mode task changes the mode each time the key is pressed 4 TimerModeTsk This task is a simple state machine that controls mode of stopwatch Each time a key is pressed the SwFlag semaphore is signaled by the switch scanning task When SwFlag is 280 Embedded Systems Development and Labs The English Edition signaled this task makes a state transition and some actions based on the state change For example when the state is changed from CLEAR to COUNT the msCntr is cleared to restart the millisecond counter in the time update taks When the CLEAR mode is entered the display must be cleared one time at the transition so it is done by this task Notice that the buffer must be written to twice to clear old buffer contents 5 DispTimeTsk This display task displays the current elapsed time by waiting for a value to be written wm to the display ring buffer It then uses BufRead to copy the time value stored in the ring buffer into a local display buffer By using the ring buffer technique
214. include 44b h function code char str send 17 Embest S3CEV40 gt 0 char str_error 50 TERMINAL OVERFLOW 256 character max char str 256 char CR 1 0x0A AR ak ak SF SF SF SF iE name main func c code entry para none ret none modify comment BR oF oR oF oF oF oF ak ke ae 2 2 28 2 void Main void char input char user input char int 1 char pt str str Port Init Initial 44BOX s port rl_ISPC clear all interrupt pend Uart_Init 0 115200 Initialize Serial port 1 printf interface Uart_Printf n Uart_Printf str_send get user input Delay 500 Terminal handler while 1 172 Embedded Systems Development and Labs The English Edition 1 pt str Uart Getch Uart SendByte pt str if pt str OxOD 1 if pt str str 1 Send str send Uart SendByte CR 0 Send received string pt str str while pt str 0x0D 1 Uart SendByte pt str pt_str pt str str Uart SendByte CR 0 Uart Printf str send else pt_str 2 Other Functions in Serial Communication Libs void Uart Select int ch 1 whichUart ch void TxEmpty int ch 1 if ch 0 while rUTRSTATO amp 0x4
215. ines the rules of forming frames and the rules of transmission Frame represents a series of data and a frame is a communication unit of the network transmission The network layer puts frames to the network or receives frames from the networks e Internet Layer Responsible for the inter communication between two network nodes This layer defines the format of the information package in the Ethernet and the information transmission mechanisms from one network node to the destination via one or more routers and routing algorithms The main protocols used in this layer include IP ARP ICMP and IGMP e Transmission Layer Responsible for communication of end to end It creates manages and deletes end to end connections for two user processes The main protocols used in this layer include TCP UDP etc e Application Layer It defines the application programs that use the Internet Application programs access the network via this layer by following BSD network application interface standard The main protocols include SMTP FTP TELNET and HTTP etc 2 An Introduction to the Main Protocols 1 IP Protocol Internet Protocol IP is the heart of TCP IP and the most important protocol in the network layer IP layer receives data packages from the lower layer network interface layer Ethernet device driver for example and sends these data packages to the higher layer TCP or UDP layer IP layer can also receive data from TCP or UDP layer an
216. ing systems providers such as WindowsCE uCLinux VxWorks Nucleus EPOC uc OS BeOS Palm and QNX etc 1 2 An Overview of Embedded Development Environment for ARM 1 2 1 Cross Development Environment Cross development means editing and compiling software on a general purpose computer and then downloading the software to the embedded device and debugging it on both host and target The general purpose computer is called host The embedded device is called target Cross Development Environment consists of cross development software running on the host PC and the debug channel from host to target There are three types of debug channels from host to target 1 The JTAG Based ICD JTAG based ICD In Circuit Debugger is also called JTAG Emulator The JTAG Emulator connects to the target through the JTAG interface of the ARM processor and connects to the host through the serial port the network port or the USB port JTAG Emulator has the following functions Read write CPU registers visit and control ARM processor core Read write memory Visit ASIC system Visit I O system Single step execute program and real time execute program Set break points JTAG Emulator is the most widely used debug method 2 Angel Debugging Software Angel debug monitor software is a group of software programs running at the target board It receives debug commands from host to set break points single step execute programs read write memory etc Angel so
217. int y 1 int temp temp x X Y The difference between these two functions is that the place for storing the variable temp is different In the first function temp is a global variable In the second function temp is a local variable As a result the upper function is not reentrant function The lower function is a reentrant function 2 Use C Language to Enable Disable Interrupts This can be done through the CPSR register within the ARM processor The CPSR register has a global interrupt disable bit Controlling this bit can enable disable interrupts 3 Microprocessor Supports Interrupts and Supports Timer Interrupts Ticks All of the ARM processor cores support interrupts and they can generate timer interrupts 4 Microprocessor Provide Hardware Support for Stack Control 270 Embedded Systems Development and Labs The English Edition For the 8 bit microprocessors that have only 10 address lines the chip can only access a maximum of 1Kb memory For these processors it 15 difficult to port the uC OS II kernel 5 Microprocessor has Stack Pointer and Other Instructions for Reading Registers and Store the Contents of Register to Memory or Stack The ARM processor has STMFD instruction for pushing the content of registers to stack LDMFD instruction for pulling the register contents back from stack 3 uC OS II Porting Steps 1 Basic Configuration and Definition All the basic configurations and de
218. ion needed by the people The embedded systems can be integrated to the Internet helping to transfer information world wide With the process of integration of embedded devices and Internet complex high end applications mobile phones PDAs routers modems etc will demand high performance from the embedded processors Although the embedded technologies that are based on the 8 bit single chip computer still exist these kinds of technologies can t meet the requirements of the evolution of the future embedded system technology due to its limited functions The market and technology competition consistently requires a higher function price ratio On the other hand the time development of an embedded system is also being required to be shorter and shorter From the early 70s when the embedded system concept has been introduced the embedded systems have evaluated rapidly and high performance and low power consumption systems have been developed In the early stages many embedded system had no real time operation system RTOS support those embedded system were merely processing some functions such as simple controls that respond to the outside input through a simple loop control algorithm etc With the evolution of technology the system complexity increased and the application fields of the embedded system expanded Every time when some new functions were introduced the system software design needed to be completely changed So the lacking of real time o
219. ional Steps 1 Prepare the Lab environment Connect the Embest Emulator to the target board Connect the target board UARTO to the PC serial port using the serial cable that comes with the Embest development system Connect the network port to the hub through a network cable Connect the network port of PC to the hub through a network cable 2 Set the IP address of PC as 192 192 192 x x is within the 30 200 range Reboot the PC to make the IP address valid 3 Run PC DOS window or select Start gt Run at the desktop input the command arp 5 192 192 192 7 00 06 98 01 7e 8f 4 Connect the Embest Emulator to the target board Open the TFTP Test ews project file in the TFTP Test sub directory in the sample directory After compiling and linking connect to the target board and download the program 5 Run the TFTPDown exe on PC input the target board address 192 192 192 7 Input the address 0x30000 at the Flash Start Address Select the file that needs to be downloaded bin elf etc maximum 1M Click the Download button The program will download the file into the flash of the target board using the TFTP protocol Success or error message will be prompted at the dialog box 6 Stop the target board run the Embest IDE Open the Memory window and display the content from address 0x30000 Check if the data in flash is consistent with the downloaded file 7 After understanding the functionality of the lab finish the Lab exercises Sa
220. ip 2 tmp ip 1 tmp ip 0 local ip tmp_ip 0 lt lt 24 tmp_ip 1 lt lt 16 tmp_ip 2 lt lt 8 tmp_ip 3 velse Uart_Printf nIP address error yes else D i d local ip 0 800 8 0 config local ip 192 168 0 200 Uart_Printf nDefault Set local ip Yod d d d n local ip amp 0x000000FF local amp 0 0000 00 gt gt 8 local_ip amp 0x00FF0000 gt gt 16 local_ip amp 0xFF000000 gt gt 24 Uart_Printf nPress any key to exit n for 1 if Uart_GetKey return pData char TftpRecv amp len receive data if pData 0 len lt 0 continue write addr pData 0 pData 1 lt lt 8 pData 2 lt lt 16 pData 3 lt lt 24 pData pData sizeof long if Program write_addr pData len 4 FALSE write data to the flash 1 258 Embedded Systems Development and Labs The English Edition continue MakeAnswer answer to the TFTP protocol Exercises Rewrite the TFTP test sample program change the IP address of the development board and change the download address of flash redo the Lab and check if the downloaded data is correct 6 3 IIS Voice Interface Lab 6 3 1 Purpose e Get familiar with the principles of IIS Inter IC Sound interface e Learn the programming techniques of the S3C44B0 IIS interface 6 3 2 Lab Equipment e Hardware Embest S3CEV40 hardware pla
221. is shown in Figure 6 18 CONTROLLER TRANSMITTER RECEIVER CONTROLLER MASTER Figure 6 18 IIS System Interconnection Diagram The basic IIS signal diagram is resented in Figure 6 19 SCK WS SD WORD n 1 WORD n WORD n 1 RIGHT CHANNEL LEFT CHANNEL RIGHT CHANNEL Figure 6 19 IIS time signal diagram WSD signal line indicates what channel left or right will be used for data transfer SD signal line enables the 260 Embedded Systems Development and Labs The English Edition voice data transmission from the MSB most significant bit to the LSB low significant bit The MSB will always be transferred in the first clock period after the WS signal 15 toggled If the data length does not match the receiver or sender will automatically intercept or fill the data For more information please refer to the IIS specification presented in the SCCA4BOX User s Manual 3 Circuit Design 1 S3C44B0 IIS 1 Signal Lines The IIS bus has five lines e Serial data input IISDI The SD signal line of the IIS bus Input Serial data output IISDO The SD signal line of the IIS bus Output Left right channel select ISLRCK The WS signal line of the IIS bus Sampling clock Serial bit clock IISCLK The SCK signal line of the IIS bus CODECLK is generally 256 256fs or 384 384fs times the sample frequency fs CLDELEK is obtained from the main CPU clock frequency The CPU timer registers can be configured throug
222. isible eza fynchronoustend 1 8 Event Analyzer 23 Embedded Systems Development and Labs The English Edition i gt mn information sex sex temg gt next list list temp 3 4 increment counter void Cir 21012 De Corto 695 Ge OEA indgceunt Fertgpe 31 1 savegpt 31 1 bcount 26 1 0 5921626326 main memset _ohsLock T ghsuniock 13 413 60906691 9 6398410254 2 7234958389V 6497663671v tunning Ne NetwotkOCD 2 305716300864 1 2200722597 0 Ei 1 9300739 974 0 241 1 92796020514 0 2409936060 4 0 2409936060 8 0 0961613841 restgpr 30 1 savegpt 28 1 Figure 1 9 Performance Profiler Navigation Button 1512 Class Browser root classes Browse Expand Help zb Expansion Buttons Plus Minus Box Descendents of Root Node Ancestors of Root Node Status Bar Figure 1 10 Graphic Browser 1 3 4 Embest IDE for ARM Embest IDE is called Embest Integrated Development Environment developed by Embest Info amp Tech Co LTD www embedinfo com Embest IDE is a highly integrated graphic development environment that includes an editor compiler debugger project manager flash programmer etc Embest IDE currently supports all the processors based on ARM7 and ARMO Also the software can be upgraded to support the new ARM cor
223. isplay int LedStatus led control function code SF SF SF SF IC name Led Test func leds test funciton para none ret none modify comment SF SF SF void Led Test 1 gt 2 gt all on gt 2 off gt 1 off leds off Delay 1000 ledi on Delay 1000 ledl off led2 on Delay 1000 leds on Delay 1000 led2 off Delay 1000 ledl off SF SF SF SF SF SF ae AC name leds on func all leds on para none ret none modify comment keak ak ak ak ak ak ak a ake SF SF SR SR void leds on Led Display 0x3 150 Embedded Systems Development and Labs The English Edition 9 SF SF SF SF SF SF SR name leds off func all leds off para none ret none modify comment oR oF oF ak oF oF
224. k priority OSTaskSuspend suspend a task OSTaskResume resume a task OSTaskStkChk stack check OSTaskQuery get information of task 3 uC OS II System Calls 1 Inter task Communication and Synchronization Semaphore Mailbox and Message Queues 1 Seaphore OSSemCreate create a semaphore SSemPend wait for a semaphore OSSemPost send a semaphore OSSemAccept no waiting request a semaphore OSSemQuery query the current status of a semaphore 2 Mailbox OSMboxCreate create a mailbox OSMboxPend suspend a mailbox OSMboxPost send a message to mailbox OSMboxAccept no waiting get a message from mailbox OSMboxQuery query status of a mailbox 3 Message Queue OSQCreate create a message queue OSQPend suspend a message queue OSQPost send a message to message queue OSQAccept no waiting get a message from message queue OSQFlush clear a message queue OSQuery query status of a mailbox 2 Other System Calls Time Memory Management 1 Time Management OSTimeDly task delay function OSTimeDIyHMSM time delay by second minutes or hours OSTimeDlyResume stop delay when a task is in delay 276 OSTimeGet OSTimeSet 2 Memory Management OSMemCreate OSMemGet OSMemPut OSMemQuery 7 2 5 Sample Programs void Task1 void Id 1 print task s id Embedded Systems Development and Labs The English Edition get system time set system time create a memory partitio
225. larm function 4 6 8 SEG LED Display Lab 4 6 1 Purpose e Get familiar with LED display and its control method e Get better understanding of the memory access principles presented in the Section 4 1 Lab 4 6 2 Lab Equipment e Hardware Embest S3CEV40 hardware platform Embest Standard Power Emulator PC e Software Embest IDE 2003 Windows 98 2000 NT XP operation system 4 6 3 Content of the Lab Write a program that displays 0 9 A F to the 8 SEG LED 4 6 4 Principles of the Lab 1 8 SEG LED In embedded system the 8 SEG LED is often used to display digitals and characters The 8 SEG LED displays are simple and durable and offer clear and bright displays at low voltage 1 Architecture The 8 SEG LED consists of 8 irradiant diodes 8 SEG LED can display all the numbers and part of English characters 2 Types The 8 SEG LED displays are of two types One is the common anode type where all the anodes are connected together and the other is the common cathode type where all the cathodes are connected together 3 Work Principles Using the common anode type when the control signal for one segment is low the related LED will be lit When a character needs to be displayed a combination of LEDs must be on Using the common cathode type the LED will be on when the control signal is high The following is the commonly used character segment coding 185 Embedded Systems Development and Labs The English Edition
226. lay void delay void delay 1 int i for i 0 i lt 10 i _ void delaylO void Figure 3 13 Embest IDE Call Stack Window 115 Embedded Systems Development and Labs The English Edition 1 int i for i1 0 i lt 10 i delay Function Name Start Input Parameters none Output Parameters none Re E main 1 int i 5 1 delay10 3 init s source code Fr NAME 44BINIT S Version 10 April 2000 Description C start up codes Configure memory Initialize ISR stacks x Jnitialize C variables zeros into zero initialized C variables k eak ak ak SF ake ake ae ae ae ae ae sk oR oR R R ak ak ak ak ake akk akk akk Program Entry arm global _start text Start Setup interrupt exception vectors B Reset Handler Undefined Handler B Undefined Handler 116 Embedded Systems Development and Labs The English Edition SWI Handler B SWI Handler Prefetch Handler B Prefetch Handler Abort Handler B Abort Handler NOP Reserved vector IRQ Handler B IRQ Handler FIQ Handler B FIQ Handler Reset Handler LDR sp 0 00002000
227. led ASCII library The function call for the ASCII library is Const INIT8U g auc Ascii8x16 ASCII table The storage of ASCII table is an array that uses the value of ASCII character as its index The relationship between the width height and the library will be extracted during the process of the pixel controlled drawing The ASCII library consists of 256 ANSI ASCII characters For detailed information please refer to the sample programs of the Lab project 4 Bit Map Display Bit map display is used to convert a bitmap file into an array and store it in a data structure Like displaying characters displaying bit map also needs to be controlled by pixel drawing functions and transfer display data to the display buffer The Embest ARM development system provides the following functions that can be used for bit map display Const INT8U ucMouseMap Bit Map File Data Bit map display please refer to the sample program function is the following Void Bitmap View INT16U x INT16U y STRU BITMAP Stru Bitmap Bit map action please refer to the sample program functions are the following Void BitmapPush INT16U x INT16U y STRU_BITMAP Stru_Bitmap Void BitmapPop INT16U x INT16U y STRU_BITMAP Stru_Bitmap 5 1 6 Operation Steps 1 Prepare the Lab environment Connect the Embest Emulator to the target board Connect the target board UARTO to PC serial port using the serial cable that comes with the Embest development system
228. ller that can be hot swapped The followings are the features of this Ethernet controller chip e Meet the standard of Ethernet and IEEE802 3 e Full duplexes send and receive at 10Mb s e Internal 16KB SRAM for send receive buffering This buffer can reduce the speed requirements of the main CPU e Support 8 16 bit data bus 8 interrupt lines and 16 I O base address selections e Support UTP AVI and BNC auto detection support auto polar modification for the 10BaseT network architecture e Four LED programmable output e 100 pin PQFP package that minimized the size of the PCB board D 15 0 w SD 15 0 A 12 8 s SA 4 0 TPIN 4 7 3 EXINT3 INTO TPI 6 9 6 IORB LD 3 10 2 nWE I ows HD 1 12 1 nRESET RSTRV A20 A2 FB2022 RJ45 19 AI y7 AEN A18 nGCS1 S3 44BOX 74LV138 RTL8019AS Figure 2 18 Ethernet Circuit Diagram RTL8019AS has three work modes If 93C46 is not used in the embedded application the cost could be reduced and the wiring Thus the jumper work mode is normally used The I O address of the network card is decided by 1053 1052 IOSI and IOSO There are two RAMs that are integrated in the RTL8019 One is a 16KB from 0x4000 to Ox7FFF and another is a 32 bit from 0x0000 to 0x001F The RAM is a paged memory with one page of 256 bit Generally the page 0 is called PROM for st
229. ls 4 4 5 Operation Steps 1 Prepare the Lab environment Connect the Embest Emulator to the target board Connect the target board UARTO to the PC serial port using the serial cable shipped with the Embest development system 2 Run the PC Hyper Terminal COMI configuration settings 115200 bits per second 8 data bits none parity 1 stop bits none flow control 3 Connect the Embest Emulator to the target board Open the Uart Test ews project file that is located in EmbestIDE Examples Samsung S3CEV40 Uart_Test directory Compile and link the project check the debugging options connect and download the program 4 Watch the hyper terminal window The following will be shown Embest S3CEV40 gt 5 Key in some characters using PC keyboard Press the Enter key All the characters will be displayed as following Embest S3CEV40 gt Hello Word lt CR gt Hello Word Embest S3CEV40 gt 6 After understanding and mastering the lab finish the Lab exercises 4 5 6 Sample Programs 1 Main Function 171 Embedded Systems Development and Labs The English Edition ale File main c Author embest Description c main entry History ak eak ak ak SF SF SF include files include 44blib h
230. m 13 Power Supply Reset Clock Circuit and JTAG Port The development board is powered by a 5V DC regulated power supply Two on board chips produce constant voltages of 3 3V and 2 5V voltage for the I O and the ARM core respectively There is a Reset button on the development board You may press down this button to reset the system The real time clock is generated by connecting MCU to an external 32 768KHz crystal oscillator and power supply circuit The JTAG connection electric circuit is shown in Figure 2 24 It is 20 pins standard JTAG connection circuit JTAG20 2 1 Dp VDD33 TDI TDI 8 7 TMS 10 9 TCK 12 11 TDO 1 nRESET meu R52 R53 R54 10K 10K gt VDD33 Figure 2 24 JTAG Interface Circuit Diagram 14 Switches and Status Indicate Lights SW is the power switch of the entire development board When the switch is in the USB Power position the development board is powered through USB when the switch is in the EXIPOWER position the 45 Embedded Systems Development and Labs The English Edition development board is powered by the power supply D3 is the power indicating lamp which lights if the board 15 powered Moreover the Ethernet port also has 4 status indicating lamps which are D5 for connection D6 for data receiving D13 for data transmitting D14 for auto testing passed 15 User Testing Area The development board has a solder point matrix area for the use
231. mbedded Systems Development and Labs The English Edition Remote Debug Directory Compiler Assembler Linker 4 C Category Include Directories Object files location debug El Preprocessor Definitions lt Compile Options gdwarf c S SOURCE FILE o debug OBJ_FILE Remote Debug Directory Compiler Assembler Linker General P file type Category Executable file C Library Linker script file Aldscript EI Output file name Adebug c2 elf Link Options T ldscript o debug c2 elf lt init o gt OBJ_FILES z Figure 3 12b General options for compiler and linker settings Note set the compiler options and do the compile command before you set the linker options The Linker script file is set to be Idscript Remote Debug Directory Compiler Assembler Linker K 1 init o Category Select entry file Image entry point Link Options T Mdscript o debug c2 elf S Xinit o OBJ FILES Remote Debug Directory Compiler Assembler Linker H 1 Code Generation Options Y Generate relocateable output Optimize output file Do not link against shared libraries Output lots of information during link Category Warn about common symbols Warn only once per undefined symbol Link little endian object Link big endian object Strip debugging sy
232. mbols Strip all symbols Discard all local symbols Link Options T ldscript o debug c2 elf S Xinit o OBJ FILES Figure 3 12c Image Entry Option and Code Generation Options for the Linker page Note the init o is the select entry file The c2 o file will be loaded at the end of the init o code Remote Debug Directory Compiler Assembler Linker gt vi Category Symbol file C EmbestIDE Examples Samsung asm1 c2 debug c2 elf r Action after connected None C Auto download C Command script s Remote Debug Directory Compiler Assembler Linker gt Download M Download file C EmbestIDE Examples Samsung asm1 c2 debugic2 clt l Download verify Category Download address Execute program from 0 0 C Don t Execute until Download address C Program entry point Figure 3 12d The Debug page option settings Note the download address is set to 0 0 since the init o starts at 114 Embedded Systems Development and Labs The English Edition address 0x0 in the memory void nop X _ asm mou rB 38 FE a oe a a Ie o l Pl c p erc void delay void lt int i for i 0 i4 10 i nop H H void delayi8 void lt int i for i 8 i4 18 i i delay 3 6 6 Sample Programs 1 c2 c source code void nop asm mov 10 r0 Function Name de
233. mitted is written to FIFO and then copied to the transmit shifter It is then shifted out by the transmit data pin TxDn The received data 1 shifted from the received data pin RxDn and then copied to FIFO from the shifter UART Operation 165 Embedded Systems Development and Labs The English Edition The following sections describe the UART operations that include data transmission data reception interrupt generation baud rate generation loop back mode infra red mode and auto flow control Data Transmission The data frame for transmission 1s programmable It consists of a start bit 5 to 8 data bits an optional parity bit and 1 to 2 stop bits which can be specified by the line control register UCONn The transmitter can also produce the break condition The break condition forces the serial output to logic 0 state for a duration longer than one frame transmission time This block transmit break signal after the present transmission word transmits perfectly After the break signal transmit continuously transmit data into the Tx FIFO Tx holding register in the case of Non FIFO mode Data Reception Like the transmission the data frame for reception is also programmable It consists of a start bit 5 to 8 data bits an optional parity bit and 1 to 2 stop bits in the line control register UCONn The receiver can detect overrun error parity error frame error and break condition each of which can set an error flag e The ove
234. mple Programs void Tftp Test 1 char pData unsigned long write addr 256 Embedded Systems Development and Labs The English Edition char input string 64 char tmp ip 4 0 0 0 0 int tmp len i j num 0 int b10 0 int b100 0 int flag 0 N N U U U U icInit Initialize the Ethernet driver Initialize the Network protocol art_Printf n Do you want to configure local IP n art Printf Y y to configure local IP addr D d to use Default IP addr 192 168 0 200 n art_Printf Press any key to continue n art Printf 1 Uart Getch Printf Please input address xxx xxx xxx xxx then press ENTER n for i 16 1 0 1 input_string i GetString amp input string for i 0 1 16 amp input string i 0 i if input string i num 4 1 if num 3 flag 1 else 1 num i 2 j 0 for i num i gt 0 1 if nput string 1 if nput string 1 lt 0 input string i gt 9 flag 1 else 1 tmp input string i 0x30 if b100 tmp 100 b10 0 if b10 tmp 10 b100 1 610 1 if tmp lt 256 tmp 1 tmp else local ip 0x4dc0c0c0 257 Embedded Systems Development and Labs The English Edition yelse j b10 20 b100 20 if flag Uart_Printf nManual Set local ip d d d d n tmp ip 3 tmp
235. n assign a memory block release a memory block query the status of a memory block OSSemPend UART sem 0 amp err uHALr printf Task c Called n char Id OSSemPost UART sem delay while 1 1 1 41 litthe led led2 off OSTimeDly 800 ledl off led2 on OSTimeDly 800 void Task4 void Id int i INT32U NowTime print task s id OSSemPend UART sem 0 amp err uHALr Task c Called n char Id OSSemPost UART_sem while 1 i for i 0 1 lt 16 i 1 OSSemPend UART sem 0 amp err NowTime OSTimeGet AHALr Times at Y od r Now Time 277 Embedded Systems Development and Labs The English Edition OSSemPost UART sem OSTimeDly 180 void Task3 void Id 1 char Msg int 170 print task s id OSSemPend UART sem 0 amp err uHALr printf Task c Called n char Id OSSemPost UART sem while 1 1 OSTimeDly 900 OSSemPend UART sem 0 amp err EV40_rtc_DispQ OSSemPost UART_sem void Task2 void Id 1 int value char Msg print task s id OSSemPend UART sem 0 amp err uHALr Task c Called n char Id OSSemPost UART sem while 1 1 value key read display in 8 segment LED if value gt 1 1 Digit Led Symbol value OS TimeDly 90 OSTimeDly 90 j 278 Embedded Systems Development and Labs The En
236. n interrupt enable bit and the count value for the interrupt The count value reaches 0 when the tick time interrupt occurs Then the period of interrupt is as follow Period n 1 128 second n Tick time count value 1 127 This RTC time tick may be used for RTOS real time operating system as kernel time tick If the RTC is used to generate the time ticks the time related function of RTOS would always be synchronized in real time 5 Round Reset Function The round reset function can be performed by the RTC round reset register RTCRST The round boundary 30 40 or 50 sec of the second carry generation can be selected and the second value 1 rounded to zero in the round reset For example when the current time is 23 37 47 and the round boundary is selected to 40 sec the round reset changes the current time to 23 38 00 NOTE 1 All RTC registers have to be accessed by the byte unit using the STRB LDRB instructions or char type pointer NOTE 2 For a complete description of the registers bits please check the S3C44BOX User s Manual 4 5 5 Lab Design 1 Hardware Circuit Design The real time peripheral circuit is shown in Figure 4 13 178 Embedded Systems Development and Labs The English Edition VDD33 EXTALI qs XTALI X2 1N4148 VDDRTC ad C54 1 C46 15P 15 ND Figure 4 13 Real Time Peripheral Circuit 2 Software Design 1 Timer Settings The timer s
237. n is mainly about how to install and setup the software platform The software platform installation includes e Embest IDE installation e Embest Flash Programmer installation 2 2 1 The Installation of Embest IDE Insert the Embest IDE for ARM Software Installation CD into your CD ROM an the installation process is automatically started This is shown in Figure 2 6 Click ENGLISH and a new interface will shown See Figure 2 7 33 Embedded Systems Development and Labs The English Edition Embest IDE for ARM Figure 2 6 Embest IDE Installation Interface Embest IDE for ARM 2003 Figure 2 7 Installation Software Selection Interface Select Embest IDE for ARM 2003 click on the name of the software and run the installation This is shown in Figure 2 8 and Figure 2 9 34 Embedded Systems Development and Labs The English Edition Embest 2003 Integrated Development Environment for ARM Processor Installation 2307 jp Enbe DE Sek prepareo the leat hie wind wich pads pou trough the red of the setup process Paste wat Select the type of Setup then click Next fui Program will be installed with all options C Compact Program will be installed with minimum required options Custom You choose the options you want to install Recommended for advanced users Figure 2 9 Select Type of Setup After the installation the system will prompt you to reboo
238. n wi indow 3 setbuf fp buf 54 55 ead records into a linked list of strut The program is 56 1 E currently stopped here 32 if fge 58 59 4 pthis struct to its ifffp 0 printf couldn t open file eo 5 1 61 6 pthis name malloc s 62 7 strcpy pthis name namey pointer to open a new es 8 pthis age age i Click once on a variable sas 7 i struct list pfirst SEES v System with the Yemote commands remote He struct list r roster pfirst next struct li ve age 24 name 0x23040 gt Ingrid Se a J stopit n 3 15 50 gt 40 Right click here to undetermined sex undetermined next Figure Legend for newoore pena Visible Visible running s suspend Visible Visibie unknown Invisible context switch Visible Initial CresteTask Visible waarasx pizzahut Initial Event Malt Task Visibie information Initial CreateBinarySemaphore Visible Createtemaphote Visible engineer 5835302 Event TryToObtainSemaphore Visible Event Reiensetesaphore Visible phonecompany Initial VaitForfesaghore Visible Get SemaphoreVaioe Visible 13044X X se ee Nillimecond 4 0 D 131877 7148 Event CreateConnection Visible v
239. nd Labs The English Edition 3 Register Window Register Windows is shown in Figure 2 61 It is used to display and modify the values of the registers of the target microprocessor and peripheral devices Registers User FIQ SUC Abort IRQ Undef Peripheral Figure 2 61 Register Window Click on a register name the name and the value of the register will be displayed at the top of the window The user can modify the register value here as shown in Figure 2 62 Reg R2 14 Figure 2 62 Register Value Modification After the value is changed the color of the register will become red as shown in Figure 2 63 72 Embedded Systems Development and Labs The English Edition To RA 00202468 a g Current a RG 0x00000001 R1 6x62621224 R2 0x00000000 R3 6x62626466 R5 0x00000001 8x888088608 R7 8x888088608 R8 6x66666666 R9 6x66666666 R18 6x62626666 R11 6x66666666 R12 6x66666666 R13 6x626263F6 R14 8x02833e28 R15 6x6262b476 SP 6x626263F6 Register ta Peripheral M 000000000 00C SOC El Figure 2 63 The Modified Register 4 Memory Window The memory Window is used to display and modify the content of memory The display will be started from the address indicated by the user The Memory Window 15 shown in Figure 2 64 3 Address 99000020 00 66 02 64 66 88 92 5C 37 e 0 M7
240. nderstand the usage of the S3C44B0X LCD controller Understand the A D convert function of the 53 44 processor Review the display and control program from the LCD Lab Review the serial port communication program design of the 53 44 0 processor 5 3 2 Lab Equipment e Hardware Embest S3CEV40 hardware platform Embest Standard Power Emulator PC e Software Embest IDE 2003 Windows 98 2000 NT XP operation system 5 3 3 Content of the Lab Understand the touch panel circuit control and its design Write programs to get the coordinate values when the touch panel is pressed Write programs to output the coordinate values of the touch panel through the serial port Write programs to display 0 9 A F on the LCD to show the range of the coordinate 5 3 4 Principles of the Lab 1 Touch Screen Panel TSP A 4 wire resistive touch panel is used by the Embest S3CEV40 Development system The resolution of the touch panel is 320 x 240 dots The touch panel system consists of three parts that are the touch panel the control circuit and the AD converter circuit 218 Embedded Systems Development and Labs The English Edition Since 44B0X chip did not provide this function a general I O port can be used for configuration The TSP includes two surface resistances namely X axial surface resistance and Y axial surface resistance Therefore TSP has 4 terminals Its equivalent circuitry when the screen is pressed is shown in Figure 5 19 When
241. ne rDP1 2 volatile unsigned 0x1f00020 define rDP4 7 volatile unsigned 0 1100024 define rDP3 5 volatile unsigned 0 1100028 define rDP2 3 volatile unsigned 0x1f0002c define rDP5 7 volatile unsigned 0 1100030 define rDP3 4 volatile unsigned 0 1100034 define rDP4 5 volatile unsigned 0 1100038 define rDP6 7 volatile unsigned 0x1f0003c define rDITHMODE volatile unsigned 0x1f00044 screen size define MLCD 320 240 3 define LCD TYPE MLCD 320 240 define SCR XSIZE 320 define SCR YSIZE 240 define LCD XSIZE 320 Embedded Systems Development and Labs The English Edition define LCD YSIZE 240 Micro definition define MODE GREY16 16 define CLKVAL_GREY16 12 define HOZVAL LCD_XSIZE 4 1 define LINEVAL LCD_YSIZE 1 define MVAL 13 LCD buffer define ARRAY SIZE GREY16 SCR_XSIZE 2 SCR_YSIZE define LCD BUF SIZE SCR XSIZE SCR YSIZE 2 define LCD ACTIVE BUFFER 0xc300000 define LCD VIRTUAL BUFFER 0xc300000 LCD BUF SIZE ale ae ae ake ake name Lcd Init func Initialize LCD Controller para none ret none modify comment keak ak ak ak ak ak ak a ake void Led_Init void 1 rDITHMODE 0x1223a
242. ner that breaks these restrictions 2 Memory Format The ARM architecture uses a single flat address space Byte addresses are treated as unsigned numbers running from 0 to 2 1 The address space is regarded as consisting of 23 32 bit words each of whose address is word aligned which means that the address is divisible by 4 The word whose word aligned address is A consists of the four bytes with addresses A A 1 A42 and A43 In ARM architecture version 4 and above the address space is also regarded as consisting of 2 16 bit halfwords each of whose address is halfword aligned e little endian memory system a byte or halfword at a word aligned address is the least significant byte or halfword within the word at that address a byte at a halfword aligned address is the least significant byte within the halfword at that address e Ina big endian memory system a byte or halfword at a word aligned address is the most significant byte or halfword within the word at that address a byte at a halfword aligned address is the most significant byte within the halfword at that address 3 GNU Basic Knowledge The Embest IDE is based on the GNU assembler as compiler gcc and linker Id So the GNU syntax and 79 Embedded Systems Development and Labs The English Edition rules should be following when programming For the usage of as gcc and ld please refer to the electronic document ProgRef chm of the Embest IDE Following pres
243. ngs Settings For Remote Debug Directory Compiler Assembler Linker 4 m eee 2 Category Target Specific Options H C Source Allow any instruction Only allow Thumb instructions 9 ASM Source H Link Script objdump Little endian mode default I Big endian mode Use the 32bit APCS Use the 26bit APCS 10 FP architecture Fpall FP architecture No FP multiple Instructions No FP Instructions The code is position independent or reentrant Assemble Options defsym AT91M63200 1 defsym 91 63 1 defsym AT91 DEBUG ICE 1 1 targets at91 1 targets at91 parts m63200 1 targets at91 targets eb63 S SOURCE FILE OK Cancel E Figure 2 46 Assembler Target Specific Settings d Assembler Warning Options Settings The assembler warning options setting is shown in Figure 2 42 Project Settings Settings For Remote Debug Directory Compiler Assembler Linker eee m Opt X swing files Category arning Options m3 Source Suppress warnings 9 11 ASM Source i H Link Script objdump Do not warn about signed overflow Warn when differences altered for long displacements Assemble Options defsym AT91M63200 1 defsym 91 63 1 defsym AT91 DEBUG ICE 1 1 targets at91 A A MargetsVat9 Tipartsim53200 1 targets at91 targ
244. nitialization The initialization steps are 1 configure the chip to the jumper mode half duplex 2 Configure the receive send buffer Two buffers are used for sending data Each buffer occupies 6 pages 256 bytes of internal RAM and it can transmit a maximum of 1536 bytes of Ethernet data package Another buffer is used for receiving data and consists of 20 pages 256 bytes page of internal RAM block 3 Set MAC address and broadcast address MAC address is determined by mac_addr array 4 Configure the chip only receive the data package that match to the local MAC address also can be configured as receiving all packages or broadcast packages Enable received interrupt Enable CRC 5 Start the chip for receiving sending data NicClose Close 8019AS data receive send functions NicReset Reset 8019AS chip NicOutput Data package output Fill the data package with a header of Ethernet data package Set the target MAC address according to the parameter Write the content of Ethernet package to the send buffer Start DMA send function This chip will automatically finish the sending EtherInput Data package input Check the data receive flag register If there is data in the buffer then receive the header of the package from the receive buffer If the content of the header is correct then according to the data length in the header read the content of data from the package and transfer it to the higher layer interface Make the pointer to
245. nnect connect to a socket accept wait for a socket connection listen listening connection send send data recv receive data select input output multi channels multiplexing closesocket close socket A standard server end data receiving sample program is as following include lt stdio h gt include lt stdlib h gt include lt errno h gt include lt string h gt include lt sys types h gt include lt netinet in h gt include lt sys socket h gt include lt sys wait h gt define MYPORT 4950 the port users will be sending to define MAXBUFLEN 100 void main int sockfd struct sockaddr_in my_addr my address information struct sockaddr_in their_addr connector s address information int addr_len numbytes char buf MAXBUFLEN 254 Embedded Systems Development and Labs The English Edition if sockfd socket AF INET SOCK DGRAM 0 1 perror socket exit 1 my addr sin family AF INET host byte order my addr sin port htons MYPORT short network byte order my addr sin addr s addr INADDR ANY auto fill with my IP bzero amp my addr sin zero zero the rest of the struct if bind sockfd struct sockaddr amp my addr sizeof struct sockaddr 1 1 perror bind exit 1 addr len sizeof struct sockaddr if numbytes recvfrom sockfd buf MAXBUFLEN 0 struct
246. ns Before running the main program each of the pins that will be used should be configured If some of these I O pins are not used they could be configured as I O ports 1 S3C44B0X I O Port Related Registers 1 Port Control Register PCONA G In S3C44B0X most of the pins are multiplexed Therefore the functions for each pin must be selected The PCONn port control register determines which function is used for each pin If PGO PG7 are used as wakeup signal in power down mode these ports must be configured in interrupt mode 2 Port Data Register PDATA G If these ports are configured as output ports data can be written to the corresponding bits of PDATn If Ports are configured as input ports the data can be read from the corresponding bits of PDATn 3 Port Pull Up Register PUPC G The port pull up resistor controls the pull up resistor enable disable of each port group When the corresponding 145 Embedded Systems Development and Labs The English Edition bit is 0 1 the pull up resistor of the pin is enabled disabled 4 External Interrupt Control Register The 8 external interrupts are activated through various signaling methods that are programmed in the EXTINT register The signaling methods available are low level trigger high level trigger falling edge trigger rising edge trigger and both edge triggers for the external interrupt request Table 4 12 to Table 4 18 show the pin definitions of each port Table 4
247. nsferred However when the program is called the program can t know how many parameters should be transferred The application programs that are written using different languages can define their own commitments for parameter transferring The often used method is to use the first or the last parameter to indicate the number of parameters including the quantity number itself The ATPCS register mapping is shown in Table 3 5 Register ATPCS Special Role in the procedure call standard RO R3 lt gt al a4 Argument result scratch register 1 4 R4 lt gt vil Variable register v register 1 R5 lt gt v2 Variable register v register 2 R6 lt gt v3 Variable register v register 3 Variable register v register 4 Thumb state R7 lt gt v4 wr Work Register R8 lt gt v5 ARM state variable register 5 ARM state v register 6 Static Base in R9 lt gt v6 sb PID re entrant shared library variants ARM state variable register 7 Stack Limit R10 lt gt v7 sl pointer stack checked variants ARM state variable register 8 ARM state R11 lt gt v8 frame pointer R12 lt gt ip The Intra Procedure call scratch register R13 lt gt sp The Stack Pointer R14 zz Ir The Link Register R15 lt gt PC The Program Counter 119 Embedded Systems Development and Labs The English Edition Table 3 5 ATPCS Register List 2 main and gccmain
248. nstructions to determine whether the instruction is to be executed The condition code flags are usually modified by e Execution of a comparison instruction TEQ or TST e Execution of some other arithmetic logical or move instructions where the destination register of the instruction is not R15 Most of these instructions have both a flag preserving and a flag setting variant with the latter being selected by adding an S qualifier to the instruction mnemonic Some of these instructions only have a flag preserving version This is noted in the individual instruction description Check the ARM reference manual for the description of these bits and their usage 2 The Control Bits The bottom eight bits of a Program Status Register PSR incorporating 1 T and M 4 0 are known collectively as the control bits The control bits change when an exception arises and can be altered by software only when the processor is in the privileged mode e Interrupt disable bits I and F are the interrupt disable bits I bit disables IRQ interrupts when it is set F bit disables FIQ interrupts when it is set e The T bit The T bit should be zero SBZ on ARM architecture versions 3 and below and on non T variants of ARM architecture version 4 No instructions exist in these architectures that can switch between ARM and Thumb states Check the ARM reference manual for its meaning e The mode bits MI M2 and M4 M 4 0 are the mode bit
249. o 1 pixel In 16 level gray mode 4 bits of video data correspond to 1 pixel In color mode 8 bits 3 bits of red 3 bits of green 2 bits of blue of video data correspond to 1 pixel The color data format in a byte is as follows Bit 7 5 Red Bit 4 2 Green Bit 1 0 Blue 5 LCD Controller Registers The S3C44BOX has all together 18 registers Shown in Table 5 4 Table 5 4 LCD Controller Registers List Register Address Rw Description LCDCON1 0x01F00000 LCD control 1 register LCDCON2 0x01F00004 LCD control 2 register Ox 00000000 LCDCON2 0x01F00004 LCD control 2 register Ox 00000000 Reset Value 0 00000000 195 Embedded Systems Development and Labs The English Edition LCDCONS3 0x01F00040 RAN Test Mode Enable Register 0x00 LCDSADDR1 0x01FO0008 Frame buffer start address 1 register 0x000000 LCDSADDR2 0 01 0000 Frame buffer start address 2 register 0x000000 LCDSADDR3 0x01F00010 Virtual screen address set 0x000000 REDLUT 0x01F00014 R W Red lookup table register 0 00000000 GREENLUT 0x01F00018 Graen lookup table register Ox 00000000 BLUELUT oxotFooo1c Blue lookup table register 0 0000 0x0 1FO0020 Dithering pattern duty 1 2 register Please refer to a sample program source for the latest value of this register DP4 7 Ox01FO00024 RW Dithering pattern duty 4 7 register OxbaSda65 Please refer to a sample program source for the latest value of this register
250. ocations the first definition overrides any other definitions 2 Some Instructions 1 LDR The LDR Load Register instruction loads a word from the memory address calculated by addressing mode See the ARM reference manual and writes it to register Rd If the address is not word aligned the loaded value is rotated right by 8 times the value of bits 1 0 Please note that the as compiler will replace the LDR instruction with a MOV of MVN instruction if that is possible Syntax Format Rd lt expression gt Where expression is 32 bit variable that needs to be read Rd is the target register Example LDR r1 0xff LDR r0 Oxfff00000 89 Embedded Systems Development and Labs The English Edition 2 ADR ADR can read a value into a register from an address stored in the PC or other general register The assembler will replace the ADR with a suitable instruction ADD or SUB Syntax Format ADR lt register gt lt label gt register 1s the target register label is an expression based on a PC address or a register Example Labell MVO r0 225 ADR r2 labell 3 ltorg is used to generate a word aligned address for the following segment of code generally is text segment Syntax Format 3 2 5 Lab Operation Steps 1 LabA 1 Refer to Section 3 1 5 Lab A gt step 1 build a new project and name it as ARMcode 2 Refer to Section 3 1 5 Lab A gt step 2 and in
251. ode Register Register Address Description Reset Value I 0x01E00010 Ox1b1b1b1b oxotEo0014 0x00001f1b 0x01E00018 0x1b1b1b1b 0x0000xx1b ISPR 0 01 00020 IRQ interrupt service pending register 0 00000000 Only one service bit can be set CMST 0x01E0001C IRQ interrupt service clear register Undef Whatever to be set INTPND will be cleared automatically ISPC Ox01E00024 w NOTE In FIQ mode there is no service pending register like _ISPR users must check INTPND register The priority generating block consists of five units 1 master unit and 4 slave units Each slave priority generating unit manages six interrupt sources The master priority generating unit manages 4 slave units and 2 interrupt sources Each slave unit has 4 programmable priority source sGn and 2 fixed priority sources kn The priority among the 4 sources in each slave unit is determined by the I PSLV register The other 2 fixed priorities have the lowest priority among the 6 sources The master priority generating unit determines the priority between 4 slave units and 2 interrupt sources using the I PMST register The 2 interrupt sources INT RTC and INT ADC have the lowest priority among the 26 interrupt sources If several interrupts are requested at the same time the I ISPR register shows only the requested interrupt source with the highest priority 6 IRQ FIQ Interrupt Service Pending Clear Re
252. oding each sample ITU T 64kb s standard G 711 is based on the PCM method The sample frequency is 8khz Each sample is coded with nonlinear u law or A law The speed is 64 kb s 259 Embedded Systems Development and Labs The English Edition The CD voice using PCM coding the sample frequency is 44khz every sample uses 16 bit coding The PCM voice file used in Windows is a wav format file t wav that uses 44 100 kHz sample frequency 16 bit code dimensional sound stereo Other coding methods include ADPCM Adaptive Differential Pulse Code Modulation LPC Linear Predictive Coding and LD CELP Low Delay Code Excited Linear Prediction etc The current trend of coding format includes MP3 MPEG Audio Layer 3 WMA Windows Media Audio and RA Real Audio Some features of these coding formats is that they are used on the network support playing while reading etc 2 IIS Voice Interface IIS is a serial bus design technology developed by SONY Philips etc It is an interface standard for voice processing technology and devices such as CD digital voice processors etc IIS separates the clock signal from the voice signal in order to avoid the clock jitter IIS processes only voice data Other data such as control signals are transferred separately IIS bus has only 3 serial lines that are time multiplexing Serial Data SD line Word Selection WS line and Continuous Serial Clock CSK line The IIS system interconnection diagram
253. ol register LCDCONI 2 For the LCD screen display control and data read write the other registers should be configured The details are as following 1 Configuration of the VM VFRAME VLINE signals The VM signal is used by the LCD driver to alternate the polarity of the row and column voltage used to turn the pixel on and off The toggle rate of VM signal can be controlled by using the MMODE bit of LCDCON 1 register and MVAL 7 0 field of LCDSADDR 2 register as shown below VM Rate VLINE Rate 2 MVAL The VFRAME and VLINE pulse generation is controlled by the configurations of the HOZVAL field and the LINEVAL field in the LCDCON2 register This is shown below HOZVAL Horizontal display size Number of the valid VD data line 1 In color mode Horizontal display size 3 Number of Horizontal Pixel LINEVAL Vertical display size 1 In case of single scan display type LINEVAL Vertical display size 2 1 In case of dual scan display type 2 Configuration of the VCLK signal VCLK is the timer signal of the LCD When the processor is working at MCLK 66MHz the highest frequency of VCLK 15 16 5MHz The minimum value of CLKVAL is 2 VCLK Hz MCLK CLKVAL x 2 The frame rate 15 given by the VFRAM signal frequency The frame rate is closely related to the field of WLH VLINE pulse width WHLY the delay width of VCLK after VLINE pulse HOZVAL VLINEBLANK and LINEVAL in LCDCON and LCDCON2 registers as well as VCL
254. on 0 1000 gt RO x r1 0x 61 R1 0x81 x r8 r8 r1 R8 or R1 x r1 r2 R2 gt R1 x r2 r6 r1 lsr 1 R2 RO R1 2 stop infinit loop to stop x Sep by step execution 86 Embedded Systems Development and Labs The English Edition fi Current RG 0x00888057 R1 0x88888840 R2 0x008882d88 R3 0 090000000 R4 0x000800080 RS 0x008008080 R6 0x80880800 R7 0x000880808 R8 0x80800000 R9 0x800800008 R18 8x68880808 R11 8x08800808 R12 0x08880008 R13 0 00001000 R14 6x66006608 R15 0 0000801 SP 6x666601660 x LR 8x88888888 AME PC 0x80808801c 0 1 2 3 4 5 6 7 8 9 C D E F CPSR 0 00000043 66661666 80 2D 88 66 FF FF FF FF FF FF FF FF FF FF FF FF 00001010 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF SPSR 0x80008008 80801028 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 4 manaa ana rr rr rr rr rr rr rr rr rr rr rr rr rr rr rr 474 Register ata Peripheral TE 1 Memory 2 la lx Register and Memory window content at the current step 3 1 7 Exercises 1 Write a program to write the values 1 8 into R4 R11 Every time when you write this value save the content of R4 R11 to SP The initial value of SP should be 0x800 At the end use the LDMFD instruction to clear R4 R11 to 0 2 Modify the value of x y in this Lab and watch the results in the debug windo
255. opment system 2 1 An Overview of the Lab Development system The Embest ARM Lab development system includes e Embest IDE for ARM 2003 e Embest Emulator for ARM JTAG e Flash Programmer e Embest S3CEV40 Development Board e Connection Cables Power Adapters and Lab Guide e Two CDs Embest IDE for ARM Software Installation CD A Compound Lab Development system CD Embest IDE software and Flash Programmer software are on the Embest IDE for ARM Software Installation CD The content of the compounded CD includes Embest S3CEV40 Evaluation Board Manual Schematics of Evaluation Board Boot Program Function Module Test Programs uC OS II Real Time Operation System etc This CD also has all the source code of this Lab course PLEASE NOTE that some of the resources are in Chinese and the ones that are in English need to be corrected In order to run the sample programs of this Lab course please copy the content of the CD the following directory C Embest Examples Samsung S3CEV40 is the default hard drive Users can select different hard drives during the installation process In all the Labs of this book the directory C Embest Examples Samsung S3CEV40 is called sample program directory Attached to this book is the latest version of the IDE Education Version The installation process of this software is exactly the same as the installation process of normal version Embest IDE for ARM 2003 that provided in the full
256. oring the networks card address that will be read when the network card is reset This Lab system doesn t use 93C46 so the PROM is not used In this case the software must specify a network address and write it to MARO MARS The 16KB RAM is used for receive transmit buffering where 0x4C00 0x7FFF is used as a receive buffer and 0x4000 0x4BFF is used as a send buffer 7 TIS Interface IIS is an audio bus interface It is a standard interface that is used by SONY Philips etc The IIS interface circuit diagram is presented in Figure 2 19 The S3C44B0x s IIS interface is connected to the Philips UDA1341TS Digital audio CODEC A MICROPHONE output channel and a SPEAKER phone input channel is available on this chip UDA1341 can convert the analog dimensional sound stereo to digital signal and convert digital signal to analog signal For the digital signal this chip provides DSP functions for digital audio signal processing In applications this chip can be used at MDs CDs Notebook computers PCs Digital Cameras etc The 41 Embedded Systems Development and Labs The English Edition S3C44B0X s IIS port can be connected to the WS DATAO and SYSCLK of UDA134 ITS The pins L3DATA L3MODE and L3CLOOCK are the L3 bus of the UDAI341TX This bus is used at microprocessor input mode The pins are microprocessor data line microprocessor mode line and microprocessor clock line Microprocessor can configure the digital audio proc
257. ource files are responsible for tasks such as kernel management event management message queue management memory management message management semaphore management task scheduling and timer management e Configuration Code This part includes 2 header files for configuring the number of events per control block and it includes message management code etc e Processor Related Code Includes 1 header file 1 assembly file and 1 C file In the process of porting the uC OS II kernel the users need to consider these files Application Software Kernel Code CPU independent Configuration Code Application Related Oscore c Os mbox c Os mem c Os_cfg h Os_q c Includes h Os_sem c Os task c Os time c Ucos ii h 269 Embedded Systems Development and Labs The English Edition Porting Code Microprocessor Related Os cup h Os cpu a asm Os cup c c Figure 7 1 uC OS II File System 2 uC OS II Porting Conditions Porting the uC OS II to the ARM processor requires the following conditions 1 The C Compiler Targeting the Microprocessor Can Generate Reentry Code Reentry code means that a piece of code can be used by more than one task without fear of data corruption In another words this code can be recalled after it was interrupted during the processing The following are two examples of non reentrant and reentrant functions Int temp Void swap int x int y 1 temp x X Y void swap int x
258. ov Ir pe bx rO EEIE E ENA AEE AEEA E H Loop for ever EELA End of application Normally never occur Could jump on Software Reset B 0x0 122 Embedded Systems Development and Labs The English Edition global gecmain gccmain mov end 3 random s Sample Source Code Random number generator This uses a 33 bit feedback shift register to generate a pseudo randomly ordered sequence of numbers which repeats in a cycle of length 2 33 1 NOTE randomseed should not be set to 0 otherwise a zero will be generated continuously not particularly random This is a good application of direct ARM assembler because the 33 bit shift register can be implemented using RRX which uses reg carry An ANSI C version would be less efficient as the compiler would not use RRX GLOBAL randomnumber randomnumber on exit al low 32 65 of pseudo random number a2 high bit if you want to know it LDR ip seedpointer LDMIA ip al a2 TST a2 a2 LSR 1 to bit into carry MOVS a3 al RRX 33 bit rotate right ADC a2 a2 a2 carry into LSB of a2 EOR a3 a3 al LSL 12 involved al a3 a3 LSR 20 similarly involved STMIA ip al a2 MOV lr seedpointer LONG seed DATA GLOBAL seed seed LONG 0355555555 LONG 0355555555 123 Embedded Systems Development and Labs The English Edition END 4 Idscript Sample Sou
259. per undefined symbol Link little endian object Link big endian object Strip all symbols Strip debugging symbols Discard all local symbols Link Options e entry T targets at91 targets Idscript L A 4 Abuildyxgcc arm elfMibYgcc libYarm elf3 0 2Yarm inter L A 4 Abuildyxgcc arm elfarm elfMibYarm inter o debug led_swing elf S amp cstartup o OBJ FILES Figure 2 50 Linker Code Generate Option Settings 66 Embedded Systems Development and Labs The English Edition d Linker Include Object and Library Modules Settings The include object and library settings are shown in Figure 2 51 Project Settings Settings Debug Directory Compiler Assembler Linker a Category include Object and Library Modules Source J ASM Source Link Script objdump Library or Object Modules a A MAlTargetsvat391idriversVib_drvAarm interVib drv 32 lib a A K MNTargetsVvat31Vpartsim63200YVarm interym63200_lib32 lib Ic Igcc Link Options e entry T targets at91 targets Idscript L A 4 Abuildyxgcc arm elflibYgcc libyarm elfi3 0 2Xarm inter L A A Abuildyxgcc arm elfjarm elfMdibYarm inter o debug led_swing elf S cstartup o OBJ FILES Ei Cancel Figure 2 51 Linker Include Object and Library Modules Settings e Linker Additional Library Search Path Settings The additional libra
260. perating system support became an important issue Due to the fact that running RTOS on an 8 bit single chip processor has some difficulties the 32 bit microprocessor as core of high performance embedded systems became a common trend of technology development From the early 90s the way of embedded system design had gradually been changed from Integrated Circuit level to Integrated System level The Integrated Circuit is based on embedded microprocessors and DSPs The Integrated System is based on SoC System on Chip concept that was introduced at that time Nowadays the embedded system has entered a design phase that is based on SoC and the SoC standardization is used more and more SoC provide complex hardware features for high performance embedded system SoC also provides the basic hardware support for real time embedded operating system During 80s some real time operating systems emerged The most common RTOS include VxWorks Windows CE Palm ucLinux pSOS uC OS etc However the real application on these RTOS happened only in recent last few years There are two reasons for this development One is the increased requirement of the complexity of embedded Embedded Systems Development and Labs The English Edition software development in the last few years another 15 the SoC RTOS can be run in a dependable effaceable and affordable way Most of the RTOS are expensive As a result some open sourced RTOS such as uc OS II ucLinux a
261. program run Learn how to used Embest IDE for application program development and debugging 5 After understanding and mastering the Lab do the exercises Embest IDE D forsamsungXS3CEV40007 explasm random s loj x File Edit View Project Build Debug Tools Window Help l x ID y C Pa Sh main amp amp 840 amp uad 5 9 Workspace explasm 1 proj Bg rantest files GLOBAL randomnumber randomnunmber Source on exit amp randtest c a1 lou 32 bits of pseudo random number 30 ASM Source a2 high bit if you want to know it 8 init s LDR ip seedpointer E random s LDMIA a1 a2 ER TST a2 a2 LSRit1 to bit into carry ku MOUS a3 a1 RRX 33 bit rotate righ _ Scrip ADC a2 a2 a2 carry into LSB of readme txt EOR a3 a3 a1 LSL 12 involved EOR a1 a3 LSR 26 similarly involve STMIA ip a1 a2 HOU pc 1r seedpointer LONG seed DATA GLOBAL seed 4 aid Ready 9 Col 33 pos NUM 77 Figure 3 14 explasm Projet Files 120 Embedded Systems Development and Labs The English Edition 3 7 6 Sample Programs 1 randtest c Sample Source Code Random number generator demo program Calls assembler function randomnumber defined in random s xy include lt stdio h gt this function prototype is needed because randomnumber is external exte
262. put the sample program lab A as source code Save this file as ARMcode s 3 Select Project Add To Project Files item or right click the project management window and select the same item A dialog will open Select the source file that has just been created 4 Refer to 3 1 5 Lab A gt step 4 finish the related settings 5 Refer to 3 1 5 Lab A gt step 5 generate the object code 6 Refer to 3 1 5 Lab A gt step 6 finish the related settings Notice In the Debug page the Symbol file should be ARMcode elf 7 Select Debug Remote Connect to connect the software emulator Execute the Download command to download program Open the register window 8 Open the memory window watch the contents at 0x8054 0x80A0 and the contents at 0 80 4 0 80 0 9 Single step the program watch and record the changes in registers and memory Watch the content changes in the memory in step 8 When the STDMFD LDMFD LDMIA and STMIA is executing watch the content changes that these instructions parameter pointed in the memory or registers 10 Study the related technical materials watch the program run Get a better understanding of the usage of these ARM instructions 11 After understanding and mastering the Lab A do the exercises at the end of the Lab 2 2 Lab B 1 Reter to 3 1 ARM Instruction Lab 1 and sample programs add new project to the current work apace 2 Refer to the steps in Lab A finish the object code generation and
263. r Code Generation Options 1 5 28 C Source ee Bled ewing c Compile just for ANSI C ASM Source Use the same size for double as for float ut cstartup s Use the smallist fitting integer to hold enums amp wait irq s Link Script 8 Idscript objdump Pretend that host and target use the same FP format Do not search the system include directories Do not put uninitialised globals in the common section Compile Options fno builtin ansi mthumb interwork 02 gdwarf unused c I A A Margetsyat91 SOURCE FILE o AdebugiS OBJ FILE Cancel _ Figure 2 43 Compiler Code Generation Settings 6 Assembler Settings The assembler settings is shown in Figure 2 44 the settings in this page will be displayed in the Assemble Options window The users can manually edit the Assemble Options but need to follow the GNU rules a Assembler General Settings The assembler general settings are shown in Figure 2 44 e Include Directory header files directory e Object files location the directory of object files e Predefinitions Define the pre compile macros 62 Embedded Systems Development and Labs The English Edition Project Settings Settings Remote Debug Directory Compiler Assembler Linker 4 USSmENTEm 07 n 2 uA EIE Category General i 9 28 Source a ASM Sourc
264. r 2 LSB Max 3 LSB 219 Embedded Systems Development and Labs The English Edition Maximum Conversion Rate 100 KSPS Input voltage range 0 2 5V Input bandwidth 0 100 Hz without S H sample amp hold circuit Low Power Consumption AIN 7 0 Figure 5 16 Functional Block Diagram of S3C440BX A D Converter 1 Register Group The integrated ADC has the following three registers ADC control register ADCCON ADC Prescaler Register ADCPSR and ADC Data Register ADCDAT 1 ADC control register ADCCON FLAG A D converter state flag Read Only A D conversion in process 1 End of A D conversion If check this bit please refer to workaround in page 13 3 SLEEP 5 System power down Normal operation 1 Sleep mode INPUT 4 2 Clock source select SELECT 000 AINO 001 1 010 AIN2 011 AIN3 100 AIN4 101 AIN5 110 AING 111 7 READ_ START 1 A D conversion start by read O Disable start by read operation 1 Enable start by read operation ENABLE START A D conversion start by enable If READ START is enabled this value is not valid No operation 1 A D conversion starts and this bit is deared after the start up 2 ADC Prescaler Register ADCPSR ADCPSR Description Initial State PRESCALER 7 0 Prescaler value 0 255 Division factor 2 prescaler_value 1 Total docks for ADC converstion 2 Prescalser value 1 16 220 Embedded
265. rDP1 2 0 5 5 rDP4 7 0x366cd9b rDP3 5 0xda5a7 rDP2 3 0 7 rDP5 7 Oxfeda5b7 rDP3 4 Oxebd7 rDP4 5 Oxebfd7 rDP6 7 0xTefdfbf rLCDCON1 0 1 lt lt 5 MVAL_USED lt lt 7 0x0 lt lt 8 0x0 lt lt 10 CLKVAL_GREY16 lt lt 12 rLCDCON2 LINEVAL HOZVAL lt lt 10 10 lt lt 21 rLCDSADDRI 0x2 lt lt 27 LCD_ACTIVE_BUFFER gt gt 22 lt lt 21 MSD LCD ACTIVE BUFFER 1 rLCDSADDR2 MSD LCD ACTIVE BUFFER SCR_XSIZE LCD_YSIZE 2 gt gt 1 MVAL lt lt 21 204 Embedded Systems Development and Labs The English Edition rLCDSADDR3 LCD XSIZE 4 SCR XSIZE LCD XSIZE 4 9 enable4B SNGL_SCAN WDLY 8clk WLH 8clk rLCDCONI 1 1 5 MVAL USED 7 0x3 8 0x3 10 CLKVAL 16 lt lt 12 rBLUELUT 0xfa40 Enable LCD Logic and EL back light rPDATE rPDATE amp 0x0e 2 Control Functions 1 Clear Screen Functions AE SF SF SF SF 9 afe afe SF name Lcd Active func clear virtual screen para none ret none modify comment keak ak ak ak ak ak ak ak void Led Clr void 1 INT32U i INT32U pDisp INT32U LCD VIRTUAL BUFFER for i 0 i SCR XSIZE SCR YSIZE 2 4 i pDisp WHITE A k e e e eak ak ak
266. ram will cause system collapse and no startup Errors such as run time random problems and system collapse are hard to solve The Embest IDE debugger and debug devices provide Windows debugging environment for program loading execution run time control and monitoring of various debug information The Embest debugging functions include e Break points Break point setting break point shielding break point cancellation conditional break point break point listing e Single step execution of programs e Variable monitoring functions Variable value display can be changed while the program is executing variables can also be modified at run time e Memory content display and modification memory content display format setting e Stack display e Graphic interface debugging and command line debugging e Multiple display mode for the same source code the source code can be displayed as source assembly or mixed source assembly e Provides MS Visual Studio like debug menu Go Stop Step into Step over Step out Run to Cursor etc e Program uploads and downloads 2 1 2 Embest Emulator for ARM JTAG JTAG emulator is also called JTAG debugger The JTAG emulator communicates with the ARM core through a JTAG loop interface This debugging method doesn t need to use the main resources on the chip It doesn t need the target memory and it doesn t occupy any peripheral ports of the target system Because the target programs are executed by the tar
267. rce Code SECTIONS 1 0x0 text text data data rodata rodata bss bss 3 7 7 Exercises Refer to the sample source code of Lab A in 3 3 6 improve the exercise program language program Lab2 in 3 6 Use embedded assembly language to implement R2 RO Save the result in RO When you debugging open the Register window watch the changes RO R1 R2 and SP registers before and after the embedded assembly program run Watch the content changes in ATPCS mapping registers 3 8 Sum Up Programming 3 8 1 Purpose e Master the microprocessor boot process e Master how to interpret the debugging results using Embest IDE debug windows learn how to find out the errors when debugging the software e Master the often used skills needed in the Embest IDE software development and debugging 3 8 2 Lab Equipment e Hardware PC e Software Embest IDE 2003 Windows 98 2000 NT XP 3 8 3 Content of the Lab Accomplish a complete project including boot code assembly function and C file The C file includes ARM function and Thumb function that can be mutual called by each other 3 8 4 Principles of the Lab 1 Embest IDE Development and Debug Windows With the Embest IDE embedded development environment the users can edit the source program files in the Edit Windows use the Disassembly Window to watch the execution of the program use the Register Window 124 Embedded Systems Developm
268. rdware platform Embest Standard Power Emulator PC e Software Embest IDE 2003 Windows 98 2000 NT XP operation system 7 1 3 Content of the Lab Write a program that creates 3 tasks for 8 SEG LED displaying LED lights flashing and sending data to the serial port 7 1 4 Principles of the Lab 1 The Boot Process of the uC OS II Kernel The uC OS II booting follows the following steps flow 1 Assign task stack in the programs The purpose of assigning stack 1 to provide a space for stack and variables of the running task The task stack is initialized by defining array unsigned int StackX STACKSIZE and transfer the pointer to this array when task is booted 2 Establish Task Function Body The function body includes variable definitions and initializations functions or instructions time interval settings of suspended task 275 Embedded Systems Development and Labs The English Edition 3 Describes boot task Transfer the address of task function task stack and task priority 4 The boot process is done by function main This function includes hardware initialization before running tasks operation system initialization start timer interrupt boot tasks etc 2 uC OS II Task Managment uC OS provides the following functions for task management OSTaskCreate create a task OSTaskCreateExt extension version of create a task OSTaskDel delete a task OSTaskDelReq request for a task delete OSTaskChangePrio change tas
269. re being chosen by many users These open sourced RTOS are also suitable as teaching tools The RTOS functionality and principles are relatively complex Anyone who is interested in the RTOS research or development please refer to related books in the field Embedded systems based on embedded processor are characterized by small size lightweight low cost and high performance The largely used 32 bit microprocessors are ARM from ARM Ltd Alpha from Compaq PA RISE from HP Power PC from IBM MIPS from MIPS Technologies Inc SPARC from Sun etc ARM processors have merits of high performance low power consumption low cost etc ARM processors are the most widely used microprocessors amongst the 32 bit and 64 bit microprocessors In the early 90s the semiconductor industry formed a production chain that combined the design industry manufacture industry packaging and testing industry Some real semiconductor companies were greatly developed and some fabless chipless companies also emerged The Advanced RISC Machines ARM is the most successful company based on the fabless chipless mode ARM doesn t produce or sale chips but provides high performance IP cores that are being sold to authorized semiconductor companies Let s look back to the development history of ARM technologies At the time when ARM7 system architecture system architecture v3 was just been accepted and applied the embedded microprocessor market was overwhelmingly occupied by 8 bi
270. regardless of the current serial output enable bit IICSTAT setting Slave address 7 1 4 MULTI MASTER IIC BUS TRANSMIT RECEIVE DATA SHIFT REGISTER IICDS 235 Embedded Systems Development and Labs The English Edition Reset Value L Register RW pse IICDS 0 0106000 IIC Bus transmit receive data shift register itial State Data shift bit data shift register for IIC bus Tx Rx operation XXXX When serial output enable 1 in the IICSTAT IICDS is write enabled The IICDS value can be read any time regardless of the current serial output enable bit IICSTAT setting The IIC Bus Controler Block Diagram is as following Address Register IIC Bus Control Logic ICCON IICSTAT mE Shift Register 4 M9 SDA Shift Register I CDS Data Bus Figure 6 7 IIC Bus Controller Block Diagram 2 The read write usage of the S3C44BOX HC bus Single byte write operation R W 0 Addr device page and address START_C Addr 7bit W DATA IByte ACK STOP Same page multi bytes write operation R W 0 OPADDR device and page address higher 7bit START C OPADDR 7bit W ACK Addr DATA nByte STOP C Single byte serial read memory operation R W 1 Addr device page and address START C Addr 7bit R DATA IByte ACK STOP C Same pagemulti bytes read
271. registers to be used By reloading these values into the registers when it returns the exception handler can ensure that it does not corrupt the state of the program that was being executed when the exception occurred Register R14 also known as the Link Register or LR has two special functions in the architecture e In each mode the mode s own version of R14 is used to hold the subroutine return address When a subroutine call is performed by a BL or BLX instruction R14 is set to the subroutine return address The subroutine return is performed by copying R14 back to the program counter e When an exception occurs the appropriate exception mode s version of R14 is set to the exception return address offset by a small constant for some exceptions The exception return is performed in a similar way to a subroutine return but using slightly different instructions to ensure full restoration of the state of the program that was being executed when the exception occurred Register R14 can be treated as a general purpose register at all other times C Register R15 holds the Program Counter PC It can often be used in place of the general purpose registers RO to R14 and is therefore considered one of the general purpose registers However there are also many instruction specific restrictions or special cased about its use These are noted in the individual instruction descriptions Usually the instruction is UNPREDICTABLE if R15 is used in a man
272. ren rne nnne nnns 176 4 53 Content ofthe labu uu u ee te ete e Ite ai q e ies 176 4 5 4 Principles of the Mab ud ciel tet tette taedet tede ied tee a 176 4 5 5 Lab E EU EE E EUR 178 4 5 6 Operation rennen enn 180 4 5 7 Sample Programs ite e dem een 180 4 DIB o nOD RO AR RD NOR ERR A 185 4 6 8 SEG LED Display Lab or 185 62 uec ke Hecate ob scc iiM O 185 4 6 2 Fab Equipment esiste e emi ens 185 4 6 3 Content Ot the Lab 4 3 5 ee d e dee hts inet let poe teens Gua vene iut pue euren eiut HR ee 185 4 6 4 Principles of the Lab 185 4 6 5 Operation Steps nnr inneren 188 4 6 6 Sample Programs eet etr emere eere eet 188 4 6 T 189 Chapter 5 Human Interface Labs 190 Sd ECD Display 190 5 Ses Street tas stet s stt ste stem t ste es 190 5 1 2 Lab Equipments E e E te Oa tte 190 5 1 3 Content of the Lab 190 5 1 4 Principles of the Lab enne enne inneren ener 190 5315 Lab i seme eee eti A 199 5 156 Operation Steps 4 oe ioi nae re e 202 5 157 Sample Programs e oe OU RE ROT EUER aie 203 S SS EXGTCISeS n ee ceat a oie nO
273. res Z Main amd Proc 0 in the Ada version One Fifty REG One Fifty One Fifty REG char i Enumeration Enum Loc Str 3D Str 1 Loc Str 30 Str 2 Loc REG int Run Index REG int Number_Of_Runs Initializations Next Ptr Glob Rec Pointer malloc sizeof Rec_Type Ptr Glob Rec Pointer malloc sizeof Rec Ptr Glob Ptr Comp Ptr Glob Discr Ptr Glob variant var 1 Enum Comp Ptr Glob variant var 1 Int Comp strcpy Ptr Glob variant var 1 Str DHRYSTONE PROGRAM SOME STRING strcpy Str 1 Loc DHRYSTONE PROGRAM 1 ST STRING Arr 2 Glob 81 71 10 7 Was missing in published program Without this statement rr 2 Glob 8 7 would have an undefined value Warning With 16 1 processors and Number Of Runs gt 32000 overflow may occur for this array element printf n printf printf if Reg X printf Program compiled with register attributen printf n else printf Program compiled without printf n printf Please give the number of runs through the benchmark int n scanf Xd amp n Number Of _Runs gt ES printf Col25 lt Figure 1 3 Source Code Window hrystone Benchmark Version 2 1 Language C n Next Ptr Glob Ident 1 Ident 8 2 register attributen 21 Embedded Systems Development and Labs The English Edition
274. ress For more detailed information of IP protocol please refer to RFC791 The IP address is actually a method used to unite the network physical addresses with the higher layer software via Internet Layer This method uses uniform address format via a uniform management Different hosts within the Ethernet have different addresses In IPv4 each host IP address is 32 bits that consists of 4 bytes In order to conveniently read the address by the users decimal with dot separation format is used For example 211 154 134 93 1s the IP address of Embedded Development Network Website Each IP address has two parts The network section describes the type of different scale networks The host section describes the address of the 249 Embedded Systems Development and Labs The English Edition host in the network According to the size of the network scale the IP address can be divided into five classes A B C D E and F Among these classes A B and C are used as the main address types D class address 1s used as multi transmission address for multicasting E class address is used as an extended optional address 2 TCP Protocol If an IP package has a packaged TCP package the IP layer will transmit this package to the higher TCP layer The TCP will sort the packages and do error checking A virtual circuit connection will also be established TCP package has a series number and an acknowledgment The received package will be sorted by the series num
275. ress 0X01D2003C PCOMF reset value 0X00252A Table 2 9 Port G IN bootloader IN bootloader 49 Embedded Systems Development and Labs The English Edition PCONG access address 0X01D20040 PDATG access address 0X01D20044 PUPG access address 0X01D20048 PCONG reset value OXFFFF 2 3 3 Bus Expansion Embest EV44B0 development board has reserved the expansion ports for all pins and the user can conveniently expand memory and other external equipments according to their own needs It can satisfy the application requirements of most products Users need to make their own expansion board when they are expanding their circuit design As long as the definition signals of the expansion board port corresponds to the expansion port signals in the development board The definition of expansion interface A and B are completely the same This is shown in Figure 2 25 JI JI4 JIS JI4 1 VDD33 1 VDD33 1f VDD33 1f VDD33 2 VDD33 2 VDD33 2t VDD33 2t VDD33 3 D7 3 PDO 3 D7 3 PDO 4 D 4 4 8 4 Si Sur 5 5 I J D2 PD5 02 7 PD5 9 D1 9 PD6 9 k 01 9 PD6 10 00 10 10 00 10 11 GND 11 GND 1 GND 1 GND 12 D15 12 b 12 015 12 13 O D14 13 O VDDRTC Bo D14 Bo VDDRTC 14 O D13 14 b AVCOM 14 D13 14 AVCOM 15 012 15 AREFB 15 D12 15 AREFB 16 D11 16 K AREFT 16 011 16 17 010 17 O GND 17 D10 17 GND 18 D9 18 5 AIN7 18 D9 18 AIN7 19 D8 19 AING
276. rinciples of the 230 bab ss edere 237 6 1 6 Operation niet mitte ite test 238 631 7 Sample Programso n eee dee anqa t te 239 6 1 8 HEN 239 6 2 Ethernet Communication u nuan usq iq nene nnennte nnne 242 6 2 T PULP OSCE eos ie erdt tee eere tert er terti DE 242 6 2 2 EabiEquipiment 2 eot ite OI tue ea E 242 6 2 3 Content of the Lab laani k TEA ANTEN 242 6 2 4 Principles of the Lab enne innere entree 242 6 2 5 Operation Steps taste tee vt st test e stet tede it 256 Sample PrOgEaDis Jc ette tete ede E RU Oe tete ete td 256 locu m e 259 6 3 Voice Interface 259 6 3 T P tpoSec a mei ot E te e t eed E 259 6 3 2 EQuipimenit acie itp V oe ovi e rele ep idc e am tbe tees 259 6 3 3 Content of the 259 6 3 4 Principles of the Lab enne enne entren nennen 259 6 3 Sample Programs m u n ulna a 263 6 36 u aun E ES EC TE 268 Embedded Systems Development and Labs The English Edition Chapter7 Real Time Operation System Labs 269 7 1 uC OS Immigration Lab n 6 3 PUPO Eni 1 1 2 Eab Equipiment u u u e Ges ea eig 741 3 Conten
277. rm explasm random s o debug randon o arm elf gcc gdwarf c D EmbestIDE Examples arm explasm randtest c o debug randtest o arm elf ld emain EL Ttext 0 2000000 o debug rantest elf debug randtest o debug random o Command s successfully executed Build Debug Command Find in Files 1 ri Figure 2 28 Build Page of Output Window 2 Create a Project A workspace consists of one or multiple projects The steps of creating a project are the followings 1 Select File New Workspace IDE will prompt a dialog for creating a new project The dialog box is shown in Figure 2 29 2 Fill in the project name use the default directory or select another directory for saving the project 3 Click OK A new project will be created new workspace with the same name as the project s name will also be created Also for an existing workspace new projects can be added by right clicking the workspace name in the Project Management Window 52 Embedded Systems Development and Labs The English Edition Create a New Project x Project name NewProjectName Location E EmbestIDE Examples Samsung N Cancel Figure 2 29 Crate a New Project 3 Create New Source File Select File New IDE will open a new edit window without a title The user can input and edit source code in this window and save it 4 Add Files to Project Select Project Add To Project Files or right click the project name bar in the Project
278. rn unsigned int randomnumber void int main int i int nTemp unsigned int random 10 1 0 1 lt 10 i nTemp randomnumber random i nTemp return 0 2 init s Sample Source Code ae ae ae eak ak ak ak ak ak ak ak ake ake akk akk NAME 44BINIT S Version 10 April 2000 Description C start up codes Configure memory Initialize ISR stacks Initialize C variables il zeros into zero initialized C variables ae ae ae eak ak ak ak ak ak ak ak ake ake akk k Program Entry Point ARM assembly arm global start Start 121 Embedded Systems Development and Labs The English Edition Setup interrupt exception vectors B Reset Handler Undefined Handler B Undefined Handler SWI Handler B SWI Handler Prefetch Handler B Prefetch Handler Abort Handler B Abort Handler NOP Reserved vector IRQ Handler B IRQ Handler FIQ Handler B FIQ Handler Reset Handler LDR sp 0 00002000 Branch must be performed by an interworking call as either an ARM or Thumb main C function must be supported This makes the code not position independant A Branch with link would generate errors Ha M A extern main Idr r0 main m
279. rrun error indicates that new data has overwritten the old data before the old data has been read e The parity error indicates that the receiver has detected an unexpected parity condition e The frame error indicates that the received data does not have a valid stop bit e The break condition indicates that the RxDn input is held in the logic 0 state for a duration longer than one frame transmission time Receive time out condition occurs when it does not receive data during the 3 word time and the Rx FIFO is not empty in the FIFO mode Auto Flow Control ACF S3C44BOXs UART supports auto flow control with nRTS and nCTC signals in case it would have to connect UART to UART If users connect UART to a Modem disable auto flow control bit in UMCONn registers and control the signal of nRTS by software Baud Rate Generation The baud rate divisor register UBRDIVn controls the baud rate The serial Tx Rx clock rate baud rate is calculated as follows UBRDIVn round off MCLK bps x 16 1 The divisor should be from 1 to 216 1 For example if the baud rate is 115200 bps and MCLK is 40 MHz UBRDIVn is UBRDIVn int 40000000 115200 x 16 0 5 1 int 21 7 0 5 1 22 1 21 166 Embedded Systems Development and Labs The English Edition Loop back Mode The S3C44BOX provides a test mode referred to as the loopback mode to aid in isolating faults in the communication link In this mode the transmitted data is
280. rs to do testing or circuit extension during the process of using the Lab system or software development 2 3 2 Hardware Reference for Software Design 1 Chip Select Signals The usage of Embest chip select signal is shown in Table 2 1 oa tomecton a Component S2 Solid state hard disk SSHD 54 c Uu 00 1 CS5 CS6 8 SEG CS7 ETHERNET CS8 LCD Uu Uu CJ g m Table 2 1 Chip Select Usage 1 Chip Select Signal 2 Chips or Extent Modules 3 Solid state Hard Disc Flash 4 8 Segments LED 2 Peripheral Address Allocation The Lab System s peripheral access address setting is shown as in Table 2 2 46 Embedded Systems Development and Labs The English Edition Table 2 2 Peripherals accesses address settings Peripheral FLASH SDRAM USB Solid state Hard Disc IDE IOR W IDE KEY IDE PDIAG 8 SEG ETHERNET LCD NO USE KEYBOARD NO USE NO USE NO USE 2 Ports CS NGCSO NGCS6 CS1 CS2 CS3 CS4 CS5 CS6 CS7 CS8 NGCS2 NGCS3 NGCS4 NGCS5 NGCS7 CS register BANKCON0 BANKCON6 BANKCON1 BANKCON1 BANKCON1 BANKCON1 BANKCON1 BANKCON1 BANKCON1 BANKCON1 BANKCON2 BANKCON3 BANKCON4 BANKCON5 BANKCON7 Address space 0X0000_0000 0X01BF_FFFF OX0CO00_0000 0X0DF_FFFF 0X0200_0000 0X0203_FFFF 0X0204_0000 0X0207_FFFF 0X0208_0000 0X020B_FFFF 0X020C_0000 0X020F_FFFF 0X0210_0000 0X0213_FFFF 0X0214_0000 0X0217_FFFF 0X0218_0000 0X021B_FFFF 0X0
281. ry search path setting is shown in Figure 2 52 Project Settings Settings Debug Directory Compiler Assembler Linker 4 gt Workspace led swing 1 r m Library Searching Path C3 Source Library Searching Directories 28 ASM Source 4 Link Script objdump MM Abuildyxgcc arm elfMibYgcc libyarm elfy3 0 2Yarm inter Abuildixgcc arm elfiarm elfMibYarm inter Link Options e entry T A A Margetsyat9TytargetsMdscript L A 4 Abuildyxgcc arm elflibYgcc libarm elfi3 0 2Xarm inter L A A Abuildyxgcc arm elfjarm elfMibYarm inter o debug led_swing elf S cstartup o OBJ FILES 67 Embedded Systems Development and Labs The English Edition Figure 2 52 Linker Add Library Search Path Settings 2 4 4 Project Compiling and Linking After the project is properly configured the user can compile and link the project shown as shown in Figure 2 53 If there are any errors double click the text line in the output window the error line will be located Embest IDE E ExamplostCat9TMed swing eb63led swing c iG loj File Edit View Project Build Debug Tools Window Help 81 x amp 4 amp 8 Compile led swing c Ctrl F7 4 AA e rz 05 61115 s amp S Rebuild All Workspace led Md b lt lt led swing iile Clean Eg
282. s and these determine the mode in which the processor operates Their interpretation is shown in Table 3 1 88 Embedded Systems Development and Labs The English Edition Table 3 1 ARM Work Modes M 4 0 Visible THUMB state Visible ARM state registers registers 10000 User R7 RO PC CPSR 10001 FIQ R7 R0 LR fiq SP tiq PC CPSR SPSR fiq 10010 IRQ R7 RO LR irq SP_irq CPSR SPSR LR svc SP svc PC CPSR SPSR svc 10111 Abort R7 RO PC CPSR SPSR abt R14 R0 CPSR 7 R14 fiq R8 fiq PC CPSR SPSR fiq R12 R0 R14 irq R13 PC CPSR SPSR R12 R0 R14 svc R13 svc PC CPSR SPSR svc R12 R0 R14_abt R13_abt PC CPSR SPSR abt 11011 Undefined R7 RO R12 R0 LR_und SP_und R14_und R13_und PC CPSR SPSR_und CPSR 11111 System R7 RO R14 R0 LR SP PC CPSR PC CPSR 3 Other Bits Other bits in the program status registers are reserved for future expansion In general programmers must take care to write code in such a way that these bits are never modified Failure to do this might result in code which has unexpected side effects on future versions of the architecture 3 The Assembly as Syntax and Rules Used in This Lab 1 A label is written as a symbol immediately followed by a colon The symbol then represents the current value of the active location counter You are warned if you use the same symbol to represent two different l
283. s Development and Labs The English Edition 2 Sample Program of Lab B Bi C ExamplesSamsung asm1 Lab2B Lab2B s n x global _start text equ num start HOU BL stop B arithfunc CHP BHS ADR LDR JumpTable long long DoAdd ADD Mou SUB MOU end 3 2 7 Exercises Number of entries in jump table x r8 0 set up the three parameters ri 3 r2 2 arithfunc call the function x stop function s label r8 Function code is unsigned integer Dofidd If code gt 2 then do operation 8 x r3 JunpTable Load address of jump table x pc r3 r6 LSL 2 Jump to the appropriate routine Dofidd DoSub r8 r1 r2 Operation pc 1r Return x r8 r1 r2 Operation 1 x pc lr Return x mark the end of this file x 1 Open the boot file in the Example directory C EmbestIDE Examples Samsung S3CEV40 Watch the programming of reset exception the usage and functions of ltorg 2 Build a project and write your own assembly program Use the LDR STR LDMIA and STMIA to write data to a section of consequent memory and watch the results 92 Embedded Systems Development and Labs The English Edition 3 3 Thumb Assembly Instruction Lab Needs Revision 3 3 1 Purpose Master the usage of ARM 16 bit Thumb instruction 3 3 2 Lab Equipment e Hardware e Software Embest IDE 2003 Windows 98 2000 NT XP 3 3 3 Conten
284. s responsible for saving the microprocessor registers and recovering the registers when the task switching is finished 3 Porting OS CPU C C File The third step of porting the uC OS II kernel is to port the OS CPU C C file There are 6 functions in this file that need to be ported OSTaskStkInit OSTaskCreateHook OSTaskDelHook OSTaskSwHook OSTaskStatHook OSTaskTickHook The last 5 functions are called hook functions and are used mainly for extending the functions of uC OS II Note that these functions don t have to contain code The only function that really needs to be ported is the OSTTaskStkInit This function is called when the task is created This function is responsible for initializing the stack architecture for tasks This function can be in the same form for porting to most of the ARM processors Please refer to the following sample programs 7 1 5 Sample Programs 1 OSStartHighRdy OSStartHighRdy BL OSTaskSwHook MOV 1 LDR R1 OSRunning STRB LDR r4 addr_ OSTCBCur Get current task TCB address LDR r5 addr OSTCBHighRdy Get highest priority task TCB address LDR r5 r5 get stack pointer LDR sp r5 switch to the new stack STR r5 r4 set new current task TCB address LDMFD sp r4 YYY MSR SPSR cxsf r4 LDMFD r4 get new state from top of the stack MSR CPSR cxsf r4 CPSR should be SVC32Mode 10 112 Ir pc start the new task 2 OS Task Sw
285. s su suasana up Wap ia la nnne EDES IR EN TEN 120 327 6 Sample Programs ea tr rep 121 BANDIT ec 124 3 8 Sum Up Programming soe RENE 124 S Ss D PUTDOSCt Efron itera eit Leo itte tti 124 3 8 2 Hab Equipment a tem ete si ta sia tet Sites 124 3 8 3 Content Of the Eab 5 eoe tea ete Costs dad e te a eed 124 3 8 4 Principles of the Lab nnne nnne 124 3 8 5 Operation Steps 126 3 8 6 Sample Programs dest eerte 129 387 EXELCISES 4 crass EODD EODD READ RODA D RD ER DAN OE D TRE 132 Chapter 4 Basic Interface Labs 133 AT Memory abusuta sa ayka 133 4 4 T PULPOSE Hs ente Sistema etes 133 4 42 Fab Equipiment 133 4 1 3 Content of the Lab ecri secet eee tene tene ten eene eee ean 133 4 1 4 Principles of the Lab enne nennen nnne 133 41 5 Operation Steps eere tert Speed tired irre ert res 140 44 6 Sample PIOSITams uy u ope nm he ne eta pen iba aet e TEES 141 4 1 7 EX6tCIS6S 145 42 O Interface Lab sa sO it p ie c E p T i e I p Dn 145 4 271 test Wate tst s ist tte dee 145 4 2 2 Eab Equipiment e tte eta e ta itte ous 145 4 2 3 Content of the Lab cese teet ie teen dana i e
286. s that allow for memory update to 4 2Mx16bit For 8M SDRAM and are 0 ohms and R2 and are empty Namely BAO BAI are connected separately to A21 and A22 both row and column address wire width are Al A11 As a result the address space is 4x22 from 0x0C000000 Ox0C3FFFFF For 16M SDRAM R2 and are 0 ohms and and are empty Namely BAI are connected to A22 A23 respectively both row and column address wire width are Al A12 The address space 15 4 2 x2 0x0C000000 7 The SDRAM chip is selected by MCU through the chip select signal nSCSO and its address space is from 0x0C000000 0x0C8000000 139 Embedded Systems Development and Labs The English Edition D 15 0 DQ 15 0 nGC80 C nCE nOE I nOE nWE nWE 44BOX SST39VE160 FLASH Figure 4 3 Connection Circuit A 12 1 A 11 0 D 15 0 D 15 0 nSRAS nRAS nSCAS nCAS nSCS0 058 nOE nWE DQMO 21 R1 A22 BAO R2 A23 UNLOAD BAI R3 44BOX RS SDRAM UNLOAD Figure 3 4 Connection Circuit 4 1 5 Operation Steps 1 Prepare the Lab environment Connect the Embest Emulator to the target board Connect the target board UARTO to the PC serial port through the serial cable that comes with the Embest development system 2 Run the PC Hyper Terminal Click Start gt gt Programs gt gt Accessories gt gt Communica
287. shing a new embedded system training system that is based on ARM is very necessary and urgent This kind of university training courses will resolve the problem of lacking technology human recourses for developing embedded systems Although the ARM processors have higher performance and higher processing power than 8 bit single chip computers such as 51 series microprocessors the complexity and difficulty of developing embedded system hardware and software based on ARM are greater The main purpose of establishing new tools based on ARM embedded technologies is the need to enhance the traditional embedded system training by adding complex embedded sample program modules real time operation system etc to the text book to make the teaching closer to the real world of electrical and computer engineering About the Course Series and Related Labs In order to establish tools based on 32 bit ARM embedded technologies the main requirement is to develop the basic knowledge about ARM architectures The System on Chip Architecture by Steve Furber together with the ARM Architecture Reference Manual by David Seal can provide the necessary background Embedded Systems Development and Labs The English Edition The Course Series consists of the following basic textbooks Embedded System Development and Applications Textbook Available in Chinese Compound with multimedia demo modules Major Contents Basic concepts of embedded system appli
288. source code e Debugger Source code level debugging The debugger provides two debugging ways that are graphic interface debugging and command line debugging The debugger is capable of setting break points single step source code execution exception processing peer or modify memory register values and variables 29 Embedded Systems Development and Labs The English Edition peer the function stack disassembly code etc e Debug Device Embest JTAG Emulator One of its ends is DB25 interface that connect to the parallel port of a PC another end is an IDC plug that connects to the JTAG interface of the target board Users can use Embest IDE and Embest JTAG Emulator together for software development Embest IDE also supports universal JTAG cables connectivity e Off line debugging Embest IDE for ARM provides an ARM instruction emulator Users can debug ARM application software on PC without the target hardware connected e Arich set of sample programs Provides sample programs for debugging and usage descriptions for ARM processors from many companies such as Atmel Samsung Cirrus Logic OKI etc e On line Help English and Chinese version on line helps files When developing embedded software the first step is the design the second step 15 the programming and the third step 1s the debugging A few thousand lines program could have no warnings in the compilation but will not meet the requirements when executed in hardware Or the prog
289. ssembly code can be embedded in a C program An assembly language notation will be inserted to the output stream when the compiler meets this statement Example A basic embedded assembly code asm movrl 12 3 6 5 Operation Steps 1 Refer to the former Labs and create a new project named c2 2 Edit the new source files c2 c init s and script file Idscript Add them to the project 3 Refer to the former Labs and finish the standard settings Note In the Linker page shown in Figure 3 11 the Idscript file is used For the functions of this file please refer to Section 3 6 1 111 Embedded Systems Development and Labs The English Edition Project Settings Settings For Remote Debug Directory Compiler Assembler Linker 4 Workspace 2 1 project s Fc tes category CC 22 Project Header Files H Link Script readme txt Executable file C Library 9 28 Project Source Files file type Linker script file Aldscript Output file name Adebug c2 elf Link Options T ldscript o debug c2 elf S Xinit o OBJ FILES OK Cancel Figure 3 11 Embest IDE Linker Script File Settings Because the concept of initialization file in introduced the entry file init o should be specified as shown in Figure 3 12 Please note that the init o code must be downloaded at address 0x0 The other programs of the project will be automatically downloaded to cons
290. ssimilation of the existing labs and development of new labs I also want to thank Oliver Zhihui Liu for providing the first English draft of the Chinese version of the Embedded Systems Development and Labs book I have worked with his translation and generated the English version of the Embedded Systems Development and Labs In this version I have updated the technical content of the labs based on the Architecture Reference Manual I have verified all the labs and I have added a new real time lab Finally I want to thank my master students Zhanrong Yang and Shukla Nupoor for their contributions to the testing ofthe labs Zhanrong Yang has work hard to help with the board setup and with providing support with the Chinese documentation Unfortunately I was not able yet to edit other books based on the Embedded System Development series However this lab manual can be combined with any microcomputer interfacing or real time system design courses offered in other universities Due to the fact that the translation draft was sort of word by word translation there are still English and technical errors throughout the book I have issued this version so the students can perform the required labs for my Real Time System Design course I am still working on editing and updating the book and I hope to produce a better version soon Also I am planning to produce an Embedded Real Time system design text book that can accompany this lab manual Howev
291. start of the SECTIONS command the location counter has the value 0 The second line defines an output section text The colon is required syntax that may be ignored for now Within the brackets after the output section name you list the names of the input section that should be placed into this output section The is a wildcard which matches any file name The expression text means all text input sections of all input files Since the location counter is 0x10000 when the output section text 15 defined the linker will set the address of the text section in the output file to be 0x10000 The remaining lines define the data and bss section in the output file The linker will place the data output section at address 0x8000000 After the linker places the data output section the value of the location counter will be 0x8000000 plus the size of the data output section The effect 1 that the linker will place the bss output section immediately after the data output section in memory The linker will ensure that each output section has the required alignment by increasing the location counter if necessary In this example the specified addresses for the text and data section will probably satisfy any alignment constraints but the linker may have to create a small gap between the data and bss sections 3 Embedded Assembly Code The GCC support most of the basic assembly code The following example shows how the a
292. students should also study the embedded Lab development system course that introduces computer interfacing computer application software development computer operatimg systems applied electronic technology network communication etc This lab manual can be used as a reference book for embedded system development based on ARM There are many real time operating systems RTOS for embedded applications based on 32b bit systems RTOS such as VxWorks Windows CE Palm uClinux uC OS etc We have selected the uC OS since this kernel is fully documented and is an excellent tool for learning to develop real time embedded applications This manual together with the Embest development system can be used in teaching undergraduate and graduate courses in embedded systems design Embedded Systems Development and Labs The English Edition Chapter 1 An Overview of Embedded System Application Development 19 1 1 Embedded System Development and Applications a 1 2 An Overview of Embedded Development Environment for ARM 1 2 1 Cross Development Environmetnt enne nnne nnne nnne 1 2 2 Software Emulator 1 2 3 Evaluation Board act e e et cei et e e ie Uis Oe e Od 1 2 4 Embedded Operation System eene enne 1 3 An Overview of ARM Development
293. t lt 7 0x3 lt lt 8 0x3 lt lt 10 CLKVAL_GREY 16 lt lt 12 rBLUELUT 0xfa40 Enable LCD Logic and EL back light rPDATE rPDATE amp 0xae 2 Coordinate Range Value Calibration AR SF SF SF SF SF SF SF SF SF 9k 2 ak name DesignREC func confirm the coordinate rang para none ret none modify comment ak eak ak ak ak ak ak ak ak ake SF OR SF void DesignREC ULONG tx ULONG ty 1 int tm Uart_Printf n r User touch coordinate X Y is Uart_Printf 04d tx Uart_Printf 04d n ty if oneTouch 0 Vx tx Vx as Xmax Vy ty Vy Ymax oneTouch 1 velse if Vx lt tx tm tx tx Vx Vx tm tx as Xmin 226 Embedded Systems Development and Labs The English Edition j if Vy lt ty tm ty ty Vy Vy tm ty as Ymin Xmax Vx Xmin tx Ymax Vy ty oneTouch 0 CheckTSP 0 has checked end if oneTouch 0 3 Interrupt Service Routine SF SF SF SF SF IE 9 TSInt func TouchScreen interrupt handler function para none ret none modify comment
294. t and 16 bit microprocessors However these microprocessors can t meet the requirements of developing high end applications such as mobile phones modems etc These high end products needed the 32 bit microprocessors processing power and higher programming code density than the 16 bit CISC processors In order to meet these requirements a T variety of ARM architecture was developed This T variety is called 16 bit Thumb Instruction Set Thumb technology is one of the best characteristics of ARM technology The ARM7TDMIT system architecture v4T is the first microprocessor that supports Thumb instruction set ARM7TDMIT s work mode can be switched to the Thumb working state The 32 bit processor can be run with 16 bit Thumb instruction set So thumb is a bridge between the 16 bit older system and the 32 bit new system ARM architecture provided higher performance processor solutions to the users who were looking for higher performance processors These features greatly increased the embedded development as well as ARM technology The 16 bit microprocessors were not developed as people expected The reason was complicated Maybe one of the reasons was that the 32 bit ARM processors provided higher performance and lower price than the 16 bit processors and enabled the high end embedded applications to jump to the new 32 bit generation Many semiconductor companies have accepted the ARM processor production development There are more than 100 IT companies that
295. t board Power supply 5V power supply or USB power supply via PC LED power status display 500mA fuse IM x 16 bit Flash 4x IM x 16 bit SDRAM 4Kbit IIC bus serial EEPROM 2 serial ports one is a simple interface port another is a full interface port that can be connected to the RS232 MODEM Reset switch Two interrupt buttons two LEDs IDE hard disk interface LCD and TSP touch screen interfaces 32 Embedded Systems Development and Labs The English Edition 20 pin JTAG interface USB connector 4x4 keyboard interface Four 2 x 20 extended CPU interfaces 10 Mb s Ethernet interface 8 segment LED Microphone input port IIS voice signal output port that can be connected to a two channel speaker 16M x 8 bit Solid State Hard Disc 320x240 LCD panel with a touch screen panel 2 1 5 Connection Cables and Power Adapters Besides the above components the Lab system also provides cables for interconnections including a network cable a USB cable a serial cable a parallel cable 2 JTAG cable 20 pins and 16 pins The lab system also provides a 5V power adapter for the Embest S3CEV40 board 2 2 The Installation of Lab Development system The Embest ARM Lab system consists of Embest IDE Flash programmer Embest Emulator for ARM JTAG Embest S3CEV40 development board various cables and a power adapter The software platform is composed of the Embest IDE and the Flash programmer The rest are part of the hardware platform This sectio
296. t of the Lab e Basic reg mem visiting and simple arithmetic logic computing e Usage of thumb instructions more complicated program branching usage of PUSH POP understanding the maximum minimum limitation of immediate numbers 3 3 4 Principles of the Lab 1 Work Status of ARM Processor e ARM instruction set 32 bit instructions e Thumb instruction set 16 bit instructions ARM cores start up after reset executing ARM instructions The normal way they switch to execute Thumb instructions is by executing a Branch and Exchange instruction BX BLX The format of the instructions is BX BLX Rm The branch target is specified in the Rm register of Rm is copied into the T bit in the CPSR and bits 31 1 are moved into the PC a If Rm 0 is 1 the processor switches to execute Thumb instructions and begins executing at the address in Rm aligned to a half word boundary by clearing the bottom bit b If Rm 0 is 0 the processor continues executing ARM instructions and begins executing at the address in Rm aligned to a word boundary by clearing Rm 1 Other instructions which change from ARM to Thumb code include exception returns either using a special form of data processing instruction or a special form of load multiple register instruction Both of these instructions are generally used to return to whatever instruction stream was being executed before the exception was entered and are not intended for deliberate switch to Thumb mode Like
297. t ofthe Eabz u u et i cous ER coon senses sud AE RAE ERR 7 1 4 Principles of the 7 1 5 Sample Programs a lace heii wien miles EIXOTCISES 1 2 uC OS Application Lab 7 2 1 u saa deeem cun yasaq 7 1 2 Lab Equipment 72133 Content of the ab rete a u Sm 7 154 Principles ofthe nnne ei eet a 7 2 5 Sample Programs RE REESE URGE REESE IUS 1 2 O EXGICISOS ttes OG e d p euis Su Appendix A ARM Instruction ARM Addressing and Thumb Instruction Quick Reference Appendix B ARM and Thumb Instruction Code 288 Appendix C Embest ARM Related Products 289 Appendix D Content of CD ROM 290 Reference Documentations 291 287 Embedded Systems Development and Labs The English Edition Chapter 1 An Overview of Embedded System Application Development 1 1 Embedded System Development and Applications Embedded system based on embedded microprocessor is a new technology direction in IT technology ARM series processors are products from Advanced RISC Machine The current ARM core includes ARMT7TDMI ARM720T ARM9TDMI ARM920T ARM940T ARM946T ARM966T and Xscale etc Recently ARM Ltd renounced to 4 ARMII microprocessors ARM1156T2 S ARM1156T2F S ARM1176JZ and ARMIIJZF S ARM chips are supported by many real time operat
298. t regis 55 memread display m 37 nenurite write to 1 z 5 lid 41 baa E 3 Local Global 7 Ready Ln 117 Cal5 100 NUM Figure 2 2 Interface of Embest IDE 2 Features of Embest IDE Embest IDE can be run under various operating systems such as Windows 98 2000 NT XP etc It mainly supports ARM processors currently ARM7 and ARM 9 series The first version of Embest IDE for ARM was finished in 2001 The latest version is the 2003 Embest IDE for ARM The following are the important features of Embest IDE for ARM e Supported programming languages C and assembly e Friendly and convenient interface Microsoft Visual Studio user like interfaces e Project Manager Graphic project management tools that organize and manage the source code files It provides Windows for compiling linking library settings Multiple software projects or multiple library projects can be managed in the same work zone e Source Code Editor Standard text editor that supports color display for key words syntax key word etc The IDE also provides find string engine for quick search e Compile Tool The GCC from GNU has been optimized and strictly tested in Win32 environment The IDE provides a graphic compiler setting interface The user can use simple fast and direct settings for a project compilation The output of the compilation information is clear and organized for the users to quickly locate the syntax errors in their
299. t the computer After the computer is rebooted an icon of Embest IDE will be displayed on the desktop Double click on this icon to run Embest IDE When the Embest IDE is first time started the software will prompts to a registration dialog box as shown in Figure 2 10 35 Embedded Systems Development and Labs The English Edition rw Please input your information listed below User name hii Company Name Phone Number Bj Fax Number ui Contact Email ham Emulator Number Note This software will generate key file named key dat in the subdirectory licenses Don t modify the key file Please send the key file to licenses embedinfo com we will send licenses file to you soon Figure 2 10 Registration Information Dialog After you fill correctly the user information click on the Generate Key dat button The software will generate a key dat file in the License subdirectory Send the key dat file to Licenses embedinfo com via email The user will receive a License dat file in 24 hours Copy the License dat file to the License subdirectory Restart the IDE and the Embest IDE will work properly 2 2 2 The Installation of Flash Programmer Refer to Figure 2 7 select Embest Online Flash Programmer and run the installation An interface as shown in Figure 2 11 will be started gt Embest Online Flash Programmer for sh Welcome to the
300. target program from current program counter Parameter none option none example Go 2 MEMWRITE Write to memory syntax memwrite option address value description Write value to the specified memory location It accesses the memory by default in word format using Little Endian mode parameter address memory location value Specifies value to write option h Specifies access the memory in half word format b Specifies access the memory in byte format e Write memory using Big Endian mode example Memwrite 0 1000 Ox5A Write 5 to 0x1000 memwrite e Equal to memwrite 0x2000000 0x2000000 0x55443322 0x22334455 105 Embedded Systems Development and Labs The English Edition 3 REFRESH refresh all windows syntax description parameter option example refresh refresh all windows include register memory stack watch global local none none refresh 4 REGWRITE set register syntax description parameter option example Regwrite register name value Set register register Specifies register name name value The value to write none regwrite pc 0x3840 Set PC with the value 0x3840 5 RESET Reset the target syntax description parameter option example reset Reset the target device none none reset 6 STOP Stop the target syntax description parameter option stop Stop the target none none 106 Embedded Systems Developm
301. te a start stop watch program that uses the uC OS II kernel The program is a simple one button stopwatch that displays minutes seconds and tenths of seconds in the following format 99 59 9 The stopwatch has a single button that cycles the watch through three modes CLEAR gt COUNT gt STOP gt CLEAR 7 3 2 Stopwatch Tasks There are five tasks for the complete program including the start up task The priorities assigned to each task follow the rate monotonic scheduling rule Following are the task execution rates and the assigned priorities Task Task Period Priority Start Task One time only 4 UpdateTimeTsk 1ms 6 ScanSw Tsk 10ms DispTimeTsk 100ms 10 TimerModeTsk 1 keypress 12 Required to be the highest priority The following describes briefly the tasks functions 1 StartTask This task starts by initializing the kernel timer with OSTTickInit It then initializes the LCD and creates the rest of the tasks Once the rest of the tasks are complete the start up task suspends itself indefinitely 2 UpdateTimeTsk This is the primary time keeping task It has the highest priority to keep the stopwatch accuracy within 1ms The task increments a global variable called msCntr every millisecond 3 ScanSw This is the switch scanning and debouncing task The main requirement is that it has to run with a period that is at least one half the switch bounce time S
302. teveb40 e 0x0 1 Monitor Method Angel Preprocessor Flag cam be wet SEXINOS IF DEF AT91 DEBUG ANGEL INCLUDE estartup arv Call lov level init to perfore imitial AIC amd calling asin Diasable all peripheriel clock low level init aov ENDIF ICE or Sraa La ommo ice 0901620235 IDE 0x01000232 01690234 AIC amd calling saan Dunay MO Sort Angel 1 4 spel SVIS FPE EE Little endian 1 3 2 ARM ADS The ADS is called ARM Development Suite The ADS is being used instead of ARM SDK The latest version of ADS is 1 2 ARM ADS supports all ARM series processors It is supported by Windows 2000 Me RedHat Linux etc ARM ADS consists of 6 parts Code Generation Tools CodeWarrior IDE Debugger ADS and ARMSD Instruction Set Simulators ARM Firmware Suite and ARM Applications Library The CodeWarrior interface is shown in Figure 1 3 and the ADS interface is shown in n Figure 1 4 bo D lt Path CSProoram Files AAM ADSv1_2 Examples dhi dhy 1 5 main Figure 1 2 ADW Window atii pio read 3 21 10 7 0 1000148 delay 0x30 27 23 83 r rt 5151 pic rend ri BE 20 23 10 17 0 100020 delay 0x42 r4 25 17 3 00007550 0x50002710 158 4 72 0x0100029c t 0010 09000 i For n RAN Define Te a main program corresponds to procedu
303. tform Embest Standard Power Emulator PC e Software Embest IDE 2003 Windows 98 2000 NT XP operation system 6 3 3 Content of the Lab Write a program that plays a wav file that is stored in the memory 6 3 4 Principles of the Lab 1 Digital Sound Basics In digital voice systems the analog voice signal is converted into a series of binary digital data and then after transmission the digital data will be converted back into an analog signal One of the devices used in this process is the A D converter ADC The ADC samples the sound signal at a rate of thousands of samples per second every time it records a status of the sound wave This record is called a sample The number of samples per second is called the sample frequency The unit of measure for the sample frequency is Hz The higher the sample frequency the higher the frequency of sound wave that can be described The number of bits per sample is call sample precision The sample frequency and sample precision determines the quality of the recovered sound The frequency range of human s hearing is 20 20Khz According to Nequest Law if the sampling frequency of a sine wave is two times greater than the frequency of the wave the sine wave can be accurately reproduced As a result a sampling frequency higher than 40K Hz is sufficient to maintain good digital to analog conversion quality of the sound 2 Voice Coding PCM Pulse Code Modulation is used for sampling the voice signal and c
304. th configuring the memory space through registers e Learn how to access and view memory locations 4 4 2 Lab Equipment e Hardware Embest S3CEV40 hardware platform Embest Standard Power Emulator PC e Software Embest IDE 2003 Windows 98 2000 NT XP operation system 4 1 3 Content of the Lab Learn how to configure and read write the S3C44B0X memory space Use assembly and C language to read write words half words bytes half bytes from to RAM 4 1 4 Principles of the Lab 1 Memory Controller The S3C44B0X memory controller provides the necessary memory control signals for external memory access S3C44BOX has the following features e Little Big endian selectable by an external pin e Address space 32Mbytes per each bank total 256MB 8 banks e Programmable access size 8 16 32 bit for all banks e Total 8 memory banks 6 memory banks for ROM SRAM etc 2 memory banks for ROM SRAM FP EDO SDRAM etc e 7 fixed memory bank start address and programmable bank size e flexible memory bank start address and programmable bank size e Programmable access cycles for all memory banks e External wait to extend the bus cycles e Supports self refresh mode in DRAM SDRAM for power down e Supports asymmetrically or symmetrically addressable DRAM Figure 4 1 shows the memory space of 33 44 after reset The special function registers are located at 4M memory space from 0x01C00000 to 0x20000000 The start addresses and size of Bank0 B
305. the application is not complicated embedded systems can run without real time operation systems 1 3 An Overview of ARM Development system 1 3 1 ARM SDT ARM SDK is called ARM Software Development Kit It is made by ARM Ltd The latest version is 2 5 2 The highest ARM processors it can support are ARMO series ARM Ltd will not continue the ARM SDK in the future The user interface of ARN SDK is shown in Figure 1 1 and Figure 1 2 Dle HA Bow Deje Teels tater deir Blu Jam sam ae ATWI Leterworking Image Mna r Method SENIWOSTING D F AT9 DEBUG ANGEL INCLUDE Vestartup angel Call low level init to perform initialization before initializing AIC and calli in i rial clock clocks are sutomstically Diaseble after a reset Return AT91 DEBUO ANGEL ICE or S Preprocessor Flag can be DEP AT91 DEBUG ICE INCLUDE Vcstartup ice s Call Jow level init to perform initialization before initializing On Tec y wn Lacon Figure 1 1 ARM Project Manager 20 Embedded Systems Development and Labs The English Edition thost warranty or condition implied or statutory This includes withou ty cr condition vith respect to serchentabsiity or fitness for any particular purpose or against the iniringemente of intellectual property rights of others Ttup s artup choice 1 0 30710700 JPP Creation INCLUDE targe
306. time delay is allowed for the user to leave the building through the nominated exit When the alarm is set the use of any of the entrances other than the nominated one for re entry activates the alarm instantly or at most within a matter of a few seconds The sensors monitoring the entrance nominated for re entry and the route to the alarm control point do not activate the alarm until a set time has elapsed This set time allows the user to enter the building and disarm the alarm by entering the correct digital code If this is not done successfully the alarm is activated at the end of the set time The alarm system has a siren and a strobe and these are located outside the building If an intruder is detected or the alarm is not disarmed by the person entering the building through the nominated entrance during the required time the siren begins to sound and the strobe begins to flash immediately as mentioned above In this event the siren continues to sound for a specified time usually for a few minutes and then stops but the strobe continues to flash The alarm can be reset by the user only by entering the correct code If the alarm has already been triggered this would turn the alarm off The correct code is the most up to date code entered when arming the system When entering the code for disarming the alarm the user is allowed a maximum period to complete the task If the user fails to complete this within the given time the system discards th
307. tion gt gt Hyper Terminal In the Hyper Terminal Window click the disconnect icon and then configure the COMI port to the following properties 115200 bits per second 8 data bits none parity 1 stop bits none flow control 3 Connect the Embest Emulator to the target board Open the Memory Test ews project file in the Memory test sub directory in the sample directory After compiling and linking connect to the target board and download the program NOTE If the program does not execute properly in the workspace window click on the common directory gt gt click the file 44inits gt gt click delete Open the 44inits file that 15 located the Samsung S3CEV40 ALL_Test asm directory and attach this file to the common directory of the project 140 Embedded Systems Development and Labs The English Edition Have the 44init s window active and compile the file by clicking on the Build gt gt Compile 44init s After this build the project and reconnect and download the code to the board Make sure that the common ev4Oboot cs file is present in the debug window of the project settings 4 Open Memory window key in the address 0x0C010000 Open Memory2 window key in the address 0x0C010200 5 Open Rwrams s set a break point at the line LDR r2 0x0C010000 Open Rwarmc c set a break point at the line 0 55 55 6 Execute the program The program will stop at the line LDR r2 0x0C010000 Watch the date
308. tmp Pt 5 240 Pt 5 Xmin Ymax Y min Uart Printf Y Posion AINO is 04d n Pt 5 if CheckTSP check to ensure Xmax Ymax Y min DesignREC tmp Pt 5 rPDATE 0xb8 should be enabled DelayTime 3000 delay to set up the next channel ISPC BIT_EINT2 clear pending bit 228 Embedded Systems Development and Labs The English Edition 5 3 8 Exercises Refer to the LCD Display Lab and write a program that accepts 4 points pressed on the touch panel and display the rectangle using the 4 coordinate values 229 Embedded Systems Development and Labs The English Edition Chapter 6 Communication and Voice Interface Labs 6 1 IIC Serial Communication Lab 6 1 1 Purpose e Understand the usage of IIC serial communication protocol e Learn the method of writing reading the EPROM component of the board e Learn the usage ofthe S3C44BoX controller via the Lab 6 1 2 Lab Equipment e Hardware Embest S3CEV40 hardware platform Embest Standard Power Emulator PC e Software Embest IDE 2003 Windows 98 2000 NT XP operation system 6 1 3 Content of the Lab Write a program that can read and write the AT24C04 EPROM component on the development board Implement a program that can write data to an address read it from the same address and compare the results Test the functionality of the EPROM AT24C04 and the microprocessor interface 6 1 4 Principles of th
309. u BE EF term_eb40a files 4 fe EC C Source n ASM Source 0 Link Script EE term eb42 files amp C3 Source ASM Source 9 09 Link Script El EF term_eb55 files Source 9 29 ASM Source amp C3 Link Script 4 _ 63 files int i char pt str str f PI USARTS USART1 USART Terminal initialisation terminal 1 usart desc amp USARTG_DESC terminal 1 term data amp terminal data 1 terminal 1 baud ratr int BnUDS28 08 terminal 1 format u int US_ASYNC_MODE lerminal_1 lerming asm handler 91 handler 17 Open terminal at91 terminal open amp terninal 1 amp 3 Source 8 term c Transmit str test i n ASM Snurre for i 8 icstrlen str test i at91 terminal write amp terminal 1 amp str test i 33 Func Files A str x20 RU PAPER dl Krus Be iL pee d refresh refresh r8 E5 oF 18 5 F8 18 FB 9r 90 E1 1F 28 pt str 8329001618 USART 8x28 fusa pio 8x28 rxa wes can pin txd Oxf M pin_sck 9 N per 9 2 help display ii disasm disassemb rese reset tar na step step stat stop stop reglist list all reqread display ri E5 B8 58 n regwrite se
310. uct pStruct test_struct2 test_union test_string test_str test str test str test str pString pShort test class Oxfffffffb Ox203ffcO O0x203ffcO Ox203ff98 Ox203ff90 Ox203ff8c 0x61 a 0x62 b 0x63 c 0x64 d Ox203ff8c abcd 0x840e1009 Ox203ffTc Oxc Oxfffffff Figure 2 67 Variable Window 7 Function Stack Window Select View Debug Window Call Stack item and the Function Stack Window will be opened The Function Stack Window is used to display the call relationship of the software functions The last called function is at the top of the list The originating calling function is at the bottom of the list as shown in Figure 2 68 struct w test3 int 0 void test2 int zerr 0x0 lint loop test int loop_num 0x5 int testl int 0 5 1 bzOxfffffffb int d Oxa int e 0xa inl int main s Figure 2 68 Function Stack Window Double click on any function in the function list The IDE will go to the source code of this function as shown in Figure 6 69 75 Embedded Systems Development and Labs The English Edition Embest IDE e File Edit View Project Build Debug Tools Window Help la 0s m g8 P S osTickISR AAAA lel a s dn s 2 gt e W P oo Ed Rd E Az opin 5 9 Workspace Led LedSwing6 B Idscript Project So 19 cstartup struct stTest xtest3 int f struct stTest ttt AE T XR
311. unction Akak ak ak ak ak ak void Digit Led Test void 1 int i display all digit from 0 to F for 170 1 lt 16 i 1 Digit Led Symbol 1 Delay 4000 4 6 7 Exercises Write a program that displays each segment of the 8 SEG LED alternatively 189 Embedded Systems Development and Labs The English Edition Chapter 5 Human Interface Labs 5 1 LCD Display Lab 5 1 1 Purpose e Learn to use the LCD panel and understand its circuit functionality e Learn to program the S3C44B0X LCD controller e Through the Lab learn to displaying text and graphic on the LCD 5 1 2 Lab Equipment e Hardware Embest S3CEV40 hardware platform Embest Standard Power Emulator PC e Software Embest IDE 2003 Windows 98 2000 NT XP operation system 5 1 3 Content of the Lab Learn to use the S3CEV40 16 Gray Scale LCD panel 320 x 240 pixels controller Understand the human interface programming methods based on the LCD display e Draw multiple rectangles e Display ASCII characters e Display a mouse bitmap 5 1 4 Principles of the Lab 1 LCD Panel LCD Liquid Crystal Display 1s mainly used in displaying text and graphic information The LCD device is highly popular for human interface development due the fact that the device is thin small size low power no radiation etc 1 Main types of LCD and Parameters 1 STN LCD Panel The ST
312. up IPDATE 0xb8 should be enabled DelayTime 100 rEXTINT 0x200 falling edge trigger pISR_EINT2 int user_irq set interrupt handler rCLKCON 0x7ff8 enable clock rADCPSR 0x1 0x4 A D prescaler rINTMSK BIT_GLOBAL BIT_EINT2 2 LCD Initialization please refer to 5 1 LCD Display Lab AR se AE SF SF SF SF IE ae name Led_Init func Initialize LCD Controller para none ret none modify comment ak keak ak ak ak ak ak ak ak ake SF IE ake sk 2 eak ak ak ak void Led_Init void 1 rDITHMODE 0x1223a rDP1 2 0 5 5 rDP4 7 0x366cd9b rDP3 5 0xda5a7 rDP2 3 0 7 rDP5 7 Oxfeda5b7 rDP3 4 Oxebd7 225 Embedded Systems Development and Labs The English Edition rDP4 5 Oxebfd7 rDP6 7 0xTefdfbf rLCDCON1 0 1 lt lt 5 MVAL_USED lt lt 7 0x0 lt lt 8 0x0 lt lt 10 CLKVAL_GREY 16 lt lt 12 rLCDCON2 LINEVAL HOZVAL lt lt 10 10 lt lt 21 rLCDSADDRI 0 2 lt lt 27 LCD ACTIVE BUFFER gt gt 22 lt lt 21 MSD LCD ACTIVE BUFFER 1 rLCDSADDR2 MSD LCD ACTIVE BUFFER SCR XSIZE LCD YSIZE 2 gt gt 1 MVAL lt lt 21 rLCDSADDR3 LCD_XSIZE 4 SCR XSIZE LCD XSIZE 4 9 enable 4B_ SNGL SCAN WDLY 8cIk WLH 8clk rLCDCON1 1 1 lt lt 5 MVAL_USED l
313. us 0 The interrupt has not been requested 1 The interrupt source has asserted the interrupt request 3 Interrupt Mode Register INTMOD Each of the 26 bits in the interrupt mode register INTMOD corresponds to an interrupt source When the interrupt mode bit for one source 1 set to 1 the ARM7TDMI core will process the interrupt in the fast interrupt mode Otherwise the interrupt is processed in the IRQ mode normal interrupt The 26 interrupt sources are summarized as follows Table 4 24 Interrupt Mode Register INTMOD 0x01 E00008 RW Interrupt mode Register 0 0000000 0 IRO mode 1 FIQ mode 4 Interrupt Mask Register INTMSK Each of the 26 bits except the global mask bit in the interrupt mask register INTMSK corresponds to an interrupt source Table 4 25 Interrupt Mask Register Rosat Vals INTMSK 0x01E0000C RW Determines which interrupt source is masked The masked interrupt will not be serviced 0 Interrupt service is available 1 Interrupt service is masked If the INTMSK is changed in ISR interrupt service routine and the vectored interrupt is used an INTMSK bit cannot mask an interrupt event which had been latched in INTPND before the INTMSK bit was set To eliminate this problem clear the corresponding pending bit INTPND after changing INTMSK 159 Embedded Systems Development and Labs The English Edition 5 IRQ Vectored Mode Register Table 4 26 IRQ Vectored M
314. using the so called link command language The main functions of the linker scripts control how to place the programs to the output file and control how to locate the output file the memory If needed the linker script can implement other functions Most of the linker script files are simple The simplest linker file has only one command line called SECTIONS The SECTION command controls the memory distribution of the output file code SECTION command is powerful For example consider a program that consists of consists of code initialized data and un initialized data are placed in text data and bss sections The code of these sections needs to be placed at addresses 0x10000 and 0x8000000 respectively A simple linker script that performs the above 110 Embedded Systems Development and Labs The English Edition tasks is SECTIONS 1 7 0x1000 text text 0 8000000 data data bss bss The starts with the key word SECTIONS Next is the body of the command encompassed by and Within the command The first line inside the SECTIONS command sets the value of the special symbol which is the location counter If you do not specify the address of an output section in some other way other ways are described later the address is set from the current value of the location counter The location counter 15 then incremented by the size of the output section At the
315. volatile unsigned char 0x1d00020 unsigned char ch define WrUTXHl ch volatile unsigned char 0x1d04020 unsigned char ch define RHURXHO volatile unsigned char 0x1d00024 define RHURXHI volatile unsigned char 0x1d04024 define UTXHO 0x1d00020 access address by BDMA define UTXHI 0x1d04020 define URXHO 0x1d00024 define URXHI 0 1404024 endif The following 3 functions are the main functions that used in this Lab including UART initialization and character receive send program Read tem carefully and understand every line of the program These functions can be found at commomMAlib c 1 UART Initialization Program static int whichUart 0 void Uart_Init int mclk int baud int i if mclk 0 mclk MCLK rUFCONO O0x0 FIFO disable rUFCON1 0x0 rUMCON0 0x0 rUMCONI 0x0 UARTO rULCONO 0x3 Normal No parity 1 stop 8 bit rUCONO 0x245 rx edge tx level disable timeout int enable rx error int normal interrupt or polling rUBRDIVO int mclk 16 baud 0 5 1 UARTI rULCONI 0x3 rUCON1 0x245 rUBRDIV1 int mclk 16 baud 0 5 1 for i 0 1 lt 100 i 2 Character Receive Program char Uart_Getch void 1 if whichUart 0 169 Embedded Systems Development and Labs The English Edition 1 while rUTRSTATO amp 0x1 Receive data read return RHURXHO else 1 while r UTRSTAT1 amp 0x1 Receive data ready return r
316. ws 3 2 ARM Assembly Instruction Lab 2 3 2 1 Purpose Through Lab 2 the students will learn how to use more complex memory and branch type instructions such as LDMFD STMFD B and BL Also they will have a better understand the CPSR 3 2 2 Lab Equipment e Hardware PC e Software Embest IDE 2003 Windows 98 2000 NT XP 87 Embedded Systems Development and Labs The English Edition 3 2 3 Content of the Lab 2 e Get familiar with IDE perform memory copy e Complete design of a branched program perform different conditional subprogram calls 3 2 4 Principles of the Lab 2 1 ARM Program Status Registers The current program status register CPSR is accessible in all processor modes It contains condition code flags interrupt disable bits the current processor mode and other status and control information Each exception mode also has a saved program status register SPSR that is used to preserve the value of the CPSR when the associated exception occurs The format of CPSR and SPSR is shown below condition code flags reserved control bits 30 29 28 27 26 2 24 23 Overfbw Mode bits Carry 0 State bit Carry Borrow Extend FIQ disable Zero IRQ disable Negative Less Than 1 The Condition Code Flags The N Z C and V Negative Zero Carry and oVerflow bits are collectively known as the condition code flags often referred to as flags The condition code flags in the CPSR can be tested by most i
317. x2 0 value 2 else if temp amp 0x4 0 value 1 else if temp amp 0x8 0 value 0 216 Embedded Systems Development and Labs The English Edition return value read line 2 temp keyboard_base Oxfb not OxF mean key down if temp amp KEY VALUE MASK KEY VALUE MASK if temp amp 0x1 0 value 7 else if temp amp 0x2 0 value 6 else if temp amp 0x4 0 value 5 else if temp amp 0x8 0 value 4 return value read line 3 temp keyboard_base Oxf7 not OxF mean key down if temp amp KEY VALUE MASK KEY VALUE MASK if temp amp 0x1 0 value Oxb else if temp amp 0x2 0 value Oxa else if temp amp 0x4 0 value 9 else if temp amp 0x8 0 value 8 return value read line 4 temp keyboard_base 0xef not OxF mean key down if temp amp KEY VALUE MASK KEY VALUE MASK 1 if temp amp 0x1 0 217 Embedded Systems Development and Labs The English Edition value Oxf else if temp amp 0x2 0 value Oxe else if temp amp 0x4 0 value 0 else if temp amp 0x8 0 value Oxc return value return 1 5 2 8 Exercises Write a program that can detect and process two keys pressed at the same time 5 3 Touch Panel Control Lab 5 3 1 Purpose e Learn the design and the control methods used for the touch panel U
318. x66 menurite success rUTCON HCLK 1088088 1 4 8 2 lt lt 3 i xffff rUTCNT 1count 16us delayLoopCount 8800008 ix65 500 100 i 65 208 void DelayHs int ms time lt int i X 5 nenurite 4 led state 0 2 i 8x23 0 050000 11 14 11 88 18 88 11 F8 94 58 54 PT B 1 2 3 8C858BBB 26 59 FE 18 62 FE A4 31 28 3A 68 Pe i i memurite 0x01C80025 09 00 tins Dub 80858816 5h 24 55 FE 90 78 18 A8 11 26 12 T U p amp 80050021 26 18 20 18 40 18 84 95 FE 55 8 U nemurite 0x01C80028 0x88 Aranador SO Fr 11 FF 31 39 5h v 19 T zl mom ito poe P I raten 1 Watch 2 1 memory 2 19 Build Debug gt Ready Ln 43 Col1 pos NUM Z Figure 1 11 Embest IDE for ARM Windows 1 3 5 OPENice32 A900 Emulator OpenNice32 A900 emulator is produced by www aijisystem com OPENNice32 A900 is JTAG emulator and supports ARM7 ARM9 ARMI10 and Intel Xscale processor series The OPENNice32 A900 has the following features e Supports multiple CPUs or multiple CPU boards Supports assembly and C language debugging Provides On board Flash programming tool Provides memory controller configuration GUI Software can be upgraded to support new ARM cores 1 3 6 Multi ICE Emulator Multi ICE is a JTAG emulator developed by ARM Ltd The latest version is 2 1 Multi ICE

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