EasyPack® EasyPack®/S 8051/8052 Up and Running In
Contents
1. Power Cord Board Selection Mating Null Target Board with the ICE Probe Null Target Board Mini Jumper X1 Setup With the null target board pulled out from the ICE Probe Module position mini jumpers X1 see figure above to correspond with the emulation CPU series installed or as indicated in the following table ei Jumper Pins Jumper Pins Emulation 8051 Series DI o m 8031 Series Hardware Installation and Setup EasyPack S 8051 52 Up amp Running Connecting EasyPackY S with the External Signal Cable The EasyPack external signal cable is utilized for recording external signals during trace operations To monitor these signals attach the 9 pin female connector of the cable to its corresponding male con nector at the left side panel of the EasyPack Main Module or as shown in the following illustration Connecting External Signal Cable The 9 pin connector pin assignments are as follows 9 bi Prenal di pr Connect D 9 Pin External Signal Cable Connector EasyPack S 8051 52 Up amp Running Hardware Installation and Setup 24 Chapter 3 Cene em FUNCTIONS 1 REESEN Cap sigan ome i Leer A or mbeann E These bits are recorded to trace buffer Applying Power to the System WARNING Check to ensure compliance to proper operating environment temperature humidity etc grounding and electrostatic discharge protection requirements specified for EasyPack and2. 0 to 50 C 32 to 122 F e Storage Temp 10 to 65 C 14 to 149 F e Relative Humidity 20 to 80 Emulator Weight and Dimensions Main Module Length 27cm 10 6 in e Width 23cm 9 0 in e Height 6cm 2 4 in e Net weight including Probe module 1 5kg 3 31 Ib EasyPack S 8051 52 Up amp Running Emulator Overview Chapter 3 13 Hardware Installation and Setup Overview This chapter guides you on how to e Check the EasyPack working environment e Connect the EasyPack to host and ICE Probe Module to target e Setup printer and serial ports e Define memory size with bank switch EasyPack S Only e Perform Null Target installation e Connect the EasyPack with the External Signal Cable Checking the Environmental Conditions The emulator resides in the same environment as your host computer Avoid excessive heat Leave a few inches around the main chassis for air circulation Use good grounding practices Locate the emulator away from sources of interference Characteristic Operating Parameter Ambient humidity 80 maximum relative humidity non condensing Protecting the Emulator from Electrostatic Discharge ESD The I O circuitry of the Probe Module can be damaged by excessive ESD To protect your probe from ESD e Be sure the chassis host and workbench are properly grounded before applying power e Work in a static free work environment e Use a wriststrap attached to ground whil
3. The supported maximum speed of the emulation CPU as of current EasyPack version is 40MHz The lower board EPL 52F must be removed from ICE Probe Module 4 When memory is mapped to Internal attribute while data memory exists on target set both mini jumpers X4 and X5 on top of the Probe Module to either RD amp WR position or to I O default position See Section on Defining Port 3 Function in Chapter 3 LA Application and Engineering Notes EasyPack S 8051 52 Up amp Running Appendix A 29 A Target Interface Diagram Interface Diagram for 8031 8032 see other side of this page EasyPack S 8051 52 Up amp Running Target Interface Diagram 30 Appendix A Target Interface Diagram EasyPack S 8051 52 Up amp Running Interface Diagram for 8051 8052 see other side of this page EasyPack S 8051 52 Up amp Running Target Interface Diagram 32 Appendix A Target Interface Diagram EasyPack S 8051 52 Up amp Running Interface Diagram for 80C154 80C51FA 8344 see other side of this page EasyPack S 8051 52 Up amp Running Target Interface Diagram 34 Appendix A Target Interface Diagram EasyPack S 8051 52 Up amp Running Interface Diagram for 87C652 see other side of this page EasyPack S 8051 52 Up amp Running Target Interface Diagram 36 Appendix A Target Interface Diagram EasyPack S 8051 52 Up amp Running ndex 8 8031 8032 Target 26 8051 8052 Target 2
4. or EPROM of the target CPU under emulation the EasyPack S Probe Module needs to be initially reconfigured into single board EPH 52F only or double board both EPH 52F and EPL 52F module for proper operation as illustrated and categorized below EasyPack S 8051 52 Up amp Running Hardware Installation and Setup 20 Chapter 3 Single Board Probe Module Use Single Board Probe Module with following ROMless targets 8031 ROMless NMOS 8032 ROMless NMOS 80C31 ROMless CMOS 80C32 ROMless CMOS 8344 ROMless NMOS 80C51FA FB FC ROMless CMOS 80C154 ROMless CMOS 80C320 ROMless CMOS 80C652 ROMless CMOS W78C31B 40 ROMless CMOS W78C32B 40 ROMless CMOS Double Board Probe Module Use Double Board Probe Module with following ROM EPROM targets 8051 ROM NMOS 8052 ROM NMOS 8751 EPROM NMOS 8752 EPROM NMOS 80C51 ROM CMOS 87C51FA FB FC EPROM CMOS 80C52 ROM CMOS 87C51 EPROM CMOS 87C52 EPROM CMOS 83C652 ROM CMOS 83C654 ROM CMOS 87C652 EPROM CMOS 87C654 EPROM CMOS With the Null Target board removed from the bottom of the probe proceed to carefully plug the probe module into the target Hardware Installation and Setup EasyPack S 8051 52 Up amp Running Chapter 3 21 Connecting Probe Module to PLCC Type Target Socket The ICE Probe Module is shipped with a DIP type target probe which plugs directly to target with DIP type CPU socket If your target syste
5. or a target system It has two layers of mini board The top layer is the EPH 52F board which houses the emulation CPU and part of the time sensitive glue logic The bottom layer or EPL 52F board also houses part of the glue logic in addition to target plug in socket The Null Target Board provides clock source when it connects with LI Null Target the ICE Probe Module during LA gt oard EasyPack stand alone operation It SE ud is removed before the probe module is plugged into a target system The Null Target Board power cord connects to EPH for power Accessories A complete EasyPack package also includes the following items a b c d e f g h An AC power cable An MS PCX 25 pin cable A 9 pin connector trace cable An EasyPack Up amp Running manual A User s Guide A RS 232 Cable with RJ11 jacks Two 9 and 25 pin RJ11 adapters to connect with host A set of debug software NOTE An optional DIP to PLCC target socket adapter see Section on Connecting Probe Module to PLCC Type Target in Chapter 3 is available and shipped through separate request Contact your nearest MICETEK dealer for detailed information For complete list of items which are provided with every shipment refer to the Package Checklist packed and attached to the EasyPack package EasyPack S 8051 52 Up amp Running Emulator Overview 8 Chapter 2 Features Supported Targets 8031 32 8051
6. 52 80C31 32 80C51 52 Philips Intel MHS 8x31 32 8x51 52 8xC31 32 8xC51 52 Siemens OKI SC8xC51 Atmel Temic AT89C51 52 me 8031 A 20 MSU2031 SAB C501G L40 24P 80C51FA FB FC W78C31 2B Winbond Intel 8xC51FA FB FC Philips 8xC51RA RB RC 80154 80C154 Intel MHS OKI 8xC652 4 Philips Temic NOTE EasyPack 8051 52 is shipped with 87C52UBPN emulation CPU Probe Module is shipped with a DIP package target probe A DIP to PLCC adapter is available under separate order to accommodate PLCC targets Contact your MICETEK Sales Office or Technical Support see contact information on page 3 of Chapter 1 for further information System Clock Provides frequency measurement calculation for time stamping timing Emulator Overview EasyPack S 8051 52 Up amp Running Overlay Memory EasyPack EasyPack S e 128KB emulation memory e 320KB emulation memory 64KB program memory and 256KB program memory and 64KB data memory 64KB data memory e with following attributes e with following attributes Overlay EasyPack read write Overlay EasyPack S read write Overlay EasyPack read Overlay EasyPack S read only only Target target read write Target target read write Target target read only Target target read only Guard non existence Guard non existence Combination read write Combination read write Combination read only Combination read only Bank Switch for E
7. The table below shows how features differ between EasyPack S 8052F and EasyPack 8052F emulators EasyPack S 8051 52 Up amp Running Emulator Overview 6 Chapter 2 EasyPack S 8052F EasyPack 8052F with ECBIIS 8052 Control Board with ECBIISA 8052 Control Board Bank Switch Function or emulation Fixed 128K emulation memory memory augmentation from 64K to program 64K data 64K 320K bytes program 256 data 64K The ECBIISA S 8052 performs the emulation control and general application emulation processes plus bank switch function in the case of ECBIIS It houses the overlay memory and the following connectors for various interfaces e One micro connectors for ICE cable interface with ICE Probe Module e One 9 pin connector for External Trigger Out ETO trace bits input and external breakpoint signal e One 25 pin connector for printer port communication e One RS 232 phone jack RJ11 connector for serial port communication e One Reset button Emsktion C ortol Boar E BIG or E EIS Ai EasyPack S 8052F Main Module Hardware Breakdown NOTE Bank Switch Jumper is available only with ECBIIS board This board is installed on EasyPack S only Emulator Overview EasyPack S 8051 52 Up amp Running Chapter 2 7 ICE Probe Module Power Cord 8051 52 ICE Probe Module Breakdown HF LO PJ Le 2 ICE CABLE The ICE Probe Module connects the Easy Pack to the Null Target Board
8. for delicate electronic equipment in general Also ensure all AC power terminals are properly aligned before plugging them to power source You must refer to the Application and Engineering Notes in Chapter 5 before performing emulation with your EasyPack S The recommended power up sequence is to apply power to target system first and then to either FasyPack S or host When turning power off EasyPack S is turned off first and target system the last At power up the EasyPack S will automatically check to determine whether power is supplied to the target At the same time the amber colored LED on top of the EasyPack S Module illuminates Hardware Installation and Setup EasyPack S 8051 52 Up amp Running Chapter 3 25 Hardware Reset The EasyPack may be reset with either of the following methods Cold Reset By turning the power switch off and then on again Be sure to wait a few seconds before restoring power to the system Warm Reset By momentarily pressing the manual RESET button en located on the side panel of EasyPack and adjacent to ch external signal cable connector as shown in the figure at right The warm reset button is used to reset the control and emulation processor without affecting the contents of overlay memory Hardware Warm Reset Button Before pressing RESET button quit the debug software and reinitiate debugger EasyPack S 8051 52 Up amp Running Hardware Installati
9. 2C cable 15 16 S Serial Port 15 Setting Bank Switch Jumpers 17 Single Board Probe Module 20 Stand alone emulation 12 Stand Alone Emulation 12 Stand Alone operation 26 Stand Alone Operation 22 Support 2 Supported Targets 8 System Clock 9 T Target Memory Retention 11 Technical support 2 Tool Chain 9 Trace Buffer 11 Index Trigger Constructs 11 W Weight Emulator 12 EasyPack S 8051 52 Up amp Running
10. 5 A Accessories 7 B Bank Switch 10 bank switch function 6 Bank Switch Jumpers Setting 17 Bank Switch Setting J11 J12 and J13 17 Baud Rate Setup 17 Breakpoints 10 C CodeCruiser 8 Communication Ports 12 Connecting 8051 52 Probe Module with Target 19 D Defining Port 3 Function 21 Diagnostics 26 Dimensions Emulator 12 Double Board Probe Module 20 Download Formats 9 EasyPack S 8051 52 Up amp Running Contents 31 E ECBIIS 8052 5 6 ECBIISA 8052 5 6 Emulating Notes 25 Emulation Memory Setting 18 Environment 12 EPH 52F 7 EPL 52F 7 EP PLCC 21 EPSLD52F INI 17 ESD precautions 13 Event Trigger 10 External Hardware Sync Interface I 1 External Signal Cable 23 G Getting help 2 H Hardware Diagnostics 26 Hardware Overview 5 ICE Probe Module 7 Interface Diagram for 8031 8032 27 Interface Diagram for 8051 8052 29 Interface Diagram for 80C154 80C51FA 8344 31 Interface Diagram for 87C652 33 J J11 J12 and J13 Bank Switch Setting 17 M Mapped Memory Retention 11 MICETEK 2 mini jumper X3 25 Cndex N NT52 INC 26 Null Target Installation 22 O Operating Parameter 13 Overlay Memory 10 P Parallel Interface 14 PLCC Type Target 21 Port 3 Function 21 Power 12 power up sequence 24 Problem Report Form 2 R Registering your EasyPack 2 Related Publications 2 Reset Cold Reset 25 Warm Reset 25 RJ11 connector 16 RS 23
11. 51 8052 Targer 27 When Emulating 8031 8032 Target aira ra enaA AAA ANEA ARA 28 Appendix A Target Interface Diagram 29 Interface Diagram for 38031 803 2ean iioii Ee an EEE E E 29 Interface Diagram for SOS 1807 31 Interface Diagram for 80C154 80C51FA 8344 esnnrnnrnrrvrnrnnrnrsvrrvrnrnernesnrevvnrnernrsvrevvesnennne 33 Interface Diagrami for 8 7 C652 sek Rae 35 Contents iii Index 31 EasyPack S 8051 52 Up amp Running Chapter 1 1 Introduction Overview This manual will get you acquainted with the features and hardware architecture of EasyPack 8052F and EasyPack S 8052F in circuit emulators see Chapter 2 Emulator Overview for the comparison between the two configuration of emulators The following shows how the topics are arranged in this manual Chapter Contents Emulator Overview Describes the EasyPack and EasyPack S emulator main modules and parts Lists the emulator features dimensions and weight Hardware Installation Describes emulator interface with host system and Setup Explains how to plug the emulator probe module to target for emulation and to null target for stand alone operation Communication and emulation memory size setups are also discussed in this chapter Application and Describes the limitations and important Engineering Notes engineering notes that you should be aware of about the current version of the EasyPack and EasyPack S development system Appendix A Target Provide
12. EasyPack and EasyPacke 9 8051 8052 In Circuit Emulator Up and Running In 30 Minutes MICETEK INTERNATIONAL INC oc No Second Edition March 2000 Trademark Acknowledgments EasyPack is a registered trademark of Microtek International SLD is a trademark of Microtek International IBM is a registered trademark and PS 2 is a trademark of IBM Microsoft MS MS DOS and Windows are registered trademarks of Microsoft Corporation Intel is a registered trademark and Intel386SX is a trademark of Intel Corporation Philips is a trademark of Philips Semiconductors 2500AD is a trademark of 2500AD Software Incorporated IAR is a trademark of IAR Systems AB Franklin is a trademark of Franklin Software Inc Keil is a trademark of Keil Elektronik GmbH BSO Tasking is a trademark of Boston System Office CodeCruiser is trademark of Micetek Doc 001 000012 Second Edition 2000 MICETEK INTERNATIONAL INC All Rights Reserved Printed in Taiwan 03 2000 The contents of this manual are subject to change without notice MICETEK International Inc assumes no responsibility for errors that may appear in this manual MICETEK makes no commitment to update nor to keep current the information contained in this manual Nothing herein shall be construed as a recommendation to use any product in violation of existing patents or other rights of third parties NO PART OF THE CODECRUISER AND OF THIS MANUAL MAY BE REPRODUCED
13. OR TRANSMITTED IN ANY FORM OR BY ANY MEANS WITHOUT THE EXPRESS WRITTEN PERMISSION OF MICETEK MICETEK INTERNATIONAL INC MICETEK MICETEK 4F Building 14 No 470 Guiping RD TF 1 237 Sec 1 Wu Chuan West Road Shanghai 200233 P R C Taichung Taiwan 403 Voice 86 21 6495 4008 Voice 886 4 378 6288 Fax 86 21 6485 3259 Fax 886 4 378 6289 E mail chinasales O micetek com E mail sales Omicetek com ontents 1 Introduction 1 Overview Luster AER RE cafes Adnan cle E MNA ae tea 1 Related Publications and Cross References pp 1 2 How to Contact MICETEK eernnrrvvnversnnnrvnnnnrsssversrnnnnnnnnnensessnnnnnnnsnsnnnnnnnnnnnnnnenssssnnnnnnesssnnnn 2 2 Emulator Overview 5 What You Should Gets narsussiasakssasneantdale teak e ai e R E E i 5 EasyPack YS 8052 Main Mod ler eiai 5 ICE Deele EE tree 7 ACCESSOHES unna ER A ENEN E AA AAE NAERA TAAS EE E E 7 Ee e eene EES ee 8 SUPported T rgetsinsyn ian eS EaR O Ea S EE a aa 8 System Clock ror insa ae E E E T E E E s 8 Overlay Mett riene easier 9 Bank Switch for EasyPack 9S 8052F only annuun 9 Breakpomtsuusasssds konst senk ove dete tescanes ced duiges eseeveeti dels AE ETS 9 Complex Event T rp pet s csicsaiutieai a deetiolation eegener 9 Real Time Trace MEIERS e ES E va R 10 Non Intrusive Execution Control 10 Execution Time Measurement pe 10 External Hardware Sync Interface srnonnnnrnnrnvrnennnnrnnrrvvnrnnnnrsvrrvvnnnesvasnrevvesnennee 10 Target Mem
14. ack S 8051 52 Up amp Running Chapter 3 17 Defining Memory Size with Bank Switch Jumpers for EasyPack S only The Bank Switch feature allows you to define either 64K no bank in use or 128K 2 bank in use or 256K 4 bank in use bytes of emulation memory to accommodate the size of the debugging program to be downloaded Bank switching is accomplish by closing appropriate pins between banks or mini jumpers J11 J12 and J13 located on the ECBIIS Emulation Control Board Their pin assignments are shown below Bank Switch Jumpers J11 J12 and J13 Location 8 765 43 210 J11 o o o o o ol Pins 0 7 are connected to A16 control bit Pins 0 7 represent P1 or P3 Pin 8 is closed for J12 2 Bank 128K Emulation Memory selection Pins 0 7 are connected to A17 Pin 8 is closed J13 for 4 Bank 256K Emulation Memory selection Bank Switch Jumpers Pin Assignment Setting for 64K Emulation Memory No jumper is required when single bank selection is made or when defining for 64K emulation memory For 64K emulation memory no jumper required or position jumper as shown Don t care for control bit selection EasyPack S 8051 52 Up amp Running Hardware Installation and Setup 18 Chapter 3 Setting for 128K Emulation Memory Two bank selection is made when defining for 128K emulation memory In the example below Pins 0 amp 8 of Jumper11 are close
15. asyPackYS 8052F only Bank switching of emulation memory from 64K to 256K bytes maximum Switching of desired memory size is done by repositioning of jumpers on the ECBIIS board Breakpoints Real time hardware Events breakpoints This Includes e 2 Multiple Setting Bus Breakpoints el External Trigger Input Breakpoint e 64K Hardware Execution Breakpoints for EasyPack or 256K Hardware Execution Breakpoints when using the Bank Switch for EasyPack S Complex Event Trigger One External Trigger Input ETD and One External Trigger Output ETO for device synchronization Up to 2 Trigger Levels each level may be a single event or any logical construction of Eventl Event2 and Event3 e Event Count providing matched count triggering Trace collection with flexible trigger supporting Forward Backward Center and delay trigger trace EasyPack S 8051 52 Up amp Running Emulator Overview 10 Chapter 2 Emulator Overview Real Time Trace Buffer e 32K frames deep and 40 bits wide including 16 bits address 8 bits data 3 bits status 5 bits external trace points and 8 bits port status port selectable e Supports trace ON OFF operation e Supports hardware trace qualifiers Non Intrusive Execution Control e Single Step Step Over in source or assemble levels e Cycle step displaying address data cycle status port status and external trace bit status Execution Time Measurement Measurable by self contained t
16. d across bank with Pins 0 amp 8 of Jumper 12 respectively using P10 Signal Jumper position for 128K emulation memory JUMPER JUMPER PINS POSITION Jumper at Bit 0 position for A16 control bit e oo m Close one for A16 control bit J13 Setting for 256K Emulation Memory Four bank selection is made when defining for 256K emulation memory In the example below Pins 0 1 amp 8 of Jumper12 are closed across bank with Pins 0 1 amp 8 of Jumper 13 respectively using P10 and P11 Signals i Jumper at Bit 0 amp 1 position Jumper position for 256K for A16 amp A17 control bits emulation memory respectively JUMPER JUMPER PINS posmon 8 ov for A16 and A17 control bit Hardware Installation and Setup EasyPack S 8051 52 Up amp Running Connecting EasyPackY S 8051 52 Probe Module with Target NOTE See Appendix A for the target interface diagram To prevent possible damage to equipment ensure to comply with the following I The ICE Probe Modules for 8051 52 are NOT interchangeable and should be used only with 8051 52 supported targets see section on Features in Chapter 2 Ensure that the pin numbers of both the Probe Module and that of the target CPU socket or CPU chip are properly aligned before plugging them together Check to confirm that the ICE Probe cable is firmly plugged into their respective 80 pin connectors on EasyPack S Module Depending on the type ROMless ROM
17. e handling the probe Avoid touching the exposed connector on the probe tip when you are not properly grounded EasyPack S 8051 52 Up amp Running Hardware Installation and Setup Connecting EasyPackY S 8052F to Host Computer Before connecting make sure that you have the following minimum host configuration e An Intel386DX or later including Pentium based PC or 100 compatible system e 4 MB or greater of RAM e 8 MB of available disk space for debug software e 9 5 MB or greater permanent swapfile e VGA or Super VGA color monitor e Windows 95 98 or NT Connecting with Desktop PC Via Printer Port MS PCX Cable Connecting EasyPack S System to Desktop PC Printer Port Hardware Installation and Setup EasyPack S 8051 52 Up amp Running Chapter 3 15 Connecting with Notebook PC Via Printer Port oe Printer Port Parallel Port MS PCX Cable Connecting EasyPack S System to Notebook Printer Port Connecting with Desktop PC Via Serial Port Serial Port Parallel Port RJ11 Jack 25 or 9 Pin Connector RS232 Cable Connecting EasyPack S System to Desktop PC Serial Port EasyPack S 8051 52 Up amp Running Hardware Installation and Setup 16 Chapter 3 Connecting with Notebook PC Via Serial Port ee Serial Port Parallel Port 9 pin Connector RS232C Cable Connecting EasyPack S System to Notebook PC Serial Port Hardware Installation and Setup EasyP
18. eport Form that came with the emulator When you call you should be at your computer with the EasyPack and debug software running EasyPack S 8051 52 Up amp Running Micetek Shanghai PRC Voice 86 21 6495 4008 FAX 86 21 6485 3259 Email chinasales O micetek com Micetek TaiChung Taiwan Voice 886 4 378 6288 FAX 886 4 378 6289 Email sales micetek com Chapter 1 3 Monday through Friday from 9 AM to 5 PM Beijing Time 24 hours 24 hours Monday through Friday from 9 AM to 5 PM Taiwan Time 24 hours 24 hours For getting the latest information please visit our web page http www micetek com EasyPack S 8051 52 Up amp Running Introduction Chapter 2 5 Emulator Overview What You Should Get 8051 52 probe Module EasyPack 8052F Main Module Null Target Board EasyPack S 8052F Main Module and 8051 52 Probe Module Hardware Overview The EasyPack or EasyPack S development system comprises of the Main Module and the ICE Probe Module Their components are common except for the model of the emulation control board installed in the Main Module EasyPack S 8052 Main Module The EasyPack and EasyPack S 8052 Family Main Module is applicable to all standard models of EasyPack and EasyPack S series ICE Probe Modules including 8051 52 It houses the Emulation Control Board ECBIIS 8052 for EasyPack S 8052F or ECBIISA 8052 for EasyPack 8052F and the power supply
19. imer maximum time length is 36 4 hours with 11sec timebase External Hardware Sync Interface External Trigger Out ETO port provides an output EVENT TRIGGER match signal active high when Event3 matched negated when trigger level matched Target Memory Retention Target processor can retain its entire memory and I O space Mapped Memory Retention User defined emulation memory mapping and information as well as window layout are saved to host by clicking on the Save button They are retrieved by clicking the Restore button Trigger Constructs Powerful Trigger Constructs The trigger conditions are composed of up to 2 trigger level where each level specifies an event combination Each level may be a single event or a logic combination of Event Event2 and Event3 with AND OR as operators EasyPack S 8051 52 Up amp Running Chapter 2 11 Stand Alone Emulation e Supports stand alone emulation with 22 1184MHz crystal sourced from the bundled null target device Communication Ports e One 8 bit printer port 25 pin twisted pair allows your host PC or notebook to interface with EasyPack S through printer port e One RJ 11 phone jack connector allows your host PC or notebook to interface with EasyPack S through serial port Emulator Operation Requirements Power e 90 to 264VAC Auto range e 50 to 60Hz e Consumption 37W maximum e Fuse rating 1 5A 250V slow blow Environment e Operating Temp
20. m is equipped with a PLCC type CPU socket the optional DIP to bs PLCC socket adapter EP ZE Scot Adapter PLCC APT as shown in the figure at left should be initially attached to the bottom of the ICE probe before inserting the ICE Probe Module into the PLCC type CPU socket Pott ipaa MistTan perc Using Adapter to Connect Probe Module with PLCC Type Target Defining Port 3 Function I O or RD WR Assign required Port 3 pin function I O or RD WR by positioning the mini jumpers X4 and X5 located on top of the ICE Probe Module or as indicated in the above figure Position mini jumper according to the desired function as directed in the following table JUMPER JUMPER PINS PINS SIGNAL POSITION RSC EC Ee E FUNCTION e oen xs meo Port Signal I O Selection JUMPER JUMPER PINS SIGNAL POSITION gt FUNCTION Close Port Signal I O or RD WR Selection EasyPack S 8051 52 Up amp Running Hardware Installation and Setup 22 Chapter 3 Null Target Installation for Stand Alone Operation If not already installed the factory provided null target board must be attached to the probe module when performing stand alone operation Install null target board as follows 1 Install the probe module socket into the null target board 2 Connect the null target power cord connector to its power source on EPH 52F board of the ICE Probe Module as indicated in the figure below
21. on and Setup Chapter 4 27 Application and Engineering Notes Overview This chapter provides important procedures you must follow for proper and stable operation of EasyPack S 8052F It offers precautions to difficulties you may likely encounter while performing emulation General 1 To protect your equipment from possible damage always apply power to your target first before EasyPack S is powered on 2 Pins 1 and 2 of the mini jumper X3 located on top of the ICE Probe Module should be in open position when NMOS controller with clock source is used on target Otherwise it should remain closed default position When Emulating 8051 8052 Target When emulating 8051 8052 or 80C51 80C52 target take note of the following 1 The use Philips 80C32UBPN as the emulation processor is highly recommended 2 The Philips 80C32UBPN is a commercial processor When this processor is used as the emulation processor it can support 33MHz maximum emulation speed CAUTION Use of other CPU s as emulation CPU may not produce the desired emulation speed and results 3 The ICE Probe Module lower board EPL 52F must be installed EasyPack S 8051 52 Up amp Running Application and Engineering Notes 28 Chapter 4 When Emulating 8031 8032 Target When emulating 8031 8032 or 80C31 80C32 target take note of the following 8031 8032 or 80C31 80C32 from any vendor may be used as the emulation processor 2
22. ory Retention sernir osde ieper ireren dieas e Tonini 10 Mapped Memory Retenpon 10 Trigger COBStruktsiakankkmis magasinene 10 Stand Alone Emulation pp 11 Communi Cations Ports eatarra eae T EEE A OE EE 11 Emulator Operation Requirements 4 11 EE 11 Ee TE EE 11 Emulator Weight and Dumenstons iersinii iT ia E ii 11 M in Module x sanere Ede 11 EasyPack S 8051 52 Up amp Running 3 Hardware Installation and Setup 13 OVEN IEW dori TT 13 Checking the Environmental Conditions 3 13 Protecting the Emulator from Electrostatic Discharge ESD pp 13 Connecting EasyPack US 8052F to Host Computer 14 Connecting with Desktop PC Via Printer Port pp 14 Connecting with Notebook PC Via Printer Pont 15 Connecting with Desktop PC Via Serial Pot 15 Connecting with Notebook PC Via Serial Pont 16 Defining Memory Size with Bank Switch Jumpers for EasyPack S only 17 Connecting EasyPack US 8051 52 Probe Module with Target RN 19 Connecting Probe Module to PLCC Type Target Socket pp 21 Defining Port 3 Function I O or TAG SJ 21 Null Target Installation for Stand Alone Operation pp 22 Null Target Board Mini Jumper X1 Setup 22 Connecting EasyPack VS with the External Signal Cable pp 23 Applying Power to the System asipar pedes a i sieaas 24 Hardware Reset sanset 25 Col aS ot AEE E AEE EEEE Zeg 25 Weal RESCE krass 25 4 Application and Engineering Notes 27 OVi VIE Wars ETT 27 General EAA AEE ee Ate AA A EE AE Ae a A Ae 27 When Emulating 80
23. s circuit guides for proper connection of Interface Diagrams your target with the EasyPack or EasyPack S emulation processor Related Publications and Cross References e See the User s Guide for the Microsoft Windows Operating System for more information on using Windows Notepad and Macro Recorder EasyPack S 8051 52 Up amp Running Introduction 2 Chapter 1 Registering e See the pertinent Processor User s Manual for information on the target processor you are using e See the manual that came with the compiler you are using Be sure to complete and return the enclosed registration card so that MICETEK can provide you with technical support and keep you informed of new product developments How to Contact MICETEK Introduction As a MICETEK customer you can call MICETEK technical support for help with an emulator problem during your warranty period To register for this support be sure to fill out and mail in the registration card that came with the emulator If you have a question about debug software try to find the answer in the manual or in on line Help If you cannot find the answer contact our Customer Support Department at any of the following sites Before you call please read the EasyPack Emulator Problem Report Form that came with the emulator The form is also included in README TXT installed in the debug software directory on your hard disk Before you call please read the EasyPack Emulator Problem R
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