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IBM PowerPC 401 Evaluation Board Kit User`s Manual

1. Factory J22 Description Setting open LED disabled should be open if J21 is closed 1 2 LED operational lt Table 5 21 Jumper J26 Parallel Port Mode ET Factory J26 Description Setting open bi directional parallel port lt 1 2 uni directional parallel port Table 5 22 Jumper J27 PCI IDSEL Control m Factory J27 Description Setting 1 2 standalone board PCI bus AD16 used for local IDSEL lt 2 3 board operating as PCI adapter card PCI bus IDSEL line used for local IDSEL Table 5 23 Jumper J28 DRAM Programming PD1 2222 428 Description Setting 1 2 see Table 5 14 Jumper Programming of SIMM Size on lt 17 401 EVB Connectors 5 19 5 20 Table 5 23 Jumper J28 DRAM Programming PD1 Continued J28 2 3 Description Factory Setting Table 5 24 Jumper J29 25 33 MHz Bus Frequency Selection 429 Description Setting 1 2 33 MHz 2 3 25 MHz lt Table 5 25 Jumper J30 DRAM Programming PD2 2242 J30 Description Setting 1 2 see Table 5 14 Jumper Programming of SIMM Size on page 17 2 3 Table 5 26 Jumper 432 Control zit Factory J32 Description Setting open standalone board PCI socket INTA INTB INTC INTD will interrupt the 401 as PCI INT locally generated PCI INTA will not generate an int
2. A 28 RD WRITE Request Table A 29 RD WRITE Response A 29 RD WRITE SPR Request Table a A 30 xvii Table A 48 RD WRITE SPR Response A 30 Table A 49 RL_LDINFO Request A 31 Table A 50 RL_LDINFO Response A 31 Table 51 LOAD REQ Request A 32 Table 52 LOAD REQ Response Table A 32 Table D 1 401 EVB Bill of Materials D 2 xviii 401 EVB User s Manual About This Book This book contains the information you need to install and use the IBM amp PowerPC 401 Evaluation Board EVB a hardware and software development tool for the PowerPC 401GF 32 bit RISC embedded controller Connection of the 401 EVB to a host system is required for the exercises in this book Supported host systems include an RISC System 6000 workstation running AIX 3 2 5 or higher an IBM or compatible PC running one of the following e Windows 3 1 or higher and a TCP IP package compliant with the Microsoft Windows Socket API definition Windows 95 Windows NT 3 51 a Sun SPARCstation 5 10 or 20 workstation running Solaris 2 3 or higher or
3. First section header 2 struct info block long magic num magic number long text_start addr of text section from section header long text_size size of text section from section header long data_start addr of data section from section header long data_size size of data section from section header long elf_hdr_size size of ELF headr long sym_start addr of symbol table long num_syms number of symbols long toc ptr used for XCOFF not used for ELF struct rel_block next pointer to next boot section header i magic num is used for verification purposes and must be X 004D 5054 text start is the physical address value from the object text header text size is the size in bytes from the object text header data start is the physical address from the object data header B 2 401 EVB User s Manual data size is the size in bytes from the object data header elf hdr size is the size of the object header The debugger requires this infor mation sym start is the address of the symbol table in storage syms is the number of symbol entries next points to the next section header B 2 2 Text Section For a text section the union section info contains the structure text info specifying the entry point of the text section B
4. 1 0 Signal Name Description 401 Pin 1 Out TDO JTAG test data out 1 2 To be left unconnected 3 In TDI JTAG test data in 8 10KQ PU 4 To be left unconnected 5 To be left unconnected 8 4POWER3 r a not ja pus 7 In TCK JTAG test clock 18 10KQ PU 8 To be left unconnected 9 In TMS JTAG test mode select 17 10KQ PU 10 To be left unconnected 11 In HALT Processor halt 16 10KQ PU 12 To be left unconnected 13 To be left unconnected 401 EVB Connectors 5 7 Table 5 5 RISCWatch JTAG Interface Connections and Resistors y o Signal Name Description 401 Pin BORED 14 KEY Pin in this position should be removed 15 To be left unconnected 16 GND Ground 1Pin numbers for PQFP packages PU pullup resistor 5 5 Expansion Test Interface Connector Connectors J15 processor expansion 1 and J16 processor expansion 2 provide user access to all of the CPU control address and data signals Table 5 6 describes the signal assignments for the J15 processor expansion receptacle on the 401 EVB Table 5 6 Connector J15 Processor Expansion 1 Pin Name Comment 1 45V 2 MemCIk 3 GND 4 Crit Int 5 Int 6 GND 7 HoldAck 8 HoldReq 9 45V 10 GND 11 BusReq 401 12 GND 5 8 401 EVB User s Manual Table 5 6 Connector J15 Processor Expansion 1 Continued Pin Name C
5. 1 2 ROM S u nina 1 2 RISCWatch Debugger 2 edd ete a ee ERR e Pe Eie 1 2 IBM High C C Compiler ua ua uu un a 1 2 OS Open Real Time Operating 1 3 Dhrystone Benchmark Program sse 1 3 Application Tools ote eene ee estote es Dee e net Ee ee 1 3 Host System Requirements 2 1 RS 6000 Host System Requirements 2 1 PC Host System Requirements eese nnne 2 2 SUN Host System Requirements eese emen 2 3 Installing the EVB Software esee uuu uu uu nnn 3 1 RS 6000 Installation essen nennen nemen 3 1 EVB Software Support Package Installation 5 6000 2 2 2 1 3 1 RISCWatch Debugger Installation 6000 see 3 4 PG Installation 2 drca adit ee Rei EUR EUR e E EL LR 3 4 EVB Software Support Package Installation 3 4 RISCWatch Debugger Installation 1 3 7 Sun Installation E ER ERRARE deep reet 3 7 EVB Software Support Package Installation 3 7 RISCWatch Debugger Installation Sun
6. s 3 10 Host nnn nena nannten 4 1 RS 6000 Host 4 1 Contents v Serial Port Setup RS 6000 u u 4 1 Ethernet Setup RS 6000 u u nnne 4 5 ROM Monitor Debugger Communication Setup RS 6000 4 7 PG Host Configuration etri Den edere En 4 7 Serial Port uei dee Se ee IER SL Regesto 4 8 Ethernet Setup siue eed dette ctetu ote Dens 4 10 Windows 3 1 trie eee Delete ee 4 11 Ethernet Setup Windows 95 4 12 Ethernet Setup Windows NT 3 51 u 4 13 ROM Monitor Debugger Communication Setup 4 13 Sun Host Configuration u 4 13 Serial Port Setup 50 440011 4 14 Ethernet Setup u uuu u u 4 14 ROM Monitor Debugger Communication Setup SUN 4 15 401 EVB Con ectorsu u U IA ua as sasi asas nnn nnn nn 5 1 Serial Port GOnnectors uuu u uuu heme te seus ri tiende 5 3 Ethernet Connectors neern E 5 4 Parallel Port Gonnectot m nici eoe e mee tei PEERS 5 5 RISCWatch JTAG Debugger 5 7
7. 5 16 Connector J42 PCI Socket and Squall 12V 5 16 Jumper Programming of SIMM Size 5 17 Jumper J9 DRAM Programming 0 2 2 2 1 1 5 17 Jumper J10 Arbiter Select seen 5 17 Jumper J12 PCI SERR Control a 5 18 Jumper J20 Coax Twisted pair Selection 5 18 Jumper J21 Twisted pair Link Integrity Checking 5 18 Jumper J22 Twisted pair Good link LED 2 22 5 19 Jumper J26 Parallel Port PP Mode 5 19 Jumper J27 PCI IDSEL Control 5 19 Jumper J28 DRAM Programming PD1 a 5 19 Jumper J29 25 33 MHz Bus Frequency Selection 5 20 Jumper J30 DRAM Programming PD2 5 20 Jumper J32 PCI INTA 5 20 Jumper J43 PCI Clock Source 5 21 Status LED Display uu y u ed ete eee e tein teeter 6 5 XV Tabl 6 2 401 EVB SWIICh6S o eig RES 6 6 Table 6 3 Utility Port Bit 6 9 Table 6 4 Ethernet DMA PRQ Status 1 u u u
8. Each of the entries slipc and enetc should be entered on single line The value of the Ethernet hardware address field in the enetc entry ha xxxxxxxxxxxx should match the twelve character hardware address listed for the Ethernet Boot Source on the ROM Monitor menu Both connections use the file usr osopen m401 evb samples boot img as the source for the application image to be downloaded onto the board Be sure that the htzethernet keyword is used for the Ethernet connection entry and that the IP addresses are those of the evaluation board Note that the IP address in the slipc entry must match that of the IP address assigned to the board during serial port set up Since a board IP address was not required for Ethernet set up the IP address used in the enetc entry defines the IP address of the board for the Ethernet connection If the suggested bootptab entries are used 7 1 1 5 would be the board s Ethernet IP address Take note of the board s IP addresses since they must be made known to the ROM Monitor 7 2 401 EVB User s Manual To start the bootp and tftp daemons on systems running AIX 3 do the following login as root or the superuser su enter smit select Diskless Workstation Management and Installation select Start Daemons on Server select Start BOOTP Daemon select Do or hit Enter Upon successful completion bootp configuration is complete Continue for tftp select Done or hit PF3
9. 9 14 Liquid Crystal Display Device 9 14 LCD Device Driver Installation uu 9 14 LCD Device Installation nnn 9 15 Opening LCD 9 15 Ld te Bon Ber pp 9 15 Gro ro ELE 9 15 Environment Bringup and 9 17 Board DOOIStHaD pen RR 9 17 Environment Initialization eee 9 18 doe c 9 19 bet thy adh et bte ae 9 19 hbranchau iut hcec bct bete ut fes Pestis 9 21 lue 9 23 401 EVB Function Reference 10 1 viii 401 EVB User s Manual Attributes and Threads uu uu na u S ea Done epe vot 10 1 iet teet e Rente e Pee ete e t eee 10 1 Cancel Safe Functions 10 2 Interrupt Handler Safe 10 2 401 EVB Functions ici deco fenetre eine eei 10 2 Program Trace Calls A 1 eim ET A 1 MSGDATA Structure cetero eite apea A 1 Ptrace Definitions ucun eere rre a u Rete te peres A 4 iun emen
10. anam 6 9 Ethernet Remote DMA u u u u 6 10 401 EVB Memory 6 11 Squall Expansion Interface nnne nennen 6 14 Non Critical Interrupts tert tete 6 15 6 16 Network Address of the Ethernet Controller e 6 16 401 EVB ROM Monitor u U UU u nnn nnn nnns 7 1 ROM Monitor Source 7 1 Communications Features nnne u uu u 7 2 Bootp and tftp Configuration to support ROM Monitor Loads 7 2 RS 6000 bootp and tftp configuration sse 7 2 PC bootp and tftp configuration 7 4 Automatic startup for Windows 3 1 and Windows 3 51 7 5 Automatic startup for Windows 95 7 6 SUN bootp and tftp 7 6 Accessing the ROM Monitor 7 8 ROM Monitor Operation 7 8 Monitor Selections and 7 9 Initial ROM Monitor 7 9 Selecting Power On Tests 7 11 Selecting Boot Devices 7 13 Changing IP Addresses ceteri pietre niri 7 15 Using ithe Ping l est ee t te
11. 6 2 Figure 7 1 ROM Monitor Address a 7 9 Figure 9 1 elf2rom Output File 1 u nennen 9 20 Figure 9 2 Detail of patch file 9 22 Figure 9 3 hbranch Output 9 22 xiii xiv 401 EVB User s Manual Tables Table 5 1 Table 5 2 Table 5 3 Table 5 4 Table 5 5 Table 5 6 Table 5 7 Table 5 8 Table 5 9 Table 5 10 Table 5 11 Table 5 12 Table 5 13 Table 5 14 Table 5 15 Table 5 16 Table 5 17 Table 5 18 Table 5 19 Table 5 20 Table 5 21 Table 5 22 Table 5 23 Table 5 24 Table 5 25 Table 5 26 Table 5 27 Table 6 1 Serial Port Signal 5 3 Ethernet Connector Description u 5 4 Ethernet Connector 5 5 Connector J5 Parallel Port 5 5 RISCWatch JTAG Interface Connections and Resistors 5 7 Connector J15 Processor Expansion 1 a 5 8 Connector J16 Processor Expansion 2 5 10 Connector J4 Squall 5 11 Corinector XJ TT PoW8r iet ed tenentis 5 15 Connector J39 Accessory 3 3 a 5 15 Connector J40 PCI Socket 43 3V 5 16 Connector J41 PCI Socket and Squall 12V
12. Length of additional data being sent A 29 A 3 25 RD WRITE SPR 112 This request writes data directly to one of the SPRs not the process s copy All SPR registers are accessible through this request The requester is responsible for supplying valid SPR values No error checking is performed on this field A 3 25 1 Request data Table A 47 RD_WRITE_SPR Request Table Parameters msg request RD_WRITE_SPR Description Requested API function msg address SPR number SPR number to be written msg data value Data to write to register msg data_len 0 Length of additional data being sent A 3 25 2 Response data Table A 48 RD_WRITE_SPR Response Table Parameters msg retcode RD_COM_ERR 1001 Description Communication error occurred msg retcode RD_OK 0 Successful completion msg data_len 0 Length of additional data being sent A 30 401 EVB User s Manual A 3 26 LDINFO 181 This request provides load information from the host to the ROM monitor This request is used when the target is loaded by a process other than the debugger The information specified on the this request will be returned on subsequent RD LDINFO requests A 3 26 1 Request data Table 49 LDINFO Request Table Parameters msg request RL_LDINFO Description Requested API function msg data_len sizeof struct Idinfo
13. 6 10 Table 6 5 Ethernet Remote DMA eene 6 10 Table 6 6 Squall Module Memory 6 14 Table 6 7 Non critical Interrupts Controller 1 6 15 Table 6 8 Non critical Interrupts Controller 2 2 6 15 Table 6 9 Critical M eU 6 16 Table 9 1 OS Open Libraries 9 1 Table 9 2 OS Open Libraries for the 401 9 4 Table 9 3 ioctl Commands for Asynchronous Device Drivers 9 10 Table 9 4 ioctl Commands for the LCD Device 9 16 Table 10 1 Functions Specific to 401 10 2 Table 1 RD ATTACH Request A 5 Table 2 RD ATTACH Response A 5 Table A 3 RD CONTINUE Request Table sse A 6 Table 4 RD CONTINUE Response Table a A 6 Table 5 RD DETACH Request Table seen A 7 Table 6 RD DETACH Response Table esee A 7 Table 7 RD FILL Request A 8 Table 8 RD FILL Response Table eene A 8 Table 9 RD KILL Request Table seen A 9 Table A 10 RD Response A 9 Table A 11 RD LDINFO Request Tab
14. DFF is used to synchronise PRQ with 33Mhz 25Mhz Data D7 is tristated with blast and chip select signal by assuming it is single access PROLATCH clk GLOBAL CLK1 PRQLATCH CLRN RESET PROLATCH D PRQ PRQ status read bit Address 7400 0010 7400 0010 D7 TRI PROLATCH BLAST LATCH CS amp 0 Following Eq Synchronize Ethernet register sync Acknowledge to 33Mhz 25Mhz LATCH ACK clk GLOBAL CLK1 LATCH_ACK PRN RESET LATCH_ACK D ACK PLX 9060 chip select active period control signal PLX_CS_FF clk BLAST READY PLX_CS_FF PRN RESET PLX_CS_FF CLRN ADS PLX_CS_FF D VCC CHIP SELECT SIGNAL GENERATION FOR ALL PERIPHERALS 1000 0000 1007 FFFF SRAM SRAM_CS A30 amp A29 amp A28 amp A27 amp A26 amp A25 amp A24 amp A23 amp A22 amp A21 amp A20 amp A19 amp CS_FF C000 0000 CFFF SQUALL SQUAL CS A30 amp A29 amp A28 amp CS FF C 4 401 EVB User s Manual PLX Register read Chip Select PLX CS 0 amp A29 amp 28 amp A27 amp 26 amp A25 amp 24 amp A23 amp A22 amp A21 amp A20 amp A19 amp A18 amp A17 amp A16 amp 15 amp A14 6 A13 amp 12 6 11 amp A10 amp A9 amp PLX CS FF 7400 0000 7400 OOOF ETHERNET ENET CS NODE A30 amp 29 6 A28 amp A27 amp A26 amp A25 amp A24 amp A23 A22 amp
15. PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 67 ppcMfgpr2 Synopsis Library Description Errors Example Attributes References 10 68 include lt ppcLib h gt unsigned long ppcMfgpr2 void ppcLib a ppcMfgpr2 returns the current value of GPR 2 For XCOFF based OS Open this is typically the value of the table of contents TOC pointer for the current execution context None Retrieve TOC and stack frame base from current context toc ppoMfgpr2 unsigned long stack base ppcMfgpr1 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMfiac1 include lt ppcLib h gt unsigned long iac1_value ppcMfiac1 void ppcLib a ppcMfiac1 returns the value of the instruction address compare register 1 IAC1 The IAC1 contains the address of the instruction that the debug event will be based on The IA1 field of the Debug Control Register DBCR controls the instruction address 1 debug event Bits 30 and 31 of the IAC1 are reserved since the address must be word aligned None e Get the IAC1 register value iacl value ppcMfiacl Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 69 ppcMficcr
16. Synopsis Library Description Errors Example Attributes References 10 70 include lt ppcLib h gt unsigned long ppcMticcr void ppcLib a ppcMticcr returns the value of the Instruction Cache Cacheability Register ICCR None Get the ICCR value unsigned long iccr value ppcMficcr Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMficdbdr include lt ppcLib h gt unsigned long ppcMficdbdr void ppcLib a ppcMficdbdr returns the current value of the Instruction Cache Debug Data Register ICDBDR lt ppcLib h gt has constants defined for use with the ICDBDR register None Retrieve the value of the ICDBDR unsigned long current icdbdr ppcMficdbdr Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 71 ppcMfiocr Synopsis Library Description Errors Example Attributes References 10 72 include lt ppcLib h gt unsigned long ppcMiocr void ppcLib a ppcMfiocr returns the current value of the Input Output Configuration Register IOCR The file lt ppcLib h gt contains several constants that can be used when accessing the IOCR None Retrieve IOCR value unsigned long i
17. Synopsis include lt ppcLib h gt void ppcMfdccr unsigned long dccr_value Library ppcLib a Description ppcMfdecr returns the value of Data Cache Cacheability Register DCCR Errors None Example Set the value of the DCCR include lt ppcLib h gt unsigned long dccr value ppcMfdccr Attributes Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes Callable from Application Thread Group No References PPC401GF Embedded Controller User s Manual 10 62 401 EVB User s Manual ppcMfdcwr Synopsis Library Description Errors Example Attributes References include lt ppcLib h gt unsigned long ppcMfdcwr void ppcLib a ppcMfdewr returns the value of the Data Cache Write thru Register DCWR None Retrieve the current value of the unsigned long dcwr_value ppcMfdcwr Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 63 ppcMfdear Synopsis Library Description Errors Example Attributes References 10 64 include lt ppcLib h gt void ppcMfdear unsigned long dear_value ppcLib a ppcMfdear returns the value of Data Exception Address Register DEAR None Set the value of the DEAR include lt ppcLib h gt unsigned long dear value ppcMfdear Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Cont
18. msg retcode RD OK 0 Successful completion msg retcode RD NOTSUPP 1003 Call not supported by this interface msg retcode RD REG ERR 1004 Unable to access given register msg retcode ESRCH 3 The msg pid parameter identifies a pro cess that does not exist msg data len 76 0x4C Length of additional data being sent msg buffer 0 18 Values read from GPRO to GPR18 Undefined if error A 18 401 EVB User s Manual A 3 14 RD READ I 1 This request returns the integer in the debugged process address space at the location pointed to by the address parameter If the value of address is not in a valid address space unpredictable results will occur 3 14 1 Request data Table A 25 RD READ Request Table Parameters msg request RD READ I Description Requested API function msg address address Address of memory to read data from msg rpid process_id Numeric process ID on the target sys tem msg data sizeof msg rpid Length of additional data being sent A 3 14 2 Response data Table A 26 RD READ Response Table Parameters msg retcode RD COM ERR 1001 Description Communication error occurred msg retcode RD OK 0 Successful completion msg retcode EIO 5 Debugged process can not access given address msg retcode ESRCH 3 The msg pid parameter identifies
19. 9 1 OS Open Libraries ed a bee ea dee a eden ieee 9 1 Using Libraries and Support 9 4 Serial Port Support 9 4 Boot Library BAM rete nte e Euer 9 4 Input Output Support 9 4 PowerPC Low Level Processor Access Support Library 9 5 ROM Boot Library iet u m u ua tuom eet 9 5 ROM Monitor Ethernet IP Interface Library e 9 5 Real time Clock Interface Support 9 5 Integrated Ethernet IP Interface u 9 5 Software Timer Tick Support 9 6 Device Drivers Supplied with the 401 EVB a 9 7 Asynchronous Device 9 7 Device Driver 9 7 Device InstallatiOn eed ceni bens 9 8 Opening Asynchronous Communication 9 9 Readingtand Writing 2 1 EU MSN 9 9 9 10 Polled 9 12 Ethernet Device 9 13 Device Driver Installation 9 13 ROM Monitor Ethernet Device 9 14 ROM Monitor Ethernet Installation and Initialization
20. BLAST ACCESS7 amp DCLK1 amp BLAST ACCESS6 amp DCLK1 amp BLAST amp W R ACCESS6 amp DCLK1 amp BLAST amp W R amp HLDACK REFRESH3 amp DCLK1 q12 IDLE amp SRASE amp ADS amp REFREQ amp ACC PEND amp DRAMADDR amp DCLK1 4 ACCESSO amp DCLK1 REFRESH1 amp DCLK1 amp REFEVEN qq CLK CLK2 qq RESET RESET TABLE CURRENT STATE INPUT1 INPUT2 NEXT STATE 411 412 gt qq qi 1 x gt 40 qi 0 x gt ql 40 1 gt 41 40 0 gt 40 END TABLE se e e e ke e e se e e e he e e se e e e e e he e e e he e e ke e RASO Z kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk S rll ACCESS3 amp DCLK1 amp LA2 amp BLAST amp XTEND ACCESS4 amp DCLK1 amp W_ R amp BLAST amp XTEND ACCESS4 amp DCLK1 amp W_ R amp BLAST amp HLDACK ACCESS5 amp DCLK1 amp BLAST C 34 401 EVB User s Manual ACCESS7 amp DCLK1 amp BLAST ACCESS6 amp DCLK1 amp BLAST 6 W R ACCESS6 amp DCLK1 amp BLAST amp W R amp HLDACK REFRESH3 amp DCLK1 r12 IDLE amp SRASE ADS amp REFREQ amp ACC PEND amp DRAMADDR amp DCLK1 4 ACCESSO amp DCLK1 1 amp DCLK1 amp REFEVEN rr CLK CLK2 rr reset RESET TABLE CURRENT STATE INPUT1 INPUT2 NEXT
21. each entry must start with a hostname followed by the legends see the sample bootptab file for legend descriptions e use to separate each legend and leave no spaces between legends user must supply the host ip address via the ip legend ifthe hd home directory amp bf bootfile legends are not provided for a particular entry the first defined hd and bf legends in the bootptab file will be taken as default File entries similar to those below would be suitable slipc hd osopen PLATFORM samples bf boot img bs ip 8 1 1 5 sm 255 255 25 5 295 netc ht ethernet hd osopen PLATFORM samples bf boot img bs ip 7 1 1 5 5m 2255 255 255 255 ha XXXXXXXXXXXX Each of the entries slipc and enetc should be entered on a single line The value of the Ethernet hardware address field in the enetc entry ha xxxxxxxxxxxx should match the twelve character hardware address listed for the Ethernet Boot Source on the ROM Monitor menu 7 4 401 EVB User s Manual Both connections use the file osopen PLATFORM samples boot img as the source for the application image to be downloaded onto the board Be sure that the htzethernet keyword is used for the Ethernet connection entry and that the IP addresses are those of the evaluation board Note that the IP address in the slipc entry must match that of the IP address assigned to the board during serial port set up Since a board IP address was not required for Ethernet set up
22. CASOO B1 CASOO B2 CASOO B2 CASOO B3 CASOO B3 WRE WRE WRO WRO RASE 0 RASE 0 RASE 1 RASE 1 RASO 0 RASO 0 RASO 1 RASO 1 RASE RASE RASO RASO SRASE AAA C 21 SXTEND BBB HLDACK HOLDACK XTEND EXTEND HLDACK W_ R RASO RAS2 FOR EVEN BANK RASE 0 PD2 amp PD1 amp PDO amp PD2 amp PD1 amp PDO amp A21 amp RASE PD2 amp PD1 amp PDO amp RASE PD2 amp PD1 amp PDO amp A23 amp RASE REFING amp RASE PD2 amp PD1 amp PDO amp RASE PD2 amp PD1 amp PDO amp A25 amp RASE dE xb mb RAS1 RAS3 FOR EVEN BANK RASE_1 PD2 amp PD1 amp PDO amp A21 amp PD2 6 PD1 amp PDO 6 A23 amp RASE PD2 6 PD1 amp PDO 6 A25 amp REFING amp RASE RASO RAS2 FOR ODD BANK RASO 0 PD2 amp PD1 amp PDO amp RASO PD2 amp PD1 amp PDO amp A21 amp RASO PD2 amp PD1 amp PDO amp RASO PD2 amp PD1 amp PDO amp A23 amp RASO REFING amp RASO PD2 amp PD1 amp PDO amp RASO PD2 amp PD1 amp PDO amp A25 amp RASO dE ub ate RAS1 RAS3 FOR ODD BANK RASO_1 PD2 amp PD1 amp PDO amp A21 amp RASO PD2 amp PD1 amp PDO amp A23 amp RASO PD2 amp PD1 amp PDO amp A25 amp RASO REFING amp RAS
23. Considerable effort goes into providing a quality product with consistent documentation To insure that our customers have the advantage of the latest software features and updated information README TXT may contain clarifications and or additional information and should be considered must reading COMMENT USR and COMMENT DOC Please take the time to complete these user comment forms Your feedback and suggestions will help us to improve our products and technical publications Fax and email instructions are included in each of the files 3 1 2 RISCWatch Debugger Installation RS 6000 Please refer to the RISCWatch Debugger User s Guide for debugger installation instructions Be sure to follow the instructions for RS 6000 installation 3 2 PC Installation 3 2 1 EVB Software Support Package Installation PC Before beginning the installation you must have EVB for PC installation diskettes PC running Windows 3 1 or higher Windows 95 or Windows NT 3 51 The following procedure installs the EVB software support package NOTE For Windows NT users we recommend that you logon as root 1 Insert the installation diskette labeled EVB PC and 1 of n n may vary into diskette drive A 2 Start Microsoft Windows if it is not active 3 Select Run from the File pull down of Program Manager or from the Start menu for Win95 NT 4 Type A INSTALL to run the installation program 5 Follow the installation
24. Power On Test Devices 000 Disabled System Memory RAM 001 Disabled Ethernet ENET 004 Disabled Serial Port 2 S2 Boot Sources 001 Disabled Ethernet ENET 1 1 7 1 1 5 remote 7 1 1 4 hwaddr 1000abcdef55 004 Disabled Serial Port 2 S2 local 8 1 1 5 remote 8 1 1 4 hwaddr ffffffffffff 005 Enabled Serial Port 1 S1 Baud 38400 Debugger Enabled on exit 7 28 401 EVB User s Manual Enable disable tests Enable disable boot devices Change IP addresses Ping test Toggle ROM monitor debugger Toggle automatic menu Display configuration Save changes to configuration Set baud rate for sl boot Exit menu and continue OO Q N HE C 1 gt 0 Booting from S1 Serial Port 1 PLEASE NOTE You must now Exit from terminal emulation mode Modify the baud rate of your host session Transmit a file to the target in binary mode Reset the host baud rate to 9600 Re enter terminal emulation mode Hit enter to execute the downloaded program The ROM Monitor will now wait for you to follow the above steps The idea is that you must temporarily modify the terminal emulation session baud rate to match the baud rate expected by the ROM Monitor for the serial port 1 download The file must then be transferred to the EVB from the host The baud rate is restored to 9600 so that terminal emulation support can function after the program has been downloaded The ROM
25. Save changes to configuration The configuration is saved in the NVRAM on the evaluation board and is retained until a new configuration is subsequently saved 401 EVB ROM Monitor 7 23 7 6 10 Setting the Baud Rate for S1 Boots Option 9 provides a mechanism for setting the baud rate to be used by serial port 1 when it is used as a device to download programs Downloading over serial port 1 requires the use of a VT100 terminal emulator that supports kermit binary file transfer over serial port 1 RS 6000 and Sun users should note that the TIP terminal emulator does not support kermit binary file transfers Windows 3 1 users can use the Windows Terminal program to perform kermit binary file transfers but the baud rate is limited to 19 200 Windows 95 users can use HyperTerminal to perform kermit file tranfers at upto 115 200 baud The kermit terminal emulator available as shareware from the http www columbia edu kermit Internet site can be used on any of the supported hosts to download programs over serial port 1 at speeds upto 115 200 baud Device Configuration Power On Test Devices 000 Disabled System Memory RAM 001 Enabled Ethernet ENET 004 Enabled Serial Port 2 S2 Boot Sources 001 Enabled Ethernet ENET local 7 1 1 5 remote 7 1 1 4 hwaddr 1000abcdef55 004 Disabled Serial Port 2 S2 local 8 1 1 5 remote 8 1 1 4 hwaddr ffffffffffff 005 Enabled Serial Port 1 S1 Debugger Enabled on exit Enable disable
26. Select Cancel or hit PF3 to return to the Start Daemons on Server screen select Start TFTP Daemon Select List If tftp udp is not on the list tftp has already been started for the workstation The configuration steps are complete Select Exit to leave smit select tftp udp Select Do or hit Enter You should be at the Add an inetd Subserver screen The defaults listed are acceptable Select Do or hit Enter Upon successful completion tftp configuration is complete Select Exit to leave smit To start the bootp and tftp daemons on systems running AIX 4 do the following login as root or the superuser su enter smit sSelect Processes and Subsystems sSelect Subservers Select Start a Subserver Select bootps select OK Upon successful completion bootp configuration is complete Select Done and continue for tftp select Start a Subserver Select tftp select OK select Done Upon successful completion tftp configuration is complete Select Exit to leave smit 401 EVB ROM Monitor 7 3 7 3 2 PC bootp and tftp configuration Not all TCP IP packages include the bootpd and tftpd servers required for ROM Monitor downloads For this reason both the bootpd and tftpd servers have been included in the EVB software package under the osopen bin directory These servers can be installed and used in conjunction with Windows Socket compliant TCP IP packages such as Trumpet Winso
27. clockchip nvram write Synopsis Library Description Errors Attributes Async Safe No Cancel Safe No Interrupt Handler Safe No clockLib init p 10 27 401 EVB Function Reference 10 23 clockchip set calibration Synopsis Library Description Errors Attributes References 10 24 include lt clockLib h gt int clockchip set calibration unsigned char value clockLib a clockchip set calibration updates the clock s calibration byte with value The calibration byte occupies the five lower order bits of the byte The sixth bit is a sign bit 1 indicates positive calibration 0 indicates negative calibration Adding bits speeds the clock up and subtracting bits slows the clock down The clockLib library must be initialized by calling clockLib init prior to calling this function EINVAL Library not initialized or too many bits in value byte Async Safe No Cancel Safe Yes Interrupt Handler Safe Yes e clockchip get calibration p 10 15 clockLib init p 10 27 401 EVB User s Manual Synopsis Library Description Errors Attributes References clockchip start include lt clockLib h gt int clockchip_start void clockLib a clockchip_start starts the real time clock The clockLib library must be initialized by calling clockLib_init prior to calling this function EINVAL Library not initialized Async Safe No Cancel Safe Yes Interrupt Hand
28. ppcLib a ppcMfsler returns the value of the Storage Little Endian Register SLER None Retrieve the current value of the SLER unsigned long current sler ppcMfsler Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMfsprg0 ppcMfsprg3 include lt ppcLib h gt unsigned long ppcMfsprgO void unsigned long ppcMfsprgt void unsigned long ppcMfsprg2 void unsigned long ppcMfsprg3 void ppcLib a ppcMfsprg0 ppcMfsprg3 returns the current value of the special purpose register generals SPRGO SPRG3 Typically the SPRGs provide temporary storage at the operating system level NOTE OS Open reserves these registers for its own use None Read value of SPRGO unsigned long sprg0 value ppcMfsprg0 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 79 ppcMfsrr0 Synopsis Library Description Errors Example Attributes References 10 80 include lt ppcLib h gt unsigned long ppcMfsrrO void ppcLib a ppcM srrO returns the value of SRRO Typically SRRO is used in interrupt handlers as it usually contains the address of the next instruction to be executed at the time of the interrupt SRRO and S
29. A 20 401 EVB User s Manual 3 16 READ SPR 115 This request reads data directly from one of the SPRs not the process s copy All SPR registers are accessible through this message request The sender is responsible for supplying valid SPR values no error checking is performed on this field A 3 16 1 Request data Table A 29 RD READ SPR Request Table Parameters msg request RD READ SPR Description Requested API function msg address SPR number SPR number to read msg data_len 0 Length of additional data being sent A 3 16 2 Response data Table A 30 RD READ SPR Response Table Parameters msg retcode RD COM ERR 1001 Description Communication error occurred msg retcode RD OK 0 Successful completion msg data value Value read from register msg data len 0 Length of additional data being sent A 21 A 3 17 RD STATUS 114 This request is used to get program execution status and to determine if a previous RD CONTINUE request was received A 3 17 1 Request data Table A 31 RD STATUS Request Table Parameters Description msg request RD STATUS Requested API function msg rpid process_id Numeric process ID on the target sys tem msg data_len sizeof msg rpid Length of additional data being sent A 3 17 2 Response data Table A 32 RD STATUS Response Table Parameters Description
30. Enable disable tests Enable disable boot devices Change IP addresses Ping test Toggle ROM monitor debugger Toggle automatic menu Display configuration Save changes to configuration Set baud rate for sl boot Exit menu and continue O O O gt Q N P gt I Selection of 0 causes evaluation board to be loaded Previous arrangements must have been made to place the new ROM Monitor image for ex usr osopen PLATFORM openbios lib rom 13 img in the place where bootp expects to find it for ex boot img Booting from ENET Ethernet Sending bootp request Loading file usr osopen PLATFORM samples boot img Sending tftp boot request Transfer Complete Loaded successfully Entry point at 0x10320 following information is from the ROM Monitor update program 4XX Evaluation Kit FLASH Update ROM Monitor Version 1 3 The universally administered hardware address for the Ethernet controller is kept in the flash ROM and is displayed here Do not change this value for normal ROM Monitor updates Network Address 1000abcdef55 Do you wish to change Network Address or Heed the following warning The ROM Monitor image could be 401 EVB Sample Applications 8 3 rendered unusable and the board useless until the flash ROM is replaced WARNING You are about to re program your ROM Monitor FLASH image Do
31. Table D 1 401 EVB Bill of Materials Continued Ref Des C5 C7 C10 C11 C13 C16 C18 C20 C23 C30 C40 C41 C45 C48 C49 C52 C53 C58 C77 C78 C84 C88 C90 C92 C94 C95 C97 C100 C102 C104 C106 C113 124 131 C133 C135 C138 C139 C142 C143 C145 C151 C154 C159 C166 C168 C172 C178 C191 C193 C197 C201 C205 C207 C209 C212 C226 C229 C233 C236 C241 C248 C257 C258 C260 C262 C38 C73 C214 C219 C220 C240 Qty 101 Manufac Name AVX KYOCERA AVX Manufac Part 08053E104MAT2A 08055A100JAT2A 08055C222KAT2A JEDEC Type 5 0805 5 0805 5 0805 Part Description CAPACITOR CAPACITOR CAPACITOR CAPACITOR 220PF 5 03G9606 C61 C63 C65 C66 C103 C105 C110 C118 C119 C211 C215 C218 C232 KYOCERA 08055A221JAT2A 5 0805 CAPACITOR Table 0 1 401 EVB Bill of Materials Continued Ref Manufac Part Nam Par Manufac Par EDEC T Part Description ame art Des Qty Name anufac Part J C_Type art Descriptio CAPACITOR 470PF 5 41F0311 C148 C149 2 AVX 08055A471JAT2A SMC0805 CAPACITOR CAPACITOR DO_NOT_POP C153 C155 10 5 0805 CAPACITOR 20 C160 C162 C164 C169 C224 C225 C239 CONNBNC_DIP BASE XXXXXXX J23 1 AMP 227161 9 CONN BNC AMP22 BNC RECTANGULAR 7677 1 JACK CONNPARAL DIP BASE 90X8089 5 1 747846 4 CONN PI
32. c Cnitrl c 7 26 401 EVB User s Manual Back at waterdeep C Kermit Set speed 38400 dev tty0 38400 bps C Kermit gt set file type bin You can now load the file C Kermit gt send usr_samp img SF Type escape character followed by X to cancel file CR to resend current packet Z to cancel group A for status report to send Error packet Ctrl C to quit immediately Sending usr_samp img gt USR_SAMP IMG Size 164864 Type binary ZB When loading is completed you must change the baud rate back to 9600 bps before continuing C Kermit gt set speed 9600 dev tty0 9600 bps After setting the baud rate back to 9600 bps re connect to your terminal emulator and press enter to complete the down load C Kermit gt con Connecting to dev tty0 speed 9600 The escape character is Ctrl ASCII 28 FS Type the escape character followed by C to get back or followed by to see other options Loaded successfully Entry point at 0x22f20 Hello 401 user Your ROM Monitor version is 2 1 Your 604 Evaluation Board has 33554432 bytes of DRAM installed Your Ethernet controller s network address is 1000abcdef55 usr samp done 401 EVB ROM Monitor 7 27 Assuming the S1 boot baud rate has been set to 38400 and option 0 has been selected to exit the ROM Monitor menu and initiate a load Windows 95 HyperTerminal users can initiate the kermit binary file transfer by performing the following steps Selec
33. instructs the TIP command to terminate the connection and exit sends a break to the remote system sscript starts recording of transmissions made by the remote system Recordings are made in the default tip record file in the user s current directory S script stops recording of transmissions made by the remote system Note If a terminal emulator other than TIP is used it must be configured for 9600 baud eight bits per character one stop bit and no parity 5 11 2 PC Terminal Emulation Once all the host to EVB connections have been properly made and power has been supplied to the board the Windows Terminal program can be used as a terminal emulator to support communications with the ROM Monitor To do this Windows Program Manager select Accessories select Terminal select Settings 5 26 401 EVB User s Manual select Communications select COMI or the appropriate COM port used for S1 serial port set up select Baud Rate 9600 Data Bits 8 Stop Bits 1 Parity None select Flow Control Xon Xoff select OK After resetting the board the ROM Monitor menu should appear in the Terminal window If it does not check for proper connectivity between the host and the board If the ROM Monitor menu still does not appear insure that the COM port has been properly enabled This can be done by using the configuration utility on the host PC see your PC documentation for more details Upon exiting
34. no np ACCESSO x x X X x X gt ACCESS2 ACCESSO x X x X x 0 gt ACCESS3 ACCESSO X X X X x 1 gt ACCESS2 ACCESSO X 0X4 X2 X x X gt ACCESS1 ACCESS1 x x X X x X gt ACCESS2 ACCESS2 X X X X x X gt ACCESS3 ACCESS3 x x x x 0 x gt IDLE ACCESS3 x x X X 0 x gt ACCESS4 ACCESS3 X XQ X X 1 x gt ACCESS3 ACCESS3 X X X X 1 x gt ACCESS4 C 38 401 EVB User s Manual x x x x nf x x x x ng x x x ni x x x x nj x x x x nk x x x x nl x x x x x x x x x x x x x x nn ACCESS4 gt IDLE ACCESS4 gt IDLE ACCESS4 gt ACCESS5 ACCESS4 gt ACCESS4 555 gt IDLE 555 gt ACCESS4 ACCESS5 gt ACCESS6 na x x x x x x x nb x x x x nc nd ne no np x x 0 x x x 0 x x x 0 x x x 1 x x x x x x x x x x x x x x x x x nf x x x x ng x x x x x x x x x ni x x x x nj x x x nk x x nl x x x x x x x nm x x x x C 39 nn ACCESS6 gt IDLE ACCESS6 gt ACCESS ACCE
35. ppcLib a ppMfdac1 sets the value of the appropriate Data Address Compare register the DAC1 register contains addresses for which debug events may be taken depending on the values set in the DBCR None Set the value of DAC1to address 0 0 pecMfdacl 0x0 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMtdbcr include lt ppcLib h gt void ppcMtdbcr unsigned long dbcr_value ppcLib a ppcMtdbcr sets the value of the debug control register to the specified value The DBCR is used to enable debug events reset the processor control timer operations during debug events and set the debug mode of the processor WARNING Enabling bits 0 and 1 can cause unexpected results Enabling bits 2 and 3 will cause a processor reset to occur The DBCR is designed to be used by development tools not applications File lt ppcLib h gt has several defined constants for the DBCR None Enable external debug mode ppcMtdbcr DBCR Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 89 ppcMtdbsr Synopsis Library Description Errors Example Attributes References 10 90 include lt ppcLib h gt void ppcMtdbs
36. region control registers BRCRO BRCR7 ppcMfcdbcr Returns the value of the Cache Debug 10 59 Control Register CDBCR ppcMfdbcr Returns the value of the processor debug 10 60 control register ppcMfdbsr Returns the value of the processor debug 10 61 status register DBSR ppcMfdccr Returns the value of the Data Cache 10 62 Cacheability Register DCCR ppcMfdcewr Returns the value of the Data Cache Write 10 63 thru Register DCWR ppcMfdear Returns the value of the Data Exception 10 64 Address Register DEAR ppcMfesr Returns the value of the exception syn 10 65 drome register ESR ppcMfevpr Returns the value of the exception vector 10 66 prefix register EVPR ppcMfgpr1 Returns the current value of GPR 1 10 67 401 EVB Function Reference 10 5 Table 10 1 Functions Specific to 401 EVB Function or Macro Description Page ppcMfgpr2 Returns the current value of GPR 2 10 68 ppcMfiact1 Returns the value of the instruction 10 69 address compare register 1 IAC1 ppcMficcr Returns the value of the instruction cache 10 70 cacheability register ICCR ppcMficdbdr Returns the value of the Instruction Cache 10 71 Debug Data Register ICDBDR ppcMfiocr Returns the current value of the Input Out 10 72 put configuration Register IOCR ppcMfmsr Returns the value of the MSR 10 73 ppcMfpit Returns the value of the Programmable 10 74 I
37. select device to change gt 4 52 boot is disabled Device Configuration Power On Test Devices 000 Disabled System Memory RAM 001 Enabled Ethernet ENET 004 Enabled Serial Port 2 S2 Boot Sources 001 Enabled Ethernet ENET Message describing change 401 EVB ROM Monitor 7 13 local 7 1 1 5 remote 7 1 1 4 hwaddr 1000abcdef55 004 Disabled Serial Port 2 S2 local 8 1 1 5 remote 8 1 1 4 hwaddr fffffffffffft 005 Enabled Serial Port 1 S1 Baud 9600 Enable disable tests Enable disable boot devices Change IP addresses Ping test Toggle ROM monitor debugger Toggle automatic menu Display configuration Save changes to configuration Set baud rate for sl boot Exit menu and continue O BRUNE 1 When the user selects option 0 and exits from the monitor menu the monitor attempts a boot of the application image on the host using the enabled boot sources in the order they are listed In the above example a boot would be attempted over Ethernet since it is the first boot source enabled If more than one boot source is enabled an attempt to boot over the first enabled device will be made If that attempt fails a boot over the next enabled device is attempted 7 14 401 EVB User s Manual 7 6 4 Changing IP Addresses Option 3 in the main menu allows users to change the IP addresses for the EVB and the host workstation These addresses are used for bootp processing de
38. 13 When the system prompts you for a new volume move to the first window Type eject if the system did not automatically eject the diskette Insert the next diskette and type volcheck 14 Move to the second window and type the name of the diskette drive vol dev rdisketteO unlabeled to continue the process 15 If prompted for more diskettes repeat the previous two steps When finished type eject to remove the final diskette 16 Return to the first window and verify that the following files are installed under the usr directory EVB tar Z EVB hcppc tar Z 17 Run the following commands to unpack and install the files zcat EVB tar Z tar xvf zcat EVB_heppc tar Z tar xvf Installation for Solaris is complete The tar Z files may be removed to recover space The IBM High C C Compiler is installed in the usr highcppc directory tree and the EVB software support package in the usr osopen directory tree It may be necessary to change ownership of these directories their subdirectories and their contents if other users will require access to them The usr highcppc bin directory contains the files required for the IBM High C C Compiler Those files include asppc Assembler for assembler language programs ldppc ELF linker binder to build applications to be run on the EVB heppc High C C compiler for C programs arppc ELF library archiver The readme file under the usr highcppc directory contains t
39. ACK amp WE 4 D WE 4 PRD F646 read time data transfer data control signals SAB ENET CS amp WE 4 WE amp ACK SBA ENET CS amp OE amp ACK C 50 401 EVB User s Manual 401GF CRITICAL INTERRUPT GENERATION FOR PUSHBUTTON amp PCI SERR Power ON critical interrupt is bypassed INT clk INT reset CLK1 RESET CASE INT IS WHEN INTS2 gt 401_CRIT_INT VCC IF PUSH_CRIT_NODE THEN INT press ELSIF PCI_SERR THEN INT error ELSE INT INTS2 END IF WHEN INTS3 gt 401_CRIT_INT GND IF INT_REMOVE_NODE THEN INT INTS3 Checking for push button INTS5 Checking for pci System INTS4 Checking for interrupt remove condition ELSE INT INTS3 END IF INTS4 gt 401_CRIT_INT VCC IF PUSH CRIT NODE THEN INT WHEN release ELSE INT END IF INTS4 WHEN INTS5 gt 401_CRIT_INT GND IF INT_REMOVE_NODE THEN INT INTS2 Checking for Push button INTS6 Checking for interrupt remove condition ELSE INT INTS5 END IF INTS6 gt 401 CRIT INT VCC IF PCI SERR THEN INT ELSE INT INTS6 END IF WHEN END CASE 401GF READY GENERATION 1 401 RDY TRI S READY SR INTS2 C 51 STSR clk CLK1 STSR reset RESET STRDY clk CLK1 STRDY reset RESET STSOE clk CLK1 STSOE reset RESET STWEO clk CLK21 STWEO reset RESET STWEl clk CLK21 STW
40. After updating the autexec bat file reboot the system to execute the changes From Windows start Trumpet Winsock by double clicking on the Trumpet Win sock icon in the Trumpet Winsock Files program group Host Configuration 4 11 7 If setup was bypassed during installation your connection should fail A Trum pet Winsock window comes up indicating your connection status Select Setup from the File menu to open the Setup dialog 8 Setthe IP address field to the IP address of the PC host 7 1 1 4 is suggested to maintain consistency with this document 9 Select Packet driver and set the Vector to 60 Netmask to 255 255 240 0 and Gateway to 0 0 0 0 10 Select OK 11 Edit the hosts file found in the installed Trumpet directory to include both the PC host IP address and the board IP address For example 7 1 1 4 local enet 7 1 1 5 enet After entering all the information you may need to restart Trumpet Winsock for the network setup to take effect Prior to exiting Windows we recommend terminating Trumpet Winsock close the application If you do not follow this recommendation subsequent Trumpet starts may fail If this occurs you will need to reboot your system 4 2 2 2 Ethernet Setup Windows 95 A compliant TCP IP package comes with Windows 95 so no TCP IP package needs to be installed If you haven t done so already install the ethernet card on the host system according to the directions that came with
41. D SLA2 SLA2 q SLA3 clk CLK1 SLA3 clrn RESET ADS amp LA3 amp RESET SLA3 prn ADS amp LA3 amp RESET SLA3 d SLA3 amp SLA2 4 SLA3 amp SLA2 amp S READY S READY amp SLA3 D SLA3 SLA3 q C 49 SYNCHRONIZATION OF PUSH BUTTON CRITICAL INTERRUPT TO PROCESSOR CLOCK PUSH CRIT NODE clk CLK1 PUSH CRIT NODE PRN RESET PUSH CRIT NODE D PUSH CRIT INT INT REMOVE NODE clk CLK1 INT REMOVE NODE CLRN RESET INT REMOVE NODE D INT REMOVE Serial EEPROM read write port Control Signals SerE2 OE OE amp SerE2 CS SerE2 WE WE amp SerE2 CS Delayed Write enable Generation D WE clk CLK1 D WE PRN RESET D WE D WE Ethernet Remote DMA Latch Control Signals BEO is address AO in 8 bit bus WACK 401 RDY amp W R amp PRQ amp LATCH CS amp BEO RACK 401 RDY amp W_ R amp PRQ amp LATCH CS amp BEO R DMA WR PRQ amp WE amp LATCH CS amp BEO Direction signal will be LOW 1 401GF remote DMA read 2 Ethernet register read 646 DIR PRQ amp OE amp LATCH CS amp BEO ENET CS amp OE amp ACK OUTPUT enable will be LOW 1 401GF remote DMA read 2 Ethernet register read write 3 646 latched data read by ethernet controller 646 OE PRQ amp OE amp LATCH CS amp BEO ENET CS amp OE amp ACK ENET CS
42. DECREMENT THE COUNTER FOR LCD_EN ACTIVE TIME WHEN I0S11 gt LCD_EN VCC READY2 VCC IF COUNTER QO amp COUNTER Q1 amp COUNTER Q2 amp COUNTER Q3 THEN IOSL 10812 ELSE IOSL 10811 END IF WHEN I0S12 gt IF W_ R THEN READY2 GND C 10 401 EVB User s Manual ELSE READY2 VCC END IF LCD EN VCC IOSL IOS13 WHEN IOS13 gt IF W R THEN READY2 VCC ELSE READY2 GND END IF LCD EN GND IOSL 10501 END CASE State Machine for SIO amp Ethernet Controller IOSE clk GLOBAL CLK1 IOSE reset RESET CASE IOSE IS WHEN IOSO2 gt READY3 VCC OE3 VCC WE3 VCC If Cycle is for SIO or ethernet goes from 10502 to 10532 IF SER1_CS SER2 CS PAR CS LATCH CS SerE2 CS THEN IOSE 10532 ELSE IOSE IOS02 END IF WHEN IOS32 gt READY3 VCC If cycle is for serial or par ports skips 1 wait state SER1 CS 4 SER2 CS 4 PAR CS THEN IOSE IOS34 Responds to Ethernet Remote DMA Serial EEPROM and Skips 2 wait states ELSIF LATCH CS 4 SerE2 CS THEN IOSE IOS35 ELSE IOSE I0S32 C 11 END IF IF W R THEN OE3 GND WE3 VCC ELSE OE3 VCC WE3 GND END IF WHEN I0S34 gt IOSE IOS35 READY3 VCC IF W_ R THEN OE3 GND WE3 VCC ELSE 0 VCC WE3 GND END IF WHEN IOS35 gt READY3 GND IF BLAST THEN Checks for the end of cy
43. OE1 VCC WE1 GND END IF C 8 401 EVB User s Manual WHEN 1055 gt IOSF IOS6 READY1 VCC IF W_ R THEN OE1 GND WE1 VCC ELSE OE1 VCC WE1 GND END IF WHEN IOS6 gt IOSF 1057 READY1 VCC IF W_ R THEN OE1 GND WE1 VCC ELSE OE1 VCC WE1 GND END IF WHEN 1057 gt IOSF I0S8 READY1 VCC IF W_ R THEN OE1 GND WE1 VCC ELSE OE1 VCC WE1 GND END IF WHEN IOS8 gt IF BLAST THEN Checks for end of the cycle IOSF 0500 ELSE IOSF 1081 END IF READY1 GND IF W_ R THEN OE1 GND WE1 VCC ELSE OE1 VCC WE1 VCC END IF C 9 END CASE State Machine for LCD to generate Enable and Ready Signals Note This doesn t support Burst Cycles The limitation is that only single read write possible Burst access on LCD address space causes the system to hang IOSL clk GLOBAL CLK1 IOSL reset RESET CASE IOSL IS WHEN IOSO1 gt If Cycle is for LCD goes from 10501 to 1059 IF LCD CS THEN IOSL IOS9 ELSE IOSL 10501 END IF LCD EN GND READY2 VCC LOAD THE COUNTER WITH 1111 WHEN IOS9 gt LCD_EN GND READY2 VCC IOSL IOS10 DECREMENT THE COUNTER FOR LCD_EN INACTIVE TIME WHEN I0S10 gt LCD_EN GND READY2 VCC IF COUNTER QO amp COUNTER Q1 amp COUNTER Q2 amp COUNTER Q3 THEN IOSL 10811 ELSE IOSL IOS10 END IF
44. QA4 amp CASPIPO k12 QA4 amp CASPIPO amp BE3 4 0 4 amp CASPIPO kk CLK CLK2 C 29 kk RESET TABLE CURRENT kk k1 k1 END TABLE RESET STATE INPUT1 INPUT2 k11 k12 1 x 0 x x 1 x 0 NEXT STATE gt kk gt k0 gt kl gt kl gt k0 kkkkkkkkkkkkkkkkkkkkk kkkkkkkkkkkkkkkkk kkkkkkkkkkkkk kkkk kkkk kkk S CASPIPE kkkkkkkkkkkkkkkkkkkkkkkkk kkkkkkkkkkkkk kkkkk kkkkk kkkkkkkkk kkkkk kkk S 111 112 A 11 CLK 11 TABLE CURRENT 11 11 C 30 CCESS3 amp XTEND amp ACCESS5 ACCESSA ACCESS3 ACCESS5 ACCESS7 DCLK1 amp SXTEND amp amp amp amp amp amp DCLK1 amp DCLK1 DCLK1 amp DCLK1 amp DCLK1 amp R XTEND DCLK1 amp BLAST IW R amp BLAST amp W R HLDACK amp W R W R amp HLDACK W R amp HLDACK REFRESH2 amp DCLK1 ACCESS3 ACCESS5 ACCESS7 CCESS1 amp ACCESS3 ACCESS5 ACCESS2 ACCESS6 amp amp amp DCLK1 DCLK1 DCLK1 W R amp amp amp amp amp R amp R amp W R amp W R amp REFRESHO amp DCLK1 ACCESS2 amp W R amp ACCESSA amp W R amp ACCESS6 amp W R amp CLK2 R
45. SRAM WE1 SRAM WE2 SRAM 401 RDY 401 CRIT INT D SLA2 D SLA3 Output Pins for Ethernet ack WACK RACK R DMA WR 646 OE 646 DIR SAB SBA OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT BIDIR OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT SRAM OUTPUT ENABLE CONTROL SRAM FIRST BYTE WRITE CONTROL SRAM SECOND BYTE WRITE CONTROL SRAM THIRD BYTE WRITE CONTROL SRAM FOURTH BYTE WRITE CONTROL READY TO 401GF Critical Interrupt to the Processor 401GF 9 go de de oe oe oe and DMA Latch control Ethernet Write acknowledge Ethernet Read acknowledge System Remote DMA write Remote DMA Latch F646 output control signal Remote DMA Latch F646 data path direction control signal F646 ehternet latch Control signal to Write Enet registers F646 ehternet latch Control signal to Read Enet registers Serial EEPROM Read Write port Control Signals SerE2 OE SerE2 WE C 46 OUTPUT OUTPUT Serial EEPROM Read Port Control Serial EEPROM Write Port Control 401 EVB User s Manual As a host Adapter PLX 9060 has the highest priority SQUALL has the second highest and next is 401GF As a stand alone card arbitration is for 401GF SQUALL module and Two PCI agents The 401GF has the highest priority in all the agents SQUALL has the second highest priority and then PCISLOT1 and
46. addr ppcLib a ppcDcbf copies the cache block at the effective address specified by addr back to main storage if the block resides in cache and has been modified with respect to main storage and then invalidates the cache block Effectively this function acts like ppcDcbst followed by ppcDcbi None Flush the cache line at the effective address X 1000 to main storage and then invalidate the cache line You might do this in preparation for a DMA slave transfer ppcDcbf void 0x1000 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes ppcDcbst p 10 49 ppcDcbi p 10 48 ppcDcbz 10 50 PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 47 ppcDcbi Synopsis Library Description Errors Example Attributes References 10 48 include lt ppcLib h gt void ppcDcbi void addr ppcLib a ppcDcbi invalidates the cache block containing addr discarding any modified contents if the block is valid in cache None Invalidate the cache line beginning with 0x3000 This might be done before reading an area of storage updated by a DMA transfer ppcDcbi void 0x3000 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes ppcDcbst p 10 49 ppcDcbi p 10 48 ppcDcbz 10 50 PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example At
47. clockLib init function 10 27 connecting the EVB hardware 5 21 connectors ethernet 5 4 expansion interface 5 8 power 5 14 RISCTrace 5 7 RISCWatch 400 JTAG 5 7 serial port 5 3 conventions used xxi highlighting xxi numeric xxi syntax diagrams xxii D dbg ioLib init function 10 28 dcache flush function 10 29 dcache invalidate function 10 30 Debug Support Library 9 2 Device and File Support Library 9 2 device drivers asynchronous 9 7 Ethernet 9 13 DOS File System Support Library 9 2 driver install async init 9 7 Dynamic Loader Library 9 2 E enet disable ipinput function 10 31 enet enable ipinput function 10 32 enet native attach function 10 33 enet packet function 10 35 enet send packet function 10 36 enetLib a 9 5 Ethernet 9 13 Ethernet Device Driver Installation 9 13 ext int disable function 10 37 ext int enable function 10 38 ext int install function 10 39 ext int query function 10 40 F Federal Communications Commission FCC Statement xxiii File Transfer Protocol Support Library 9 2 Flash update utility 7 30 Floating Point Emulation Library 9 2 Floating Point Library 9 2 fpemul init function 10 41 functions async init 10 10 biosenet attach 10 11 clock set 10 13 X 1 clockchip get 10 14 10 19 clockchip get calibration 10 15 10 20 clockchip nvram read 10 16 10 21 clockchip nvram write 10 17 10 22 clockchip set 10 14 10 15 10 18 10
48. dev s0 CHRTYPE devhandle 1 128 128 S1DB PARMS For device installation devhandle is the value obtained from the driver install Device type CHRTYPE is defined in lt sys devDrivr h gt Additional parameters passed in the device install call are as follows Parameter Meaning Fourth Parameter Port number to be installed 1 Fifth Parameter Size of write buffer Sixth Parameter Size of read buffer Seventh Parameter Input clock for the divisor Eight Parameter UART base register address 0x7E000000 or 0x7E000080 Ninth Parameter UART register address delta always 1 Tenth Parameter Interrupt IRQ MIN event IRQ MAX 0 event 15 These are positional parameters Note Write and read buffer sizes indicate number of characters that can be buffered in the device driver Upon successful installation device install returns 0 otherwise 1 is returned When the device is installed error reporting for the device is turned off and xon xoff pacing is enabled For more information on device install refer to the OS Open Programmer s Reference 9 8 401 EVB User s Manual 9 3 1 3 Opening Asynchronous Communication Ports After the device is installed the open system call can be used to open a particular device Following is an example of the open system call used against the asynchronous port fdl open dev s0 O_RDWR asyncParityNone asyncParityOdd asyncStopBitsl asyncDataBits8 9600 Additional pa
49. indicates positive calibration 0 indicates negative calibration The clockLib library must be initialized by calling clockLib init prior to calling this function EINVAL Library not initialized Async Safe No Cancel Safe Yes Interrupt Handler Safe Yes e set calibration p 10 24 clockLib init p 10 27 401 EVB Function Reference 10 15 clockchip nvram read Synopsis Library Description Errors Attributes References 10 16 include lt clockLib h gt int clockchip_nvram_read int index unsigned char buffer int length clockLib a clockchip nvram read reads non volatile RAM from the clock chip index specifies the starting byte of NVRAM buffer points to the location where the bytes will be copied to and ength specifies the maximum number of bytes to read clockchip nvram read returns the actual number of bytes read The clockLib library must be initialized by calling clockLib init prior to calling this function Note index must be within the range specified during clockLib init EINVAL Library not initialized or index out of range Async Safe No Cancel Safe Yes Interrupt Handler Safe Yes clockchip nvram write p 10 17 clockLib_init p 10 27 401 EVB User s Manual clockchip nvram write Synopsis include lt clockLib h gt int clockchip nvram write int index unsigned char buffer int length Library clockLib a Description clockc
50. number integer can not be equal to 1 OxFFFF FFFF or 0 msg data sizeof msg rpid Length of additional data being sent A 32 401 EVB User s Manual ROM Monitor Load Format This appendix presents the ROM Monitor load format requirements B 1 Overview The ROM Monitor load format is designed to permit the specification of multiple text and data sections The format consists of a linked list of sections of specified types prefixed by a small boot header boot block that specifies the initial target of the image and the entry point The boot block header is placed at the front of the image by eimgbld or nimgbld The ROM Monitor does no relocation It is assumed that the destination addresses for the individual sections are the same ones specified during the application s linkage The info block structure is reserved in the bootstrap program bootlLib s nimgbld or eimgbld patch in the values within the info block structure for bootLib to use at run time The bootstrap program processes the sections back to front that is from the end of the image to the beginning This is to avoid destructive overlap during the processing of typical images The sections are preceded by header blocks which identify the section types The headers are linked together in a doubly linked list B 2 Section Types There are three basic section types Generally they can occur in the image in any order but are usually arranged
51. process_id Numeric process ID on the target sys tem msg data sizeof msg rpid Length of additional data being sent A 3 10 2 Response data Table A 20 RD READ D Response Table Parameters msg retcode RD COM ERR 1001 Description Communication error occurred msg retcode RD OK 0 Successful completion msg retcode EIO 5 Debugged process can not access given address msg retcode ESRCH 3 The msg pid parameter identifies a pro cess that does not exist msg data data Data read at location pointed to by address 1 if error msg data len 0 Length of additional data being sent A 15 A 3 11 RD READ DCR 110 This request reads data directly from one of the DCRs not the process s copy All DCR registers are accessible through this message request The sender is responsible for supplying valid DCR values no error checking is performed on this field A 3 11 1 Request data A 3 11 2 Response data A 16 401 EVB User s Manual A 3 12 RD READ GPR 11 This request returns the content of one of the general purpose or special purpose registers of the debugged process Valid registers are defined in dbg h and sys reg h Not all defined registers are supported for all environments A 3 12 1 Request data Table A 21 RD READ GPR Request Table Parameters msg request RD READ GPR Description Requested API functi
52. the IP address used in the enetc entry defines the IP address of the board for the Ethernet connection If the suggested bootptab entries are used 7 1 1 5 would be the board s Ethernet IP address Take note of the board s IP addresses since they must be made known to the ROM Monitor The services file no file extention must also exist in the ETC directory set in the autoexec bat file It must be updated with the port and protocol information for the bootpd and tftpd servers To use the servers provided with this package the following entries must be included in the services file bootps 67 UDP bootpc 68 UDP tftp 69 UDP For the update to take effect TCP IP needs to be re started This may require a re boot of the system and or a restart of the TCP IP package After that the bootpd and tftpd servers are ready for use 7 3 2 1 Automatic startup for Windows 3 1 and Windows NT 3 51 Users may find it convenient to have the bootpd and tftpd servers brought up automatically when entering Windows To do this for Windows 3 1 the bootpd and tftpd servers should be added to your Windows environment Startup window using the following procedure With Windows running select the Program Manager and open the Startup window Using the File pulldown menu on the Program Manager select New to bring up a New Program Object window From the New Program Object window select Program Item and OK to open the Pro gram Item Properties window The
53. to hit the Enter key or CTRL D before entering these escape sequences win help for TIP e CTRL D instructs the TIP command to terminate the connection and exit sends a break to the remote system Sscript starts recording of transmissions made by the remote system Recordings are made in the default tip record file in the user s current directory 401 EVB Connectors 5 27 S script stops recording of transmissions made by the remote system Note If a terminal emulator other than is used it must be configured for 9600 baud eight bits per character one stop bit and no parity 5 12 Booting the PowerPC 401 on the EVB When the connectors have been installed and power is applied to the 401 EVB pressing the Reset switch causes the 401 and the communications controllers to reset After the ROM monitor initializes the 401 EVB the monitor menu is displayed if a properly configured terminal or terminal emulator is attached to serial port 1 J6 of the EVB Details of ROM Monitor operation are provided in a later chapter 5 28 401 EVB User s Manual 401 EVB Hardware Features of the 401 EVB include 1 Memory e Contiguous addressing DRAM two SIMM sockets up to 64MB e 4 1 1 1 accesses at 25 MHz bus speed Two 512KB flash e SRAM 512KB socketed e 2 1 1 1 accesses at 25 MHz bus speed e Supports development of software for clock stopped states 2 Battery backed real time clock
54. tt RESET RESET TABLE C 32 401 EVB User s Manual CURRENT STATE INPUT1 INPUT2 NEXT STATE tt t11 t12 gt tt t1 1 x gt t0 t1 0 x gt tl to x 1 gt tl to x 0 gt t0 END TABLE kkkkkkkkkkkkkkkkkkkkkkkkk kkkkk kkkkk kkkkk kkkkk kkkkkkkkkkkkk kkkk kkk 9 REFING 9 kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk cc11 IDLE cc12 REFRESHO ccc CLK CLK1 ccc RESET RESET TABLE CURRENT STATE INPUT1 INPUT2 NEXT STATE ccc 11 12 gt 1 1 gt 0 1 0 gt cccl 0 1 gt cccl 0 0 gt 0 END TABLE kkkkkkkkkkkkkkkkkkkkkkkkk kkkkk kkkkkkkkkkkkkkkkkkkkkkkkk kkkkkkkk 9 ACC_PEND kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk S ge 11 ACCESS3 p12 ADS amp DRAMADDR pp CLK CLK1 pp RESET RESET TABLE CURRENT STATE INPUT1 INPUT2 NEXT STATE PP p11 p12 gt pp C 33 pl 1 x gt p0 pl 0 x gt pl po x 1 gt pl po x 0 gt p0 END TABLE kkkkkkkkkkkkkkkkkkkkkkkkk kkkkk kkkkkkkkkkkkkkkkk kkkkkkkkk kkkkk kkk 9 RASE KKK KKK ke ke e e e e 411 ACCESS3 amp DCLK1 amp LA2 6 BLAST amp XTEND ACCESSA amp DCLK1 amp W R amp BLAST amp XTEND 554 amp DCLK1 amp W R amp BLAST amp HLDACK 555 amp DCLK1
55. updating the MSR ppcSync Causes the processor to wait until all data 10 112 cache lines scheduled to be written to main storage have actually been written 10 8 401 EVB User s Manual Table 10 1 Functions Specific to 401 EVB Function or Macro Description Page processor speed Returns the internal clock speed of the 403 10 113 processor sidbprintf A version of printf that may be used 10 114 before I O has been established s2dbprintf A version of printf that may be used 10 115 before I O has been established for serial port 2 timertick install Installs and starts the timer tick handler 10 116 timertick_remove Removes the timer tick handler 10 117 vs1 dbprintf A version of printf that uses polled writes 10 118 no interrupts and may be used before has been established and accepts a va list as a parameter instead of a variable num ber of parameters 401 EVB Function Reference 10 9 async init Synopsis Library Description Errors Attributes References 10 10 include lt sys asyncLib h gt int driver_install int devhandle async_init asyncLib a asyncLib a is the asynchronous device driver that supports the asynchronous communication port on the 401 EVB platform asyncLib a is installed by calling driver_install with devhandle as the first parameter and async_init as the second parameter None Async Safe No Cancel Safe Ye
56. 16 Hesponse data dar ime rere Rr ER ER RR RENE CEPR RE ERN A 16 Contents ix FADE RSPR Send LL A 17 Request oe EC eevee Cees A 17 Response data oer Ur erae ee A 17 RD READ GPR MULT Z T iet pte eee etes A 18 E Pene REED E E A 18 Hesporise data Eee een ee A 18 RDSREAD I s s a Eques A 19 Request dala Eau A 19 RESPONSE alay ERE qr teret A 19 RD READ I MULT ret eode eee eerte tue A 20 Request o epe e e pe tote eee Re A 20 Response ae eee e eee A 20 RD READ SPR 15 ine ERA EP eR A 21 Request ox ERR RE A 21 Response data x eret e A 21 RD STATUS 114 oco ete ento d eco ee eade e ete e A 22 Request data ut ep rer e ette A 22 Response data t Er e e Re EE MERDA RUD A 22 RD STOP APPL TTI ht ree e Uere A 23 Request Cere iie eee A 23 Response data egregie A 23 RD WALT re ont e e e tette o tuer A 24 Request dala E E e eee e eee ee A 24 R espons dalam ete e C t ee Pe Re eet e ion A 24 WRITE BLOCK 19 1 5 12 515 1e rene e ERI Eds A 25 Request data t RE aede Sep Ut dee Et oe A 25 Hespornse data eee eee A 25 RD WRITE D 5 ci Holt obs EROR ede A 26 Request data eu nct natin cete e reete pete A 26 Response data tuere tene e e An ene ee iere eee Ee ee A 26 RD WRITE DGR 112 eere
57. 19 10 20 10 27 clockchip set calibration 10 24 clockchip start 10 25 clockchip stop 10 26 clockLib init 10 27 dbg ioLib init 10 28 dcache flush 10 29 dcache invalidate 10 30 enet disable ipinput 10 31 enet enable ipinput 10 32 enet native attach 10 33 enet recv packet 10 35 enet send packet 10 36 ext int disable 10 37 ext int enable 10 38 ext int install 10 39 ext int query 10 40 fpemul init 10 41 ioLib init 10 42 init 10 43 ppcAbend 10 44 ppcAndMsr 10 45 ppcCntlzw 10 46 ppcDcbf 10 47 ppcDcbi 10 48 ppcDcbst 10 49 ppcDcbz 10 50 ppcDflush 10 51 ppcEieio 10 52 ppcHalt 10 53 ppclcbi 10 54 ppclsync 10 55 ppcMfbear 10 56 ppcMfbesr0 10 57 ppcMfbrcr0 ppcMfbrcr7 10 58 ppcMfcdbcr 10 59 ppcMfdbcr 10 60 ppcMfdbsr 10 61 ppcMfdccr 10 62 ppcMfdewr 10 63 2 401 EVB User s Manual ppcMfdear 10 64 ppcMfesr 10 65 ppcMfevpr 10 66 ppcMfgpr1 10 67 ppcMfgpr2 10 68 ppcMfiac1 10 69 ppcMficcr 10 70 ppcMficdbdr 10 71 ppcMfiocr 10 72 ppcMfmsr 10 73 ppcMfpit 10 74 ppcMfpmcr0 10 75 ppcMfpvr 10 76 ppcMfsgr 10 77 ppcMfsler 10 78 II ppcMfsprg1 ppcMfsprg3 10 79 ppcMfsprg1 ppcMtsprg3 10 103 ppcMfsrrO 10 80 ppcMfsrr1 10 81 ppcMfsrr2 10 82 ppcMfsrr3 10 83 ppcMftb 10 84 ppcMftsr 10 85 ppcMtbrcr0 ppcMtbrcr7 10 86 ppcMtcdbcr 1
58. 216 0 217 x 1 217 0 218 x 1 218 x 0 219 x 1 219 x 0 2110 x 1 2110 X 0 2111 1 2111 x 0 2112 x 1 2112 x 0 2113 x 1 2113 x 0 2114 x 1 2114 x 0 2115 1 2115 x 0 END TABLE kkkkkkkkkkkkkkkkkkkkk kkkkk kkkkkkkkkkkkk kkkkk kkkkk kkkkk kkkkk kkkkk kkk 9 REFRESH UPPER COUNTER kkkkkkkkkkkkkkkkkkkkkkkkk kkkkk kkkkk kkkkkkkkk kkkkk kkkkk kkkkkkkkk kkk S w11 710 w12 QA4 w13 25 33sw 14 s5mhz ww CLK CLK1 ww RESET RESET TABLE CURRENT STATE CURRENT INPUTs ww w11 w12 W13 w14 220 x 1 0 0 220 x 0 x x 220 x 1 1 0 220 1 1 42 401 EVB User s Manual 213 2115 214 2115 215 2115 216 2115 217 2115 218 2115 219 2115 2110 2115 2111 2115 2112 2115 2113 2115 2114 NEXT STATE ww 2215 220 2211 Z21 221 x 1 0 0 gt 7215 221 1 0 gt 720 221 0 0 gt 221 221 x 1 1 0 gt Z211 Z21 x 1 x 1 gt 221 222 x 1 0 0 gt 7215 222 0 gt 221 222 0 0 gt 222 222 1 1 0 gt 7211 222 1 x 1 gt 221 223 x 1 0 0 gt 7215 223 15 0 x x gt 222 223 0 0 x x gt 223 223 x 1 1 0 gt 7211 223 1 X 1 gt 2721 224 x 1 0 0 gt 7215 224 1 0 gt 723 224 0 0 gt 224 2
59. 3 3 Building and Running the timesamp Program The timesamp c program is included as a sample to be built and run on the EVB This program is an example of how to properly time a particular function or benchmark The user must know and define the time base frequency the number of times the time base register is updated per second in the timesamp c to ensure the timing calculations are accurate To build the timesamp program enter the command make timesamp from the command line while in the samples directory The makefile will compile the timesamp c file link the resulting object file with the support libraries and produce the boot file timesamp and the boot image file timesamp img If the suggested bootptab was used then timesamp img must be renamed or copied to boot img in order to be selected by the Rom Monitor load process Select option 0 from the ROM Monitor screen to load and run the image 8 8 401 EVB User s Manual To load using RISCWatch enable the ROM Monitor debugger via option 5 exit the ROM Monitor menu via option 0 start RISCWatch on the host system make sure the RISCWatch environment file is setup for ROM Monitor communications then use the RISCWatch load image command to load the timesamp img file Once successfully loaded issue the attach 42 and logoff commands to return control to the ROM Monitor and initiate the run You should see the following messages or ones like them appear on the ROM Monitor Scree
60. 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcAndMsr include lt ppcLib h gt unsigned long ppcAndMsr unsigned long value ppcLib a ppcAndMsr ANDs value with the contents of the MSR The MSR is updated with the result of the AND operation ppcAndMsr returns the previous contents of the MSR Refer to the lt ppcLib h gt file for the defines of the MSR constants None Disable external interrupts unsigned long orig msr ppcAndMsr ppcMsrEBE Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes ppcOrMsr p 10 111 ppcMtmsr p 10 98 PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 45 ppcCntlzw Synopsis Library Description Errors Example Attributes References 10 46 include lt ppcLib h gt unsigned long ppcCntlzw unsigned long value ppcLib a ppcCntlzw counts consecutive leading zeros in value ppcCntlzw returns the count which ranges from 0 through 32 inclusive None Return count of leading zeros in variable k int k unsigned long k ppcCntlzw 0x0700AA55 k 5 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcDcbf include lt ppcLib h gt void ppcDcbf void
61. 9 21 End of Branch to Branch to start of patch file entry point Patch file consisting of executable instructions Figure 9 2 Detail of patch file placement Figure 9 3 shows the relationship of the various sections in the produced output image End of branch to ep File VPD at end 512 Padding to bring image to size if size is specified Binary image produced by elf2rom Entry point Start of File Figure 9 3 hbranch Output Image Users can find an example of using hbranch in the ROM Monitor s Makefile under osopen PLATFORM openbios 9 22 401 EVB User s Manual 9 5 3 eimgbld The eimgbld tool converts an output file from the linker binder into the format used by the ROM Monitor to load programs from the host onto the evaluation board The ELF file must be an otherwise executable file with the text and data addresses bound at link time Since the entry point of the ELF file will be used by the ROM loader it must point to a suitable bootstrap Syntax eimgbld D P S v b addr m m file o o file ss file x x file input elf Description The program takes the input file input elf which must be the final ELF executable file produced from the build process and converts it into the load format used by the ROM Monitor There are several optional flags that can affect eimbgld processing They are described below D Set debug flag A fl
62. A 11 RD_LDINFO Request Table Parameters msg request RD_LDINFO Description Requested API function msg rpid process_id Process ID from which the loader infor mation is requested msg data_len sizeof msg rpid Length of additional data being sent A 3 6 2 Response data Table A 12 RD LDINFO Response Table Parameters msg retcode RD NOLOAD ERR 1000 Description No loader information is available msg retcode ESRCH 3 The msg pid parameter identifies a pro cess that does not exist msg retcode RD ERR 1001 Communication error occurred msg retcode RD SIZE ERR 1002 Not enough room in the buffer to fit all load information msg retcode RD OK 0 Successful completion msg retcode EIO 5 One of the parameters is incorrect msg buffer 0 Idinfo next Offset to next loader information seg ment See note below msg buffer 1 fd File descriptor for loaded object In remote debug OxFFFF FFFF should be returned this is a space filler A 10 401 EVB User s Manual Table A 12 RD LDINFO Response Table Parameters msg buffer 2 textorig Description Starting text address msg buffer 3 textsize Size of text msg buffer 4 dataorig Starting data address msg buffer 5 datasize Size of data msg buffer 6 char pathname Fully qualified filename of t
63. A21 amp A20 amp A19 amp A18 amp A17 amp A16 15 amp A14 amp A13 amp A12 amp A11 amp 10 6 A9 1 8 amp A7 6 A6 amp A5 amp 4 amp CS FF m m m il 7E00 0000 7E00 0007 SERIAL PORT1 SERI CS A30 6 A29 6 28 6 27 amp A26 amp A25 amp A24 amp A23 amp A22 amp A21 amp A20 amp A19 amp A18 amp A17 amp A16 amp A15 amp A14 amp A13 amp A12 6 11 6 10 6 A9 A8 amp A7 amp A6 amp amp A4 amp A3 amp CS FF 7 00 0080 7 00 0087 SERIAL PORT2 SER2 CS A30 amp 29 amp 28 6 A27 amp A26 amp A25 amp A24 amp A23 amp A22 amp A21 amp A20 amp A19 amp A18 amp A17 amp A16 amp A15 amp A14 amp A13 amp A12 amp 11 amp 10 amp 9 amp A8 amp 7 amp A6 amp A5 amp 4 6 A3 amp CS FF 7 00 0100 7 00 0103 PARALLEL PORT PAR CS 0 6 29 6 28 6 27 amp A26 6 A25 amp A24 6 A23 amp A22 8 21 amp 20 6 19 6 18 amp A17 6 16 6 15 amp 14 amp 13 6 12 6 11 6 10 6 A9 amp 8 6 7 amp 1 6 6 A5 amp A4 6 A3 6 2 6 CS FF 7 01 0000 7 01 1FFF RTC NVRAM RTC CS A30 6 29 6 28 6 A27 6 26 amp A25 amp A24 amp A23 8 A22 8 A21 amp 20 amp A19 amp A18 amp 17 amp A16 amp 15 amp A14 amp A13 amp CS FF 7 00 0400 7 00 0401 INT
64. CLOCK CHIP OSCLR 20 0MHZ 42G3137 Y3 1 EPSON SG615P OSCSMT4 20 00000MHZ 100PPM OSCLR 24 0MHZ 87F5265 Y4 1 EPSON SG615P 24 0MHZ OSCSMT4 8NS PAL_20 DO_NOT_POP XXXXXXX_ J44 1 XXX XXXXXXXX PLCC20 PC16553_SMD BASE 3402684 U48 1 NATIONAL PC16553DV PLCC68 UART PARALLEL CNTL PCI9060 SMD BASE XXXXXXX U52 1 PLXTECH PCI9060 QFP208 5MM PCI BUS INTERFACE 8 d enuen SJeS GAA LOr Table D 1 401 EVB Bill of Materials Continued Ref Manufac P Part Nam Par Manufac Par EDEC T Part Description art Name art Des Qty Name anufac Part J C Type art Descrip PLCC32SKT SMD BASE 10G7624 J3 J18 2 AMP 821977 1 PLCC32SKT 32 PIN PLCC SOCKET RESISTOR 0 596 98F1665 R4 R168 R275 3 ROHM MCR10EZHMOROO 5 0805 RESISTOR RESISTOR 1 0M 5 98F1667 R135 1 PANASONIC ERJ6GVYJ105S 5 0805 RESISTOR RESISTOR 1 2M 5 03G9683 R269 1 PANASONIC ERJ6GVYJ125S 5 0805 RESISTOR RESISTOR 1 5K 5 98F1741 R49 R51 R53 5 ROHM MCR10EZHMJW152 5 0805 RESISTOR R266 RESISTOR 100 5 41F0328 R8 R13 R22 13 PANASONIC ERJ6GYVJ101V 5 0805 RESISTOR R48 R52 R80 R131 R154 R156 R159 R160 R162 R514 6 Part Name RESISTOR 10K 5 RESISTOR 1K 1 RESISTOR 1K 5 Part 41F0337 31F1911 41F0333 Table D 1 401 EVB Bill of Materials Continued Ref Des R9 R28 R29 R46 R55 R59 R64 R66 R73 R75 R76 R79 R84 R95 R107 R109 R111 R1
65. ELCAP 22UF 20 58F1742 C91 C96 2 KEMET T496D226M016AS CAP33UF3SMT CAPACITOR ELCAP 33UF 20 5709281 C8 C14 C31 37 KEMET T491D336M016AS CAP33UF3SMT CAPACITOR C33 C36 C37 C39 C43 C46 C47 C50 C51 C64 C67 C68 C70 C71 C74 C76 C80 C82 C86 C111 C112 C150 C170 C171 C174 C177 C192 C195 C202 C230 EPM7128 SMD BASE XXXXXXX M3 M5 3 ALTERA EPM7128EQC100 7 PART FPGA F_BEAD MID Z 2624864 1 FB5 4 TDK HF50ACB 322513 T SMC1210 FERRITE BEAD GURU_SMD BASE NONE U34 1 100 QFP SOCKET NOT USED EPM7128_SMD BASE SOLDERED DIRECTLY Table D 1 401 EVB Bill of Materials Continued Ref Manufac Part Name Part D Qty Manufac Part JEDEC_Type Part Description es Name HM6264_SMD BASE 72X7415 U51 1 HITACHI HM6264LFP 10 SO28XW SRAM8KX8 LCD162B_DIP BASE XXXXXXX M6 1 FEMA CM162B SGT1LY PART LCD R10 HR LCDSKT_DIP BASE J31 1 15 44 3207 FEMA162BSKT 2X7 BERG FEMALE SOCKET LED_A GREEN 42G3090 CR1 CR3 CR4 3 HP HLMP 1790 002 LED_100 XX LED_A YELLOW 42G3089 CR2 1 HP HLMP 1719 002 LED_100 XX LT1085_DIP BASE 05H1511 U2 1 LINEART LT1085CT 3 3 TO220V_H S_AVD VOLT REGULATOR ECH LVC16244 SMD BASE 40H8824 U7 U8 U10 U18 4 TI SN74LVCH16244A TSSOP48 16 BIT BUFFER TRI STATE MAVEN_SMD BASE NONE U24 1 100 QFP SOCKET NOT USED EPM7128_SMD BASE SOLDERED DIRECTLY MC88915_SMD BASE XXXXXXX U3 1 MOTOROLA MC88915FN70 PLCC28
66. IF 9060_REQ THEN 9060_GNT ELSE 9060_GNT VCC END IF SQBG VCC PCI_GNT1 VCC PCI_GNT2 VCC IF 401 HOLDA THEN ARB GND ARBO ELSE ARB ARB6 END IF WHEN ARB7 gt 401_HOLD VCC 9060_HOLDA GND 9060_GNT VCC SQBG VCC PCI_GNT1 VCC PCI_GNT2 VCC IF 401 HOLDA THEN ARB ARB8 ELSE ARB ARB7 END IF WHEN ARB8 gt 401 HOLD VCC IF 9060 HOLD THEN 9060 HOLDA VCC ELSE 9060 HOLDA GND C 56 401 EVB User s Manual END IF 9060 GNT VCC SQBG VCC PCI_GNT1 GND PCI_GNT2 VCC IF BUSREQ SQBR amp PCI 1 THEN ARB9 ELSIF PCI REQ1 THEN ARB ARBO ELSE ARB ARB8 END IF WHEN ARB9 gt 401_HOLD VCC IF 9060 HOLD THEN 9060 HOLDA ELSE 9060 HOLDA GND END IF 9060 GNT VCC SQBG VCC PCI_GNT1 VCC PCI_GNT2 VCC IF FRAME VCC IRDY 9060_HOLD THEN ARB ARB9 ELSE ARB ARBO END IF ARBITRATION LOGIC FOR SECOND PCI SLOT WHEN ARB10 gt 401 HOLD VCC 9060 HOLDA GND 9060 GNT VCC SQBG VCC PCI GNT1 VCC PCI GNT2 VCC IF 401 HOLDA THEN ARB ARB11 ELSE ARB ARB10 END IF WHEN ARB11 gt 401 HOLD VCC IF 9060_HOLD THEN 9060_HOLDA ELSE 9060_HOLDA GND END IF 9060_GNT VCC SQBG VCC PCI_GNT1 VCC PCI_GNT2 GND IF BUSREQ SQBR amp PCI REQ2 THEN ARB ARB9 ELSIF PCI REQ1 amp PCI REQ2 THEN ARB ARB
67. Interface select Add a Standard Ethernet Network Interface Note choose Standard Ethernet as opposed to IEEE 802 3 Ethernet If you receive an error message stating that there is No available adapter go to step 3 and skip the remaining items in this step step 2 select set the INTERNET ADDRESS field to the host IP address This value must be different from that used for the SLIP interface It can be set to any convenient value if the Ethernet network is private for 401 EVB development purposes An acceptable value would be 7 1 1 4 Make a note of the IP address selected for the host system It will be needed later Note that an IP address for the evaluation board is not required as it was for the point to point SLIP network interface An IP address for the EVB will however be required later on for the board setup set the Network MASK field to 255 255 240 0 insure that ACTIVATE is yes insure that the Use Address Resolution Protocol is yes leave the BROADCAST ADDRESS blank select Do or hit Enter Upon successful completion a properly configured Ethernet interface has been added The Ethernet setup is complete and step 3 need not be performed 3 Perform this step only if you received the No available adapter error message when trying to Add a Standard Ethernet Network Interface in step 2 This message indicates that either the Ethernet adapter is missing or possibly misplugged or the Ethernet Network Interface alr
68. J19 are provided with standard nine pin male right angle connectors as shown in Figure 5 2 below Index 5 at Pin 1 OON UEGTERCH OG 6 9 Figure 5 2 Nine Pin Serial Port Connector Table 5 1 describes the signal to pin assignments for serial ports 1 and 2 Table 5 1 Serial Port Signal Assignments Serial Port 1 J6 Serial Port 2 J19 Pin Number Signal Name Pin Number Signal Name 1 DCD 1 DCD 2 RX 2 RX 3 TX 3 TX 4 DTR 4 DTR 5 GND 5 GND 6 DSR 6 DSR 7 RTS 7 RTS 8 CTS 8 CTS 9 RI 9 RI 401 EVB Connectors 5 3 5 2 Ethernet Connectors 401 EVB is provided with a standard 10Base2 thin coax Ethernet connector J23 and a standard 8 pin RJ 45 connector J24 for 10BaseT The RJ 45 connector is shown in Figure 5 2 below 12345678 Figure 5 3 RJ 45 Ethernet Connector Front View Table 5 3 describes the 10BaseT Ethernet connector signals on the 401 EVB and the recommended mating connectors Table 5 2 Ethernet Connector Description Pin Number Signal Name Description 1 TX Transmit Data 2 TX Transmit Data 3 RX Receive Data 4 5 NC No Connection 6 RX Receive Data 7 8 NC No Connection 5 4 401 EVB User s Manual Table 5 3 Ethernet Connector Descriptions E eed Receptacle Specifications Mating Connector Specifications 10Base T RJ45 Right Angle modular jack AMP AMP 554739 1 554169 1 or 555164 1 5541170 1 Molex 90
69. O has been initialized include sys asyncLib h define S2DB PARMS 1843200 unsigned char 0x7e000080 1 EXT IRQ COM2 s2dbprintf S2DB PARMS Hello World n r Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 115 timertick install Synopsis Library Description Errors Example Attributes References 10 116 include lt tickLib h gt int timertick_install void tickLib a timertick_install installs and starts the timer tick handler to maintain time of day in the OS Open real time executive ENOMEM Insufficient memory to install the timer tick handler Do atimertick_install for a 401GF processor timertick_install Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes timertick_remove p 10 117 ppcMfpmcr0 p 10 75 401 EVB User s Manual Synopsis Library Description Errors Attributes References timertick_remove include lt tickLib h gt int timertick_remove void tickLib a timertick_remove removes the timer tick handler installed by timertick_install EINVAL Internal error involving tick handler level Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes timertick install p 10 116 401 EVB Function Reference 10 117 vslidbprintf Synopsis Library Description Errors Example Attributes Referen
70. PCISLOT2 respectively NOTE When SQUALL has the bus the 401GF can not take the bus from SQUALL Because Squall doesn t have any signal to inform that the other agent needs bus 401GF ARBITRATION SIGNALS 401 HOLD OUTPUT BUSREQ 401 HOLDA INPUT PLX 9060ES PCI 401GF LOCAL CPU SIDE ARBITRATION SIGNALS 9060 HOLDA OUTPUT 9060 HOLD INPUT SQUALL ARBITRATION SIGNALS SQBG OUTPUT SQBR INPUT PLX 9060ES PCI SIDE ARBITRATION SIGNALS 9060 GNT T OUTPUT 9060 REQ INPUT ARBITRATION SIGNALS FOR PCI SLOTS PCI REQ1 PCI REQ2 INPUT PCI GNT1 PCI GNT2 OUTPUT OTHER SIGNALS REQUIRED FRAME IRDY INPUT PCI bus control signals ARBSEL 0 gt FOR HOST ADAPTER ARBITRATION ARBSEL 1 FOR STAND ALONE BOARD ARBITRATION ARBSEL INPUT VARIABLE C 47 9060 GNT NODE Input signal of 9060 bus grant signal tri state buffer 401 X1 DFF Input signal of 401GF adress strobe signal tri state buffer PUSH_CRIT_NODE DFF Temp Signal used in synchronisation of push button interrupt to System clock 33 25Mhz INT REMOVE NODE DFF CLK21 NODE Inverted 2x clock for Write state machine D WE DFF Delayed Write Enable SLA2 DFF SLA3 DEF Temp DFF Dummy flip flop used to add inverter delay for SRAM Write enable clock STSR MACHINE OF BITS SR WITH STATES SRO B 0 SR1 B 1 STRDY MACHINE OF BI
71. RD BUSY ERR 1012 some users is already logged on define RD PTRACE ERR 1014 internal ptrace error define RD OK 0 rptrace completed ok define ARCH 403 0x34000000 403 architecture define ARCH 601 0x36000000 601 architecture define ARCH 602 0x36303200 602 architecture define ARCH 603 0x36303300 603 architecture define ARCH 604 0x36303400 604 architecture typedef struct msgdata message data structure unsigned long data_len optional data length unsigned long retcode return code MIN unsigned long request request type PART unsigned long address function parameter unsigned long data function parameter 6 DWORD struct unsigned f1 1 unsigned f2 1 unsigned 3 1 unsigned padd 21 unsigned 25 8 flags define printmsg flags f1 define breakpt flags f2 define dbg seqno flags f25 union unsigned long trace buffer RD MAXBUFFER unsigned long processid parameter define buffer parameter trace buffer buffer for data in any define rpid parameter processid process id MSGDATA Ptrace Definitions The following section presents the application programming interface API for rptrace messages One field that is not shown here because it is common to every call is the msg printmsg flag This may be set in an rptrace response where msg retcode does not equal A 4 401 EVB User s Manual RD OK When t
72. SunOS 4 1 3 or higher The 401 EVB hardware module comes with a 401GF controller an Ethernet controller 1MB flash memory two serial ports a parallel port PCI host or adapter functionality a two line LCD 8 MB of DRAM 512KB of SRAM a real time clock calendar with 8KB NV RAM and expansion and test interfaces The reference design also includes technical specifications and schematics The 401 EVB software includes the ROM Monitor resident in the flash memory on the board ROM Monitor source code IBM s OS Open real time operating system sample application programs application development libraries and tools IBM s High C C compiler and IBM s RISCWatch a source level debugger that runs on the host Who Should Use This Book This book is for hardware and software developers who need to evaluate the 401GF embedded controller and use the debugging features of the 401 EVB to support software development Users should understand hardware and software development tools concepts and environments Specifically users should understand About This Book xix the host s operating system the PowerPC Architecture and implementation specific characteristics of the PowerPC 401GF embedded controller C and assembler language programming How This Book is Organized This book contains the following chapters and appendixes Chapter 1 Overview of the 401 EVB describes the product its hardware and software components and i
73. The interface is defined by Cyclone Microsystems Each type of Squall module contains a unique software readable registration number Designers of new Squall modules should request a number from Cyclone Microsystems 25 Science Park New Haven CT 06511 phone 203 786 5536 fax 203 786 5025 email info cyclone com Every Squall module contains a 24C08 serial EEPROM 2K bytes which is used to identify the type and revision of the module and to store module dependent system parameters The first 10 bytes are used identically on all Squall modules The remaining memory is assigned and documented by the module designer The general Squall memory map is defined as follows Table 6 6 Squall Module Memory Map Location Description 0 3 Region Configuration Word Stored little endian 4 Interrupt Detection Mode SQIRQO bit 7 LSb SQIRQ1 bit 6 A bit value of 0 indicates level sensitive a bit value of 1 indicates edge sensitive 5 6 Reserved 7 8 Module Version Stored in ASCII Value should be assigned by Cyclone Microsystems 9 Module Revision Level Stored in binary Value is assigned by the module designer 0x00A 0x7FF Module dependent data The EEPROM is read and written serially using the Utility Port at U23 Bytes are read most significant bit first 6 14 401 EVB User s Manual 6 13 Non Critical Interrupts The non critical interrupt input to the PowerPC 401GF should be programm
74. User s Guide for additional information on loading files 9 4 1 Board bootstrap The source for OS Open s bootstrap code is included in the samples WbootLib directory The bootstrap program performs the following functions 1 Unpacks the boot image format placing the text and data sections in the addresses specified at link time 2 Modifies the kernel configuration block with new heap size and start address 3 Sets the bss section to zeros in accordance with ANSI C requirements Application Libraries and Tools 9 17 9 4 2 Environment Initialization OS Open requires information about the system environment at initialization The following source files which are included with the samples are used to supply that information and to establish the working environment basic os c contains pieces of config c io init c panic c threadO c and utils c to pro vide a minimal OS Open configuration e config c configures the OS Open kernel jo init c initializes OS Open s I O subsystem network c configures the host names and addresses for your environment panic c provides a sample panic function e threadO c configures various features of OS Open networking remote debugger etc Utils c provides some useful utilities such as dir to produce a directory listing Additional information can be found in the Configuring the OS Open Operating System and Developing OS Open Applications chapters i
75. a ppcMtdewr sets the Data Cache Write thru Register DCWR to the specified value None Set the value of the DCWR include lt ppcLib h gt ppcMtdowr 0x80000000 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMtesr include lt ppcLib h gt void ppcMtesr unsigned long esr_value ppcLib a ppcMtesr sets the value of the Exception Syndrome Register ESR to the specified value Bits 7 to 31 are reserved None Set the all exception s off ppcMtesr 0x0 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 93 ppcMtevpr Synopsis Library Description Errors Example Attributes References 10 94 include lt ppcLib h gt void ppcMtevpr unsigned long evpr_value ppcLib a ppcMtevpr sets the value of the exception vector prefix register EVPR Bits 0 to 15 contain the prefix of the address of the exception processing routines Bits 15 to 31 are reserved WARNING Do not use ppcMtevpr if using OS Open services that use interrupts ethernet or SL IP etc None Set the EVPR to 0x00A00000 ppcMtevpr 0x00A00000 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controll
76. aet eth hed eee heen B 3 FPGA Program Images u UU nnns C 1 Peripheral Interface Controller eese C 1 Interleaved DRAM Controller essent C 15 SRAM Controller and Bus Arbiter C 45 401 EVB Bill of Materials uuu D 1 Suk u Ses ee oe ed dia m S s ASS u asa gas X 1 Contents xi xii 401 EVB User s Manual Figures Figure 5 1 401EVB Connectors and 5 2 Figure 5 2 Nine Pin Serial Port 5 3 Figure 5 3 RJ 45 Ethernet Connector Front View 5 4 Figure 5 4 Parallel Port Connector J5 5 5 Figure 5 5 RISCWatch JTAG Header Top 5 7 Figure 5 6 100 Pin Squall Receptacle seen 5 11 Figure 5 7 Serial Port Connection uu u 5 22 Figure 5 8 Wiring in a Crossover 5 23 Figure 5 9 Point to Point 10BaseT Ethernet 5 24 Figure 5 10 10BaseT Ethernet Connection with 5 24 Figure 5 11 Point to Point 10Base2 Ethernet Connection 5 25 Figure 6 1 PowerPC 401GF Block
77. and remote addresses for the specified device are used for the source and destination of the ICMP ping packets Enable disable tests Enable disable boot devices Change IP addresses Ping test Toggle ROM monitor debugger Toggle automatic menu Display configuration Save changes to configuration Set baud rate for sl boot Exit menu and continue O N P I V gt When option 4 is selected the current configuration is displayed followed by another command prompt PING TEST Device List 001 Enabled Ethernet ENET 1 1 7 1 1 5 remote 7 1 1 4 hwaddr 1000abcdef55 004 Disabled Serial Port 2 S2 1 1 8 1 1 5 remote 8 1 1 4 hwaddr ffffffffffff select device to ping gt Select the appropriate device to ping in this case only Ethernet is enabled select device to ping 1 selects the Ethernet port If the board is able to successfully ping the host a message similar to the following should appear Using ENET to ping press any key to stop PING 7 1 1 4 56 data bytes 78 bytes from 7 1 1 4 icmp seq 0 tt1 255 time 2 ms 78 bytes from 7 1 1 4 icmp seq 2 tt1 255 time 1 ms 401 EVB ROM Monitor 7 17 Hitting any key terminates the ping test The main menu is redisplayed following the PING status report 7 1 1 4 ping statistics 2 packets transmitted 2 packets received 0 packet loss 1 Enable disable tests 2 Enable disable boot devices 3
78. assigned to the evaluation board while remote means the IP address assigned to the host workstation Using option 8 to save changes made to the configuration will allow the new values to persist beyond subsequent power ons or resets The ROM Monitor supports this by storing its configuration data in NVRAM 7 6 1 Initial ROM Monitor Menu The following menu is displayed after the board has been reset 401GF 2 1 ROM Monitor 8 2 96 Base SSS Sere System Info Processor speed 50 MHz Bus speed 25 MHz Amount of DRAM 8 MB 401 EVB ROM Monitor 7 9 Device Configuration Power On Test Devices 000 Enabled System Memory RAM 001 Enabled Ethernet ENET 004 Enabled Serial Port 2 S2 Boot Sources 001 Enabled Ethernet ENET 1 1 7 1 1 5 remote 7 1 1 4 hwaddr 1000abcdef55 004 Enabled Serial Port 2 S2 local 8 1 1 5 remote 8 1 1 4 hwaddr ffffffffffff 005 Enabled Serial Port 1 S1 Baud 9600 Enable disable tests Enable disable boot devices Change IP addresses Ping test Toggle ROM monitor debugger Toggle automatic menu Display configuration Save changes to configuration Set baud rate for sl boot Exit menu and continue 5 C N 7 10 401 EVB User s Manual 7 6 2 Selecting Power On Tests Option 1 in the main menu selects power on tests These tests are run when the menu exits and before the ROM loader begins the bootp processing Enable disable tes
79. be found at the Trumpet site Users should refer to the documentation for the terms and conditions of using Trumpet Winsock Information regarding the setup and use of Trumpet Winsock can be found in the subsequent chapter on Host Configuration Note Trumpet is not recommended for Windows 95 users already connected to a network since installing Trumpet may cause problems with previously defined networks If the recommended Ethernet host to EVB connection is going to be used instead of the SLIP host to EVB connection Windows 95 users do not need to install Trumpet since the TCP IP package that comes with Windows 95 can be used to establish the Ethernet connection 2 3 SUN Host System Requirements Hardware requirements of the host Sun workstation include Approximately 25MB of free disk space This space is required for the IBM High C C compiler the 401 EVB Software Support Package and the RISCWatch debugger When planning disk space usage consider disk space requirements for the operating system and any other software packages An available serial port for terminal emulation and an Ethernet Attachment Unit Interface AUI or RJ 45 port for host to EVB communications Most Sun SPARCstations come equipped with one serial port and an Ethernet AUI port Consult your Sun literature for additional details Any or all of the following hardware to establish an Ethernet connection between the EVB and the host For 10BaseT an Eth
80. case you will need to use RISCWatch JTAG or a ROM burner to re program the flash 7 30 401 EVB User s Manual RISCWatch JTAG users will find a RISCWatch command file rw flash cmd in the openbios flash directory This command file can be used to prepare the EVB load the flash update program containing the new binary image to program into the ROM and start it running This method can be used to program new flash parts or to re program a corrupted flash part when normal ROM Monitor downloads are not possible or inconvenient When using this command file RISCWatch must be used in JTAG mode 401 EVB ROM Monitor 7 31 7 32 401 EVB User s Manual 401 EVB Sample Applications This chapter describes the steps necessary to build and run the sample programs included in the 401 EVB software support package This code is separate from ROM monitor code described in Chapter 7 8 4 Overview In the High C version of the EVB kit the sample application programs are compiled assembled and linked using the IBM High C C compiler assembler and linker OS Open libraries are used during the link step to create an executable file in ELF format This file includes the OS Open bootstrap code as well as other OS Open functions and is referred to as boot file One of the tools provided in the software support package eimgbld is then used to convert the boot file into the format used by the ROM Monitor to load programs onto the evaluation board see Ap
81. eere A 5 Request dala est ye enden pude pe A 5 Response data s endete epe Rei Ag usus A 5 BD CONTINUE 7 te tr ndi dete A 6 Hedguest dala caret ue tte ier emat reer A 6 Response dee ete ertt enne eiiis A 6 RD DE MAGH 31 o m i E et eee A 7 Hedquest dala a eere eon iei A 7 Response data oda Sd ue egere pee eas A 7 FAD RIEL 105 rete PER pts A 8 Hedguest dala i bee ett efe ete titii etie elit A 8 RESPONSE data u eder eerte dier iti etit eitis A 8 BD iion hee A 9 Request data d eene ree Er PIU PM Sas A 9 Response data d seeded adieu enis A 9 RD bBDINEO 34 rete e tte A 10 Hedquast data unie tine tarta A 10 Hespohse 10 RD LOAD 101 t pb rere xtti e m i E RE A 12 Request data d eerie eerte OEC REOS A 12 Hesponse data g ds petendi ede er ear EROR A 12 RD LOGIN rie entm retenir i Ee RE UEM A 13 Request data oerte erdt taie itti A 13 RESPONSE ertet 13 RD 104 REC s 14 Hedqu st data d hee ere reete in PME PIRE A 14 Response data eee one rer d uA a A 14 RD READ Dora u tret dx eut ecu RYE Ade A 15 Request data eee eem retten ERE RB Rr ewes A 15 RESPONSE Re REPRE A 15 RD READCDGEC CLETIO uu un ette seti eee aee cde tet eee devenu A 16 Catan MERE A
82. in this step Note there is no need to change the IP addresses in the INTERNET ADRRESS and DESTINATION Adress fields if they have already been defined but use of the above mentioned IP addresses is strongly recommended to maintain consistency with the rest of the documentation Make a note of the IP addresses chosen since they will be needed later during board setup 4 1 2 Ethernet Setup RS 6000 In addition to or in place of the SLIP connection an Ethernet connection can be used for host to EVB communications The Ethernet connection is made through an Ethernet adapter on the host and the 10Base2 or 10BaseT connector on the EVB Ethernet is much faster than SLIP and is recommended when downloading large applications on to the board or when using the RISCWatch debugger An Ethernet connection may require additional hardware The 401 EVB supports connection via Standard Ethernet thin coax 10Base2 or twisted pair 10BaseT 10Base2 connection requires at least a thin coaxial cable and a BNC T connector when the EVB is added to an existing network If the EVB is at one of the ends of the Ethernet network a terminating resistor is also required If the Ethernet network is exclusive between the host and the EVB a thin coaxial cable two BNC connectors and two terminators are required At a minimum a 10BaseT connection requires a crossover Ethernet twisted pair cable included in the kit for point to point communicatio
83. installed from diskettes on an AIX host system using the system management interface tool smit Before beginning the installation you must have EVB for RS 6000 installation diskettes e RISC System 6000 running AIX Version 3 2 5 or higher Superuser privileges on the AIX system The method used to perform Steps 7 through 20 of the installation procedure depends on your version of smit To select options use the appropriate method for your version n the X Window version position the cursor and make selections using the mouse In the character based version position the cursor using arrow keys make selections using function keys The following procedure installs the EVB software support package 1 Log in as root or use the AIX su command to become the superuser 2 Use a cd command to change to the directory where the install image file will be stored Typically the directory usr sys inst images holds install image files However any directory can be used 3 Insert the EVB installation diskette labeled 1 of n n may vary into the diskette drive 4 Run the following restore command to read the file EVB instal Z from the diskette into the working directory restore f dev rfdO Installing the EVB Software 3 1 5 Insert the rest of the EVB installation diskettes into the diskette drive when prompted 6 After the diskettes are read unpack the file uncompress EVB instal Z 7 Run the following c
84. integer Returns and clears read error condi tions Values are defined in asyn cLib h ASYNCWERRORGET Pointer to integer Returns and clears write error condi tions Values are defined in asyn cLib h ASYNCERROREN None Enables error reporting ASYNCERRORDIS None Disables error reporting All pending errors are cleared ASYNCERRORGET Pointer to integer Returns error reporting enabled flag ASYNCDLENGET Pointer to integer Returns current data length ASYNCDLENSET asyncDataBits5 Sets data length asyncDataBits6 asyncDataBits7 asyncDataBits8 ASYNCSTOPGET Pointer to integer Returns number of stop bits 9 10 401 EVB User s Manual Table 9 3 ioctl Commands for Asynchronous Device Drivers Command Parameters Explanation ASYNCSTOPSET1 None Sets number of stop bits to 1 ASYNCSTOPSET1_5 None Sets number of stop bits to 1 5 ASYNCSTOPSET2 None Sets number of stop bits to 2 ASYNCPARITYNONE None Disable parity ASYNCPARITYGEN None Enable parity ASYNCPARITYSGET Pointer to integer Return parity status enabled dis abled ASYNCPARITYODD None Sets parity to odd ASYNCPARITYEVEN None Sets parity to even ASYNCPARITYGET Pointer to integer Returns parity type ASYNCXONENABLE None Enables XON XOFF flow control ASYNCXONDISABLE None Disables XON XOFF flow control ASYNCXONGET Pointer to integer Returns XON XOFF flow control sta tus ASYNCMODEMSTAT Pointer to integer Returns modem s
85. most likely require the installation of an Ethernet adapter card and some addi tional connectivity hardware since most PCs do not come equipped for Ethernet communications That hardware might include any or all of the following e For 10BaseT an Ethernet 10BaseT network transceiver a twisted pair cable and a hub At a minimum a 10BaseT point to point connection will require the Ethernet crossover cable supplied with the EVB kit e For 10Base2 an Ethernet IEEE 802 3 10Base2 network transceiver two BNC T type connectors two terminating resistors and a thin coaxial cable At a minimum a 10Base2 point to point connection will require one thin coaxial cable two BNC T connectors and two BNC terminating resistors 2 2 401 EVB User s Manual The following software must be installed on the host PC to run the debugger that communi cates with the ROM Monitor on the 401 EVB RISCWatch 3 3 or higher Windows 3 1 or higher Windows 95 or Windows NT 3 51 Windows 3 1 users require a TCP IP package compliant with the Microsoft Windows Socket API definition One such compatible TCP IP package is Trumpet Winsock a TCP IP protocol stack available from the www trumpet com Internet site Windows 95 users who want to establish a SLIP host to EVB connection over a second serial port require Trumpet Winsock as well since the TCP IP package that comes with Windows 95 does not support SLIP communications Appropriate installation documentation can
86. new volume move to the first window and type eject to eject the diskette Insert the next diskette 7 Move to the second window and type the name of the diskette drive dev rfdO to continue the process 8 If prompted for more diskettes repeat the previous two steps When finished type eject to remove the final diskette 9 Return to the first window and verify that the following files are installed under the usr directory EVB tar Z EVB os4 tar Z EVB hcppc tar Z 10 Run the following commands to unpack and install the files order is important zcat EVB tar Z tar xvf zcat EVB_os4 tar Z tar xvf zcat EVB hocppc tar Z tar xvf Installation for SunOS is complete The tar Z files may be removed to recover space Instructions for Solaris 2 3 or higher only 11 From the first window type volcheck This creates a file called vol dev rdisketteO unlabeled the diskette device name If the system pops up a message box saying the diskette format is unrecognized ignore the message and cancel the message box The name of the file created may be different on your system You can use the eject q command to see the actual name The file name returned is the name that should be used in the subsequent steps 12 From the second window run the command cpio ivB EVB tar Z EVB hcppc tar Z lt vol dev rdisketteO0 unlabeled where voldev rdisketteO unlabeled is the name of your diskette device 3 8 401 EVB User s Manual
87. osopen PLATFORM samples boot img as the source for the application image to be downloaded onto the board Be sure that the htzethernet keyword is used for the Ethernet connection entry and that the IP addresses are those of the evaluation board Note that the IP address in the slipc entry must match that of the IP address assigned to the board during serial port set up Since a board IP address was not required for Ethernet set up the IP address used in the enetc entry defines the IP address of the board for the Ethernet connection If the suggested bootptab entries are used 7 1 1 5 would be the board s Ethernet IP address Take note of the board s IP addresses since they must be made known to the ROM Monitor To start the bootpd and tftpd servers login as root or the superuser su ensure that the following entries are included in the etc services file bootps 67 udp bootpc 68 udp tftp 69 udp ensure that the tftp entry in the etc inetd conf file is uncommented and modify as fol lows 401 EVB ROM Monitor 7 7 tftp dgram udp wait root usr etc in tftpd in tftpd s add an entry for the bootpd server in etc inetd conf as follows bootps dgram udp wait root usr osopen bin bootpd bootpd i reconfigure inetd for the updates made to the inetd conf file First find the process id for inetd ps ef grep inetd Solaris ps auex grep inetd SunOS Then send a hangup signal to reconfigure inetd kill
88. rede A 27 Request data cal un li Alani ep eed A 27 Response data uuruuu 27 RD WRITE deret eee a Lee fcc dt dett ens A 28 uuu ua u uuu ratae ere cient A 28 Response data DP A 28 RD WRITE 1 4 tact sho tack seit Sarat Saad See A 29 Request data eterne alti bien A 29 Response data cisci tei Adi Al nbn pe ae A 29 5 112 in s IU iu Sa Se ei A 30 Plequest data uuu ua qaqaqa A 30 Response datas T A 30 RE EDINFEO 181 sa sn pea cadet ia al seen breed A 31 401 EVB User s Manual Request data negate AER UE A 31 Response datas o ep e RACE tenet A 31 BE LOADREQ 180 iiit eet ae pec A 32 Request datas eere E Ere UR SEE a 13 A 32 RHesponse data ie eee e ete er RE eg ipee A 32 ROM Monitor Load Format essere uuu uu uu uu B 1 OVerVIeW uu B 1 ISI ofender EE m B 1 First Section decedere dene eed cee rate Draco pre cea Pe Rae ia Red B 2 TOXESOCHON ih terere eet deere huu baad EP HC Peer at B 3 Data Sectlohr ote ar e e ee e B 3 Symbol Section eei hdi ere en pit rp depre B 3 Boot Header De nata
89. size and writes a relative branch to the entry point recorded in the end of the image The entry point must be a label not a function descriptor There are several optional flags that can affect hbranch processing They are described below V The verbose flag causes information about the generated output image to be written to stderr at the completion of the utility This information includes entry point information S size The size flag causes the image to be padded to a particular size This facility is useful if it is necessary to create binary images that are the same size as a target ROM device n net_addr The network address flag stores net_addr a 12 hex character network address the media access control MAC address in the VPD area in ROM The ROM Monitor uses this option to store the EVB s ethernet controllers network address in its VPD p patch_file The patch file flag causes the file patch_file to be placed into the image just before the final branch and logically inserted into the instruction stream between the branch at the end of the file and the entry point The patch file is inserted into the image as is and will usually contain the binary representation of position independent executable instructions See Figure 9 2 for the details as to how normal hbranch processing is changed by a patch file input_image This is simply the source image file The output is written to stdout Application Libraries and Tools
90. tests Enable disable boot devices Change IP addresses Ping test Toggle ROM monitor debugger Toggle automatic menu Display configuration Save changes to configuration Set baud rate for sl boot Exit menu and continue O O O N P I I V Select a baud rate for S1 boot l 9600 Dens 19200 325 28800 4 38400 us 57600 6 115200 gt 4 Device Configuration 7 24 401 EVB User s Manual Power On Test Devices 000 Disabled System Memory RAM 001 Enabled Ethernet ENET 004 Enabled Serial Port 2 2 Boot Sources 001 Enabled Ethernet ENET local 7 1 1 5 remote 7 1 1 4 hwaddr 1000abcdef55 004 Disabled Serial Port 2 S2 local 8 1 1 5 remote 8 1 1 4 hwaddr fffffffffffft 005 Enabled Serial Port 1 S1 Baud 38400 download baud rate appears here Debugger Disabled on exit Enable disable tests Enable disable boot devices Change IP addresses Ping test Toggle ROM monitor debugger Toggle automatic menu Display configuration Save changes to configuration Set baud rate for sl boot Exit menu and continue E Q N rp 1 Use Option 8 to save the selected speed after reset power on 401 EVB ROM Monitor 7 25 7 6 11 S1 Boot To perform an S1 boot you must have a terminal emulator which supports kermit file transfer The file must be a valid boot image and must be sent in binary mode If you have Selected to
91. the host s IP address since it will be needed later If the host SPARCstation is not connected to an existing ethernet network then a network between the EVB and the host must be established The ifconfig command can be used to establish such a network Users should consult their network administrator and Sun documentation for additional information A host IP address of 7 1 1 4 is suggested to maintain consistency with this document Make a note of the IP address selected since it will be needed later during board setup 4 14 401 EVB User s Manual 4 3 3 ROM Monitor Debugger Communication Setup SUN Before the RISCWatch Debugger can be used the TCP IP services file must be updated to allow ROM Monitor Debugger communications To modify the etc services file you need to log in as root or the superuser su The following lines must be added to the file osopen dbg 20044 tcp for RISCWatch OS Open debug osopen dbg 20044 udp for RISCWatch rom mon debug Host Configuration 4 15 4 16 401 EVB User s Manual 401 EVB Connectors This chapter describes the 401 EVB connectors The 401 EVB can be accessed through two serial ports an Ethernet 10Base2 or 10BaseT connector a parallel port and the RISCWatch JTAG connection A Squall expansion interface is provided for connection to an external customer supplied prototyping area and two standard PC AT type connectors are provided for power supply connection A processor expansion interf
92. the target sys tem msg data 0 Ignored by ROM monitor msg address 1 Ignored by ROM monitor msg data sizeof msg rpid Length of additional data being sent A 3 3 2 Response data Table A 6 RD DETACH Response Table Parameters msg retcode ESRCH 3 Description The msg pid parameter identifies a pro cess that does not exist or a process that is currently not being debugged msg retcode RD COM ERR 1001 Communications error occurred msg retcode RD NOTSUPP 1003 Call not supported for this interface msg retcode RD OK 0 Successful completion msg retcode EIO 5 One of the parameters is incorrect msg data len 0 No additional data is being sent A 7 3 4 RD FILL 105 Fills memory with zeroes at the location specified by address for the number of bytes specified by data A 3 4 4 Request data Table A 7 RD FILL Request Table Parameters Description msg request RD FILL Requested API function msg rpid process_id Numeric process ID on the target sys tem msg address address Address of memory to fill with zeroes msg data count Number of bytes to fill with zeroes msg data_len sizeof msg rpid Length of additional data being sent 3 4 2 Response data Table A 8 RD FILL Response Table Parameters Description msg retcode RD COM ERR 1001 Communications error o
93. with 8KB NVRAM 3 Two 16550 type serial ports 4 Ethernet e 10Base2 and 10BaseT 5 PS 2 parallel port 6 LCD 2 lines of 16 characters 7 Processor dependent interface For logic analyzer or for processor bus peripheral 8 Squall processor independent expansion interface For portable application specific hardware support 9 Can function as PCI adapter 120 development 10 Can function as PCI host to any standard PCI adapter card 401 EVB Hardware 6 1 6 1 The PowerPC 401GF 32 bit RISC embedded controller offers high performance and functional integration with low power consumption The PowerPC 401GF RISC CPU executes at sustained speeds approaching one cycle per instruction On chip caches reduce chip count and design complexity in systems while improving system throughput Figure 6 1 illustrates the logical organization of the PowerPC 401GF 401GF Overview Interrupt Controller OSC Timers PIT FIT 64 bit base RISC Execution Unit 1X 4X Core Clocking Thirty two 32 bit GPRs Data Instruction Cache Unit Cache Unit Bus Control Unit Address Memory Bus Data Bus Controls Controls Figure 6 1 PowerPC 401GF Block Diagram Features of the PowerPC 401GF include PowerPC RISC fixed point CPU and PowerPC User Instruction Set Architecture Interfaces to memory and peripherals 32 bit data bus Addressing for 4096MB of external memory and MMIO 6 2 Branch prediction 40
94. 0 0x57FFFFFF is accessed as little endian include lt ppcLib h gt pecMtsler 0 00200000 Attributes Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes References PPC401GF Embedded Controller User s Manual 10 102 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMtsprg0 ppcMtsprg3 include lt ppcLib h gt void ppcMtsprgO unsigned long data void ppcMtsprg1 unsigned long data void ppcMtsprg2 unsigned long data void ppcMtsprg3 unsigned long data ppcLib a ppcMtsprg0 ppcMtsprg3 set the special purpose register generals SPRGO SPRG3 to the specified values Typically the SPRGs provide temporary storage at the operating system level NOTE OS Open reserves these registers for its own use None Set SPRGO to 0xA0000000 ppcMtsprgO0 0xA0000000 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 103 ppcMtsrr0 Synopsis Library Description Errors Example Attributes References 10 104 include lt ppcLib h gt void ppcMtsrr0 unsigned long srrO value ppcLib a ppcMtsrr0 sets the SRRO to 5 70 value None Set the save restore register 0 to X DF000000 ppcMtsrr0 0xDF000000 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 4
95. 0 79 ppcMfsrr0 function 10 80 ppcMfsrr1 function 10 81 ppcMfsrr2 function 10 82 ppcMfsrr3 function 10 83 ppcMftb function 10 84 ppcMftsr function 10 85 ppcMtbrcr0 ppcMtbrcr7 functions 10 86 ppcMtcdbcr function 10 87 ppcMtdact1 function 10 88 ppcMtdbcrar function 10 89 ppcMtdbcersr function 10 90 ppcMtdccr function 10 91 ppcMtdewr function 10 92 ppcMtdsisr function 10 94 ppcMtesr function 10 93 ppcMtiac1 function 10 95 ppcMticcr function 10 96 ppcMtiocr function 10 97 ppcMtmsr function 10 98 ppcMtpit function 10 99 ppcMtpmcr0 function 10 100 pus An X 4 401 EVB User s Manual ppcMtsgr function 10 101 ppcMtsler function 10 102 ppcMtsprgO ppcMtsprg3 function 10 103 ppcMtsrr1 function 10 105 ppcMtsrr2 function 10 106 ppcMtsrr3 function 10 107 ppcMttb function 10 108 ppcMttcr function 10 109 ppcMttsr function 10 110 ppcOrMsr function 10 111 ppcSync function 10 112 processor speed function 10 113 ptrace definitions A 4 ATTACH 5 RD CONTINUE A 6 DETACH 7 RD FILL A 8 RD KILL A 9 RD LDINFO A 10 RD LOAD A 12 RD LOGIN A 13 RD LOGOFF A 14 RD READ D A 15 RD READ DCR A 16 RD READ GPR A 17 RD READ GPR MULT A 18 RD READ A 19 RD READ MULT A 20 RD READ SPR A 21 RD STATUS A 22 RD STOP APPL A 23 RD WAIT A 24 RD WRITE BLOCK A 25 RD WRITE D A 26 WRITE A 27 RD WRITE GPR A 28 RD WRITE A 29 RD WRITE SPR A 30 RL LD
96. 0 87 ppcMtdbcr 10 89 ppcMtdbsr 10 90 ppcMtdccr 10 91 ppcMtdewr 10 92 ppcMtesr 10 93 ppcMtevpr 10 94 ppcMtiac1 10 95 ppcMticcr 10 96 ppcMtiocr 10 97 ppcMtmsr 10 98 ppcMtpit 10 99 ppcMtpmcr0 10 100 ppcMtsgr 10 101 ppcMtsler 10 102 ppcMtsrr1 10 105 ppcMtsrr2 10 106 ppcMtsrr3 10 107 ppcMttb 10 108 ppcMttcr 10 109 ppcMttsr 10 110 DS mem ppcOrMsr 10 111 ppcSync 10 112 ppMtdac1 10 88 processor speed 10 113 sidbprinf 10 114 s2dbprinf 10 115 timertick install 10 116 timertick remove 10 117 vsidbprinf 10 118 H hardware components 1 1 cables and power supply 1 1 evaluation board 1 1 host system requirements PC 2 2 RS 6000 2 1 Sun 2 3 9 10 9 15 Embedded Systems Solution Center xxii initialization 9 17 board bootstrap 9 17 Input output Support Library 9 2 installing ioLib a library 9 4 ioLib init function 10 42 J jumpers setting 5 17 K Kernel Abstract Data Types Library 9 2 L LCD Library 9 2 Icd_init function 10 43 library description asyncLib a 9 4 clockLib a 9 5 enetLib a 9 5 ioLib a 9 4 ppcLib a 9 5 9 3 rtxLib a 9 3 tickLib a 9 6 N Network Support Library 9 2 NFS Support Library 9 2 O opening asynchronous communication ports 9 9 OpenShell 9 2 OS Open kernel extensions 9 3 OS Open minimal kernel 9 3 P PC host configuration 4 7 ethernet setup 4 14 et
97. 01 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMtsrr1 include lt ppcLib h gt void ppcMtsrr1 unsigned long srr1_ value ppcLib a ppcMtsrr1 sets the SRR1 to 5 71 value None Set the save restore register 1 to X O000BBOO ppcMtsrri 0x0000BB00 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 105 ppcMtsrr2 Synopsis Library Description Errors Example Attributes References 10 106 include lt ppcLib h gt void ppcMtsrr2 unsigned long srr2 value ppcLib a ppcMtsrr2 sets the SRR2 to srr2 value None Set the save restore register 2 to X O000BBOO ppcMtsrr2 0x0000BB00 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMtsrr3 include lt ppcLib h gt void ppcMtsrr3 unsigned long srr3_value ppcLib a ppcMtsrr3 sets the SRR3 to srr3 value The file lt ppcLib h gt contains several constants that can be used when setting the MSR values in the SRR3 register None Set the save restore register 3 to problem state ppcMsrPR ppcMtsrr3 ppcMsrPR Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller Us
98. 010 223 B 0011 Z24 B 0100 225 B 0101 226 B 0110 227 B 0111 C 19 228 B 1000 Z29 B 1001 Z210 B 1010 Z211 B 1011 2212 B 1100 2213 1101 2214 B 1110 2215 1111 wll NODE w12 NODE w13 NODE wl4 NODE xx MACHINE OF BITS REFEVEN WITH STATES x0 x1 11 NODE nn MACHINE OF BITS QA 4 0 WITH STATES IDLE B 00000 ACCESSO B 00001 ACCESS1 B 00010 ACCESS2 B 00011 ACCESS3 B 00100 ACCESS4 B 00101 ACCESS5 B 00110 ACCESS6 B 00111 ACCESS7 B 01000 ACCESS8 B 01001 REFRESHO B 11010 REFRESH1 B 11011 REFRESH2 B 11100 REFRESH3 B 11101 REFRESH4 B 11110 REFRESH5 B 11111 na NODE nb NODE nc NODE nd NODE ne NODE nf NODE ng NODE nh NODE ni NODE nj NODE nk NODE nl NODE C 20 401 EVB User s Manual nm NODE no NODE np NODE RDEN NODE WAIT NODE WRE NODE WRO NODE REFREQ NODE DRAMADDR NODE HLDACK NODE WRE NODE WRO NODE SRASE NODE XTEND NODE SXTEND NODE RASE O0 NODE RASE 1 NODE RASO 0 NODE RASO 1 NODE BEGIN RDEN RDEN BANKSELA BANKSELA BANKSELB BANKSELB RDY TRI RDY QA4 amp RASE ADDRMUX ADDRMUX CASEE_BO CASEE_BO CASEE B1 CASEE B1 CASEE B2 CASEE B2 CASEE B3 CASEE B3 CASOO CASOO CASOO B1
99. 075 0130 or 90075 0132 10Base2 Right Angle BNC receptacle AMP 221128 1 227079 5 AMP 227161 9 2 329082 1 or Molex 73100 5001 73103 5001 or 73106 5001 5 3 Parallel Port Connector The parallel port is provided with a standard D type receptacle shown in Figure 5 4 below 13 Index E E E E E E E E E EJ E E El Pin 1 EH mm m mm mm mmm 25 Figure 5 4 Parallel Port Connector J5 The pinout of the J5 parallel port connector is as follows Table 5 4 Connector J5 Parallel Port Pin Name STROBE Comment Data0 Data1 Data2 Data3 Data4 Data5 Data6 Data7 ACK 11 BUSY 401 EVB Connectors 5 5 Table 5 4 Connector J5 Parallel Port Continued Pin Name Comment 12 OUT 13 SEL 14 FEED 15 ERR 16 INI 17 LIN 18 GND 19 GND 20 GND 21 GND 22 GND 23 GND 24 GND 25 GND 401 EVB User s Manual 5 4 RISCWatch JTAG Debugger Connectors The RISCWatch JTAG debugger connects to the 401 EVB JTAG port J17 through a 2 x 8 pin header This header is shown in Figure 5 5 Figure 5 5 RISCWatch JTAG Header Top View Placement of the RISCWatch JTAG header on the 401 EVB is indicated on the layout drawing in Figure 5 1 above Signal names and positions on the headers are indicated in the following tables Table 5 5 RISCWatch JTAG Interface Connections and Resistors
100. 1 EVB User s Manual Thirty two 32 bit general purpose registers Single cycle execution for most instructions Hardware multiplier and divider for faster integer arithmetic Enhanced string and multiple word handling Memory is pre cache cache tags are physical addresses Support for a wide range of memory timing parameters Support for direct connection of byte halfword and fullword devices Storage attribute control WIMGE write back write thru inhibited guarded Endian storage attribute control for thirty two 128MB regions True Little Endian operation and PowerPC Endian modes Separate instruction cache and write back write thru data cache both two way set associative Minimized interrupt latency Advanced power management Individually programmable on chip interfaces for e Bus control regions External interrupts Flexible interface to external bus masters 6 2 Peripheral Components 1 Two Serial Ports and one PS 2 Parallel Port National PC16553DV Clock calendar and Non volatile RAM Dallas DS1643L 120 This chip is an 8Kx8 non volatile RAM by virtue of built in lithium battery with a clock calendar replacing the top 8 bytes of the memory It is mounted using a surface mounted 52 pin PLCC socket Ethernet Controller National DP83902AV This controller is used with 8Kx8 packet SRAM National DP8392 coaxial transceiver interface and both 10Base2 and 10BaseT connectors PCI P
101. 1 EVB the sram_size parameter should be set to 8192 enet_native_attach returns 0 if successful and 1 if it is unsuccessful None The following is an example of initializing the TCP IP protocol stack and attaching the Ethernet device include lt enet h gt define ENETHOST 401 board define CONFIG entO 401 board netmask 255 255 240 0 up int do enet int c rc tcpip init ENETHOST 1 1000 Initialize the TCP IP library if re 0 return 1 re net init initialize netLib if rc 0 return 1 rc enet_native_attach 25000000 8 1024 attach the tcp ip proto stack if re 0 return 1 401 EVB Function Reference 10 33 enet native attach rc ifconfig ENET CONFIG configure network interface if re 0 return 1 return 0 Attributes Async Safe No Cancel Safe Yes Interrupt Handler Safe No References enet disable ipinput p 10 31 enet enable ipinput p 10 32 enet send packet p 10 36 e packet p 10 35 10 34 401 EVB User s Manual enet recv packet Synopsis include lt enetLib h gt struct mbuf enet_recv_packet struct timespec timeout Library enetLib a Description enet_recv_packet returns a pointer to the mbuf chain holding the packet received by the Ethernet device driver enet_recv_packet will block waiting for packet re
102. 10 11 biosenet attach References Ethernet Device Driver on page 9 13 10 12 401 EVB User s Manual Synopsis Library Description Errors Attributes clock set include lt clockLib h gt int clock_set void clockLib a clock_set sets the OS Open POSIX clock to the value obtained from battery operated real time clock Real time clock not running Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes 401 EVB Function Reference 10 13 clockchip get Synopsis Library Description Errors Attributes References 10 14 include lt clockLib h gt int clockchip get time t timeval clockLib a clockchip get reads the battery backed real time clock into the timeval structure supplied by the user The clockLib library must be initialized by calling clockLib init prior to calling this function EINVAL Library not initialized Async Safe No Cancel Safe Yes Interrupt Handler Safe Yes e clockchip_set p 10 18 clockLib init p 10 27 401 EVB User s Manual Synopsis Library Description Errors Attributes References clockchip get calibration include lt clockLib h gt int clockchip get calibration unsigned char value clockLib a clockchip get calibration returns the clock s calibration byte in the variable pointed to by value The calibration byte occupies the five lower order bits of the byte The sixth bit is a sign bit 1
103. 13 R115 R116 R118 R119 R126 R130 R132 R133 R136 R137 R147 R151 R153 R157 R158 R161 R166 R170 R176 R177 R200 R214 R223 R226 R280 R282 R284 R291 R2803 R42 R34 R41 R82 R103 R104 R117 R134 Qty 80 Manufac Name PANASONIC PANASONIC PANASONIC Manufac Part ERJ6GEYJ103V ERJ6VNF1001S ERJ6GEYJ102V JEDEC Type 5 0805 5 0805 5 0805 Part Description RESISTOR RESISTOR RESISTOR enuen 5195 GAA LOr Table 0 1 401 EVB Bill of Materials Continued Ref Manufac P Part Nam Par Manufac Par EDEC Type Part Description art Name art Des Qty Mame anufac Part J C Typ p RESISTOR 22 596 98F1736 R2 R6 R10 R12 40 PANASONIC ERJ6GEYJ220V 5 0805 RESISTOR R14 R15 R17 R21 R23 R27 R54 R56 R65 R121 R122 R155 R163 R164 R169 R224 R225 R229 R231 R233 R237 R242 R243 R245 R246 R249 R251 RESISTOR 274 1 4007234 R143 R144 2 PANASONIC ERJ6ENF2740V 5 0805 RESISTOR RESISTOR 300 5 98F1674 R47 R138 2 ROHM MCR10EZHMJW301 5 0805 RESISTOR RESISTOR 330 5 0804750 R105 R148 5 ROHM MCR10EZHMJW331 5 0805 RESISTOR R150 R165 RESISTOR 3 9K 596 42G3067 R175 1 PANASONIC ERJ6GEYJ392V SMC0805 RESISTOR RESISTOR 4 7K 5 41F0336 R30 R33 R43 20 PANASONIC ERJ6GEYJ472V 5 0805 RESISTOR R45 R77 R78 R81 R96 R102 R106 R110 R146 RESISTOR
104. 2 e packet p 10 35 401 EVB User s Manual Synopsis Library Description Errors Attributes References ext int disable include lt ioLib h gt void ext_int_disable int event ioLib a ext_int_disable disables the interrupt level specified by event The ext_int_disable function returns nothing None Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes ext_int_enable p 10 38 ext_int_install p 10 39 ext_int_query p 10 40 ioLib_init p 10 42 401 EVB Function Reference 10 37 ext int enable Synopsis Library Description Errors Attributes References 10 38 include lt ioLib h gt void ext_int_enable int event ioLib a ext_int_enable enables the interrupt level specified by event ext_int_enable returns nothing None Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes ext_int_install p 10 39 ext int query p 10 40 ioLib init p 10 42 401 EVB User s Manual Synopsis Library Description Errors Attributes References ext int install include lt flih h gt include lt ioLib h gt int ext int install int event flih t new flih flih t old_flih ioLib a ext int install installs a first level interrupt handler FLIH for event If new flih is NULL the current interrupt handler is removed for the specified event If new flih is non NULL it points to a flih t str
105. 2 3 Data Section For a data section the union section info contain the structure data info specifying size to fill and char to fill These parameters are used to optionally fill a region past the size extent specified in the base rel block with a character It is most often used to zero bss by specifying the size of the bss in size to fill and 0 0 for char to fill B 2 4 Symbol Section For symbols the union section info contains the number of symbols in the section The data in this section consists of the symbol table from the original object file B 3 Boot Header The entire image is preceded by the boot header that was added by nimgbld or eimgbld The ROM loader uses this information to verify that it is a ROM Monitor load image determine where to place the image and whether to invoke the ROM Monitor debugger before transferring control to the entry point The boot header is stripped off by the ROM Monitor loader and does not appear at the load address The boot header has the following format typedef struct boot block unsigned long magic unsigned long dest unsigned long num 512blocks unsigned long debug flag unsigned long entry point unsigned long reserved 3 boot block t B 3 B 4 magic identifies this image as a legitimate ROM Monitor image and must have the value X 0052 504F dest is the target address for the image after the boot header is stripped off num 512blocks Boot images are padded to a mult
106. 2 is used in interrupt handlers as it contains the address of the next instruction which was to be executed next at the time the exception occurred SRR2 and SRR3 are set for critical machine check watchdog and debug interrupts None Retrieve the current value of SRR2 This register contains the address of the instruction that was to be executed next which may be needed by an exception handler unsigned long current srr2 ppcMfsrr2 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes ppcMfsrr3 p 10 83 PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMfsrr3 include lt ppcLib h gt unsigned long ppcMfsrr3 void ppcLib a ppcM srr3 returns the current value of SRR3 Typically SRR is used in the critical interrupt handler as it contains the old MSR value as well as information bits specific to the interrupt The file lt ppcLib h gt contains several constants that can be used when setting the MSR values in the register None Retrieve the current value of SRR3 This register contains the saved MSR which may be needed by an exception handler unsigned long current srr3 ppcMfsrr3 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 83 ppcMftb Synopsis Library Descriptio
107. 214 2214 x 1 1 0 gt Z211 2214 x 1 x 1 gt 2721 2215 x 1 0 0 gt 7215 2215 I 0 x x gt 2214 2215 0 0 x x gt 7215 2215 1 1 0 gt 7211 2215 1 1 gt 221 END TABLE END C 44 401 EVB User s Manual C 3 SRAM Controller and Bus Arbiter S5 ke k e ke e k e k ke k se k k e k k k k k k k k k k k k k kk kk KK SRAM CONTROLLER AND ARBITRATION LOGIC kkkkk k k e He e Se e he k KK KK He KKK KKK KKK KK k k k k k k k k k k k k k k k k k y SUBDESIGN SAGE k e k e e ke Se e he he k he k k k k k e k k k k k k k k k k k k k k k k k k k S Zkkkkkkkkkkkkkkkkkk PRIMARY INPUT SIGNALS QQ Q w Zkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk CLK1 INPUT 1X CLOCK DCLK1 INPUT 1X CLOCK CLK2 INPUT 2X CLOCK RESET INPUT EXTERNAL RESET ADS BIDIR ADDRESS STROBE ALE INPUT 401GF Address Latch Enable Signal BLAST INPUT BURST LAST W_ R INPUT PROCESSOR READ WRITE A30 INPUT ADDRESS A30 A29 INPUT ADDRESS A29 A28 INPUT ADDRESS A28 A27 INPUT ADDRESS A27 A26 INPUT ADDRESS A26 A25 INPUT ADDRESS A25 A24 INPUT ADDRESS A24 A23 INPUT ADDRES
108. 24 1 1 0 gt 7211 224 1 1 gt 221 225 1 0 0 gt 7215 225 1 0 gt 724 225 0 0 gt 725 225 1 1 0 gt 7211 225 x I x 1 gt 221 226 x L 0 0 gt Z215 226 1 0 x x gt 225 226 0 0 x x gt 726 226 1 1 0 gt 7211 226 1 x 1 gt 221 227 x 1 0 0 gt 7215 227 I 0 x x gt 726 227 0 0 gt 227 227 1 1 0 gt 7211 227 1 x 1 gt Z21 228 x 1 0 0 gt 7215 228 1 0 gt 727 228 0 0 gt 728 228 1 1 0 gt 7211 228 1 1 gt 221 43 229 x 1 0 0 gt 7215 229 12 0 x x gt 228 229 0 0 x x gt 729 229 1 1 0 gt 7211 229 x 1 x 1 gt Z21 2210 X 1 0 0 gt 2215 2210 1 0 x x gt 729 2210 0 0 gt 7210 2210 1 1 0 gt 7211 2210 1 1 gt 221 2211 1 0 0 gt 7215 2211 1 0 gt 7210 2211 0 0 x x gt 7211 2211 1 1 0 gt 7211 2211 1 x 1 gt Z21 2212 x 1 0 0 gt 7215 2212 1 0 gt 7211 2212 0 0 gt 7212 2212 x 1 L 0 gt 7211 2212 x a x 1 gt 221 2213 x 1 0 0 gt 2215 2213 I 0 x x gt 2212 2213 0 0 gt 2213 2213 1 1 0 gt 7211 2213 x I x 1 gt 2721 2214 x 1 0 0 gt 2215 2214 1 0 x x gt 2213 2214 0 0 x x gt 2
109. 41 SO20 74ABT241 BUFFER 3 STATES Table D 1 401 EVB Bill of Materials Continued Ref Manufac Part Qty Manufac Part JEDEC_Type Part Description Des Name ABT245_SMD BASE 4007769 U17 1 TI SN74ABT245BDWR S020 74ABT245 TRAN CEIVER ABT573_SMD BASE 4903254 U49 1 TI SN74ABT573DWR S020 74ABT573 TRANSPAR ENT LATCH 3 STATE APEM_DIP BASE XXXXXXX SW1 SW2 2 APEM A2216 SW APEM A2216 MOMENTARY SWITCH BERG1X2 DIP BASE 6181127 J10 J20 J22 13 BERG 69190 502 BERG1X2 1X2 100MIL HEADER J26 J39 J42 TP1 VERTICAL TP4 BERG1X3_DIP BASE 1501831 J9 J12 J13 J27 9 MOLEX 90368 2703 BERG1X3 1X3 100MIL HEADER J30 J32 J43 VERTICAL BUSHEADER_DIP BASE XXXXXXX J15 J16 2 MOLEX 15 44 3216 CONN_2X16_MLX1 2X16 100MIL FEMALE 5 44 3216 HEADER CAPACITOR 0 001UF 20 69G2918 C93 C146 C147 3 AVX 08055C102MAT2A SMC0805 CAPACITOR CAPACITOR 0 01UF 20 41F0313 1 4 C9 C17 66 KEMET C0805C103M5RAC SMC0805 CAPACITOR C19 C21 C22 C24 C 29 C34 C35 C42 C44 C54 C 57 C59 C60 C69 C75 C85 C98 C107 C109 C114 C117 C120 C123 C132 C134 C136 C137 C140 C141 C144 C152 C158 C163 C165 C194 C196 C203 C204 C213 C221 C222 C237 C250 C256 v a enuen SJeS 8 LOr Part Name CAPACITOR 0 1UF 20 CAPACITOR 10PF 5 CAPACITOR 2 2NF 10 Part 78G9541 68X6212 57G8771
110. 47 5 03G9708 R16 R58 2 ROHM MCR10EZHLJW470 5 0805 RESISTOR RESISTOR 470K 5 03G9709 R57 1 ROHM MCR10EZHLJW474 5 0805 RESISTOR RESISTOR 49 9 5 4006869 R141 R142 2 PANASONIC ERJ6ENF49R9V 5 0805 RESISTOR RESISTOR 66 5 1 40G6881 R139 R140 2 PANASONIC ERJ6ENF66R5V 5 0805 RESISTOR RESISTOR 75 5 82G6645 R123 R124 2 PANASONIC ERJ6GEYJ750V 5 0805 RESISTOR Table D 1 401 EVB Bill of Materials Continued Ref Manufac Part Name Part Qty Manufac Part JEDEC_Type Part Description Des Name RESISTOR 806 1 40G6968 R145 1 PANASONIC ERJ6ENF8060V 5 0805 RESISTOR RESISTOR DO NONE R01 R1 6 5 0805 RESISTOR 5 R5 R83 R120 RJ45_DIP BASE 59G2489 J24 1 AMP 555164 1 CONN RJ45 RJ45 CONN SAGE SMD BASE NONE U54 1 100 QFP SOCKET NOT USED 7128 SMD BASE SOLDERED DIRECTLY SCREW BOARD XXXXXXX 6 NAPPCO NYLON SCREW FASTENER BINDER HEAD 3 8 X 4 40 SCREW LCD XXXXXXX 4 NAPPCO NYLON SCREW FASTENER BINDER HEAD 1 4 X 2 56 SLIPSINK DIP BASE XXXXXXX 1 1 AAVID 576802B00000 PART HEATSINK VOLTREG SN75LV4737A SMD BASE 40H9046 U36 065 2 SN751V4737A SSOP28 RS232 TRANSCEIVER SRAM128KX8 SKT SMD XXXXXXX J35 J38 4 AMP 822362 1 SOJ32W 4005 SRAM128KX8 SOCKET BASE SRAM128KX8 SMD BASE XXXXXXX M11 M14 4 MOTOROLA MCM6726BWJ 12 PART SRAM128KX8 STANDOFF_BOARD XXXXXXX 6 NAPPCO NYLON STANDOFF FASTE
111. 7 ELSIF PCI REQ2 THEN ARB ARBO VCC C 57 ELSE ARB ARB11 END IF END CASE END C 58 401 EVB User s Manual 401 EVB Bill of Materials enuen 5195 GAA LOr Table 0 1 401 EVB Bill of Materials Ref Manufac Part Name Part Qty Manufac Part JEDEC_Type Part Description Des Name 29F040ROM MECH MECH 8206496 M2 M7 2 AMD AM29F040 120JC PART 512KX8 FLASH ROM BASE 401 SMD BASE Ut 1 IBM IBM25 PPC401 QFP80 5MMSKT 401 50MHZ 74ALS38 SMD BASE 68 2725 U32 1 SN74ALS38BDR SO14 OPEN COLLECTOR NAND 74ALS646 SMD BASE 6448368 U43 1 NATIONAL DMALS646WMX SO24W OCTAL BUS TRANS W REGISTER 74F02 SMD BASE 6480477 U69 1 NATIONAL 74 025 5014 DUAL 2 INPUT NOR GATE 74F04 SMD BASE 61X9235 U9 U39 2 NATL FO4 SO14 HEX INVERTER 74F126 SMD BASE 09F1697 U28 1 PHILLIPS N74F126D T SO14 QUAD BUFFER WITH 3 STATE OUTPUT 74F244 SMD BASE 6480438 U35 1 PHILIPS 74F244 SO20W OCTAL BUFF DRIVER 74F257 SMD BASE 72X8199 U11 U14 019 022 8 NATIONAL N74F257AD T SO16 QUAD 2 1 LINE MUX 74F273 SMD BASE 72 8346 U23 1 PHILLIPS N74F273D T 5020 OCTAL D FLIP FLOP 82059 SMD BASE 23F0299 U5 U33 2 HARRIS CS82C59A 12 PLCC28 PROGRAMMABLE INTERRUPT CTRL ABT04_SMD BASE XXXXXXX U4 1 PHILLIPS 74ABT04D S014 NOT GATE ABT16373_SMD BASE 49G3313 1015 U16 2 TI SN74ABT16373ADL SSOP48 16 BIT TRANSPARENT R D LATCHES W 3 ST OUT ABT241 SMD BASE XXXXXXX U29 U31 3 TI SN74ABT2
112. 7 1 1 5 After the selection has been entered the new configuration is displayed followed by the main menu Device Configuration Power On Test Devices 000 Disabled System Memory RAM 001 Enabled Ethernet ENET 004 Enabled Serial Port 2 S2 Boot Sources 001 Enabled Ethernet ENET local 7 1 1 5 remote 7 1 1 4 hwaddr 1000abcdef55 004 Disabled Serial Port 2 S2 local 8 1 1 5 remote 8 1 1 4 hwaddr ffffffffffff 005 Enabled Serial Port 1 S1 Baud 9600 Enable disable tests Enable disable boot devices Change IP addresses Ping test Toggle ROM monitor debugger Toggle automatic menu Display configuration Save changes to configuration Set baud rate for sl boot Exit menu and continue O O N EH 1 gt This option should be repeated to set all of the IP addresses to their appropriate values If the suggested IP addresses are being used the local and remote addresses for both the Ethernet and the Serial Port should match those in the above menu Remember to save any configuration changes via option 8 7 16 401 EVB User s Manual 7 6 5 Using the Ping Test Option four in the main menu selects the ping test The ping test can be used for a basic assurance test of IP connectivity to the host workstation It should be performed after setting the IP addresses to insure host to EVB communications If the ping test fails users can not load applications on to the board The local
113. 7000 0000 BRCR 7 8 bit PowerPC 401GF Board Memory Map Continued RTC NVRAM 8K Interrupt Controller 2 slave 82C59 Interrupt Ack from both Interrupt Controllers Interrupt Controller 1 master 82C59 LCD CM162B Utility port controls critical interrupt slow mode refresh and Squall serial EEPROM access PS 2 Parallel Port 16553 Serial Port 16553 Serial Port 16553 Ethernet Remote DMA data Ethernet PRQ Status read only Ethernet 83902 6000 0000 BRCR 6 unused 5000 0000 BRCR 5 unused 4000 0000 BRCR 4 32 bit 3000 0000 BRCR 3 32 bit 2000 0000 gt 2000 01FF 2000 0000 BRCR 2 32 bit PCI Registers not all addresses used 1000 0000 gt 1007 FFFF 1000 0000 BRCR 1 32 bit SRAM 512K 6 12 401 EVB User s Manual PowerPC 401GF Board Memory Map Continued 0000 0000 gt FFFF 64 0000 0000 BRCR 0 32 bit Notes 1 The hi order address bit is not decoded on this board Therefore everything in the memory map actually appears twice once with the bit 2 1 and once with the bit 0 2 DRAM is aliased at addresses 0400 0000 gt 07FF FFFF Per 1 DRAM also appears at 8400 0000 gt 87FF FFFF 3 There are no aliased addresses other than those described in 1 and 2 401 EVB Hardware 6 13 6 12 Squall Expansion Interface The Squall interface is an open interface for expansion cards
114. 8 Connector J4 Squall Interface Pin Name Comment 1 S ADS Address Strobe 2 GND 3 PMCLK CPU Output Clock 4 GND 5 S BLAST Burst Last 6 S LOCK Bus Lock 7 S W R Write Read 8 GND 9 S READY 10 RESET 11 S BEO Byte Enables 12 S BE1 32 bit 3 24 31 0 0 7 13 S BE2 16 bit 3 8 15 2 nc 1 A1 0 0 7 14 S 8 bit 3 nc 2 nc 1 1 0 0 15 SQSEL Select Squall 16 GND 401 EVB Connectors Table 5 8 Connector J4 Squall Interface Continued Pin Name Comment 17 SQIRQ1 Interrupt Request 18 SQIRQO 19 SQBR Shared Bus Request 20 SQBG Shared Bus Grant 21 S EXTEND 22 GND 23 45V 24 S D31 S D31 is data MSb 25 S D30 26 S D29 27 S D28 28 S D27 29 S D26 30 S D25 31 S D24 32 GND 33 S D23 34 S D22 35 S D21 36 S D20 37 S D19 38 S D18 39 S D17 40 S D16 41 GND 5 12 401 EVB User s Manual Table 5 8 Connector J4 Squall Interface Continued Pin Name Comment 42 S D15 43 S D14 44 S D13 45 S D12 46 S D11 47 S D10 48 S D9 49 S D8 50 GND 51 S A81 S 1 is address MSb 52 S A30 53 S A29 54 S A28 55 S A27 56 S A26 57 S A25 58 S A24 59 45V 60 S A23 61 S A22 62 S A21 63 S A20 64 S A19 65 S A18 66 S A17 67 S A16 68 45V 69 S A15 70 S A14 71 S A13 72 S A12 73 S A11 74 S A10 75 S A9 76 S A8 401 EVB Connectors 5 13 Table 5 8 Co
115. A IDE Hard disk device driver pataLib a Common PowerPC Low Level Access Support Library ppcLib a 401 EVB Queue Library queLib a Common RAM Disk Library ramdLib a Common Rate Monotonic Scheduling RMS Library rmsLib a Common Remote Source Level Debug Library rsldLib a Common Ring Buffer Library rngLib a Common RPC Support Library rpcLib a Common Runtime Library runlib a Common 9 2 401 EVB User s Manual Table 9 1 OS Open Libraries Library File Name Platforms SCSI Support Library scsiLib a Common Serial Support Library asyncLib a 401 EVB Socket Services for PCMCIA support ssLib a Common Symbol Support Library symLib a Common TCP IP Protocol Support Library tcpipLib a Common Telnet Daemon Support Library tnetdLib a Common Telnet Client Support Library telnet o Common The Real time Executive rtx o rtxLib a Common OS Open Minimal Kernel rtxmin o Common OS Open Kernel Extensions for the minimal kernel rtxext o Common Timer Tick Support tickLib a 401 EVB Trivial File Transfer Protocol tftp o Common TTY Support Library ttyLib a Common The real time executive the only required component in an OS Open operating system provides a full set of basic operating system services Thread management Storage management e Signals e Clocks and timers Interrupt and fault handling Message queues e Semaphores Trace buffer support e Miscellaneous services The C functions for the real t
116. AD Request Table Parameters Description msg request RD LOAD Requested API function msg buffer filename Name of file to load A NULL character terminates filename Filename contains fully qualified path to that file msg data_len strlen filename 1 String length of filename plus NULL character A 3 7 2 Response data Table A 14 RD_LOAD Response Table Parameters Description msg retcode RD_COM_ERR 1001 Communication error occurred msg retcode RD_OK 0 Successful completion msg retcode RD_NOFILE_ERR 1006 Could not locate load the file msg rpid process_id Process_id of the newly loaded file This number integer can not be equal to 1 OxFFFF FFFF or 0 msg data_len sizeof msg rpid Length of additional data being sent A 12 401 EVB User s Manual A 3 8 RD LOGIN 103 Initializes users LOGIN This request must be the first rptrace request issued by the debugger or results will be unpredictable 3 8 1 Request data Table A 15 RD LOGIN Request Table Parameters msg request RD LOGIN Description Requested API function msg buffer 0 host name This field is ignored by ROM monitor msg buffer strlen host name 1 user name This field is ignored by ROM monitor msg data len strlen host name strlen user name 2 Length of additional data being sent A 3 8 2 Response data Table A 16 RD LOGIN Respon
117. Async Safe No Cancel Safe Yes Interrupt Handler Safe Yes 401 EVB User s Manual Synopsis Library Description Errors Attributes Icd init include lt IcdLib h gt int driver_install int devhandle Icd_init int number_lines int register_base int register_delta IcdLib a IcdLib a is the LCD device driver It is installed by calling driver_install with five parameters The first parameter is the device handle devhandle The second parameter is the device driver initialization function Icd init The third parameter is the number of lines contained on the display number lines typically 2 The fourth parameter is the I O address of the base register register base typically 0x7E000300 The fifth parameter is the register spacing register delta typically 1 For more information about Icd init and driver install refer to Device Drivers Supplied with the 401 EVB page 9 7 None Async Safe No Cancel Safe Yes Interrupt Handler Safe No 401 EVB Function Reference 10 43 ppcAbend Synopsis Library Description Errors Example Attributes References 10 44 include lt ppcLib h gt void ppcAbend void ppcLib a ppcAbend executes an invalid opcode forcing a Program Check interrupt None Force an illegal instruction exception Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual
118. C END IF WHEN IOSER5 gt IOSER IOSER1 READY4 VCC OE4 VCC WE4 VCC END CASE END C 14 401 EVB User s Manual C 2 Interleaved DRAM Controller 99 99 99 oe 5 e ke k k e ke k k k THIS INTERLEAVED DRAM CONTROLLER IS DESIGNED FOR USE WITH 60 70 NS DRAM SIMMS IN FAST PAGE MODE KKK k IK KK k k k e k k k k k k k k k k k k k k k k k k k k k kk kk kkkkkkkkkkkkkkkkkkkkk THIS DESIGN WORKS WITH 25 OR 33 MHZ EXTERNAL BUS FREQUENCIES SELECTION BETWEEN THE TWO IS DETERMINED BY MAKING SIGNAL 25 33SW EITHER HIGH OR LOW HIGH INDICATES 33MHZ OPERATION AND LOW INDICATES 25 MHZ OPERATION FOR READ OPERATIONS 0 WAIT STATE IS SUPPORTED FOR WRITE OPERATIONS 0 WAIT STATE IS SUPPORTED FOR 401GF AND 1 WAIT STATE FOR SQUALL AND PLX 9060 REFRESH IS DONE AT APPROXIMATELY 7 9US INTERVALS FOR EACH BANK AT BOTH 25 AND 33 MHZ IT IS ALSO MAINTAINED AT AN ADEQUATE RATE IF BUS FREQUENCY DROPS DOWN TO AS LOW AS 5 MHZ COMPILATION OF THE DESIGN SHOULD BE DONE WITH PUSH BACK OPTION ENABLED UBDESIGN MAVEN kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk 95 PRIMARY INPUTS kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk CLK1 INPUT 1X CLOCK CLK2 INPUT 2X CLOCK A2 INPUT ADDRESS 2 A3 INPUT ADDRESS RESET INPUT EXTERNAL RESET ADS INPUT ADDRESS STROBE EXTEND IN
119. CK 4 ACCESS3 amp W R amp DCLK1 amp BLAST amp HLDACK 4 ACCESS3 amp W R amp DCLK1 amp LA2 amp HLDACK mm CLK CLK2 mm RESET RESET TABLE CURRENT STATE INPUT1 INPUT2 NEXT STATE mm m11 m12 gt mm ml 1 x gt m0 ml 0 x gt ml 0 1 gt ml 0 0 gt m0 END TABLE kkkkkkkkkkkkkkkkkkkkkkkkk kkkkkkkkkkkkkkkkkkkkkkkkkkkkk kkkkk kkk S REFEVEN kkkkkkkkkkkkkkkkkkkkkkkkkkkkk kkkkkkkkk kkkkkkkkkkkkkkkkk kkkkkkkk 9 x11 REFRESH1 amp DCLK1 C 31 xx CLK CLK2 xx RESET RESET TABLE CURRENT STATE INPUT1 NEXT STATE xx x11 gt XX 1 1 gt 0 1 0 gt 1 x0 1 gt xl x0 0 gt x0 END TABLE kkkkkkkkkkkkkkkkkkkkkkkkk kkkkk kkkkkkkkk kkkkk kkkkkkkkk kkkkk kkkkk kkk S LA2 kkkkkkkkkkkkkkkkkkkkkkkkk kkkkk kkkkk kkkkkkkkkkkkk kkkkk kkkkk kkkkk kkk 9 oll IDLE amp A2 012 IDLE amp A2 oo CLK CLK1 RESET TABLE CURRENT STATE INPUT1 INPUT2 NEXT STATE 011 12 gt ol 1 x gt 00 ol 0 x gt ol o0 x 1 gt ol o0 x 0 gt 00 END TABLE KKK KK e e e e e ke e e e e e e ke e e e e ke e ke e ke ce e ke e ke e kk 9 LA3 kkkkkkkkkkkkkkkkkkkkkkkkk kkkkkkkkkkkkk kkkkk kkkkkkkkk kkkkk kkkkk kkk 9 tll IDLE amp A3 t12 IDLE amp A3 tt CLK CLK1
120. Change IP addresses 4 Ping test 5 Toggle ROM monitor debugger 6 Toggle automatic menu 7 Display configuration 8 Save changes to configuration 9 Set baud rate for sl boot 0 Exit menu and continue gt If the ping test fails e Verify that the local and remote IP addresses are set correctly The local IP address should be that of the board and the remote IP address should be that of the host These IP addresses were assigned during host configuration see earlier chapter Verify that the cables are connected properly falocal 10Base2 Ethernet network is being used that is one being used exclusively by the board and the host insure that both ends of the Ethernet cable have BNC T type connectors with a terminator at one end Verify TCP IP is running on the host Note The ROM Monitor will not respond to an inbound ping test from the host unless the ROM Monitor is in Debug mode via options 5 and 0 or the ROM Monitor ping test is active on the EVB at the same time via option 4 7 18 401 EVB User s Manual 7 6 6 Entering the Debugger Option 5 toggles the feature of the ROM Monitor that allows communication with the host based source level debugger Debugging may be enabled disabled and saved as part of the configuration using option 8 The debugger is not actually called by the monitor until after the user exits the main menu by selecting option 0 exit and continue Device Configuratio
121. Display Option 6 in the main menu disables the automatic monitor display when the EVB boots up After option 6 has been selected and the configuration has been saved via Option 8 the menu display is disabled but continues to function until the user exits from the main menu Following the next power on or reset the menu is no longer automatically displayed This allows the user s image to be downloaded automatically with no menu input required This feature also allows a user to download an application with no cable connected to the serial port 1 on the EVB that is without a terminal emulator After the automatic menu display has been disabled the main menu can be accessed assuming a terminal emulator is attached successfully to SP1 on the EVB by pressing any key during the first five seconds that the EVB is booting Otherwise application download processing starts without displaying the main menu 401 EVB ROM Monitor 7 21 7 6 8 Displaying the Current Configuration Option 7 displays the current configuration Enable disable tests Enable disable boot devices Change IP addresses Ping test Toggle ROM monitor debugger Toggle automatic menu Display configuration Save changes to configuration Set baud rate for sl boot Exit menu and continue N P I V Device Configuration Power On Test Devices 000 Disabled System Memory RAM 001 Enabled Ethernet ENET 004 Ena
122. E1 reset RESET STWE2 clk CLK21 STWE2 reset RESET STWE3 clk CLK21 STWE3 reset RESET To Distinguish Between Idle State and Cycle in Progress CASE STSR IS WHEN SRO gt IF ADS amp A30 amp A29 amp A28 amp A27 amp A26 amp A25 amp A24 amp A23 amp A22 amp A22 amp A21 amp A20 THEN STSR 581 ELSE STSR SRO END IF WHEN SR1 IF BLAST THEN STSR SRO ELSE STSR SR1 END IF END CASE Ready signal generation for SRAM cycles CASE STRDY IS WHEN S READYO gt IF ADS amp A30 amp A29 amp A28 amp A27 amp A26 amp A25 amp A24 amp A23 amp A22 amp A22 amp A21 amp A20 THEN STRDY S READY1 ELSE STRDY S READYO END IF WHEN S READY1 gt IF BLAST THEN STRDY S READYO ELSE STRDY S_READY1 END IF END CASE C 52 401 EVB User s Manual SRAM OUTPUT ENABLE CASE STSOE IS WHEN SRAM OEO gt A29 amp A28 amp A27 amp A26 amp A25 amp A24 IF ADS amp W R amp A30 amp amp A23 amp A22 amp A22 amp A21 amp A20 THEN STSOE SRAM 1 ELSE STSOE SRAM END IF WHEN SRAM OE1 gt IF BLAST THEN STSOE SRAM ELSE STSOE SRAM 1 END IF END CASE Least SRAM Write Byte Enable CASE STWEO IS WHEN SRAM WEOO gt IF SR amp DCLK1 amp W_ R amp ELSE STWEO SRAM WEOO END IF 0 THEN STWEO SRAM WEO1 WHEN SRAM WEO1 g
123. EAD U 3 define RD WRITE I 4 define RD WRITE D 5 define RD WRITE U 6 define RD CONTINUE 7 define RD KILL 8 define RD STEP 9 define RD READ GPR 11 define RD READ FPR 12 define RD WRITE GPR 14 define RD WRITE FPR 15 define RD READ BLOCK 17 define RD WRITE BLOCK 19 define RD ATTACH 30 define RD DETACH 31 define RD REGSET 32 define RD REATT 33 define RD LDINFO 34 define RD MULTI 35 define RD READ I MULT 70 define RD READ GPR MULT 71 define RD SINGLE STEP 100 define RD LOAD 101 define RD LOGIN 103 define RD LOGON 103 define RD LOGOFF 104 define RD FILL 105 define RD PASS 106 define RD SEARCH 107 define RD WAIT 108 Added to support ADEPT define RD READ DCR 110 define RD WRITE SPR 111 define RD WRITE DCR 112 define RD STOP APPL 113 define RD STATUS 114 define RD READ SPR 115 Added to support 403GC define RD READ TLB 116 define RD WRITE TLB 117 Added to support 602 define RD READ SR 118 define RD WRITE SR 119 401 EVB User s Manual used ONLY by target task to be traced read target instruction addr space read target data address space read offset from the user structure write target instruction addr space write target data address space write offset to the user structure continue execution terminate execution execute one or more instructions read general purpose register read floating point register write gen
124. ELSE STCS CS FF1 END IF END CASE 245 OE FLASH CS 4 PCI FLASH LCD CS SER1 CS SER2 CS PAR CS INT1 CS INT2 CS 4 INT ACK CS 4 RTC CS SerE2 CS Chip select synchronised to Ethernet clock ENET CS FF clk D ETCLK ENET CS FF prn RESET ENET CS FF D ENET CS NODE ENET CS ENET CS FF State Machine for generation of peripherals control signals IOSF clk GLOBAL CLK1 IOSF reset RESET CASE IOSF IS WHEN 0500 gt READY1 VCC OE1 VCC 1 VCC Cycle is for FLASH or PCI FLASH or or 8259 goes from 10500 to IOS1 IF FLASH_CS PCI_FLASH RTC_CS INT1_CS INT2_CS INT ACK CS THEN IOSF 1051 ELSE IOSF 10500 END IF State Machine for FLASH RTC amp 8259 to generate WE amp Ready Signals WHEN 1051 gt C 7 if 25Mhz skip 2 wait states i e goes from state 1 to state 4 IF FREQ SEL THEN IOSF IOS4 ELSE IOSF IOS2 END IF READY1 VCC IF W_ R THEN OE1 VCC WE1 VCC ELSE OE1 VCC WE1 GND END IF WHEN 1052 gt IOSF 1053 READY1 VCC IF W_ R THEN OE1 GND WE1 VCC ELSE OE1 VCC WE1 GND END IF WHEN 1053 gt IOSF 1054 READY1 VCC IF W_ R THEN OE1 GND WE1 VCC ELSE OE1 VCC WE1 GND END IF WHEN 1054 gt IOSF IOS5 READY1 VCC IF W_ R THEN OE1 GND WE1 VCC ELSE
125. ERRUPT CONTROLLER1 1 1 CS 0 6 29 amp A28 amp A27 6 A26 amp A25 amp A24 amp A23 A22 amp A21 amp A20 amp A19 amp A18 amp A17 amp A16 1 15 amp 14 6 A13 6 A12 6 11 amp 10 amp A9 amp A7 amp A6 amp 5 amp A4 amp A3 amp A2 1 1 amp CS FF m m m m 7E00 0480 7E00 0481 INTERRUPT CONTROLLER2 INT2 CS A30 6 29 amp 28 6 27 6 26 amp A25 amp A24 amp A23 amp A22 amp A21 amp A20 amp A19 amp A18 amp A17 amp A16 amp 15 amp A14 6 A13 amp A12 6 11 6 A10 6 A9 5 amp 1 8 amp 7 amp A6 amp 5 amp A4 A3 amp A2 amp 1 1 amp CS FF 7 00 0402 7E000402 8259 INTERRUPT ACK INT CS A30 amp 29 amp A28 amp 27 6 A26 amp A25 amp A24 amp A23 amp A22 amp A21 amp A20 amp A19 amp A18 amp A17 amp A16 8 15 amp A14 amp A13 amp A12 amp 11 6 10 amp 1 9 amp A8 amp A7 6 A6 amp A5 amp 4 amp A3 amp 1 2 6 Al amp AO amp CS FF 7 00 0200 7E00 0200 Serial EEPROM SerE2 0 6 29 6 28 6 27 6 A26 amp A25 6 A24 amp A23 amp A22 amp A21 amp A20 amp A19 amp A18 amp A17 amp 16 amp 15 amp 14 amp A13 amp A12 amp 11 amp A10 amp A9 amp A8 amp A7 6 A6 amp A5 amp 4 amp A3 amp 1 2 amp Al amp AO am
126. ESET STATE amp W R amp HLDACK amp W R amp HLDACK amp W R amp HLDACK DCLK1 IDCLK1 BLAST amp XTEND IDCLK1 BLAST amp LA2 DCLK1 amp HLDACK DCLK1 amp HLDACK amp REFEVEN DCLK1 amp HLDACK amp LA2 DCLK1 amp HLDACK amp BLAST DCLK1 amp HLDACK amp BLAST INPUT1 INPUT2 111 112 1 x 401 EVB User s Manual NEXT STATE gt 11 gt 10 11 0 x gt 11 10 x gt 11 10 x 0 gt 10 END TABLE e ke se e e e ke e e se e e e he e ke se e e e e e ke e e e e e e ke e ke se e ke e e e ke e ke e ke e kk 9 CASPIPO kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk m11 554 W R DCLK1 amp XTEND 4 XTEND amp SXTEND amp DCLK1 amp BLAST ACCESS6 amp W R amp DCLK1 4 555 amp DCLK1 amp BLAST W R 555 amp W R amp DCLK1 amp HLDACK 4 REFRESH2 amp DCLK1 4 554 amp R DCLK1 amp HLDACK 4 556 amp W R DCLK1 amp HLDACK m12 ACCESS2 amp W R amp LA2 amp BLAST amp DCLK1 amp XTEND 4 552 R LA2 6 DCLK1 4 ACCESSA amp W R amp DCLK1 amp BLAST amp XTEND 554 6 W R amp DCLK1 amp HLDACK 4 REFRESHO amp DCLK1 amp REFEVEN 4 ACCESS5 amp W R amp DCLK1 amp BLAST amp HLDA
127. EVB User s Manual 401 EVB Sample Applications 8 5 issue the command export PATH SPATH usr osopen bin usr highcppc bin OR to update your PATH permanently Edit profile using an editor such as vi e Add PATH SPATH usr osopen bin usr highcppc bin as a line in your profile before the line export PATH Run profile to update your profile For PC hosts e Edit AUTOEXEC BAT using an editor such as you should back this file up before editing If the following statement is missing add it to the end of the file SET PATH C highcppc bin C osopen bin PATH e AUTOEXEC BAT to update your path NOTE The make utility supplied with your evaluation kit may not run under a Windows NT command prompt that is started by cmd exe To avoid potential problems start a DOS command prompt using the command COMMAND COM and compile from there Also some Windows 95 users may receive a Program Requires MS DOS Mode pop up message when compiling To prevent this annoying message from occurring select Properties for the MS DOS window you are compiling from then select Advanced and ensure that the Suggest MS DOS mode as necessary box is not checked 8 3 1 Building and Running the Dhrystone Benchmark The Dhrystone benchmark is a commonly available integer benchmark Since the main loop of this benchmark fits into the caches of many processors its validity as a predictor of System perform
128. Ethernet getchar reads one character at a time from the keyboard buffer over the first serial port SP1 Siputchar writes one character to the first serial port SP1 Applications must follow a predefined protocol to access ROM Monitor user functions An example showing the proper calling procedures are included in the samp c sample program in the samples directory This sample program calls the get board cfg ROM Monitor function to determine the amount of DRAM installed on the board This program will be run as a sample program in the next chapter 7 8 Flash Update Utility The openbios flash directory contains all the code you need to re program the flash memory on the EVB This utility takes a binary image file targeted for the ROM as input and generates a loadable file that will re program the flash memory with the data in the binary input file The file can then be loaded by an existing ROM Monitor version which will be over written upon successful completion of the loaded program or via RISCWatch JTAG IMPORTANT Please see the readme txt file in the openbios flash directory for important information regarding the use of this tool Be aware that if you use the ROM Monitor bootp or the RISCWatch ROM Monitor mode download process to re program the flash and the program loaded contains errors that will not allow you to download images in the same manner your flash may be corrupted and rendered useless In this
129. Expansion Test Interface Connector 5 8 Squall Expansion Interface on inerenti 5 11 Power Connector edere terere ir E ERR ipe mire ei EE g uu 5 14 PCI Related Connectors a eee eme ee ei tire ERR 5 15 setting tlhie EVB Jumperts cent reete rre direi 5 17 Connecting the 401 EVB Hardware sese eene 5 21 Serial Port Corinection it ed eee tre RP dine 5 21 Ethernet GonnectlOn o tete 5 22 Power Supply Connection eese 5 25 Using a Terminal Emulator eese nnne nnne 5 25 RS 6000 Terminal Emulation seen 5 26 T rminal EmulatlOn c oreet eee one te cae cante ee h tee ee 5 26 SUN Terminal Emulation 5 27 Booting the PowerPC 401 on the 5 28 401 EVB LT ILU 6 1 401GFE OVOtvI W 2 could EE e t Oe e iei 6 2 Peripheral Comporlents u uu uuu uu E E ERE ERE u 6 3 Mechanical 8 6 5 6 5 cgo 6 6 Power Supply 6 6 nitializat r a a 6 7 E dian EE E HERE 6 8 vi 401 EVB User s Manual Wty
130. H25D SH 25 PTH HEADER ELL CONNPCI DIP BASE 72G0316 J8 1 AMP 646255 1 PCI2X605V 2X60 32 BIT PCI CON NECTOR CONNPOWER DIP BASE 55X8085 11 1 MOLEX 15 48 0212 55X8085 1X120 156 CL FRET LCK HDR CONNRISC_DIP BASE XXXXXXX_ J17 1 THOMAS amp PS 16DS HBA CONNESP403 2X8 100MIL KEY BETTS HEADER VERTICAL Note remove pin 14 before assembly CONNS72_DIP BASE 64F5806 1 2 2 AMP 821997 3 CONN_64F5806 72 PIN SIMM CONNEC TOR CONNSERIAL_DIP BASE 90X8092 J6 J19 2 AMP 748879 1 CONN 90 8092 9 PTH D SHELL HEADER CONNSQUALL DIP BASE XXXXXXX J4 1 AMP 1 104652 0 CONN_SMC_AMP1 2X50 SQUALL CON 104652 0 NECTOR CRYSTL DO_NOT_POP NONE Y1 1 NONE NONE XTALSMT2 CRYSTAL DC_CONV_DIP BASE XXXXXXX U59 1 VALOR PM7202 DC DCCNVT_PM72 ETHERNET DC CON VERTER 9 enuen SJeS GAA LOr Table D 1 401 EVB Bill of Materials Continued Ref Manufac E Part Name Part D Qty Manufac Part JEDEC_Type Part Description es Name DP83902A SMD BASE 5907143 U38 1 NATIONAL DP83902AVJG 100QFP S STNIC ETHERNET CNTL DP8392C SMD BASE XXXXXXX U58 1 NATIONAL DP8392CV PLCC28 COAX TRANCEIVER INTERFACE DS1233 SMD BASE 05H1621 U6 1 DALLAS DS1233DZ 10 SOT223 VOLTAGE MONITOR WITH RESET DS1643L_SKT_SMD BASE XXXXXXX J14 1 MCKENZIE PLCC26P SMT 3 PLCC26SKT RTC SOCKET DS1643L SMD BASE XXXXXXX M8 1 DALLAS DS1643L 120 PART NVRAM RTC ELCAP 10UF 20 71F7911 C79 C238 2 NEC TESVEC1C106M12R SMC2312 CAPACITOR
131. HUP process id Bootp and tftp configuration is complete 7 4 Accessing the ROM Monitor The ROM Monitor expects a real or emulated VT100 type ASCII display attached to serial port 1 with line protocol parameters of 9600 baud eight bits per character no parity and one stop bit Once the terminal connected to SP1 is configured properly you can access the ROM Monitor menu options use the ping test and load an application onto the evaluation board The ROM Monitor also provides the interface to the RISCWatch debugger This facility along with the image download process is accessed via an IP network connnection to the host workstation Network configuration of the host was discussed earlier in the chapter on host configuration The actual connection is either via SLIP Serial Link Interface Protocol running on serial port 2 at speeds up to 56K baud or via standard Ethernet using the 10Base2 or 10BaseT connector on the evaluation board 7 5 ROM Monitor Operation The ROM Monitor requires a block of DRAM for its operation and makes some assumptions about applications loaded on the board Some of these assumptions may be disregarded if you do not need the ROM Monitor to interface with a debugger or otherwise support communication between the host workstation and the EVB Applications wishing to coexist with the ROM Monitor must observe the following constraints Do alter the EVPR register Provide exception vectors for ap
132. I Memory 0x38000000 0x3FFFFFFF and 0xB8000000 0xBFFFFFFF Squall Interface 0x40000000 0x4FFFFFFF and 0xC0000000 0xCFFFFFFF All other regions are typically programmed as big endian 6 8 401 EVB User s Manual 6 9 Utility Port Miscellaneous board control functions are handled by the Utility Port located at address 0x7E000200 This port controls critical interrupts slow mode refresh and Squall serial EEPROM access Bits in this port are write only except bits 7 and 4 which are read write This port resets to all bits low Table 6 3 Utility Port Bit Assignments Bit Description Access 7 MSb Squall EEPROM serial data Read Write 6 Squall EEPROM serial data enable Write Only 0 hiZ 1 enable 5 N C Write Only 4 Squall EEPROM serial clock Read Write 3 Critical Interrupt Acknowledge Write Only O crit irpt enabled 1 remove crit irpt 2 N C 1 N C 0 LSb Slow Mode Write Only O refresh rate for 25 MHz 1 refresh rate for 5MHz 401 EVB Hardware 6 9 6 10 Ethernet Remote DMA Ports According to the data sheet of the 83902 Ethernet chip the PRQ signal is a handshake control between the Ethernet chip and its host processor During DMA reads Ethernet to 401 the 83902 places PRQ high to indicate that data is available During DMA writes 401 to Ethernet the 83902 places PRQ high to indicate that it is prepared to accept data Therefore this board has one address 0x74000010 to read the status of P
133. IBM PowerPC 401 Evaluation Board Kit User s Manual 92G8619 000003 Fourth Edition March 1998 This edition of the BM PowerPC 401 Evaluation Kit User s Manual applies to the IBM PowerPC 401 Evaluation Board Kit and to all subsequent versions of the 401 Evaluation Board Kit until otherwise indicated in new versions or technical newsletters The following paragraph does not apply to the United Kingdom or any country where such pro visions are inconsistent with local law INTERNATIONAL BUSINESS MACHINES CORPORATION PROVIDES THIS MANUAL AS IS WITHOUT WARRANTY OF ANY KIND EITHER EXPRESSED OR IMPLIED INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANT ABILITY AND FITNESS FOR A PARTICULAR PURPOSE Some states do not allow disclaimer of express or implied warranties in certain transactions therefore this statement may not apply to you IBM does not warrant that the contents of this publication or the accompanying source code examples whether individually or as one or more groups will meet your requirements or that the publication or the accompanying source code examples are error free This publication could contain technical inaccuracies or typographical errors Changes are periodically made to the information herein these changes will be incorporated in new editions of the publication IBM may make improvements and or changes in the product s and or program s described in this publication at any time It is possible t
134. INFO A 31 RL LOAD REQ A 32 MSGDATA structure A 1 overview A 1 Q Queue Library 9 2 R RAM Disk Library 9 2 Rate Monotonic Scheduling RMS Library 9 2 Real time Executive 9 3 Real time Clock Interface Support Library 9 5 related publications xxiii Remote Source Level Debug Library 9 2 Ring Buffer Library 9 2 ROM Boot Library 9 5 ROM monitor accessing 7 8 bootp and tftp configuration for loads 7 2 PC 7 4 7 6 RS 6000 7 2 communication features 7 2 menus 7 9 changing IP addresses 7 15 disabling the automatic display 7 21 displaying the current configuration 7 22 entering the debugger 7 19 exiting the main menu 7 28 initial ROM monitor menu 7 9 saving the current configuration 7 23 selecting boot devices 7 13 selecting power on tests 7 11 using the ping test 7 17 source code 7 1 user functions 7 30 ROM Monitor Ethernet Interface Library 9 2 ROM monitor load format boot header B 3 overview B 1 section types B 1 data section B 3 first section B 2 symbol section B 3 sections types text section B 3 RPC Support Library 9 2 RS 6000 host configuration 4 1 ethernet setup 4 5 serial port setup 4 1 RS 6000 installation 3 1 RISCWatch debugger 3 4 software support package 3 1 rtx o library 9 3 rtxLib a library 9 3 Runtime Library 9 2 S sidbprintf function 10 114 s2dbprintf function 10 115 sample applications overview 8 1 resolving problems 8 9 bootp and tftp servers 8 10 using the ping test 8 9 ROM monitor flash imag
135. KIKI KKK 99 3 RASE amp DCLK1 k RASE amp DCLK1 zz CLK CLK2 zz RESET RESET TABLE C 24 401 EVB User s Manual CURRENT STATE INPUT1 INPUT2 NEXT STATE zz j k gt ZZ 21 1 gt 20 21 0 gt 21 20 1 gt 21 20 0 gt 20 END TABLE kkkkkkkkkkkkkkkkkkkkk kkkkkkkkk kkkkkkkkk kkkkk kkkkkkkkk kkkkk kkkk kkk 9 BANKSELA kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk S b11 IDLE amp A2 ACCESS3 XTEND ACCESSS b12 IDLE amp A2 ACCESS4 amp XTEND bb CLK CLK1 bb RESET RESET TABLE CURRENT STATE INPUT1 INPUT2 NEXT STATE bb b11 b12 gt bb b1 1 x gt b0 bl 0 x gt bl b0 x 1 gt b1 bo x 0 gt b0 END TABLE kkkkkkkkkkkkkkkkkkkkk kkkkk kkkkk kkkkkkkkkkkkkkkkk kkkkkkkkk kkkkkkk 9 BANKSELB g kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk S cll IDLE amp A2 ACCESS3 amp XTEND ACCESSS 12 IDLE amp A2 ACCESS4 amp XTEND cc CLK CLK1 cc RESET RESET TABLE CURRENT STATE INPUT1 INPUT2 NEXT STATE c11 c12 gt cc c1 1 x gt c0 C 25 cl 0 x 1 0 END TABLE gt cl gt cl gt c0 kkkkkkkkkkkkkkkkkkkkkkkkk kkkkk kkkkkkkkk kkkkkkkkkkkkkkkkk kkkkk kkk 9 CAS EVEN BYTE ENABLE 0 kkkkkkkkkkkkkkkkkkkkk kkkkk kkkkk kkkkkkk
136. KKKK KK KKK KK KK e Se e ke e ke e e e e e e ke e ke e ke ke e ke e ke ce e ke e ke 9 CAS ODD BYTE ENABLE 1 KK KK KK KKK IK IK KK HK KKK e e e he IKI IKK KKK e e e ehe S ill QA4 amp CASPIPO QA4 WAIT amp BLAST W_ R amp DCLK1 amp XTEND QA4 6 CASPIPO 112 QA4 amp CASPIPO amp 1 4 0 4 amp CASPIPO ii CLK CLK2 ii RESET RESET C 28 401 EVB User s Manual TABLE CURRENT STATE INPUT1 INPUT2 NEXT STATE ii i11 i12 gt ii il 1 x gt i0 il 0 x gt il io x 1 gt il iO x 0 gt 10 END TABLE kkkkkkkkkkkkkkkkkkkkkkkkk kkkkkkkkkkkkkkkkkkkkkkkkk kkkkk kkkkk kkk S CAS ODD BYTE ENABLE 2 Z kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk S j11 QA4 amp CASPIPO QA4 WAIT amp BLAST W_ R amp DCLK1 amp XTEND 0 4 amp CASPIPO j12 QA4 amp CASPIPO amp BE2 4 0 4 amp CASPIPO jj CLK CLK2 jj RESET RESET TABLE CURRENT STATE INPUT1 INPUT2 NEXT STATE ji 311 312 gt jj 31 1 gt 30 31 0 gt 31 30 1 gt 31 30 0 gt 30 END TABLE kkkkkkkkkkkkkkkkkkkkk kkkkk kkkkkkkkk kkkkk kkkkkkkkkkkkk kkkkk kkkk kkk S CAS ODD BYTE ENABLE 3 Z kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk S k11 QA4 amp CASPIPO QA4 WAIT amp BLAST W R amp DCLK1 amp XTEND
137. LX Technology PCI9060 3 401 EVB Hardware 6 3 5 DRAM The board is equipped with two 72 pin SIMM sockets for 5 volt 70 nsec fast page mode DRAM with 130nsec read write cycle time The DRAM control is interleaved therefore both sockets must be populated Board logic accepts up to 64MB of DRAM SIMMs may be single sided or double sided The following restrictions on memory usage apply Both SIMM sockets must be identically populated both single sided or both double sided and both the same memory size e Board jumpers specify the SIMMs See Table 5 14 for jumper programming of SIMM size 6 SRAM Four 128Kx8 modules of 12 nsec SRAM in 32 pin 400 mil SOJ packages socketed 7 Flash Two 512Kx8 devices AMD 29F040 socketed 8 Interrupt Controllers Two 82C59 controllers cascaded 9 Power On Reset Dallas DS1233 6 4 401 EVB User s Manual 6 3 Mechanical Specifications The card outline 5 2x12 283 inch is one inch taller than the standard full sized PCI card 5V 32 bit The card will fit in PCs which can tolerate the extra height by removal of the cover User access to the top edge of the card is assumed since that edge mounts serial port and parallel port connectors and the expansion interface The card can be used in two ways 1 Asa PCI adapter card assumed to be installed in a PC 2 Asa stand alone development card lying horizonal on a bench The card will accept nylon standoffs to serve as feet fo
138. M monitor debugger Toggle automatic menu Display configuration Save changes to configuration Set baud rate for sl boot Exit menu and continue i gt Q N EH gt Remember to use Option 8 to save any configuration changes that you may have made If the changes are not saved they will be lost upon an exit from the menu or upon a board reset 7 12 401 EVB User s Manual 7 6 3 Selecting Boot Devices Option 2 in the main menu enables and disables boot devices Enable disable tests Enable disable boot devices Change IP addresses Ping test Toggle ROM monitor debugger Toggle automatic menu Display configuration Save changes to configuration Set baud rate for sl boot Exit menu and continue N P I V N When option 2 is selected the following submenu is displayed ENABLE AND DISABLE BOOT DEVICES Boot Sources 001 Enabled Ethernet ENET local 7 1 1 5 hwaddr 1000abcdef55 004 Enabled Serial Port 2 hwaddr ffffffffffff 005 Enabled Serial Port 1 Baud 9600 select device to change gt 52 local 8 1 1 5 S1 remote 7 1 1 4 remote 8 1 1 4 Selecting a device toggles its boot status Selecting 4 for example would disable Serial Port 2 as a boot device select device to change gt 4 Selects serial port After the selection has been made the new setting is displayed followed by the main menu
139. Monitor Will wait for you to restore the baud rate 9600 and hit enter prior to executing the downloaded program This prevents any program I O from being lost or incorrectly displayed when it begins execution The following is an example of what you might see when the program is allowed to run Loaded successfully Entry point at 0x23130 401 EVB ROM Monitor 7 29 7 7 Monitor User Functions The ROM Monitor contains several functions that are available to user programs The prototypes of these functions can be found in the usr func h file in the usr osopen PLATFORM include directory osopen PLATFORM include for PC users These functions include send packet on bootdev allows an IP packet to be sent over the device that was used to load the application program either the Ethernet or the second serial port SP2 Sh register used to register a function that will be called when an IP packet is received by the ROM Monitor over the boot device e get board cfg reads the configuration data associated with the board enet send macframe allows a frame to be sent over the Ethernet enet register allows the user to register an IP address for the Ethernet an IP address different from that assigned to the ROM Monitor and to specify a func tion to be called when a frame arrives for that address enetisThere determines if the Ethernet chip is present on the board enetlnit initializes the
140. NER 1 2 TALL 3 16 DIA 4 40 THREAD STANDOFF LCD XXXXXXX 2 NAPPCO NYLON STANDOFF FASTENER 7 16 TALL 3 16 DIA 2 56 THREAD XFORM COAX DIP BASE XXXXXXX U50 1 VALOR LT6032 DIP16 300 ETHERNET TRANS FORMER enuen SJeS GAA LOr Table D 1 401 EVB Bill of Materials Continued 30 50PPM 18PF Ref Manufac Part Qty Manufac Part JEDEC_Type Part Description Des Name XFORM_TWST_DIP BASE XXXXXXX U37 VALOR FL1012 FILTER_VALOR FL1012 ETHERNET TRANS FORMER XTAL 25 00000MHZ 40H8794 Y2 DAISHINKU HC49U 25MHZ CLP XTAL Index A Alignment Exception Support Library 9 1 ANSI C I O Library 9 1 ANSI C Library 9 1 ANSI C Math Library 9 1 async safe 10 1 async init function 10 10 asyncLib a library 9 4 B biosenet attach function 10 11 Block Buffer Library 9 1 book conventions used xxi highlighting xxi numeric xxi syntax diagrams xxii how organized xx who should use this book xix Boot Library 9 1 9 4 booting the processor 5 28 C C runtime support library 9 2 cancel safe 10 2 Clock Support Library 9 2 clock set function 10 13 clockchip nvram read function 10 16 10 21 clockchip nvram write function 10 17 10 22 clockchip set function 10 14 10 15 10 18 10 19 10 20 clockchip set calibration function 10 24 clockchip start function 10 25 clockchip stop function 10 26 clockLib a library 9 5
141. NOT turn off power or press reset until this procedure is completed Otherwise the card may be permanently damaged Do you wish to continue y or n y Verifying new FLASH Image 131072 matches 0 mismatches Update complete All done 8 3 Usingthe Software Samples The sample application programs are in usr osopen PLATFORM samples osopen PLATFORM samples for PC users It is recommended that users first build and run the Dhrystone usr_samp and timesamp sample programs as detailed below to become familiar with the working environment These sample programs use basic_os c to provide a minimal OS Open configuration Additional details regarding the sample programs and application development in general can be found in the Developing OS Open Applications chapter in the BM OS Open User s Guide That chapter should be referenced for instructions on building and running the applprog benchmk mailsamp and cat sample programs The sample makefile contains the directives needed to build all the sample programs It is suggested that this makefile be used as the starting point for building subsequent user applications Before attempting to build the samples ensure the osopen bin directory and the directory that contains the compiler are part of your execution path these steps should be modified accordingly based on where the compiler and the software support package were actually installed For RS 6000 and SUN hosts 8 4 401
142. O DRAMADDR IS BEING DECODED USING A 30 27 OF ADDR BUS DRAMADDR A30 amp A29 amp A28 amp A27 DEASSERT CAS SIGNALS IF BLAST ACTIVE WAIT IDLE W R 4 ACCESSO amp W R 551 amp W R 4 ACCESS2 amp W R C 22 401 EVB User s Manual ACCESS3 amp W R amp LA2 REFRESH WHEN BOTH COUNTERS COUNTDOWN TO O REFREQ COUNT13 amp COUNT12 amp COUNT11 amp COUNT10 amp COUNT23 amp COUNT22 amp COUNT21 amp COUNT20 DATA READ OUTPUT ENABLE RDEN QA4 amp W R amp RASE EVEN BANK DATA WRITE ENABLE WRE QA4 amp W R amp RASE ODD BANK DATA WRITE ENABLE WRO QA4 amp W R amp RASE kkkkkkkkkkkkkkkkkkkkkkkkk kkkkk kkkkk kkkkkkkkkkkkk kkkkkkkkk kkkkk kkk 9 A30DD kkkkkkkkkkkkkkkkkkkkkkkkk kkkkkkkkk kkkkkkkkk kkkkkkkkk kkkkk kkkk kkk 9 ge IDLE amp amp DCLK1 4 554 W R DCLK1 amp amp XTEND 4 555 amp R amp DCLK1 y IDLE amp A3 amp DCLK1 ACCESS4 amp W_ R amp DCLK1 amp LA3 amp XTEND ACCESS5 amp W R amp DCLK1 SS CLK CLK2 ss RESET RESET TABLE CURRENT STATE INPUT1 INPUT2 NEXT STATE ss z gt SS 51 1 gt 650 51 0 gt sl 50 1 gt 61 50 0 gt 50 END TABLE C 23 kkkkkkkkkkkkkkkkkkkkkkkkkkkkk kkkkkkkkk kkkkkkkkk kkkkk kkkkk
143. PUT WAIT FOR SLOW SQUALL DEVICE READ COMPLETION 25 33SW INPUT LOW 25MHZ HIGH 33MHZ OPERATION S5MHZ INPUT HIGH INDICATES 401 MEMCLK CLK HAS BEEN REDUCED BLAST INPUT BURST LAST W_ R INPUT PROCESSOR READ WRITE A30 INPUT ADDRESS A30 A29 INPUT ADDRESS A29 A28 INPUT ADDRESS A28 A27 A25 A23 A21 PD2 PD1 PDO HOLDACK DCLK1 BE3 BE2 BE1 BEO M_SPARE1 INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT 99 dP oe oe oe 99 de de oe oe oe oe ADDRESS A27 ADDRESS A25 ADDRESS A23 ADDRESS A21 oe oe oe SIMM SIZE HOLDACK SIGNAL FROM 401GF DELAYED 1X CLOCK BYTE ENABLE 3 BYTE ENABLE BYTE ENABLE BYTE ENABLE SPARE INPUT OF N kkkkkkkkkkkkkkkkkkkkk kkkkk kkkkk kkkkkkkkk kkkkkkkkkkkkk kkkkk kkkk kkk 9 PRIMARY OUTPUTS kkkkkkkkkkkkkkkkkkkkk kkkkk kkkkk kkkkkkkkkkkkkkkkk kkkkkkkkk kkkkk kkk S WRO WRE CASEF_B0 CASEE B1 CASEE B2 CASEE B3 CASOO BO CASOO B1 CASOO B2 CASOO B3 ADDRMUX RASE A3ODD A3EVEN RASO RDY BANKSELA BANKSELB RDEN RASE 0 RASE 1 RASO 0 RASO 1 VARIABLE AAA DFF C 16 OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT 99 de 99 de oe P
144. Program Item Properties window requires that you provide Description Command Line and Working Directory values The following example shows one possible configuration Description BOOTPD Command Line BOOTPD C D H 7 1 1 4 Working Directory In the above example the command line specifies how to invoke the bootpd server and the working directory specifies where to find the bootpd server program bootpd exe The C parameter is used to specify a drive letter that is used in conjunction with bootptab file entries Because the colon is used as a delimiter in bootptab file entries the C parameter is used as a mechanism by the bootpd server to concatonate a drive letter to the beginning of the hd field If the C option is not specified the current drive will be used as a default The H parameter is used to specify the Ethernet or slip IP address of the host PC set during host configuration to the bootpd server 401 EVB ROM Monitor 7 5 Use the same procedure to set up the tftpd server In this case the Program Item Properties window entries will describe information used for the tftpd server The following example shows a possible configuration Description TFTPD Command Line TFTPD Working Directory If you do not wish to have the bootpd and tftpd servers run automatically upon entering Windows they can be run individually from the Windows Program Manager File Run menu Note that
145. RD READ Response A 19 RD READ I MULT Request Table A 20 RD READ MULT Response Table A 20 RD READ SPR Request Table A 21 RD READ SPR Response A 21 RD STATUS Request Table eee A 22 RD STATUS Response Table ee A 22 RD STOP APPL Request A 23 RD STOP APPL Response Table a A 23 RD WAIT Request essem A 24 RD WAIT Response Table u A 24 RD WRITE BLOCK Request Table A 25 RD WRITE BLOCK Response Table A 25 RD WRITE D Request Table A 26 RD WRITE D Response Table A 26 RD WRITE DCR Request sse A 27 RD WRITE DCR Response A 27 RD WRITE Request Table a A 28 RD WRITE Response
146. RQ It appears as the high order bit of the byte This port address is read only When a read of the PRQ Status port finds PRQ high Ethernet Remote DMA data may be read or written to 0x74000011 which is an exchange port between the 401 and the packet SRAM which is managed by the 83902 Table 6 4 Ethernet DMA PRQ Status Bit Description Access 7 Ethernet PRQ Read Only 6 0 undefined Table 6 5 Ethernet Remote DMA Port Bit Description Access 7 0 Ethernet data Read Write 6 10 401 EVB User s Manual 6 11 401 EVB Memory Map The memory map of the 401 EVB is as follows PowerPC 401GF Board Memory Map FFF8 0000 gt FFFF FFFF Boot Flash 512K FFFO 0000 gt FFF7 FFFF PCI Expansion Flash 512K F000 0000 BRCR 7 8 bit unused E000 0000 BRCR 6 unused D000 0000 BRCR 5 C000 0000 gt CFFF FFFF Squall 256M C000 0000 4 32 bit B800 0000 gt BFFF FFFF Local to PCI Memory 128M 000 0000 gt B7FF FFFF Local to PCI I O 128M 000 0000 BRCR 3 32 bit A000 0000 BRCR 2 32 bit 9000 0000 BRCR 1 32 bit 8000 0000 BRCR 0 32 bit 401 EVB Hardware 6 11 7 01 0000 gt 7 01 1FFF 7E00 0480 gt 7E00 0481 7E00 0402 7E00 0400 gt 7E00 0401 7E00 0300 gt 7E00 0301 7E00 0200 7E00 0100 gt 7E00 0103 7E00 0080 gt 7E00 0087 7E00 0000 gt 7E00 0007 7400 0011 7400 0010 7400 0000 gt 7400 000F
147. RR1 are set for protection external alignment program PIT FIT and syscall interrupts None Retrieve the current value of the SRRO An exception handler may use this value to determine the point of exception unsigned long current srr 0 ppcMfsrr0 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes ppcMfsrr1 p 10 81 PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMfsrr1 include lt ppcLib h gt unsigned long ppcMfsrr1 void ppcLib a ppceMfsrr1 returns the current value of SRR1 Typically SRR1 is used in interrupt handlers as it contains the old MSR value as well as information bits specific to the interrupt The file lt ppcLib h gt contains several constants that can be used when setting the MSR values the SRR1 register None Retrieve the current value of SRR1 This register contains the saved MSR which may be needed by an exception handler unsigned long current srrl ppcMfsrrl Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 81 ppcMfsrr2 Synopsis Library Description Errors Example Attributes References 10 82 include lt ppcLib h gt unsigned long ppcMfsrr2 void ppcLib a ppcM srr2 returns the current value of SRR2 Typically SRR
148. S A23 A22 INPUT ADDRESS A22 A21 INPUT ADDRESS A21 A20 INPUT ADDRESS A20 LA3 INPUT ADDRESS LA2 INPUT ADDRESS A2 BE3 INPUT 5 BYTE ENABLE 3 BE2 INPUT BYTE ENABLE 2 BE1 INPUT BYTE ENABLE 1 ADDRESS Al BEO INPUT BYTE ENABLE 0 ADDRESS AO PUSH CRIT INT INPUT Critical Interrupt from DS1233 PCI_SERR INPUT PCI System error signal INT_REMOVE INPUT Input to remove critical interrupt S_SPARE1 INPUT SPARE INPUT S_SPARE2 INPUT SPARE INPUT S_SPARE3 INPUT SPARE INPUT C 45 S 5 4 ACK PRO PRD OE WE SerE2 CS ENET CS LATCH CS INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT SPARE INPUT Ethernet register sync hand shaking Signal Ethernet Remote DMA hand shaking Signal Port Read control from ethernet controller Output Enable for peripherals Write Enable for peripherals Serial EEPROM chip select from I O controller Ethernet chip select from IO controller ETHERNET PRQ status and 646 latch chip select ke ke k he ke Se e he k ke e k e he k k e ke k k e e k k ke ce k k k e k k k k k k k k k k k k S k k ke k e e k k k k k k OUTPUT SIGNALS k k k ke e k e k S e k ke ke Fe ke ke He He ke ke ke He ke ke ke He ke ke ke KK KKK KK KK k k k k k SRAM_OE SRAM WEO
149. SEL THEN ARB ARB4 ELSIF REQ1 amp SQBR amp 9060_REQ amp ARBSEL THEN ARB7 ELSIF PCI REQ2 amp REQ1 amp SQBR amp 9060 REQ amp ARBSEL THEN ARB ARB10 C 54 401 EVB User s Manual ELSE ARB ARBO END IF WHEN ARB1 401 HOLD VCC 9060 HOLDA GND IF 9060 REQ THEN 9060 GNT GND ELSE 9060 GNT VCC END IF SQBG VCC PCI GNT1 VCC PCI GNT2 VCC IF 401 HOLDA THEN ARB ARB2 ELSE ARB ARB1 END IF WHEN ARB2 gt 401_HOLD VCC 9060_HOLDA VCC IF 9060_REQ THEN 9060_GNT GND ELSE 9060_GNT VCC END IF SQBG VCC PCI_GNT1 VCC PCI_GNT2 VCC IF 9060_HOLD THEN ARB ARB3 ELSE ARB ARB2 END IF WHEN ARB3 gt 401_HOLD GND 9060_HOLDA GND IF 9060_REQ THEN 9060_GNT GND ELSE 9060_GNT VCC END IF SQBG VCC PCI_GNT1 VCC PCI_GNT2 VCC IF 401 HOLDA THEN ARB ARBO ELSE ARB ARB3 END IF WHEN ARB4 gt 401_HOLD VCC 9060_HOLDA GND IF 9060_REQ THEN 9060_GNT GND ELSE 9060_GNT VCC END IF C 55 SQBG VCC PCI GNT1 VCC PCI GNT2 VCC IF 401 HOLDA THEN ARB ELSE ARB ARB4 END IF ARB5 WHEN ARB5 gt 401_HOLD VCC 9060_HOLDA GND IF 9060_REQ THEN 9060_GNT ELSE 9060_GNT VCC END IF SQBG GND PCI_GNT1 VCC PCI_GNT2 VCC IF SQBR THEN ARB ARB6 ELSE ARB ARB5 END IF GND WHEN ARB6 gt 401_HOLD GND 9060_HOLDA GND
150. SS6 gt ACCESS ACCESS gt IDLE ACCESS7 gt ACCESS4 ACCESS8 gt IDLE na x nb x x x x x x nc nd ne no np x x x x C 40 401 EVB User s Manual x nf x ng x x ni x nj x nk nl x x x x x x nn REFRESHO gt REFRESH1 REFRESH1 gt REFRESH2 REFRESH2 gt REFRESH3 REFRESH3 gt IDLE REFRESH4 gt IDLE REFRESH5 gt IDLE END TABLE na x x x x nb nc nd ne no np x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x nf x x x x ng x x x x nh ni X X X X x X x X x x x X nj x x x x nk nl x X x X x x xl x x X x x kkkkkkkkkkkkkkkkkkkkkkkkk kkkkk kkkkkkkkkkkkk kkkkk kkkkk kkkkk kkkkk kkk 9 REFRESH LOWER COUNTER kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk S 3111 0 4 amp Z20 111 QA4 vv CLK CLK1 vv RESET RESET TABLE CURRENT STATE vv 210 210 211 211 212 212 213 213 214 CURRENT INPUTs 3111 k111 x NEXT STATE vv 210 2115 2115 210 2115 211 2115 212 2115 nm x x x x C 41 214 2 0 215 x 1 215 0 216 1
151. STATE rr ril 12 gt rr rl 1 x gt r0 rl 0 x gt rl 1 gt rl ro X 0 gt r0 END TABLE kkkkkkkkkkkkkkkkkkkkkkkkk kkkkkkkkkkkkkkkkk kkkkkkkkkkkkk kkkkk kkk S RDY kkkkkkkkkkkkkkkkkkkkk kkkkk kkkkk kkkkk kkkkkkkkkkkkk kkkkk kkkkk kkkkk kkk S ull W R amp BLAST amp XTEND W R amp blast amp HLDACK W_ R amp blast 012 ACCESS2 amp LA2 ACCESS3 amp LA2 HLDACK amp R 4 ACCESS3 amp W R LA2 ACCESS4 amp W R amp HLDACK ACCESS6 amp HLDACK amp W R uu CLK CLK1 uu RESET RESET TABLE CURRENT STATE INPUT1 INPUT2 NEXT STATE uu ull 112 gt uu 11 1 gt ul ul 0 x gt ul 10 1 gt ul 10 0 gt 10 35 END TABLE kkkkkkkkkkkkkkkkkkkkkkkkk kkkkkkkkkkkkkkkkkkkkkkkkk kkkkk kkkkk kkk S SRASE kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk S 99 AAA RASE RASO AAA CLK CLK1 ce e se e e e ke e he e e e e he e ke e e e e he e ke e e se e e e ke e ke ce e e ke e e ke e ke e ke e kk 9 SXTEND KK KK ke e ke ek e e e e he che he KK KK KK ke e e e he hehe he KK KKK e e eee ke ke eek ee e dee ke kekekekekek S 99 XTEND BBB CLK CLK1 kkkkkkkkkkkkkkkkkkkkkkkkk kkkkk kkkkkkkkkkkkkkkkkkkkkkkkk kkkkk kkk S MAIN STATE MACHINE kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk
152. TCP IP must be up and running before the servers can be run 7 3 2 1 Automatic startup for Windows 95 You may choose to run BOOTPD EXE and TFTPD EXE automatically every time that Windows 95 is started or you can run these programs only when needed To make these program run automatically every time WIndows 95 is started perform the following steps Select Start from the Windows 95 task bar e Select Settings Select Taskbar Select Start Menu Programs Select Add n the command line field enter the following BOOTPD c C h 7 1 1 4 Where C is the driver letter containing the boot image and 7 1 1 4 is host IP address Select Next In the Select Program Folder window select the Programs Startup folder Select Next Select Finished To start TFTP follow the above steps but enter the following in the command line field TFTPD The BOOTP and TFTP demons will be started automatically upon the next restart of Windows 95 7 3 8 SUN bootp and tftp configuration The Solaris and SunOS operating systems both provide a tftpd server but do not provide a bootpd server For this reason a bootpd server has been included in the EVB software package under the usr osopen bin directory 7 6 401 EVB User s Manual A sample bootptab file usr osopen PLATFORM samples bootptab sam is included with the EVB software This file should be copied to the etc directory and renamed
153. TS S_READY WITH STATES S READYO B 1 S READY1 0 STSOE MACHINE OF BITS SRAM OE WITH STATES SRAM_OEO B 1 SRAM 1 0 STWEO MACHINE OF BITS SRAM WEO WITH STATES SRAM WEOO B 1 SRAM WEO1 B 0 STWE1 MACHINE OF BITS SRAM_WE1 WITH STATES SRAM WE10 B 1 SRAM WE11 B 0 STWE2 MACHINE OF BITS SRAM_WE2 WITH STATES SRAM WE20 B 1 SRAM WE21 B 0 STWE3 MACHINE OF BITS SRAM_WE3 WITH STATES SRAM WE30 B 1 SRAM B 0 INT MACHINE WITH STATES INTS2 INTS3 INTS4 INTS5 INTS6 ARB MACHINE WITH STATES ARBO 1 ARB2 ARB3 C 48 401 EVB User s Manual ARB4 ARB5 ARB6 ARB7 ARB8 ARB9 ARB10 ARB11 Inverted 2x Clock is used for SRAM Write State machine CLK21 CLK2 PLX 9060 PCI GRANT SHOULD BE TRISTATED FROM FPGA WHEN CARD IS CONFIGURED FOR HOST ADAPTER 9060_GNT_T TRI 9060_GNT ARBSEL ADDRESS STROBE GENERATION FOR 401GF CYCLES 401_X1 clk CLK1 401 Xl prn RESET 401_X1 clrn ALE 401 X1 d VCC 401_X1 ALE 401 X1 amp DCLK1 RESET ADS TRI 401 X1 401 HOLDA Temp clk GLOBAL CLK2 Temp d temp q SRAM lower address generation SLA2 clk CLK1 SLA2 clrn RESET ADS amp LA2 amp RESET SLA2 prn ADS amp LA2 amp RESET SLA2 d SLA2 amp S READY SLA2 amp S READY
154. Trumpet menu bar to find out how you may be able to obtain a packet driver from the Internet We will assume you have already followed the instructions for installing your ethernet card have installed Trumpet Winsock and have chosen a packet driver for use with Trumpet 2 Read any README files carefully Pay particular attention to any directions concerning Packet Drivers 3 Follow the instructions for Using the Trumpet Winsock over a packet driver from the main Trumpet Help window Follow the instructions for Installing a packet driver and WINPKT At the time of this publication the WINPKT pro gram needed to be extracted from ftp ftp trumpet com winsock winpkt com The ndis3pkt package referred in the help as a replacement for winpkt does not work unless you have WorkGroups for Windows or some other windows package that runs NDIS 4 Using the Trumpet help as a guide your autoexec bat file will need to have two lines added to get the ethernet communications working The first line starts the packet driver you installed with your ethernet card The proper name and syntax for this line should be identified in your ethernet card installation guide or in one of the files that came with the packet driver i e the Kingston ethernet card has a doc file that is part of the packet driver that describes how to invoke the driver The second line to add is winpkt 0x60 vector 0x60 is usu ally the default vector to use
155. Yes Interrupt Handler Safe Yes clock set p 10 13 clockchip get p 10 14 clockchip get calibration p 10 15 clockchip nvram read p 10 16 clockchip nvram write p 10 17 clockchip set p 10 18 clockchip set calibration p 10 24 clockchip start p 10 25 clockchip stop p 10 26 401 EVB Function Reference 10 27 dbg ioLib init Synopsis Library Description Errors Attributes References 10 28 include lt ioLib h gt int dbg_ioLib_init void ioLib a dbg ioLib init initializes the library Unlike ioLib_init this function allows external I O interrupts to be screened by the ROM monitor enabling debug to be performed from outside of the OS Open environment Only external I O through IRQ s other than those used by the ROM Monitor are available to OS Open If successful dbg ioLib init returns 0 Otherwise dbg_ioLib_init returns 1 ENOMEM Async Safe Cancel Safe Interrupt Handler Safe ioLib init p 10 42 401 EVB User s Manual Insufficient memory to allocate first level interrupt handler control areas No Yes Yes Synopsis Library Description Errors Attributes References dcache flush include lt ioLib h gt void dcache_flush void address unsigned int count ioLib a dcache_flush flushes cache lines beginning at the effective address and continuing for count bytes A cache line flush forces the current
156. a ppcMttsr sets the timer status register to the specified value Bits in the TSR be cleared by writing a 1 to the corresponding bit position The file ppcLib h defines several constants for the TSR that can be used as masks None Reset the watchdog interrupt status in the TSR register ppcMttsr TSR WIS Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcOrMsr include lt ppcLib h gt unsigned long ppcOrMsr unsigned long value ppcLib a ppcOrMsr performs the OR of value and the current MSR updating the MSR The previous value of the MSR is returned The file lt ppcLib h gt defines several constants for the MSR that can be used as masks None Enable debug exceptions unsigned long old val ppcOrMsr ppcMsrDE Async Safe No Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 111 ppcSync Synopsis Library Description Errors Example Attributes References 10 112 include lt ppcLib h gt void ppcSync void ppcLib a ppcSync causes the processor to wait until all data cache lines scheduled to be written to main storage have actually been written None Ensure a ppcDbci completes before using the valu
157. a pro cess that does not exist msg data data Data read at location pointed to by address 1 if error retcode should also be set to EIO msg data len 0 Length of additional data being sent A 19 A 3 15 RD READ MULT 71 This request returns the 32 integers in the debugged process address space at the location pointed to by the address parameter If the value of address is not in a valid address space unpredictable results will occur A 3 15 1 Request data Table A 27 RD READ MULT Request Table Parameters Description msg request RD READ MULT Requested API function msg address address Address of memory to read data from msg rpid process_id Numeric process ID on the target sys tem msg data sizeof msg rpid Length of additional data being sent A 3 15 2 Response data Table 28 RD READ 1 MULT Response Table Parameters Description msg retcode RD COM ERR 1001 Communication error occurred msg retcode RD OK 0 Successful completion msg retcode EIO 5 Debugged process can not access given address msg retcode ESRCH 3 The msg pid parameter identifies a pro cess that does not exist msg retcode RD NOTSUPP 1003 Call not supported by this interface msg buffer 0 0x1F Contents of addresses from location pointed to by address to address Ox1F msg data len 128 0x80 Length of additional data being sent
158. able Parameters msg retcode RD COM ERR 1001 Description Communication error occurred msg retcode RD OK 0 Successful completion msg data len 0 Length of additional data being sent A 27 A 3 23 RD WRITE GPR 14 This request writes data to one of the general purpose or special purpose registers of the debugged process Valid registers are defined in dbg h and sys reg h Not all defined registers are supported for all environments A 3 23 1 Request data Table A 43 RD WRITE GPR Request Table Parameters msg request RD WRITE GPR Description Requested API function msg rpid process_id Numeric process ID on the target sys tem msg address register Name of the register to be written msg data value Value to be written to the register msg data sizeof msg rpid Length of additional data being sent A 3 23 2 Response data Table A 44 RD WRITE GPR Response Table Parameters msg retcode RD COM ERR 1001 Description Communication error occurred msg retcode RD 0 Successful completion msg retcode EIO 5 Register is not defined msg retcode RD REG ERR 1004 Unable to access given register msg data value Value written to register OXFFFFFFFF if error occurred msg retcode ESRCH 3 The msg pid parameter identifies a pro cess that does not exist msg
159. ace for a logic analyzer and a PCI slot for PCI adapters are also provided Positions of the connectors and jumpers on the EVB are indicated on Figure 5 1 401 EVB Connectors 5 1 sfr er 6 900000000000 Q 0000 9000 5 1000000000000 oooon 1155 55559598 o IM NS ozro 3 E 66666666666666GE 9 gt gt I2000000000000000 3 So So cx ox MN lt o o 888 88 tc 9 nm 9 CI sv 3 E 12 leo o 2 8 EE e o eo lo n z g zo a e lt lt o lool O aa le c o 2 o o e o o lo o 2 nm o of lo EN sas lo CN e BS B 600000000000000000 o o o 0000000 00000000000000000H 7 N 5 600000000000000000 000000000000000000 0000000000 000000000000000000 gt loo lo 5 Bc O 5 Eo 1L 1 1 o o lN B gt Figure 5 1 401EVB Connectors and Jumpers 401 EVB User s Manual 5 2 5 1 Serial Port Connectors Serial ports 1 J6 and 2
160. active low level IOCR CIL 0 Critical interrupt inputs to the PowerPC 401GF are latched in board hardware The latch is cleared by writing a 1 to the Utility Port INT REMOWVE bit then writing a 0 to the same bit The critical interrupt will be removed from the PowerPC 401GF immediately upon writing the 1to INT REMOVE Critical interrupt cannot recur until both INT REMOVE and the original interrupt source have been cleared Table 6 9 Critical Interrupts Source Comments Critical Interrupt switch PCI SERR Duration is one PCI bus clock cycle 6 15 Network Address of the Ethernet Controller The EVB Ethernet controller a National DP83902AV has been assigned a unique six byte network address This address also known as the media access control or MAC address may need to be known by customers using the EVB to develop their own ROM versions The easiest way to obtain its value is to hook up a terminal or terminal emulator to the EVB serial port 1 as explained in the previous chapter and bring up the ROM Monitor After selecting option 7 to display the configuration the controllers network address is displayed in the Ethernet boot source s hwadar field as twelve hex characters six bytes The ROM Monitor returns the MAC address as part of the board cfg data structure when a call to its get board config function is made Sample code showing how this is done can be found in the samp c file in the OS Open samp
161. ag is set in the image causing the ROM Monitor debugger to be invoked immediately after the image is loaded P Creates output image in PReP format PReP format is used by some PowerPC platforms 8 Suppress symbol information Specifying this flag will prevent the symbol table from being included in the image V Verbose option Directs information about the produced image to stderr b addr Set the symbol start location to address addr m m file Specify the ROM address map file The format of this file is two addresses on each line start address and ending address separated Allows the specification of an output file name The default name is input elf img 55 file Restrict symbol table to names in specified file s name The format of this file is one symbol on each line x x file Suppress section names listed in specified file x name The format of this file is one section name on each line Users can find an example of using eimgbld in the sample Makefile under osopen PLATFORM samples Application Libraries and Tools 9 23 9 24 401 EVB User s Manual 401 EVB Function Reference This chapter describes the OS Open functions for the 401 EVB platform The function calls and macros are arranged alphabetically by name For information about the effective use of some of these functions refer to the PPC401GF Embedded Controller User s Manual All descriptions contain the following sections Syn
162. al processing to prepare the completed application program for execution on the platform The boot library for the 401 EVB also dynamically determines available heap space and prepares the symbol table for use by OS Open symbol management routines The boot library does not export any functions 9 2 6 ROM Monitor Ethernet IP Interface Library This library contains routines allowing access to the ROM Monitor s Ethernet IP interface These functions allow the Ethernet to be simply configured with a unique IP address for use with TCP IP functions The ROM Monitor Ethernet IP Interface functions reside in benetLib a library 9 2 7 Real time Clock Interface Support Library This library contains routines to read and set the 401 EVB battery backed real time clock These functions are not to be confused with the real time clock functions provided directly by OS Open when the system is running The real time clock interface support functions reside in the OS Open s clockLib a library and are available to perform the following features Set the OS Open clock from the real time clock Set the real time clock from user supplied data Calibrate the real time clock chip Read and write NV RAM in the clock chip 9 2 8 Integrated Ethernet IP Interface This library provides the support for packet level interface to the integrated Ethernet interface in the 401 EVB The Ethernet port support functions reside in the enetLib a library Application Libraries
163. ance may be suspect It is included here as an example of an application to be built loaded onto the evaluation board and executed To build the Dhrystone benchmark enter the command make dhry from the command line while in the samples directory The makefile will compile the Dhrystone source files link the resulting object files with the support libraries and produce the boot file dhry and the boot image file dhry img If the bootptab entry suggested in the chapter on Host Configuration was used then dhry img must be renamed or copied to boot img in order to be selected by the ROM Monitor load process Select option 0 from the ROM Monitor screen to load and run the image To load using RISCWatch enable the ROM Monitor debugger via option 5 exit the ROM Monitor menu via option 0 start RISCWatch on the host system make sure the RISCWatch environment file is setup for ROM Monitor communications then use the RISCWatch load image command to load the dhry img file Once successfully loaded issue the attach 42 and logoff commands to return control to the ROM Monitor and initiate the run 8 6 401 EVB User s Manual You should see the following messages or ones like them appear on the ROM monitor screen Explanations preceded by do not appear on the screen but are added here as clarification Booting from ENET Ethernet Sending bootp request f This requests the Host workstation to return the name of the boot imag
164. and Tools 9 5 9 2 9 Software Timer Tick Support Library The OS Open system requires a periodic call to timertick notify to maintain internal clocks and timer functions The tickLib a library contains an implementation of the timertick notify function for PowerPC architecture machines Timer tick support functions reside in the tickLib a library 9 6 401 EVB User s Manual 9 3 Device Drivers Supplied with the 401 EVB Device drivers provided with the 401 EVB include e Asynchronous Ethernet Monitor Ethernet Liquid Crystal Display LCD Examples and references are provided where appropriate For more information about any of the OS Open functions mentioned in this chapter refer to the OS Open Programmer s Reference 9 3 1 Asynchronous Device Driver The asynchronous device driver supports the two asynchronous communication ports found on the 401GF EVB Following is a brief functional description of the device driver e Support from 50 baud Full duplex modem line control discipline Overrun error parity error and framing error detection e BREAK interrupt detection Support for data length of 5 6 7 and 8 bits Support for 1 1 5 and 2 stop bits Support for receive and transmit parity Support for odd and even parity Support for transmitting BREAK Support for 16 byte FIFO in the universal asynchronous receiver transmitter UART Programmed I O PIO interrupt driven
165. arget first 1 hold set SRAM memory region 32 bit 16 burst target first 1 hold set PCI Registers memory region 32 bit 16 burst target first 1 hold set Local to PCl memory region 32 bit 16 burst target first 1 hold set Squall memory region 32 bit 16 burst target first 1 hold set Peripherals memory region 8 bit 16 burst target first 1 hold Example code which accomplishes this follows FFFFFFOO FFFFFF04 FFFFFFO8 FFFFFFOC FFFFFF10 FFFFFF14 FFFFFF18 FFFFFF1C FFFFFF20 FFFFFF24 FFFFFF28 addis ori mtspr mtspr addis ori mtspr addis ori mtdcr addis r3 0 0 r3 r3 0 SGR r3 DCWR r3 r3 0 0x0BCO r3 r3 0xX0BCO SLER r3 r3 0 0x4000 r3 r3 0 IOCR r3 r3 0 0 401 EVB Hardware 6 7 FFFFFF2C FFFFFF30 FFFFFF34 FFFFFF38 FFFFFF3C FFFFFF40 FFFFFF44 FFFFFF48 FFFFFF4C FFFFFF50 FFFFFF54 FFFFFF58 FFFFFF5C FFFFFF60 FFFFFF64 FFFFFF68 FFFFFFFC 6 8 Endian Programming ori mtdcr mtdcr mtdcr mtdcr mtdcr addis ori mtdcr nop nop nop nop nop nop r3 r3 0x001A BRCRO r3 BRCR1 r3 BRCR2 r3 BRCR3 r3 BRCR4 r3 r3 0 0 r3 r3 0x0018 BRCR7 r3 OxFC to FFFFFFOO entry point of init code PCI and Squall memory regions are most naturally little endian Those regions are PCI Registers 0x20000000 0x200001 FF and 4 and 20 6 and 22 7 and 23 8 9 and 24 25 0xA0000000 0xA00001FF Local toPCI I O 0x30000000 0x37FFFFFF and 0xB0000000 0xB7FFFFFF Local toPC
166. as in lists no special typographic treatment is used Examples of such objects include e Function and macro names Data types and structures e Constants and flags Names of objects known to the software must be entered exactly as shown e Variable names supplied by user programs appear in italic type In some text however such as in lists no special typographic treatment is used Examples of these objects include arguments and other parameters e highlighting appears in code examples About This Book xxi Syntax Diagram Conventions Throughout this book diagrams illustrate the syntax for string formats and commands The following list shows how to read these diagrams Read the syntax diagrams from left to right from top to bottom following the path of the line symbol begins a diagram symbol indicates continuation of a diagram on the next line symbol indicates continuation of a diagram from the previous line symbol terminates a diagram Keywords are in regular type and variables are in italics Keywords must be typed exactly as shown Keywords or variables on the main path of a diagram are required gt gt keyword variable variable2 Keywords or variables shown on branches below the main path are optional keyword Mrs uoo m variable1 variable2 Keywords or variabl
167. ase is the evaluation board To do this enter smit select Communication Applications and Services select TCP IP select Further Configuration select Network Interfaces select Network Interface Selection select Add a Network Interface select Add a Serial Line INTERNET Network Interface select tty1 set the INTERNET ADDRESS field to the host IP address An acceptable value would be 8 1 1 4 set the DESTINATION Address field to the evaluation board s IP address An acceptable value would be 8 1 1 5 Make a note of the addresses selected for the host and the evaluation board They will be needed later set the Network MASK to 255 255 240 0 insure that ACTIVATE is yes insure that the TTY PORT is tty1 leave the BAUD RATE field blank leave the DIAL STRING field blank 401 EVB User s Manual select Do or hit Enter Upon successful completion the SLIP Network Interface is established over tty1 and the serial port setup is complete If this step fails insure that a SLIP Network has not already been defined over tty1 To make this check return to the Network Interface Selection screen in smit and select List All Network Interfaces If 11 is listed then a network interface has already been defined for tty1 and its characteristics may need to be changed Return to the Network Interface Selection screen and select Change Show Characteristics of a Network Interface Select 511 and insure that the fields are set as stated previously
168. ate ROM monitor image PC devTab c Handles boot device definitions include C include files m4 assembler preprocessor include files ppcLib C callable functions to access PowerPC special instructions enetLib Ethernet chip specific code ioLib I O helper functions miscLib Miscellaneous routines used for ROM monitor s1Lib Serial Port interface routines s1IdLib Code to support S1 serial port downloads dbLib Ptrace debug interface routines entry s Processor and C environment initialization lib Repository for intermediate libraries netLib IP and UDP processing functions slipLib SLIP implementation align h s Alignment handling code mapfile1 Mapfile to specify ROM Monitor linkage directives bios map Load map of the ROM Monitor version shipped with the EVB flash Code to support re programming the flash memory IcdLib LCD access functions 401 EVB ROM Monitor 7 1 7 2 Communications Features The 401 EVB ROM Monitor runs as part of the boot code in the flash memory on the board The monitor communicates with an asynchronous terminal or terminal emulator attached to serial port 1 SP1 on the EVB through which the user accesses the monitor menu The 401 EVB can download applications and communicate with the host debugger through serial port 2 SP2 or the Ethernet adapter depending on which devices are enabled Communications between SP2 and the host use the Serial Link Internet Protocol SLIP while Ethernet communi
169. ause the PIT to start decrementing ppcMtpit 0x00000001 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 99 ppcMtpmcro Synopsis Library Description Errors Example Attributes References 10 100 include lt ppcLib h gt void ppcMtpmcrO unsigned long 0 value ppcLib a ppcMtpmcr0 sets the Power Management Control Register to the specified value None Set the PMCRO to 0x0 ppcMtpmcr0 0x00000000 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMtsgr include lt ppcLib h gt void ppcMtsgr unsigned long ppcLib a ppcMtsgr sets the value of the Storage Guarded Register SGR to the specified value None Set the value of the SGR include ppcLib h ppcMtsgr 0x80000000 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 101 ppcMtsler Synopsis include lt ppcLib h gt void ppcMtsler unsigned long Library ppcLib a Description ppcMtsler sets the value of the Storage Little Endian Register SLER to the specified value Errors None Example Set the value of the SLER so that address range 0x5000000
170. ble LOGIN is disabled The default settings for all the other fields are satisfactory select Do or hit Enter Upon successful completion a properly configured tty device is created and thus step 4 can be skipped for the particular tty ttyO or tty1 added Remember to repeat this step step 3 if both ttyO and tty1 needed to be added 4 To properly configure a previously defined tty device 4 2 For systems running AIX 3 return to the TTY screen select Change Show Characteristics of a TTY select tty where 0 or 1 select Change Show TTY Program insure that the following fields are set to the indicated values 401 EVB User s Manual TTY tty 0 for ttyO 1 for ttyl TTY type tty TTY interface rs232 Description Asynchronous Terminal Status Available Location 00 00 S 00 z1 for ttyO 2 for ttyl Parent Adapter 420 for ttyO 1 for ttyl Port Number s 1 for ttyO 2 for ttyl Terminal Type dumb Enable LOGIN disable The other fields can remain at their default values select Do or hit Enter upon successful completion select Done or hit PF3 to return to the TTY screen select Change Show Characteristics of a TTY select tty where O or 1 select Change Show HARDWARE TTY Characteristics insure that the BAUD rate is 9600 for ttyO OR the BAUD rate is 38400 for tty1 insure that the PARITY is none insure that the BITS per character is 8 insure that the Number of STOP BITS is 1 se
171. bled Serial Port 2 S2 Boot Sources 001 Enabled Ethernet ENET local 7 1 1 5 remote 7 1 1 4 hwaddr 1000abcdef55 004 Disabled Serial Port 2 S2 local 8 1 1 5 remote 8 1 1 4 hwaddr fffffffffffft 005 Enabled Serial Port 1 Sl Baud 9600 Debugger Enabled on exit Enable disable tests Enable disable boot devices Change IP addresses Ping test Toggle ROM monitor debugger Toggle automatic menu Display configuration Save changes to configuration Set baud rate for sl boot Exit menu and continue O Q N EH When a menu operation is selected to alter configuration settings the current configuration is automatically redisplayed 7 22 401 EVB User s Manual 7 6 9 Saving the Current Configuration Option 8 saves the current configuration for subsequent power ons resets Enable disable tests Enable disable boot devices Change IP addresses Ping test Toggle ROM monitor debugger Toggle automatic menu Display configuration Set baud rate for sl boot Exit menu and continue N P I V Configuration has been saved 1 Enable disable tests Enable disable boot devices Change IP addresses Ping test Toggle ROM monitor debugger Toggle automatic menu Display configuration Set baud rate for sl boot Exit menu and continue OO I V Save changes to configuration
172. board Either a standard PC planar power connector or the PCI edge connector will power the board both sources of power will never be simultaneously connected When the board is hosting a Squall module 12V and 12V may be required When the board is configured as a PCI adapter card these voltages are supplied from the PCI edge connector When the board is configured for stand alone operation these voltages are supplied via separate connectors When the board is configured for stand alone operation and is hosting PCI card 3 3V 12V and 12V may be required 12V and 12V are supplied via separate connectors 3 3V may be supplied from the on board regulator or via a separate connector depending on the current requirements 6 6 401 EVB User s Manual 6 7 Initialization Information regarding the reset and initialization of the 401GF controller can be found in the 401GF User s Manual Minimum board initialization consists of the following SGR 0 DCWR lt 0 optional to improve execution speed before first store to prevent alignment exception SLER lt 0x0BCOOBCOset endian regions little endian for PCI and Squall regions 4 6 9 20 22 25 all other regions big endian IOCR lt 0x40000000set active levels for interrupts BRCRO 0x1A BRCR1 lt 0x1A BRCR2 lt 0x1A lt 0x1A BRCR4 lt 0x1A BRCR7 lt 0x18 critical low non critical high set DRAM memory region 32 bit 16 burst t
173. bootptab if a bootptab file does not already exist You will need to log in as root or the superuser su to update or add files in the etc directory Entries describing the evaluation board to the host PC must be added to the bootptab file When creating or modifying the bootptab file the following rules apply blank lines and lines beginning with are ignored each entry must be entered on a single line each entry must start with a hostname followed by the legends see the sample bootptab file for legned descriptions use to separate each legend and leave no spaces between legends user must supply the host ip address via the ip legend ifthe hd home directory amp bf bootfile legends are not provided for a particular entry the first defined hd and bf legends in the bootptab file will be taken as default File entries similar to those below would be suitable slipc hd usr osopen PLATFORM samples bf boot img bs ip 8 1 1 5 sm 255 255 259 255 netc ht ethernet hd usr osopen PLATFORM samples bf boot img bs ip 7 1 1 5 5 255 255 255 255 Each of the entries slipc and enetc should be entered on a single line The value of the Ethernet hardware address field in the enetc entry ha xxxxxxxxxxxx should match the twelve character hardware address listed for the Ethernet Boot Source on the ROM Monitor menu Both connections use the file usr
174. bugger communications and in the host connectivity ping test Note the local IP address is that of the board and the remote IP address is that of the host workstation The IP addresses must match those set during host configuration Enable disable tests Enable disable boot devices Change IP addresses Ping test Toggle ROM monitor debugger Toggle automatic menu Display configuration Save changes to configuration Set baud rate for sl boot Exit menu and continue N P I V When option 3 is selected the following submenu is displayed CHANGE IP ADDRESS Device List 001 Enabled Ethernet ENET 1 1 7 1 1 5 remote 7 1 1 4 hwaddr 1000abcdef55 004 Disabled Serial Port 2 S2 local 8 1 1 5 remote 8 1 1 4 hwaddr fffffffffffft select device to change gt Select the appropriate device select device to change 1 Selects Ethernet When a valid device is selected the following submenu is displayed 1 Change local address 2 Change remote address 0 Return to main menu Make the appropriate selection To change the board s IP address you would select option 1 Change local address 1 Selects the local address Current IP address 7 1 1 5 Displays the current value Enter new IP address gt Enter IP address in dot notation e g 8 1 1 2 401 EVB ROM Monitor 7 15 Now enter the new IP address in dotted decimal notation
175. cMtiocr unsigned long iocr_value ppcLib a ppcMtiocr sets the input output configuration register IOCR to the specified value ppcMtiocr allows the user to program some of the external multifunctional pins in the PPC401GF processor The file lt ppcLib h gt contains several constants that can be used when accessing the IOCR None Allow external interrupt 0 triggering to be edge triggered ppeMtiocr IOCR EOT EDGE Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 97 ppcMtmsr Synopsis Library Description Errors Example Attributes References 10 98 include lt ppcLib h gt void ppcMtmsr unsigned long msr_value ppcLib a ppcMtmsr sets the MSR to msr_value The file lt gt defines constants that can be use with the MSR None Enable external interrupts unsigned long msr ppcMfmsr ppcMtmsr msr ppcMsrEE Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMtpit include lt ppcLib h gt void ppcMtpit unsigned long pit_value ppcLib a ppcMtpit sets the programmable interval timer PIT to the specified value None Set the PIT to a non 0 value to c
176. cations use the Internet Protocol IP over standard Ethernet The 401 EVB also supports the downloading of programs via serial port 1 SP1 To use this feature a VT100 terminal emulator that supports binary file transfers such as kermit must be used on the host system 7 3 Bootp and tftp Configuration to support ROM Monitor Loads Both the debugger and the ROM Monitor can be used to load applications onto the board Details on how to use the debugger can be found in the RiSC Watch Debugger User s Guide To use the facilities of the ROM Monitor for downloading applications to the evaluation board the host workstation must be configured to support the bootp protocol and tftp daemons The configuration consists of two parts The bootptab file on the host must be customized to match system requirements and the bootp and tftp daemons or servers must be made available 7 3 1 RS 6000 bootp and tftp configuration To modify the etc bootptab file you need to log in as root or the superuser su Entries describing the evaluation board to the host workstation must be added to this file Complete details describing the bootptab file format are available in the Command Reference under bootpd File entries suitable for our purposes are shown below slipc hd usr osopen m401 evb samples bf boot img bs ip 8 1 1 5 sm 255 255 255 255 netc ht ethernet hd usr osopen m401 evb samples bf boot img bs ip 7 1 1 5 5 255 255 255 255
177. ccurred msg retcode RD NOTSUPP 1003 Call not supported for this interface msg retcode RD OK 0 Successful completion msg retcode EIO 5 One of the parameters is incorrect msg data_len 0 No additional data is being sent A 8 401 EVB User s Manual A 3 5 RD KILL 8 This request causes the process to terminate the same way it would with an exit routine The ROM monitor does not implement this function but simply returns an RD OK response for compatibility with older debuggers 3 5 1 Request data Table A 9 RD KILL Request Table Parameters msg request RD KILL Description Requested API function msg rpid process_id Process ID of the process to be killed msg data_len sizeof msg rpid Length of additional data being sent A 3 5 2 Response data Table A 10 RD KILL Response Table Parameters msg retcode RD COM ERR 1001 Description Communication error occurred msg retcode RD OK 0 Successful completion msg retcode ESRCH 3 The msg pid parameter identifies a pro cess that does not exist msg data len 0 Length of additional data being sent A 3 6 RD LDINFO 34 Request loader information from target environment This information is provided to the ROM monitor in the boot header or by the RL_LDINFO request Refer to ROM Monitor Load Format section for more information A 3 6 1 Request data Table
178. ce msg retcode RD OK 0 Successful completion msg data_len 0 No additional data 3 2 RD CONTINUE 7 This request causes the process to resume execution If the dbg seqno field of the request is zero the response is not returned until the process stops due to a breakpoint or error Otherwise an immediate response is sent from the RD CONTINUE request and the debugger should send the RD STATUS request to see if the process has stopped A 3 2 1 Request data Table 3 RD CONTINUE Request Table Parameters Description msg request RD CONTINUE Requested API function msg address address This field is ignored by ROM monitor msg data signal 0 msg rpid process_id Numeric process ID on the target sys tem msg data sizeof msg rpid Length of additional data being sent A 3 2 2 Response data Table A 4 RD CONTINUE Response Table Parameters Description msg retcode RD COM ERR 1001 Communication error occurred msg retcode RD OK 0 Successful completion msg data 0 A 6 401 EVB User s Manual A 3 3 RD DETACH 31 Detaches debugger from running process in target environment Debugged process is restarted and execution continues without debugger control 3 3 1 Request data Table 5 RD DETACH Request Table Parameters msg request RD DETACH Description Requested API function msg rpid process_id Numeric process ID on
179. ception for the maximum of time specified by timeout If successful enet_recv_packet returns a pointer to the mbuf chain containing the Ethernet packet otherwise NULL is returned Errors None Attributes Async Safe Yes Cancel Safe No Interrupt Handler Safe No Callable from Application Thread Group No References enet native attach p 10 33 enet disable ipinput p 10 31 enet enable ipinput p 10 32 enet send packet p 10 36 401 EVB Function Reference 10 35 enet send packet Synopsis Library Description Errors Attributes References 10 36 include lt enetLib h gt int enet_send_packet struct ether_header eh struct mbuf m int total enetLib a enet_send_packet transmits the packet described by eh and m The Ethernet packet header is specified in eh The destination source hardware address and packet type must be set in the eh structure prior to calling enet send packet m points to the mbuf chain that contains the actual packet total must be set to the number of bytes to be transmitted The value of totalis set to the size of the Ethernet header plus the size of the packet contained in mbuf If successful enet send packet returns 0 otherwise 1 is returned enet send packet will timeout after 3 seconds None Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes enet native attach p 10 33 enet disable ipinput p 10 31 enet enable ipinput p 10 3
180. ces 10 118 include lt sys asyncLib h gt int vsidbprintf unsigned long uart_clock unsigned char base_reg int reg_delta event_t event const char format va_list arg_list asyncLib a vsidbprintf is a version of printf that uses polled writes no interrupts and may be used before I O has been established and accepts a va list as a parameter instead of a variable number of parameters vs1dbprintf may be called before the async device driver is installed uart clock is the clock frequency of the serial port base reg specifies the address of the base UART register reg delta specifies the space between UART registers event specifies the external interrupt level For the 401 EVB uart clock must be 1843200 base reg must be 0x7E000000 reg delta should be 1 None Print Hello World before I O has been initialized include lt sys asyncLib h gt define S1DB PARMS 1843200 unsigned char Ox7E000000 1 EXT IRQ COMI vsldbprintf S1DB PARMS Hello World n r Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Program Trace Calls This appendix describes the remote debugging interface provided by the ROM monitor These calls may be used by remote debuggers other than the RISCWatch debugger provided with the 401 EVB kit A 1 Overview The following section describes the message ptrace protocol that has been imple
181. ck Frequency Select input Signal FREQ SEL INPUT FREQ SEL FREQ SEL gt 25Mhz clock gt 33Mhz clock I P C 1 Sk kc ek KK ee kk e e kk eek ke ee kk RIK K k K K K K k K K K K kk eek ke KOR KOK KOR KOK KO KO KOS Zkkkkkkkkkkkkkkkkkkkk OUTPUT SIGNALS QQQ QQ eee Zkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk OE OUTPUT Output Enable for peripherals WE OUTPUT Write Enable for peripherals READY BIDIR Ready for peripherals LCD_EN OUTPUT Enable Signal for LCD PLX_CS OUTPUT PLX 9060 Chip Select ENET_CS OUTPUT Ethernet chip select LATCH CS OUTPUT Ethernet PRQ Read Port Chip Select SER1 CS OUTPUT Serial Portl1 Chip Select SER2 CS OUTPUT Serial Port2 Chip Select PAR CS OUTPUT Parallel Port Chip Select RTC CS OUTPUT Real Time Clock Chip Select FLASH CS OUTPUT 401GF Boot Flash Chip Select PCI FLASH OUTPUT PCI Expansion Flash ROM Chip Select SQUAL CS OUTPUT SQUALL Module Chip Select SRAM CS OUTPUT SRAM Chip Select INT1 CS OUTPUT Interrupt Controllerl Master Chip Select INT2 CS OUTPUT Interrupt Controller2 Slave Chip Select INT ACK CS OUTPUT Interrupt Acknowledge to INT Controller SerE2 CS OUTPUT Serial EEPROM Chip Select 245 OE OUTPUT Output control signal for IO tranceiver b
182. ck and those that come with Windows 95 and Windows NT Since TCP IP packages vary greatly this section should be used only as a guideline for bootp and tftp set up Users should consult their TCP IP documentation for specific details Configuration consists of two parts The bootptab and services files on the host must be customized to match system requirements and the bootpd and tftpd servers must be made available If you choose to use the bootpd and tftpd servers provided with this package you will need to modify your autoexec bat file to specify the location of the bootptab and services files This is accomplished by adding a line that sets up an ETC constant to the directory where the bootptab and services files are located ie SET ETC C TRUMPET for Windows 3 1 Windows 95 Trumpet users ETC2CAWINDOWS for Windows 95 users ETC C WINNT35 system32 drivers etc for Windows NT 3 51 A sample bootptab file osopen PLATFORM samples bootptab sam is included with the EVB software This file can be copied to the ETC directory set in the autoexec bat file and modified appropriately Note that the bootptab file in the ETC directory must be named bootptab with no file extention Entries describing the evaluation board to the host PC must be added to the bootptab file When creating or modifying the bootptab file the following rules apply blank lines and lines beginning with are ignored each entry must be entered on a single line
183. cle IOSE 10502 ELSE IOSE 10536 END IF IF W_ R THEN OE3 GND WE3 VCC ELSE 0 VCC WE3 VCC END IF WHEN IOS36 gt IOSE 10532 READY3 VCC OE3 VCC WE3 VCC END CASE IOSER clk GLOBAL CLK1 IOSER reset RESET C 12 401 EVB User s Manual CASE IOSER IS WHEN IOSERO READY4 VCC OE4 VCC WEA VCC If Cycle is for ethernet goes from IOSERO to IOSER1 Here ENET_CS_NODE is used instead of ENET_CS to qualify Ethernet cycle The ENET_CS is generated synchronous to Ethernet clock The Ethernet clock may be different from system clock IF ENET CS NODE THEN IOSER IOSER1 ELSE IOSER IOSERO END IF WHEN IOSER1 gt READY4 VCC Ethernet register access checking for reg Sync signal IF ENET CS NODE amp LATCH ACK THEN IOSER IOSER2 ELSE IOSER IOSER1 END IF IF W R THEN OE4 GND WE4 VCC ELSE OE4 VCC WE4 GND END IF WHEN IOSER2 gt IOSER IOSER3 READY4 VCC IF W_ R THEN OE4 GND WE4 VCC ELSE OE4 VCC WE4 GND END IF WHEN IOSER3 gt IOSER IOSER4 C 13 READY4 VCC IF W_ R THEN OE4 GND WE4 VCC ELSE OE4 VCC WE4 GND END IF WHEN IOSER4 gt READY4 GND IF BLAST THEN Checks for the end of cycle IOSER IOSERO ELSE IOSER IOSER5 END IF IF W_ R THEN OE4 GND WE4 VCC ELSE OE4 VCC WE4 VC
184. clude lt ppcLib h gt void ppcHalt void ppcLib a ppcHalt is a one instruction spin loop effectively putting the processor in an enabled wait at the point of invocation None Wait at the point of invocation ppcHalt Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 53 ppclcbi Synopsis include lt ppcLib h gt void ppclcbi void addr Library ppcLib a Description ppclcbi invalidates the Instruction Cache Block pointed to by the address passed This may be done after updating an instruction Errors None Example Write a trap into location 0x3000 unsigned in i addr int 0x3000 i addr 0x7c800008 tw instruction pecDbcst void 0x3000 ppcIcbi void 0x3000 Attributes Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes References PPC401GF Embedded Controller User s Manual 10 54 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References include lt ppcLib h gt void ppclsync void ppcLib a ppclsync causes the processor to discard any instructions that may have been prefetched before ppclsync This call must be used after modifying instruction storage None Place a trap into a given address trap address 0x7F000008 ppcIsync Async Safe Yes Cancel Safe Ye
185. contents of the cache line to main storage if the line is valid and marked as modified and then invalidates the line Note Since cache flushes occur on cache line boundaries the operation can occur outside of the bounds specified by the function call For example if address is X 216 and count is X 12 two cache lines spanning addresses from X 200 to X 23F would be flushed None Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes dcache invalidate p 10 30 401 EVB Function Reference 10 29 dcache invalidate Synopsis Library Description Errors Attributes References 10 30 include lt ioLib h gt void dcache_invalidate void address unsigned int count ioLib a dcache_invalidate invalidates cache lines beginning at the effective address given by address and continuing for count bytes Note Since cache invalidation occurs on cache line boundaries invalidation can occur outside of the bounds implied by this command For example if address is X 104 and countis 16 the cache line spanning the addresses from X 100 to X 120 would be invalidated None Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes dcache flush p 10 29 401 EVB User s Manual Synopsis Library Description Errors Attributes References enet disable ipinput include lt enetLib h gt void enet_disable_ipinput void enetLib a enet_disable_ipinput disables the f
186. cy with this document A netmask of 255 255 240 0 should be used Note The services file that must be updated as part of the RISCWatch or evaluation kit installation is in directory CAWINNTS35 system32 drivers etc The Evaluation Kit software was developed for Windows 3 1 Though it can be run successfully on Windows NT certain restrictions apply For example file IDs need to be restricted to an eight character file name and a three character file extension or RISCWatch will not be able to locate source files 4 2 3 ROM Monitor Debugger Communication Setup PC Before the RISCWatch Debugger can be used some additional steps need to be taken to establish ROM Monitor Debugger communications These steps involve an update of the TCP IP services file and a restart of the TCP IP package for the update to take effect Most PC TCP IP packages place the services file under one of the TCP IP package s subdirectories Trumpet Winsock users should find the services file in the directory where the Trumpet files were installed Windows 95 users should find the services file under C WINDOWS SERVICES Windows NT users will find the services file under C WINNT35 system32 drivers etc Users should consult their TCP IP documentation or System administrator if they can not locate the file The following lines must be added to the file osopen dbg 20044 tcp for RISCWatch OS Open debug osopen dbg 20044 udp for RISCWatch rom mon debug F
187. d Upon power up or reset the ROM Monitor initializes the processor and other peripherals on the board If a ROM Monitor load is attempted via option 0 all enabled power on tests are executed and following their completion a bootp request is sent to the host This request involves an exchange of UDP packets corresponding to the bootp protocol In essence the ROM Monitor asks for and is supplied with the name of the boot image file on the host workstation tftp Trivial File Transfer Protocol is then initiated by the ROM Monitor to transfer the boot image to the evaluation board Once the file has been transferred two simple checks are made A magic number in the boot image s 32 byte header verifies that the image is one that can be loaded by the ROM Monitor ie a file created by the eimgbld tool see appendix B for details of the load format After the load is complete control is transferred to the specified entry point in the boot image which is in the bootstrap program When using RISCWatch s load image command to load a boot image file the debugger strips off the file s 32 byte header and loads the remaining bytes of the file onto the board The start address of the load is designated in bytes 4 8 of the header Once loaded the IAR register is set to the boot image s entry point as defined in bytes 16 19 of the header This entry point is in the bootstrap code See the Running Your Programs section in the RISCWatch Debugger
188. d this directory might be named 401 evb e README TXT contains the latest information regarding this release include contains OS Open include files contains dynamically loadable modules that can be run from OS Open s OpenShell contains OS Open libraries m4 contains assembler preprocessor include files contains the source code for the ROM Monitor detailed in a later chapter samples contains samples programs that can be compiled and run Considerable effort goes into providing a quality product with consistent documentation To insure that our customers have the advantage of the latest software features and updated information README TXT may contain clarifications and or additional information and should be considered must reading COMMENT USER and COMMENT DOC Please take the time to complete these user comment forms Your feedback and suggestions will help us to improve our products and technical publications Fax and email instructions are included in each of the files 3 3 2 RISCWatch Debugger Installation Sun Please refer to the RISCWatch Debugger User s Guide for debugger installation instructions Be sure to follow the instructions for Sun installation 3 10 401 EVB User s Manual Host Configuration Several host configuration steps are required to facilitate communications between the host computer and the evaluation board These steps are outli
189. d from first level interrupt handlers FLIHs or a user supplied panic function Since the function waits until the characters are actually sent before returning use of this with long strings can significantly affect the timing of calling programs 9 12 401 EVB User s Manual 9 3 2 Ethernet Device Driver The Ethernet device driver is a character device driver supporting packet level read writes to the integrated Ethernet controller The driver features the ability to open multiple files Each file receives packets for a specific standard Ethernet or 802 3 address Function highlights are Up to 8 receive channels Size of receive buffer pool determined by user at driver install time 9 3 2 1 Device Driver Installation enet_native_attach attaches the TCP IP protocol to the Ethernet device Once the TCP IP stack is attached Ethernet packets can be sent received using the TCP IP functions or by using the Ethernet functions provided such as enet_send_packet The Ethernet device is attached to the TCP IP protocol stack after tcpip init and net_init have been performed The following is an example of attaching the TCP IP protocol stack to the Ethernet include enetLib h define ENETHOST 7401 board define ENET CONFIG 0 401 board netmask 255 255 240 0 up define SRAM SIZE 8192 8K buffer int do enet int rc rc tcpip init ENETHOST 1 1000 Initialize the TCP IP library if re 0 ret
190. d to directly connect the two nodes Otherwise a 10BaseT hub not provided must be used to connect the nodes together Note The Ethernet 10BaseT crossover cable supplied will not work if plugged into a 10BaseT hub Figure 5 8 shows the connections and signal assignments required in a crossover cable RJ 45 Connector 10BaseT Cable RJ 45 Twisted Signal Signal Pair Name Pin Pin Name 1 TD 1 1 TD 1 TD 2 2 TD 2 RD 3 3 RD 2 RD 6 6 RD 3 4 Not 4 5 7 8 4 5 7 8 Not used used Figure 5 8 Wiring in a Crossover Cable 401 EVB Connectors 5 23 Figure 5 9 shows a point to point Ethernet connection using the provided crossover cable Ethernet adapter Eval Board Serial Port 1 J6 Serial Port 2 J19 Ethernet J24 10BaseT crossover cable Terminal Emulator running on Host 51 Com1 Figure 5 9 Point to Point 10BaseT Ethernet Connection Figure 5 9 shows an Ethernet connection using a hub Ethernet adapter 10BaseT straight through cable Eval Board Serial Port 1 46 Terminal Emulator _ Seriat Port 2 J19 running on Host 51 1 Ethernet J24 Figure 5 10 10BaseT Ethernet Connection with Hub 5 24 401 EVB User s Manual If you wish to use 10Base2 the board jumper J20 must be left open and additional connectivity hardware not included in the kit is required Th
191. data len 0 Length of additional data being sent A 28 401 EVB User s Manual A 3 24 RD WRITE 4 This request writes the value of the msg data parameter into the address space of the debugged process at the address pointed to by the msg address parameter This request fails if the msg address parameter points to a location that can not be accessed by debugged process This call sets break points in the debugged process by writing TRAP 0x7D821008 instructions A 3 24 1 Request data Table 45 RD WRITE Request Table Parameters msg request WRITE Description Requested API function msg rpid process_id Numeric process ID on the target sys tem msg address address Address of memory to write data to msg data data Data to write to memory msg data sizeof msg rpid Length of additional data being sent A 3 24 2 Response data Table A 46 RD WRITE Response Table Parameters msg retcode RD COM ERR 1001 Description Communication error occurred msg retcode RD OK 0 Successful completion msg retcode EIO 5 Debugged process can not access given address msg retcode ESRCH 3 The msg pid parameter identifies a pro cess that does not exist msg data data Data written at location pointed to by address 1 if error retcode should also be set to EIO or ESRCH msg data len 0
192. does not move display shifts left LCD MODE NORMAL SCROLL None Scrolls like a terminal LCD OFF None Nothing is displayed LCD ON None Only characters are displayed LCD ON BLINK None Characters displayed cursor charac ter blinks LCD ON CURSOR None Characters displayed cursor dis played LCD ON CURSOR BLINK None Characters displayed cursor dis played cursor character blinks LCD INIT None Initialize display LCD CLEAR None Blanks homes and unshifts LCD LCD DEC CURSOR None Decrements and shifts cursor left LCD INC CURSOR None Increments and shifts cursor right LCD DISPLAY LEFT None Shift display left LCD DISPLAY RIGHT None Shift display right LCD SET CURSOR int line Set cursor to line and column values int column LCD GET CURSOR int line Read cursor line and column position int column LCD GET MODE int mode Read current mode LCD GET STATUS int status Read current display status 9 16 401 EVB User s Manual Table 9 4 ioctl Commands for the LCD Device Driver Command Parameters Explanation LCD GET SHIFT int shift Read current shift amount Following is an example of an ioctl call issued against LCD device rc ioctl fd1 LCD CLEAR if rc 0 printf ioctl failure n fd1 is the value obtained from the open call 9 4 Environment Bringup and Initialization The following section describes the processing that occurs when the evaluation board environment is initialize
193. e 4 2 PCHost Configuration As stated previously PC users are required to have a TCP IP package compliant with the Microsoft Windows Socket API definition Unlike Windows 95 and Windows NT Windows 3 1 does not include such a package To determine if you will need to install a TCP IP package on Windows 3 1 do the following Select the Main icon from the Windows Program Manager Select the File Manager icon Select File from the menu bar and choose Search e Perform a search for winsock dll on your entire hard drive If the winsock dll file exists you probably have some compliant TCP IP package already installed Workgroup for Windows is a product that provides such a TCP IP package If the winsock dll file does not exist you need to install a TCP IP package compliant with the Microsoft Windows Socket API definition One such package Trumpet Winsock can be downloaded from the following Internet site www trumpet com Host Configuration 4 7 Note Windows 95 users who want to establish a SLIP host to EVB connection over a second serial port require Trumpet Winsock as well since the TCP IP package that comes with Windows 95 does not support SLIP communications Trumpet is not recommended for Windows 95 users already connected to a network since installing Trumpet may cause problems with previously defined networks If the recommended Ethernet host to EVB connection is going to be used instead of the SLIP host to EVB connecti
194. e Loading file usr osopen PLATFORM samples boot img Sending tftp boot request Having obtained the file name the ROM monitor uses tftp to retrieve the file from the host workstation Transfer Complete Loaded successfully Entry point at 0x10238 Having loaded an image the ROM monitor is now transferring control to the application subsequent messages are from the application Dhrystone Benchmark Version 2 1 Language C Program compiled without register attribute Please give the number of runs through the benchmark At this point enter the number of desired iterations The test is designed not to give results if the selected iterations completes in less two seconds so pick a large number 2 200000 After the test completes a check screen will be displayed followed by the benchmark results The results may vary based on the system environment 8 3 2 Building and Running the usr samp Program The usr samp c program is included as a sample to be built and run on the EVB It s a simple program that shows how to properly call the get board cfg ROM Monitor user function to determine the ROM Monitor version the amount of DRAM installed on the board and the Ethernet controllers MAC address Developers interested in using any of the ROM Monitor user functions should use this program as a guide To build the usr_samp program enter the command make samp from the command line while in the samples direct
195. e Dhrystone benchmark program and application development libraries and tools The IBM High C C compiler is also included 1 2 1 ROM Monitor The ROM Monitor program for the 401 EVB is supplied in one of the 512KB flash memory modules on the board This code initializes the 401 processor and the controllers for serial and Ethernet communications By supporting communications with the host computer system the ROM Monitor provides the means to load applications from the host onto the EVB and to debug them with the RISCWatch source level debugger The ROM Monitor is accessed through a terminal or terminal emulator attached to serial port 1 on the EVB The RISCWatch debugger when in ROM Monitor mode runs on the host System communicating with the ROM Monitor through serial port 2 or the Ethernet interface on the 401 EVB The ROM Monitor source code is provided primarily for customers interested in developing their own ROM versions It is also provided so that debuggers other than RISCWatch may be integrated with the 401 EVB Appendix A describes the trace calls that support communication between the RISCWatch debugger on the host and the ROM Monitor running on the 401 EVB 1 2 2 RISCWatch Debugger The RISCWatch source level debugger provides a window based debugging environment for application programs running on the 401 EVB The debugger can be used to load and execute application programs on the evaluation board Debugger installation a
196. e 401 EVB this processing includes moving the loaded program such that real addresses correspond with addresses assumed by the language development tools The boot library for the 401 EVB also dynamically determines available heap space and prepares the symbol table for use by OS Open symbol management routines The boot library does not export any functions 9 2 3 Input Output Support Library The input output functions reside in the ioLib a library To initialize the subsystem you must call ioLib init normal mode or dbg ioLib init ROM Monitor debug ethernet before performing any other function 9 4 401 EVB User s Manual 9 2 4 PowerPC Low Level Processor Access Support Library The low level access support library contains C callable versions of the special PowerPC instructions A few of the sample programs use these functions to manipulate the PowerPC 401GF s special registers These functions provide access to processor instructions not generated by compilers For example device drivers often have a requirement to control data caching disable interrupts synchronize I O and other processor and platform specific operations The low level access support functions reside in the ppcLib a library 9 2 5 ROM Boot Library This library contains the OS Open bootstrap program and can be used instead of the boot library The ROM boot library should be used when OS Open is being burnt into a ROM The boot library performs initi
197. e 8 2 using 8 4 Dhrystone benchmark 8 6 timesamp program 8 8 usr samp program 8 7 SCSI Support Library 9 3 Serial Port Support Library 9 4 Serial Support Library 9 3 software support package 1 2 application libraries and tools 1 3 Dhrystone benchmark 1 3 High C C compiler 1 2 RISCWatch 400 debugger 1 2 ROM monitor 1 2 Software Timer Tick Support Library 9 6 Sun host configuration 4 13 Sun installation RISCWatch debugger 3 10 software support package 3 7 Symbol Support Library 9 3 T TCP IP Protocol Support Library 9 3 Telnet Client Support Library 9 3 Telnet Daemon Support Library 9 3 tickLib a library 9 6 Timer Tick Support 9 3 timertick_install function 10 116 timertick_remove function 10 117 tools 9 19 eimgbld 9 23 X 5 elf2rom 9 19 hbranch 9 21 Trivial File Transfer Protocol Library 9 3 TTY Support Library 9 3 U using a terminal emulator 5 25 PC terminal emulation 5 26 RS 6000 terminal emulation 5 26 Sun terminal emulation 5 27 V vsidbprintf function 10 118 W writing calls on asynchronous ports 9 9 9 15 6 401 EVB User s Manual
198. e board should be connected to the host system via a 50 ohm thin coax cable If the connection is to be used exclusively for communications between the host and the EVB each end must have a BNC T type connector terminated at one end with a 50 ohm resistor If the connection is going to be made to an existing Ethernet network users should consult their Network Adminstrator to insure proper connectivity TERMINAL EMULATOR running on HOST S1 com1 EVAL BOARD Serial Port 1 J6 Seriai Port 2 J19 Ethernet J23 50 ohm thin coax ENET cable Ethernet Adapter Figure 5 11 Point to Point 10Base2 Ethernet Connection Note Both a SLIP and Ethernet connection can be used as long as both networks have been configured properly and the proper connections have been made 5 10 3 Power Supply Connection Also included in the 401 EVB kit is a power supply and its power cord Connect the female end of the power cord to the male connector on the power supply Also connect the two keyed PC AT type connectors P1 and P2 from the power supply to the J11 power connector on the board 5 11 Using a Terminal Emulator The ROM Monitor transmits receives data through serial port 1 J6 on the evaluation board Access to the ROM Monitor can be achieved by connecting a VT100 or compatible teminal 401 EVB Connectors 5 25 directly to J6 on the EVB or by using a terminal emulator running on th
199. e flih t structure is assigned NULL If successful ext int query returns 0 Otherwise ext int query returns 1 EINVAL event does not refer to a valid event Async Safe No Cancel Safe Yes Interrupt Handler Safe Yes ext int enable p 10 38 ext int install p 10 39 ioLib init p 10 42 401 EVB User s Manual Synopsis Library Description Errors Attributes fpemul init include lt fpeLib h gt void fpemul_init void fpCSLib a fpemul_init installs the floating point interrupt handler fpemul_init is only needed when floating point emulation is required with the XCOFF version of OS Open for PowerPC processors without floating point hardware fpemul_init is not required for floating point when running with the ELF version of OS Open fpemul_init returns nothing None Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes 401 EVB Function Reference 10 41 ioLib init Synopsis Library Description Errors Attributes 10 42 include lt ioLib h gt int ioLib_init void ioLib a ioLib init initializes the library If successful ioLib_init returns 0 Otherwise ioLib init returns 1 ioLib init should not be used on a 401 EVB when using the ROM Monitor Ethernet interface or the ROM monitor debugger dbg ioLib init should be used instead Insufficient memory to allocate first level interrupt handler control areas
200. e host When using a terminal emulator access is obtained via an S1 or COM1 to J6 connection 5 11 1 RS 6000 Terminal Emulation The AIX Terminal Interface Program TIP can be used as a terminal emulator to support communications with the ROM Monitor When properly configured TIP connects the host RISC 6000 to a remote system which in our case is the EVB To set up TIP do the following login as root or the superuser su e goto the etc directory cd etc ifthe file remote exists Is remote If the file does not exist create it using an editor add the following line to the remote file cut and pasters can find this line in the README TXT file ttyO dvz dev tty0 br 9600 el U C S Q D iez96 0ez D paznone exit from root TIP configuration is complete Once all the host to EVB connections have been properly made and power has been supplied to the board TIP can be activated by typing tip ttyO at the AIX command prompt After resetting the board the ROM Monitor main menu should appear in the window where tip was activated It may be necessary to hit the enter key once or twice to get the menu to appear for the first time Additional information on TIP can be found in Communications and Procedures GC23 2203 two volumes Some useful escape sequences to know when using TIP include Note it may be necessary to hit the Enter key before entering these escape sequences 2 help for TIP CTRL D
201. e results occur if the msg address parameter points to a location that can not be accessed by the debugged process A 3 20 1 Request data Table A 37 RD WRITE BLOCK Request Table Parameters msg request RD WRITE BLOCK Description Requested API function msg address address Address of memory to write data to msg data count Number of bytes of buffer area to be written msg buffer Data to be written msg data_len count Length of additional data being sent A 3 20 2 Response data Table A 38 RD_WRITE_BLOCK Response Table Parameters msg retcode RD_COM_ERR 1001 Description Communication error occurred msg retcode RD_OK 0 Successful completion msg retcode EIO 5 Debugged process can not access given address msg data len 0 Length of additional data being sent A 25 A 3 21 RD WRITE D 5 This request writes the value of the msg data parameter into the address space of the debugged process at the address pointed to by the msg address parameter Unpredictable results occur if the msg address parameter points to a location that can not be accessed by the debugged process A 3 21 1 Request data Table A 39 RD_WRITE_D Request Table Parameters msg request RD_WRITE_D Description Requested API function msg address address Address of memory to write data to msg data data Data to writ
202. e to memory msg rpid process_id Numeric process ID on the target sys tem msg data sizeof msg rpid Length of additional data being sent A 3 21 2 Response data Table A 40 RD WRITE D Response Table Parameters msg retcode RD COM ERR 1001 Description Communication error occurred msg retcode RD OK 0 Successful completion msg retcode EIO 5 Debugged process can not access given address msg retcode ESRCH 3 The msg pid parameter identifies a pro cess that does not exist msg data data Data written at location pointed to by address 1 if error retcode should also be set to EIO or ESRCH msg data len 0 Length of additional data being sent A 26 401 EVB User s Manual A 3 22 RD WRITE DCR 112 This request writes data directly to one of the DCRs not the process s copy All DCR registers are accessible through this request The requester is responsible for supplying valid DCR values No error checking is performed on this field A 3 22 1 Request data Table A 41 RD WRITE DCR Request Table Parameters msg request RD WRITE DCR Description Requested API function msg address DCR number DCR number to be written msg data value Data to write to register msg data_len 0 Length of additional data being sent A 3 22 2 Response data Table A 42 RD WRITE DCR Response T
203. e words IBM AIX Version 3 2 for RISC System 6000 are actually part of the title of each book however in all references to these books those words are omitted Assembler Language Reference SC23 2197 Commands Reference Volume 1 SC23 2376 Commands Reference Volume 2 SC23 2366 Commands Reference Volume 3 SC23 2367 Commands Reference Volume 4 SC23 2393 Editing Concepts and Procedures GC23 2212 Embedded Application Binary Interface EABI Publications PowerPC Embedded Application Binary Interface EABI System V Application Binary Interface Third Edition 0 13 0100439 5 System V Application Binary Interface PowerPC Processor Supplement IBM High C C Publications The following list includes the books in the IBM High C C library IBM High C C Programmer s Guide for PowerPC 9266920 IBM High C C Language Reference for PowerPC 92G6923 IBM ELF Assembler User s Guide for PowerPC 92G6921 IBM ELF Linker User s Guide for PowerPC 92G6922 About This Book xxiii xxiv OS Open Publications The following list includes the books in the OS Open library IBM OS Open Programmer s Reference Volume 1 92G6911 IBM OS Open Programmer s Reference Volume 2 92G6912 IBM OS Open User s Guide 9266897 RISCWatch Debugger Publications RISCWatch Debugger User s Guide 13H6964 PowerPC 400Series User s Manuals PPC403GA Embedded Controller User s Manual 13H6960 PPC403GB Embedded Controller Users Manual 13H6985 PPC403GC Embedded Contro
204. eady exists To determine if the interface already exists 4 6 return to the Network Interface Selection screen in smit 401 EVB User s Manual select Change Show Characteristics of a Network Interface If is not listed insure that the RS 6000 host does have an Ethernet adapter and if possible that it is plugged correctly If the adapter was misplugged repeat step 2 to add the Ethernet Network Interface if enO is listed then the Ethernet Network Interface already exists Select 0 and note the IP address listed for the INTERNET ADDRESS field This value is the host s Ethernet IP address and will be needed later If no IP address is listed choose one The IP address 7 1 1 4 can be used to maintain consistency with the menus and examples in this document The Ethernet setup is complete 4 1 3 ROM Monitor Debugger Communication Setup RS 6000 Before the RISCWatch Debugger can be used some additional steps need to be taken to establish ROM Monitor Debugger communications These steps involve an update of the TCP IP services file and a refresh of the TCP IP inetd daemon To modify the etc services file you need to log in as root or the superuser su The following lines must be added to the file osopen dbg 20044 tcp for RISCWatch OS Open debug osopen dbg 20044 udp for RISCWatch rom mon debug The AIX refresh s inetd command must then be run to inform the inetd daemon of the changes made to the etc services fil
205. ecution users should quit and restart RISCWatch before loading another boot image file to run Without quitting RISCWatch subsequent boot image execution can not be guaranteed Note RISCWatch also provides the means to load a boot file as opposed to a boot image file via its load file command See the Running Your Programs section in the R SCWatch Debugger User s Guide for additional information This section also describes the steps required to load and debug boot and boot image files 401 EVB Sample Applications 8 1 8 2 ROM Monitor Flash Image The flash memory on the EVB comes preprogrammed with a specific version of the ROM Monitor This version may not be latest version of the ROM Monitor To run the samples in the software support package the latest version should be used The latest version of the ROM Monitor is included in the software support package in the file usr osopen PLATFORM openbios lib rom_ img RS6K amp SUN vosopenPLATFORM openbiosMibwom img PC KKK KKK where is equal to the ROM Monitor version If the version number of the ROM Monitor in the software support package does not match the version number displayed by the monitor when it comes up on the board you can load the more recent version of the monitor provided in the software support package to re program the flash memory The rom_ img file can be loaded using the ROM Monitor or the RISCWatch debugger For it to load properly
206. ed for an active high level IOCR IL 1 Non critical interrupts are handled by a pair of cascaded 82C59 interrupt controllers All inputs to the slave controller are level sensitive and that controller should be programmed accordingly Inputs to the master controller may be either edge sensitive or level sensitive This is determined by reading the Interrupt Detection Mode of the Squall module if no Squall module is installed then the master controller should be programmed as level sensitive Table 6 7 Non critical Interrupts Controller 1 master controller programmed edge or level sensitive based on reading Interrupt Detection Mode from Squall EEPROM Default Controller Priority Int Level Source Comments 1 8 0 Interrupts from Hi priority unless altered by Specific Controller 2 Rotation in OCW2 of Controller 1 9 1 Squall SQIRQO May be edge or level sensitive 10 2 Squall SQIRQ1 May be edge or level sensitive Table 6 8 Non critical Interrupts Controller 2 slave controller programmed level sensitive Default Priority Controller Int Level 0 Source PCI LINT Comments 1 PCI LSERR PCI BREQ PCI INT Ethernet Serial Port 1 Serial Port 2 O N C Inn Parallel Port 401 EVB Hardware 6 15 6 14 Critical Interrupts The critical interrupt input to the 401GF should be programmed for an
207. electing Do or OK 18 Select OK at the ARE YOU SURE screen to continue the installation 19 When the Command status is OK file installation is complete 20 Exit smit 3 2 401 EVB User s Manual The IBM High C C Compiler is installed in the usr highcppc directory tree and the EVB software support package in the usr osopen directory tree It may be necessary to change ownership of these directories their subdirectories and their contents if other users will require access to them The usr highcppc bin directory contains the files required for the IBM High C C Compiler Those files include asppc Assembler for assembler language programs ldppc ELF linker binder to build applications to be run on the EVB heppc High C C compiler for C programs arppc ELF library archiver The readme file under the usr highcppc directory contains the latest information regarding the compiler and should be considered must reading If you installed the compiler into a directory other than usr highcppe edit the bin hcppc cnf file and locate the line near the top of the file that reads HCDIRz usr highcppc Change this to reflect the directory that the compiler was installed into Save your changes and exit the editor The usr osopen directory tree contains the files and tools that support OS Open application and ROM development The usr osopen subdirectories and their contents are as follows bin This directory contain
208. en applications include ELF High C C compiler for C programs asppc assembler for assembler and C language programs eimgbld binary image build tool ELF linker binder to build OS Open applications for a target system IBM and other vendors provide numerous optional software development tools for AIX including tools for Computer aided software engineering CASE Structured analysis and design Program understanding Code management and version control 2 2 Host System Requirements Hardware requirements of the host PC include BM or compatible system unit Minimum requirements x486 DX2 50 66 MHz with 8 MB of RAM VGA SVGA Display Monitor Minimum required VGA 640x480 Recommended SVGA 1024x768 Approximately 25MB of free disk space This space is required for the IBM High C C compiler the 401 EVB Software Support Package and the RISCWatch debugger When planning disk space usage consider disk space requirements for Windows and any other software packages Two available serial ports one for terminal emulation and the other for SLIP host to EVB communications Since PC hardware varies greatly you should consult your PC literature to determine the number of serial ports available Only one serial port is required if an Ethernet adapter is available for host to EVB communications For better performance an Ethernet connection is strongly recommended Establishing an Ethernet host to EVB con nection will
209. er simultaneous read calls issued to the same port may block or be processed in an unexpected order For these instances thread scheduling and synchronization must be handled by the application Following is an example of read and write calls rc write fdl XnOS Open Real time Executive n 29 rc read fdl1 buffer 10 fd1 is the value obtained from the open call Note For more information on read and write refer to the OS Open Programmer s Reference Application Libraries and Tools 9 9 9 3 1 5 WO Control An ioctl call issued against asynchronous device driver accepts the commands listed in Table 9 3 All parameter constants can be found in sys ioctl h Table 9 3 ioctl Commands for Asynchronous Device Drivers Command Parameters Explanation ASYNCBAUDSET Value from 50 Sets baud rate ASYNCBAUDGET Pointer to integer Returns baud rate ASYNCTRIGSET asyncFifoTrigger1 Sets FIFO trigger level for asynchro asyncFifoTrigger4 nous port asyncFifoTrigger8 asyncFifoTrigger14 ASYNCTRIGGET Pointer to integer Returns current trigger level ASYNCBREAKSET None Starts sending BREAK on port ASYNCBREAKCLR None Stops sending BREAK on port ASYNCSTICKGET Pointer to integer Returns the way the parity bit is inter preted by the port ASYNCSTICKZERO None Disables stick parity ASYNCSTICKONE None Parity interpretation tracks even odd parity ASYNCRERRORGET Pointer to
210. er User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMtiac1 include lt ppcLib h gt void ppcMtiac1 unsigned long iac1_ value ppcLib a ppcMtiacir sets the value of the instruction address compare register 1 IAC1 The IAC1 contains the address of the instruction that the debug event will be based on The IA1 field of the Debug Control Register DBCR controls the instruction address 1 debug event Bits 30 and 31 of the IAC1 are reserved since the address must be word aligned None Set the IAC1 register to 0x1000 pecMtiacl 0x00001000 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 95 ppcMticcr Synopsis Library Description Errors Example Attributes References 10 96 include lt ppcLib h gt void ppcMticcr unsigned long iccr_value ppcLib a ppcMticcr sets the value of the instruction cache cacheability register ICCR to the specified value None Set the ICCR register to 0 s making no regions of memory cacheable ppcMticcr 0x00000000 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMtiocr include lt ppcLib h gt void pp
211. er ite ER EE auqa am s 7 17 Entering the Debugger au deed terere th 7 19 Disabling the Automatic Display a 7 21 Displaying the Current Configuration seen 7 22 Saving the Current Configuration eese 7 23 Setting the Baud Rate for 51 Boots eene 7 24 S1 B060t an rr irri ee eee cde det ie eee e ceat 7 26 Exiting the Malini ee ete e e RD e e etri us 7 28 ROM Monitor User Functions 7 30 Flash Update Utillly u a edis G u eate 7 30 401 EVB Sample Applications U uuu 8 1 usapu upan ec ee N 8 1 ROM Monitor Flash Image 8 2 Using the Software 8 4 Building and Running the Dhrystone 8 6 Building and Running the usr_samp Program see 8 7 Building and Running the timesamp 8 8 Resolving Execution Problems sese 8 9 Contents vii Using the Ping Test on the ROM Monitor to Verify Connectivity 8 9 bootp and tftp Servers Daemons for ROM Monitor loads 8 10 Using OS Open 8 10 Application Libraries and Tools
212. er s Manual 401 EVB Function Reference 10 107 ppcMttb Synopsis Library Description Errors Example Attributes References 10 108 include lt ppcLib h gt void ppcMttb tb t clock_data ppcLib a ppcMttb sets the current time base data Typically the time base registers are used to determine the number of clock cycles that have passed None Set the current value of time base high and low registers tb t clock data ppcMttb 0x00000000 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMttcr include lt ppcLib h gt void ppcMttcr unsigned long tcr value ppcLib a ppcMttcr sets the timer control register to the specified value The WRC bits of the TCR 3 may only be set once and will be reset by any form of processor reset File lt ppcLib h gt defines several constants for the TCR that can be used as masks None Setthe TCR to force a system reset ppcMttcr TCR WD SYS Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 109 ppcMttsr Synopsis Library Description Errors Example Attributes References 10 110 include lt ppcLib h gt void ppcMttsr unsigned long tsr value ppcLib
213. er that caused the stop Valid signals are AIX SIGILL 4 illegal instruction AIX_SIGTRAP 5 hit a trap instruction breakpoint AIX_SIGFPE 8 floating point error AIX_SIGSEGV 11 storage violation For example after hitting a breakpoint the status of 0x57f is returned to the debugger After the program terminates the first byte contains 0x00 and the rest of the status holds the program exit code After RD_KILL call wait status of 0x57f should be returned A 3 19 1 Request data Table A 35 RD WAIT Request Table Parameters Description msg request RD WAIT Requested API function msg data_len 0 Length of data in msg buffer A 3 19 2 Response data Table A 36 RD_WAIT Response Table Parameters msg retcode RD_COM_ERR 1001 Description Communication error occurred msg retcode RD_OK 0 Successful completion msg data status Process status msg address pid Process id msg data_len strlen message_string The ROM monitor always returns 0 in this field msg buffer message_string Formatted message string text NULL terminated A 24 401 EVB User s Manual A 3 20 RD WRITE BLOCK 19 This request writes a block of data into the address space of the debugged process at the address pointed to by the msg address field The number of bytes to write is contained in the msg data field and the data is in the msg buffer field Unpredictabl
214. er the 9 pin or 25 pin depending on the type of connector on the host The cable is for connecting the J6 serial port 1 on the board to a terminal or to a host running aterminal emulator The board supports a second serial connection for communication over SLIP This requires another interface cable not provided to attach to serial port 2 J19 Assuming a terminal emulator running on the host is going to be used for ROM Monitor access connect the 9 pin serial port connector on one end of a cable to the J6 serial port on the EVB and the other end of the same cable to the 51 COM1 serial port on the host host end may require the 25 pin connector or a serial port adapter not supplied for connectivity Sun SPARCstation users may require the 25 pin male to male adapter included in the Sun 401 EVB kit at the host end If a SLIP connection is going to be used for host to EVB communications connect a second cable not provided in a similar manner using J19 on the EVB and the S2 serial port on the host 5 10 2 Ethernet Connection The Ethernet connection is made between the 10Base2 J23 or 10BaseT J24 connector on the 401 EVB and the Ethernet adapter on the host system The board comes factory set for 10BaseT communications and a 10BaseT crossover cable is included in the kit 5 22 401 EVB User s Manual If the 10BaseT connection is to be used exclusively between the host and the EVB the provided crossover cable can be use
215. eral purpose register write floating point register read block of data write block of data attach to a process detach a proc to let it keep running return entire register set to caller reattach debugger to proc return loaded program info set clear multi processing Read multiple inst words Read multiple registers source line single step Xx x load a task ptrace for login ptrace for logon ptrace for logoff ptrace for fill memory ptrace for pass ptrace for search memory ptrace for wait status information ptrace for reading DCR s ptrace for writing SPR s ptrace for writing DCR s ptrace for stopping the application ptrace for getting run status ptrace for reading SPR s ptrace for readingTLB 403GC ptrace for writing TLB 403GC ptrace for reading SR s ptrace for writing SR s 1 1 1 1 1 1 1 1 1 define MAX PTRACE 119 last ptrace number define RL LOAD REQ 180 Remote Loader Load Request define RL LDINFO 181 Remote Loader Load Information TCP IP services for all sorts of remote debug define OSOPEN SERVNAME osopen dbg OS Open debug service define OSOPEN MON SERVNAME osopen mon OS Open debug monitor svc new register definition define DAR 137 Data Addre
216. ernet 10BaseT network transceiver a twisted pair cable and a hub At a minimum a 10BaseT point to point connection will require the Ethernet crossover cable supplied with the EVB kit Host System Requirements 2 3 For 10Base2 an AUI or thick Ethernet adapter cable or an AUI Audio Adapter cable depending on your SPARCstation model and options both are available from Sun an Ethernet IEEE 802 3 10Base2 network transceiver two BNC T type connectors two terminating resistors and a thin coaxial cable At a minimum a 10Base2 point to point connection will require one thin coaxial cable two BNC T connectors and two BNC terminating resistors Consult your hardware documentation for additional information A graphics display to display debugger screens The following software must be installed on the Sun workstation to run the debugger that communicates with the ROM Monitor on the EVB e RISCWatch 3 3 or higher SunOS 4 1 3 or higher or Solaris 2 3 or higher OpenWindows 3 0 SunOS 4 1 3 or 3 3 Solaris 2 3 2 4 401 EVB User s Manual Installing the EVB Software This chapter describes the procedures for installing the EVB software on the host system Details of the software its directories and their contents are also given Please refer to the section corresponding to your host system 3 1 RS 6000 Installation 3 1 1 EVB Software Support Package Installation RS 6000 The software support package is
217. errupt 1 2 standalone board PCI socket INTA INTB INTC INTD lt will interrupt the 401 as PCI INT locally generated PCI INTA will interrupt the 401 as PCI INT 401 EVB User s Manual Table 5 26 Jumper J32 PCI INTA Control Continued gris Factory J32 Description Setting 2 3 board operating as PCI adapter card local PCI INTA sent to PCI bus Table 5 27 Jumper J43 PCI Clock Source e Factory J43 Description Setting 1 2 standalone board board sources clock to PCI bus lt 2 3 board operating as PCI adapter board receives PCI clock from PCI bus 5 10 Connecting the 401 EVB Hardware 5 10 1 Serial Port Connection To establish a working environment the EVB must be connected to a host system ROM Monitor access requires a connection between the J6 serial port on the board and the S1 COM1 serial port on the host Users must also establish a connection for debug and 401 EVB Connectors 5 21 downloading applications from the host to the board This connection is made over the SLIP or Ethernet network established during host configuration SLIP Eval Board Serial Port 1 46 S2 Com2 Serial Port 2 419 ve Ethernet J24 Terminal Emulator running on Hat 51 1 Figure 5 7 Serial Port Connection Included in the 401 EVB kit is an interface cable supporting either 9 pin or 25 pin serial port connections Use eith
218. es char memptr char 0x2000 char new value ppcDcbi void memptr ppcSync new value memptr Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual processor speed Synopsis include lt tickLib h gt unsigned long processor_speed void Library tickLib a Description processor_speed returns the internal clock speed of the 401 processor Possible return values are 25000000 25 MHz 33333333 33 MHz 50000000 50 MHz 66666666 66 MHz Errors None Example Return the the internal processor clock speed include tickLib h unsigned long proc speed processor speed Attributes Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes Callable from Application Thread Group Yes Processor PowerPC 401GF Yes References PowerPC 401GF Embedded Controller User s Manual 401 EVB Function Reference 10 113 s1dbprintf Synopsis Library Description Errors Example Attributes References 10 114 include lt sys asyncLib h gt int sidbprintf unsigned long uart clock unsigned char base reg int reg delta event t event const char format asyncLib a s1dbprintf is a version of printf that uses polled writes no interrupts and may be used before I O has been established s1dbprintf may be called before the async device driver is installed uart clock is the clock freq
219. es can appear in a stack indicating that only one item in a stack can be chosen If an item in a stack is on the main path you must choose an item from the stack If all items in a stack are below the main path you may choose an item from the stack For example in the following syntax diagram you must choose either variable1 or variable2 However because variable3 and variable4 are below the main path neither is required gt gt KEYWORD T variable 1 variable2 variable3 variable4 A repeat separator is a returning arrow that surrounds a syntax element or group and shows that the element or group can be repeated C s Contacting the IBM Embedded Systems Solution Center For information about the 401 EVB Kit and the IBM family of hardware and software products for embedded system developers call the IBM Embedded Systems Solution Center at 919 254 1810 Please send any comments regarding this document to the following Internet address xxii 401 EVB User s Manual ppc400pubs vnet ibm com Related Publications Many of the following publications are included on the CD ROM that comes with the evaluation kit The others are available from your IBM Microelectronics representative RISC System 6000 Publications IBM RISC System 6000 POWERstation and POWERserver Hardware Technical Information General Architectures SA23 2643 Publications This book refers to the following AIX publications Th
220. et connection is made through the ethernet port on the host and the 10Base2 or 10BaseT connector on the EVB An Ethernet connection requires additional hardware The 401 EVB supports connection via Standard Ethernet thin coax 10Base2 or twisted pair 10BaseT 10Base2 connection requires at least a thin coaxial cable and a connector when the EVB is added to an existing network If the EVB is at one of the ends of the Ethernet network a terminating resistor is also required An exclusive Ethernet network between the host and the EVB requires a thin coaxial cable two BNC connectors and two BNC terminators Depending on your SPARCstation model and options an AUI or thick ethernet adapter cable or an AUI Audio Adapter may also be necessary Both of these cables are available from Sun At a minimum a 10BaseT connection requires a crossover Ethernet twisted pair cable included in the kit for point to point communications If you want more than two nodes you will need a hub and straight through twisted pair cables Consult the documentation included with the hardware for additional information Establishment of an ethernet interface requires a host IP address If the host SPARCstation is connected to an existing ethernet network the host IP address should already be defined Consult your network administrator on how to obtain the host s ethernet IP address and how to add the EVB to the existing network Make a note of
221. f the S1 and S2 serial ports to support these connections Users should also refer to the Windows on line help for Changing Serial Port Settings The connection of the terminal emulator running on the host to the ROM Monitor running on the EVB is made through the S1 serial port on the PC and the SP1 serial port on the EVB The S1 port must be configured for a baud rate of 9600 8 data bits 1 stop bit and no parity The proper setting of these parameters is discussed later in the section on terminal emulation A connection between the S2 serial port on the host and the SP2 serial port on the EVB provides a SLIP network interface to download application programs from the host to the EVB This connection can be used in place of or along with the recommended Ethernet connection To establish a SLIP network over the S2 serial port for host to EVB communications define a SLIP interface via the TCP IP package being used Since TCP IP packages for PCs vary users should consult their TCP IP literature or their system administrator on how to establish the SLIP interface between the host and the EVB The following IP addresses are suggested for the SLIP interface e host source 8 1 1 4 Board destination 8 1 1 5 Make a note of the IP addresses selected since they will be needed later Trumpet Winsock users can use the following steps as a guide to establishing the SLIP interface 1 Open the Trumpet Winsock by double clicking o
222. f the processor debug control register DBCR The DBCR is used to enable debug events reset the processor control timer operations during debug events and set the debug mode of the processor WARNING Enabling bits 0 and 1 can cause unexpected results Enabling bits 2 and 3 will cause a processor reset to occur The DBCR is designed to be used by development tools not applications Refer to the lt ppcLib h gt for defined constants for the DBCR None Retrieve the value of DBCR register A debugger would require the value of the DBCR unsigned long current DBCR ppcMfdbcr Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMfdbsr include lt ppcLib h gt unsigned long ppcMfdbsr void ppcLib a ppcMfdbsr returns the value of the processor debug status register DBSR The DBSR contains the status of debug events the JTAG serial buffers and the most recent reset The file lt ppcLib h gt defines constants that can be used when referring to the DBSR None Retrieve the value of DBSR register A debugger would require the value of the DBSR unsigned long current DBSR ppcMfdbsr Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 61 ppcMfdccr
223. fset of symbols with created ROM image offset of text section from beginning of original ELF file This information is required by certain debuggers Allows the specification of an output file name The default name is input elf img This is simply the ELF binary input file elf2rom only The following picture shows the relationship of the various sections in the produced output file The figure assumes that the info block flag i was specified with an offset of 0x00 9 20 Padding to bring EE of image to size if size specified Symbol Section if debug flag specified 1 Data Size Data Section Text section Text Size Info Block overlays part of text Start of S 2 Figure 9 1 elf2rom Output File 401 EVB User s Manual Users can find an example of using elf2rom in the ROM Monitor s Makefile under osopen PLATFORM openbios 9 5 2 hbranch hbranch places a branch at the end of a ROM image This simplifies production of ROM images for the PowerPC 401GF which executes the instruction at the top location of memory following power up or reset hbranch can also be used to store a communication device s network address in the ROM s Vital Product Data VPD area Syntax hbranch v s size n net addr input image Description The program takes the input file input image which must be the output of elf2rom or eimgbld with an information block at 0 0 relative pads it to size
224. hat this publication may contain references to or information about IBM products machines and programs programming or services that are not announced in your country Such ref erences or information must not be construed to mean that IBM intends to announce such IBM prod ucts programming or services in your country Any reference to an IBM licensed program in this publication is not intended to state or imply that you can use only IBM s licensed program You can use any functionally equivalent program instead No part of this publication may be reproduced or distributed in any form or by any means or stored in a data base or retrieval system without the written permission of IBM Requests for copies of this publication and for technical information about IBM products should be made to your IBM Authorized Dealer or your IBM Marketing Representative Address comments about this publication to IBM Corporation Department YM5A P O Box 12195 Research Triangle Park NC 27709 email ppc400pubsQvnet ibm com IBM may use or distribute whatever information you supply in any way it believes appropriate without incurring any obligation to you Copyright International Business Machines Corporation 1996 1998 All rights reserved Printed in the United States of America 4321 Notice to U S Government Users Documentation Related to Restricted Rights Use duplication or disclosure is subject to restrictions set forth in GSA ADP Sc
225. he latest information regarding the compiler and should be considered must reading If you installed the compiler into a directory other than usr highcppe edit the bin hcppc cnf file and locate the line near the top of the file that reads HCDIRz usr highcppc Change this to reflect the directory that the compiler was installed into Save your changes and exit the editor The usr osopen directory tree contains the files and tools that support OS Open application and ROM development The usr osopen subdirectories and their contents are as follows bin This directory contains several host based utilities used for application and ROM program Installing the EVB Software 3 9 development elf2rom creates a ROM image from an ELF file eimgbld creates a ROM Monitor loadable image from ELF executable file hbranch places an absolute branch in the last address of a ROM image rambuild creates an assembler source file that contains the files found in a specified directory bootpd bootp server to support ROM Monitor downlaods lexamples This directory contains many example OS Open programs PLATFORM This directory contains the OS Open platform specific code for the platform included in your EVB kit The directory is not literally named PLATFORM but rather is named to identify the board and processor that was shipped with your kit For example if your platform was the 401GF evaluation boar
226. he msg printmsg flag is set it indicates that a text string is contained in msg buffer and that this message should be displayed to the user Typically this is an error message that provides more detail as to why the rptrace call failed to return RD OK Another field that is not shown is the dbg seqno field The field provides a mechanism for recovering from lost requests and responses If a request has the dbg seqno field as not zero it is compared with the value from the previous request If it matches the action is not performed and instead the previous response is sent This allows the debugger to time out and re try requests without danger of performing the same function twice 3 1 RD ATTACH 30 Attaches debugger to running process in target environment A 3 1 1 Request data Table A 1 RD ATTACH Request Table Parameters Description msg request RD ATTACH Requested API function msg rpid process_id Numeric process ID on the target sys tem Any non zero value msg data sizeof msg rpid Length of additional data being sent A 3 1 2 Response data Table 2 RD ATTACH Response Table Parameters Description msg retcode ESRCH 3 The msg pid parameter identifies a pro cess that does not exist msg retcode EIO 5 One of the parameters is incorrect msg retcode RD_COM_ERR 1001 Communication error occurred msg retcode RD NOTSUPP 1003 Call not supported for this interfa
227. he object file msg buffer X char membername Member name used for shared library objects X does not represent position on word boundary A NULL has to be returned for the membername even if the debugged file has no membername msg buffer Idinfo_next Idinfo_next Next loader block notice Idinfo next msg data_len variable Set to length of data sent in msg buffer Data length will vary depending on the amount of information passed Remem ber to count all the NULL characters Note dinfo_next 0 indicates that no further loader blocks are present otherwise Idinfo next contains the offset of the next loader block in the buffer This is actually the length of the current block For example if the buffer contains three blocks of lengths 38 40 and 41 bytes the Idinfo next fields would be 38 40 and 0 respec tively Note also that the blocks do not have to be contiguous it is possible that the end of one block may not directly abut the following block This may occur if additional information or word aligning padding is placed after the end of the membername string Path name and member name are strings terminated with a NULL character A 11 A 3 7 RD LOAD 101 Loads executable program Full path name of the file to be loaded is passed in this message The ROM monitor will respond by sending LOAD to the remote loader daemon port A 3 7 1 Request data Table A 13 RD LO
228. he timeval structure supplied by the user The clockLib library must be initialized by calling clockLib init prior to calling this function EINVAL Library not initialized Async Safe No Cancel Safe Yes Interrupt Handler Safe Yes e clockchip_set p 10 18 clockLib init p 10 27 401 EVB Function Reference 10 19 clockchip get calibration Synopsis Library Description Errors Attributes References 10 20 include lt clockLib h gt int clockchip get calibration unsigned char value clockLib a clockchip get calibration returns the clock s calibration byte in the variable pointed to by value The calibration byte occupies the five lower order bits of the byte The sixth bit is a sign bit 1 indicates positive calibration 0 indicates negative calibration The clockLib library must be initialized by calling clockLib_init prior to calling this function EINVAL Library not initialized Async Safe No Cancel Safe Yes Interrupt Handler Safe Yes set calibration p 10 24 clockLib init p 10 27 401 EVB User s Manual Synopsis Library Description Errors Attributes References clockchip nvram read include lt clockLib h gt int clockchip_nvram_read int index unsigned char buffer int length clockLib a clockchip nvram read reads non volatile RAM from the clock chip index specifies the starting byte of NVRAM buffer points to the
229. hedule Contract with IBM Corporation Patents and Trademarks IBM may have patents or pending patent applications covering the subject matter in this publication The furnishing of this publication does not give you any license to these patents You can send license inquiries in writing to the IBM Director of Licensing IBM Corporation 500 Columbus Avenue Thorn wood NY 10594 United States of America The following terms are trademarks of IBM Corporation PowerPC 401GF AIX AlXwindows IBM OS Open PowerPC PowerPC Architecture RISC System 6000 RISCWatch RISCTrace Other terms which are trademarks are the property of their respective owners Contents ADOUt This BOOK Who Should Use This BooK u U U aN nennen xix How This Book is Organized esee XX Contacting the IBM Embedded Systems Solution Center xxii Helated Publicatiors 2 eet pe eet xxiii Overview of the 401 EVB 1 1 Introducing the 401 EVB Hardware 1 1 401 Evaluation or go MEP E E neret ete 1 1 Cables and Power enne nenne nnne 1 1 Introducing the 401 EVB Software Support
230. hernet setup for Windows 3 1 4 10 ethernet setup for Windows 95 4 12 ethernet setup for Windows NT 3 51 4 13 serial port setup 4 8 PC installation 3 4 RISCWatch debugger 3 7 software support package 3 4 PCMCIA ATA IDE 9 2 PCMCIA card services enabler 9 2 PCMCIA socket sevices 9 3 polled asynchronous I O 9 12 PowerPC Low Level Access Support Library 9 2 PowerPC Low Level Processor Access Support Library 9 5 ppcAbend function 10 44 ppcAndMsr function 10 45 ppcCnitlzw function 10 46 ppcDcbf function 10 47 ppcDcbi function 10 48 ppcDcbst function 10 49 ppcDcbz function 10 50 ppcDflusfh function 10 51 ppcEieio function 10 52 ppcHalt function 10 53 ppclcbi function 10 54 ppcLib a library 9 5 ppclsync function 10 55 ppcMfbear function 10 56 X 3 ppcMfbesr0 function 10 57 ppcMfbrcr0 ppcMfbrcr7 functions 10 58 ppcMfcdbcr function 10 59 ppcMfdbcr function 10 60 ppcMfdbsr function 10 61 ppcMfdccr function 10 62 ppcMfdewr function 10 63 ppcMfdear function 10 64 ppcMfesr function 10 65 ppcMfevpr function 10 66 ppcMfgpr1 function 10 67 ppcMfgpr2 function 10 68 ppcMfiac1 function 10 69 ppcMficcr function 10 70 ppcMficdbdr function 10 71 ppcMfiocr 10 72 ppcMfiocr function 10 72 ppcMfmsr function 10 73 ppcMfpit function 10 74 ppcMfpmcr0 function 10 75 ppcMfpvr function 10 76 ppcMfsgr function 10 77 ppcMfsler function 10 78 ppcMfsprgO ppcMfsprg3 function 1
231. hip nvram write writes non volatile RAM in the clock chip index specifies the starting byte of NVRAM buffer points to the location where the bytes will be copied from and ength specifies the maximum number of bytes to write clockchip nvram returns the actual number of bytes written The clockLib library must be initialized by calling clockLib init prior to calling this function Note index must be within the range specified during clockLib init Errors EINVAL Library not initialized or index out of range Attributes Async Safe No Cancel Safe Yes Interrupt Handler Safe Yes References clockchip nvram read p 10 16 e clockLib init p 10 27 401 EVB Function Reference 10 17 clockchip set Synopsis Library Description Errors Attributes References 10 18 include lt clockLib h gt int clockchip set time t timeval clockLib a clockchip set sets the battery backed real time clock to timeval which should contain the number of seconds since January 1st 1970 UTC Real time clock not running EINVAL Library not initialized Async Safe No Cancel Safe Yes Interrupt Handler Safe Yes 401 EVB User s Manual clockchip get clock set p 10 13 Synopsis Library Description Errors Attributes References include lt clockLib h gt int clockchip get time t timeval clockLib a clockchip get reads the battery backed real time clock into t
232. igned long ppcMfbrcr2 void unsigned long ppcMfbrcr3 void unsigned long ppcMfbrcr4 void unsigned long ppcMfbrcr5 void unsigned long ppcMfbrcr6 void unsigned long ppcMfbrcr7 void ppcLib a ppcMfbrcro ppcMfbrcr7 return the value of their respective Bus Region Control Register BRCRO BRCR7 ppeMfbrcr0 ppcMfbrer7 are implemented as macro s The file lt ppcLib h gt has several constants defined for use with the BRCR registers None Retrieve the value of BRCR4 unsigned long current brcr4 ppcMfbrcr4 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMfcdbcer include lt ppcLib h gt unsigned long ppcMfcdbcr void ppcLib a ppcMfcdbcr returns the value of the Cache Debug Control Register CDBCR lt ppcLib h gt has constants defined for use with the CDBCR register None Retrieve the current value of the CDBCR unsigned long value ppcMfcdbcr Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 59 ppcMfdbcr Synopsis Library Description Errors Example Attributes References 10 60 include lt ppcLib h gt unsigned long ppcMfdbcr void ppcLib a ppcMfdbcr returns the value o
233. ime executive functions are in two libraries rtx o and rtxLib a The rtx o library contains the OS Open real time executive The rtxLib a library contains interface routines to OS Open functions and is linked with application programs to resolve calls to the real time executive Application Libraries and Tools 9 2 Using Libraries and Support Software The object libraries specific to the 401 EVB are described below Table 9 2 OS Open Libraries for the 401 EVB Library File Name Boot Library RAM bootlLib a Boot Library for OS Open in ROM bootrLib a Ethernet Device Driver Support Library enetLib a Input Output Support Library ioLib a LCD Library IcdLib a PowerPC Low Level Access Support Library ppcLib a Real time Clock Interface Support Library with NV RAM clockLib a ROM Monitor Ethernet Interface Library benetLib a Serial Support Library asyncLib a Software Timer Tick Support Library tickLib a 9 2 1 Serial Port Support Library This library supports the serial ports on the 401 EVB Use in conjunction with the function provided by devLib a and fsLib a to provide a high level interface to application programs The serial port support functions reside in the asyncLib a library 9 2 2 Boot Library RAM This library contains the OS Open bootstrap program for the appropriate platform The boot library performs initial processing to prepare the completed application program for execution on the platform For th
234. in ascending address order The section header block has the following format typedef struct rel block unsigned long type unsigned long dest addr unsigned long size union struct data info unsigned long size to fill unsigned long to fill B 1 data info str struct text info unsigned long toc pointer used for XCOFF not used for ELF unsigned long entry pt text info str unsigned long number symbols section info struct rel block next struct rel block bptr rel block t The type field is one of the following manifest constants define TEXT SECT 0x00000001 define DATA SECT 0x00000002 define SYMB SECT 0x00000004 The dest addr specifies the target for the block while size is the extent of the block not counting the header The bootstrap program uses this information to move the block to the destination specified at link time next and bptr are the section header forward and backward pointers respectively B 2 1 First Section The first section is a text section The ROM loader places the entire image at the address specified in the boot block header The entry point specified in the boot block header is assumed to be a branch followed by the first section header info block This is to allow the bootstrap to easily gain immediate addressability to the first section block The format of the first section block is shown below
235. iple of 512 byte blocks This field specifies the number of blocks debug flag controls whether the ROM Monitor debugger gets control before the loaded image starts If the value is 0 0 the image runs immediately If 0x01 the debugger gains control as soon as the load is complete entry point specifies the address where the image will receive control 401 EVB User s Manual C FPGA Program Images C 1 Peripheral Interface Controller k ke k ke ke k k KK k k k k KKK k k S PERIPHERAL CHIP SELECT AND CONTROL SIGNALS k ke e ke k e e ke e Se e he k e k k e e k k e e k k k k k k k k e k k k k k k k k k k k he k k S INCLUDE 74169 SUBDESIGN GURU S kc kc lt lt lt ke ke lt ke ehe ke ke ehe k KKK KKK k k k k k K KOK Zkkkkkkkkkkkkkkkkkkkk INPUT SIGNALS 2k RK KKK KKK KKK kkk S kc kc KKK KKK IK KKK KKK KKK k k Kk k KKK KKK KKK G_SPARE1 INPUT Spare input RESET INPUT System Reset CLK1 INPUT System Clock DCLK1 INPUT Delayed System clock A 30 0 INPUT Address W R INPUT System Read Write BLAST INPUT End of cycle signal ADS INPUT System address Strobe Start of cycle ACK INPUT Ethernet register sync hand shaking Signal PRO INPUT Ethernet Remote DMA hand shaking Signal D ETCLK INPUT Delayed Ethernet Clo
236. ister address typically 0x07E00300 Sixth Parameter LCD register spacing typically 1 These are positional parameters Upon successful installation device install returns 0 otherwise 1 is returned For more information on device install refer to the OS Open Programmer s Reference 9 3 4 3 Opening LCD Device After the device is installed the open system call can be used to open the LCD device for writing Following is an example of the open system call fdl open dev lcd O WRONLY 9 3 4 4 Writing to LCD After successfully installing and opening the LCD write calls can be issued against the file descriptor Following is an example of a write call rc write fdl NnOS Open Real time OS n 23 fd1 is the value obtained from the open call For more information on write refer to the OS Open Programmer s Reference 9 3 45 Control An ioctl call issued against LCD device driver accepts the commands listed in Table 9 4 Application Libraries and Tools 9 15 All parameter constants can be found in lt IcdLib h gt Table 9 4 ioctl Commands for the LCD Device Driver Command Parameters Explanation LCD MODE DEC CURSOR None Cursor decrements on write LCD MODE DEC DISPLAY None Cursor decrements but does not move display shifts right LCD MODE INC CURSOR None Cursor increments on write LCD MODE INC DISPLAY None Cursor increments but
237. kkkkk kkk A3EVEN g kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk S b IDLE amp A3 amp A2 amp DCLK1 IDLE amp A3 amp A2 amp DCLK1 4 ACCESS3 amp 6 LA2 amp DCLK1 amp W R XTEND 4 555 amp LA3 amp LA2 amp DCLK1 amp W R 4 ACCESS3 amp 6 LA2 amp DCLK1 R HLDACK 4 ACCESS7 amp LA3 6 LA2 amp DCLK1 amp R amp HLDACK 4 554 6 6 LA2 6 DCLK1 amp R amp HLDACK 4 556 amp LA3 6 LA2 amp DCLK1 amp R amp HLDACK IDLE amp A3 6 A2 amp DCLK1 IDLE amp A3 amp A2 amp DCLK1 4 ACCESS3 amp LA3 amp LA2 amp DCLK1 amp W R amp XTEND 555 amp LA3 amp LA2 amp DCLK1 amp W R 4 ACCESS3 amp LA3 6 LA2 6 DCLK1 amp R amp HLDACK 557 amp amp LA2 6 DCLK1 amp W R amp HLDACK 4 554 6 LA3 amp LA2 6 DCLK1 amp R amp HLDACK 4 556 6 amp LA2 6 DCLK1 amp R amp HLDACK yy CLK CLK2 yy RESET RESET TABLE CURRENT STATE INPUT1 INPUT2 NEXT STATE yy b gt yy yl 1 x gt y0 yl 0 x gt yl yO x 1 gt yl yO x 0 gt y0 END TABLE kkkkkkkkkkkkkkkkkkkkkkkkk kkkkkkkkkkkkkkkkk kkkkk kkkkk kkkkk kkkkk kkk S ADDRMUX KK KK KK ke ke e e e he hehe KK KKK HK e e e e KIKI IK HK ke kk e e e
238. kkkkkkkkkk S 99 ADS ACC PEND amp DRAMADDR 6 SRASE amp REFREQ nb ADS amp ACC PEND amp DRAMADDR amp SRASE amp REFREQ amp A2 nc ADS amp ACC PEND amp DRAMADDR amp SRASE amp REFREQ amp A2 amp W R nd ADS amp ACC PEND amp DRAMADDR amp SRASE amp REFREQ amp A2 amp W R ne ACC PEND amp REFREQ nf REFREQ ng W R amp LA2 nh W_ R amp LA2 ni BLAST 6 LA2 nj BLAST amp W R nk BLAST nl W R HLDACK nm R 6 HLDACK amp BLAST no XTEND np W_ R amp HLDACK nn CLK CLK1 nn RESET RESET TABLE C 36 401 EVB User s Manual CURRENT STATE CURRENT INPUTs NEXT STATE na nb nc nd ne nf ng nh ni nj nk nl nm no np gt nn IDLE 1 x X X X X X X X X X X X x X gt ACCESSO IDLE O 1 x x Xx X X X X X X X X x X gt ACCESS1 IDLE FO Oy Xy x X gt ACCESS2 IDLE 70 0 1 X X X2 CX X X CX X x 0 gt ACCESS3 IDLE 0 0 0 1 x x X X X X X X X x 1 gt ACCESS2 IDLE 0 0 0 0 1 x X X X X X X x x X gt ACCESSO IDLE Os 0 0 0 0 1i X X X x X gt REFRESHO IDLE 07 705 0 X Rp OO 0X x X gt IDLE C 37 nn na nb nc nd ne
239. kkkkkkkkkkkkkk kkkkk kkkk kkk S 5 gt dd gt 40 gt 41 gt 1 gt 40 911 QA4 amp CASPIPE 1044 6 WAIT 6 BLAST amp W R amp DCLK1 amp XTEND 4 QA4 amp CASPIPE 412 QA4 amp CASPIPE amp BEO 4 amp CASPIPE dd CLK CLK2 dd RESET RESET TABLE CURRENT STATE INPUT1 INPUT2 dd 411 912 1 1 1 0 x 1 0 END TABLE kkkkkkkkkkkkkkkkkkkkk kkkkk kkkkk kkkkkkkkk kkkkkkkkk kkkkkkkkk kkkkk kkk S CAS EVEN BYTE ENABLE 1 e e he e ke se e e e e e ke e e e e e e ke e ke S ell 0 4 amp CASPIPE QA4 amp WAIT amp BLAST amp W R amp DCLK1 amp XTEND QA4 6 CASPIPE QA4 amp CASPIPE 1 4 QA4 amp CASPIPE ee CLK CLK2 ee RESET RESET e12 TABLE CURRENT STATE INPUT1 INPUT2 ee ell 12 26 401 EVB User s Manual NEXT STATE gt ee el 1 x gt 0 el 0 x gt el 1 gt 1 0 gt 0 END TABLE kkkkkkkkkkkkkkkkkkkkk kkkkk kkkkk kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk S CAS EVEN BYTE ENABLE 2 9 kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk fll 0 4 6 CASPIPE QA4 WAIT amp BLAST W_ R amp DCLK1 amp XTEND 0 4 6 CASPIPE 12 QA4 amp CASPIPE amp BE2 4 QA4 a
240. le eene A 10 Table A 12 RD LDINFO Response Table u u u u A 10 Table A 13 RD LOAD Request Table seen A 12 Table A 14 RD LOAD Response Table eem A 12 Table A 15 RD LOGIN Request A 13 Table A 16 RD LOGIN Response Table A 13 Table A 17 RD LOGOFF Request Table eee A 14 xvi 401 EVB User s Manual Table A 18 Table A 19 Table A 20 Table A 21 Table A 22 Table A 23 Table A 24 Table A 25 Table A 26 Table A 27 Table A 28 Table A 29 Table A 30 Table A 31 Table A 32 Table A 33 Table A 34 Table A 35 Table A 36 Table A 37 Table A 38 Table A 39 Table A 40 Table A 41 Table A 42 Table A 43 Table A 44 Table A 45 Table A 46 Table A 47 RD LOGOFF Response Table seme A 14 RD READ D Request Table A 15 RD READ D Response A 15 RD READ Request A 17 RD READ Response Table A 17 RD READ MULT Request Table A 18 RD READ GPR MULT Response A 18 RD READ I Request Table A 19
241. lect Do or hit Enter Upon successful completion the tty device is properly configured For systems running AIX 4 or later return to the TTY screen select Change Show Characteristics of a TTY select tty where O or 1 insure that the following fields are set to the indicated values TTY tty 420 for ttyO 1 for ttyl TTY type tty TTY interface rs232 Description Asynchronous Terminal Status Available Location 00 00 S 00 1 for ttyO 2 for ttyl Parent Adapter 420 for ttyO 1 for ttyl Port Number s 1 for ttyO 2 for ttyl Terminal Type dumb Enable LOGIN disable Host Configuration 4 3 insure that the BAUD rate is 9600 for ttyO OR that the BAUD rate is 38400 for tty1 insure that the PARITY is none insure that the BITS per character is 8 insure that the Number of STOP BITS is 1 The other fields can remain at their default values select Do or hit Enter Upon successful completion the tty device is properly configured 5 This last step establishes the SLIP network over the tty1 device between the host and 4 4 the EVB It s optional for those using the recommended Ethernet connection for host to EVB communications This step is not required for ttyO since it is being used simply for terminal emulation Unlike a LAN interface a SLIP connection is point to point We first need to specify an IP address for the host and then an IP address for the other end of the SLIP connection which in this c
242. ler Safe Yes stop p 10 26 clockLib init p 10 27 401 EVB Function Reference 10 25 clockchip stop Synopsis Library Description Errors Attributes References 10 26 include lt clockLib h gt int clockchip_stop void clockLib a clockchip_stop stops the real time clock The clockLib library must be initialized by calling clockLib_init prior to calling this function EINVAL Library not initialized Async Safe No Cancel Safe Yes Interrupt Handler Safe Yes clockchip_start p 10 25 clockLib init p 10 27 401 EVB User s Manual Synopsis Library Description Errors Attributes References clockLib init include lt clockLib h gt int clockLib_init unsigned char regbase int reg_delta int first_index int last_index clockLib a clockLib_init initializes the clockLib library routines regbase specifies the base address of the clock nvram chip reg delta specifies the distance in bytes between each addressable byte in the chip first_index and last_index indicate the range of bytes in the NVRAM that can be accessed by clockchip_nvram_read and clockchip nvram write The range is specified using starting and ending index values inclusive clockLib init returns O if successful Note clockLib init should be called once at system initialization EINVAL Already initialized or index out of range Async Safe No Cancel Safe
243. les directory Another way to obtain the address is to search the Vital Product Data VPD area in ROM where the network address is stored The VPD fields consist of ASCII strings identifying the type of field a length byte specifying the length of the associated data and the data itself The VPD begins at address OxFFFF 00 and is marked by field VPD with 0 bytes of associated data The network address is marked by NA with six bytes of associated data the network address Finally the end of the VPD is marked with END To extract the network address a program would typically start at OXFFFF FEOO scan for NA verify the next byte is 0x6 and treat the next six bytes as the network address 6 16 401 EVB User s Manual 7 401 ROM Monitor This chapter describes the 401 EVB ROM Monitor program This ROM resident program provides chip and board level initialization and a user interface menu that supports board diagnostics program downloads and debug 7 1 ROM Monitor Source Code The ROM Monitor source code is provided for ROM development purposes This code is separate from the sample applications described in Chapter 8 The code is loosely organized by function in the following subdirectories and files within the usr osopen m401 evb openbios directory osopen m401_evb openbios for PC users Makefile Top level makefile to create ROM monitor image RS 6000 amp SUN makefile mak Top level makefile to cre
244. ll word boundary if possible This alignment facilitates full word moves of data to the appropriate target address without causing alignment exceptions S The size flag causes the output binary file to be padded to a particular size This option is useful if it is necessary to create binary files that are the same size as a target ROM device Error messages are generated if the generated image exceeds the specified size i offset The info flag places an information block into the output binary file at the specified offset Since this info block overlays what is currently in the file at the specified offset space should be reserved for its placement The info block contains the following fields long block_id Magic Number 0xBFAB0030 long entry point entry point of image Application Libraries and Tools 9 19 long toc ptr long text size long text p long data size long data long bss size long bss p addr long num syms long sym p addr long text offset o output file input elf used for XCOFF not used for ELF size of text section in bytes also offset from beginning of image to data section text origin address as generated in ELF module size of data section data origin as specified in generated ELF module size of bss section bss origin as specified in generated ELF module number of symbols from symbol section only valid if debug flag is set address of symbol table Calculated as text origin of
245. ller User s Manual 13H6986 PPC403GCX Embedded Controller Users Manual PPC401GF Embedded Controller User s Manual 13H6948 401 EVB User s Manual Overview of the 401 EVB This chapter introduces the hardware and software in the 401 EVB kit 1 1 Introducing the 401 EVB Hardware Components The 401 EVB kit contains the evaluation board with its power supply line cord serial port and Ethernet cables 1 1 1 401 Evaluation Board The 401 EVB is a full featured prototyping board which comes with the PowerPC 401GF embedded controller 1MB of flash memory the upper 512KB comes preprogrammed with the ROM Monitor 8MB of DRAM 512KB of SRAM two serial ports two 82C59 interrupt controllers cascaded a parallel port an Ethernet controller a real time clock 8KB NV RAM PCI host adapter functionality and an expansion interface connector Two DRAM slots are provided to support up to 64MB when both slots are populated with 32MB SIMMs The dual serial ports and parallel port connect to a National NS16C553 serial communications controller The Ethernet controller is a National DP83902 The real time clock calendar is supplied by a Dallas Semiconductor DS1643L 12 The PCI bus bridge chip is a PLX Technology PCI9060 3 Four 128Kx8 modules of 12 nsec SRAM in 32 pin 400 mil SOJ socketed packages provide the 512KB of SRAM Product documentation for devices other than the 401 can be obtained from the respective manufacturers Configuration and addre
246. location where the bytes will be copied to and ength specifies the maximum number of bytes to read clockchip nvram read returns the actual number of bytes read The clockLib library must be initialized by calling clockLib init prior to calling this function Note index must be within the range specified during clockLib init EINVAL Library not initialized or index out of range Async Safe No Cancel Safe Yes Interrupt Handler Safe Yes clockchip nvram write p 10 17 clockLib_init p 10 27 401 EVB Function Reference 10 21 clockchip nvram write Synopsis Library Description Errors Attributes References 10 22 include lt clockLib h gt int clockchip_nvram_write int index unsigned char buffer int length clockLib a clockchip nvram write writes non volatile RAM in the clock chip index specifies the starting byte of NVRAM buffer points to the location where the bytes will be copied from and ength specifies the maximum number of bytes to write clockchip_nvram_write returns the actual number of bytes written The clockLib library must be initialized by calling clockLib init prior to calling this function Note index must be within the range specified during clockLib init EINVAL Library not initialized or index out of range Async Safe No Cancel Safe Yes Interrupt Handler Safe Yes clockchip nvram read 10 16 clockLib_init p 10 27 401 EVB User s Manual
247. mages contains the programming logic for the field progammable gate arrays on the 401 EVB Appendix D 401 EVB Bill of Materials contains a list of parts used on the 401 EVB Xx 401 EVB User s Manual Conventions Used in This Book This book follows the numeric and highlighting notation conventions based on those used in the RISC System 6000 and AIX publications Numeric Conventions In general numbers are used exactly as shown Unless noted otherwise all numbers are in decimal and if entered as part of a command are entered without format information In text binary numbers are preceded by a B followed by the number enclosed in single quotes for example B 010 In commands binary numbers are preceded by Ob or b followed by the number which may be enclosed in single quotes for example 0b010 or b 010 In text hexadecimal numbers are preceded by an X followed by the number enclosed in single quotes for example X 1A7 In commands hexadecimal numbers are preceded by Ox or x followed by the number which may be enclosed in single quotes for example 0x1a7 or x 1a7 In text the hexadecimal digits A through F appear in uppercase In commands these digits are typically entered in lowercase Highlighting Conventions This book uses the following highlighting conventions The names of invariant objects known to the software appear in bold type In some text however such
248. mented in the ROM monitor to support debug If you want to interface your own debugger to the ROM monitor or modify the ROM monitor to interface with your debugger you will need to understand the existing message protocol associated with the various debugging functions The ptrace interface to the ROM monitor can best be understood by reviewing the information below along with the debug specific ROM monitor source code dbLib ptrace c A 2 MSQGDATA Structure In the interface descriptions shown below several references are made to a process id The concept of process ids does not apply to the ROM monitor so any nonzero value can be used The ROM monitor uses the value 42 Data structure MSGDATA is defined in dbg h New register definitions and new error messages are also defined in dbg h file dbg h File dbg h 4 3 5 9 95 09 12 14 COPYRIGHT IBM CORPORATION 1994 LICENSED MATERIAL PROGRAM PROPERTY OF I B M REFER TO COPYRIGHT INSTRUCTIONS FORM G120 2083 US Government Users Restricted Rights Use duplication or disclosure restricted by GSA ADP Schedule Contract with IBM Corp dif defined DBG define DBG H define BREAKPT 0x7D821008 ifndef define endif MIN MIN X Y X Y X Y ptrace definitions based on AIX ptrace define RD TRACE ME 0 define RD READ I 1 define RD READ D 2 define RD R
249. mp CASPIPE ff CLK CLK2 ff RESET RESET TABLE CURRENT STATE INPUT1 INPUT2 NEXT STATE ff f11 12 gt ff fl 1 x gt f0 f1 0 x gt fl 0 x 1 gt fl 0 x 0 gt 0 END TABLE kkkkkkkkkkkkkkkkkkkkk kkkkkkkkk kkkkkkkkk kkkkkkkkk kkkkk kkkkk kkkkk kkk S CAS EVEN BYTE ENABLE 3 KKK KK KKK e e e KIKI KKK HK KK ke e e e KIKI HK KK KK e eee he 0 411 0 4 amp CASPIPE QA4 WAIT amp BLAST amp W R amp DCLK1 amp XTEND 0 4 6 CASPIPE g12 QA4 amp CASPIPE amp BE3 4 0 4 amp CASPIPE gg CLK CLK2 gg RESET RESET TABLE C 27 CURRENT STATE INPUT1 INPUT2 NEXT STATE 44 411 412 gt 44 41 1 gt 40 41 0 gt 41 40 1 gt 41 40 0 gt 40 END TABLE ce e se e e e ke e he se e e e he e ke e e e e he e ke e e e e e e ke e ke se e ke e ke e ke e e ke e ke e kk kk 9 CAS ODD BYTE ENABLE 0 kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk S 511 QA4 amp CASPIPO QA4 WAIT amp BLAST W R amp DCLK1 amp XTEND 4 QA4 amp CASPIPO h12 QA4 amp CASPIPO amp BEO 4 0 4 amp CASPIPO hh CLK CLK2 hh RESET RESET TABLE CURRENT STATE INPUT1 INPUT2 NEXT STATE hh h11 h12 gt hh h1 1 x gt h0 h1 0 x gt hl ho x 1 gt hl ho x 0 gt h0 END TABLE KRHKKKKKKKKKKKK
250. mpatible PC running one of the following e Windows 3 1 or higher and a TCP IP package compliant with the Microsoft Windows Socket API definition Windows 95 Windows NT 3 51 Sun SPARCstation 5 10 or 20 workstation running Solaris 2 3 or higher or SunOS 4 1 3 or higher 2 1 RS 6000 Host System Requirements Hardware requirements of the host RS 6000 computer include Approximately 25MB of free disk space This space is required for the IBM High C C compiler the 401 EVB Software Support Package and the RISCWatch debugger When planning disk space usage consider disk space requirements for AIX and any other soft ware packages Two available serial ports one for terminal emulation and the other for host to EVB com munications Only one serial port is required if an Ethernet adapter is available for host to EVB communications For better performance an Ethernet connection is strongly recom mended Most RS 6000 computers come equipped with two serial ports and an Ethernet adapter Please consult your RS 6000 literature for more details A graphics display IBM 6091 or similar to display debugger screens The following software must be installed on the host RS 6000 computer to run the debugger that communicates with the ROM Monitor on the 401 EVB RISCWatch 3 3 or higher AIX Version 3 2 5 or higher AlX Windows with X11R5 and Motif 1 2 Host System Requirements 2 1 AIX tools used to develop OS Op
251. msg address execution status Status is 1 if program is running and O if stopped In the case of an error this field will be 1 OXFFFFFFFF msg data sequence number Sequence number of the last RD CONTINUE request that was received msg retcode RD COM ERR 1001 Communication error occurred msg retcode RD OK 0 Successful completion msg retcode RD ESRCH 3 The msg pid field identifies a process that does not exist A 22 401 EVB User s Manual A 3 18 RD STOP APPL 113 This request is used to interrupt program execution A 3 18 1 Request data Table A 33 RD STOP APPL Request Table Parameters Description msg request RD STOP APPL Requested API function msg rpid process_id Numeric process ID on the target sys tem msg data sizeof msg rpid Length of additional data being sent A 3 18 2 Response data Table A 34 RD STOP APPL Response Table Parameters Description msg retcode RD COM ERR 1001 Communication error occurred msg retcode RD OK 0 Successful completion msg retcode RD ESRCH 3 The msg pid field identifies a process that does not exist A 23 A 3 19 RD WAIT 108 This call allows the debugger to determine the current status of the debugged process after it is stopped The first least significant byte of the process status indicates the reason for stoppage this is always Ox7f The second byte contains the signal numb
252. n Power On Test Devices 000 Disabled System Memory RAM 001 Enabled Ethernet ENET 004 Enabled Serial Port 2 S2 Boot Sources 001 Enabled Ethernet ENET local 7 1 1 5 remote 7 1 1 4 hwaddr 1000abcdef55 004 Disabled Serial Port 2 S2 local 8 1 1 5 remote 8 1 1 4 hwaddr ffffffffffff 005 Enabled Serial Port 1 S1 Baud 9600 Enable disable tests Enable disable boot devices Change IP addresses Ping test Toggle ROM monitor debugger Toggle automatic menu Display configuration Save changes to configuration Set baud rate for sl boot Exit menu and continue O gt Q N EH 1 255 ROM monitor debugger will be active on exit Enable disable tests Enable disable boot devices Change IP addresses Ping test Toggle ROM monitor debugger Toggle automatic menu Display configuration Save changes to configuration Set baud rate for sl boot Exit menu and continue gt Q N EH gt 7 Device Configuration Power On Test Devices 000 Disabled System Memory RAM 401 EVB ROM Monitor 7 19 001 Enabled Ethernet ENET 004 Enabled Serial Port 2 S2 Boot Sources 001 Enabled Ethernet ENET local 7 1 1 5 remote 7 1 1 4 hwaddr 1000abcdef55 004 Disabled Serial Port 2 S2 local 8 1 1 5 remote 8 1 1 4 hwaddr ffffffffffff 005 Enabled Serial Port 1 S1 Baud 9600 Debugger Enabled on exit Enable disable te
253. n Booting from ENET Ethernet Sending bootp request Loading file usr osopen PLATFORM samples boot img Sending tftp boot request Transfer Complete 44 Loaded successfully Entry point at 0x10180 Please give the number of runs through the benchmark At this point enter the desired number of runs through the function or benchmark being timed In this sample the function being timed should execute for approximately a second so a number between 1 and 10 would suffice 8 4 Resolving Execution Problems Configuration errors in the network or bootp tables cause most of the problems with running the sample applications This section contains information that will aid users in identifying common problems 8 4 4 Using the Ping Test on the ROM Monitor to Verify Connectivity If the ping test fails verify that TCP IP is running on the host system and that the IP addresses on the selected interface are correct The local address refers to the IP address of the evaluation board and the remote refers to the host workstation address The host workstation address must match the one selected during configuration of the host network interface Also consult your TCP IP documentation to insure proper network configuration 401 EVB Sample Applications 8 9 8 4 2 bootp and tftp Servers Daemons for ROM Monitor loads Insure that the bootp and tftp servers are started on the host workstation If possible use the tftp c
254. n Errors Example Attributes References 10 84 include lt ppcLib h gt void ppcMftb tb_t clock_data ppcLib a ppcMftb returns the current time base data Typically the time base registers are used to determine the number of clock cycles that have passed None Retrieve the current value of time base high and low registers tb t clock data ppcMftb amp clock data Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMftsr include lt ppcLib h gt unsigned long ppcMftsr void ppcLib a ppcMftsr returns the current value of the Timer Status Register TSR The file lt ppcLib h gt contains several defined constants for the TSR that can be used as masks None Retrieve the current value of the TSR unsigned long tsr value tsr value ppcMftsr Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 85 ppcMtbrcr0 ppcMtbrcr7 Synopsis Library Description Errors Example Attributes References 10 86 include lt ppcLib h gt void ppcMtbrcrO unsigned long brcrO value void ppcMtbrcr1 unsigned long brcr value void ppcMtbrcr2 unsigned long brcr2 value void ppcMtbrcr3 unsigned long brcr3 value
255. n can be used for host to EVB communications The Ethernet connection is made through an Ethernet adapter on the host and the 10Base2 or 10BaseT connector on the EVB Ethernet is much faster than SLIP and is recommended when downloading large applications on to the board or when using the RISCWatch debugger An Ethernet connection requires additional hardware The 401 EVB supports connection via Standard Ethernet thin coax 10Base2 or twisted pair 10BaseT This connection requires that the host PC be equipped with an appropriate Ethernet adapter The host adapter is not included in the EVB kit Please consult your PC and adapter documentation for requirements and installation instructions 10Base2 connection requires at least a thin coaxial cable and a T connector when the EVB is added to an existing network If the EVB is at one of the ends of the Ethernet network a terminating resistor is also required If the Ethernet network is exclusive between the host and the EVB a thin coaxial cable two BNC T connectors and two BNC terminators are required At a minimum a 10BaseT connection requires a crossover Ethernet twisted pair cable included in the kit for point to point communications If you want more than two nodes you will need a hub and straight through twisted pair cables Other hardware required will depend on the type of Ethernet adapter you have on your PC and whether the board is being connected to an existing Ethernet
256. n the BM OS Open User s Guide 9 18 401 EVB User s Manual 9 5 Tools Several host tools are provided to assist you in using the EVB support package or creating your own applications for the PowerPC 401GF The tools can also be used for ROM program development 9 5 1 elf2rom elf2rom takes an ELF format executable file from the linker binder extracts the text and data sections and writes them to a binary file for use as input to a ROM programmer This tool can be used by those who wish to modify the ROM Monitor source code and create a new flash memory binary file for use with a ROM programmer or the flash update utility included with EVB software Syntax elf2rom v d p s size i offset o output file input elf Description The program takes the input file input elf which is assumed to be an ELF file output from the linker extracts the text and data sections and writes them to the file output file There are several optional flags that can affect elf2rom processing They are described below V The verbose flag causes information about the generated output file to be written to stderr at the completion of the utility This information includes the sizes and origins of the various sections and entry point d The debug flag will cause the symbol information from the input ELF file to be included after the data section in the output binary file p The promotion flag causes the data section to be aligned on a fu
257. n the Ethernet controller is not initialized If init flag is set to a 0 value initialization of the Ethernet controller is performed 9 3 4 Liquid Crystal Display Device Driver The Liquid Crystal Display LCD device driver controls the optional LCD device The device driver supports write and I O control functions only 9 3 4 1 LCD Device Driver Installation The LCD device driver is installed by calling driver_install Following is an example of device driver installation include lt lcdLib h gt int devhandle rc driver install amp devhandle lcd init Icd init is declared in the file lt IcdLib h gt as follows int lcd init driver t dsw va list vargs Upon successful installation driver install returns 0 otherwise 1 is returned For more information on driver install refer to the OS Open Programmer s Reference 9 14 401 EVB User s Manual 9 3 4 2 LCD Device Installation After the LCD device driver is installed a named device can be created using device_install Following is an example of device installation rc device install dev lcd CHRTYPE devhandle 2 0x07E00300 8 For device installation devhandle is the value obtained from the driver install Device type CHRTYPE is defined in lt sys devDrivr h gt Additional parameters passed in the device install call are as follows Parameter Meaning Fourth Parameter Number of lines on LCD 1 or 2 Fifth Parameter LCD base reg
258. n the Trumpet Winsock icon in the Trumpet Winsock Files program group 2 If setup was bypassed during installation your connection should fail A Trum pet Winsock window comes up indicating your connection status Select Setup from the File menu to open the Setup dialog 3 Set the IP address field to the IP address of the PC host 8 1 1 4 is suggested to maintain consistency with this document Select SLIP under Drivers and then go to Dialler settings 5 Select the appropriate COMM port COM2 for example to be used for SLIP communications 6 Setthe Baud rate to 38400 Host Configuration 4 9 7 Disable Hardware handshaking and make sure No automatic login is selected Use the default settings for the remaining options and or check the help for more details 8 Select OK from Dialler Settings and then OK from Setup Edit the hosts file found in the installed Trumpet directory to include both the PC host IP address and the board IP address For example 8 1 1 4 local slip 8 1 1 5 evb slip After entering all the information you may need to restart Trumpet Winsock for the network setup to take effect Prior to exiting Windows we recommend terminating Trumpet Winsock close the application If you do not follow this recommendation subsequent Trumpet starts may fail If this occurs you will need to reboot your system 4 2 2 Ethernet Setup PC In addition to or in place of the SLIP connection an Ethernet connectio
259. nction the thread may or may not be canceled during execution of the function 10 1 3 Interrupt Handler Safe Functions An interrupt handler safe function may be called by a first level interrupt handler FLIH 10 2 401 EVB Functions Descriptions of the functions provided specifically to support the 401 EVB are listed in Table 10 1 Table 10 1 Functions Specific to 401 EVB the supplied value Function or Macro Description Page async init Installs the asynchronous device driver 10 10 biosenet attach Attaches the ROM Monitor Ethernet to an 10 11 IP address clock set Sets the OS Open POSIX clock to the 10 13 value obtained from the battery operated real time clock clockchip get Reads the real time clock 10 14 clockchip get calibration Returns the clock s calibration byte 10 15 clockchip nvram read Reads bytes from the clock chips NVRAM 10 16 clockchip nvram write Writes bytes to the clock chips NVRAM 10 17 clockchip set calibration Updates the clock s calibration byte with 10 24 10 2 401 EVB User s Manual Table 10 1 Functions Specific to 401 EVB Function or Macro Description Page clockchip start Starts the real time clock 10 25 clockchip stop Stops the real time clock 10 26 clockLib init Initializes the clockLib library routines 10 27 dbg ioLib init Initializes the library 10 28 dcache flu
260. nd usage for ROM Monitor and OS Open non JTAG targets are addressed in the RISCWatch Debugger User s Guide included in the EVB kit A sample debug session is included with the debugger 1 2 3 High C C Compiler The IBM High C C compiler is a globally optimizing compiler developed for the PowerPC 1 2 401 EVB User s Manual family of processors It produces executable code in Extended Link Format ELF file format The version included in the software support package is a limited capacity version created specifically for the 401 EVB kit It supports the compilation assembly and linkage of the sample application programs and the ROM Monitor source code A full featured version of the IBM High C C compiler is available from IBM For more information call the PowerPC Embedded Systems Solutions Center at 919 254 1810 1 2 4 OS Open Real Time Operating System OS Open is a real time operating system RTOS available for the PowerPC 400 Series 60x and 7xx processors OS Open is designed to take full advantage of the power of the IBM PowerPC RISC processors Also because the OS Open environment is built in a scalable fashion it can be configured to meet the functional requirements and memory constraints of a wide variety of embedded systems OS Open features Hard real time support including deterministic execution priority inheritance protocols and priority ceiling protocols Board support packages for plug and play operati
261. ned in this chapter Please refer to the section corresponding to your host system 4 1 RS 6000 Host Configuration RS 6000 configuration requires that you be the superuser of the host workstation This is accomplished by logging in as root or by using the AIX su command to become the superuser 4 1 1 Serial Port Setup RS 6000 The RS 6000 includes two serial ports to support communications via asynchronous data transfer These ports are labeled S1 and S2 on the back of the RS 6000 s system unit When properly configured one serial port can be used to connect a terminal emulator running on the host to the ROM Monitor running on the EVB and the other to provide a Serial Line Internet Protocol or SLIP network interface between the host and the EVB to download applications This section addresses the proper configuration of the 1 and S2 serial ports to support these connections Details on setting up the terminal emulator are discussed in a later chapter In this section S1 and S2 refer to the respective serial ports on the host RS 6000 and SP1 and SP2 labeled J6 and J19 on the board to the respective serial ports on the EVB The connection of the terminal emulator running on the host to the ROM Monitor running on the EVB is made through the S1 serial port on the RS 6000 and the SP1 serial port on the EVB A connection between the S2 serial port on the host and the SP2 serial port on the EVB provides a SLIP network interface to download a
262. network Please consult the documentation included with the adapter hardware for additional instructions Since TCP IP packages for PCs vary users should consult their TCP IP documentation for information regarding the management and configuration of an Ethernet network interface Establishment of an ethernet interface requires a host IP address If the host PC is connected to an existing ethernet network the host IP address should already be defined Consult your network administrator on how to obtain the host s ethernet IP address and how to add the EVB to the existing network 4 10 401 EVB User s Manual To maintain consistency with this document the following IP addresses are suggested for the Ethernet interface e PC host source 7 1 1 4 Board destination 7 1 1 5 Make a note of the IP addresses selected since they will be needed later 4 2 2 1 Windows 3 1 Trumpet Winsock users can use the following steps as guide to establishing a local Ethernet interface 1 Trumpet Software International provides software which works with packet drivers When you first install your ethernet card a set of different device driv ers are provided In order to use Trumpet Winsock you will need to select a Packet Driver The Kingston ethernet card provided with some RISCWatch packages contains a packet driver that can be selected If you buy an ethernet card that does not contain a packet driver you can use the help option on the
263. nnector J4 Squall Interface Continued Pin Name Comment 77 S A7 78 S A6 79 S A5 80 S A4 81 S A3 82 S A2 83 45V 84 07 S DO is data LSb 85 S D6 86 S D5 87 04 88 89 02 90 01 91 00 92 GND 93 45V 94 N C 95 N C 96 GND 97 SQSDA 98 SQSCL 99 12 100 12V 5 7 Power Connector The 401 EVB comes with two standard PC AT type connectors for quick connect disconnect to a power supply A power supply and a line cord are provided with the 401 EVB Power supply tolerances are 5 for the 5V supply Table 5 9 defines the connections for the J11 power supply connector 5 14 401 EVB User s Manual Table 5 9 Connector J11 Power Pin Name Comment 1 Power Good standard PC power supply planar connector P1 to 1 6 2 45V 3 N C 4 N C 5 GND 6 GND 7 GND standard PC power supply planar connector P2 to 7 12 8 GND 9 N C 10 45V 11 45V 12 45V Warning Use only the power supply provided in your EVB kit 5 8 PCI Related Connectors Table 5 10 Connector J39 Accessory 3 3V Pin Name 3 3V GND Comment standalone board connect J39 1 to J40 1 to provide PCI socket 3 3V from board board operating as PCI adapter card do not connect J39 to J40 401 EVB Connectors 5 15 5 16 Table 5 11 Connector J40 PCI Socket 3 3V Pin Name Comment 1 3 3V
264. ns If you want more than two nodes you will need a hub and straight through twisted pair cables Other hardware required will depend on the type of Ethernet adapter you have on your RS 6000 and whether the board is being connected to an existing Ethernet network A X Communications Concepts and Procedures GC23 2203 two volumes has additional information about the management and configuration of a TCP IP network including specifics as to how to configure an Ethernet network interface Some of the basic steps are outlined below You should consult your network administrator before attempting ethernet setup 1 The host must be equipped to participate in a 10Base2 or 10BaseT Ethernet network This may require the installation of an Ethernet adapter card for your specific RS 6000 model and as discussed previously additional connectivity hardware Consult the documentation included with the hardware for installation instructions Most RS 6000 models come with Ethernet adapters already installed They are labeled ET in the back of the RS 6000 system unit Host Configuration 4 5 2 Assuming the host system is equipped with the appropriate Ethernet adapter the Ethernet interface must be configured properly To do this log in as root or the superuser su enter smit select Communication Applications and Services select TCP IP select Further Configuration select Network Interfaces select Network Interface Selection select Add a Network
265. ns and macros refer to the OS Open Programmer s Reference Table 9 1 OS Open Libraries Library File Name Platforms Alignment Exception Support Library alignLib a Common ANSI C Library cLib a Common ANSI C Math Library mathLib a Common ANSI C Library fsLib a Common Block Buffer Library bbuffLib a Common Bios Ethernet Library benetLib a 401 EVB Boot Library DRAM bootlLib a 401 EVB Boot Library ROM bootrLib a 401 EVB Application Libraries and Tools 9 1 Table 9 1 OS Open Libraries Library File Name Platforms ROM Monitor Ethernet Interface Library benetLib a 401 EVB C runtime support High C support Library cppLib a crti o ELF crtn o mwdctor o Card Services enabler software layer for PCMCIA csLib a Common support Clock Support Library and NV RAM clockLib a 401 EVB Debug Support Library dbLib a Common Device and File Support Library devLib a Common DOS File System Support Library fatLib a Common Dynamic Loader Library ldrLib a Common Ethernet Support Library enetLib a 401 EVB File Transfer Protocol Support Library ftpLib a Common Floating Point Library fpeLib a 401 EVB ELF Floating Point Emulation Library fpCSLib a Common Input output Support Library ioLib a 401 EVB Kernel Abstract Data Types Library kadtLib a Common LCD Library IcdLib a 401 EVB Network Support Library netLib a Common NFS Support Library nfsLib a Common OpenShell shell o Common PCMCIA AT
266. nterval Timer PIT ppcMfpmcr0 Returns the value of the Power manage 10 75 ment control register PMCRO ppcMfpvr Returns the value of the processor version 10 76 register ppcMfsgr Returns the value of the Storage Guard 10 77 Register SGR ppcMfsler Returns the value of the Storage Little 10 78 Endian Register SLER ppcMfsprg0 Returns the value of the special purpose 10 79 ppcMfsprg3 register generals SPRGO SPRG3 ppcMfsrr0 Returns the value of SRRO 10 80 ppcMfsrr1 Returns the current value of SRR1 10 81 ppcMfsrr2 Returns the current value of SRR2 10 82 10 6 401 EVB User s Manual Table 10 1 Functions Specific to 401 EVB Function or Macro Description Page ppcMfsrr3 Returns the current value of SRR3 10 83 ppcMftb Returns the current time base data 10 84 ppcMftsr Returns the current value of the timer sta 10 85 tus register TSR ppcMtbrcr0 Set the specified bus region control regis 10 86 ppcMtbrcr7 ter BRCRO BRCR7 ppcMtcdbcr Sets the value of the Cache Debug Control 10 87 Register CDBCHR ppcMtdac1 Sets the values of the processor debug 10 88 ppcMtdac2 address compare registers DAC1 DAC2 ppcMtdbcr Sets the value of the debug control register 10 89 DBCR ppcMtdbsr Sets the value of the debug status register 10 90 DBSR ppcMtdccr Sets the value of the Data Cache Cache 10 91 abilit
267. o 11 12 PP p11 11 12 rr rii C 18 MACHINE OF BITS CASOO B0 WITH STATES 0 1 NODE NODE MACHINE OF BITS CASOO B1 WITH STATES 10 11 NODE NODE MACHINE OF BITS CASOO B2 WITH STATES 30 31 NODE NODE MACHINE OF BITS CASOO B3 WITH STATES 0 1 NODE NODE MACHINE OF BITS CASPIPE WITH STATES 10 11 NODE NODE MACHINE OF BITS CASPIPO WITH STATES 0 NODE NODE MACHINE OF BITS LA2 WITH STATES 00 01 NODE NODE MACHINE OF BITS ACC PEND WITH STATES 0 1 NODE NODE MACHINE OF BITS RASE WITH STATES 40 41 NODE NODE MACHINE OF BITS RASO WITH STATES r0 r1 NODE 401 EVB User s Manual r12 NODE tt MACHINE OF BITS LA3 WITH STATES 0 1 t11 NODE t12 NODE uu MACHINE OF BITS RDY WITH STATES u0 ul ull NODE 112 NODE ccc MACHINE OF BITS REFING WITH STATES 0 1 11 NODE 12 NODE vv MACHINE OF BITS COUNT1 3 0 WITH STATES 210 B 0000 211 B 0001 Z12 B 0010 Z13 B 0011 Z14 B 0100 Z15 B 0101 216 B 0110 217 B 0111 718 B 1000 219 B 1001 2110 B 1010 2111 B 1011 2112 B 1100 2113 B 1101 2114 B 1110 2115 B 1111 3111 NODE k111 NODE ww MACHINE OF BITS COUNT2 3 0 WITH STATES 220 B 0000 221 B 0001 222 B 0
268. o 1 2 hi 8Mx32 double sided 32MB Table 5 15 Jumper J9 DRAM Programming PDO os Factory J9 Description Setting 1 2 see Table 5 14 Jumper Programming of SIMM Size on page 17 2 3 lt Table 5 16 Jumper J10 Arbiter Select En Factory J10 Description Setting open standalone board operation lt 1 2 board operating as PCI adapter 401 EVB Connectors 5 17 5 18 Table 5 17 Jumper J12 PCI SERR Control P Factory J12 Description Setting open standalone board PCI socket SERR will interrupt the 401 as Critical Interrupt locally generated PCI SERR will not generate an interrupt 1 2 standalone board PCI socket SERR will interrupt the lt 401 as Critical Interrupt locally generated PCI SERR will interrupt the 401 as Critical Interrupt 2 3 board operating as PCI adapter card local PCI SERR sent to PCI bus Table 5 18 Jumper J20 Coax Twisted pair Selection um Factory J20 Description Setting open coax selected 1 2 twisted pair selected lt Table 5 19 Jumper J21 Twisted pair Link Integrity Checking 421 Description Setting open enable twisted pair link integrity checking 1 2 disable twisted pair link integrity checking jumper J22 should be open 401 EVB User s Manual Table 5 20 Jumper J22 Twisted pair Good link LED
269. ocr_value iocr value ppcMfiocr Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMfmsr include lt ppcLib h gt unsigned long ppcMfmsr void ppcLib a ppcMfmsr returns the value of the Machine State Register MSR Refer to the ppc gt file for the defines of constants that can be used as masks with the MSR value None See ppcMtmsr p 10 98 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 73 ppcMfpit Synopsis Library Description Errors Example Attributes References 10 74 include lt ppcLib h gt unsigned long ppcMfpit void ppcLib a ppcMfpit returns the value of the Programmable Interval Timer PIT None Get the current PIT value unsigned long pit value ppcMfpit Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMfpmcr0 include lt ppcLib h gt unsigned long ppcMfpmcr0 void ppcLib a ppcMfpmcro returns the value of the Power Management Control Register PMCRO None Get the current PMCRO val
270. oe 99 99 09 oe oe oe oe oe oe 99 oe oe oe oe oe oe ODD BANK WE EVEN BANK WE BYTE 0 EVEN CAS BYTE 1 EVEN CAS BYTE 2 EVEN CAS BYTE 3 EVEN CAS BYTE O ODD CAS BYTE 1 ODD CAS BYTE 2 ODD CAS BYTE 3 ODD CAS SELECT BETWEEN ROW COLUMN ADDRRESS EVEN RAS A3 FOR ODD BANK A3 FOR EVEN BANK ODD RAS READY SIGNAL TO MASTER EVEN ODD DATA SELECT FOR READ EVEN ODD DATA SELECT FOR READ MEMORY OUTPUT ENABLE RASO RAS1 RASO RAS1 401 EVB User s Manual RAS2 FOR EVEN BANK RAS3 FOR EVEN BANK RAS2 FOR ODD BANK RAS3 FOR ODD BANK BBB DFF ss MACHINE OF BITS A30DD WITH STATES 50 51 y NODE z NODE yy MACHINE OF BITS A3EVEN WITH STATES 0 c b zz MACHINE OF BITS ADDRMUX WITH STATES 20 21 j k NODE bb MACHINE OF BITS BANKSELA WITH STATES 0 1 b11 NODE b12 NODE cc MACHINE OF BITS BANKSELB WITH STATES 0 1 11 NODE c12 NODE dd MACHINE OF BITS CASEE BO WITH STATES 40 41 11 NODE d12 NODE ee MACHINE OF BITS CASEE B1 WITH STATES 0 1 ell NODE el2 NODE ff MACHINE OF BITS CASEE B2 WITH STATES 0 f1 11 NODE 12 NODE gg MACHINE OF BITS CASEE_B3 WITH STATES g0 gl gll NODE g12 NODE hh h11 h12 ii i11 i12 33 311 312 kk k11 k12 11 111 112 m11 m12 o
271. ommand from another workstation to retrieve the load image If this fails make sure the image exists in the target directory and that it is readable by others If the tftp transfer succeeds check the bootptab entry in the bootptab file to insure that it specifies the correct interface and IP address of the evaluation board 8 5 Using OS Open Functions OS Open provides the following major classes of functions for the embedded programming environment Thread management The unit of execution context for OS Open is the thread as defined by POSIX standards Functions are provided to create threads with various scheduling and execution attributes To manage the execution environment serialization and synchronization primitives are part of OS Open The system also provides functions to associate data with specific threads Storage management OS Open supports variable block allocations in the form of a heap Functions are pro vided to extend the heap query heap usage and allocate storage to meet alignment constraints OS Open also provides an independent storage management mechanism to allocate fixed blocks of storage in constant time Interrupt and fault support OS Open provides functions to attach user written code to any of the processor excep tions and interrupts Most of the functions of OS Open can be used in these interrupt handlers except for those functions that suspend execution or are valid only in the con text of an executing
272. ommand to begin the installation via smit smit install latest 8 Type the fully qualified path name of the file EVB instal into the Input device directory for software field The path includes the directory selected in Step 2 for example usr sys inst images EVB instal 9 Press Enter 10 Position the cursor on the Software to install line 11 Select the list button X Window version or the F4 List function key character based version to display a list of available software 12 From the list select the item or items appropriate for your platform and application install the IBM High C C Compiler select the highc base item ELF file format version only install the complete OS Open distribution select both the OS Open base and the OS Open platform specific items 13 Select OK to complete the selection process and return to the Install Software Products at Latest Available Level window 14 Ensure that the response for Automatically install PREREQUISITE software is no For systems running AIX 4 or later this field is called AUTOMATICALLY install requisite software 15 Ensure that the response for OVERWRITE existing version is yes For systems running AIX 4 or later this field is called OVERWRITE same or newer versions 16 Ensure that the response for COMMIT Software is yes For systems running AIX 4 or later this field is called COMMIT software updates 17 Begin the installation by s
273. omment 13 Ready 14 BusErr 15 Reset 16 GND 17 LA2 18 LA3 19 ALE 20 GND 21 BE3 22 BE2 23 BE1 24 BEO 25 GND 26 BLast 27 GND 28 W R 29 GND 30 BusWidthO 31 BusWidth1 32 Halt 401 EVB Connectors 5 9 Table 5 7 describes the signal assignments for the J16 processor expansion receptacle on the 401 EVB Table 5 7 Connector J16 Processor Expansion 2 Pin Name Comment 1 BO 401GF Address and Data 2 B1 Address LSB 3 B2 Data LSB in Little Endian 4 B3 Data MSB in Big Endian 5 B4 6 B5 BO is MSb of this byte 7 B6 8 B7 9 B8 401GF Address and Data 10 B9 11 B10 B8 is MSb of this byte 12 B11 13 B12 14 B13 15 B14 16 B15 17 B16 401GF Address and Data 18 B17 19 B18 B16 is MSb of this byte 20 B19 21 B20 22 B21 23 B22 24 B23 25 B24 401GF Address and Data 26 B25 Address MSB 27 B26 Data MSB in Little Endian 28 B27 Data LSB in Big Endian 29 B28 30 B29 B24 is MSb of this byte 31 B30 32 B31 5 10 401 EVB User s Manual 5 6 Squall Expansion Interface The EVB uses a 100 pin receptacle as the Squall interface connector shown in Figure 5 6 below 1 2 Figure 5 6 100 Pin Squall Receptacle Table 5 8 describes the expansion interface connector on the 401 EVB Table 5
274. on msg rpid process_id Numeric process ID on the target sys tem msg address register Name of the register to be read msg data sizeof msg rpid Length of additional data being sent A 3 12 2 Response data Table A 22 RD READ GPR Response Table Parameters msg retcode RD COM ERR 1001 Description Communication error occurred msg retcode RD OK 0 Successful completion msg retcode EIO 5 Register is not defined msg retcode RD REG ERR 1004 Unable to access given register msg data value Value read from register OXFFFFFFFF if error occurred msg retcode ESRCH 3 The msg pid parameter identifies a pro cess that does not exist msg data len 0 Length of additional data being sent A 17 A 3 13 RD READ GPR MULT 71 This request returns the contents of general purpose registers 0 to 18 inclusive of the debugged process A 3 13 1 Request data Table A 23 RD READ GPR MULT Request Table Parameters msg request RD READ GPR MULT Description Requested API function msg rpid process_id Numeric process ID on the target sys tem msg data sizeof msg rpid Length of additional data being sent A 3 13 2 Response data Table A 24 RD READ GPR MULT Response Table Parameters msg retcode RD COM ERR 1001 Description Communication error occurred
275. on Windows 95 users do not need to install Trumpet since the TCP IP package that comes with Windows 95 can be used to establish the Ethernet connection The following information is provided as a guide to installing the Trumpet Winsock code It is not meant to be a replacement to the installation instructions contained at the Trumpet Internet site It is provided to help clarify items which may be confusing 1 Go to the Trumpet Software International s web site http www trumpet com and find the installation information for Trumpet Winsock You want to download the latest version which can be used for Windows 3 1 must have 16 bit sup port For example version 3 0 file twsk30c exe is a combined 16 bit Windows 95 release This version can be downloaded and used for an evaluation period of 30 days Use beyond the evaluation period requires a purchase 2 The downloaded version is usually a single file called a self extracting ZIP file has an extension This file should be installed in a new directory cNrumpet for example and then executed Execution is accomplished by going to the newly created directory and entering the name of the file This will result in the creation of many more files in the new directory 3 Read any README files carefully Ethernet users are interested in directions concerning Packet Drivers because you will not be using a modem and you have already determined that a TCP IP package does not exist on
276. on of popular board level products Support for existing American National Standards Institute ANSI C and emerging POSIX standards Open network interfaces to support embedded systems in heterogeneous environments Scalable implementations to meet the requirements and constraints of a variety of embedded systems The version of OS Open included in the EVB software contains a limited function kernel that limits the number of threads that can be in existence at one time Additional details can be found in the readme file following software installation A full function OS Open kernel is available from IBM Contact the IBM Embedded Systems Solutions Center at 919 254 1810 for additional information 1 2 5 Dhrystone Benchmark Program The Dhrystone benchmark is a commonly available integer benchmark It is included as an example program to be built loaded onto the evaluation board and executed The results of this benchmark may vary based on compiler options and the system environment in which it is run 1 2 6 Application Tools Several host based tools are provided to support ROM and application development on the 401 EVB Overview of the 401 EVB 1 3 401 EVB User s Manual Host System Requirements This chapter describes the hardware and software requirements of the host system to which the 401 EVB is to be connected Supported host systems include an IBM RS 6000 workstation running AIX 3 2 5 or higher an IBM or co
277. opsis Library Description Errors Attributes Examples and references are provided or referenced where appropriate 10 1 Attributes and Threads Functions and macros have attributes that affect thread execution Depending on their behavior functions may or may not be async safe cancel safe and interrupt handler safe 10 1 1 Async Safe Functions An async safe function may be entered by two or more concurrently executing threads with each thread getting the correct results Functions that operate only on disjoint or local data objects are reentrant and are therefore async safe For example ppcCntlzw operates only on its arguments making it reentrant and therefore async safe Functions that operate on common or global data objects may use serialization techniques such as mutexes and semaphores within the functions to ensure async safe operation enet send packet uses the functions semwait and sempost to force serialization Refer to the OS Open User s Guide for more information about the use of mutexes and semaphores 401 EVB Function Reference 10 1 10 1 2 Cancel Safe Functions The cancel safe attribute is important only to threads executing in deferred cancelability mode the cancel state is enabled the cancel type is deferred A thread executing in deferred cancelability mode can execute a cancel safe function without being canceled If the same thread executes a non cancel safe fu
278. or the update to take effect TCP IP needs to be re started This may require a re boot of the system and or a restart of the TCP IP package 4 3 Sun Host Configuration Sun configuration requires that you be the superuser of the host workstation This is accomplished by logging in as root or by using the su command to become the superuser Host Configuration 4 13 4 3 1 Serial Port Setup SUN The Sun workstation includes two serial ports to support communications via asynchronous data transfer These ports are labeled Serial A and Serial B on the back of the Sun s system unit Some SPAROstation models multiplex these two ports into one physical port labeled A B Use A if it s available since use of the B port requires a special de multiplexing cable from Sun This section refers to these ports as S1 and S2 respectively When properly configured one of the serial ports can be used to connect a terminal emulator running on the host to the ROM Monitor running on the EVB This connection is made through the S1 serial port on the Sun and the SP1 serial port on the EVB The S1 port on the host must be configured for a baud rate of 9600 8 data bits 1 stop bit and no parity The proper setting of these parameters is discussed later in the section on terminal emulation 4 3 2 Ethernet Setup SUN Since all Sun SPARCstations come equipped with an ethernet or AUI port an ethernet connection is used for host to EVB communications The ethern
279. orwarding of packets to the TCP IP protocol stack When forwarding is disabled Ethernet packets received by the Ethernet device driver can be read by the application using enet_recv_packet None Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes enet native attach p 10 33 enet enable ipinput p 10 32 enet send packet p 10 36 e packet p 10 35 401 EVB Function Reference 10 31 enet enable ipinput Synopsis Library Description Errors Attributes References 10 32 include lt enetLib h gt void enet_enable_ipinput void enetLib a enet_enable_ipinput enables the forwarding of packets to the TCP IP protocol stack When forwarding is enabled all Ethernet packets received by the Ethernet device driver are forwarded to the TCP IP stack None Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes enet native attach p 10 33 enet disable ipinput p 10 31 enet send packet p 10 36 e packet p 10 35 401 EVB User s Manual Synopsis Library Description Errors Example enet native attach include lt enetLib h gt int enet_native_attach unsigned long processor_speed unsigned long sram_size enetLib a enet_native_attach attaches the TCP IP protocol stack to the Ethernet device The processor_speed specifies the CPU speed The sram_size specifies the Ethernet controller s memory size On the 40
280. ory The makefile will compile the usr_samp c file link the resulting object file with the support libraries and produce the boot file usr samp and the boot image file usr_samp img If the suggested bootptab was used then samp img must be renamed or copied to boot img in order to be selected by the Rom Monitor load process Select option 0 from the ROM Monitor screen to load and run the image 401 EVB Sample Applications 8 7 To load using RISCWatch enable the ROM Monitor debugger via option 5 exit the ROM Monitor menu via option 0 start RISCWatch on the host system make sure the RISCWatch environment file is setup for ROM Monitor communications then use the RISCWatch load image command to load the usr samp img file Once successfully loaded issue the attach 42 and logoff commands to return control to the ROM Monitor and initiate the run You should see the following messages or ones like them appear on the ROM Monitor Screen Booting from ENET Ethernet Sending bootp request Loading file usr osopen PLATFORM samples boot img Sending tftp boot request Transfer Complete Loaded successfully Entry point at 0x10180 Hello 401 user Your ROM Monitor version is 7 5 Your 401 Evaluation Board has 8388608 bytes of DRAM installed Your Ethernet controller s network address is 1000abcdef55 usr samp done The DRAM amount listed should match the amount installed on the board 8
281. other definitions needed for remote debug define RD_MAXDATA 1800 Total no of DWORDS in a MSGDATA define RD_MINLENGTH 6 Min no of dwords in msg define RD_MINBYTES RD_MINLENGTH sizeof unsigned long define RD MAXBUFFER RD MAXDATA RD MINLENGTH define RD MAXPACKET 1000000 Max bytes in TCP IP packet define RD REGBYTES 3248 4 No of bytes for all registers define NO KILL 1 do not kill any users processes define KILL PROC 0 kill user process upon logoff define MAX ERROR 1014 last error for rptrace define MIN ERROR 1000 first error for rptrace define MIN PACKET SIZE 24 define DBG SPORT 20044 define DBG DPORT 20050 new error codes define RD NOLOAD ERR 1000 no loader info available define RD COM ERR 1001 communication error occured define RD SIZE ERR 1002 not enough room to pass all info define RD NOTSUPP 1003 call not supported define RD REG ERR 1004 invalid register number requested define RD NOTAVAIL 1005 call not implemented at this time define RD NOFILE ERR 1006 file could not be loaded no file define RD NOSCAN ERR 1008 could not locate scan string file define RD NOPERM 1010 no permission to log on define RD INVALID SEQ 1011 invalid rptrace sequence define
282. ounts consecutive leading zeros in a 10 46 value ppcDcbf Copies the cache block back to main stor 10 47 age if the block resides in cache and has been modified with respect to main stor age and then invalidates the cache block ppcDcbi Invalidates a cache block discarding any 10 48 modified contents if the block is valid in cache ppcDcbst Copies a cache block discarding any mod 10 49 ified contents if the block is valid in cache ppcDcbz Sets a cache block to 0 10 50 ppcDflush Writes O s into the data cache and then 10 51 turns data cache off by writing O s into the data cache cacheability register DCCR ppcEieio Ensures that all storage references before 10 52 the call finish before any storage refer ences after the call start ppcHalt Is a one instruction spin loop effectively 10 53 putting the processor in an enabled wait at the point of invocation 10 4 401 EVB User s Manual Table 10 1 Functions Specific to 401 EVB Function or Macro Description Page ppclcbi Invalidates an instruction cache block 10 54 ppclsync Causes the processor to discard any 10 55 instructions that may have been prefetched ppaMfbear Returns the current value of the bus error 10 56 address register BEAR ppcMfbesr0 Returns the current value of the bus error 10 57 status register BESR ppcMfbrcr0 Return the value of their respective bus 10 58 ppcMfbrcr7
283. p CS FF FFF8 0000 FFFF FFFF BOOT FLASH FLASH CS A30 amp 29 amp 28 amp 27 6 A26 6 25 6 A24 amp 23 amp 22 amp A21 amp 20 6 A19 amp CS FF FFFO 0000 FFF7 FFFF PCI FLASH PCI FLASH A30 6 29 amp 28 amp 27 amp 26 amp 25 amp A24 amp 23 amp A22 amp A21 amp A20 6 A19 amp CS FF 7400 0010 7400 0011 EHTERNET PRQ REMOTE LATCH LATCH 0 6 29 amp A28 6 A27 amp 26 6 25 6 A24 amp A23 amp A22 amp A21 amp A20 amp A19 amp A18 amp A17 amp A16 amp A15 amp A14 amp A13 amp A12 amp A11 amp A10 amp A9 amp A8 amp A7 amp A6 6 A5 amp 4 6 A3 amp 1 2 amp 1 amp CS FF 7 00 0300 7 00 0301 LCD DISPLAY LCD_CS A30 amp 29 amp 28 6 27 amp 26 6 25 6 A24 amp A23 amp A22 amp A21 amp A20 amp A19 amp A18 amp A17 amp A16 amp A15 amp A14 amp A13 amp A12 amp A11 6 A10 amp 9 amp 8 amp A7 amp A6 6 A5 amp 4 amp A3 amp A2 amp 1 6 CS FF TRANSCEIVER OUTPUT CONTROL SIGNAL STCS clk GLOBAL CLK1 STCS reset RESET To Distinguish Between Idle State and Cycle in Progress CASE STCS IS WHEN CS_FFO gt C 6 401 EVB User s Manual IF ADS THEN STCS CS FF1 ELSE STCS CS END IF WHEN CS FF1 IF BLAST amp READY THEN STCS CS FF0
284. pendix B for more information on the ROM Monitor load format The output of the eimgbld step is a file referred to as a boot image file There are several ways to load and execute a boot image file One way is to use the ROM Monitor to load and execute the file Network loads over Ethernet or SLIP require that the host contain the bootp and tftp servers and be properly configured to support the bootp and tftp protocols see the previous chapters on host configuration and ROM Monitor setup Loads over serial port 1 require a terminal emulator that supports the kermit transfer protocol A ROM Monitor load is initiated via option 0 from the ROM Monitor main menu Another way to load and execute the boot image file is to use the RISCWatch debugger in ROM monitor mode To bring up RISCWatch in ROM Monitor mode see the R SCWatch Debugger User s Guide for details you must update the RISCWatch environment file for ROM Monitor communications enable the ROM Monitor debugger via option 5 exit the ROM Monitor menu via option 0 and then start up RISCWatch on the host system The RISCWatch load image command can then be used to load the boot image file onto the board Once loaded successfully the attach 42 and logoff commands can be issued to execute the program The attach 42 command informs the ROM Monitor that a process will be running and the logoff command tells the ROM Monitor to exit debug mode and start the execution of the program After program ex
285. plication events as if the EVPR were set to 0x0000 0000 For example an application s external interrupt handler should be located at 0x0000 0500 This is handled for you when using OS Open Use storage addresses between 0x0000 A000 and the end of DRAM only except for application vectors 7 8 401 EVB User s Manual Do not start applications lower than address 0x0000 A000 Figure 7 1 shows the address map of the evaluation board under control of the ROM Monitor The folding characteristics of the high order address bit are not shown OxFFFF FFFF ROM Monitor Code OxFFFE 0000 0x0080 0000 end of DRAM Application Area 0x0000 A000 ROM Monitor Area 0x0000 2000 0x0000 0000 Figure 7 1 ROM Monitor Address Map Application Vectors 7 6 Monitor Selections and Submenus At this point it is assumed that the host has been properly configured all board connections have been made power has been supplied and the terminal emulator running on the host has been configured and started successfully The main menu shown below is displayed after the 401 EVB has been reset and the ROM Monitor completes initialization Note that some of the values you see in particular the ROM Monitor version the IP addresses and the Ethernet controller s hardware address may differ with those shown below Each menu option is described separately in the following sections Local in the context of the ROM Monitor IP addressing means the IP address
286. pplication programs from the host to the EVB If the recommended Ethernet connection is going to be used the S2 to SP2 SLIP connection is optional and does not need to be established Proper setup involves the configuration of tty devices for both the S1 and S2 serial ports on the host ttyO is used for the terminal emulator to ROM Monitor connection and tty1 for the host to EVB SLIP connection It is also necessary to establish a SLIP network interface between S2 on the host and SP2 on the EVB The following steps should be taken to insure proper S1 S2 configuration 1 Log in as root or the superuser su Host Configuration 4 1 2 Determine if the ttyO tty1 devices already exist enter smit select Devices select TTY select List All Defined TTYs Perform step 3 for each tty not listed Perform step 4 for each tty listed to insure that it is properly configured 3 To add a tty device return to the TTY screen select Add a TTY select tty rs232 Asynchronous Terminal select sa0 Serial Port 1 for ROM Monitor connection when adding ttyO OR 1 Serial Port 2 for EVB SLIP connection when adding tty1 select s1 for the port number when adding ttyO OR 2 for the port number when adding tty1 insure that the BAUD rate is 9600 when adding ttyO OR that the BAUD rate is 38400 when adding tty1 insure that the PARITY is none insure that the BITS per character is 8 insure that the Number of STOP BITS is 1 insure that Ena
287. program instructions 3 4 401 EVB User s Manual Once completed the IBM High C C Compiler is installed in the highcppc directory tree and the EVB software support package in the osopen directory tree The highcppc bin directory contains the files required for the IBM High C C Compiler Those files include asppc exe Assembler for assembler language programs ldppc exe ELF linker binder to build applications to be run the EVB hoppc exe High C C compiler for C programs arppc exe ELF library archiver The readme file under the highcppc directory contains the latest information regarding the compiler and should be considered must reading The osopen directory tree contains the files and tools that support OS Open application and ROM development The osopen subdirectories and their contents are as follows Win This directory contains several host based utilities used for application and ROM program development elf2rom exe creates a ROM image from an ELF file eimgbld exe creates a ROM Monitor loadable image from an ELF executable file hbranch exe places an absolute branch in the last address of a ROM image rambuild exe creates an assembler source file that contains the files found in a specified directory e make exe supports the use of makefiles when building application programs bootpd exe bootp server to support ROM Monitor downlaods fftpd exe tftp server to suppo
288. r the card 6 4 Displays Table 6 1 Status LED Display Location Type Description CR1 LED Ethernet Tx or Rx activity green CR2 LED Ethernet collision detected yellow CR3 LED Ethernet twisted pair good link green not operational for coax CR4 LED 5V present green J31 LCD 2 line x 16 character intelligent LCD display with LED backlighting FEMA CM162B SGT1LY 401 EVB Hardware 6 5 6 5 Switches There are two switches on the 401 EVB The Reset switch SW1 on the board is a momentary SPST Single Pole Single Throw switch that generates a board hardware reset A hardware reset simultaneously resets the 401 processor the National DP83902AV Ethernet controller and the National PC16553 serial communications controller The CRIT switch SW2 on the board is a momentary SPST switch that generates a critical interrupt on the 401 processor chip The ROM Monitor supports using the critical interrupt as a mechanism for suspending the execution of an application When debug is not used the ROM Monitor simply passes the critical interrupt on to the application s first level interrupt handler Table 6 2 401 EVB Switches Location Description SW1 Reset SW2 Manual critical interrupt PCI SERR also generates critical interrupt 6 6 Power Supply The board is designed to run from a single 5V supply Other needed voltages 3 3V for the 401GF chip RS232 voltages are derived on the
289. r unsigned long dbsr value ppcLib a ppcMtdbsr sets the value of the debug status register DBSR to the specified value The DBSR contains the status of debug events the JTAG serial buffers and the most recent reset Bits in the DBSR are cleared by writing a 1 to the corresponding bit position WARNING The DBSR is designed to be used by development tools not application software It is strongly recommended that this register be treated as a read only register The file lt ppcLib h gt defines constant values that can be used when setting DBSR None Set the system reset bits ppcMtdbsr DBSR SYS Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMtdccr include lt ppcLib h gt unsigned long ppcMtdccr void ppcLib a ppceMtdccr sets the value of Data Cache Cacheability Register DCCR None Set the value of the DCCR so all regions are cacheable include lt ppcLib h gt ppcMfdccr Oxffffffff Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 91 ppcMtdcwr Synopsis Library Description Errors Example Attributes References 10 92 include lt ppcLib h gt void ppcMtdcwr unsigned long dcwr value ppcLib
290. rameters passed in open are as follows Parameter Meaning First Parameter Check generate parity flag Valid values are asyncParityNone and asyncParityGen_Check Second Parameter Parity type Valid values are asyncParityEven and asyncParityOdd Because parameters are positional this parameter must be specified even if parity is not used Third Parameter Number of stop bits Valid values are asyncStopBits1 asyncStopBits15 and asyncStopBits2 One and a half stop bits are only valid for data length of 5 Fourth Parameter Data length Valid values are asyncDataBits5 asyncDataBits6 asyncDataBits7 and asyncDataBits8 Fifth Parameter Baud rate Valid values range from 50 baud These are positional parameters All parameter constants can be found in lt sys ioctl h gt Note The oflag parameter O_RDWR in this example which is passed in the open call is ignored by the device driver When successful open returns a file descriptor otherwise 1 is returned open can be called multiple times against the same asynchronous port Communication parameters passed during the last open call are set in the asynchronous port For more information on open refer to the OS Open Programmer s Reference 9 3 1 4 Reading and Writing After successfully installing and opening the asynchronous port read and write calls can be issued against that port Multiple threads can issue read and write calls to the same port at the same time Howev
291. roller User s Manual 401 EVB User s Manual ppcMfesr Synopsis Library Description Errors Example Attributes References include lt ppcLib h gt unsigned long ppcMfesr void ppcLib a ppcMfesr returns the value of the Exception Syndrome Register ESR Bits 7 to 31 are reserved None Get the ESR value esr_value ppcMfesr Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 65 ppcMfevpr Synopsis Library Description Errors Example Attributes References 10 66 include lt ppcLib h gt unsigned long ppcMfevpr void ppcLib a ppcMfevpr returns the value of the exception vector prefix register EVPR Bits 0 to 15 contain the prefix of the address of the exception processing routines Bits 15 to 31 are reserved None Get the EVPR value evpr value ppcMfevpr Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMfgpri include lt ppcLib h gt unsigned long ppcMfgpr1 void ppcLib a ppcMfgpri1 returns the current value of GPR 1 Typically this is the value of the current stack frame None See ppcMfgpr2 10 68 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes
292. rt host to EVB file transfers This directory contains many example OS Open programs PLATFORM This directory contains the OS Open platform specific code for the platform included in your EVB kit The directory is not literally named PLATFORM but rather is named to identify the board and processor that was shipped with your kit For example if your platform was the 401GF evaluation board this directory might be named m401 evb e README TXT contains the latest information regarding this release Nnclude contains OS Open include files Md contains dynamically loadable modules that can be run from OS Open s OpenShell Nib contains OS Open libraries m4 contains assembler preprocessor include files Installing the EVB Software 3 5 3 6 openbios contains the source code for the ROM Monitor detailed in a later chapter samples contains samples programs that can be compiled and run 401 EVB User s Manual Considerable effort goes into providing a quality product with consistent documentation To insure that our customers have the advantage of the latest software features and updated information README TXT may contain clarifications and or additional information and should be considered must reading COMMENT USER and COMMENT DOC Please take the time to complete these user comment forms Your feedback and suggestions will help us to improve our products and technical publica
293. s Interrupt Handler Safe No driver_install OS Open Programmer s Reference Device Drivers Supplied with the 401 EVB on page 9 7 401 EVB User s Manual Synopsis Library Description Errors Example Attributes biosenet attach include lt benetLib h gt int biosenet_attach unsigned long int init flag benetLib a biosenet_attach attaches the TCP IP protocol stack to the ROM Monitor Ethernet The IP address should be different from the IP address defined to the 401 EVB ROM Monitor init_flag determines if biosenet_attach should initialize the Ethernet interface The Ethernet device should be initialized only if OS Open was loaded through an interface other than Ethernet A non 0 value will cause biosenet_attach to initialize the Ethernet and a 0 value causes biosenet_attach not to initialize the Ethernet interface biosenet attach returns 0 if successful and 1 if it is unsuccessful Note When using biosenet attach the I O should be initialized by calling dbg_ioLib_init rather than ioLib_init None Initialize TCP IP and define an IP address to biosenet attach include lt sys tcpipLib h gt int rc rc tcpip init myhostname 1 100 if rc 0 return 1 if net init return 1 return biosenet attatch 0x07010104 0 specify the IP addr and the init flag Async Safe No Cancel Safe No Interrupt Handler Safe No 401 EVB Function Reference
294. s Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 55 ppcMfbear Synopsis Library Description Errors Example Attributes References 10 56 include lt ppcLib h gt unsigned long ppcMfbear void ppcLib a ppcMfbear returns the current value of the Bus Error Address Register None After a machine check retrieve the BEAR bear ppcMfbear Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes ppcMfbesrO 10 57 PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMfbesr0 include lt ppcLib h gt unsigned long ppcMfbesr0 void ppcLib a ppcMfbesr0 returns the current value of the Bus Error Status Register which identifies the nature of a bus error detected by the processor The file lt ppcLib h gt defines constants for use with the BESRO None Retrieve bus error syndrome information ppcMfbesr0 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes ppcMfbear p 10 56 PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 57 ppcMfbrcr0 ppcMfbrcr7 Synopsis Library Description Errors Example Attributes References 10 58 include lt ppcLib h gt unsigned long ppcMfbrcrO void unsigned long ppcMfbrcr1 void uns
295. s several host based utilities used for application and ROM program development elf2rom creates ROM image from an ELF executable file eimgbld creates a ROM Monitor loadable image from an ELF executable file hbranch places an absolute branch in the last address of a ROM image rambuild creates an assembler source file that contains the files found a specified directory tracefmt post processes OS Open trace snapshots for 3 2 X trc41 post processes OS Open trace snapshots for AIX 4 1 lexamples This directory contains many example OS Open programs PLATFORM This directory contains the OS Open platform specific code for the platform included in your EVB kit The directory is not literally named PLATFORM but rather is named to identify the board and processor that was shipped with your kit For example if your platform was the 401GF evaluation board this directory might be named m401 evb e README TXT contains the latest information regarding this release include contains OS Open include files Installing the EVB Software 3 3 contains dynamically loadable modules that can be run from OS Open s OpenShell contains OS Open libraries m4 contains assembler preprocessor include files openbios contains the source code for the ROM Monitor detailed in a later chapter samples contains samples programs that can be compiled and run
296. se Table Parameters msg retcode RD COM ERR 1001 Description Communication error occurred msg retcode RD OK 0 Successful completion msg data len 0 Length of additional data being sent A 13 A 3 9 RD LOGOFF 104 Performs user LOGOFF function This is used when the debugger performs normal termination using quit or detach A 3 9 1 Request data Table A 17 RD LOGOFF Request Table Parameters Description msg request RD LOGOFF Requested API function msg data NO_KILL This field is ignored by ROM monitor msg data_len 0 Length of additional data being sent A 3 9 2 Response data Table A 18 RD_LOGOFF Response Table Parameters Description msg retcode RD_COM_ERR 1001 Communication error occurred msg retcode RD_OK 0 Successful completion msg retcode RD_INVALID_SEQ Not logged on 1011 msg data_len 0 Length of additional data being sent A 14 401 EVB User s Manual A 3 10 RD READ D 2 This request returns the integer in the debugged process address space at the location pointed to by the address parameter If the value of address is not in a valid address space unpredictable results will occur A 3 10 1 Request data Table A 19 RD READ D Request Table Parameters msg request RD READ D Description Requested API function msg address address Address of memory to read data from msg rpid
297. sh Flushes cache lines beginning at the 10 29 effective address and continuing for a specified number of bytes dcache invalidate Invalidates cache lines beginning at the 10 30 effective address and continuing for a specified number of bytes enet disable ipinput Disables the forwarding of Ethernet pack 10 31 ets to the TCP IP protocol stack enet enable ipinput Enables the forwarding of Ethernet packets 10 32 to the TCP IP protocol stack enet native attach Attaches TCP IP protocol stack 10 33 enet packet Returns a pointer to the mbuf chain holding 10 35 the packet received by the Ethernet device driver enet send packet Transmits packet over the Ethernet 10 36 ext int disable Disables the interrupt level specified by an 10 37 event ext int enable Enables the interrupt level specified by an 10 38 event ext int install Installs a first level interrupt handler FLIH 10 39 for an event ext int query Returns information about the FLIH 10 40 401 EVB Function Reference 10 3 Table 10 1 Functions Specific to 401 EVB Function or Macro Description Page fpemul init Installs floating point interrupt handler 10 41 ioLib init Initializes I O library 10 42 lcd init Installs the LCD device driver 10 43 ppcAbend Executes an invalid opcode forcing a pro 10 44 gram check interrupt ppcAndMsr ANDs a value with the contents of the MSR 10 45 ppcCnilzw C
298. slave communication e Interrupt driven input output Polled output functions Since only full duplex modem line control discipline is supported connection between the asynchronous port and another device must be made through a NULL modem A NULL modem is a device that crosses transmitted data and received data pins to enable communication The only time a NULL modem is not necessary is when connection is made to a real modem device 9 3 1 1 Device Driver Installation The asynchronous device driver is installed by calling driver install Following is an example of asynchronous device driver installation include lt sys asyncLib h gt int devhandle vent_t event 10 rc driver install amp devhandle async init event The parameter event specifies the external interrupt id and must be between Application Libraries and Tools 9 7 EXT PRIO MIN and EXT PRIO MAX async init is declared in the file lt sys asyncLib h gt as follows int async init driver t dsw va list vargs Upon successful installation driver install returns 0 otherwise 1 is returned For more information on driver install refer to the OS Open Programmer s Reference 9 3 1 2 Device Installation After the asynchronous device driver is installed named devices can be created using device_install Following is an example of device installation define S1DB_PARMS 1843200 unsigned char 0x7E000000 1 EXT IRQ COMI rc device install
299. ss Register dar define DSISR 138 Data St Int Status Reg dsisr define SRRO 139 Save and Restore Register 0 srr0 define SRR1 140 Save and Restore Register 0 srr1 define SRO 141 Segment Register sr0 define SR1 142 Segment Register 5 1 define SR2 143 Segment Register sr2 define SR3 144 Segment Register sr3 define SR4 145 Segment Register sr4 define SR5 146 Segment Register sr5 define SR6 147 Segment Register sr6 define SR7 148 Segment Register sr7 define SR8 149 Segment Register sr8 define SR9 150 Segment Register sr9 define SR10 151 Segment Register sr10 define SR11 152 Segment Register sr11 define SR12 153 Segment Register sr12 define SR13 154 Segment Register sr13 define SR14 155 Segment Register sr14 define SR15 156 Segment Register sr15 define DEC 157 Decrementer dec define RTCU 158 Real Time Clock Upper rtcu define RTCL 159 Real Time Clock Lower rtcl define SDRO 160 Storage Description Reg sdr0 define SDR1 161 Storage Description Reg sdr1 define EISO 162 External Int Summary Regl eis1 define EIS1 163 External Int Summary Reg2 eis2 define EIMO 164 External Int Mask Regl eiml define 165 External Int Mask Reg2 Seim2 define SRR2 166 Save and Restore Register 2 srr2 define SRR3 167 Save and Restore Register 3 srr3
300. ssing information for all these devices is included in the subsequent chapter on the 401 EVB hardware Header connectors are provided for optional test equipment such as the RISCWatch JTAG debugger This tool allows non intrusive hardware and software debug through the 401 EVB JTAG port For more information on the RISCWatch JTAG tool call the IBM Embedded Systems Solution Center at 919 254 1810 1 1 2 Cables and Power Supply The 401 EVB kit includes a serial port interface cable for connecting the EVB serial port 1 to a terminal or terminal emulator running on the host Note The Sun version of the EVB kit contains a male to male adapter to support connectivity between serial port 1 on the EVB and a serial port on the host Overview of the 401 EVB 1 1 An Ethernet crossover cable is provided in the kit to support direct Ethernet communication with the host system Standard 10Base2 and 10BaseT Ethernet connectors are provided on the EVB The Ethernet crossover cable is for direct connection to a single host and cannot be used with a hub or a building s Ethernet network A power supply with line cord is also provided with the 401 EVB kit 1 2 Introducing the 401 EVB Software Support Package The 401 EVB software support package consists of the ROM Monitor ROM Monitor source code the RISCWatch source level debugger for ROM Monitor and OS Open debug modes the IBM OS Open real time operating system several sample programs including th
301. standalone board connect J39 1 to J40 1 to provide PCI socket 2 GND 3 3V from board or connect external power supply 3 3V and GND to J39 board operating as PCI adapter card do not connect to J40 3 3V to PCI socket is provided from PCI edge connector Table 5 12 Connector J41 PCI Socket and Squall 12V Pin Name Comment 1 12V standalone board connect external power supply 12V and GND 2 GND to J41 board operating as PCI adapter card do not connect to J41 12V to PCI socket and Squall is provided from PCI edge connector Table 5 13 Connector J42 PCI Socket and Squall 12V Pin Name Comment 1 12V standalone board connect external power supply 12V and GND 2 GND to J42 board operating as PCI adapter card do not connect to J42 12V to PCI socket and Squall is provided from PCI edge connector 401 EVB User s Manual 5 9 Setting the EVB Jumpers The jumpers provided on the 401 EVB are detailed in the following tables Table 5 14 Jumper Programming of SIMM Size PD2 PD1 PDO Factory 030 428 19 SIMM Size Setting 2 3 lo 2 3 lo 2 3 lo 256Kx32 single sided 1MB 2 3 lo 2 3 lo 1 2 hi 512Kx32 double sided 2MB 2 3 lo 1 2 hi 2 3 lo 1Mx32 single sided 4MB lt 2 3 lo 1 2 hi 1 2 hi 2 32 double sided 8MB 1 2 hi 2 3 lo 2 3 lo 4Mx32 single sided 16MB 1 2 hi 2 3 l
302. strlen pathname Length of additional data being sent msg buffer load information See description of RD_LDINFO request A 3 26 2 Response data Table A 50 RL_LDINFO Response Table Parameters msg retcode RD_COM_ERR 1001 Description Communication error occurred msg retcode RD_OK 0 Successful completion msg data_len 0 Length of additional data being sent A 31 3 27 LOAD REQ 180 This request flows from the ROM monitor to the host when a RD LOAD requestis received The port of the request is for the remote loader daemon 20050 to accommodate loading by a process independent from the debugger A 3 27 1 Request data Table A 51 RL LOAD REQ Request Table Parameters msg request RL LOAD REQ Description Requested API function msg buffer filename NULL terminated string containing fully qualified name of file to be loaded msg data_len strlen filename Length of additional data being sent A 3 27 2 Response data Table 52 LOAD REQ Response Table Parameters msg retcode RD COM ERR 1001 Description Communication error occurred msg retcode RD OK 0 Successful completion msg retcode RD NOFILE ERR 1006 Can t open file or file is incorrect format msg retcode RD PTRACE ERR 1014 Error reading file msg rpid process id Process ID of newly loaded file This
303. sts Enable disable boot devices Change IP addresses Ping test Toggle ROM monitor debugger Toggle automatic menu Display configuration Save changes to configuration Set baud rate for sl boot Exit menu and continue gt Q N EH gt 0 PowerPC ROM Monitor Debugger Waiting for debug command Press any key to exit Use option 8 to save the state of the ROM Monitor debugger This option in combination with option 6 Toggle automatic menu can be used to configure the EVB to automatically wait for the debugger to attach after power on After enabling the ROM Monitor debugger via option 5 and selecting option 0 the RISCWatch debugger can be started on the host and used to load an application onto the EVB This is assuming the RISCWatch environment file has been updated for ROM Monitor communications Once loaded successfully the application can be run from the debugger The RISCWatch Debugger User s Guide contains more information on how to use the debugger to load and execute files with the ROM Monitor as a non JTAG target At this point it is recommended that users become familiar with the debugging environment by following the Quick Start sample debug session in the debugger s User s Guide This session takes a user through the basics including how to use the debugger to load and run applications on the board 7 20 401 EVB User s Manual 7 6 7 Disabling the Automatic
304. t IF BLAST DCLK1 THEN STWEO SRAM WEOO ELSE STWEO SRAM WEO1 END IF END CASE SRAM WRITE BYTE ENABLE ONE CASE STWE1 IS WHEN SRAM WE10 gt IF SR amp DCLK1 amp W R amp ELSE STWE1 SRAM WE10 END IF WHEN SRAM WE11 gt IF BLAST DCLK1 THEN STWE1 SRAM WE10 ELSE STWE1 SRAM WE11 END IF END CASE BE1 THEN STWE1 SRAM WE11 SRAM WRITE BYTE ENABLE2 C 53 CASE STWE2 IS WHEN SRAM WE20 IF SR amp DCLK1 amp W R amp BE2 THEN STWE2 SRAM WE21 ELSE STWE2 SRAM WE20 END IF WHEN SRAM WE21 IF BLAST DCLK1 THEN STWE2 SRAM WE20 ELSE STWE2 SRAM WE21 END IF END CASE MOST SRAM WRITE BYTE ENABLES CASE STWE3 IS WHEN SRAM gt IF SR amp DCLK1 amp W_ R amp BE3 THEN STWE3 SRAM WE31 ELSE STWE3 SRAM WE30 END IF WHEN SRAM gt IF BLAST DCLK1 THEN STWE3 SRAM WE30 ELSE STWE3 SRAM WE31 END IF END CASE ARBITRATION STATE MACHINE ARB clk CLK1 ARB reset RESET CASE ARB IS WHEN ARBO gt 401_HOLD GND 9060_HOLDA GND SQBG VCC PCI_GNT1 VCC PCI_GNT2 VCC IF 9060_REQ THEN 9060_GNT GND ELSE 9060_GNT VCC END IF 9060 HOLD amp ARBSEL THEN 1 ELSIF 9060_HOLD amp SQBR amp ARBSEL THEN ARB ARB4 ELSIF 9060 HOLD amp ARBSEL THEN ARB ARB1 ELSIF 9060_REQ amp ARBSEL THEN ARB ARBO ELSIF SQBR amp 9060_REQ amp ARB
305. t Call and then Disconnect Select File Properties Configure and set the baud to match the baud rate set via ROM Monitor option 9 In this case it is 38400 Select OK and OK again e Select Call and then Connect Select Transfer Send File and type the filename of the file to load Set the Protocol to Kermit Select Send Upon successful completion of the transfer the baud rate must be changed back to 9600 Select Call and then Disconnect Select File Properties Configure and set the baud to 9600 Select OK and OK again Select Call and then Connect Hit Enter to complete the down load sequence 7 6 12 Exiting the Main Menu Option 0 exits from the main menu leaving the monitor active If the debugger is active prior to selecting option 0 the ROM Monitor waits for the user to start the debugger on the host In all other cases option O initiates an attempt by the ROM Monitor to load an application from the host to the EVB over the enabled boot device s When downloading over the Ethernet or SLIP S2 the host bootp and tftp configuration must be completed for the ROM Monitor to load successfully Once loaded successfully the application is executed When serial port 1 is used the ROM Monitor requires the user to follow additional instructions to complete the download The example shown here describes the sequence required when programs are downloaded over serial port 1 Device Configuration
306. t implement several popular networking utilities such as ping ifconfig ftp and telnet Debug functions and kernel abstract data types OS Open provides functions that set clear and query breakpoints OS Open features an internal circular trace buffer for operating system and user events Also functions are provided that dump kernel data objects in a readable form 401 EVB Sample Applications 8 11 8 12 401 EVB User s Manual Application Libraries and Tools This chapter describes some of the application libraries and tools available in the EVB software support package See the OS Open User s Guide and Programmer s Reference for additional information 9 1 OS Open Libraries The OS Open operating system comprises a real time executive and optional libraries of functions and macros The real time executive provides a operating system core for embedded applications Depending on an application s requirements an embedded application may also incorporate one or more optional libraries This modular approach enables embedded system developers to scale an OS Open operating system to match their application requirements Because unneeded features are not present an OS Open configuration can provide savings in system hardware initialization and reset time and program size Table 9 1 summarizes the OS Open libraries described in the OS Open User s Guide and in this user s guide For detailed descriptions of the OS Open functio
307. tatus ASYNCFLUSHIN None Flushes input buffer ASYNCFLUSHOUT None Flushes output buffer ASYNCDRAIN None Blocks until all characters in output buffer have been transmitted ASYNCIGNBREAK None Ignores break interrupts ASYNCSIGBREAK None Sends SIGINT on reception of break condition ASYNCERRBREAK None Returns error from read upon recep tion of break condition 0x00 is placed in the receive buffer at the position where break occurred Following is an example of an ioctl call issued against an asynchronous device rc ioctl fdl ASYNCXONDISABLE if rc 0 printf ioctl failure n fd1 is the value obtained from the open call Application Libraries and Tools 9 11 9 3 1 6 Polled Asynchronous I O A function is provided for polled output to s1 and s2 serial ports int sldbprintf unsigned long uart clock unsigned char base reg int reg delta event t event const char format int s2dbprintf unsigned long uart clock unsigned char base reg int reg delta event t event const char format The parameters passed to these functions are identical to printf except for uart clock base reg reg delta and event uart clock specifies the clock speed base reg specifies the address of the base UART register reg delta specifies the address space between UART registers and event specifies the external interrupt level Because polled I O transmits characters synchronously these functions may be calle
308. terrupt Handler Safe Yes ppcDcbf p 10 47 ppcDcbi p 10 48 ppcDcbst p 10 49 PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcDflush include lt ppcLib h gt void ppcDflush void ppcLib a ppcDflush will write O s into the data cache and then turn data cache off by writing O s into the Data Cache Cacheability Register DCCR None Force data reads from memory instead of from the data cache ppcDflush Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 51 ppcEieio Synopsis include lt ppcLib h gt void ppcEieio void Library ppcLib a Description ppcEieio ensures that all storage references before the call finish before any storage references after the call start Errors None Example Ensure storage references are done in order char one_loc char 0x202 char two_loc char 0x204 one_loc OxAA write a OxAA to 0x202 ppcEieio insure the store completes before setting two loc two loc 0x55 Attributes Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes References PPC401GF Embedded Controller User s Manual 10 52 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcHalt in
309. the card To set the Host IP address for the ethernet connection select the My Computer icon from the desktop select Control Panel select Network e Add the appropriate Adapter network component for the ethernet adapter being used if not already added Adda Protocol network component of Microsoft TCP IP if not already added Specify the IP address 7 1 1 4 is recommended to maintain consistency with this docu ment and netmask 255 255 240 0 to be used Note The services file that must be updated as part of the RISCWatch or evaluation kit installation is in directory C WINDOWS The Evaluation Kit software was developed for Windows 3 1 Though it can be run successfully on Windows 95 certain restrictions apply For example file IDs need to be restricted to an eight character file name and a three character file extension or RISCWatch will not be able to locate source files 4 12 401 EVB User s Manual 4 2 23 Ethernet Setup Windows NT 3 51 A compliant TCP IP package comes with Windows NT so no TCP IP package needs to be installed If you haven t done so already install the ethernet card on the host system according to the directions that came with the card To configure TCP IP for ethernet double click on the control panel icon followed by the network icon Windows NT will prompt you through adding an ethernet adapter and TCP IP An IP address of 7 1 1 4 is recommended to maintain consisten
310. the terminal program you can save your setting in a trm file for example evb trm for future use 5 11 3 SUN Terminal Emulation The Terminal Interface Program TIP can be used as a terminal emulator to support communications with the ROM Monitor When properly configured TIP connects the host Sun SPARCstation to a remote system which in our case is the EVB To set up TIP do the following login as root or the superuser su e goto the etc directory cd etc if the file remote exists Is remote If the file does not exist create it using an editor add the following line to the remote file cut and pasters can find this line in the README TXT file ttyO dvz dev ttya brz9600 el U C S Q D iez96 0ez D paznone exit from root TIP configuration is complete Once all the host to EVB connections have been properly made and power has been supplied to the board TIP can be activated by typing tip ttyO at the command prompt After resetting the board the ROM Monitor main menu should appear in the window where tip was activated It may be necessary to hit the enter key once or twice to get the menu to appear for the first time If the ROM Monitor menu does not appear consult your System Administrator the ttya device may need to be modified Additional information on TIP can be found in the online man pages by typing man tip Some useful escape sequences to know when using TIP include Note it may be necessary
311. thread When the underlying hardware platforms support it OS Open platform specific libraries provide additional functions to attach user written code to external interrupts supported on the platforms Clock and timer management OS Open functions provide time of day clock support and the ability to create use and destroy timers These timers can be one time or periodic Device support OS Open functions support the installation of user written device drivers to provide character special files block special files and logical file systems Low level POSIX I O read write as well as ANSI C stream fget fput functions are provided for device and regular file access 8 10 401 EVB User s Manual ANSI C library support OS Open provides a comprehensive set of ANSI C functions providing support for string manipulation memory management string to number conversion input output nonlocal jumps and variable arguments Pseudo device driver support OS Open provides several functions such as TTY and DOS file system functions that are installed and managed like device drivers but they do not manipulate actual hard ware nor do they have platform or device dependencies OS Open provides functions that create and manage TCP IP sockets Network interface functions for Token Ring Ethernet and Serial Line Interface Protocol SLIP are also provided With the TCP IP protocol stack and network interfaces additional functions are provided tha
312. tions Fax and email instructions are included in each of the files 3 2 2 RISCWatch Debugger Installation PC Please refer to the RISCWatch Debugger User s Guide for debugger installation instructions Be sure to follow the instructions for PC installation 3 3 Sun Installation 3 3 1 EVB Software Support Package Installation Sun The software support package is installed from diskettes on a Sun host system using the cpio and tar commands Before beginning the installation you must have EVB for Sun installation diskettes e Sun SPARCstation 5 10 or 20 workstation running SunOS 4 1 3 or higher or Solaris 2 3 or higher Superuser privileges on the Sun system The procedures required for installing the EVB software support package vary depending on the operating system being used Please follow the instructions corresponding to your operating system 1 Log in as root or use the su command to become the superuser 2 Open at least two windows for this procedure 3 Use the cd command to change to the usr directory 4 Insert the installation diskette labeled EVB Sun and 1 of n n may vary into the diskette drive Installing the EVB Software 3 7 Instructions for SunOS 4 1 3 or higher only 5 From the second window run the command cpio ivB EVB os4 tar Z EVB tar Z EVB 2 lt dev rfdO where dev rfdO is the name of your diskette device 6 When the system prompts you for a
313. tributes References ppcDcbst include lt ppcLib h gt void ppcDcbst void addr ppcLib a ppcDcbst copies the cache block containing addr to main storage if the block is valid in cache and has been modified with respect to main storage None Force the cache line beginning with 0x4000 to memory if the block is valid and out of sync with storage This would be done to synchronize the cache and storage without invalidating the cache line ppcDcbst void 0x4000 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes ppcDcbf p 10 47 ppcDcbi p 10 48 ppcDcbz 10 50 PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 49 ppcDcbz Synopsis Library Description Errors Example Attributes References 10 50 include lt ppcLib h gt void ppcDcbz void addr ppcLib a ppcDcbz sets the cache block containing the byte referenced by adar to 0 The line is established if necessary without fetching the line from main storage Note If an invalid real address is specified problems could occur when a subsequent attempt is made by the cache unit to store that line to main storage None Assume buffer is 16 cache lines long and cache aligned To quickly set it to 0 set to first buffer address char bpt buffer for j 0 j lt 16 j ppcDcbz void bpt bpt cache line size Async Safe Yes Cancel Safe Yes In
314. ts Enable disable boot devices Change IP addresses Ping test Toggle ROM monitor debugger Toggle automatic menu Display configuration Save changes to configuration Set baud rate for sl boot Exit menu and continue i Q N P I V When option 1 is selected the following submenu is displayed ENABLE AND DISABLE POWER ON TESTS Power On Test Devices 000 Enabled System Memory RAM 001 Enabled Ethernet ENET 004 Enabled Serial Port 2 S2 select device to change gt Selecting a test toggles its testing status For example since the System Memory test is enabled in the above menu selecting 0 at the prompt disables it select device to change gt 0 Selects system memory After the selection has been made the new setting is displayed followed by the main menu select device to change gt 0 RAM test is disabled Message describing change Device Configuration Power On Test Devices 000 Disabled System Memory RAM 001 Enabled Ethernet ENET 004 Enabled Serial Port 2 S2 Boot Sources 001 Enabled Ethernet ENET 1 1 7 1 1 5 remote 7 1 1 4 hwaddr 1000abcdef55 004 Enabled Serial Port 2 S2 1 1 8 1 1 5 remote 8 1 1 4 hwaddr fffffffffffft 005 Enabled Serial Port 1 S1 Baud 9600 401 EVB ROM Monitor 7 11 Debugger Disabled Enable disable tests Enable disable boot devices Change IP addresses Ping test Toggle RO
315. ts relationship with the software tools on the host Chapter 2 Host System Requirements lists the hardware and software requirements of the host system Chapter 3 Installing the EVB Software describes the software installation on the host system Chapter 4 Host Configuration describes the steps required to facilitate communications between the host computer and the 401 EVB Chapter 5 401 EVB Connectors describes the EVB connectors and the procedures for connecting and configuring the 401 EVB hardware Chapter 6 401 EVB Hardware describes the hardware components and their functions in terms of the overall organization of the 401 EVB Chapter 7 401 EVB ROM Monitor describes the operations of the ROM monitor Chapter 8 401 EVB Sample Applications contains sample applications to be built loaded onto the EVB and run Chapter 9 Application Libraries and Tools describes the application libraries and host tools provided with the EVB software Chapter 10 401 EVB Function Reference lists the OS Open functions for the 401 EVB platform The function calls are arranged alphabetically by function name Appendix A Program Trace Calls describes the messages for interfacing a debugger on the host system to the ROM monitor on the 401 EVB Appendix B ROM Monitor Load Format describes the load format requirements supported by the ROM monitor Appendix C FPGA Program I
316. ucture containing the following fields flih stack Pointer to the first stack location obtained by allocating memory and adding the size of the stack flih stack must be 16 byte aligned flih function Pointer to a function invoked when event occurs arg A user defined void value passed to flih function If old flih is not NULL the previous values of flih function flih stack and arg are stored in the structure pointed to by old flih If successful ext int install returns 0 Otherwise ext int install returns 1 EINVAL event does not refer to a valid event Async Safe No Cancel Safe Yes Interrupt Handler Safe Yes ext int enable p 10 38 ext int query p 10 40 ioLib init p 10 42 401 EVB Function Reference 10 39 ext int query Synopsis Library Description Errors Attributes References 10 40 include lt ioLib h gt include lt flih h gt int ext_int_query int event flih_t flih ioLib a ext_int_query returns information about the first level interrupt handler FLIH if any for event The flih argument points to a flih_t structure containing the following fields flin_stack Pointer to the first stack location obtained by allocating memory and adding the size of the stack flih function Pointer to a function invoked when event occurs arg A user defined void value passed to flih function If no FLIH is installed for the specified level each field in th
317. ue unsigned long pmcr0 value ppcMfpmcr0 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 75 ppcMfpvr Synopsis Library Description Errors Example Attributes References 10 76 include lt ppcLib h gt unsigned long ppcMfpvr void ppcLib a ppcMfpvr returns the value of the processor version register which indicates the version and revision of the PowerPC processor None Retrieve the current value of the processor version register Processor version specific code may require this value printf This is processor version ppcMfpvr Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMfsgr include lt ppcLib h gt unsigned long ppcMfsgr void ppcLib a ppcMfsgr returns the value of the Storage Guarded Register SGR None Retrieve the current value of the SGR unsigned long current sgr ppcMfsgr Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 77 ppcMfsler Synopsis Library Description Errors Example Attributes References 10 78 include lt ppcLib h gt unsigned long ppcMfsler void
318. uency of the serial port base reg specifies the address of the base UART register reg delta specifies the space between UART registers event specifies the external interrupt level For the 401 EVB uart clock must be 1843200 base reg must be 0x7E000000 reg delta should be 1 None Print Hello World before I O has been initialized include lt sys asyncLib h gt define S1DB PARMS 1843200 unsigned char 0x7e000000 1 EXT IRQ COMI sldbprintf S1DB_PARMS Hello World n r Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References s2dbprintf include lt sys asyncLib h gt int s2dbprintf unsigned long uart clock unsigned char base reg int reg delta event t event const char format asyncLib a s2dbprintf is a version of printf that uses polled writes no interrupts and may be used before I O has been established s2dbprintf may be called before the async device driver is installed uart clock is the clock frequency of the serial port base reg specifies the address of the base UART register reg delta specifies the space between UART registers event specifies the external interrupt level For the 401 EVB uart clock must be 1843200 base reg must be 0x7E000080 reg delta should be 1 None Print Hello World before I
319. uffer D7 OUTPUT PRQ status read bit VARIABLE COUNTER 74169 PROLATCH DFF Ethernet PRQ Sync to 33Mhz 25Mhz LATCH ACK DFF Ethernet register R W Ack Sync to 33Mhz 25Mhz LCD CS NODE LCD chip Select ENET CS NODE NODE Ethernet Chip select ENET CS FF DFF PLX CS FF DFF READY1 NODE READY2 NODE READY3 NODE READY4 NODE OE1 NODE NODE OE4 NODE WE1 NODE WE3 NODE C 2 401 EVB User s Manual WE4 NODE STATE DECLARATION OF IO STATE MACHINES IOSF MACHINE WITH STATES IOSL MACHINE WITH STATES IOSE MACHINE WITH STATES IOSER MACHINE WITH STATES STCS MACHINE OF BITS CS FF WITH STATES CS FFO0 1 BEGIN 0500 IOS1 IOS2 IOSS3 1054 055 IOS6 IOS7 IOS8 0501 059 0510 0511 0512 IOS13 IOSO2 IOS32 IOS34 IOS35 IOS36 IOSERO IOSER1 IOSER2 IOSER3 IOSER4 IOSER5 CS FF1 B 0 kc k k C 3 FUNCTION 74169 IOS9 GND GND GND CLK1 VCC VCC VCC VCC RETURNS 00 01 02 Q3 TCN COUNTER LDN IOS9 COUNTER ENTN GND COUNTER ENPN GND COUNTER U DN GND COUNTER CLK CLK1 COUNTER D 3 0 VCC READY TRI READY1 READY2 READY3 READY4 1 245 OE ENET CS NODE LATCH CS OE 1 4 OE3 OE4 WE WEl WE3 4 WE4
320. upon the selection of ROM Monitor option 0 it must be copied to boot img if the suggested bootptab entry was used see the previous chapter on bootp configuration To load using RISCWatch enable the ROM Monitor debugger via option 5 exit the ROM Monitor menu via option 0 start RISCWatch on the host system make sure the RISCWatch environment file is setup for ROM Monitor communications then use the following RISCWatch commands to load and execute the rom img image file image usr osopen PLATFORM openbios lib rom_ img RS6K amp SUN load image osopen PLATFORM openbios lib rom_ img PC attach 42 logoff You will see screen information similar to that shown below Lines preceded by are annotation for this example and do not appear on the screen Standard ROM Monitor load screen below 401GF 1 2 ROM Monitor 9 5 95 Version 1 2 already installed corresponds to rom 12 img kiku Sea system Info Processor speed 50 MHz Bus speed 25 MHz Amount of DRAM 8 MB Device Configuration Power On Test Devices 000 Disabled System Memory RAM 001 Enabled Ethernet ENET 004 Enabled Serial Port 2 S2 Boot Sources 8 2 401 EVB User s Manual 001 Enabled Ethernet ENET 1 1 7 1 1 5 remote 7 1 1 4 hwaddr 1000abcdef55 004 Disabled Serial Port 2 S2 1 1 8 1 1 5 remote 8 1 1 4 hwaddr ffffffffffff 004 Disabled Serial Port 1 S1 Baud 38400 Debugger Disabled
321. urn 1 rc net init initialize netLib if rc 0 return 1 attatch the TCP IP protocol stack rc enet native attach PROCESSOR CLOCK SPEED SRAM SIZE r if rc 0j return 1 rc ifconfig ENET CONFIG configure network interface if re 0 return 1 return 0 Application Libraries and Tools 9 13 9 3 3 ROM Monitor Ethernet Device Driver The ROM Monitor Ethernet device driver provides network access to the applications running on the 401 EVB while still allowing the ROM Monitor to access the RISCWatch debugger over the ethernet This device driver uses code resident in the ROM monitor to send and receive ethernet packets A different IP address must be specified to distinguish the packets from ROM Monitor and OS Open I O initialization should be done by calling ioLib init rather than ioLib init 9 3 3 1 ROM Monitor Ethernet Installation and Initialization The ROM Monitor Ethernet device driver is installed by calling biosenet attach Following is a prototype of this function include lt benetLib h gt int biosenet_attach unsigned long ipaddr int init_flag Upon successful installation biosenet_attach returns 0 otherwise 1 is returned The IP address for OS Open is specified in the joaddr parameter The init flag specifies whether the Ethernet controller needs to be initialized If init_flag is set to 0 the
322. use a baud rate other than 9600 you must set the terminal emulator to run at that speed before loading the file and set the speed back to 9600 after the down load is complete The following example shows loading the usr_samp img file Device Configuration Power On Test Devices 000 Disabled System Memory RAM 001 Disabled Ethernet ENET 004 Disabled Serial Port 2 S2 Boot Sources 001 Disabled Ethernet ENET local 7 1 1 5 remote 7 1 14 hwaddr 1000abcdef55 004 Disabled Serial Port 2 S2 local 8 1 1 5 remote 8 1 1 4 hwaddr ffffffffffff 005 Enabled Serial Port 1 S1 Baud 38400 Debugger Disabled Enable disable tests Enable disable boot devices Change IP addresses Ping test Toggle ROM monitor debugger Toggle automatic menu Display configuration Save changes to configuration Set baud rate for sl boot Exit menu and continue OO Q N HE e 1 gt 0 Booting from S1 Serial Port 1 PLEASE NOTE You must now Exit from terminal emulation mode Modify the baud rate of your host session Transmit a file to the target in binary mode Reset the host baud rate to 9600 Reenter terminal emulation mode Hit enter to execute the downloaded program 0 At this point kermit users must get to the terminal emulator command mode and change the line speed to match what was selected by option 9 and tell the terminal emulator to send the file in binary format
323. void ppcMtbrcr4 unsigned long brcr4 value void ppcMtbrcr5 unsigned long brcr5 value void ppcMtbrcr6 unsigned long brcr6 value void ppcMtbrcr7 unsigned long brcr7 value ppcLib a ppcMtbrcro ppcMtbrcr7 set the respective Bus Region Control Register with the specified value The file lt ppcLlb h gt contains several constants that can be used when modifying the BRCR registers None Set the BRCR4 with a bus width of 32 bits unsigned long brcr4 value ppcMfbrcr4 brcr4 value brcr4 value amp OxFFFF FFFC ppcMtbr4 brcr4 value BRCR BW 32 Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB User s Manual Synopsis Library Description Errors Example Attributes References ppcMtcdbcr include lt ppcLib h gt void ppcMtcdbcr unsigned long cdbcr value ppcLib a ppcMtcdbcr sets the CDBCR to the specified value lt ppcLib h gt has constants defined for use with the Cache Debug Control Register CDBCR registers None Set value of the CDBCR include lt ppcLib h gt ppcMtcdbcr CDBCR_CIS Async Safe Yes Cancel Safe Yes Interrupt Handler Safe Yes PPC401GF Embedded Controller User s Manual 401 EVB Function Reference 10 87 ppcMtdac1 Synopsis Library Description Errors Example Attributes References 10 88 include lt ppcLib h gt void ppcMfdac1 unsigned long dac1_ value
324. y Register DCCR ppcMtdewr Sets the value of the Data Cache Write 10 92 thru Register DCWR ppcMtesr Sets the value of the exception syndrome 10 93 register ESR ppcMtevpr Sets the value of the exception vector pre 10 94 fix register EVPR ppcMtiac1 Sets the value of the instruction address 10 95 compare register 1 IAC1 ppcMticcr Sets the value of the instruction cache 10 96 cacheability register ICCR 401 EVB Function Reference 10 7 Table 10 1 Functions Specific to 401 EVB Function or Macro Description Page ppcMtiocr Sets the input output configuration register 10 97 IOCR ppcMtmsr Sets the MSR 10 98 ppcMtpit Sets the programmable interval timer PIT 10 99 ppcMtpmcr0 Sets the value of the Power management 10 100 control register PMCRO ppcMtsgr Sets the value of the Storage Guard Regis 10 101 ter SGR ppoMtsler Sets the value of the Storage Little Endian 10 102 Register SLER ppcMtsprg0 Sets the special purpose register generals 10 103 ppcMtsprg3 SPRGO SPRG3 ppoMtsrrO Sets the SRRO 10 104 ppoMtsrr1 Sets the SRR1 10 105 ppoMtsrr2 Sets the SRR2 10 106 ppoMtsrr3 Sets the SRR3 10 107 ppcMttb Sets the value of the current time base 10 108 ppcMttcr Sets the timer control register 10 109 ppcMitsr Sets the timer status register 10 110 ppcOrMsr Performs the OR of a value and the current 10 111 MSR
325. your system 4 fthe readme file does not direct you to do otherwise execute install exe to start the installation process You will be prompted for any required informa tion Note that you may be informed that a search will be done to rename any winsock dll files found If you performed this check earlier this file should not be found anywhere else on your hard drive If a setup screen appears you can defer entering any fields until a later time 6 When installation is complete reboot the system and bring up Windows 4 2 1 Serial Port Setup Most PCs include two serial ports to support communications via asynchronous data transfer These ports are sometimes referred to as communication or COM ports These ports are usually accessed from the back of the system unit This document refers to them as serial ports S1 and S2 You should consult your PC literature to determine how many serial ports are available on your unit and where they are located 4 8 401 EVB User s Manual When properly configured one serial port can be used to connect a terminal emulator running on the host to the ROM Monitor running on the EVB and the other to provide a Serial Line Internet Protocol or SLIP network interface between the host and the EVB to download applications The SLIP host to EVB connection is optional if the recommended Ethernet connection is going to be used for host to EVB communications This section addresses the proper configuration o

IBM PowerPC 401 Evaluation Board Kit User`s Manual

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