Space Impact - Project Report, Design of Embedded Systems
Contents
1. Slice Logic Utilization Used Available Utilization Number of Slice Registers 864 18 224 4 Number used as Flip Flops 864 Number used as Latches 0 Number used as Latch thrus 0 Number used as AND OR logics 0 Number of Slice LUTs 1 887 9 112 20 Number used as logic 1 879 9 112 20 Number using O6 output only 1 219 Number using O5 output only 0 Number using O5 and O6 660 Number used as ROM 0 Number used as Memory 0 2 176 0 Number used exclusively as route thrus 8 Number with same slice register load 8 Number with same slice carry load 0 Number with other load 0 Number of occupied Slices TT 2 278 34 Nummber of MUXCYs used 656 4 556 14 Number of LUT Flip Flop pairs used 2 179 Number with an unused Flip Flop 1 381 2 179 63 Number with an unused LUT 292 2 179 13 Number of fully used LUT FF pairs 506 2 179 23 Number of unique control sets 33 Number of slice register sites lost to control set restrictions 128 18 224 1 Number of bonded IOBs 99 232 42 Number of RAMB16BWERs 0 32 0 Number of RAMB8BWERs 0 64 0 Number of BUFIO2 BUFIO2 2CLKs 0 32 0 Number of BUFIO2FB BUFIO2FB 2CLKs 0 32 0 Number of BUFG BUFGMUXs 2 16 12 Number used as BUFGs 2 Number used as BUFGMUX 0 Number of DCM DCM_CLKGENs 0 4 0 Number of ILOGIC2 ISERDES2s 0 248 0 Number of IODELAY2 IODRP2 IODRP2_MCBs 0 248 0 Number of OLOGIC2 OSERDES2s 0 248 02. DLMB microblaze_0_dlmb el microblaze_0_ilmb X axidlite 0 Le No Connection microblaze 0 debug le microblaze 0 TRACE axi_intc_O_ INTERRUPT el bram_block 1 00 a microblaze 0 i bram ctri w microblaze_0_d_bram_ctt le Ye Imb bram i 3 10 2 r Imb bram i 3 10 2 microblaze 0 ilmb El microblaze 0 i bram ctrl 2 te axi plbv46 202 a axi lite 0 plb_v46_0 Le vr mdm 2102 Uy axi inte 1 02 a axidlite 0 axi_intc_O INTERRUPT r axi_gpio 101 b Hr ai gpio 1 01 tir axi_gpio 1 01 b wy axi timer 103 a yr axi uartlite 1 02 2 vga_ace 1 00 2 axidlite 0 Hr xps_ps2 1 01 b plb_v46_0 Lel vr clock gene 4 03 2 vr proc sys re 3 00 a Figure 6 An overview of the hardware architecture in Xilinx Platform Studio 2 2 Power Estimation Xilinx XPower Analyzer was used to analyze the power of the GPU design Figure 7 Power analysis of the design 2 3 Software The software of the game is running on the Microblaze CPU implemented on the FPGA The responsibility of the software is to handle the game logic including keeping track of scores and lives collision detection gen erating of enemies and moving the player The software are divided in two parts the main program and the interrupt handler In every iteration of the main program it runs a collision detection and calculates a new position for all the enemies and bullets
3. If anything is changed it is sent to the right register The interrupt handler where implemented to take care of interrupts When the keyboard sends an interrupt the handlers execution are trig gered which listens to the scancodes corresponding to W S P SPACE BAR and ESC Depending on the scancode different things should hap pen S and W moves the ship up and down P pauses the game SPACE BAR fires and ESC resets the game When the handler has taken care of the interrupt the main program will continue its execution 2 3 1 Registers Register 0 31 30 21 20 11 10 o Register 1 31 24 23 16 15 8 7 o Registers 2 3 4 31 30 21 20 11 10 o Registers 5 6 7 8 9 31 21 20 10 9 o Figure 8 A drawing of the bit distribution in the registers Ten hardware registers for saving object positions score and lives were instantiated at the beginning of the project Because of the low complexity of the game we figured that ten registers would be enough Each register is utilized to make use of as many bits as possible in order not to waste any resources 10 3 User manual 3 1 Game objective The goal of the game is to stay alive as long as possible by not getting hit by any enemy ships or letting any enemies get past the player Eliminating enemies generates score that eventually adds to the life counter Failure to eliminate all enemies on screen or getting hit results in a subtraction from the life counter When
4. Number of BSCANs 0 4 0 Number of BUFHs 0 128 0 Number of BUFPLLs 0 8 0 Number of BUFPLL_MCBs 0 4 0 Number of DSP48A1s 0 32 0 Number of ICAPs 0 1 0 Number of MCBs 0 2 0 Number of PCILOGICSEs 0 2 0 Number of PLL_ADVs 16 0 2 0 Number of PMVs 0 1 0 Number of STARTUPs 0 1 0 Number of SUSPEND_SYNCs 0 1 0 4 Average Fanout of Non Clock Nets
5. all lives are depleted the game is over The controls are simple W moves the player up S moves the player down and SPACE BAR is used to fire a projectile P pauses the game and ESC resets it 3 2 Loading the game to the Nexys3 board Launch the Digilent Adept software and browse for the download bit file in the uncompressed game_logic space_impact_axi_hw_platform folder Press Program to load the bit file into the FPGA Ne 4 comes en z Config Memory Test Register 1 0 File 1 0 WO Ex Settings FPGA mn Initialize Chain Programming Successful A Set Config file for XC6SLX16 C temp game_logic space_impact_axi_hw_platform download bit Preparing to program XC6SLX 16 Programming Verifying programming of device Programming Successful Figure 9 Digilent Adept for Nexys3 11 4 Problems encountered As with all projects unforeseen problems often occurs So was the case even in this project This holds particularly true for the keyboard con troller which were supposed to take only a week to get operational In reality it took about three weeks 4 1 AXI or PLB The choice of system bus had to be made at the start of the project Initially the choice stood between AXI and PLB AXI was first chosen since it was the most recent on chip interconnect It did however not provide any support for the PS 2 controller IP available in Xilinx Plat
6. key board The keyboard sends repeatable scancodes to the controller when a key is pressed when it is released the scancode 0xF0 are sent followed by the key scancode To connect the PS 2 controller to the rest of the project which is connected through an AXI Advanced eXtensible Interface bus a PLB to AXI bridge are used The controller can be used in polling mode or interrupt driven mode In this project interrupt driven mode was chosen to increase performance in software The interrupts from the PS 2 controller are connected to the AXI interrupt controller 213 GPU The GPU Graphics Processing Unit is the main self developed hardware unit developed by the team It handles all drawing to the VGA monitor The GPU itself is divided into three main components e VGA controller e Background generator e Foreground generator red_out 0 2 green_out 0 2 blue_out 0 1 gt CLK_25MHz HS VS Figure 3 An blackbox overview of our vga accelerator The VGA controller updates the screen with a frequency of 60Hz at a resolution of 640x480 pixels It is driven by a 25 MHz clock This module is very commonly implemented and was provided in whole by Ulrich Zolt n from Digilent 3 The Background generator is responsible for drawing the background of the game The background includes the score and lives text top and bottom borders background stars and also moving stars in order to give the appearance of forward movement to the player At
7. the end of the project we decided to skip the stars that were not moving in order to give the player a more accurate impression of forward movement VGA ACC Figure 4 An greybox overview of our vga accelerator The Foreground generators responsibility is to draw the player and enemy objects projectiles and the actual score and lives digits In order to draw a certain object the generators look at the horizontal HS and the vertical VS counters provided by the VGA controller to determine if we are about to draw a pixel that is inside the object tile HS and VS checks against a number of conditions which takes the coor dinates from the software registers into consideration to know what kind of object we are about to draw or if we are simply supposed to draw the background When it knows what object to draw it uses lookup tables LUT to draw a correct image of the object The LUT is simply a ma trix consisting of binary numbers that represents the monochrome image Using the vertical and horizontal counters and certain offsets related to the object we can access the correct element in the LUT All modules are tied together in the vga_top module where a process is defined in order to determine if the foreground or the background should be drawn to the monitor In order to avoid having to implement a SDRAM controller for the external RAM on the Nexys3 board all graphics are stored in the FPGAs block RAM BRAM Since the game have rel
8. Space Impact Project Report Design of Embedded Systems Advanced Course EDA385 Anton Norell adal0ano student lu se Erik Nilsson fysO7eni student lu se Louise Hauzenberger adal0lha student lu se October 24 2014 Abstract Designing and implementing an arcade style space shooter video game using the retro cell phone game Space Impact as inspiration The game were designed with hardware accelerated graphics output through VGA The player controls the game with a standard keyboard connected to the USB port of the Digilent Nexys 3 FPGA board The project resulted in a functional game that integrates both hardware and software in order to display graphics and handle game logic Contents 1 Introduction 1 1 Tools and software used in this projeet Architecture Dl Hardwares Soon nrd ewe Beh wet eee ee Bae Zele SCPU vsa an rek el ae did Ag ee te Be 2 1 2 PS 2 controller 213 GPU eke tak is end dann te arte a ede ds 21 4 Bintary2BCD arie a bee ey en ee a 2 15 MEMOTA se oe A sane il ene eB Soe eS ke eta 2 1 6 Device occupancy sooo a 2 2 Power Estimation 2 04 2 3 Software as sand pu 2M oive rede ad pe Need G BET Registers atten dei on See tons Pct ar User manual 3 1 Game objectives 23 2 ars an wees at PERS EG BS SS 3 2 Loading the game to the Nexys3 board Problems encountered 4 1 AXI or PLB 4 2 Unstable software 000 eee ee eee Co
9. atively simple graphics this should cause no major problems The graphics for the player enemies score lives and projectiles are stored as binary values in std_logic_vectors forming a matrix 2 1 4 Binary2BCD type menu _displayrom is array 9 to 7 of std logic vector 0 to 3h constant score menu_displayrom type number displayrom is array 9 to 7 of std_logic_vector 0 to 7 Elconstant zero number displayrom Figure 5 The visual elements of the game are stored as matrices for easy access Numbers are drawn one by one that way only the graphics for 0 to 9 needs to be stored The binary2BCD component uses the shift and add 3 algorithm which takes an 8 bit number and separates every digit to 4 bits each giving an output of 12 bits An 8 bit number ranges from 0 to 255 which is a too small number for our intended score range hence the score is stored in two halves of 8 bit each That way it is possible to show score up to 9999 2 1 5 Memory As mentioned before no external memory was used in this project All graphics are stored in the onboard block RAM of the FPGA In a more advanced game this would probably not be feasible since the onboard RAM is relatively limited 2 1 6 Device occupancy For a complete listing of the FPGA utilization see appendix A IP Type IP Version Yr axiinterco 1 06 a dr Imbvi0 200b te plb_v46 105 2 Hr microblaze 8 40 a
10. emory PS 2 controller and the GPU The GPU performs all drawing to the VGA monitor and is the only hardware module that were designed from the ground up The other hardware modules were instantiated from IP logic provided by the Xilinx development tools All hardware will be implemented on the Nexys3 Spartan 6 FPGA Board 1 from Digilent Some of the hardware specifications includes e Xilinx Spartan6 XC6LX16 CS324 e Digilent Adept USB port for power programming amp data transfers e USB UART Type A USB host for mouse keyboard or memory stick e 8 bit VGA e 100MHz fixed frequency oscillator e 8 slide switches 5 push buttons 4 digit 7seg display 8 LEDs The board were provided by the course responsible teacher for this course Up to two boards were available per group which made testing very con venient 2 1 1 CPU The Microblaze is a soft core CPU designed by Xilinx for use as an IP Intellectual Property core in user designs It is 32 bits with both big and little endianness In this project one Microblaze CPU were used to handle the game logic written in C 2 1 2 PS 2 controller The Nexys 3 development board has no actual PS 2 connector onboard but still provides support of the PS 2 protocol via the USB host con troller 2 The PS 2 controller is a predefined component in Xilinx Plat form Studio It is a PLB Processor Local Bus slave which uses simple state machines and shift registers to buffer the scancodes from the
11. form Studio Using only a PLB bus made it difficult to synthesize the design due to too many bonded IOBs This made us decide to use a PLB to AXI bridge to connect the PS 2 controller to the AXI bus 4 2 Unstable software The seemingly unstable development software caused some frustration during the course of this project Sometimes when adding new ports to the hardware logic or trying to connect a module to a bus in the Xilinx Platform Studio the software would crash inexplicably When we finally got all modules connected properly we decided to never touch the con nections again if not absolutely necessary It was also frustrating to have to generate a new netlist and bitstream every time the hardware modules were changed 5 Conclusions and Result The project resulted in a functional arcade style game with basic con trols and a classic game mode As a learning experience the project was very rewarding None of the team members had any previous experi ence of computer graphics By the end of the project all members of the team could agree that it is sometimes difficult to estimate what parts of a project is most time consuming This holds particularly true for the keyboard controller that were only supposed to take a fraction of the ac tual implementation time Debugging hardware proved to be quite time consuming as well this is definitely something to keep in mind in future hardware related projects 5 1 Improvements Due to a somewha
12. nclusions and Result 5 1 Improvements Contributions References Appendix A 11 11 11 12 12 12 12 12 13 14 15 Figure 1 Our inspiration the classic mobile game Space Impact 1 Introduction The purpose of this project is to design and implement an arcade style video game similar to the old mobile phone game Space Impact but with a color enhanced graphics engine The player controls the game with a standard USB keyboard connected to the Digilent Nexys 3 FPGA board The game objective is to eliminate enemies that appears from the right side of the screen If the player gets hit by enemy fire or if the enemy moves past the player the life counter is decreased by one When all lives are depleted the game is over 1 1 Tools and software used in this project These are the software tools used in the development of this project e Xilinx Platform Studio 14 2 e ISE Project Navigator 14 2 e Xilinx Software Development Kit e Digilent Adept 2 4 2 The project were developed at LTH in the autumn of 2014 using the faculties computers running Windows 7 x64 2 Architecture This section describes the overall architecture of the game including both hardware and software Memory BRAM Graphic info AXI bus PLB bus a Existing IP O Our IP Interrupt Keyboard E externa naroware controller Figure 2 An overview of our hardware architecture 2 1 Hardware The hardware consists of the Microblaze CPU m
13. t pressed time schedule many features that could have improved gameplay had to be omitted These features include but are not limited to e A variety of levels available to the player e Better enemy intelligence 12 Figure 10 A view over our setup and the final look of the game e Full eight direction movement e Sound effects and music e Improved graphics and animations Many of these features were unrealistic to implement in such a short time span due to the team s inexperience with computer graphics How ever features like the ones presented above seems less unrealistic in future projects because of our newly acquired experiences 6 Contributions This section list the individual contributions of the team members of this project Anton GPU Software Report Erik GPU Artwork Report Louise PS 2 controller Binary2BCD Software Report We drew inspiration from a previous project namely AirCombat 13 7 References 1 Digilent Inc Digital Design Engineer s Source http www digilentinc com ProductsDetail cfm NavPath 2 400 897 amp 8ProdNEXYS3 Fetched 2014 10 12 2 Nexys3_rm_V2 http www digilentinc com Data Products NEXYS3 Nexys3 rm _V2 pdf Fetched 2014 10 12 3 http ece wpi edu rjduck vga_controller_640_60 vhd Fetched 2014 10 12 14 8 Appendix A 15 Device Utilization Summary
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