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71M6531 Demo Board User`s Manual

1. LOAD Ao SUE ingle Chip LOAD Be Meter DIO6 7 i V3P3 A IB DIO7 VARN apa ek s External Current 3 3V LCD DISPLAY Transformers WEN UM mm m AE IA AAA IAN VB DIO4 VA 2 NE DICE EEPROM VB ICE Connector WA DEBUG BOARD OPTIONAL ie ya MPU HEARTBEAT 5Hz z Loch ve Kl vs DBG NEUTRAL o WU ce ml 33V yo CEHEARTBEAT 1Hz als E s 215116 ve K v5 DBG 1 lt 52 GND el ins O SO GND_DBG N C A a V5_DBG yl 1 TX 10 Lo ISO Co SV DC M dE RS 232 DES to PC INTERFACE Em C Sch RX OH o ISO O eis RIMINTERFACE 9 449 O ji FPGA TMUXOUT OO 1 ISO d e 6 DB9 CKTEST SoLo LL mmm Amp COBRE On board es VE DE 4 components lt we OTTO BVDCG vaN O powered by V3P3D 13 yo GND DEG 1 e SE O J2 JP21 n E 4 12 2007 Figure 1 3 The TERIDIAN 6531 Demo Board with Debug Board Block Diagram CT Configuration Note All analog input signals are referenced to the V3P3A net 3 3V power supply to the chip 1 6 1 POWER SUPPLY SETUP There are several choices for meter the power supply e Internal using the AC line voltage The internal power supply is only suitable when the line voltage exceeds 220V RMS e External 5VDC connector J1 on
2. V5 DBG C2 C1 0 1uF GND_DBG VDD1 VDD2 DIN GND2 VDD1 DOUT 10K GND DBG O sw2 DB GND1 GND2 5Vdc EXT SUPPLY V5 DBG TP5 TP6 DISPLAY SEL J1 TP TP C3 GND_DBG 0 1uF GND DBG 2 2 33uF 10V E 6 5 V5 DBG RAPC712 i c5 DB9_RS232 5 GND_DBG TT 9 JP1 10uF 16V B Case 4 HDR2X1 V5 DBG 4 8 eus 3 RXPC oo 7 NORMAL em 2 TXPC GND DBG 6 1 0 1uF HDR2X1 d ge RS232 TRANSCEIVER N MAX3237CAI GND DBG C14 232VP1 27 232C1P1 C15 0 1uF V5 DBG 0 1uF 232C1M1 C16 C19 GND 232VN1 4 232C2P1 C18 0 1uF STATUS LEDs 0 1uF 0 1uF 232C2M1 GND DBG 8 V3P3 C2 GND DBG 7 UARI TX TX232 TXISO 6 V3P T1IN ND_DB 5 ND Kr DIO00 L DIOO1 C20 TOO V3P TAIN KDUM1100 GND ND O R T5IN ND P GE 0 1uF ND P UART TX RX232 RTOUTBF RXISO V5 DBG ND UART RX R1OUT C21 ND DB 9 P ND DB RA R2OUT C22 GND V5 DB U P V5 DB NC R3OUT 0 1uF M P V5 DBG 0 1uF HEADER 8X2 GND DBG Pig JJ 2 7 ND DN 2 DIN GND2 HUARTE UART RX T DEBUG CONNECTOR 10K NI D D E 4 VDD1 DOUT 5 ND a GND1 GND2 Be 0 1uF 0 ADUM OO GND_DBG GND_DBG Figure 4 9 Debug Board Electrical Schematic Page 76 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 4 6 DEBUG BOARD PCB LAYOUT v1 5 E15m mm oa E im cl NORMAL a rr P me NULL LS wu Y NULL 299047 7 TOP NORMAL BOT TELTE D D o n e bp s Tv Figure 4 11 Debug Board Bottom View 2007 2008 TERIDIAN Semiconductor Corporation d jTERIDIAN
3. Figure 3 1 71M6531N12A2 Board Connectors Jumpers Switches and Test Points Page 62 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 d jTERIDIAN 3 2 DEMO BOARD HARDWARE SPECIFICATIONS PCB Dimensions Dimensions Thickness Height w components Environmental Operating Temperature 3 625 x 3 625 92 075mm x 92 075mm 0 062 1 6mm 2 0 51mm 40 85 C accuracy of crystal oscillator affected outside 10 C to 60 C Storage Temperature Power Supply Using AC Input Signal DC Input Voltage powered from DC supply Supply Current Input Signal Range AC Voltage Signal VA AC Current Signals IA IB from sensor Interface Connectors DC Supply Jack J1 to Wall Transformer Emulator J14 Emulator J15 SPI Input Signals Debug Board J2 Target Chip U8 Functional Specification Time Base Frequency Controls and Displays Reset Numeric Display Watts VARS Measurement Range Voltage Current Regulatory Compliance RoHS 40 C 100 C 180V 700V rms 5VDC 0 5V 25mA typical 0 240V rms 0 0 25V p p Concentric connector 2 5mm 10x2 Header 0 05 pitch 5x1 Header 0 1 pitch 5x2 header 0 1 pitch Spade terminals and 0 1 headers on PCB bottom 8x2 Header 0 1 pitch QFN68 32 768kHz 20PPM at 25 C Button SW2 8 digit LCD 14 segments 7mm character height red LEDs D5 D6 120 700 V rms resistor division ratio 1 3 398
4. P IINE EN Voltage LE aoa N Dd D P E Current lags N voltage N l Positive Ge direction 60 1 Current N Current leads voltage Y capacitive S L s N o TON lO L Voltage p Generating Energy Using Energy Figure 2 2 Phase Angle Definitions The calibration procedures described below should be followed after interfacing the voltage and current sensors to the 71M6531D F chip When properly interfaced the V3P3 power supply is connected to the meter neutral and is the DC reference for each input Each voltage and current waveform as seen by the 71M6531D F is scaled to be less than 250mV peak 2007 2008 TERIDIAN Semiconductor Corporation Page 47 of 83 d GJ AN 71M6531 Demo Board User s Manual SEMICONDUCTOR CORP 2 2 2 CALIBRATION PROCEDURE WITH THREE MEASUREMENTS The calibration procedure is as follows 1 All calibration factors are reset to their default values i e CAL IA CAL VA 16384 and PHADJ A 0 An RMS voltage Vigea consistent with the meter s nominal voltage is applied and the RMS reading Vactual Of the meter is recorded The voltage reading error Axv is determined as Axv Vactual Videal Videal Apply the nominal load current at phase angles 0 and 60 measure the Wh energy and record the errors Eo AND Ego Calculate the new calibration factors CAL IA CAL VA and PHADJ A using the formulae presented in sec
5. IL gt ACTUAL IV Ay Axy cos s Vans gt IDEAL V ACTUAL V Axy ACTUAL IDEAL ACTUAL 1 IDEAL IDEAL ERROR Figure 2 1 Watt Meter with Gain and Phase Errors During the calibration phase we measure errors and then introduce correction factors to nullify their effect With three unknowns to determine we must make at least three measurements If we make more measurements we can average the results CALIBRATION WITH THREE MEASUREMENTS A simple calibration method uses three measurements Typically a voltage measurement and two Watt hour Wh measurements are made A voltage display can be obtained for test purposes via the command gt MR2 1 in the serial interface Let s say the voltage measurement has the error Ey and the two Wh measurements have errors Eo and Ego where Eo is measured with dy O and Eso is measured with 60 These values should be simple ratios not percentage values They should be zero when the meter is accurate and negative when the meter runs slow The fundamental frequency is fo T is equal to 1 fs where fs is the sample frequency 2560 62Hz Set all calibration factors to nominal CAL A 16384 CAL VA 16384 PHADJA 0 2007 2008 TERIDIAN Semiconductor Corporation Page 43 of 83 d MIL 71M6531 Demo Board User s Manual SEMICONDUCTOR CORP From the voltage measurement we determine that 1 gt A E l We use the other
6. d jTERIDIAN Table 1 13 lists the possible entries for the PULSEWSOURCE and PULSEVSOURCE registers 8 Decimal Value in Decimal Value in PULSEWSOURCE Selected Pulse Source PULSEWSOURCE Selected Pulse Source PULSEVSOURCE PULSEVSOURCE if WOSUM WISUM WISUM reserved if WISUM WOSUM wosum 19 WISUM 20 reserved 1 reserved 25 sosum 20 115050M 27 reserved 28 INSQSUM 29 vososum 30 vISQSUM s reserved 32 VASUM ss VAISUM Changing the equation EQU in the I O RAM does not alter the computations implemented in the Demo Code Table 1 13 Values for Pulse Source Registers 2007 2008 TERIDIAN Semiconductor Corporation Page 39 of 83 d GJ ERIDIAN 71M6531 Demo Board User s Manual SEMICONDUCTOR CORP Table 1 14 explains the bits of the STATUS register Bijsmme e CREEP All elements are in creep mode The pulse variables will be jammed with a constant value on BATTERY BAD The battery voltage is below every accumulation interval to prevent spurious VBatMin The battery is checked only once per pulses Therefore creep mode stops pulsing even day right after midnight in internal pulse mode CAL BAD This bit is set after reset if the longitudinal checksum over calibration factors is invalid CLOCK UNSET This bit is set after reset if is de termined that the RTC has never been set in dicating a bad or non existent battery POWER BAD This bit is set after reset if is de termined that both longitudin
7. EXT SUPPLY E BYTE BLASTER s Page 77 of 83 71M6531 Demo Board User s Manual yn 7337 maipi AMA a 1 E f eg Ee 2 mu MAN hb E BI Gel A CE E Ap Tn EUN A ech steen es ML LN amt OOGOOU Or dd Let se e db D MEE Figure 4 13 Debug Board Middle Layer 1 Ground Plane Page 78 of 83 2007 2008 TERIDIAN Semiconductor Corporation 71M6531 Demo Board User s Manual Figure 4 15 Debug Board Bottom Trace Layer v1 5 2007 2008 TERIDIAN Semiconductor Corporation Page 79 of 83 d jTERIDIAN 4 7 TERIDIAN 71M6531D F PIN OUT INFORMATION Power Ground NC Pins Mee pe foret mese S GNDA EJ felg ground Tr pin Shoe be connected e ground pene Analog ground This pin should be connected directly to the ground plane GNDD TP Digital ground This pin should be connected directly to the ground plane ground This pin should be connected directly to the ground plane V3P3A Analog power supply A 3 3V power supply should be connected to this pin must be the same voltage as V3P3SYS V3P3SYS LE System 3 3V supply This pin should be connected to a 3 3V power supply Auxiliary voltage output of the chip controlled by the internal 3 3V selection switch V3P3D 13 In mission mode this pin is internally connected to V3P3SYS In BROWNOUT mode it is internally connected to VBAT This pin is floating in LCD and sleep mode Limit the capacitance to GND of this pin to 0 1uF Power
8. 47 TERIDIAN 71M6531 Pin Out Information cciisioossniiosa iii 80 46 REVISION FUSION RE aaa aa ag baa ajaa ja aaa aba aja nan aaa isa 83 List of Figures Figure 1 1 Demo Board Basic Connections nennen nenne nnne nnne n nnne nnn nnn nnns nnn 10 Figure 1 2 Demo Board Ribbon Cable Connections occcooccnccnoccnccnncnncnnncnnnnnnonnnnncnnonnncnonnnnnnnnnrnnnnnnrnnonnnnnnnnonnrnnnnnncnns 11 Figure 1 3 The TERIDIAN 6531 Demo Board with Debug Board Block Diagram CT Configuration 12 Figure 1 4 Port Configuration Setup 14 Figure 1 5 Hyperterminal Sample Window with Disconnect Button 15 Figure 1 5 Pre wired shunt ESS EE 28 Figure 1 7 Connection of the Pre Wired Shunt Resistor ooocccccocccnccccconononononnncnnononnnnnnononononnnnonnnrnnonnnnrnnnnnrnnnnancnns 29 Figure 1 8 Typical Calibration Macro nie see e aee eaaa eaaa eaaa aana aana aana anaa anaa aaa aaa aana Naane aana nean 31 Figure 1 9 Emulator Window Showing Reset and Erase Buttons saa ee saene nee eaaa eaaa eaaa aana nana aana aana naen 32 Figure 1 10 Emulator Window Showing Erased Flash Memory and File Load Menu 32 Figure 2 1 Watt Meter with Gain and Phase Ermors eaaa eee aee aaa eaaa nana anana nennen nnne nennen nnn nnn nnne nnn 43 Figure 2 2 Phase Angle Definitions A 47 Figure 2 3 Calibration Spreadsheet for Three Measurements sanane eaaa eaaa eaaa anana aana anaa ana aana eaaa nana nane 49 Figure
9. 51040681 AMP RC1206 34 1 rs 15 RCf200 P15ECTND ERJ8GEYJIRSV Panasonic 35 pr ra X 9681 X 4 RCi206 P681FCTND ERJ8ENF68R1V_ Panasonic 36 6 RIGORTIRI2RO7ZR98R99 62 RCo603 X P62GCTND___ ERJ 3GEYJ620V Panasonic 37 8 RI3R24R74R76 10K RC0608 X P10KGCTND ERJ 3GEYJ103V Panasonic R84R9R108R100 PT 39 2 RtSR7 Mm ae 71 RN65DF20M RN65D2004FBi4 Dale 46 4 R25R34R152R155 NO roe P 50 8 R88R89R91 R92R150R151 0 Jf Rcosoz POOGCTND ERJ 3GEYOROOV Panasonic L SEE O E E E LLL 51 2 X Swtsw2 1 P8 amp OMSCTND EVQ PJXOSM Panasonic 52 8 TP1 TP2 TP4 TP10 TP17 TP19 HEADER2 2X1PIN S1011E 36ND____ PZC36SAAN Suling ENSEM MEE IL UOS E A E AA ASA EP 55 1 17P15 estPon 5011KRND 503 Keystone Texas AT24C256BN 10SU 1 8 58 1 U8 1 X 71M631 6GEQFN 71M65311M TERIDIAN gt RRG mM 32 eme FOs 32r125T XTR ECS Table 4 1 71M6531N12A2 Demo Board Bill of Material Shunt Version V1 5 2007 2008 TERIDIAN Semiconductor Corporation Page 69 of 83 d jTERIDIAN 4 3 71M6531N12A2 DEMO BOARD PCB LAYOUT GND U7 Sa DRX C3 20 N V3P3D SE OTX SS up P4 E po UN CL LO I JE qu s d CG sener LE E cay an Dr e ILS Ds St Ses d EL E omer eN gt S
10. I O Input O Table 4 3 71M6531D F Pin description 1 2 Page 80 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 d jTERIDIAN Digital Pins ee me eeeemm LCD Common Outputs These 4 pins provide the select signals for the LCD display SEGO SEG2 Dedicated LCD Segment Output pins SEG7 SEG8 SEG12 SEG18 LCD Common Outputs These 4 pins provide the select signals for the LCD display SEGO SEG2 Dedicated LCD Segment Output pins SEG7 SEG8 SEG12 SEG18 SEG24 DIO4 Multi use pins configurable as either LCD SEG driver or DIO DIO4 SCK DIO5 SDA when configured as EEPROM interface WPULSE DIOG VARPULSE DIO7 when configured as pulse outputs Unused pins must be configured as outputs or terminated to V3P3 GNDD SEG35 DIO15 SEG37 DIO17 SEG48 D1028 Multi use pins configurable as either LCD SEG driver or DIO Unused pins SEGA are PS must be configured as outputs or terminated to V3P3 GNDD SEG66 D1046 SEG3 PCLK SEG4 PSDO UO Multi use pins configurable as either LCD SEG driver or SPI PORT SEG5 PCSZ SEG6 PSDI a Multi use pins configurable as either emulator port pins when ICE_E pulled high or LCD SEG drivers when ICE_E tied to GND ICE enable When zero E RST E TCLK and E RXTX become SEG32 ICE E SEG33 and SEG38 respectively For production units this pin should be pulled to GND to disable the emulator port Multi use pin configurable as e
11. LSB QUANT LSB value 7 4162 10 W V d Example Assuming an observed error as in Figure 2 6 we determine the error at 1A to be 1 If VMAX is 600V and IMAX 208A and if the measurement was taken at 240V we determine QUANT as follows 540 1 QUANT 00 11339 600 208 7 4162 107 QUANT is to be written to the CE location Ox2F It does not matter which current value is chosen as long as the corresponding error value is significant 596 error at 0 2A used in the above equation will produce the same result for QUANT Input noise and truncation can cause similar errors in the VAR calculation that can be eliminated using the QUANT VAR variable QUANT VAR is determined using the same formula as QUANT CALIBRATING METERS WITH COMBINED CT AND SHUNT RESISTOR In many cases it is desirable to discourage tampering by using two current sensors The simple tampering method that involves connecting the low side of the load to earth ground neutral can be detected by adding a second current sensor in the neutral path as shown in Figure 2 7 In this configuration the shunt resistor is connected to the IA channel while the current transformer is connected to the IB channel of the 71M6531D F 2007 2008 TERIDIAN Semiconductor Corporation Page 51 of 83 d GJ lA 71M6531 Demo Board User s Manual SEMICONDUCTOR CORP Calibrating this arrangement requires a few extra steps above the regular calibration The calibration procedu
12. the expected time based on the meter Kh and the applied power 2007 2008 TERIDIAN Semiconductor Corporation Page 55 of 83 d MIL 71M6531 Demo Board User s Manual 7 SEMICONDUCTOR CORP Optical Pickup for Pulses Calibrator Figure 2 8 Meter with Calibration System TERIDIAN Demo Boards are not calibrated prior to shipping However the Demo Board pulse outputs are tested and compared to the expected pulse output Figure 2 9 shows the screen on the controlling PC for a typical Demo Board The number in the red field under As Found represents the error measured for phase A while the number in the red field under As Left represents the error measured for phase B Both numbers are given in percent This means that for the measured Demo Board the sum of all errors resulting from tolerances of PCB components CTs and 71M6531D F tolerances was 2 8 and 3 8 a range that can easily be compensated by calibration il WinBoard Meter Testing Serial No 3625 a xj Testing Functions Options EFilefGraph Turbo Test Exit Alt F4 Cancel F2 FEunF3 AdjOpticFa Creep FS Mode FE Skip FT View F3 Saye FIO Station 4 Total Saved CONTINUE MODE Task Hyper Sequence Test AS AS Phase Rev Std Service Upper Step Type Found Left Revs Ele wak Amp Angle Power Mode Freq Type Limit ET EEE Form d E E Defaults E kh 1 005 voltage 240 0 Amp 30 00 Test Seq 18 Rev Table 1
13. 1 Address DS Dec UA I i Signum Systems Wemu51 File Edit View Debug Project Options Window Help ADM51 Emulator test Options Window Help XDATA_1 00 00 00 00 00 00 00 00 00 00 as Us oo 00 00 00 n 00 oo 00 XDATA_1 Address 2038 Dec 4 File Name E AMetersFirmwareHex Files653416534_demo_27aug07 hex Browse Load options v Load Code v Verify Code Mr Demo Boa tah DBUN File Type Hex Loading Bank Dffset TUT UU UU UU UU ol oo e DO 10 oo ay et 00 E 00 d oo 00 00 00 0 00 OG 00 00 oi 0 0 oo 00 00 OG 00 00 00 8 Moo ga n 00 00 Load Symbols Load Source Lines Ed Microsoft EEK Address 203E Dec 0 por Y Adobe Re Demo Boa Signum S Status_1 BE ADM51 41807 CPU 71M6511 Kai PC 0000 BANK 0 DPTR 0000 ACC 00 SP 07 B 00 IE 00 CY 0 AC 0 FO 0 OV 0 P ORS 0F1 0 RO F3 R2 01 R4 00 R6 00 Status 1 E im EH ADM51 41807 CPU 71M6511 PC 0000 BANK 0 DPTR 0000 ACC 00 SP 07 B 00 IE 00 Figure 1 10 Emulator Window Showing Erased Flash Memory and File Load Menu Flash Downloader Module TFP 2 Follow the instructions given in the User Manual for the TFP 2 Page 32 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 d JTERIDIAN Emulators or other test equipment should never be connected to a live meter without proper isolation USB isolators are available from various ven
14. 2 Exported Wh all LSB of WOSUM 44 elements Exported Wh 46 element A Exported Wh 48 element B reserved fa O 2007 2008 TERIDIAN Semiconductor Corporation 1 I6 JTOSOSUM 25 1 VOSOSUM 24 bits 0x005C 0x0060 0x0064 o 0x0084 0x00A4 0x00AC 0x00B4 0x00BC 0x00C4 0x00E4 Page 37 of 83 d MER 71M6531 Demo Board User s Manual SEMICONDUCTOR CORP bits VARhe Exported VARh all LSB of WOSUM WC OxOOEC elements VARhe A Exported VARh WE element A OxOOF4 50 Whn Net metered Wh all LSB of WOSUM 54 elements A Whn A Net metered Wh LSB of WOSUM 56 element A for autocalibration Whn B Net metered Wh 58 element B VARhe B Exported VARh OxOOFC element B 0x0104 0x010C 0x01 14 0x011C 5 0x0134 VARhn A Net metered VARh element A for auto calibration VARhn_B Net metered VARh element B 6 0x013C 0x0144 0x014C MainEdgeCnt Count of voltage zero count 64 crossings Wh Default sum of Wh LSB of WOSUM 6 nonvolatile Wh A Wh element A nonvolatile Wh B Wh element B ID nonvolatile Wc mew Nonvolatile status See Status 6D Table 1 12 MPU memory locations 0x0150 67 0x0158 Bd 64 EJ 0x012C EJ E 0x0160 64 0x0164 0x0170 64 64 64 64 64 64 64 64 0x0124 64 64 64 64 32 64 64 64 64 2 VARhn Net metered VARh LSB of WOSUM 5 S all elements Page 38 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 v1 5
15. 2 000 1 turns ratio e For software development MPU code e Signum ICE In Circuit Emulator ADM 51 http www signum com e Keil 8051 C Compiler kit CA51 http www keil com c51 ca51 kit htm http www keil com product sales htm 1 6 DEMO BOARD TEST SETUP Figure 1 1 shows the basic connections of the Demo Boards plus Debug Boards with the external equipment 5VDC Power Uus T ww M NN NCC EET A Hinn TA FERE OT Bik E E p kk LALA kaa Eil kb th b l SAA epp E ez KEH IDJAN sEmIEOMDUCTDM E E Kei e 3 Eu erg BOARD PSRR TPL ad dana REN DEBUG COMMECTOR ah EE 4 rena RESET FEN En Lx BA TULL mos gis us at d 8 kih T 2m H sur e 1 Ii FEL EUCH Aji of P s 3 EQ o Ce E w nnt E m a JULL jh iff TERIDIAN 9 removed Host PC Figure 1 1 Demo Board Basic Connections 5VDC Power The Debug Board can be plugged into J2 of the Demo Board One spacer of the Debug Board should be removed as shown in Figure 1 1 Alternatively both boards can be connected using a flat ribbon cable as shown in Figure 1 2 A male header has to be soldered to J3 of the Debug Board and the female to female flat ribbon cable is not supplied with the Demo Kit use Digi Key P N A3AKA 1606M ND or similar Page 10 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 v1 5 71M6531 Demo Board User s Manual SE TET2IDIA
16. 25 1 8 2 Using the Demo Board in SHUNT and CT Modes oocccccoccnccncccnccnnconononcnnononononnnnonononrnnnnnnnnnnnnnnnnnnnrnnonanennos 25 1 8 3 Adjusting the kh Factor for the Demo Board 26 1 8 4 A Adjusting the Demo Boards to Different CT Winding Ratios eaaa eee aee eaaa eaaa aana aana aana aana eaaa een 27 1 8 5 Adjusting the Demo Boards to Voltage Transformers or Different Voltage Dividers 27 1 8 6 Wiring of the Demo Board and a Shunt Resistor rrrrrnrrrnnnnnrennnrrrrnnnrenrnnrrrnrnnnrnnnnsrenrnnnrennnsrernnnsrennnnnnssen 27 cr A 30 1 9 1 General Calibration Procedure aaa a eaaa eaaa aana aana anaa nana a anana a nana a aana anaa a anaa a anaa ena een n aana anane 30 1 9 2 Updating the 6531 demo hex file rrrarrrrnnrrrnarrrrarrrrannrrnnnrrnanrnranrnnarennnnennanennasennansennnnennunennasssennunennassennn 30 O MIS aas aaa beka eaaa tmm 31 1 9 4 AJ Updating Calibration Data in EEPROM of Flash 31 1 9 5 Loading the 6531 demo hex file into the Demo Board 31 1 9 6 The Programming Interface of the 71M6531 0 0 00 eaaa eaaa aana eaaa eaaa anaa a nennen nnne nnne nnn nnn nnn 33 110 Demo COdE E nk 34 1 10 1 Demo Code Description M 34 1 10 2 Accessing LCD and Sleep Modes from Brownout Mode cooccnccncoccnccnccccccnccnccnncononnncononononnnnnrnnnnoncnnnnanennnnos 34 1 10 3 Demo Code Memory Locations
17. 34 111 Emulator OperatlON siio dau d iD RR SAS ain nda a kanan aja NEUE ipio re 41 2 APPLICATION INFORMA TION court 43 21 ANDENES 43 2 1 1 Calibration with Three Measurements nennen nnn nnn nnne nnns nsns ss nnn snae g ns 43 2 1 2 Calibration with Five Measurements occoocccoccnccccnncccnnconcncnnnnnonnnnnonnnnonnnonnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnaninnnnnns 45 NF 46 22 eicere ice 47 2 2 1 General Precautjons sasae eaaa aaa aaa aaa aana anaa anana cota ER HE LIE 47 2 2 2 Calibration Procedure with Three Measurements asana eaaa aana anaa anaa anaa aana nnne nnne nnne 46 2 2 3 Calibration Procedure with Five Measurements saanane eaaa eaaa aaa anaa aaa anana aana anana a nnne nnne 48 2 2 4 Procedure for Auto Calibration asa ee aee eee eaaa eaaa nean aana anana eaaa naen anaa a anaa anana anane ene een nean eee 49 2 2 5 Calibration Spreadsheets 00nnn0nnnannnnnnnninnninnninsnirrrresnrrnrirsrrrsrrrrrrsrrrsrirsnirsrirerirsnrrnnrrenrnenrrrnnrrnnrrrernrene 49 V1 5 2007 2008 TERIDIAN Semiconductor Corporation Page 5 of 83 d GJ AN 71M6531 Demo Board User s Manual SEMICONDUCTOR CORR 2 2 6 Compensating for Non Linearities rrrrnnrrrnnnrnrnrnnnrvnrnnnrnrnnnnrnrnnrnnrnnnrnrnnnernrnnnsnnnnnnrnnnnnsrnrnnnsnnnnnnsernsnnnsen 51 2 2 7 Calibrating Meters with Combined CT and Shunt Resistor sesa e eaaa eaaa ana
18. COM2 47 OMS COM3 CKTEST T CKTEST Pug z TMUXOUT CKTEST SEG19 43 zz TMUXOUT SEG28 DIO08 m 2 JP12 c O 7 O SEG29 DIO09 3 q 2 EN di GND BAT MODE 507 PS SS V 1 2 No External Battery 2 3 External Bat Available GE bx E TCLK SEG10 E RXTX SEG9 ICE E R155 NC 40 R152 d PULSE OUTPUTS SEG27 DIO07 YPULSE SEG27 DIO7 OPT TX OUT OPT TX DIO2 OPT RX DIO1 20 6531 68QFN JP14 V3P3 Date Friday December 14 2007 Figure 4 3 71M6531N12A2 Demo Board REV 2 0 Electrical Schematic 3 3 Digital Section Page 68 of 83 O 2007 2008 TERIDIAN Semiconductor Corporation v1 5 d jTERIDIAN 4 2 71M6531N12A2 DEMO BOARD BILL OF MATERIAL Reference bue RRE Part Number Footprint Number AVX 4 9 c5ct7c19 c20 c23 C27 028 our Rcoe03 445 1314 ND C1608X7R1H104K TOK PBC IS Cid E E 5 1 06 1 0 wmr BCi8ND 2222 383 30474 BC Components 6 7 C7 C43 044 046 C49 22p Jf RCo603 44512731ND C1608C0G1H2200 TDK 8 1 2 44 L 186 X Roe 1 P 9 1 05 233F X RC060 44512 5 2 ND C1608C0G1H330 TDK 17 ft 1 on UCLAMP33001D SOD 23 TI UCLAMP3301DTCT SEMTECH 18 1 DCCONNECTO X SC23TND RAPC7X_ Switchcraft 21 3 J45J99 SpadeTermna A24747CTND____ 6239531 AMP 23 1 Ji4 10X2 CONNECTOR 0 05 571 5 104068 1
19. Corporation v1 5 d jTERIDIAN MPU ACCUMULATION OUTPUT VARIABLES Accumulation values are accumulated from XFER cycle to XFER cycle see Table 1 15 They are organized as two 32 bit registers The first register stores the decimal number displayed on the LCD For example if the LCD shows 001 004 the value in the first register is 1004 This register wraps around after the value 999999 is reached The second register holds fractions of the accumulated energy with an LSB of 9 4045 10 VMAX IMAX In 8 Wh The MPU accumulation registers always hold positive values The CLI commands with two question marks e g 39 should be used to read the variables XRAM Word Name Description Address Total Watt hours consumed imported Total Watt hours generated exported VARhi Total VAR hours consumed VARhe Total VAR hours generated inverse consumed Total VA hours Total Watt hours consumed through element 0 Total VAR hours generated inverse consumed through element 0 Total Watt hours generated inverse consumed through element 1 Table 1 15 MPU Accumulation Output Variables 1 11 EMULATOR OPERATION The Signum Systems ADM51 ICE In Circuit Emulator can be plugged into J14 or J15 of the Demo Board The following conditions are required for successful emulator operation including code load erase in flash memory 1 Emulator operation is enabled by plugging a jumper into header JP4 pins V3P3D ICE E 2 The CE is disable
20. Inverse Consumption display wraps around at 999 999 Main edge count n 0 accumulated n 1 last second Displays for total consumption wrap around at 999 999kWh or kVARh kVAh due to the number of available display digits Internal registers counters of the Demo Code are 64 bits wide and do not wrap around veont 4 4 The internal accumulators in the Demo Code use 64 bits and will neither overflow nor wrap around under normal circumstances The restriction to only six digits is due to the requirement to provide one digit showing the display mode that is separated by a blank digit from the displayed values Commands for Controlling the RMS Values Shown on the LCD Display METER RMS DISPLAY CONTROL LCD Description Allows user to select meter RMS display for voltage or current MR option opor Command MR1 phase Displays instantaneous RMS current combinations MA MR2 phase Displays instantaneous RMS voltage MR1 2 Displays phase b RMS current Commands for Controlling the MPU Power Save Mode Description Enters power save mode Disables CE ADC CKOUT ECK RTM TMUX VREF and serial port sets MPU clock to 38 4KHz e Return to normal mode is achieved by issuing a hardware reset Page 20 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 71M6531 Demo Board User s Manual v1 5 7 SEMICONDUCTOR CORP Commands for Controlling the RTC pl Allows the user to rea
21. Name Address bits LCD CLKT 1 0 2021 1 0 Sets the LCD clock frequency i e the frequency at which SEG and COM pins change states Note f CKADC 128 38 400 DO fu2 01 fwl2 10 142 11 ful 2 To change the LCD clock frequency we apply the following CLI commands gt RI21 Reads the hex value of register 0x2021 gt 25 Response from Demo Code indicating the bit 0 is set and bit 1 is cleared gt RI21 24 Writes the hex value 0x24 to register 0x2021 clearing bit O LCD flicker is visible now gt RI21 25 Writes the original value back to LCD CLK 2 4 06 SUPPLY CURRENT MEASUREMENTS Some precautions have to be taken when exact supply current measurements are to be made Supplying unnecessary pull up resistors and or external components with current will yield inaccurate measurement results In brownout mode the following precautions should be taken 1 The Debug Board should be removed from the Demo Board 2 The RX pin should be properly terminated e g by tying it to GND On the Demo Boards this is accomplished with R90 3 The jumper on JP4 should be moved to position 1 2 in order to save the current required to supply the ICE_E pin 2 5 TERIDIAN APPLICATION NOTES Please contact your local TERIDIAN sales representative for TERIDIAN Application Notes Page 58 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 d JTERIDIAN 3 HARDWARE DESCRIPTION 3 1 DEMO BOARD DESCRIPTION JUMPERS SWITCHES TEST POI
22. Selects the CE_BUSY signal for the TMUX output pin Calibration Commands Description Calibration related commands A full auto calibration can be implemented by compiling the Demo Code with auto calibration selected as an option Due to space restrictions the auto calibration is not implemented in the Demo Code supplied with the Demo Boards CL option PAN Loads a calibration via serial port combinations jas Startsanauto calloraion sequence Jon estores calibration to defauts Jon Restores calibration from EEPROM fas L nster OOOO Commands for Identification and Information Description Allows user to display information messages Coss ja The command is used to identify the revisions of Demo Code and the contained CE code v1 5 2007 2008 TERIDIAN Semiconductor Corporation Page 19 of 83 d MILLS 71M6531 Demo Board User s Manual SEMICONDUCTOR CORP Commands for Controlling the Metering Values Shown on the LCD Display METER DISPLAY CONTROL LCD Allows user to select internal variables to be displayed Command M kWh Total Consumption display wraps around at 999 999 combinations Temperature C delta from nominal Frequency Hz M3 phase kWh Total Consumption display wraps around at 999 999 M4 phase kWh Total Inverse Consumption display wraps around at 999 999 M5 phase KVARh Total Consumption display wraps around at 999 999 M6 phase kVAh Total
23. The clock rate is adjusted by writing the appropriate values to PREG 16 0 and QREG 1 0 The default frequency is 32 768 RTCLK cycles per second To shift the clock frequency by A ppm calculate PREG and QREG using the following equation Page 54 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 2 4 2 4 1 v1 5 d jTERIDIAN 4 PREG QREG floor I US 1 A 10 PREG and QREG form a single adjustment register with OREG providing the two LSBs The default values of PREG and QREG corresponding to zero adjustment are 0x10000 and 0x0 respectively Setting both PREG and QREG to zero is illegal and disturbs the function of the RTC If the crystal temperature coefficient is known the MPU can integrate temperature and correct the RTC time as necessary using PREG 16 0 and QREG 1 0 The Demo Code adjusts the oscillator clock frequency using the parameters Y CAL Y CALI and Y CAL2 which can be obtained by characterizing the crystal over temperature Provided the IC substrate temperature tracks the crystal temperature the Demo Code adjusts the oscillator within very narrow limits The MPU Demo Code supplied with the TERIDIAN Demo Kits has a direct interface for these coefficients and it directly controls the PREG 16 0 and OREG 1 0 registers The Demo Code uses the coefficients in the following form Y CAL FE CALC _ Y CALC2 pcc m c age em 10 100 1000 Note that the coefficients are scaled by 10 100 and 1000 to provide mor
24. at lower and higher currents and various phase angles to confirm the desired accuracy Store the new calibration factors CAL IA CAL VA and PHADJ A in the EEPROM of the meter If the calibration is performed on a TERIDIAN Demo Board the methods shown in sections 1 9 2 can be used Page 48 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 d JTERIDIAN 2 2 4 PROCEDURE FOR AUTO CALIBRATION The fast calibration procedure is supported by the Demo Code when the Auto Cal function is executed This procedure requires the following steps 1 Establish load voltage and current from the calibration system The load angle must be exactly 0 00 degrees 2 Enter the expected voltage and current using CLI commands For example to calibrate for 240V 30A for two seconds enter F 2 2400 300 3 Issue the CLI command CLB 4 Wait the specified number of seconds 5 Check the calibration factors established by the automatic procedure CALIBRATION SPREADSHEETS Calibration spreadsheets are available from TERIDIAN Semiconductor They are also included in the CD ROM shipped with any Demo Kit Figure 2 3 shows the spreadsheet for three measurements with three phases in use only one phase needs to be used for the 71M6531D F chip 2 2 5 Figure 2 3 shows the spreadsheet for five measurements with three phases only one phase needs to be used for the 71M6531D F chip 4j TERIDIAN em A SEMICONDUCTOR CORP Enter values in yellow f
25. code or memory loadable 5 Data 0 2n data n is normally 20 hex 32 decimal or less The least significant byte of the two s complement sum of the Checksum 2 values represented by all the pairs of characters in the record except the start code and checksum Table 1 6 Fields of a Hex Record Each record may be terminated with a CR LF NULL character Accuracy of transmission is ensured by the byte count and checksum fields This is important when series of values such as calibration constants are transmitted to a meter e g by ATE equipment in a factory setting When entering hex records manually the user may also choose FF wild card as the checksum In this case the Demo Code omits comparing the checksum with the received record s This is how the checksum is calculated manually if necessary 1 The hex values of all bytes except start code and checksum itself are added up 2 The last two hex digits are subtracted from OxFF 3 The value 0x01 is added Page 22 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 d jTERIDIAN As opposed to the standardized Hex records that offer three possible types data termination segment base six different types are supported for communicating with the 71M6531D F These data types basically encode command types read write along with the data source or destination as listed in Table 1 7 Write CE data record contains data and 16 bit CE address CE data RAM is located at 0
26. shipped with a pre wired shunt resistor 400102 as shown in Figure 1 6 This shunt resistor has to be connected to the 71M6531 Demo Board as shown in Figure 1 7 2007 2008 TERIDIAN Semiconductor Corporation Page 27 of 83 d ERAN 71M6531 Demo Board User s Manual SEMICONDUCTOR CORP to IA reference to meter power 4 supply LOAD NEUTRAL Figure 1 6 Pre wired shunt resistor Important safety precautions apply when operating the Demo Board in shunt mode In shunt configuration the whole Demo Board will be at line voltage Touching the board or any components must be avoided It is highly recommended to isolate Demo Board and Debug Board when used and to provide separate power supplies for the Demo Board and Debug Board Emulators or other test equipment should never be connected to a live meter without proper isolation Page 28 of 83 O 2007 2008 TERIDIAN Semiconductor Corporation v1 5 d JTERIDIAN NEUTRAL SHUNT O 3 H ES Low crosstalk demands These wires must be ug that these current paths idi 1 connected directly at E i NN ME ES RE the shunt resistor i RED BLUE WHITE S LOAD Power supply and reference for aos Signal for anaemia Reference for current current measurement LIVE measurement 3 2 1 TND A e eur EN NY 71M6531 NEUTRAL Voltage Divider en pm pm pm pm pm pm eee pm pm pm pm m D6531N12A2 Demo Board 10 24 2007 Figure 1 7 Connection of the Pre Wired Shunt Resis
27. to the primary side of the CT the voltage Vin at the IA or IB input of the 71M6531D F IC is determined by the following formula Vin R R IMAXIN where N transformer winding ratio R resistor on the secondary side burden resistor If for example IMAX 208A are applied to a CT with a 2500 1 ratio only 83 2mA will be generated on the secondary side causing only 141mV In this case the Demo Board can be adapted with the steps outlined below 176 8mV 1 The formula R is applied to calculate the new resistor Rx We calculate Rx to 2 1150 i IA 2 Changing the resistors R24 R25 or R106 R107 to a combined resistance of 2 115 for each pair will cause the desired voltage drop of 176 8mV appearing at the IA or IB inputs of the 71M6531D F IC 3 WRATE should be adjusted to achieve the desired Kh factor as described in 1 8 3 Simply scaling MAX is not recommended since peak voltages at the 71M6531D F inputs should always be in the range of 0 through 250mV equivalent to 176 8mV rms If a CT with a much lower winding ratio than 1 2 000 is used higher secondary currents will result causing excessive voltages at the 71M6531D F inputs Conversely CTs with much higher ratio will tend to decrease the useable signal voltage range at the 71M6531D F inputs and may thus decrease resolution ADJUSTING THE DEMO BOARDS TO VOLTAGE TRANSFORMERS OR DIFFERENT VOLTAGE DIVIDERS The 71M6531 Demo Board comes equipped with its own netw
28. 0x0015 U 16 7 NN ll 6 6 8 9 JA S 0x0019 0x001B Ir MA 0x001E 0x001F Nominal RMS voltage applied to U 1 0x0021 all elements during auto calibration LSB 0 1V 0x001D Count of accumulation intervals to be used for auto calibration Nr e e 2007 2008 TERIDIAN Semiconductor Corporation Page 35 of 83 71M6531 Demo Board User s Manual Function or LSB Value CLI Current value to be Nominal RMS current applied to used for autocalibra all elements during auto calibra tion tion LSB 0 1V Power factor Ical VThrshld Pulse Width TEMP_NOM Imaxb IThrshldB VBatMin CalCount RTC copy deltaT Frequency VBAT Page 36 of 83 must be 1 Voltage at which to measure frequency zero crossing etc This feature is approximated using the CE s sag detection t 2 PulseWidth 1 397us OxFF disables this feature Takes effect only at start up Units of TEMP_RAW from CE The value read from the CE must be entered at this address Maximum time pulse is on Nominal tempera ture the temperature at which calibration occurs Scaling maximum 0 1A 15 current for element B equivalent to 176mV at the lA pin Starting current 2 NSOSUM 16 element B Minimum battery Same as VBAT below 17 voltage 18 Count of calibrations Counts the number of times calibration is saved to a maximum of 255 Nonvolatile copy of Sec Min Hr Day Date Month th
29. 2 4 Calibration Spreadsheet for Five Measurements eaaa eaaa eaaa eaaa aana anaa a nennen nnne nnne nnn 50 Figure 2 5 Calibration Spreadsheet for Fast Calibration oocccoonccncconcnnonocononnnnononononnnnnonononrnnonnnnnnnonnncnnonrnnonnnnnnos 50 Figure 2 6 Non Linearity Caused by Quantification Noise sesa e eaaa eaaa aana aana anaa anaa anana a aana a anan anana 51 Fig re 2 7 71M6591 with Shunt send QT seus lia ainia 52 Figure 2 17 Meter with Calibration System nennen nene nne e nnne nnne rn nnns n nnns nnn nnn nnn 56 Figure 2 18 Calibration System Screen ooccoocccccnoccnconnccnononcnnnnnnononnnrnnn nn rn aaa aana nn a nnne nnns nnns nsns rni earn nnns nnne nnn 56 Figure 3 1 71M6531N12A2 Board Connectors Jumpers Switches and Test Points sae aeaa anane ae ae ae anae a nean 62 Figure 4 1 71M6531N12A2 Demo Board REV 2 0 Electrical Schematic 1 3 Shunt Configuration 66 Figure 4 2 71M6531N12A2 Demo Board REV 2 0 Electrical Schematic 2 3 CT Configuration 67 Figure 4 3 71M6531N12A2 Demo Board REV 2 0 Electrical Schematic 3 3 Digital Section 68 Figure 4 4 71M6531N12A2 Demo Board Top Silk Screen 70 Page 6 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 d jTERIDIAN Figure 4 5 71M6531N12A2 Demo Board Top Copper aver 71 Figure 4 6 71M6531N12A2 Demo Board Bottom View with Silk Sc
30. AF Limits 1 2 eats Sate uo amp S B Seq AL Limite Service Single Phase bul O Reverse Power Start Delay 2 Optics Middle IR sl EE Test Complete Figure 2 9 Calibration System Screen 2 4 2 EEPROM Testing the EEPROM provided on the Demo Board is straightforward and can be done using the serial command line interface CLI of the Demo Code Page 56 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 d jTERIDIAN To write a string of text characters to the EEPROM and read it back we apply the following sequence of CLI commands gt EEC1 Enables the EEPROM gt EESthis is a test Writes text to the buffer gt EETS80 Writes buffer to address 80 Written to EEPROM address 00000080 74 68 69 73 20 69 73 20 61 Response from Demo Code gt EER80 E Reads text from the buffer Read from EEPROM address 00000080 74 68 69 73 20 69 73 20 61 Response from Demo Code gt EECO Disables the EEPROM 2 4 3 RTC Testing the RTC inside the 71M6531D F IC is straightforward and can be done using the serial command line interface CLI of the Demo Code To set the RTC and check the time and date we apply the following sequence of CLI commands gt M10 LCD display to show calendar date gt RTD05 09 27 3 Sets the date to 9 27 2005 Tuesday gt M9 LCD display to show time of day gt RTT10 45 00 Sets the time to 10 45 00 AM PM distinction 1 22 33PM 13 22 33 2 4 4 HARDWARE WATCHDO
31. CT 1 7Q termination for 2 000 1 CT IMAX 208A Shunt Depending on shunt resistance Rs IMAX 176mV Rs PCB components and processing are in compliance with the RoHS guidelines V1 5 2007 2008 TERIDIAN Semiconductor Corporation Page 63 of 83 ES EE Page 64 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 4 APPENDIX This appendix includes the following documentation tables and drawings Demo Board Schematics Demo Board Bills of Materials Parts Lists BOM Demo Board PCB Layout Views Debug Board Description Debug Board Electrical Schematic Debug Board Bill of Materials Debug Board PCB Layout 71M6531D F Pin Out and Mechanical Description 71M6531D F Pin Description 71M6531D F Pin out Modification History v1 5 O 2007 2008 TERIDIAN Semiconductor Corporation d jTERIDIAN Page 65 of 83 4 1 TERIDIAN SEMICONDUCTOR CORP 74 71M6531N12A2 DEMO BOARD ELECTRICAL SCHEMATIC TP15 TP GND C14 TP3 7 1000pF E J9 NEUTRAL NC NEUTRAL C32 0 03uF 250VDC C1 D3 2200uF 16V RV1 1N4736A VARISTOR 6 8V 1W AVX VE24M00511K R83 16 9K 196 C6 0 47uF 1000VDC D4 1N4148 R86 20 0K 1 VOLTAGE CONNECTIONS 600 OHM R6 100 2W 1206 PACKAGE J1 RAPC712 POWER SUPPLY SELECTION TABLE SELECTION PS SEL 0 JP1 PS SEL 0 5VDC EXT SUPPLY O board supply External DC SUPPLY J1 R15 R16 R17
32. CTOR CORP Figure 4 8 71M6531N12A2 Demo Board Bottom Copper Layer Layer View from Top Page 74 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 SEMICONDUCTOR CORR 4 4 DEBUG BOARD BILL OF MATERIAL L3 p eeo C1 C3 C5 C10 C12 C23 RCO805 445 1349 1 ND C2012X7R1H104K TDK a paa cas 33uF 10V RC1812 478 1687 1 ND TAJB336KO10R ap TT 3 1 cn 10uF 16V RC1812 478 1673 1 ND TAJB106KO16R AVX 4 2 D2 D3 LED RC0805 160 1414 1 ND LTST C170KGKT LITEON G1 G2 G3 G4 MTHOLE 2202K ND 2202K ND Keystone Electronics 6 4 440 14 screw H342 ND PMS 4400 0025 PH Building Fasteners DC Connector RAPC712X SC237 ND RAPC712X Switchcraft 8 1 4J2 DB9 right angle female DSUB9 SKT A32117 ND 5747844 4 AMP Tyco 9 1 XA4 9 HEADER D8EX2 BX2PIN S7111 ND PPPCO82LFBN RC JP1 JP2 JP3 JP4 HEADER 2 2X1PIN S1011E 36 ND PZC36SAAN R1 R5 R7 R8 RCO805 P10KACT ND ERJ 6GEYJ103V R2 R3 RCO805 P1 0KACT ND ERJ 6GEYJ102V RCO805 a pa P o e RmCO80 PO OACT ND ERJ 6GEYOROOV PB switch P8081SCT ND EVQ PJXOSM U1 U2 U3 U5 U6 ISOLATOR SOIC8 ADUM1100ARZ ND ADUM1100ARZ TP5 TP6 Test Point Me 5011K ND 5011 Keystone Electronics RS232 DRIVER 28SSOP MAX3237CAI ND MAX3237CAI MAXIM Table 4 2 Debug Board Bill of Material v1 5 O 2007 2008 TERIDIAN Semiconductor Corporation Page 75 of 83 TERIDIAN SEMICONDUCTOR CORP 71M6531 Demo 3oard User s Manual B 4 5 DEBUG BOARD SCHEMATICS
33. Communication with the 71M6531D F IC especially by computers and or ATE may also be accomplished using a simplified protocol based on Intel Hex records These records can still be sent and received with an ordinary terminal and coding and decoding of commands and responses is straight forward Using the Hex Record Format Intel s Hex record format allows program or data files to be encoded in a printable ASCII format allowing editing of the object file with standard tools and easy file transfer between a host and target An individual hex record is a single line in a file composed of one or several Hex records Entering CLC from the text based command line interface enables the hex record interface Hex Records are character strings made of several fields which specify the record type record length memory address data and checksum Each byte of binary data is encoded as a 2 character hexadecimal number the first ASCII character representing the high order 4 bits and the second the low order 4 bits of the byte The six fields that comprise a Hex record are defined in Table 1 6 Field Name Characters Description Start code An ASCII colon Byte count The count of the character pairs in the data field The 2 byte address at which the data field is to be loaded into 3 Address 4 memory This is the physical XRAM or I O RAM address not the 4 byte address used by the command line interface CLI From 0 to n bytes of executable
34. Demo Code A complete calibration procedure is given in section 2 1 3 of this manual Regardless of the calibration procedure used parameters calibration constants will result that will have to be applied to the 71M6531D F chip in order to make the chip apply the modified gains and phase shifts necessary for accurate operation Table 1 10 shows the names of the calibration constants their function and their location in the XRAM Again the command line interface can be used to store the calibration constants in their respective XRAM addresses For example the command gt 11 16302 stores the decimal value 16302 in the XRAM location controlling the gain of the voltage channel CAL_ VA CAL_VA Adjusts the gain of the voltage channel 16384 is the CAL VB typical value The gain is directly proportional to the CAL parameter Allowed range is O to 32767 If the gain is 196 slow CAL should be increased by 196 CAL IA Adjusts the gain of the current channels 16384 is the CAL IB typical value The gain is directly proportional to the CAL parameter Allowed range is 0 to 32767 If the gain is 1 slow CAL should be increased by 196 PHADJ A This constant controls the CT phase compensation No PHADJ B compensation occurs when PHADJ 0 As PHADJ is i increased more compensation is introduced Note PHADJ B applies to 3W 1 phase systems Table 1 10 XRAM Locations for Calibration Constants 1 9 2 UPDATING THE 6531 DEMO HEX FILE The
35. Demo Code will communicate at 300bd Transitions to sleep or LCD mode can be made from brownout mode This operation mode requires connection of a battery or equivalent DC voltage at JP8 1 10 3 DEMO CODE MEMORY LOCATIONS Registers in MPU data RAM can be accessed via the command line interface CLI or the using the method involving Intel Hex records Table 1 12 lists MPU addresses of interest Manipulating the values in the MPU addresses enables the user to change the behavior of the meter For example if the current transformer external to the Demo Board is changed a different IMAX value n may have to be applied This can be done by changing the value in the address for IMAX using the CLI command lt addess gt n Modifications to MPU data RAM will not be main tained when a reset or power up occurs Changes to the MPU data RAM can be made permanent by creating a macro file containing one or several CLI commands and merging the macro file into the code using the d merge utility described in section 1 9 2 The following is an example showing how the battery bit can be set permanently by creating a new object file A text file battery txt is generated containing the CLI command 1 20 The d merge utility is called using the following syntax 6531 demo hex is the existing object file d merge 6531 demo hex battery txt new 6531 demo hex Now the object file new 6531 demo hex contains the battery bit Page 34 of 83 2007 2008
36. G TIMER The hardware WDT of the 71M6534 6534H is disabled when the voltage at the V1 pin is at 3 3V V3P3 On the Demo Boards this is done by plugging in a jumper at TP10 between the V1 and V3P3 pins Conversely removing the jumper at TP10 will enable the WDT When the WDT is enabled typing W at the command line interface will cause the Demo Board to reset 2 4 5 LCD Various tests of the LCD interface can be performed with the Demo Board using the serial command line interface CLI The display outputs are enabled by setting the LCD EN register to 1 Register Name Address bits LCD_EN 2021 5 R W Enables the LCD display When disabled VLC2 VLC1 and VLCO are ground as are the COM and SEG outputs To access the LCD EN register we apply the following CLI commands gt RI21 Reads the hex value of register 0x2021 gt 25 Response from Demo Code indicating the bit 5 is set gt RI21 5 Writes the hex value 0x05 to register 0x2021 causing the display to be switched off gt RI21 25 Sets the LCD EN register back to normal The LCD CLK register determines the frequency at which the COM pins change states A slower clock means lower power consumption but if the clock is too slow visible flicker can occur The default clock frequency for the 71M6531 Demo Boards is 150Hz LCD CLK 01 V1 5 2007 2008 TERIDIAN Semiconductor Corporation Page 57 of 83 d MILLS 71M6531 Demo Board User s Manual SEMICONDUCTOR CORP Register
37. N Ribbon Cable DC rowa A qum E G ni Kik da Kean Aa ai a abahu S a Liber Subs ri i lb 4 DIE Ermi A Kagee uw e win wn um 4 d CR SC el de Host PC 5VDC Power Figure 1 2 Demo Board Ribbon Cable Connections The 71M6531 Demo Board block diagram is shown in Figure 1 3 It consists Board and an optional Debug Board The Demo Board contains all circuits TI 5 l mais d SA H ees Lk SES agin GENE 45 aces ER a Cox E Su e ate ba mun ES TEE bil LS HAAR a e ES of a stand alone meter Demo necessary for operation as a meter including display calibration LED and power supply The Debug Board when not sharing a power supply with the meter is optically isolated from the meter and interfaces to a PC through a 9 pin serial port Connections to the external signals to be measured i e scaled AC voltages and current signals derived from shunt resistors or current transformers are provided on the rear side of the Demo Board O 2007 2008 TERIDIAN Semiconductor Corporation It is recommended to set up the Demo Board with no live AC voltage connected and to connect live AC voltages only after the user is familiar with the demo system Page 11 of 83 d METUS IAN 71M6531 Demo Board User s Manual SEMICONDUCTOR CORP DEMONSTRATION METER
38. ND o m RIDE zx se up Beer er L YPULSE VARh Wh RB o M d P gt x SATERICIAN qe BOL ds SEMICONDUCTOR CORR tri E hs Ek Liz RESET NE Du ar E wl 4 In od si E ut 2 R3 TP1 PS GELO ce EA sje DND IP19 IM Jv3r3 L8 M HIGH VOLTAGE TP 15 um age ge io Ll re4 IP Ho e L lr29 Fr E LJ RVI E ra af L z d a ok Cru LP CO a 2 IB IN gt E cz in INO Figure 4 4 71M6531N12A2 Demo Board Top Silk Screen Page 70 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 Figure 4 5 71M6531N12A2 Demo Board Top Copper Layer 2007 2008 TERIDIAN Semiconductor Corporation Page 71 of 83 d jTERIDIAN 0600000000 0600000000 tob ex 6 000 ze o 9 Dd gt e es TE e e e e e e s 8 EE H d E e 6 ee R108 REP 00 mBuRi a EC 00 RRC AG R150 EE Eis eN musFL2 e e Lei C38 00 EERLLeeeeeeeee 300000005 606 muR10 L3 V3P3 NG 777 nala de X Jl e e em IA IN LB IN Jy NEUTRAL Figure 4 6 71M6531N12A2 Demo Board Bottom View with Silk Screen Page 72 of 83 O 2007 2008 TERIDIAN Semiconductor Corporation v1 5 v1 5 GATERIDIAN SEMICONDUCTOR CORP Figure 4 7 71M6531N12A2 Demo Board Bottom Copper Layer Bottom View 2007 2008 TERIDIAN Semiconductor Corporation Page 73 of 83 GATERIDIAN SEMICONDU
39. NTS AND CONNECTORS This description covers the D6531N12A2 Demo Board The items described in the following tables refer to the flags in Figure 3 1 Item Schematic amp Figure Silk Screen Reference This is the line voltage input that feeds both the resistor divider leading to the VA pin on the chip and the internal power supply The line voltage wire is connected to the spade terminal on the bottom of the board Caution High Voltage Do not touch this pin 1 pin header allowing access to the V3P3 voltage generated by the board power supply 3 JP4 PS SEL Power source selector If a jumper is installed the Demo Board is powered by the line voltage on phase A TP15 Test point for board ground 5 Tp VA REFA 2 pin header test point Pin 1 is the VA line voltage input to the IC j pin 2 is V3P3 2 pin header used as a selector for the driving source of pulse LED D6 In default setting 2 3 the WPULSE DIO6 drives the LED The alternative selection causes the XPULSE output to drive the LED g VERE Starting witn Demo Code revision 4p6 the CE will activate the YPULSE when a sag condition is encountered Placing a jumper across pins 2 and 3 will activate the VARh LED when a sag condition is detected which can help with sag threshold testing 2 pin header used as a selector for the driving source of LED D5 In 7 JP13 XPULSE default setting 1 2 the VARPULSE DIO7 drives the LED The alternative selection causes the YPULSE o
40. P 104068 1 SES RES o 1K RA1O JP13 P XPULSE p C36 JP4 1 p 1000pF ICE Enable ND SERIAL EEPROM Populate J14 or GN 3 2 V den p M 0 J15 not both V3P3D SEG26 DION6 600 OHM L10 7 JP8 d VBAT C19 C39 3 0 1uF 1000pF 0 gt SEG00 8 SEGO1 56 EG02 s COM3 1 36 COM1 S SEG02 COM3 C30 C28 7 PCLK 2 35 SEG3 PCLK 1F 1E 1D 1000pF 0 1uF 11 PSDO 34 O peres M E PCSZ E o a koma To enable RESET GND no E PSD PE a SEG6 PSDI 5 2A 2B 2C 2DP Change R91 to 10K 26 EGO EG48 DIO28 6 SEG17 R92 SEG7 MUXSYNC 757 EGOS EG31 DIO11 7 3F 3E 3D 31 EG16 SEGOS 25 ECO5 DIO45 EC3UDIO10 8 eke a EOTS SEG65 DIO45 1 55 EG63 DIO43 EG18 9 4F 4E 4D 29128 EG14 R87 sw1 C23 0 SEG63 DIO43 30 EG33 DIO13 9 4A 4B 4C 4DP 100 0 1uF R91 SEG33 DIO13 34 EGT2 0 SEG12 32 EG13 GND SEG13 33 2 SEG64 DIO44 10 27 SEG13 GND SEG14 34 EG15 EG35 DI015 11 27 EG12 E SEG15 35 EG16 EG34 DI014 42 5A 5B 5C 5DP EG33IDIO13 SEG16 36 EG17 EGO 13 gt EG63 DIO43 FEM 37 EG18 EGO1 14 nas EG65 D1045 R101 sw2 C35 68 EG32 DIO12 EGOO 15 EG08 1K 0 1uF SEG32 DIO12 45 EG30 D1010 EG37IDIO17 316 15 TTB IC IDE EGO SEG30 DIO10 Ce EG3T DIOTI EG66 DI046 17 21 EG49 DIO29 R95 SEG31 DIO11 5 IDOT ON 18 17 8A 8B 8C 8DP MO SEG32 DIO12 10K SEG34 DIO14 25 EG35 DIO15 COMO SEG35 DIO15 73 EG64 DIO44 GND VIM 828 DP U7 GND SEG64 DIO44 13 EG37IDIO17 NU SEG37 DIO17 5 EG66 DIO46 SEG66 DIO46 24 EG49 DIO29 SEG49 DIO29 47 EG48 DIO28 SEG48 DIO28 14 COMO COMO T5 OMT COM1 16 OM2
41. PS SEL 0 5VDC EXT SUPPLY J IN VA IN O board supply IN External DC SUPPLY J1 R15 R16 R17 R18 P 2M 1 1W 274K 196 270K 190 698 1 600 OHM R33 NC 750 1 NC R88 NEUTRAL C13 0 1uF RV2 y J5 BE VARISTOR R27 R26 R23 R22 T GND 2M 1 1W 274K 1 270K 1 698 1 VB IN VB 600 OHM 100 2W R33 C12 750 196 1000pF C13 600 OHM 1000pF lee Type Only one shunt can be used at a time R24 10KOhm and R25 NC when using current shunt for channel A TE L7 600 OHM R24 R25 3 40hm when using CT for channel A IA IN 2 3 J3 ND v C16 C15 1000pF 1000pF CURRENT 1206 PACKAGE CONNECTIONS L4 600 OHM L5 600 OHM IB IN i IB IN 2 3 J16 C21 1000pF 1000pF STAR CON AT U5 50 TERIDIAN SEMICONDUCTOR CORP TP3 gt gt V3P3 R83 16 9K 1 R86 20 0K 196 C22 10uF 6 3V Y1 C25 32 768kHz GND XIN 62 U8A 6531 68QFN TERIDIAN SEMICONDUCTOR CORP Size Document Number Custpm D6531N12A2 Date Tuesday December 18 2007 Figure 4 2 71M6531N12A2 Demo Board REV 2 0 Electrical Schematic 2 3 CT Configuration v1 5 O 2007 2008 TERIDIAN Semiconductor Corporation Page 67 of 83 TERIDIAN SEMICONDUCTOR CORP 71M6531 Demo Board User s Manual VBAT V3P3 V3P3 gt 3 1 YOLVINWA 44 39 SEG24 D1004 6 CE Connector SEGUE 40 SED 4 I 1 15 R156 41 42 PP AM
42. R18 2M 1 1W 274K 1 270K 1 698 196 L2 600 OHM R32 0 750 1 C22 10uF 6 3V TANTALUM STAR CONNECTION AT U5 50 NEUTRAL C27 NC 0 1uF RV2 A V3P3 J5 T VARISTOR R27 R26 R28 R22 13 GND 2M 1 1W 274K 196 270K 1 698 1 0 VB IN e H VB IN 600 OHM ji 100 2W R33 C12 750 196 1000pF C13 600 OHM 1000pF ov is om Only one shunt can be used at a time R24 10KOhm and R25 NC when using current shunt for channel A L7 600 OHM ES IA IN IA IN R24 R25 3 4Ohm when using CT for channel A IA IN yi IA IN E cos LL 327682 J3 GND XIN 62 ND 4 C16 C15 220pF 220pF U8A 6531 68QFN SERE 1206 PACKAGE CONNECTIONS 7 GND L4 600 OHM IVA L5 600 OHM IB IN IB IN 2 3 TERIDIAN SEMICONDUCTOR CORP J16 C18 C21 1000pF 1000pF riday December 14 2007 0 Figure 4 1 71M6531N12A2 Demo Board REV 2 0 Electrical Schematic 1 3 Shunt Configuration Page 66 of 83 2007 2008 TERIDIAN Semiconductor Corporation gt V3P3 v1 5 71M6531 Demo Board User s Manual TP15 Te 9 Be C14 1000pF dE NEUTRAL NC NEUTRAL 6000 C32 0 03uF 250VDC c1 C10 D3 2200uF 16V 1000pF RVI A 1N4736A VARISTOR 6 8V 1W AVX VE24M00511K GND R8 D8 15 C6 3301D 0 47uF 1000VDC D4 VOLTAGE Ge 1N4148 CONNECTION GND 600 OHM R6 2 1206 PACKAGE MA R118 OO 100 2W 100 2W 4 R9 J1 2 68 1 POWER SUPPLY SELECTION TABLE RAPC712 3 SELECTION PS SEL 0 JP1 JP1 J4 LIVE
43. TERIDIAN Semiconductor Corporation v1 5 d jTERIDIAN bits IThrshldA Starting current element A Configure meter operation on the fly 0 in this position disables creep JO U 32 0x0000 logic for both element A and B bit 0 reserved 1 N A 0x0004 0 VA Vrms Irms 1 VA VWh VARI bit1 1 2 Clears accumulators bit2 1 Calibration mode bit3 reserved 1 enable tamper detection bit 5 1 battery modes enabled Y Cal DegO RTC adjust provided 100ppb 4 S 16 0x000D for optional code Y Cal Degl RTC adjust linear by 10ppb AT in 0 1 C temp 1ppb AT in 0 1 C Y Cal Deg2 PulseWSource PulseVSource v1 5 by temp Wh Pulse source VARh pulse source selection Scaling Maximum Voltage for PCB equivalent to 176mV at the VA VB pins Scaling maximum current for element A equivalent to 176mV at the lA pin ppmcl ADC linear adjust PPM per degree centigrade with temperature ppmc2 ADC quadratic adjust PPM per degree centigrade with temperature squared Pulse 3 source Source for software See table for PulseWSource and pulse output 3 PulseVSource Pulse 4 source Source for software See table for PulseWSource and pulse output 4 PulseVSource Duration for auto calibration in seconds Voltage value to be used for auto calibration RTC adjust squared 15 See table for PulseWSource and PulseVSource kb N 0 MA 0x0011 U 0x0013 HEN U
44. TION SHOULD BE TAKEN WHEN HANDLING THE DEMO BOARD ONCE IT IS CONNECTED TO LIVE VOLTAGES THE DEMO SYSTEM IS ESD SENSITIVE ESD PRECAUTIONS SHOULD BE TAKEN WHEN HANDLING THE DEMO BOARD DEMO KIT CONTENTS e 71M6531 Demo Board containing 71M6531D F IC with preloaded Demo Program and prepared for either CT or shunt resistor operation e Debug Board e Shunt resistor with wire harness 40010 for kits shipped in shunt configuration e Two 5VDC 1 000mA universal wall transformers wl 2 5mm plug Switchcraft 712A e Serial cable DB9 Male Female 2m length Digi Key AE1379 ND e CD ROM containing documentation data sheet board schematics BOM layout Demo Code and utilities Note The CD ROM contains a file named readme txt that specifies all files found on the media and their purpose 2007 2008 TERIDIAN Semiconductor Corporation Page 9 of 83 71M6531 Demo Board User s Manual 7 SEMICONDUCTOR CORP 1 4 COMPATIBILITY This manual applies to the following hardware and software revisions e 71M6531D F chip revision A03 e Demo Boards D6531N12A2 Demo Board Code revision 6531 4p6q 12may08 Occ hex 6531 4p6q 12may08 Osc hex EQU 0 6531 4p6q 12may08 1cc hex EQU 1 6531 4p6q 12may08 2cc hex EQU 2 or later 1 5 SUGGESTED EQUIPMENT NOT INCLUDED For functional demonstration e PC w MS Windows versions XP ME or 2000 equipped with RS232 port COM port via DB9 connector One or two current transformers CTs preferably
45. The RESET button can be enabled by removing R91 Selector for ICE regular operation Jumper 1 2 regular operation default E ENARE Jumper 2 3 ICE operation Remove this jumper for brownout current measurements A mermo cane E lun 24 J2 DEBUG Connector for plugging in the Debug Board either directly or via a flat ribbon cable An emulator or flash programmer can be connected to this 6 pin 22 J15 header For production units this would be a more economical alternative to J14 23 SW2 Pushbutton used to wake up the chip when in sleep or LCD mode This button can also be used in Mission Mode to cycle the display 2x10 male header with 0 05 pitch on the back side of the board The connector of the Signum ADM51 emulator or TFP 2 ove Ee programmer can be plugged into J14 Alternatively J15 can be used 2 pin header representing the V1 comparator voltage input test 25 TP10 V1 V3P3 point and ground A jumper should be placed between V1 and V3P3 to disable the watchdog timer Table 3 2 71M6531 Demo Board description 2 3 Page 60 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 GATERIDIAN l 3 1 y 26 TP4 lA V3P3 2 pin header test point Pin 1 is the IA input to the IC and pin 2 is V3P3 TP49 IB V3P3 2 pin test point Pin 1 is the IB input to the IC and pin 2 is the V3P3 reference 3 pin header on the bottom of the board for connection of the CT for phase A Pin 3 may be used to ground an optio
46. VA 16384 Wh CAL_IA VAh applied CAL VA measured The derivation of these formulae is shown in the Appendix CALIBRATION PROCEDURES GENERAL PRECAUTIONS Calibration requires that a calibration system is used i e equipment that applies accurate voltage load current and load angle to the unit being calibrated while measuring the response from the unit being calibrated in a repeatable way By repeatable we mean that the calibration system is synchronized to the meter being calibrated Best results are achieved when the first pulse from the meter opens the measurement window of the calibration system This mode of operation is opposed to a calibrator that opens the measurement window at random time and that therefore may or may not catch certain pulses emitted by the meter Note It is essential for a valid meter calibration to have the voltage stabilized a few seconds before the current is applied This enables the Demo Code to initialize the 71M6531D F and to stabilize the PLLs and filters in the CE This method of operation is consistent with meter applications in the field as well as with metering standards Each meter phase must be calibrated individually The procedures below show how to calibrate a meter phase with either three or five measurements The PHADJ equations apply only when a current transformer is used for the phase in question Note that positive load angles correspond to lagging current see Figure 2 2
47. Writes two words starting 0x04 MPU or XDATA space is the address range for the MPU XRAM 0x0000 to OxOFFF All MPU data words are in 4 byte 32 bit format Typing JA will access the 32 bit word located at the byte address 4 ee A 0x28 The energy accumulation registers of the Demo Code can be accessed by typing two question marks 77 O 2007 2008 TERIDIAN Semiconductor Corporation Page 17 of 83 d MEANS 71M6531 Demo Board User s Manual SEMICONDUCTOR CORP Commands for l O RAM Configuration RAM and SFR Control Allows the user to read from and write to I O RAM and special function registers SFRs R option register option Command RIx Select I O RAM location x 0x2000 offset is automati combinations cally added Rx Rn SeecinemaSFRsiadMes x frem ResicmsecweSFRregsemindedmal R 8 Reaicowecwiveregstes in hex notation DIO or Configuration RAM space is the address range 0x2000 to Ox20FF This RAM contains Ed registers used for configuring basic hardware and functional properties of the 71M6531D F and is organized in bytes 8 bits The 0x2000 offset is automatically added when the command RI is typed The SFRs special function registers are located in internal RAM of the 80515 core starting at address 0x80 Commands for EEPROM Control Allows user to enable read and write to EEPROM EE option arguments OOOO O O Command EECn EEPROM Access 1 gt Enable 0 gt D
48. al checksums over the two sets of energy billing data are bad GNDNEUTRAL This bit indicates that a grounded neutral was detected TAMPER This bit indicates that a tampering attempt was detected compilation option not supported on standard Demo Board VXEDGE Copy of the CE MAIN EDGE bit PB PRESS An activation of the pushbutton was recorded at the most recent reset or wake from battery mode H d VI WAKE ALARM An wake timer flag was recorded at the most recent wake from battery mode co MINVB Voltage at element B is below VThrshld The element is in creep mode MAXVA Voltage at element A is above VThrshldP MAXVB Voltage at element B is above VThrshldP us Voltage at element A is below VThrshld The element is in creep mode WD DETECT The most recent reset was caused by the WDT AA MAXIA The current in element A is above IThrshld m MAXIB The current in element B is above IThrshld KE Je o O DS MINT The temperature is below the minimum as SAGA Copy of the CE SAG A bit w a maximum delay of 8 sample intervals SAGB Copy of the CE SAG B bit FO CE Acopy of the FO bit of the CE with a jitter of up to 8 sample intervals defined in option gbl h MAXT The temperature is above the maximum as defined in option gbl h ONE SEC This bit changes every accumulation interval 16 a 06 Table 1 14 STATUS register Page 40 of 83 2007 2008 TERIDIAN Semiconductor
49. asurements Therefore it is recommended to adjust the RTC before calibrating a meter e Digital rate adjustment is used to dynamically correct the oscillator rate under MPU control This is necessary when the IC is at temperatures other than room temperature to correct for frequency deviations The analog rate adjustment uses the I O RAM register RTCA_ADJ 6 0 which trims the crystal load capaci tance Setting RTCA_ADJ 6 0 to 00 minimizes the load capacitance maximizing the oscillator frequency Setting RTCA_ADJ 6 0 to 3F maximizes the load capacitance minimizing the oscillator frequency The maximum adjustment is approximately 60ppm The precise amount of adjustment will depend on the crystal and on the PCB properties The adjustment may occur at any time and the resulting clock frequency can be measured over a one second interval using a frequency counter connected to the TMUXOUT pin while 0x10 or 0x11 is selected for the I O RAM register TMUX 4 0 Selecting 0x10 will generate a 1 second output selecting Ox11 will generate a 4 second output The 4 second output is useful to adjust the oscillator at high accuracy It is also possible to set TMUX 4 0 to Ox1D to generate a 32 768kHz output The adjustment of the oscillator frequency using RTCA ADJ 6 0 at room temperature will cause the 71M6534 IC to maintain the adjusted frequency The digital rate adjustment can be used to adjust the clock rate up to 988ppm with a resolution of 3 8ppm
50. ated will be based on the parameters entered for channel A Calibration for CT Channel B 1 Compute MAX for the CT channel MAX CT based on the CT turns ratio N and the termination resistor value Rr using the formula IMAX_CT 176 8mV N Rr This value is used in the following step as IMAX_CT Compute WRATE_CT based on the values obtained for MAX CT and the formula given in 1 8 3 WRATE CT IMAX CT VMAX 47 1132 Kh In 8 Nacc X Update the WRATE register CE address Ox2D with WRATE CT using the command 21 WRATE CT Enter the command gt 7 2 Configure WISUM as external pulse source since the CT is connected to channel 1 for VA IB Test for accuracy at 15A 240V at phase angle 0 phase angle 60 and at phase angle 60 Apply these values to the calibration spread sheet revision 2 0 or later and derive the calibration factor PHADJ B Update only the CE address OxOF with the value for PHADJ B using the command 19 PHADJ B Adjust CAL IB for the total error found in the accuracy test using the formula CAL IB 16384 1 error 100 2007 2008 TERIDIAN Semiconductor Corporation Page 53 of 83 d MEL 71M6531 Demo Board User s Manual SEMICONDUCTOR CORP That is if the chip reports an error of 2 5 CAL IB should be adjusted to a value of 16384 1 2 5 100 9 Since CAL VA and CAL IA have already been adjusted for channel A these registers should not be updated 10 Ret
51. ce or current transformers CTs It is programmable for a Kh factor of 1 0 and see Section O for adjusting the Demo Board for current transformers Section 1 8 6 describes proper wiring and safety precautions for shunt operation Once voltage is applied and load current is flowing the red LED D5 will flash each time an energy sum of 1 0 Wh is collected The LCD display will show the accumulated energy in Wh when set to display mode 3 command gt M3 via the serial interface Similarly the red LED D6 will flash each time an energy sum of 1 0 VARh is collected The LCD display will show the accumulated energy in VARh when set to display mode 5 command MS via the serial interface The D6531N12A2 Demo Boards can be operated with CTs on channel B which is equipped with the proper burden resistors for 2000 1 CTs 2007 2008 TERIDIAN Semiconductor Corporation Page 25 of 83 d ME 71M6531 Demo Board User s Manual SEMICONDUCTOR CORP 1 8 3 If desired channel A can be modified for operation with a 2000 1 CT as follows 1 Remove R24 and R25 Insert a 1 70 resistor each for R24 and for R25 2 Connect the output of the CT to terminal J3 on the bottom of the board 3 Using the command line interface change JMAXA to decimal 2080 gt A2 42080 and WRATE to 1556 5121241556 4 Remove R88 install L12 and L9 Using the command line interface change JMAXA and WRATE by sending the text file as described in 1 8 1 Of course othe
52. ch could occur when main power SG is removed from the Demo Board while no battery is present the Demo Code is shipped E with the battery modes DISABLED When the battery modes are disabled the MPU will be halted once it enters brownout mode even when a battery is present See section 1 10 2 for instruction on how to enable battery modes If the main power source internal or external power supply is removed while a battery is connected to JP8 as described above and if the battery modes are enabled with header JP12 the 71M6531D F automatically enters Brownout mode The Demo Code will then automatically transition from Brownout mode to Sleep mode By pressing the pushbutton PB the chip is temporarily brought back to LCD mode After a few seconds in LCD mode the chip returns to Sleep mode By pressing the RESET pushbutton while the chip is in Sleep mode the chip will enter Brownout mode S Both the RESET and PB buttons are powered by the battery voltage VBAT N In Brownout mode the analog functions are disabled and the MPU functions at very low speed DIO pins and the UART are still functional If the chip supports the command line interface it will signal Brownout Page 24 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 1 8 1 8 1 1 8 2 v1 5 d jTERIDIAN mode and the command prompt B will be visible on the terminal connected to the Demo Board followed by the gt sign B Th
53. complete description of the CLI is provided in section 1 7 2 CYCLING THE LCD DISPLAY The Demo Codes for the 71M6531 Demo Board allow cycling of the display using the PB button By briefly pressing the button the next available parameter from Table 1 5 is selected This makes it easy to navigate various displays for Demo Boards that do not have the CLI 2007 2008 TERIDIAN Semiconductor Corporation Page 15 of 83 d ML 71M6531 Demo Board User s Manual SEMICONDUCTOR CORP Text Display Displayed Parameter uh BED bw Accumulated real energy Wh The default display setting after power up or reset Accumulated reactive energy VARh Date Date yyyy mm dd A Lo M RN A Pass DI RMS current at phase A input A NAN v eee WM Kd LA Bat Y Measured battery voltage V Delta T Temperature difference from calibration temperature Displayed in 0 1 C Table 1 5 Selectable Display Options 1 7 2 SERIAL COMMAND LINE INTERFACE CLI Once communication to the Demo Board is established press CR and the Demo Program prompt gt should appear Type gt i to verify that the Demo Program version is revision 4p6q or later Users should familiarize themselves with the Demo Program commands described in the tables below The Demo Program Demo Code is compiled with EEPROM specified as the non volatile memory This means that the default calibration factors are stored in flash memory while the calibration factors re
54. conductor Corporation Page 83 of 83 Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery amp Lifecycle Information Maxim Integrated 71M6531F DB
55. d using serial command CEO or writing 0x00 to I O RAM cell 0x2000 For details on code development and test see the Software User s Guide SUG The emulator can also be operated when the 71M6531D F is in brownout mode In brownout mode the 71M6531D F provides power for the pull up resistors necessary for emulator operation via its V3P3D pin Emulators or other test equipment should never be connected to a live meter without proper isolation USB isolators are available from various vendors see the printed Safety Notice shipped with the emulator v1 5 O 2007 2008 TERIDIAN Semiconductor Corporation Page 41 of 83 ES EE Page 42 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 2 1 1 v1 5 d jTERIDIAN APPLICATION INFORMATION CALIBRATION THEORY A typical meter has phase and gain errors as shown by os Axi and Aw in Figure 2 1 Following the typical meter convention of current phase being in the lag direction the small amount of phase lead in a typical current sensor is represented as s The errors shown in Figure 2 1 represent the sum of all gain and phase errors They include errors in voltage attenuators current sensors and in ADC gains In other words no errors are made in the input or meter boxes INPUT ERRORS METER Wes NM E lems 0 gt ds PP Ax gt IDEAL I ACTUAL I Ay is phase lag s is phase lead A w IDEAL IV cos
56. d and set the real time clock RT option value waw Command RTDy m d w Day of week year month day weekday 1 Sunday Weekday is combinations automatically set if omitted RR ReRedTmeOk frrmms meore n min se frrast frealtmeAdust speed vim Reset Commands Allows the user to cause soft or watchdog resets The Z command acts like a hardware reset The energy accumulators in XRAM will retain their values Commands for Controlling the LCD and Sleep Modes when in Brownout Mode E Description A m POWER MODE CONTROL Remarks iption llows the user switch to LCD and Sleep mode when the 71M6531D F is in Brownout ode B option vau Command BL Enters LCD mode combinations BS Enters Sleep mode BWSn Prepares Sleep mode with the wakeup timer set to n seconds BWMm Prepares Sleep mode with the wakeup timer set to m minutes Example BWS8 Enters Sleep mode with the wakeup timer set to 8 BS seconds The 71M6531D F will enter Sleep mode and return to Brownout mode after 8 seconds 2007 2008 TERIDIAN Semiconductor Corporation Page 21 of 83 d TERMDOAN 71M6531 Demo Board User s Manual SEMICONDUCTOR CORP Commands for Error Recording Description Allows the user display and clear the error log Usage ER pln ate SS Command ERC Clears all errors from error log combinations ERD Displays error log ERS 10 Enters error number 10 in error log 1 7 3 COMMUNICATING VIA INTEL HEX RECORDS
57. d merge program updates the 6531 demo hex file with the values contained in the macro file This program is executed from a DOS command line window Executing the d merge program with no arguments will display the syntax description To merge macro txt and old 6531 demo hex into new 6531 demo hex use the command d merge old 6531 demo hex macro txt new 6531 demo hex The new hex file can be written to the 71M6531D F through the ICE port using the ADM51 in circuit emulator This step makes the calibration to the meter permanent Page 30 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 1 9 3 1 9 4 1 9 5 v1 5 d jTERIDIAN CALIBRATION MACRO FILE The macro file in Figure 1 8 contains a sequence of commands to be used for Demo Boards that provide a serial command line interface CLI It is a simple text file and can be created with Notepad or an equivalent ASCII editor program The file is executed with HyperTerminal s Transfer gt Send Text File command 10 16022 CAL LA 11 16381 CAL VA 12 16019 CAL IB gain CAL 1B 16384 13 16370 CAL VB gain CAL VB 16384 1824115 PHADJ A default 0 19 113 PHADJ B default 0 cel gain CAL IA 16384 gain CAL VA 16384 Figure 1 8 Typical Calibration Macro file It is possible to send the calibration macro file to the 71M6531D F for temporary calibration This will temporarily change the CE data values Upon power up these values are
58. description of new YPULSE functionality and list of CE locations for Demo Code revision 4p6 Corrected description of JU command added 1 4 01 28 2008 description of CLS command Updated kit contents shunt resistor for shunt configuration only Added safety notes for emulator operation in section 1 9 5 and to section 1 11 Updated references to latest Demo Code revision Deleted application 1 5 06 02 2008 circuit diagrams shown in data sheet and CE address tables Updated pin out diagram top view User Manual This User Manual contains proprietary product definition information of TERIDIAN Semiconductor Corporation TSC and is made available for informational purposes only TERIDIAN assumes no obligation regarding future manufacture unless agreed to in writing If and when manufactured and sold this product is sold subject to the terms and conditions of sale supplied at the time of order acknowledgment including those pertaining to warranty patent infringement and limitation of liability TERIDIAN Semiconductor Corporation TSC reserves the right to make changes in specifications at any time without notice Accordingly the reader is cautioned to verify that a data sheet is current before placing orders TSC assumes no liability for applications assistance TERIDIAN Semiconductor Corp 6440 Oak Canyon Rd Suite 100 Irvine CA 92618 5201 TEL 714 508 8800 FAX 714 508 8877 http www teridian com V1 5 2007 2008 TERIDIAN Semi
59. dors see the printed Safety Notice shipped with the emulator 1 9 6 THE PROGRAMMING INTERFACE OF THE 71M6531D F TFP 2 and ICE Interface Signals The signals listed in Table 1 11 are necessary for communication between the Flash Programmer or ICE and the 71M6531D F Signal E TCLK Output from Data clock ICE TFP 2 71M6531D F E RXTX Bi directional Data input output ICE TFP 2 E RST Bi directional Flash Downloader Reset ICE TFP 2 active low ICE ENA Input of 71M6531D F Enables ICE interface TFP 2 Table 1 11 Flash Programming Interface Signals The E RST signal should only be driven by the ICE or Flash Downloader when enabling the ICE interface E RST must be floating at all other times The same hardware and software precautions mentioned for emulator ICE operation in section 1 11 apply to Flash Programmer operation v1 5 O 2007 2008 TERIDIAN Semiconductor Corporation Page 33 of 83 d MIL 71M6531 Demo Board User s Manual SEMICONDUCTOR CORP 1 10 DEMO CODE 1 10 1 DEMO CODE DESCRIPTION The Demo Board is shipped preloaded with Demo Code revision 4p6q or later in the 71M6531D F chip The code revision can easily be verified by entering the command gt i via the serial interface see section 1 7 2 Check with your local TERIDIAN representative or FAE for the latest revision Firmware for the Demo Boards can be updated using either an in circuit emulator ICE or the Flash Programmer TFP 2 as described in secti
60. e LCD displays a decimal dot in the left most digit to indicate that it is in Brownout mode as shown below JAP ETE LO The following commands can be entered via the CLI in Brownout mode e BL enters LCD mode e BS enters Sleep mode e BWSn enters sleep mode for n seconds then returns to Brownout mode e BWMm enters sleep mode for m minutes then returns to Brownout mode In Sleep Mode almost all functions are disabled Only the RTC and the wakeup timer are still active The wakeup signal from the timer and the pushbutton SW2 on the Demo Board take the 71M6531D F back to Brownout mode A hardware reset while in any battery mode takes the 71M6531D F back to Brownout mode USING THE DEMO BOARD FOR METERING FUNCTIONS MODIFYING DEMO CODE TO CT OR SHUNT MODE Script files contained in the CD ROM shipped with the Demo Kit can be used to modify the constants used in the Demo Code from CT to shunt mode or vice versa Three script files are available 1 6531ctct txt sets 6531 Demo Code for IA 2000 1 CT Imax 208A and IB 2000 1 CT ImaxB 208A 2 653lctshunt txt IA 2000 1 CT Imax 208A IB 400 uQ shunt ImaxB 442A 3 6531shuntct txt IA 400 uQ shunt Imax 442A IB 2000 1 CT ImaxB 208A To apply a script file select transfer gt send text file from the HyperTerminal user interface USING THE DEMO BOARD IN SHUNT AND CT MODES The Demo Board may be used with current shunt sensors of 40010 resistan
61. e most recent time Year the RTC was read Difference between Same units as TEMP RAW raw temperature and temp nom Last measured n battery voltage VBAT FO ADC counts logically shifted right by 9 bits Note battery voltage is measured once per day except when it is being displayed or requested with the BT command 2007 2008 TERIDIAN Semiconductor Corporation d jTERIDIAN SEH U U U L in bits 16 O O QD N O 32 32 2 32 32 XDATA 0x0023 0x0025 0x0029 0x002B 0x002F 0x0031 0x0035 0x0039 0x017A 0x017B 0x017C 0x017D 0x017E 0x017F 0x0180 0x003C 0x0040 0x0044 Vrms A Irms A Vrms B Irms B Vrms_C Irms C STATUS CAI Whi Whi A Whi B Whi C VARhi VARhi A VARhi B VARhi C VAh VAh_A VAh_B VAh_C Whe Whe A Whe B Whe C Function or LSB Value CLI Vrms element A 2 Irms element A 2 2 Vrms element B 6 VISOSUM 26 Irms element B 2 9 NSOSUM 27 tesem Re ewe pe Status of meter See table for STATUS register GA Count of accumula count 2B tion intervals since reset or last clear Imported Wh all Same LSB as WOSUM 2C elements Imported Wh 2E element A Imported Wh 30 element B tesem a Imported VARRh all LSB of WOSUM 34 elements Imported VARh 36 element A Imported VARh 38 element B mew 15 VAh all elements LSB of WOSUM LC eve
62. e resolution CORRECTION ppm Example For a crystal the deviations from nominal frequency are curve fitted to yield the coefficients a 10 89 b 0 122 and c 0 00714 The coefficients for the Demo Code then become after rounding since the Demo Code accepts only integers Y CAL 109 Y CALC 12 Y CALC2 7 TESTING THE DEMO BOARD This section will explain how the 71M6531D F IC and the peripherals can be tested Hints given in this section will help evaluating the features of the Demo Board and understanding the IC and its peripherals FUNCTIONAL METER TEST This is the test that every Demo Board has to pass before being integrated into a Demo Kit Before going into the functional meter test the Demo Board has already passed a series of bench top tests but the functional meter test is the first test that applies realistic high voltages and current signals from current transformers to the Demo Board Figure 2 8 shows a meter connected to a typical calibration system The calibrator supplies calibrated voltage and current signals to the meter It should be noted that the current flows through the CT or CTs that are not part of the Demo Board The Demo Board rather receives the voltage output signals from the CT An optical pickup senses the pulses emitted by the meter and reports them to the calibrator some calibration systems have electrical pickups The calibrator measures the time between the pulses and compares it to
63. ebug Board Bill of Material rrannrnrnnrrrnrnnnrrrrnnnrnrnnnrrnrnnnrnnnnnnrnrnnnrrnrnnnsnnnnsnrnnnnnsnnnnnnnsnnnnsernnnnnsnnnnsensnnnee 75 TaDle4 9 1M5531 Pin descripto 1 Zion caninos nostro aa bU aab aa a aa aa aa bid 80 Table 4 4 71M6531 Pin description 27 82 V1 5 2007 2008 TERIDIAN Semiconductor Corporation Page 7 of 83 ES EE Page 8 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 1 2 1 3 v1 5 d JTERIDIAN GETTING STARTED GENERAL The TERIDIAN Semiconductor Corporation TSC 71M6531 Demo Board is an energy meter IC demonstra tion board for evaluating the 71M6531D F device for residential electronic energy metering applications It incorporates a 71M6531D F integrated circuit peripheral circuitry such as a serial EEPROM emulator port and on board power supply as well as a companion Debug Board that allows a connection to a PC through a RS232 port The Demo Board allows the evaluation of the 71M6531D F energy meter controller chip for measurement accuracy and overall system use The board is pre programmed with a Demo Program file name 6531 demo hex in the FLASH memory of the 71M6531D F IC This embedded application is developed to exercise all low level functions to directly manage the peripherals and CPU clock timing power savings etc SAFETY AND ESD NOTES Connecting live voltages to the Demo Board system will result in potentially hazardous voltages on the Demo Board EXTREME CAU
64. est for accuracy at several currents and phase angles After completing the calibration the energy values WOSUM based on VA IA and W SUM based on VA IB are accessible to the MPU firmware The pulse rate is controlled by W SUM and determined by the parameters selected for the CT channel VA IB Differences between WOSUM and WISUM indicating tampering can be detected by the MPU for each accumulation interval Note The user has to customize the Demo Code to utilize the values obtained from the VA IA and IB channels for proper calculation of tariffs Table 2 1 summarizes the important parameters used in the calibration procedure Channel Sensor Parameters W Pulse VAR Pulse Generation Generation Shunt WASUM VA IA VMAX VMAX WASUM VARASUM Resistor VARASUM VA A IMAX IMAX SHUNT WRATE WRATE_SHUNT WBSUM VA IB VMAX VMAX WBSUM VARBSUM VARBSUM VA IB IMAX IMAX CT WRATE WRATE_CT Table 2 1 Calibration Summary 2 3 CALIBRATING AND COMPENSATING THE RTC The real time clock RTC of the 71M6534 is controlled by the crystal oscillator and thus only as accurate as the oscillator The 71M6534 has two rate adjustment mechanisms e Analog rate adjustment using the I O RAM register RTCA_ADJ 6 0 This adjustment is used to set the oscillator frequency at room temperature close to the target ideal value Adjusting RTCA_ADJ 6 0 will change the time base used for energy measurements and thus slightly influence these energy me
65. gramming connectors e g a 6x1 header Programming of the flash memory requires a specific in circuit emulator the ADM51 by Signum Systems http www signumsystems com or the Flash Programmer TFP 2 provided by TERIDIAN Semiconductor Chips may also be programmed before they are soldered to the board The TGP1 gang programmer suitable for high volume production is available from TERIDIAN In Circuit Emulator If firmware exists in the 71M6531D F flash memory this memory has to be erased before loading a new file into memory Figure 1 9 and Figure 1 10 show the emulator software active In order to erase the flash memory the RESET button of the emulator software graphical interface has to be clicked followed by the ERASE button Figure 1 9 Once the flash memory is erased the new file can be loaded using the commands File followed by Load The dialog box shown in Figure 1 10 will then appear making it possible to select the file to be loaded by clicking the Browse button Once the file is selected pressing the OK button will load the file into the flash memory of the 71M6531D F IC 2007 2008 TERIDIAN Semiconductor Corporation Page 31 of 83 71M6531 Demo Board User s Manual At this point the emulator probe cable can be removed Once the 71M6531D F IC is reset using the reset button on the Demo Board the new code starts executing Signum Systems Wemu51 ADM51 Emulator test File Edit View Debug Project Program
66. ick on yellow field to select from pull down i PHASEA Tee Energy reading at 0 m 10564 Energy reading at 60 E 16384 16384 Energy reading at 60 E 0 Energy reading at 180 Voltage error at 0 Current lags voltage eg inductive Positive direction 60 Current um 16364 E Energy reading at 60 CAL VB 16384 16384 icc Energy reading at 60 PHADJ B 0 capacitive Energy reading at 180 Voltage error at 0 e D Voltage aii Generating Energy Using Energy Energy reading at 0 TET Energy reading at 60 CAL VC 16384 16384 Energy reading at 60 PHADJ C 0 Readings Enter 0 if the error is 0 Energy reading at 180 enter 5 if meter runs 5 fast Voltage error at 0 enter 3 if meter runs 3 slow Meter Inputs Constants Procedure SUM CYCLES Current A 0 408 Fs 2520 6154 1 Turn on excitation Load angle must be exactly 0 00 degrees PRE SUM Voltage V 223 4 Wh ALSB 8 3556E 08 2 CE1 Enable CE wait 2 seconds VMAX f Hz 60 VRMS LSB 4 49525E 07 3 1 2 Clear accumulators wait 30 seconds IMAX A CE LSB 6 6952E 13 4 CEO Disable CE IMAX B Wh BLSB 8 3556E 08 5 2E number of accumulation intervals enter in spreadsheet 6 14 get VRMS value enter in spreadsheet 7 enter accumulated values in spreadsheet 8 54 get TEMP RAW X from CE write to TEMP NOM i f not starting w fresh calibration factors enter value of current factors VRMS 23 Vrms A in column Old Digi
67. ields REV 4 7 11 18 2005 AC frequency miki 50 ra click on yellow field to select from pull down list PHASE A fraction Energy reading at 0 3 846 0 03846 Results will show in green fields Date CAL IA 16384 16384 16756 16659 Energy reading at 60 3 642 0 03642 Voltage error at 0 1 65 Expected voltage Measured voltage 236 04 PHASE B Energy reading at 0 Energy reading at 60 Voltage error at 0 Expected voltage Measured voltage PHASE C 0 Energy reading at 0 3 8 Energy reading at 60 9 Voltage error at 0 3 8 Expected voltage 240 Measured voltage 230 88 0 0165 fraction fraction 0 038 0 09 0 038 CAL VA PHADJ A CAL IB CAL VB PHADJ B CAL IC CAL VC PHADJ C 16384 16384 16384 16384 220 16384 14895 0 16409 17031 5597 Positive direction E Generating Energy Current lags voltage inductive 60 Current 60 Current leads voltage capacitive EE Voltage Using Energy Readings Enter 0 if the error is 0 enter 3 if meter runs 396 slow Figure 2 3 Calibration Spreadsheet for Three Measurements v1 5 2007 2008 TERIDIAN Semiconductor Corporation Page 49 of 83 d TERIDIAN 71M6531 Demo Board User s Manual SEMICONDUCTOR CORP TERIDIAN HU re Calibration Worksheet SEMICONDUCTOR CORP Enter values in yellow fields REV 4 7 Date 10 25 2005 AC frequency me 60 Jika cl
68. ight to change devices or specifications detailed herein at any time without notice and does not make any commitment to update the information contained herein V1 5 2007 2008 TERIDIAN Semiconductor Corporation Page 3 of 83 71M6531 Demo Board User s Manual Page 4 of 83 2 SEMICONDUCTOR CORP 71M6531 Single Phase Energy Meter IC DEMO BOARD USER S MANUAL O 2007 2008 TERIDIAN Semiconductor Corporation d jTERIDIAN Table of Contents 1 GETTING STARTED fr 9 Tah e E 9 12 SUV and ESD NOIES ee 9 A mm PAP a BAANG A GAE Ba KEN a A aa da Gan GENG kaa 9 LA Cram asas aia n 10 15 Suggested Equipment not Included cicioiiisiicinnis dada 10 L6 D mo Board Test Se E 10 1 6 1 Power Supply Setup MEE 12 162 CABLE for Serial Connection M 13 EOS Checkng NEON 13 1 6 4 Serial Connection Setup for bebe 14 br Usm th Demo BOATNL ce 15 1 7 1 ero AAA cc MH 15 1 7 2 Serial Command Line Interface CIA 16 1 73 Communicating via Intel Hex Records nennen nenne nnne nnne nnne nnn nene nn nnns nen 22 s USING the Battery MOJO RERO Tm 24 1 8 Using the Demo Board for Metering Functions rrnnnvvrnnnnvnnnnnvennnnunnnnnnnennnnnvennnnnevnnnnvennnnnnvnnnnnennnnnvennnnnnunennn 25 1 8 1 Modifying Demo Code to CT or SHUNT Mode
69. isable combinations EERab Read EEPROM at address a for b bytes EE o o feee EeSabe xyz Write characters to buffer sets Write lengh f re Transmit buffer to EEPROM at address eewo Wre vaes to buffer The EEC1 command must be issued before the EEPROM interface can be used The execution of the EEE SN command takes several seconds During this time no other commands can be entered Us Auxiliary Commands Commands amp 3 Typing a comma repeats the command issued from the previous command line This is very helpful when examining the value at a certain address over time such as the XRAM address for the temperature The slash is useful to separate comments from commands when sending macro text files via the serial interface All characters in a line after the slash are ignored Displays the help menu Enables communication via hex records Commands execution of a battery test Page 18 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 71M6531 Demo Board User s Manual 4 SEMICONDUCTOR CORP Commands controlling the CE E m B llows the user to enable and configure the compute engine C option argument Command CEn Compute Engine Enable 1 Enable 0 Disable combinations CTn Select input n for TMUX output pin Enter n in hex notation CRSa b c d Selects CE addresses for RTM output maximum of four Example CEO Disables the CE CTE
70. ither Clock PLL output or LCD segment CKTESTISEG19 CKTESTISEGI9 O 45 driver Can be enabled and disabled by CKOUT EN O ES E TCLK SEG10 o as 2 5 TMUXOUT 4 Digital output test multiplexer Controlled by DMUX 3 0 Multi use pin configurable as either Optical Receive Input or general DIO OPT RX DIO1 When configured as OPT RX this pin receives a signal from an external photo detector used in an IR serial interface If this pin is unused it must be configured as an output or terminated to V3P3D or GNDD nen Popo Multi use pin configurable as either Optical LED Transmit Output WPULSE OPT TX DIO2 UO 3 4 RPULSE or general DIO When configured as OPT TX this pin is capable of directly driving an LED for transmitting data in an IR serial interface Chip reset This input pin is used to reset the chip into a known state For RESET 2 normal operation this pin is pulled low To reset the chip this pin should be pulled high This pin has an internal 30uA nominal current source pull down No external reset circuitry is necessary RX 3 UART input If this pin is unused it must be configured as an output or terminated to V3P3D or GNDD v1 5 O 2007 2008 TERIDIAN Semiconductor Corporation Page 81 of 83 TEST d jTERIDIAN UART output Enables Production Test This pin must be grounded in normal operation Push button input This pin must be at GNDD when not active A rising edge sets the E PB flag It also cau
71. na ae aaa eaaa naen a aana eee 51 2 3 Calibrating and Compensating the RTC sssnsxxxvernnnnnnnnnnnnnnnnnnnnnnnnnennnnnnnnnnnnnennnnnnnnnnnneennnnnnnnnnnnnnnnnnnnnnnnnnnennn 54 24 EE seio ING DEMO BOAT M 55 2 4 1 alae ad MEM 55 24072 FER Ne 56 E GE a KEE 57 2 4 4 Hardware Watchdog TimMer hr I T m T mum 57 AA 57 2 4 6 Supply Current Measurements rrrrannrnnnnrnnanrrrannnnnnnennnnennnnrnrannnnnnnennnnennanennansennnennnnennansnnasennnnnnennnnennnnene 58 2 5 TERIDIAN Application NOTES sasaran eaaa ana aaa aa gana a aa aaa aa aaa aaa aaa ai aa wau ke aa a ga aka a 58 3 HARDWARE DESCRIP TON ionic otio ue quoi ico oo tei ee aaa aga da aa Waa aaa aaa date esse eset oboe aaa iae ceo es 59 3 1 Demo Board Description Jumpers Switches Test Points and Connectors 59 92 Demo Board Hardware petite ege 63 4 APFENDD M e aa 65 4 1 71M6531N12A2 Demo Board Electrical Schematic rrrnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnn 66 4 2 71M6531N12A2 Demo Board Bill of Material rvannxrrnnnnnrnnnnuennnnnnennnnunnnnnnnennnnnnennnnnnennnnvennnnnnennnnnennnnnvennnnnner 69 43 71M6531N1242 Demo Board PCB Kaes 70 44 Debug Board Bill OF Material sasasi satawana adana aa A di 75 45 Deba Board tee 76 46 Debug Board PCB eelere 77
72. nal cable shield In 28 J3 IA IN i l l shunt configuration two wires from the shunt resistor representing the voltage across the shunt are connected to pins 1 and 2 29 J16 3 pin header on the bottom of the board for connection of the CT for phase B Pin 3 may be used to ground an optional cable shield 2 pin header test point Pin 1 is the VB line voltage input to the IC VB IN This is the line voltage input that feeds both the resistor divider leading to the VB pin on the chip The line voltage wire is connected 31 Jo to the spade terminal on the bottom of the board Caution High Voltage Do not touch this pin 5VDC Plug for connection of the external 5 VDC power supply This is the NEUTRAL line voltage input It is connected to the 3 3V 33 J9 NEUTRAL net of the 71M6531D F The neutral wire is connected to the spade terminal on the bottom of the board Table 3 3 71M6531 Demo Board description 3 3 v1 5 2007 2008 TERIDIAN Semiconductor Corporation Page 61 of 83 d GJ Eni DAN 71M6531 Demo Board User s Manual SEMICONDUCTOR CORP n JL Es ps 104 BB varp hLlelxPuLsE IE GND gt 11010000 1M5531 A2 G SN D5531N1242 a Ari ech d 152 VEPSD E KR ES E T de UK IDE_E EO S e YPULSE VARh Wh D Sch Sa fj TERIE IAN o GN SE SEMICONDUCTOR CORR al Er d RBSJERM N Gol ARLE SBIR 18 8 ST SILS NELITRAL
73. nd CAL VC to the XRAM 00 starting at address Ox10 0010 The second command causes the Demo Code to write the data to permanent storage 10 1020 03 FF Causes the Demo Board to display the CE data from address 0x1020 to 0x102F Table 1 8 Hex Record examples 00 0000 01 FF The Demo Board will not echo any inputs from the terminal they screen will stay blank except for the asterisk issued after the user enters lt CR gt lt LF gt It is useful to configure Hyperterminal for auto echo This can be done by selecting Properties from the File menu then clicking on the Settings tab and clicking the ASCII Setup button No ENTER key is necessary at the end of a manually entered record V1 5 2007 2008 TERIDIAN Semiconductor Corporation Page 23 of 83 d GJ ENIDIAN 71M6531 Demo Board User s Manual SEMICONDUCTOR CORP Spaces in between the fields to increase readability as in the example above are ignored by the Demo Boards If a hex record is accepted the Demo Board returns a If the hex record is not accepted the Demo Board sends a and other text depending on the context only the 16KB Demo Code will send text When only a partial record is entered the Demo Board will time out after around 30 seconds and then send lt CR gt lt LF gt A number of pre assembled hex records is supplied with the Demo Code It is easier to send a pre assem bled record using the send text file fea
74. nection ht for HyperTerminal that can be loaded with File Open is also provided with the tools and utilities on the supplied CD ROM COM1 Properties Port Settings Bits per second ES Data bits E Parity None Stop bits Flow control on d ott Restore Default cara mn Figure 1 4 Port Configuration Setup Note Port parameters can only be adjusted when the connection is not active The disconnect button as shown in Figure 1 5 must be clicked in order to disconnect the port Page 14 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 1 7 1 7 1 v1 5 d jTERIDIAN 00000000 00000000 00069C2F UU E 3602D93E 207463CB 1770 SE 0520 BB 0000 EI 00 DE 054DECBE 3DCC7800 0520 A3 0007D58D Connected 0 22 30 ANSI 9600 7 mn z Figure 1 5 Hyperterminal Sample Window with Disconnect Button USING THE DEMO BOARD The 71M6531 Demo Board is a ready to use meter prepared for use with an external shunt resistor Using the Demo Board involves communicating with the Demo Code An interactive command line interface CLI is available as part of the Demo Code The CLI allows modifications to the metering parameters access to the EEPROM initiation of auto calibration sequences selection of the displayed parameters changing calibration factors and many more operations Before evaluating the 71M6531 Demo Board users should get familiar with the commands and responses of the CLI A
75. new calibration current gain coefficient including compensation for a slight gain increase in the phase calibration circuit CAL p AI o YOD TT Ay 2 7 PHADJQ 2 7 PHADJ 20 2 cosQaf T 1 20 2 cosQzf T 0 2 FAST CALIBRATION The calibration methods described so far require that the calibration system sequentially applies currents at various phase angles A simpler approach is based on the calibration system applying a constant voltage and current at exactly zero degrees phase angle This approach also requires much simpler mathematical operations Before starting the calibration process the voltage and current calibration factors are set to unity 16384 and the phase compensation factors are set to zero During the calibration process the meter measures for a given constant time usually 30 seconds and is then examined for its accumulated Wh and VARh energy values Access to the internal accumulation registers is necessary for this method of calibration The phase angle introduced by the voltage and or current sensors is then simply determined by VARh 9 atan CAL_VA is determined by comparing the applied voltage to the measured voltage or vo CAL_VA 16384 21 measured Page 46 of 83 O 2007 2008 TERIDIAN Semiconductor Corporation v1 5 2 2 2 2 1 v1 5 d jTERIDIAN CAL IA is determined by comparing applied real energy with the measured apparent energy and compensating for the change applied to CAL
76. nrrannrnnnnennanrnrannnnnnnrnnanennanennnnnennusennansnnansennnansnnnnnennunennanennnnsennnee 16 Table 1 6 Fields of a Hex Hecord nn nnnnnn sina sese siseisissa sisse sese sss anan nenen sns 22 Table 1 7 Data command PES Lun anaa asa ag aa EA KA 23 Table 1 8 Hex Record exvamples nennen nnn nnn anana nana anana naa isa ss se sie snas sna rsen ans 23 Table 1 9 Pre assembled hex records aaa eaaa aaa aana ence ee eeee eee acces senes nena nr nn aana nn nsu siena ise sia a sns anser rear s 24 Table 1 10 XRAM Locations for Calibration Constants see a eee eee eee eee aane eea aane anana anna a naen eaaa nean eaaa e eee 30 Table 1 11 Flash Programming Interface Signals eaaa eaaa eaaa eaaa eaaa aana anana anaa Kana Kaanan aaa nana nn nnn nnns 33 Table 1 12 MPU memory locations EE 38 Table 1 13 Values for Pulse Source Registers oooccccococoncconcononoconoccnconononcnconononononrnnononnnnnnnnnnononnnrnnenannncnnaranenonens 39 Table 14S TATUS Tegic lei asustando dl a iio car 40 Table 1 15 MPU Accumulation Output Variables sasana e eaaa eaaa nana eea a aana a anaa a anaa anana anana aane anae a een eee 41 Table 2 1 Calibration Summary 54 Table 3 1 71M6531 Demo Board description 113 59 Table 3 2 71M6531 Demo Board description 213 60 Table 3 3 71M6531 Demo Board description 233 61 Table 4 1 71M6531N12A2 Demo Board Bill of Material Shunt Version 69 Table 4 2 D
77. o nominal i e CAL JA 16384 CAL VA 16384 PHADJA 0 First calculate Axy from Ey t gt Ay E l Calculate Ax from Eo and E40 IV Axy Ay cos 0 2 E 2 Ay Ay cos 1 0 IV cos 0 XV XI Ps IV Ay A cos 180 0 3 E AAA __ 1 A Ay cos 1 180 IV cos 1 80 XV XI Ps 4 Et Lag 255 1 008 0 2 E 4B 42 5 A yy Ay 2 cos Q 63 A E Exe 2 1 Ayy COS Use above results along with Eso and Eoo to calculate os E IV Ay Ay cos 60 9 IV cos 60 A yy Ay COS Ay Ay tan 60 sin I _ IV Ae Ay cos 60 y 1 IV cos 60 A yy Ay COS s Ay Ay tan 60 sin I Subtract 8 from 7 8 BE 9 Es 7 Ex 2Ayy Ay tan 60 sin use equation 5 E E 2 10 Es n TT tan 60 sin cos 2007 2008 TERIDIAN Semiconductor Corporation Page 45 of 83 d MEL 71M6531 Demo Board User s Manual 4 SEMICONDUCTOR CORP 2 1 3 11 Es E E E Es 2 tan 60 tan Eso 7 Es 1232 tan 2 tan 60 E Eig 2 Now that we know the Aw Axi and os errors we calculate the new calibration voltage gain coefficient from the previous ones AL CAL Vg KV We calculate PHADJ from os the desired phase lag tan l 1 27 y 220 2 eosf T PHADJ 2 1 2 sin 2zf T tan fi 1 2 cos 27f T And we calculate the
78. on 1 9 5 The Demo Code is useful due to the following features e t provides basic metering functions such as pulse generation display of accumulated energy frequency date time and enables the user to evaluate the parameters of the metering IC such as accuracy harmonic performance etc e t maintains and provides access to basic household functions such as real time clock RTC e t provides access to control and display functions via the serial interface enabling the user to view and modify a variety of meter parameters such as Kh calibration coefficients temperature compensation etc e t provides libraries for access of low level IC functions to serve as building blocks for code development The Demo Code source files provided with the TERIDIAN Demo Kits contain numerous routines that are not implemented However by recompiling the code using different compile time options many code variations with different features can be generated See the Software User s Guide SUG for a complete description of the Demo Code 1 10 2 ACCESSING LCD AND SLEEP MODES FROM BROWNOUT MODE Header JP12 controls the behavior of the Demo Code when system power is off The setting of JP12 is read on power up or after reset and controls the Demo Code as follows e Jumper across pins 1 2 GND The Demo Code will communicate at 9600bd No transitions to sleep or LCD mode will be made from brownout mode e Jumper across pins 2 3 V3P3 The
79. ons Table 1 3 Null modem cable connections CHECKING OPERATION A few seconds after power up the LCD display on the Demo Board should briefly display the following welcome text H EILILEn After the HELLO text the LCD should display the following information win j o oo A The text Wh indicates that accumulated Watt hours are displayed In the case shown above 0 001 Wh were accumulated The display will be cycling from numeric to text indicating activity of the MPU inside the 71M6531D F and In Mission Mode the display can be cycled to display VARh PF and other parameters by pressing the pushbutton PB 2007 2008 TERIDIAN Semiconductor Corporation Page 13 of 83 d MIL 71M6531 Demo Board User s Manual SEMICONDUCTOR CORP 1 6 4 SERIAL CONNECTION SETUP FOR THE PC After connecting the DB9 serial port to a PC start the HyperTerminal application or any other suitable communication program and create a session using the communication parameters shown in Table 1 4 Dam 3 Stop bits Flow control XON XOFF T depending on the jumper setting at JP12 Table 1 4 COM Port Setup Parameters HyperTerminal can be found by selecting Programs Accessories gt Communications from the Windows start menu The connection parameters are configured by selecting File Properties and then by pressing the Configure button see Figure 1 4 A setup file file name Demo Board Con
80. ork of resistor dividers for voltage measurement mounted on the PCB The resistor values result in a ratio of 1 3 393 933 This means that VMAX equals 276 78mV 3 393 933 600V A large value for VMAX has been selected in order to have headroom for overvoltages This choice need not be of concern since the ADC in the 71M6531D F has enough resolution even when operating at 120Vrms or 240Vrms If a different set of voltage dividers or an external voltage transformer is to be used scaling techniques similar to those applied for the current transformer should be used In the following example we assume that the line voltage is not applied to the resistor divider for VA formed by R15 R21 R26 R31 and R32 but to a voltage transformer with a ratio N of 20 1 followed by a simple resistor divider We also assume that we want to maintain the value for VMAX at 600V to provide headroom for large voltage excursions When applying VMAX at the primary side of the transformer the secondary voltage Vi is Vs VMAX IN Vs is scaled by the resistor divider ratio Rr When the input voltage to the voltage channel of the 71M6531D F is the desired 176 8mV V is then given by Vs Rr 176 8mV Resolving for Rg we get Rr VMAX N 176 8mV 600V 30 176 8mV 170 45 This divider ratio can be implemented for example with a combination of one 16 95kQ and one 100 resistor WIRING OF THE DEMO BOARD AND A SHUNT RESISTOR The 71M6531 Demo Kits are
81. r winding ratios for CTs are possible Adjusting the board to any CT winding ratio is described in 1 8 4 If desired channel A can be modified for operation with a shunt resistor as follows 1 Remove R24 and R25 Insert a 10kO resistor for R24 2 Install R88 remove L12 and L9 3 Connect the shunt resistor wiring harness as shown in Figure 1 7 Using the command line interface change MAXA and WRATE by sending the text file as described in 1 8 1 ADJUSTING THE KH FACTOR FOR THE DEMO BOARD The 71M6531 Demo Board is shipped with a pre programmed scaling factor Kh of 1 0 i e 1 0 Wh per pulse In order to be used with a calibrated load or a meter calibration system the board should be connected to the AC power source using the spade terminals on the bottom of the board The current transformer or shunt resistor should be connected to the dual pin headers on the bottom of the board The Kh value can be derived by reading the values for IMAX and VMAX i e the RMS current and voltage values that correspond to the 250mV maximum input signal to the IC and inserting them in the following equation for Kh Kh IMAX VMAX 47 1132 In 8 WRATE Nacc X 0 99967 Wh pulse Where IMAX is the current scaling factor VMAX is the voltage scaling factor In 8 is the current shunt gain factor WRATE is the CE variable controlling Kh Nacc is the product of the I O RAM registers PRE SAMPS and SUM CYCLES and X is the pulse frequency factor de
82. re applies to the sensor arrangement described above SHUNT lA CT IB Preparation 1 Page 52 of 83 Set the meter equation field of the configuration RAM for EQU to zero using the command RI00 10 i e EQU 0 CE EN 1 TMUX 0 For the sake of calculation individual WRATE parameters for Pulse generation i e WRATE_SHUNT and WRATE_CT will be used It is also necessary to compute and estimate MAX SHUNT and IMAX_CT parameters for meter billing purposes Using MAX SHUNT and VMAX the energy calculations for channel A should be performed The energy calculations for channel B should be performed using MAX CT and VMAX The LSB values for measurements for WOSUM WISUM VAROSUM VARISUM IOSOSUM IISQSUM VOSOSUM should be modified to compute the correct energy values That is IMAX SHUNT and IMAX_CT should be applied separately to individual channels based on the sensor connections Before starting a calibration all calibration factors must be in their default state i e CAL IA 0x10 CAL VA 0x11 CAL IB 0x12 must be 16384 PHADJ A 0x18 and PHADJ B 0x19 should be zero vn S LOAD NEUT CT ET e GRRRRP 71M6531 IB IA VA V3P3 Figure 2 7 71M6531 with Shunt and CT 2007 2008 TERIDIAN Semiconductor Corporation v1 5 v1 5 d jTERIDIAN Calibrating for Shunt Resis
83. reen saanane eaaa anana aaa aana anana aana een 72 Figure 4 7 71M6531N12A2 Demo Board Bottom Copper Layer Bottom View 73 Figure 4 8 71M6531N12A2 Demo Board Bottom Copper Layer Layer View from Top 74 Figure 4 9 Debug Board Electrical Schematic oooccccconcnccnocnnccnnconononnnnonononnnnnrnnononcnnnnnnnnnnnnrnnnnnnrrnnnnnnnnnnnnrnnnnnnnnns 76 Figure 4 10 Debug Board Top View 17 Figure 4 11 Debug Board Bottom KT 17 Figure 4 12 Debug Board Top Signal aver 78 Figure 4 13 Debug Board Middle Layer 1 Ground Plane occcccocccnccoccncccoccnccnncononononnnnonononnncnnnnnnnnnnnnnnnnnonarinonancnns 78 Figure 4 14 Debug Board Middle Layer 2 Supply Plane ooccccooccccccccccnonoccncconconononcnnononononnnrononnnnnnonnncnnnnonarnnonanenns 79 Figure 4 15 Debug Board Bottom Trace aver NEEN 79 Figure 4 16 TERIDIAN 71M6531 LQFP64 Pinout top view 82 List of Tables Table 1 1 Jumper settings on Debug Board ENNEN 13 Table 1 2 Straight cable connections nn nnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnrnnnneninnass 13 Table 1 3 Null modem cable connections ooocccocccocnoccnoconncncnononononocncnonononononnrnnnnnonnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnenaninaninns 13 Table 1 4 COM Port Setup Parameters rrrannrnnnnornannnnnnnnnnnnvnnnnrnnnnnnnnnrnnnnrnnannnnnnnnnnnnennansnnannnnnnnennnnnnnnnnnennansnnnnsnnnnee 14 Table 1 5 Selectable Display Options rarrrrnnnrnnanerran
84. refreshed back to the default values stored in flash memory Thus until the flash memory is updated the macro file must be loaded each time the part is powered up The macro file is run by first issuing the ce command to turn off the compute engine and then sending the file with the transfer send text file procedure Turning off the CE before changing CE constants is not a hardware requirement of the chip but is recommended because of the way the demo code is written Note Do not use the Transfer gt Send File command UPDATING CALIBRATION DATA IN EEPROM OR FLASH It is possible to make data permanent that had been entered temporarily into the XRAM The transfer to EEPROM is done using the following serial interface command gt CLS Thus after transferring calibration data with manual serial interface commands or with a macro file all that has to be done is invoking the CLS command It is also possible to write calibration data to flash memory This is done using the following serial interface command gt U LOADING THE 6531_DEMO HEX FILE INTO THE DEMO BOARD Hardware Interface for Programming The 71M6531D F IC provides an interface for loading code into the internal flash memory This interface consists of the following signals E RXTX data E TCLK clock E RST reset ICE E ICE enable These signals along with V3P3D and GND are available on the emulator header J14 Production meters may be equipped with much simpler pro
85. rived from the CE variables PULSE SLOW and PULSE FAST The small deviation between the adjusted Kh of 0 99967 and the ideal Kh of 1 0 is covered by calibration The default values used for the 71M6531 Demo Board are WRATE 026 IMAX 442 VMAX 600 In 8 1 N ACC 2520 X 6 Explanation of factors used in the Kh calculation WRATE The factor input by the user to determine Kh IMAX The current input scaling factor i e the input current generating 176 8mVrms at the IA IB or IC input pins of the 71M6531D F 176 8mV rms is equivalent to 250mV peak VMAX The voltage input scaling factor i e the voltage generating 176 8mVrms at the VA VB VC input pins of the 71M6531D F In 8 The setting for the additional computational gain 8 or 1 determined by the CE register IA SHUNT Nacc The number of samples per accumulation interval i e PRE_SAMPS SUM_CYCLES X The pulse rate control factor determined by the CE registers PULSE SLOW and PULSE FAST Almost any desired Kh factor can be selected for the Demo Board by resolving the formula for WRATE WRATE IMAX VMAX 47 1132 Kh In 8 Nace X For the Kh of 1 0Wh the value 826 decimal should be entered for WRATE at location 0x21 using the CLI command gt 21 826 Page 26 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 d jTERIDIAN 1 8 4 ADJUSTING THE DEMO BOARDS TO DIFFERENT CT WINDING RATIOS 1 8 5 1 8 6 v1 5 In general when IMAX is applied
86. ses the part to wake up if it is in SLEEP or GNDD SEG9 E RXTX DIO2 OPT TX TMUXOUT SEG66 DIO46 TX SEG3 PCLK V3P3D SEG19 CKTEST V3P3SYS SEGA PSDO SEG5 PCSZ SEG37 DIO17 COMO COM COM2 COM3 0 d OO SS Go h LCD mode PB does not have an internal pull up or pull down Table 4 4 71M6531D F Pin description 2 2 PINOUT QFN 68 a et 200 oe ort S O W Lu O Ooo Ddn5eQ5 ul n duumouzzo meu mamoz NNONNAXEXOO gt gt XID0 gt gt gt 0 TERIDIAN 71M6531D IM ErEEINION Ge Ost s eieiei onoooOoPfugooo0DO EE CORO OOO AM N DONA 0 0 c nan H LUI WW WwW LLI LU LU 0o 00 00 OD NNV LLI ND RESET V2P5 VBAT RX SEG48 DIO28 SEG31 DIO11 SEG30 DIO10 SEG29 DIO9 YPULSE SEG28 DIO8 XPULSE SEG27 DIO7 RPULSE SEG26 DIO6 WPULSE SEG25 DIO5 SDATA SEG24 DIO4 SDCK ICE E SEG18 SEG17 SEG16 Figure 4 16 TERIDIAN 71M6531D F LQFP64 Pinout top view BEEN Page 82 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 d JTERIDIAN 4 8 REVISION HISTORY A aaa 04 13 2007 Initialrelease 02000 0 release 08 28 2007 Updated referenced to LCD and LCD display options Updated Tables 1 12 through 1 14 Added description of macro files for adaptation of Demo Code to shunt CT 1 2 10 30 2007 configurations Updated list of MPU addresses Added chapter for RTC Calibration and compensation 13 12 18 2007 Updated schematics BOM and PCB layout images to Demo Board revision 2 0 Added
87. sulting from an actual calibration are stored in EEPROM The tables below describe the commands in detail Type for a display of available commands Page 16 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 v1 5 d jTERIDIAN Commands for CE Data Access Allows user to read from and write to CE data space Starting CE Data Address option option Command 122 Read consecutive 16 bit words in Decimal combinations 1999 Read consecutive 16 bit words in Hex JU Update default version of CE Data in EEPROM Q Important The CE must be stopped CEO UN before issuing this command 40 Reads CE data words 0x40 0x41 and 0x42 17E 12345678 9876ABCD Writes two words starting Ox7E CE data space is the address range from 0x1000 to Ox13FF All CE data words are in 4 byte 32 bit format The offset of 0x1000 does not have to be entered when using the command thus typing JA will access the 32 bit word located at the byte address 0x1000 4 A 0x1028 Commands for MPU XDATA Access Description Allows user to read from and write to MPU data space Usage Starting MPU Data Address option option Command Read three consecutive 32 bit words in Decimal combinations IECH Read three consecutive 32 bit words in Hex a n m Write the values n and m to two consecutive addresses starting at a Example 08 Reads data words 0x08 OxOC 0x10 0x14 04 12345678 9876ABCD
88. supply for Battery backup and oscillator circuit A battery or super capacitor VBAT 12 is to be connected between VBAT and GNDD If no battery is used connect VBAT to V3P3SYS OE connected to this pin Analog Pins Line Current Sense Inputs These pins are voltage inputs to the internal A D IA IB converter Typically they are connected to the outputs of current sensors Unused pins must be tied to V3P3A Line Voltage Sense Inputs These pins are voltage inputs to the internal A D VA VB converter Typically they are connected to the outputs of resistor dividers Unused pins must be tied to V3P3A If unused VB can also be tied to VA Comparator Input This pin is a voltage input to the internal comparator The voltage applied to the pin is compared to the internal BIAS voltage 1 6V If the input V1 7 voltage is above VBIAS the comparator output will be high 1 If the comparator output is low a voltage fault will occur A series 10kQ resistor should be connected from V1 to the resistor divider VREF O 9 Voltage Reference for the ADC This pin should be left unconnected welt Crystal Inputs A 32kHz crystal should be connected across these pins Typically a 33pF capacitor is also connected from XIN to GNDA and a 7pF capacitor is connected from XOUT to GNDA It is important to minimize the capacitance XOUT between these pins See the crystal manufacturer datasheet for details Pin types P Power O Output Input
89. tal 496461520 Enter values in yellow fields VRMS 223 17 SEMICONDUCTOR CORP Results will show in green fields Phase A net Wh Phase A net VARh 54 55 Total Wh 5A 5B CAL VA 16384 16401 0 10070303 Expected Wh 0 84156 CAL IA 16384 15263 0 4788 E Total VARh 0 0070 PHADJ_A 0 0 Phase B net Wh Phase B VARh CAL IB 16384 16170 56 57 Total Wh 47 48 PHADJ B 0 1973 0 9504914 Expected Wh 0 119446 Angle 0 0 72010832 0 7200 Total VARh 0 0100 Figure 2 5 Calibration Spreadsheet for Fast Calibration Page 50 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 d jTERIDIAN 2 2 6 COMPENSATING FOR NON LINEARITIES 2 2 7 v1 5 Nonlinearity is most noticeable at low currents as shown in Figure 2 6 and can result from input noise and truncation Nonlinearities can be eliminated using the QUANT variable oe Ei o ms ams Figure 2 6 Non Linearity Caused by Quantification Noise The error can be seen as the presence of a virtual constant noise current While 10mA hardly contribute any error at currents of 10A and above the noise becomes dominant at small currents The value to be used for QUANT can be determined by the following formula error QUANT AU VMAX IMAX LSB Where error observed error at a given voltage V and current VMAX voltage scaling factor as described in section 1 8 3 IMAX current scaling factor as described in section 1 8 3
90. the Demo Board e External 5VDC connector J1 on the Debug Board The power supply jumper JP1 must be consistent with the power supply choice JP1 connects the AC line voltage to the internal power supply This jumper should usually be left in place When the Demo Board is in shunt configuration the shunt resistor has to be connected as shown in O Figure 1 7 for the board to be powered via J1 Alternatively a jumper cable between any header labeled V3P3 and the NEUTRAL terminal J9 can be supplied Page 12 of 83 O 2007 2008 TERIDIAN Semiconductor Corporation v1 5 d JTERIDIAN 1 6 2 CABLE FOR SERIAL CONNECTION 1 6 3 v1 5 For connection of the DB9 serial port to a PC either a straight or a so called null modem cable may be used JP1 and JP2 are plugged in for the straight cable and JP3 JP4 are empty The jumper configuration is reversed for the null modem cable as shown in Table 1 3 Cable Jumpers on Debug Board Mode Configuration Straight Cable Default Installed Installed Poo Null Modem Cable Alternative mEI Installed Installed Table 1 1 Jumper settings on Debug Board JP1 through JP4 can also be used to alter the connection when the PC is not configured as a DCE device Table 1 2 shows the connections necessary for the straight DB9 cable and the pin definitions Table 1 2 Straight cable connections Table 1 3 shows the connections necessary for the null modem DB9 cable and the pin definiti
91. tion 2 1 1 or using the spreadsheet presented in section 2 2 4 Apply the new calibration factors CAL IA CAL VA and PHADJ A to the meter The memory locations for these factors are given in section 1 9 1 Test the meter at nominal current and if desired at lower and higher currents and various phase angles to confirm the desired accuracy Store the new calibration factors CAL IA CAL VA and PHADJ A in the EEPROM of the meter If a Demo Board is calibrated the methods shown in section 1 9 2 can be used 2 2 3 CALIBRATION PROCEDURE WITH FIVE MEASUREMENTS The calibration procedure is as follows 1 2 All calibration factors are reset to their default values i e CAL IA CAL VA 16384 and PHADJ A 0 An RMS voltage Vigea consistent with the meter s nominal voltage is applied and the RMS reading Vactual Of the meter is recorded The voltage reading error Axv is determined as AXV Vactual Videal Videal Apply the nominal load current at phase angles 0 60 180 and 60 300 Measure the Wh energy each time and record the errors Eo Eso E180 and Eoo Calculate the new calibration factors CAL JA CAL VA and PHADJ A using the formulae presented in section 2 1 2 or using the spreadsheet presented in section 2 2 4 Apply the new calibration factors CAL IA CAL VA and PHADJ A to the meter The memory locations for these factors are given in section 1 9 1 Test the meter at nominal current and if desired
92. tor While connecting wires to J9 and J4 care should be taken to prevent shorting between LINE and NEUTRAL Before connecting the Demo Board to main power the resistance between J9 and J4 LIVE and NEUTRAL must be checked If the resistance is below 1000 the wiring must be re checked Only one shunt resistor can be used in a meter since isolation cannot be maintained when using more than one shunt resistor v1 5 2007 2008 TERIDIAN Semiconductor Corporation Page 29 of 83 d MIL 71M6531 Demo Board User s Manual SEMICONDUCTOR CORP 1 9 CALIBRATION PARAMETERS 1 9 1 GENERAL CALIBRATION PROCEDURE Any calibration method can be used with the 71M6531D F chips This Demo Board User s Manual presents calibration methods with three or five measurements as recommended methods because they work with most manual calibration systems based on counting pulses emitted by LEDs on the meter Naturally a meter in mass production will be equipped with special calibration code offering capabilities beyond those of the Demo Code It is basically possible to calibrate using voltage and current readings with or without pulses involved For this purpose the MPU Demo Code can be modified to display averaged voltage and current values as opposed to momentary values Also automated calibration equipment can communicate with the Demo Boards via the serial interface and extract voltage and current readings This is possible even with the unmodified
93. tor Channel A 1 7 Calculate MAX for the shunt resistor IMAX_SHUNT This can be done by using the following formula IMAX SHUNT Vimax RsH The Vimax value is the maximum analog input voltage for the channel typically 176 8mV RMS and Rs is the resistance value of the shunt resistor The value obtained for IMAX SHUNT is stored at the MPU address Ox0A using the command A IMAX SHUNT of the Demo Code supplied by TERIDIAN Compute WRATE SHUNT based on MAX SHUNT and VMAX and the formula given in 1 8 3 WRATE SHUNT IMAX SHUNT VMAX 47 1132 Kh In 8 Nacc X Use VMAX 600V RMS for the 6531 Demo Board if the resistor divider for VA has not been changed Update the WRATE register at CE address 0x2D with WRATE SHUNT using the command 21 WRATE SHUNT Test for accuracy at 15A 240V at phase angle 0 phase angle 60 and at phase angle 60 Apply the error values to the calibration spreadsheet revision 2 0 or later and determine the calibration factors for channel A i e CAL IA CAL VA and PHADJ A Update the CE registers 0x08 0x09 and OxOE of the compute engine with the calibration factors obtained from the spreadsheet using the commands 10 CAL 1A J11 CALVA and 18 PHADJ A Retest for accuracy at several currents and phase angles At this point channel A is calibrated WSUM will be based on the voltage applied to the meter and the current flowing through the shunt resistor The pulses gener
94. ture in the Transfer menu of Hyperterminal than assembling hex record from scratch The pre assembled hex records are contained in a ZIP file named 6531 scripts zip on the CD ROM supplied with the Demo Kits Table 1 9 shows the records available and their function Hex Record Name set 6531 defaults txt Sets the default configuration including all CE variables Transferring this record is necessary when data in the EEPROM is lost or compromised Displays the current temperature reading from the CE This record can be edited to set the nominal calibration temperature Displays CE data from memory locations 0x1020 to Ox10FF read 6531 config txt Displays configuration data This hex record includes comment text helping to interpret the received data Table 1 9 Pre assembled hex records 1 7 4 USING THE BATTERY MODES The 71M6531D F is in so called Mission mode as long as 3 3VDC is supplied to the V3P3SYS pin If this voltage is below the minimum required operating voltage which is usually indicated by V1 1 6 internal VBIAS voltage and if no battery is connected to the VBAT pin the chip is powered off Battery modes can be used if a battery or other DC source supplying a DC voltage with in the operating limits for the battery input is applied to the battery pin VBAT pin 49 of the chip On the Demo Board the battery should be connected to pin 2 and 3 of JP8 In order to prevent corruption of external memory whi
95. two measurements to determine ds and Axi _ IV Ay Ay cos 0 0 2 E 2 A Ay cos 0 IV cos 0 XV XI Os E 1 2a Ay Ay cos S E IV Ay Ay cos 60 eA cos 60 9 1 S IV cos 60 cos 60 E Ag cos 60 cos sin 60 sin 1 cos 60 Ay Ay COS Ayy Ay tan 60 sin I Combining 2a and 3a 4 E E E 1 tan 60 tan Eso i E i Ge E 4 1 tan 60 E E 69 f tan 4 E 1 tan 60 and from 2a E 1 7 gt An A yy COS Now that we know the Aw Axi and os errors we calculate the new calibration voltage gain coefficient from the previous ones A CAL Vg KV We calculate PHADJ from os the desired phase lag tant l 12 2 20 2 cos 2af 7 PHADJ 2 1 27 sin 27 T tan T 01 2 cos 27ff T Page 44 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 2 1 2 v1 5 d JTERIDIAN And we calculate the new calibration current gain coefficient including compensation for a slight gain increase in the phase calibration circuit CAL p ALI IT TT Ay 2 7 PHADJQ 27 PHADJ 20 2 cosQaf T 1 20 2 cosQzf T 1 2 CALIBRATION WITH FIVE MEASUREMENTS The five measurement method provides more orthogonality between the gain and phase error derivations This method involves measuring Ev Eo E180 Eso and E300 Again set all calibration factors t
96. utput to drive the LED Table 3 1 71M6531 Demo Board description 1 3 v1 5 O 2007 2008 TERIDIAN Semiconductor Corporation Page 59 of 83 d MEAN 71M6531 Demo Board User s Manual SEMICONDUCTOR CORR Item Schematic amp Figure Silk Screen Reference This 3 pin header allows selection of the battery mode operation A jumper across pins 1 2 indicates that no external battery is available The 71M6531D F will stay in brownout mode when JP42 BAT MODE system power is down and it will communicate at 9600bd A jumper across pins 2 3 indicates that an external battery is available The 71M6531D F will be able to transition from brownout mode to sleep and LCD modes when system power is down and it will communicate at 300bd V3P3 OTX 5 pin header Pins 1 and 3 carry the supply voltage to the 6531D F J12 V3P3 ORX IC Pin 2 is the TX OPT output of the 6531D F IC Pin 4 is the GND OPT RX input to the 6531D F IC Pin 5 is ground TP22 VARh Test points for pulses generated by the VARh LED h Wh LED 3 pin header for connection of an external battery at pin 2 at JP8 GND VBAT pin 3 If no battery is connected a jumper must be installed across pins 1 2 Chip reset switch The RESET pin has an internal pull down that allows normal chip operation When the switch is pressed the 15 SWI RESET RESET pin is pulled high MID resets s IC into a known state Note The RESET button is disabled in the Demo Board default configuration
97. v1 5 71M6531 Demo Board User s Manual SEMICONDUCTOR CORP 1 L Ir Fa FEE OK ua laa wa fa cl hora at E E i33 i y 7 i z To el arua iR e omo Rus dro ash LU K D zie a L L WARAN E Bn 71M6531 Demo Board USER S MANUAL lt PULSE OUTPUT C IRS Cs JPB O tuf co GND TE a ee AP 12 TT AA A RAEE sn A 1 ue JAR ah GE R Om Gm mm Gm Lo e quo mom mmm m mm i sc S 5 E y 4 i SKD T RE ES je i p MEAS i i gt 5 GND p C gt 4 El N EET GR o Lesen o PBS 1 og LG M OD 2k y d N gt ses TERIDIAN s TU CH SEMICONDUCTOR CORP LE e 3 2 z R91 NC Lu Z jas Owor 1444443 O 1t ddddddddddddddd inel 6 2 2008 5 23 00 PM v1 5 TERIDIAN Semiconductor Corporation 6440 Oak Canyon Rd Suite 100 Irvine CA 92618 5201 Phone 714 508 8800 Fax 714 508 8878 http www teridian com meter support teridian com 2007 2008 TERIDIAN Semiconductor Corporation Page 1 of 83 ES EE Page 2 of 83 2007 2008 TERIDIAN Semiconductor Corporation v1 5 d jTERIDIAN TERIDIAN Semiconductor Corporation makes no warranty for the use of its products other than expressly contained in the Company s warranty detailed in the TERIDIAN Semiconductor Corporation standard Terms and Conditions The company assumes no responsibility for any errors which may appear in this document reserves the r
98. x1000 1 2 End Of File Quit record a file termination record Contains no data This record has to be the last line of the file and only one record per file is permitted The byte pattern is always 00000001FF Upon receipt of this record the Demo Code will transfer the received data into non volatile memory EEPROM Alternate form of Write CE data record optional CE data RAM is located at 0x1000 Read CE data record contains empty data field and 16 bit CE address optional CE data RAM is located at 0x1000 05 Read MPU or I O RAM data record contains empty data field and 16 bit MPU address optional I O RAM is located at 0x2000 MEM Write RTC data record contains data and 16 bit RTC address 07 Read RTC data record contains empty data field and 16 bit RTC address optional Write SFR data record contains data and 16 bit SFR address optional The MSB is always zero 0 Read SFR data record contains empty data field and 16 bit SFR address optional Table 1 7 Data command types Table 1 8 lists a few examples of hex records Hex Record 08 0000 06 00 00 OC 03 18 05 06 00 ff Writes 06 eight bytes 08 to RTC setting the RTC to zero seconds 00 minutes 00 12 hours OC Wednesday 03 24 18 of May 05 2006 06 Uses the wild card checksum 10 0010 00 00004000 00004000 00004000 Writes the default values 0x4000 for the 00004000 E8 calibration constants CAL IA CAL IB CAL VA a

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