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Implementation of 8
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1. The UP2 board Figure 1 UP Education Board Block Diagram 98828888888 EPF10K20 or EPF10K70 ooooococ 0000904000 00000000 00044000 m 3 g FLEX EXPAN 65555559 65555555 rg Pog P5 FLEX_EXPAN_ 3 Gm OO 88888 EKREN go eon DD oo oo oo oo oo oo oo co oo 8 Bit Adder 8 SS Things to keep in mind Recommended FPGA EPM7128S LEDs are hardwired to the MAX chip DIP switches are not so you will need to physically wire them hook up wires User manual has a list of pin connections MAX_DIGIT display seven segment display directly connected to EPM7128S 8 Bit Adder Things to keep in mind Figure 4 Display Segment Name Digit 1 Digit 2 Decimal Point Table 4 lists the pin assignments for each segment Table 4 MAX DIGIT Segment 1 0 Connections Display Segment Pin for 1 Pin for Digit 2 ar DNA Ref University Program Design Laboratory Package User Guide Altera Corp 8 Bit Adder 10 Things to keep in mind m Jumper Settings oet the JTAG configuration JTAG chain can be configured to be connected to any device To program only EPM7128S TO TOO DEVICE BOARD Position of C G2 amp C3 Conneciars 8 Bit Adder 11 eee Downloading to the chip m Functional
2. Analysis m Verify your design waveform editor m Device Selection m Pin Assignmenis m Compile the program m Program the Device follow the instructions from the User Manual 8 Bit Adder 12 SS Test your design f you programmed correctly and transferred the design to the FPGA successfully Configuration Complete you should be able to feed in two 8 bit numbers through the DIP switches see the sum on the 7 segment display AND see the overflow if it occurs Hint LED or dp lights up or you can be innovative and have an error message displayed on the 7 segment display unit 8 Bit Adder 13 You are all set for next week s lab 8 Bit Adder 14
3. Implementation of 8 bit adder Rashmi Kumar 8 Bit Adder 1 Administrative m This lab requires a report Two 15 Sep 03week lab m Has a Pre lab so please be prepared m You Will need the User Guide for the Altera UP2 board so please print a copy 8 Bit Adder 2 Objective of the lab m Design a 8 bit adder which is capable of Taking two 8 bit numbers from the DIP switches Display the result on the seven segment display Provide a visual feedback when overflow occurs 8 Bit Adder Equipment m Altera UP2 Development Board Max plus ll Integrated Design Environment Software 8 Bit Adder ouggested Design Flow m Write a Verilog code for the 8 bit adder and the hex to seven segment display oeveral ways to do this 1 Make two functional units one for the adder another for the hex to seven segment display 2 Make a single unit that incorporates both addition and conversion m Create a symbol for each block 8 Bit Adder 5 Design Flow cont m Integrate your design as a top level design in the graphical editor m Functional Simulation make sure that your design is logically correct m Major Consideration All UP2 peripherals are driven active low 8 Bit Adder Active low signaling 45V m Pull up resistors m For example 10 KO resistors for dip witches m 16 LEDs pulled up 3300 resistors i E e 8 Bit Adder 7
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