Differences between M16C/62P and M16C/65C
Contents
1. Table 2 28 Differences in Registers Associated with Timers 2 2 Address Differences Symbol Bit M16C 62P M16C 65C M16C 62P M16C 65C TBi count source select bit 2 0 i 0 2 3 and 5 Select the TBi count source TBi count source option specify bit 3 0 TCKO and TCK1 enabled TCSO to TCS2 disabled TBCSO 01C8h 1 TCKO and TCK1 disabled TBCS1 01C9h TCSO to TCS2 enabled TBCS2 01E8h TBj count source select bit TBCS3 01E9h 6 4 j 1 and 4 Select the TBj count source TBj count source option specify bit 7 0 TCKO and TCK1 enabled TCSA to TCS6 disabled 1 TCKO and TCK1 disabled TCS4 to TCS6 enabled TBOMR to 039Bh to 039Dh 033Bh to O33Dh Different addresses TB2MR TB3MR to 035Bh to 035Dh 031Bh to O31Dh Different addresses TB5MR TBO 0390h to 0391h 0330h to 0331h Different addresses TB1 0392h to 0393h 0332h to 0333h Different addresses TB2 0394h to 0395h 0334h to 0335h Different addresses TB3 0350h to 0351h 0310h to 0311h Different addresses TB4 0352h to 0353h 0312h to 0313h Different addresses TB5 0354h to 0355h 0314h to 0315h Different addresses TBSR 0340h 0300h Different addresses TABSR 0380h 0320h Different addresses PPWFS1 01C6h M16C 65C only PPWFS2 01E6h M16C 65C only 01COh to TBO1 01C1h M16C 65C only 01C2h to TB11 01C3h M16C 65C only 01C4h to TB21 01C5h M16C 65C only TB2. Table 2 1 Differences in Registers Associated with the Protect Function Esse Address Bit Differences m ine M16C 62P M16C 65C M16C 62P M16C 65C Protect bit 0 Protect bit 0 0 Enable write access to registers Enable write access to registers CMO CM1 CM2 PLCO and CMO CM1 CM2 PLCO PCLKR PCLKR and FRAO Protect bit 3 PRCR 000Ah 000Ah 3 pie ee aotesetoredisieis Enable write access to registers cas S DANT 9 VCR2 VWCE VD1LS VWOC a VW1C and VW2C Protect bit 6 6 Enable write access to the PRG2C register 2 2 Differences in Reset Table 2 2 lists Differences in Reset and Table 2 3 lists Difference in the Register Associated with Reset Table 2 2 Differences in Reset Item M16C 62P M16C 65C Types of resets Hardware reset Brown out detection reset Oscillation stop detection reset Watchdog timer reset Software reset Hardware reset Voltage monitor 0 reset Voltage monitor 1 reset Voltage monitor 2 reset Power on reset Oscillation stop detection reset Watchdog timer reset Software reset Cold start warm start discrimination method WDC5 bit in the WDC register CWR bit in the RSTFR register Reset Source Determine Register NO Yes Table 2 3 Difference in the Register Associated with Reset Symbol Address Bit Differences nm M16C 62P M16C 65C M16C 62P M16C 65C RSTFR 0018h M16C 65C only R01AN0
3. DMAO 48 to 51 0030h to 0033h DMA1 DMA1 52 to 55 0034h to 0037h Key input interrupt Key input interrupt 56 to 59 0038h to 003Bh A D converter A D converter 60 to 63 003Ch to 003Fh UART2 transmit NACK2 UART2 transmit NACK2 64 to 67 0040h to 0043h UART2 receive ACK2 UART2 receive ACK2 UARTO transmit NACKO UARTO transmit NACKO 72 to 75 0048h to 004Bh UARTO receive ACKO UARTO receive ACKO 76 to 79 004Ch to 004Fh UART1 transmit NACK1 UART1 transmit NACK1 80 to 83 0050h to 0053h UART1 receive ACK1 UART1 receive ACK1 84 to 87 0054h to 0057h Timer AO Timer AO 88 to 91 0058h to 005Bh Timer A1 Timer A1 68 to 71 0044h to 0047h 92 to 95 005Ch to 005Fh Timer A2 Timer A2 96 to 99 0060h to 0063h Timer A3 Timer A3 100 to 103 0064h to 0067h Timer A4 Timer A4 104 to 107 0068h to 006Bh Timer BO Timer BO 108 to 111 006Ch to 006Fh Timer B1 Timer B1 112 to 115 0070h to 0073h RO1AN0443EJ0100 Rev 1 00 Jul 29 2011 Timer B2 ztENESAS Timer B2 Page 13 of 31 M16C 62P Group M16C 65C Group Table 2 18 Software Interrupt Number Differences between M16C 62P and M16C 65C Differences in Interrupt Vectors 2 2 Vector Address M1
4. Table 2 34 lists Differences in A D Converters and Table 2 35 lists Differences in Registers Associated with A D Converter Table 2 34 Differences in A D Converters Item M16C 62P M16C 65C f1 f1 divided by 2 f1 divided by 3 f1 divided by 4 f1 divided by 6 f1 divided by 12 fOCO40M divided by 2 fOCO40M divided by 3 fOCO40M divided by 4 fOCO40M divided by 6 and fOCO40M divided by 12 fAD fAD divided by 2 fAD divided by 3 Operation clock AD fAD divided by 4 fAD divided by 6 and fAD divided by 12 Without sample and hold 8 bit resolution 49 AD cycles 10 bit resolution 59 AD cycles With sample and hold 8 bit resolution 28 AD cycles 10 bit resolution 33 AD cycles Conversion rate per pin Minimum 43 AD cycles External op amp connection mode Yes No Resolution 8 bit 10 bit selectable 10 bit Sample and hold Yes No selectable Yes fAD f1 only Selectable from f1 and fOCO40M Open circuit detection assist function No Yes Table 2 35 Differences in Registers Associated with A D Converter Synibol Address Bit Differences m i isa M16C 62P M16C 65C M16C 62P M16C 65C PCLKSTP1 0016h M16C 65C only 8 10 Bit Mode Select Bit 3 0 8 bit mode No register bit 1 10 bit mode Vref Connect Bit A D standby bit 5 0 Vref not connected 0 A D operation stopped standby 1 Vref connected 1 A D operation enabled ADCON1 03D7h 03D7h External Op Amp Connec
5. DMAO mE DMAO DMA2 Both edges of INTi pin Both edges of INTi pin 00110b Timer A4 DMA Timer A4 DMA1 DMA3 SI O4 SI O4 DMAO DMA2 DMAO DMA2 Timer B3 Timer B3 00111b Timer BO DMA1 DMA3 Timer BO DMATDMAS Both edges of INTi pin Both edges of INTi pin 3 Timer B4 DMAO 01000b Timer B1 Timer B4 DMAO only Timer B1 DMA2 only Timer B5 DMAO 01001b Timer B2 Timer B5 DMAO only Timer B2 DMA only 01010b UARTO transmission UARTO transmission DMAO DMAO DMA2 01011b UARTO reception u UARTO reception o DMA1 DMA1 DMAS UARTO reception ACKO UARTO reception ACKO 01100b UART 2 transmission UART2 transmission DMAO DMAO DMA2 01101b UART2 reception u UART2 reception u DMA1 DMA1 DMAS UART2 reception ACK2 UART2 reception ACK2 01110b A D converter A D converter DMAO DMAO DMA2 01111b UART1 transmission E UART1 transmission DMA1 DMA1 DMAS UART1 reception ACK1 UART1 reception ACK1 RO1AN0443EJ0100 Rev 1 00 Jul 29 2011 2tENESAS Page 17 of 31 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C Table 2 24 Differences in DMAi Request Sources i 0 and 1 in M16C 62P i 0 to 3 in M16C 65C 2 2 DSELA to M16C 62P M16C 65C DSELO DMS 0
6. Differences in Power Control 5 anter tene e ERE Re e Dunk nE EAEn EEEE te X RREK e re EEEn KE ne uA RER ERE 10 2 6 Differences in Processor Mode 2 2 eceecceeceeeeeeeeeeeceaeaaeeeeeeeeeeeeeceeaaaecaeeeeeeeeeeeeesecaceneanaeeeeees 10 2 7 Differences In BUS onec nsns ARE ERR eee ede Yan enne e gn eeu nee nnn ea EE uda y aeu kcu a eere Ra queen 11 2 8 Differences in Programmable I O Port sssssssssssssssssseeee eene nennen nennen enne 12 2 9 Differences in Interrupts 2 deae eee r bee ta pee ec cnp enna a Pee Eee CAE FTU Deu ERR ECC E EE RUE e db 13 2 10 Differences in Watchdog Timer ccccccesccccceeeeseceeeeeeseeceeeeseseeceeeeesaaeeeeeeeseaceaeeseeeeeeeseeeceeeneneees 16 2 11 Bee 3157 17 2 12 Differences Ir TIIIgrs scrap iineoae veasdecsvas NS ESSERE SNR A ia Ea aa AAA EAR AN NRA NER EOKRRERV ER ENS 19 2 13 Differences in the Three phase Motor Control Timer Function seseen 22 2 14 Differences in Serial Interface u a tette ree beris Doo ebria khe i d nnee 23 2 15 Differences in A D Converter 5 cccevavien ccaucduntcacceeinnta cane cdunns cencuaasde ccaviakasdecnsuanteeccaecuanseadeevantinecaecuae 26 2 16 Differences in CRC Calculator sss nennen nennen nennen nnn nennen 27 2 17 Dirterences in Flash Memory erint aterert need Robe RE eva teehee 27 2 18 Differences in Flash Memory Block Configuration essen 29 2 19 New Functions added in the M1
7. No Count second minute hour day of week imer PWM function No 8 bits x 2 Remote control signal receive No 2 circuits function UART Clock synchronous asynchronous x 3 Clock synchronous asynchronous x 6 channels channels UARTO to UART2 UART5 Serial to UART7 clock f1 only Selectable from f1 and fOCO F Interface prior to division select function CEC No Yes i 2C Multi master 12C No iehaninel bus interface Resolution 8 bit 10 bit selectable 10 bit only Selectable from f1 f1 divided by 2 f1 divided by 3 f1 divided by 4 f1 divided by A D Operation clock a ca Sy rie rates 6 f1 divided by 12 fOCO40M divided by 2 Converter AD edd i oak or fOCO40M divided by 3 fOCO40M divided y9 y by 4 fOCO40M divided by 6 and fOCO40M divided by 12 Sample and hold Yes No selectable Yes G t Selectable from named CRC CCITT X16 X12 X5 1 CRC CCITT X16 X12 X5 1 and CRC poy CRC 16 X16 X15 X2 1 Calculator MSB LSB select f No Yes function CRC snoop No Yes Note 1 Refer to the User s Manual Hardware for electrical characteristics and more details RO1AN0443EJ0100 Rev 1 00 Jul 29 2011 2tENESAS Page 4 of 31 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C Table 1 3 Differences in Functions 3 3 1 Item M16C 62P M16C 65C Selectable Options Watchdog timer autostart function after reset Count source protection mode se
8. of the reload register measurement result can be read by reading the TBj1 register Write to timer register in pulse period pulse width measurement modes The value written to the TBj register is not written to neither the reload register nor the counter When a value is written to the TBj register while the counter stops the value is written to both the reload register and the counter Overflow flag clear method Wait one or more count source cycles after the MR3 bit becomes 1 overflow while the TBjS bit is 1 start counting then write a value to the TBjMR register Write a value to the TBjMR register RO1AN0443EJ0100 Rev 1 00 Jul 29 2011 2tENESAS Page 19 of 31 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C Table 2 27 Differences in Registers Associated with Timers 1 2 Symbol Address Bits Differences mbo M16C 62P M16C 65C M16C 62P M16C 65C TAi count source select bit 2 0 i 0 2 and 4 Select the TAi count source TAi count source option specify bit 0 TCKO and TCK1 enabled TCSO to 3 TCS2 disabled TACSOt dibah 1 TCKO and TCK1 disabled TCSO 0 o 2 TACS2 01D2h Tee ener ied Bd ss TAj count source select bit j 1 and 3 Select the TAj count source TAj count source option specify bit 0 TCKO and TCK1 enabled TCS4 to 7 TCS6 disabled
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10. 0392h M16C 65C only RO1AN0443EJ0100 Rev 1 00 2tENESAS Page 18 of 31 Jul 29 2011 M16C 62P Group M16C 65C Group 2 12 Differences in Timers Table 2 26 lists Differences in Timers and Table 2 27 to Table 2 28 list Differences in Registers Associated with Timers Table 2 26 Differences in Timers Differences between M16C 62P and M16C 65C Item M16C 62P M16C 65C Count source f1 f2 f8 f32 C32 H TIMAB f2TIMAB f8TIMAB f32TIMAB fe4TIMAB fOCO S fOCO F fC32 Timer clock source selection No always f1 f1 selectable from main clock Timer peripheral clock measurement modes f No Yes stop function A Ip No Selectable from f1 and fOCO F Output polarity No Yes inversion function Programmable output No Yes mode Count direction up down selected by the TAIOUT pin Yes me i 0 to 4 Default value in pulse period pulse width Undefined Programmable Read from timer register in pulse period pulse width measurement modes Contents of the reload register measurement result can be read by reading the TBj register j 0 to 5 When bits PPWFSk2 to PPWFSKO in the PPWFSk register k 1 and 2 are 0 Contents of the reload register measurement result can be read by reading the TBj register When bits PPWFSk2 to PPWFSKO in the PPWFSk register are 1 Contents of the counter current counter value can be read by reading the TBj register Contents
11. 1 TCKO and TCK1 disabled TCS4 to TCS6 enabled Different addresses TAOMR ETE 2 to 0396h to 0336h to Up Down switching factor select bit TA4MR 039Ah 033Ah 4 0 UDF register 1 Input signal to TAiOUT pin 0386h to 0326h to TAO 0387h 0327h Different addresses 0388h to 0328h to TA1 0389h 0329h Different addresses 038Ah to 032Ah to TA2 038Bh 032Bh Different addresses 038Ch to 032Ch to TAS3 038Dh 032Dh Different addresses O38Eh to 032Eh to TA4 038Fh 032Fh Different addresses TABSR 0380h 0320h Different addresses UDF 0384h 0324h Different addresses ONSF 0382h 0322h Different addresses TRGSR 0383h 0323h Different addresses CPSRF 0381h 0015h Different addresses PCLKSTP1 0016h M16C 65C only TCKDIVCO 01CBh M16C 65C only PWMFS 01D4h M16C 65C only TAPOFS 01D5h M16C 65C only TAOW 01D8h M16C 65C only 0342h to 0302h to Different addresses TA11 0343h 0303h Used in programmable output mode 0344h to 0304h to Different addresses TA21 0345h 0305h ep as Used in programmable output mode TAA 0346h to 0306h to RES Different addresses 0347h 0307h Used in programmable output mode RO1AN0443EJ0100 Rev 1 00 Jul 29 2011 2tENESAS Page 20 of 31 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C
12. 2 enabled D4INT 001Fh m M16C 62P only VWCE 0026h M16C 65C only VD1LS 0028h M16C 65C only VWOC 002Ah M16C 65C only VW1C 002Bh d M16C 65C only VW2C 002Ch E M16C 65C only RO1AN0443EJ0100 Rev 1 00 2tENESAS Page 8 of 31 Jul 29 2011 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C 2 4 Differences in Clock Generator Table 2 6 lists Differences in Clock Generator and Table 2 7 and Table 2 8 list Differences in Registers Associated with Clock Generator 1 2 Table 2 6 Differences in Clock Generator Item M16C 62P M16C 65C Clock output function Selectable from fC f8 and f32 Selectable from fC f8 f32 and f1 CPU clock after reset Main clock divided by 8 default setting of the CM21 bit 0 125 kHz on chip oscillator clock divided by 8 default setting of CM21 bit 1 Peripheral clock fC Provided constantly Selectable whether fC is provided or not by setting the PM25 bit in the PM2 register 40 MHz on chip No Yes oscillator 125 kHz on chip No Yes oscillator On chip oscillator Approx 1 MHz Approx 125 kHz approx 40 MHz stop function frequency Calculation formula for PLL clock frequency ANN AINN Timer peripheral clock No Yes CM21 Bit in the CM1 register n Multiply ratio set by bits PLCO2 to PLCOO in the PLCO re
13. 31 01EOh to O1E1h M16C 65C only TB41 01E2h to O1bE3h M16C 65C only TB51 01E4h to O1E5h M16C 65C only RO1AN0443EJ0100 Rev 1 00 tENESAS Page 21 of 31 Jul 29 2011 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C 2 13 Differences in the Three phase Motor Control Timer Function Table 2 29 lists Differences in the Three phase Motor Control Timer Function and Table 2 30 lists Differences in Registers Associated with the Three phase Motor Control Timer Function Table 2 29 Differences in the Three phase Motor Control Timer Function Item M16C 62P M16C 65C Count source f1 f2 f8 32 C32 f1TIMAB f2TIMAB f8TIMAB f32TIMAB fe4TIMAB fOCO S fOCO F fC32 Position data retain function No Yes Three phase PWM output pin select function No Yes Table 2 30 Differences in Registers Associated with the Three phase Motor Control Timer Function Symbol Address Bit Differences M16C 62P M16C 65C M16C 62P M16C 65C DTT 034Ch 030Ch Different addresses ICTB2 034Dh 030Dh Different addresses IDBO 034Ah 030Ah Different addresses IDB1 034Bh 030Bh Different addresses INVCO 0348h 0308h Different addresses INVC1 0349h 0309h Different addresses TA1 0388h to 0389h 0328h to 0329h Different addresses TA2 038Ah to 038Bh 032Ah
14. 3T NC30WA M3T NC30WA Real time OS M3T MR30 M3T MR30 Emulator debugger PC7501 E100 Emulation probe M3062PT2 EPB MCU unit ROE530650MCUO0O Compact emulator M3062PT3 CPE On chip debugging emulator E 7 wire system E8a single wire system Renesas starter kits ROK33062PS001BE RO1AN0443EJ0100 Rev 1 00 134 NE SAS Page 30 of 31 Jul 29 2011 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C 3 Reference Documents M16C 62P Group Hardware Manual Rev 2 41 M16C 65C Group User s Manual Hardware Rev 1 00 The latest version can be downloaded from the Renesas Electronics website Technical Update Technical News The latest information can be downloaded from the Renesas Electronics website Website and Support Renesas Electronics website http Awww renesas com Inquiries http Awww renesas com inquiry RO1AN0443EJ0100 Rev 1 00 2tENESAS Page 31 of 31 Jul 29 2011 Revision Histor M16C 62P Group M16C 65C Group y Differences between M16C 62P and M16C 65C Description Rev Date Summary Jul 29 2011 First edition issued All trademarks and registered trademarks are the property of their respective owners A 1 General Precautions in the Handling of MPU MCU Products The following usage notes are applicable to all MPU MCU products from Renesas For detailed usage notes on the products covered by this manual refer to the relevant sections of the manual If the descriptions unde
15. 443EJ0100 Rev 1 00 2tENESAS Page 7 of 31 Jul 29 2011 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C 2 3 Differences in Voltage Detector Table 2 4 lists Differences in Voltage Detector and Table 2 5 lists Differences in Registers Associated with Voltage Detector Table 2 4 Differences in Voltage Detector Voltage detection reset monitor level Item M16C 62P M16C 65C Voltage detection Vdet4 Vdet1 voltage detection circuit 1 interrupt monitor level Vdet2 voltage detection circuit 2 VdetO voltage detection circuit 0 Vdet3 Vdet1 voltage detection circuit 1 Vdet2 voltage detection circuit 2 Refer to the Electric Characteristics chapter in the User s Manual Hardware for detection voltage Table 2 5 Differences in Registers Associated with Voltage Detector Address Differences Symbol Bit M16C 62P M16C 65C M16C 62P M16C 65C Voltage detector 0 enable bit 5 Reserved bit 0 Voltage detector 0 disabled 1 Voltage detector 0 enabled Reset Level Monitor Bit Voltage detector 1 enable bit VCR2 001Ah 001Ah 6 0 Disable reset level detection circuit 0 Voltage detector 1 disabled 1 Enable reset level detection circuit 1 Voltage detector 1 enabled Low Voltage Monitor Bit Voltage detector 2 enable bit 7 0 Disable low voltage detection circuit 0 Voltage detector 2 disabled 1 Enable low voltage detection circuit 1 Voltage detector
16. 5 NMI P8 5 NMI SD CEC Added SD CEC P8 1 TA4IN U P8_1 TA4IN U CTS5 RTS5 Added CTS5 RTS5 P8_0 TA4OUT U P8 0 TA4OUT U RXD5 SCL5 Added RXD5 SCL5 P7_7 TA3IN P7_7 TA3IN CLK5 Added CLK5 P7 6 TA3OUT P7 6 TA3OUT TXD5 SDA5 Added TXD5 SDA5 P7 1 TAOIN TB5IN RXD2 SCL2 P7 1 TAOIN TB5IN RXD2 SCL2 SCLMM Added SCLMM P7 0 TAOOUT TXD2 SDA2 P7 0 TAOOUT TXD2 SDA2 SDAMM Added SDAMM P6 0 CTSO RTSO P6_0 CTS0 RTSO RTCOUT Added RTCOUT P4 7 CS3 P4 7 CS3 PWM1 TXD7 SDA7 Added PWM1 TXD7 SDA7 P4 6 CS2 P4 6 CS2 PWMO RXD7 SCL7 Added PWMO RXD7 SCL7 P4 5 CS1 P4 5 CS1 CLK7 Added CLK7 P4 4 CS0 P4 4 CS0 CTS7 RTS7 Added CTS7 RTS7 P2 5 AN2 5 A5 D5 D4 P2 5 INT7 AN2 5 A5 Ab D5 A5 D4 Added INT7 P2 4 AN2 4 M DA D3 P2 4 INT6 AN2 4 4 A4 D4 A4 D3 Added INT6 P1 7 INT5 D15 P1 7 INT5 D15 IDU Added IDU P1 6 INT4 D14 P1 6 INT4 D14 IDW Added IDW P1 5 INT3 D13 P1 5 INT3 D13 IDV Added IDV P1 3 D11 P1 3 D11 TXD6 SDA6 Added TXD6 SDA6 P1 2 D10 P1 2 D10 RXD6 SCL6 Added RXD6 SCL6 P1 1 D9 P1 1 D9 CLK6 Added CLK6 P1 0 D8 P1 0 D8 CTS6 RTS6 Added CTS6 RTS6 RO1AN0443EJ0100 Rev 1 00 134 NE SAS Page 6 of 31 Jul 29 2011 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C 2 Detailed Comparison 2 1 Differences in Protection Table 2 1 lists Differences in Registers Associated with the Protect Function
17. 6C 62P M16C 65C 29 116 to 119 0074h to 0077h INTO INTO 30 120 to 123 0078h to 007Bh INT1 INT1 31 124 to 127 007Ch to 007Fh INT2 INT2 32 to 40 128 to 131 0080h to 0083h to 160 to 163 00AO0h to 00A3h 41 164 to 167 00A4h to 00A7h 42 168 to 171 00A8h to 00ABh 43 4172 to 4175 00ACh to OOAFh 44 176 to 179 00BOh to 00B3h 45 180 to 183 00B4h to 00B7h 46 184 to 187 00B8h to 00BBh 47 188 to 191 00BCh to OOBFh 48 192 to 195 00COh to 00C3h 49 196 to 199 00C4h to 00C7h 50 200 to 203 00C8h to OOCBh 51 204 to 207 00CCh to OOCFh 208 to 211 00DOh to 00D3h 52 to 58 to 232 to 235 00E8h to OOEBh 59 236 to 239 00ECh to OOEFh 60 240 to 243 OOFOh to OOF3h 244 to 247 00F4h to OOF7h 61 to 63 to INT instruction interrupt INT instruction interrupt DMA2 DMAS3 UARTS start stop condition detection bus collision detection CEC1 UART5 transmit NACK5 CEC2 UART5 receive ACK5 UARTE start stop condition detection bus collision detection real time clock period UARTS transmit NACK6 real time clock compare UARTE receive ACK6 UART7 start stop condition detection bus collision detection remote control 0 UART7 transmit NACKT remote control 1 UART7 receiv
18. 6C 65C sss enne nennen nnne nnns 30 2 20 Differences in Development Tool eeesseeessseesesesseeseeeeeeen enn nnnn nnne nn eren nnn nnne retener nn 30 3 Reference DOCUMEINS T 31 RO1AN0443EJ0100 Rev 1 00 2tENESAS Page 2 of 31 Jul 29 2011 M16C 62P Group M16C 65C Group 1 1 1 Differences Differences in Functions Table 1 1 and Table 1 3 list Differences in Functions Differences between M16C 62P and M16C 65C Table 1 1 Differences in Functions 1 3 1 Item M16C 62P M16C 65C 41 7 ns BCLK 24 MHz VCC1 3 0 to 5 5 Minimum Instruction Execution Time V 100 ns f BCLK 10 MHz VCC1 2 7 to 5 5 V 31 25 ns f BLCK 32 MHz VCC1 2 7 to 5 5 V Clock Generator PLL XIN XCIN on chip oscillator approx 1 MHz PLL XIN XCIN 125 kHz on chip oscillator 40 MHz on chip oscillator Timer peripheral clock No Yes stop function Slow read No Yes mode Power Control Low current consumption No Yes read mode CPU Clock After Reset Main clock divided by 8 125 kHz on chip oscillator clock divided by 8 PM24 bit 0 when NMI is disabled I O port N channel open drain output Trigger sources 25 NMI Pi NMI interrupt input port j POTENS PMe4 bit 1 when NMI is enabled NMI interrupt input port 04000h to 07FFFh when PM13 0 04000h to 07FFFh when PM13 0 Dabodh te OGE EERHOWRSREPIN
19. DMS 1 DMS 0 DMS 1 10000b DMAtDMAS UARTi transmission _ Faling edge of INT pin 4107 10001b UARTS transmission Both edges of INTJ pin 10010b DMAO DMA2 UART5 reception u DMA1 DMA3 UART5 reception ACK5 10011b UART6 transmission 10100b DMAO DMA2 UART6 reception u DMA1 DMA3 UARTE reception ACK6 10101b UART7 transmission 10110b DMAO DMA2 UART7 reception m DMA1 DMA3 UART7 reception ACK7 Table 2 25 Differences in Registers Associated with DMAC Sinibsl Address Bits Differences M16C 62P M16C 65C M16C 62P M16C 65C DARO 0024h to 0026h 0184h to 0186h Different addresses DAR1 0034h to 0036h 0194h to 0196h Different addresses DAR2 01A4h to 01A6h M16C 65C only DAR3 01B4h to 01B6h M16C 65C only DMOCON 002Ch 018Ch Different addresses DM1CON 003Ch 019Ch Different addresses DM2CON 01ACh M16C 65C only DM3CON 01BCh M16C 65C only SARO 0020h to 0022h 0180h to 0182h Different addresses SAR1 0030h to 0032h 0190h to 0192h Different addresses SAR2 01A0h to 01A2h M160 65C only SAR3 01B0h to 01B2h M160 65C only TCRO 0028h to 0029h 0188h to 0189h Different addresses TCR1 0038h to 0039h 0198h to 0199h Different addresses TCR2 01A8h to01A9h M160 65C only TCR3 01B8h to 01B9h M160 65C only DMOSL 03B8h 0398h Different addresses DM1SL O3BAh 039Ah Different addresses DM2SL 0390h M16C 65C only DMSSL
20. Flash Memory Table 2 38 lists Differences in Flash Memory and Table 2 39 lists Differences in Software Commands and 2 40 lists Differences in Registers Associated with Flash Memory Table 2 38 Differences in Flash Memory Item M16C 62P M16C 65C Program method 1 word units 16 bit 2 word units 32 bit 100 times all areas or Number of programs and erase 1 000 times all blocks other than block A 1 000 times program ROM 1 program cycles and block 1 in user ROM area 10 000 ROM 2 10 000 times data flash times block A block 1 Suspend function No Yes User boot function No Yes Forced erase function No Yes Data retention 10 years 20 years RO1AN0443EJ0100 Rev 1 00 2tENESAS Page 27 of 31 Jul 29 2011 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C Table 2 39 Differences in Software Commands Software MCU First Bus Cycle Second Bus Cycle Third Bus Cycle Command Address Data Address Data Address Data M16C 62P WA XX40h WA WD Program M16C 65C WA XX41h WA WDO WA WD1 Erase all unlocked M16C 62P X XXA7h X XXDOh blocks M16C 65C soami eter M16C 65C X XX25h BA XXDOh Notes 1 Block blank check command is designed for programmer manufacturer Not for customers in general WA Write address set an even number however for M16C 65C set the
21. HU s y 08000h to OFFFFh when PM10 0 De EM E ded 10000h to 26FFFh B OE000h to OFFFFh when PM10 0 xpanco a 10000h to 13FFFh when PRG2CO 1 area 28000h to 7FFFFh 14000h to 26FFFh 80000h to CFFFFh when PM13 0 cana D0000h to FFFFFh in microprocessor mode 28000h to 7FFFFh Bus 9 in microproc 80000h to CFFFFh when PM13 0 D0000h to FFFFFh in microprocessor mode HOLD input Enabled Disabled Bus wait 0 to 3 wait s selectable 0 to 8 wait s selectable Recovery No 0 to 3 cycle s selectable cycle Interrupt External interrupts 8 External interrupts 13 Watchdog ml No Selectable from start and stop Timer Count source CPU clock on chip oscillator approx 1 MHz CPU clock on chip oscillator 125 KHz DMA DMAC 2 channels 4 channels Trigger sources 43 PM24 Bit in the PM2 register PM13 PM10 Bits in the PM1 register PRG2CO Bit in the PRG2C register Note 1 Refer to the User s Manual Hardware for electrical characteristics and more details RO1AN0443EJ0100 Rev 1 00 Jul 29 2011 34 NC SAS Page 3 of 31 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C Table 1 2 Differences in Functions 2 3 1 Item M16C 62P M16C 65C Selectable from f1TIMAB and f2TIMAB Timer A timer B iif Selectable from f1 f2 f8 132 and fC32 f8TIMAB f32TIMAB f64TIMAB fOCO S odii fOCO F and C32 Ti Real time clock
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23. P Group M16C 65C Group 2 7 Differences in Bus Differences between M16C 62P and M16C 65C Table 2 12 lists Differences in Bus and Table 2 13 lists Differences in Registers Associated with Bus Table 2 12 Differences in Bus Item M16C 62P M16C 65C External area wait Selectable from 0 to 3 wait s CSiW bit in the CSR register Selected by bits CSEIOW and CSEi1W in the CSE register i 0 to 3 Selectable from 0 to 8 wait s Selected by CSiW bit in the CSR register bits CSEiOW and CSEi1W in the CSE register and bits EWCi0 to EWCi1 in the EWC register Recovery cycle No Selectable from 0 to 3 cycle s Selectable by bits EWRO to EWR1 in the EWR register Table 2 13 Differences in Registers Associated with Bus Address Differences M16C 62P M16C 65C M16C 62P CSO wait expansion bit b1 bO 1 1 Do not set M16C 65C CSO wait expansion bit b1 bO 1 1 Select wait states by bits EWCO1 and EWCOO in the EWC register CS1 wait expansion bit b3 b2 1 1 Do not set CS1 wait expansion bit b3 b2 1 1 Select wait states by bits EWC11 and EWC10 in the EWC register CS2 wait expansion bit b5 b4 1 1 Do not set CS2 wait expansion bit b5 b4 1 1 Select wait states by bits EWC21 and EWC20 in the EWC register CS3 wait expansion bit b7 b6 1 1 Do not set CS3 wait expansion bit b7 b6 1 1 Select wait states by bits EWC31 and EWC30 in the EWC
24. R 0287h M16C 65C only U5SMR2 0286h M16C 65C only U5SMR3 0285h M16C 65C only U5SMR4 0284h M16C 65C only U5TB 028Ah to 028Bh M16C 65C only U6BRG 0299h M16C 65C only U6CO 029Ch M16C 65C only U6C1 029Dh M16C 65C only U6MR 0298h M16C 65C only U6RB 029Eh to 029Fh M16C 65C only U6SMR 0297h M16C 65C only U6SMR2 0296h M16C 65C only U6SMR3 0295h M16C 65C only U6SMR4 0294h M16C 65C only U6TB 029Ah to 029Bh M16C 65C only U7BRG 02A9h M16C 65C only U7CO 02ACh M16C 65C only U7C1 02ADh M16C 65C only U7MR 02A8h M16C 65C only U7RB 02AEh to 02AFh M16C 65C only U7SMR 02A7h M16C 65C only U7SMR2 02A6h M16C 65C only U7SMR3 02A5h M16C 65C only U7SMR4 02A4h M16C 65C only U7TB 02AAh to O2ABh M16C 65C only S3C 0362h 0272h Different addresses S4C 0366h 0276h Different addresses S3BRG 0363h 0273h Different addresses S4BRG 0367h 0277h Different addresses S3TRR 0360h 0270h Different addresses S4TRR 0364h 0274h Different addresses 34C2 0278h M16C 65C only RO1AN0443EJ0100 Rev 1 00 2tENESAS Page 25 of 31 Jul 29 2011 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C 2 15 Differences in A D Converter
25. addresses 0009h 020Eh Different addresses 01BBh 020Fh Different addresses 0010h to 0012h 0210h to 0212h Different addresses 0014h to 0016h 0214h to 0216h Different addresses 01B8h to 01BAh 0218h to 021Ah Different addresses RO1AN0443EJ0100 Rev 1 00 Jul 29 2011 01BCh to 01BEh 021Ch to 021Eh Different addresses 2tENESAS Page 15 of 31 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C 2 10 Differences in Watchdog Timer Table 2 20 lists Differences in Watchdog Timer and Table 2 21 lists Differences in Registers Associated with Watchdog Timer Table 2 20 Differences in Watchdog Timer Item M16C 62P M16C 65C Count source protect mode enable setting Set the PM22 bit in the PM2 register to 1 Set the CSPRO bit in the CSPR register to 1 1 Watchdog timer cycle in count source Approx 32 8 ms 32768 approx 1 MHz Approx 32 8 ms 4096 approx 125 kHz protection mode Watchdog timer Write 00h and then FFh to the WDTR register counter refresh Watchdog timer counter is initialized and starts Count automatically starts after reset by counting by writing to the WDTS register setting the WDTON bit in the OFS1 address to 0 Count starts by writing to the WDTS register Count start conditions Note 1 When the CSPROINI bit in the OFS1 address is 0 the value after reset becom
26. bytes Block 11 64 Kbytes Block 10 64 Kbytes Block 9 64 Kbytes Block 8 64 Kbytes Block 7 64 Kbytes Block 6 64 Kbytes Block 0 to 5 32 8 8 8 4 4 Kbytes OFFFFFh OF0000h OF7FFFh OF8000h OF9FFFh OFEFFFh OFFOO0h OFFFFFh Block 5 32 Kbytes Block 4 8 Kbytes Block 3 8 Kbytes Block 2 8 Kbytes Block 1 4 Kbytes Block 0 4 Kbytes Figure 2 1 M16C 62P Group RO1AN0443EJ0100 Rev 1 00 Jul 29 2011 Differences in Flash Memory Block Configuration 2tENESAS 00E000h OOEFFFh 00F000h OOFFFFh 010000h 013FFFh 080000h O8FFFFh 090000h O9FFFFh OA0000h OAFFFFh 0BO000h OBFFFFh 0C0000h OCFFFFh 0D0000h ODFFFFh 0E0000h OEFFFFh OFO000h OFFFFFh Block A 4 Kbytes Block 7 64 Kbytes Block 6 64 Kbytes Block 5 64 Kbytes Block 4 64 Kbytes Block 3 64 Kbytes Block 2 64 Kbytes Block 1 64 Kbytes M16C 65C Group Page 29 of 31 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C 2 19 New Functions added in the M16C 65C The following functions have been added in the M16C 65C Group MCU e Multi master I2C bus interface CEC function Real time clock PWM function Remote control signal receiver 2 20 Differences in Development Tool Table 2 41 lists Differences in Development Tool Table 2 41 Differences in Development Tool Tools M16C 62P M16C 65C C compiler M
27. cs product Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances including without limitation the EU RoHS Directive Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations 11 This document may not be reproduced or duplicated in any form in whole or in part without prior written consent of Renesas Electronics 12 Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products or if you have any other inquiries Note 1 Renesas Electronics as used in this document means Renesas Electronics Corporation and also includes its majority owned subsidiaries Note 2 Renesas Electronics product s means any product developed or manufactured by or for Renesas Electronics 24 NC S AS SALES OFFICES Renesas Electronics Corporation http www renesas com Refer to http www renesas com for the latest and detailed information Renesas Electronics America Inc 2880 Scott Boulevard Santa Clara CA 95050 2554 U S A Tel 1 408 588 6000 Fax 1 408 588 6130 Renesas Electronics Canada Limited 1101 Nicholson Road Newmarket Ontario L3Y 9C3 Canada Tel 1 905 898 5441 Fax 1 905 898 3220 Renesas Electronics Europe Limited Dukes Meadow
28. e ACK7 INT instruction interrupt I2C bus interface interrupt SCL SDA interrupt INT instruction interrupt 252 to 255 00FCh to OOFFh RO1AN0443EJ0100 Rev 1 00 Jul 29 2011 2tENESAS Page 14 of 31 M16C 62P Group M16C 65C Group Table 2 19 Differences between M16C 62P and M16C 65C Differences in Registers Associated with Interrupts Address Differences IFSR3A M16C 62P M16C 65C M16C 62P M16C 65C M16C 65C only IFSR2A Different addresses No register bit Interrupt request source select bit 0 Not used 1 I2C bus interface No register bit Interrupt request source select bit 0 Not used 1 SCL SDA No register bit Interrupt request source select bit 0 UART7 start stop condition detection bus collision detection 1 Remote control receiving function 0 No register bit Interrupt request source select bit 0 UART7 transmission NACK 1 Remote control receiving function 1 Interrupt request factor select bit 0 Timer B3 1 UARTO bus collision detection Interrupt request source select bit 0 Timer B3 1 UARTO start stop condition detection bus collision detection Interrupt request factor select bit 0 Timer B4 1 UART1 bus collision detection Interrupt request source select bit 0 Timer B4 1 UART1 start stop condition detection bus collision detection 035Fh 0207h Different
29. e or retain the last bit level with bits SM27 and SM26 in the S34C2 register SI O clock prior to division f1 only Selectable from f1 and fOCO F RO1AN0443EJ0100 Rev 1 00 Jul 29 2011 2tENESAS Page 23 of 31 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C Table 2 32 Differences in Registers Associated with Serial Interface 1 2 Address Differences Symbol Bit M16C 62P M16C 65C M16C 62P M16C 65C PCLKSTP1 0016h M16C 65C only UOBRG O3A1h 0249h Different addresses UOCO 03A4h 024Ch Different addresses UOC1 03A5h 024Dh Different addresses UOMR 03AO0h 0248h Different addresses UORB O03A6h to 03A7h 024Eh to 024Fh Different addresses Different addresses UOSMR 036Fh 0247h f 3 LSYN 1 Reserved bit UOSMR2 036Eh 0246h Different addresses UOSMR3 036Dh 0245h Different addresses UOSMR4 036Ch 0244h Different addresses UOTB 03A2h to O3A3h 024Ah to 024Bh Different addresses UCON O3BOh 0250h Different addresses UCLKSELO 0252h M16C 65C only U1BRG 03A9h 0259h Different addresses U1CO OS3ACh 025Ch Different addresses U1C1 OSADh 025Dh Different addresses U1MR 03A8h 0258h Different addresses U1RB OM AArR 025Eh to 025Fh Different addresses Differen
30. end of the address to Oh 4h 8h or Ch only WD Write data 16 bits WDO Write data lower word 16 bits WD1 Write data upper word 16 bits BA Highest block address even address X Any even address in user ROM area XX 8 upper bits of command code ignored Table 2 40 Differences in Registers Associated with Flash Memory Address Differences Symbol Bit M16C 62P M16C 65C M16C 62P M16C 65C FIDR 01B4h M16C 62P only FMRO 01B7h 0220h Different addresses EW1 mode select bit Write to FMR6 register enable bit 1 0 EWO mode 0 Disabled 1 EW1 mode 1 Enabled FMR1 01B5h 0221h mE Data flash wait bit 7 Reserved bit 0 1 wait 1 Follow the setting of the PM17 bit FMR2 0222h M16C 65C only FMR3 0223h M16C 65C only FMR6 0230h M16C 65C only RO1AN0443EJ0100 Rev 1 00 Jul 29 2011 2tENESAS Page 28 of 31 M16C 62P Group M16C 65C Group 2 18 Differences in Flash Memory Block Configuration The flash ROM block configurations differ between the M16C 62P and the M16C 65C Figure 2 1 shows Differences between M16C 62P and M16C 65C the Differences in Flash Memory Block Configuration The differences are marked in yellow 00F000h OOFFFFh 080000h 08FFFFh 090000h O9FFFFh OA0000h OAFFFFh 0B0000h OBFFFFh 0C0000h OCFFFFh 0D0000h ODFFFFh 0E0000h OEFFFFh OFO000h Block A 4 Kbytes Block 12 64 K
31. es 1 Table 2 21 Differences in Registers Associated with Watchdog Timer Address Differences Symbol Bit M16C 62P M16C 65C M16C 62P M16C 65C WDTS OOOEh 037Eh Different addresses Different addresses Cold Start Warm Start Discrimination Flag WDC 000Fh 037Fh 5 0 Cold Start No register bit 1 Warm Start VW2C 002Ch M16C 65C only CSPR 037Ch M16C 65C only WDTR 037Dh M16C 65C only RO1AN0443EJ0100 Rev 1 00 2tENESAS Page 16 of 31 Jul 29 2011 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C 2 11 Differences in DMAC Table 2 22 lists Difference in DMAC Table 2 23 to Table 2 24 list Differences in DMA Request Sources and Table 2 25 lists Differences in Registers Associated with DMAC Table 2 22 Difference in DMAC Item M16C 62P M16C 65C Number of channels 2 channels 4 channels Table 2 23 Differences in DMAi Request Sources i 0 and 1 in M16C 62P i 0 to 3 in M16C 65C 1 2 DSEL4 to M16C 62P M16C 65C DSELO DMS 0 DMS 1 DMS 0 DMS 1 00000b Falling edge of INTi pin Falling edge of INTi pin 00001b Software trigger Software trigger 00010b Timer AO Timer AO 00011b Timer A1 Timer A1 00100b Timer A2 Timer A2 00101b Timer A3 SI O3 DMA1 only Timer A3 a DMA OMAS
32. ferences in Interrupt Vectors and Table 2 19 lists Differences in Registers Associated with Interrupts Table 2 16 Item Difference in Interrupts M16C 62P M16C 65C Selectable whether to enable or disable the function with the PM24 bit in the PM2 register NMI enable function Enable only Table 2 17 Software Interrupt Number Vector Address Differences in Interrupt Vectors 1 2 M16C 62P M16C 65C 0 to 3 0000h to 0003h BRK instruction BRK instruction 4 to 7 0004h to 0007h 8 to 11 0008h to 000Bh 12 to 15 000Ch to 000Fh Reserved INT instruction interrupt INT7 INT6 16 to 19 0010h to 0013h INT3 INT3 420 to 23 0014h to 0017h Timer B5 Timer B5 424 to 27 0018h to 001Bh Timer B4 UART1 start stop condition detection bus collision detection Timer B4 UART1 start stop condition detection bus collision detection 28 to 31 001Ch to 001Fh Timer B3 UARTO start stop condition detection bus collision detection Timer B3 UARTO start stop condition detection bus collision detection 32 to 35 0020h to 0023h SI O4 INT5 SI O4 INT5 36 to 39 0024h to 0027h SI O3 INT4 SI O3 INT4 40 to 43 0028h to 002Bh UART2 start stop condition detection bus collision detection UART2 start stop condition detection bus collision detection 44 to 47 002Ch to 002Fh DMAO
33. gister m Division ratio set by bits PLCO5 to PLC04 in the PLCO register Table 2 7 Differences in Registers Associated with Clock Generator 1 2 Address Differences l Symbol i ec e2P Bi M16C 65C i M16C 62P M16C 65C CM1 0007h 0007h Reserved bits XIN XOUT feedback resistor select bit 0 Internal feedback resistor connected 1 Internal feedback resistor not connected 125 kHz on chip oscillator stop bit 0 125 kHz on chip oscillator on 1 125 kHz on chip oscillator off PCLKR 025Eh Different addresses 0012h i 5 Reserved bit Clock output function extension bit enabled in single chip mode 0 Selected by setting bits CM01 to CMOO in the CMO register 1 Output f1 PCLKSTP1 0016h M16C 65C only PLCO 001Ch Reserved bit Set to 1 Reference frequency counter set bit 00 No division 001Ch 5 Reserved bit 01 Divide by 2 10 Divide by 4 11 Do not set RO1AN0443EJ0100 Rev 1 00 Jul 29 2011 34 NC SAS Page 9 of 31 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C Table 2 8 Differences in Registers Associated with Clock Generator 2 2 Symbol Address Bit Differences M16C 62P M16C 65C M16C 62P M16C 65C Specifying wait when accessing 0 SFR at PLL operation Reserved bit 0 2 waits Set to 1 1 1 wait WDT count source protect bit 0 CPU cloc
34. ion however is subject to change without any prior notice Before purchasing or using any Renesas Electronics products listed herein please confirm the latest product information with a Renesas Electronics sales office Also please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website 2 Renesas Electronics does not assume any liability for infringement of patents copyrights or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document No license express implied or otherwise is granted hereby under any patents copyrights or other intellectual property rights of Renesas Electronics or others You should not alter modify copy or otherwise misappropriate any Renesas Electronics product whether in whole or in part Descriptions of circuits software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples You are fully responsible for the incorporation of these circuits software and information in the design of your equipment Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits software or information 5 When exporting the products or technology described in this document you
35. k is used for the watchdog timer count source 2 1 On chip oscillator clock is used No iregister bit PM2 001Eh 001Eh for the watchdog timer count source NMI interrupt enable bit 4 Reserved bit 0 NMI interrupt disabled 1 NMI interrupt enabled Peripheral clock fC provide bit 5 No register bit 0 Not provided 1 Provided FRAO 0022h M16C 65C only 2 5 Differences in Power Control Table 2 9 lists Differences in Power Control and Table 2 10 lists Difference in the Register Associated with Power Control Table 2 9 Differences in Power Control Item M16C 62P M16C 65C Slow read mode No Yes Low current consumption read mode No Yes Table 2 10 Difference in the Register Associated with Power Control Symbol Address Bit Differences m idu M16C 62P M16C 65C M16C 62P M16C 65C FMR2 0222h M16C 65C only 2 6 Differences in Processor Mode Table 2 11 lists Differences in Registers Associated with Processor Mode Table 2 11 Address Differences in Registers Associated with Processor Mode Differences M16C 62P M16C 65C M16C 62P CS2 area switch bit 0 08000h to 26FFFh block A disabled 1 10000h to 26FFFh block A enabled M16C 65C CS2 area switch bit 0 CS2 area OE000h to OFFFFh 1 Data flash OEOO0h to OFFFFh M16C 65C only RO1AN0443EJ0100 Rev 1 00 Jul 29 2011 2tENESAS Page 10 of 31 M16C 62
36. lect patna ee ROM code protect select function function after reset 9 ROM code protect function e VdetO select function Voltage monitor 0 reset function after hardware reset User ROM User ROM Program ROM 1 080000h to OFFFFFh Flash Manon m Program ROM 080000h to OFFFFFh Program ROM 2 010000h to 013FFFh Memory ymap Data flash Data flash Block A 00F000h to OOFFFFh Block A 00EO000h to OOEFFFh Block B OOFOOOh to OOFFFFh 64 KB x 7 User ROM 32 KB x 1 64 KB x 8 512 Kbyte 8KBx3 16 KB x 1 program ROM 2 4KBx2 Data flash 4 KB x 1 block A 4 KB x 2 block A block B Program method In units of 1 word 16 bit In units of 2 words 32 bit Erase method Erase all unlocked blocks block erase Block erase User boot mode No Yes Note 1 Refer to the User s Manual Hardware for electrical characteristics and more details RO1AN0443EJ0100 Rev 1 00 Jul 29 2011 2tENESAS Page 5 of 31 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C 1 2 Pin Characteristics Table 1 4 lists Differences in Pin Characteristics Table 1 4 Differences in Pin Characteristics M16C 62P M16C 65C Changes from M16C 62P P9_4 TB4IN DA1 P9_4 TB4IN DA1 PWM1 Added PWM1 P9 3 TB3IN DAO P9 3 TB3IN DAO PWMO Added PWMO P9 2 TB2IN SOUT3 P9 2 TB2IN SOUT3 PMCO Added PMCO P9 1 TB1IN SIN3 P9 1 TB1IN SIN3 PMC1 Added PMC1 P8
37. r General Precautions in the Handling of MPU MCU Products and in the body of the manual differ from each other the description in the body of the manual takes precedence 1 Handling of Unused Pins Handle unused pins in accord with the directions given under Handling of Unused Pins in the manual The input pins of CMOS products are generally in the high impedance state In operation with an unused pin in the open circuit state extra electromagnetic noise is induced in the vicinity of LSI an associated shoot through current flows internally and malfunctions occur due to the false recognition of the pin state as an input signal become possible Unused pins should be handled as described under Handling of Unused Pins in the manual Processing at Power on The state of the product is undefined at the moment when power is supplied The states of internal circuits in the LSI are indeterminate and the states of register settings and pins are undefined at the moment when power is supplied In a finished product where the reset signal is applied to the external reset pin the states of pins are not guaranteed from the moment when power is supplied until the reset process is completed In a similar way the states of pins in a product that is reset by an on chip power on reset function are not guaranteed from the moment when power is supplied until the power reaches the level at which resetting has been specified Prohibition of Acces
38. rCENESAS APPLICATION NOTE M16C 62P Group M16C 65C Group R01ANO0443EJ0100 Differences between M16C 62P and M16C 65C Rev 1 00 Jul 29 2011 Abstract The following document describes differences between M16C 62P 100 pin version and M16C 65C 100 pin version Refer to each device s hardware manual for details Products MCUs M16C 62P Group M16C 65C Group With its enhanced peripheral functions the M16C 65C Group MCU has pin assignments and peripheral functions that are compatible with the M16C 62P Group making it simple to replace the M16C 62P Group with the M16C 65C Group RO1AN0443EJ0100 Rev 1 00 2tENESAS Page 1 of 31 Jul 29 2011 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C Contents 1 ITT RTC ET T IM 3 1 1 Differences in Functions israse nanena a aeaa aa aa a aR aE AA Ea EE aa A aa aE EAN E i 3 1 2 Pin CharaciernistiC S m 6 2 Detailed Comparison ca E 7 2 1 Differences in Protection ceccccceeccecceceeceeeeee eee eeceeeaaeaeeaeceeeeeeeeeeecaaeaaaaeaaeaaeeeeeeeeeeeseececenieeeeeeeees 7 2 2 Differences In RESET cescccsiescccdextadvauccsiabstecutexensvanssesussdaaducesneaaeacvansdawadastns EEE Aa TADAA Eaa aadi 7 2 3 Differences in Voltage Detector ssesnissrsrsisirss resisa naaa annn EA NRSA ARADEA KANNEN KAn ANNAS 8 2 4 Differences in Clock Generator cceccccceessnececesesneeeeescaeeeeeeseaeeeeesesaaeeeesecaaeeeeessaaeeesseeseeeeeeeseaas 9 2 5
39. register M16C 65C only M16C 65C only RO1AN0443EJ0100 Rev 1 00 Jul 29 2011 2tENESAS Page 11 of 31 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C 2 8 Differences in Programmable I O Port Table 2 14 lists Difference in Programmable I O Port and Table 2 15 lists Differences in Registers Associated with Programmable I O Port Table 2 14 Difference in Programmable I O Port Item M16C 62P M16C 65C Selectable whether the digital filter is used or not with the NMIDF register NMI SD digital filter Table 2 15 Differences in Registers Associated with Programmable I O Port Address Differences M16C 62P M16C 65C M16C 62P M16C 65C Port P8 5 direction bit 0 Input mode No register bit Functions as an input port 1 Output mode Functions as an output port Different addresses Different addresses Different addresses Different addresses No register bit Reserved bit No register bit CEC output enable bit No register bit INT6 input enable bit No register bit INT input enable bit No register bit Key input enable bit M16C 65C only RO1AN0443EJ0100 Rev 1 00 2tENESAS Page 12 of 31 Jul 29 2011 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C 2 9 Differences in Interrupts Table 2 16 lists Difference in Interrupts and Table 2 17 to Table 2 18 list Dif
40. roducts described in this document within the range specified by Renesas Electronics especially with respect to the maximum rating operating supply voltage range movement power voltage range heat radiation characteristics installation and other product characteristics Renesas Electronics shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges 9 Although Renesas Electronics endeavors to improve the quality and reliability of its products semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions Further Renesas Electronics products are not subject to radiation resistance design Please be sure to implement safety measures to guard them against the possibility of physical injury and injury or damage caused by fire in the event of the failure of a Renesas Electronics product such as safety design for hardware and software including but not limited to redundancy fire control and malfunction prevention appropriate treatment for aging degradation or any other appropriate measures Because the evaluation of microcomputer software alone is very difficult please evaluate the safety of the final products or system manufactured by you 10 Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electroni
41. s to Reserved Addresses Access to reserved addresses is prohibited The reserved addresses are provided for the possible future expansion of functions Do not access these addresses the correct operation of LSI is not guaranteed if they are accessed Clock Signals After applying a reset only release the reset line after the operating clock signal has become stable When switching the clock signal during program execution wait until the target clock signal has stabilized When the clock signal is generated with an external resonator or from an external oscillator during a reset ensure that the reset line is only released after full stabilization of the clock signal Moreover when switching to a clock signal produced with an external resonator or by an external oscillator while program execution is in progress wait until the target clock signal is stable Differences between Products Before changing from one product to another i e to one with a different part number confirm that the change will not lead to problems The characteristics of MPU MCU in the same group but having different part numbers may differ because of the differences in internal memory capacity and layout pattern When changing to products of different part numbers implement a system evaluation test for each of the products Notice 1 All information included in this document is current as of the date this document is issued Such informat
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43. should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations You should not use Renesas Electronics products or the technology described in this document for any purpose relating to military applications or use by the military including but not limited to the development of weapons of mass destruction Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture use or sale is prohibited under any applicable domestic or foreign laws or regulations 6 Renesas Electronics has used reasonable care in preparing the information included in this document but Renesas Electronics does not warrant that such information is error free Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein 7 Renesas Electronics products are classified according to the following three quality grades Standard High Quality and Specific The recommended applications for each Renesas Electronics product depends on the product s quality grade as indicated below You must check the quality grade of each Renesas Electronics product before using it in a particular application You may not use any Renesas Electronics product for any application categorized as Specific without the prior written consent of Renesas Electronics Further you may not
44. t addresses ee ee EUM 3 LSYN 1 Reserved bit U1SMR2 0372h 0256h Different addresses U1SMR3 0371h 0255h Different addresses U1SMR4 0370h 0254h Different addresses U1TB OSAAh to 025Ah to 025Bh Different addresses O3ABh U2BRG 0379h 0269h Different addresses U2CO 037Ch 026Ch Different addresses U2C1 037Dh 026Dh Different addresses U2MR 0378h 0268h Different addresses U2RB 037Eh to 037Fh 026Eh to 026Fh Different addresses Different addresses col aid cual 3 LSYN 1 Reserved bit U2SMR2 0376h 0266h Different addresses U2SMR3 0375h 0265h Different addresses U2SMR4 0374h 0264h Different addresses U2TB 037Ah to 037Bh 026Ah to 026Bh Different addresses Note 1 Only enabled in M3062LFGPFP and M3062LFGPGP This is a reserved bit in other products RO1AN0443EJ0100 Rev 1 00 Jul 29 2011 2tENESAS Page 24 of 31 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C Table 2 33 Differences in Registers Associated with Serial Interface 2 2 Address Differences Symbol Bit M16C 62P M16C 65C M16C 62P M16C 65C U5BRG 0289h M16C 65C only U5CO 028Ch M16C 65C only U5C1 028Dh M16C 65C only U5MR 0288h M16C 65C only U5RB 028Eh to 028Fh M16C 65C only U5SM
45. tion Mode Bit Extended pin select bit 0 0 ANEXO and ANEX1 are not used 0 0 ANEXO and ANEX1 are not used 7 6 0 1 ANEXO input is A D converted 0 1 ANEXO input is A D converted 1 0 ANEX1 input is A D converted 1 0 ANEX1 input is A D converted 1 1 External op amp connection 1 1 Do not set mode A D Conversion Method Select Bit 0 0 Without sample and hold function No register bit 1 With sample and hold function ADCON2 03D4h 03D4h cO fAD select bit 7 No register bit 0 f1 1 fOCO40M AINRST 03A2h M16C 65C only RO1AN0443EJ0100 Rev 1 00 2tENESAS Page 26 of 31 Jul 29 2011 M16C 62P Group M16C 65C Group Differences between M16C 62P and M16C 65C 2 16 Differences in CRC Calculator Table 2 36 lists Differences in CRC Calculator and Table 2 37 lists Differences in Registers Associated with CRC Calculator Table 2 36 Differences in CRC Calculator Item M16C 62P M16C 65C CRC CCITT X16 X12 X5 1 or 2 16 4 X12 4 X5 CRC generator polynomial CRC CCITT X16 X12 X5 1 CRC 16 X16 X15 X2 1 MSB LSB selection No MSB LSB selectable CRC snoop No Yes Table 2 37 Differences in Registers Associated with CRC Calculator Address Differences Symbol Bit M16C 62P M16C 65C M16C 62P M16C 65C CRCMR 03B6h M16C 65C only CRCSAR 03B4h to 03B5h M16C 65C only 2 17 Differences in
46. to 032Bh Different addresses TA4 038Eh to 038Fh 032Eh to O32Fh Different addresses TA11 0342h to 0343h 0302h to 0303h Different addresses TA21 0344h to 0345h 0304h to 0305h Different addresses TA41 0346h to 0347h 0306h to 0307h Different addresses TB2SC 039Eh 033Eh Different addresses TB2 0394h to 0395h 0334h to 0335h Different addresses TRGSR 0383h 0323h Different addresses TABSR 0380h 0320h Different addresses PDRF 030Eh M16C 65C only PFCR 0318h M16C 65C only TPRC 01DAh M16C 65C only RO1AN0443EJ0100 Rev 1 00 2tENESAS Page 22 of 31 Jul 29 2011 M16C 62P Group M16C 65C Group 2 14 Differences in Serial Interface Table 2 31 lists Differences in Serial Interface and Table 2 32 to Table 2 33 list Differences in Registers Associated with Serial Interface Table 2 31 Differences in Serial Interface Differences between M16C 62P and M16C 65C Item M16C 62P M16C 65C Clock synchronous asynchronous 12C mode Special mode 2 IE mode 3 channels UARTO to UART2 6 channels UARTO to 2 UARTS to 7 Clock selection for UARTO to 2 and UARTS to 7 prior to division f1 only Selectable from f1 and fOCO F Output control after SI O3 4 transmission The state of pins SOUT3 and SOUT4 is high impedance after transmission The state after transmission can be selected whether to set high impedanc
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