TPA3123D2 - Texas Instruments
Contents
1. TPA3123D2 INSTRUMENTS SLOS541C JULY 2007 REVISED AUGUST 2010 www ti com TYPICAL CHARACTERISTICS All tests are made at frequency 1 kHz unless otherwise noted TOTAL HARMONIC DISTORTION NOISE TOTAL HARMONIC DISTORTION NOISE vs vs FREQUENCY FREQUENCY 10 10 s z ES 18V Vec 24 V 9 R 40 SE g R 40 SE 2 Gain 20 dB Gain 20 dB 9 1 9 1 t Po 5W 5 P 10W 2 a a o o 2 2 E Po 1W 1 I 04 x I 04 X T 2 5 Po 5W Q Q I I 0 01 0 01 20 100 1k 10k 20k 20 100 1k 10k 20k f Frequency Hz f Frequency Hz Figure 1 Figure 2 TOTAL HARMONIC DISTORTION NOISE TOTAL HARMONIC DISTORTION NOISE vs vs FREQUENCY OUTPUT POWER 10 FE TTTTITI Pa 10 x Vec 24 V 1 Rj 40 SE di o Gain 20 dB 82. 10 V to 30V 10V to 30V VCLAMP Shutdown Control Mute Control gt 4 Step Gain Control AN Please be aware that an important notice concerning availability standard warranty and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet System Two Audio Precision are trademarks of Audio Precision Inc PRODUCTION DATA information is current as of publication date Copyright 2007 2010 Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty Production processing does not necessarily include testing of all parameters TEXAS INSTRUMENTS TPA3123D2 SLOS541C JULY 2007 REVISED AUGUST 2010 www ti com These devices have limited built in ESD protection The leads should be shorted together the device placed conductive foam hid during storage or handling to prevent electrostatic damage to the MOS gates PWP TSSOP PACKAGE TOP VIEW PVCCL 10 PGNDL SD 2 PGNDL PVCCL 3 LOUT MUTE 4 BSL LIN 5 AVCC RIN 6 AVCC BYPASS 7 GAINO AGND 8 GAIN1 AGND BSR PVCCR ROUT VCLAMP PGNDR PVCCR PGNDR Table 1 PIN FUNCTIONS PIN NAME 1 O P DESCRIPTION 2 Shutdown signal for IC low disabled high operational TTL logic levels with compliance to AVCC RIN 6 A
3. TEXAS INSTRUMENTS TPA3123D2 www ti com SLOS541C JULY 2007 REVISED AUGUST 2010 25 W STEREO CLASS D AUDIO POWER AMPLIFIER Check for Samples TPA3123D2 FEATURES APPLICATIONS 25 W ch into a 4 Q Load from a 27 V Supply Televisions 20 W ch into 4 Load from a 24 V Supply Operates from 10 V to 30 V DESCRIPTION Efficient Class D Operation Eliminates Need The TPA3123D2 is a 25 W per channel efficient for Heat Sinks Class D audio power amplifier for driving stereo speakers in a single ended configuration or a mono Four Selectable Fixed Gain Settings speaker in a bridge tied load configuration The Internal Oscillator No External Components TPA3123D2 can drive stereo speakers as low as 4 O Required The efficiency of the TPA3123D2 eliminates the need Single Ended Analog Inputs for an external heat sink when playing music Thermal and Short Circuit Protection With The gain of the amplifier is controlled by two gain Auto Recovery select pins The gain selections are 20 26 32 Space Saving Surface Mount 24 TSSOP Package The patented start up and shut down sequences Pin to Pin compatible with TPA3120D2 minimize pop noise in the speakers without additional circuitry Advanced Power Off Pop Reduction SIMPLIFIED APPLICATION CIRCUIT TPA3123D2 0 22 uF Left Channel gt 3l Right Channel gt J 22uH 470 uF BYPASS d 22H 70 AGND
4. TEXAS INSTRUMENTS www ti com 7 Nov 2014 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead Ball Finish MSL Peak Temp Temp Device Marking Samples Drawing Qty 6 3 4 5 TPA3123D2PWP ACTIVE HTSSOP PWP 24 60 Green RoHS CU NIPDAU Level 3 260C 168 HR 40 to 85 TPA3123D2 Samples 1 amp no Sb Br amples TPA3123D2PWPG4 ACTIVE HTSSOP PWP 24 60 Green RoHS CU NIPDAU Level 3 260C 168 HR 40 to 85 TPA3123D2 Samples 1 amp no Sb Br amples TPA3123D2PWPR ACTIVE HTSSOP PWP 24 2000 Green RoHS CU NIPDAU Level 3 260C 168 HR 40 to 85 TPA3123D2 Samples 1 amp no Sb Br amples TPA3123D2PWPRG4 ACTIVE HTSSOP PWP 24 TBD Call TI Call TI 40 to 85 The marketing status values are defined as follows ACTIVE Product device recommended for new designs LIFEBUY TI has announced that the device will be discontinued and a lifetime buy period is in effect NRND Not recommended for new designs Device is in production to support existing customers but TI does not recommend using this part in a new design PREVIEW Device has been announced but is not in production Samples may or may not be available OBSOLETE has discontinued the production of the device Eco Plan The planned eco friendly classification Pb Free ROHS Pb Free RoHS Exempt or Green RoHS 8 no Sb Br please check http www ti com productcontent for the latest availability informatio
5. IN Input Signal H LI The 3 dB frequency be calculated using Equation 1 Use the Z values given in Table 2 Copyright 2007 2010 Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Link s TPA3123D2 TEXAS INSTRUMENTS TPA3123D2 SLOS541C JULY 2007 REVISED AUGUST 2010 www ti com INPUT CAPACITOR C In the typical application an input capacitor C is required to allow the amplifier to bias the input signal to the proper dc level for optimum operation In this case C and the input impedance of the amplifier 27 form a high pass filter with the corner frequency determined in Equation 2 3 f 2 The value of is important as it directly affects the bass low frequency performance of the circuit Consider the example where Z is 20 and the specification calls for a flat bass response down to 20 Hz Equation 2 is reconfigured as Equation 3 1 2 Zi f 3 In this example is 0 4 uF so one would likely choose a value of 0 47 uF as this value is commonly used If the gain is known and is constant use 2 from Table 2 to calculate C A further consideration for this capacitor is the leakage path from the input source through the input network Cj and the feedback network to the load This leakage current creates a dc offset voltage at the input to the amplifier that reduces useful headroom especially in high gain applic
6. 20k 100k f Frequency Hz A Dashed Figure 9 OUTPUT POWER vs SUPPLY VOLTAGE 17 100 16 R 8 Q SE NG 15 Gain 20 dB 14 80 13 0 gt 42 THD 10 70 5 2 9 11 60 10 3 5 9 50 g 8 i E 40 0 L 6 THD 1 aii 5 4 20 3 10 2 1 0 10 12 14 16 18 20 22 24 26 28 30 Supply Voltage V Figure 11 Submit Documentation Feedback TEXAS INSTRUMENTS www ti com OUTPUT POWER vs SUPPLY VOLTAGE R 40 SE Gain 20 dB 7 4 THD 10 THD 1 10 12 14 16 18 20 22 24 26 28 30 Vss Supply Voltage V line represents thermally limited region Figure 10 EFFICIENCY vs OUTPUT POWER 0 2 4 6 8 10 12 14 16 18 20 Po Output Power W Figure 12 Copyright 2007 2010 Texas Instruments Incorporated Product Folder Link s TPA3123D2 TEXAS INSTRUMENTS www ti com TPA3123D2 SLOS541C JULY 2007 REVISED AUGUST 2010 TYPICAL CHARACTERISTICS continued All tests are made at frequency 1 kHz unless otherwise noted EFFICIENCY vs OUTPUT POWER 100 90 80 70 60 50 Efficiency 40 30 20 10 0 1 2 3 4 5 6 7 8 9 10 1 12 Po Output Power W Figure 13 SUPPLY CURRENT vs O
7. kHz mute delay time from mute input switches high until outputs 120 msec At muted time from mute input switches low until outputs unmute delay unmuted 120 msec 4 Submit Documentation Feedback Copyright 2007 2010 Texas Instruments Incorporated Product Folder Link s TPA3123D2 TEXAS INSTRUMENTS www ti com AVCC TPA3123D2 SLOS541C JULY 2007 REVISED AUGUST 2010 FUNCTIONAL BLOCK DIAGRAM LIN AGND lt gt MUTE BYPASS GAIN1 GAINO RIN BSL PAVDD gt PVCCL REGULATOR 4 HS e reef OUT E vcLAMP IH i LS AVDD T AVDD PGNDL Ep 5 ow 1 e SC NE AVDD 2 DETECT CONTROL m Hal BIAS e _ lt gt VCLAMP THERMAL MUTE CONTROL 9 LETS OSC RAMP e BYPASS CONTROL SQ J DETECT 1 BSR PVCCR 1 11 HS 7 4A HO ROUT 4 CA VELAMP H o it LS Ss PGNDR Tl T AVDD he NW AVDD2 L Copyright 2007 2010 Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link s TPA3123D2 TEXAS
8. resistance ESR ceramic capacitor typically 0 1 uF to 1 uF placed as close as possible to the device Vcc lead works best For filtering lower frequency noise signals a larger aluminum electrolytic capacitor of 470 uF or greater placed near the audio power amplifier is recommended The 470 uF capacitor also serves as local storage capacitor for supplying current during large signal transients on the amplifier outputs The PVCC terminals provide the power to the output transistors so a 470 uF or larger capacitor should be placed on each PVCC terminal 10 uF capacitor on the AVCC terminal is adequate These capacitors must be properly derated for voltage and ripple current rating to ensure reliability BSN and BSP Capacitors The half H bridge output stages use only NMOS transistors Therefore they require bootstrap capacitors for the high side of each output to turn on correctly A 220 nF ceramic capacitor rated for at least 25 V must be connected from each output to its corresponding bootstrap input Specifically one 220 nF capacitor must be connected from LOUT to BSL and one 220 nF capacitor must be connected from ROUT to BSR The bootstrap capacitors connected between the BSx pins and their corresponding outputs function as a floating power supply for the high side N channel power MOSFET gate drive circuitry During each high side switching cycle the bootstrap capacitors hold the gate to source voltage high enough to keep the high side MOSF
9. shows the recommended wire size for the power supply and load cables of the APA system The real concern is the dc or ac power loss that occurs as the current flows through the cable These recommendations are based on 12 inch 30 5 cm long wire with a 20 kHz sine wave signal at 25 C Table 5 Recommended Minimum Wire Size for Power Cables DC POWER LOSS AC POWER LOSS Pour W AMG Size mW mW 10 4 18 22 16 40 18 42 2 4 18 22 3 2 8 3 7 8 5 1 8 22 28 2 8 2 1 8 1 lt 0 75 8 22 28 1 5 6 1 1 6 6 2 22 Submit Documentation Feedback Copyright 2007 2010 Texas Instruments Incorporated Product Folder Link s TPA3123D2 TEXAS INSTRUMENTS TPA3123D2 www ti com SLOS541C JULY 2007 REVISED AUGUST 2010 REVISION HISTORY Changes from Original July 2007 to Revision A Page e Changed the device status From Product Preview To Production cccceeceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeseeeseeeseaeeseeeteaeeseaeeeeene 1 Changes from Revision A August 2007 to Revision B Page Changed the INPUT IMPEDANCE values in Table 2 13 Changes from Revision B September 2007 to Revision C Page Replaced the Dissipations Ratings Table with the Thermal Information Table 2 3 Copyright 2007 2010 Texas Instruments Incorporated Submit Documentation Feedback 23 Product Folder Link s TPA3123D2 H PACKAGE OPTION ADDENDUM
10. ti com communications Data Converters DLP Products DSP Clocks and Timers Interface Logic Power Mgmt Microcontrollers RFID OMAP Applications Processors Wireless Connectivity dataconverter ti com www dlp com www ti com clocks interface ti com logic ti com microcontroller ti com www ti rfid com www ti com omap Computers and Peripherals Consumer Electronics Energy and Lighting Industrial Medical Security Space Avionics and Defense Video and Imaging TI E2E Community www ti com wirelessconnectivity www ti com computers www ti com consumer apps www ti com energy www ti com industrial www ti com medical www ti com security www ti com space avionics defense www ti com video Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2014 Texas Instruments Incorporated
11. uF Control Es 1 0 pF ES 0 1 pF 10 uF gt e Figure 27 Schematic for Single Ended SE Configuration 22 uH 470 pF 470 pF pala A 30UT 11 1 0 pF 1 PVCCL PGNDL In 2 sp 2 BAe 3 PvccL LouT 22 2 MUTE maa ea 6 LIN TPA3123p2 AVCCI o NA RIN avec 13 AGND GANIT In 94 AGND Z BSR 2 d TITO pF 410 2 ROUT 15 gia VCLAMP PGNDR 149 pia 112 pvccR PGNDR 10 68 uF 25 Shutdown Control 4 OUT Mute Control Alis 1 0 pF fo 04 uF TO uF 2 Figure 28 Schematic for Bridge BTL Configuration 18 Submit Documentation Feedback Copyright 2007 2010 Texas Instruments Incorporated Product Folder Link s TPA3123D2 TEXAS INSTRUMENTS TPA3123D2 www ti com SLOS541C JULY 2007 REVISED AUGUST 2010 BASIC MEASUREMENT SYSTEM This application note focuses on methods that use the basic equipment listed below Audio analyzer or spectrum analyzer Digital multimeter DMM Oscilloscope Twisted pair wires Signal generator Power resistor s Linear regulated power supply Filter components EVM or other complete audio circuit Figure 29 shows the block diagrams of basic measurement systems for class AB and class D amplifiers A sine wave is normally used as the input signal because it consists of the fundamental frequency only no other harmonics are present
12. 200 0 100 10 24 V 0 R 80 BTL Gain 20 dB 720 Line 33 pH 100 Crit 1 WF 30 200 20 100 1k 10k 200k f Frequency Hz Figure 19 Submit Documentation Feedback Phase THD N Total Harmonic Distortion Noise Yo Po Output Power W TEXAS INSTRUMENTS www ti com TOTAL HARMONIC DISTORTION NOISE vs OUTPUT POWER 10 8 2 BTL Gain 20 dB Vec 24 V 1 Vec 18V UH Vec 12V 0 1 0 01 10m 100 m 1 10 40 Po Output Power W Figure 18 OUTPUT POWER vs SUPPLY VOLTAGE R82 BTL Gain 20 dB 0 10 12 14 16 18 20 22 24 26 28 30 Supply Voltage V A Dashed line represents thermally limited region Figure 20 Copyright 2007 2010 Texas Instruments Incorporated Product Folder Link s TPA3123D2 TEXAS INSTRUMENTS TPA3123D2 www ti com SLOS541C JULY 2007 REVISED AUGUST 2010 TYPICAL CHARACTERISTICS continued All tests are made at frequency 1 2 unle
13. 3 Class D Modulation for TPA3123D2 SE Configuration ov ov Differential Voltage ov Across Speaker Vcc Output Current NIT ET Figure 24 Class D Modulation for TPA3123D2 BTL Configuration Supply Pumping One issue encountered in single ended SE class D amplifier designs is supply pumping Power supply pumping is a rise in the local supply voltage due to energy being driven back to the supply by operation of the class D amplifier This phenomenon is most evident at low audio frequencies and when both channels are operating at the same frequency and phase At low levels power supply pumping results in distortion in the audio output due to fluctuations in supply voltage At higher levels pumping can cause the overvoltage protection to operate which temporarily shuts down the audio output 12 Submit Documentation Feedback Copyright 2007 2010 Texas Instruments Incorporated Product Folder Link s TPA3123D2 TEXAS INSTRUMENTS TPA3123D2 www ti com SLOS541C JULY 2007 REVISED AUGUST 2010 Several things be done to relieve power supply pumping The lowest impact is to operate the two inputs out of phase 180 and reverse the speaker connections Because most audio is highly correlated this causes the supply pumping to be out of phase and not as severe If this is not enough the amount of bulk capacitance on the supply must be increased Also improvement is realized by hooking other supplies to this node there
14. 80 SE 2201 2 Gain 20 dB x Vec 224V c TAH 9 T 8 1 5 1 Voc 18V 2 Po 2 5W 2 2 a 2 Vec 12V c o E E I Po 5W I 04 X 0 1 5 N 5 o x 2 z Po 1w 5 a T 0 01 0 01 20 100 1k 10k 20k 10m 100 m 1 10 40 f Frequency Hz Po Output Power W Figure 3 Figure 4 6 Submit Documentation Feedback Copyright 2007 2010 Texas Instruments Incorporated Product Folder Link s TPA3123D2 TEXAS INSTRUMENTS www ti com THD N Total Harmonic Distortion Noise Crosstalk dB Copyright 2007 2010 Texas Instruments Incorporated TYPICAL CHARACTERISTICS continued All tests are made at frequency 1 kHz unless otherwise noted TOTAL HARMONIC DISTORTION NOISE vs OUTPUT POWER 10 R 8 SE Gain 20 dB Vee 24 V I 1 Vec 18V Hi Vee 712V 0 1 0 01 10m 100 m 1 10 40 Po Output Power W Figure 5 CROSSTALK VS FREQUENCY 0 Vcc 18 V 40 y 20 R 280 Gain 20 dB 30 40 50 LtoR 60 70 RtoL 80 90 100 20 100 1k 10k 20k f Frequency Hz Figure 7 Gain dB TPA3123D2 SLOS541C JULY 2007 REVISED AUGUST 2010
15. An analyzer is then connected to the audio power amplifier APA output to measure the voltage output The analyzer must be capable of measuring the entire audio bandwidth A regulated dc power supply is used to reduce the noise and distortion injected into the APA through the power pins A System Two audio measurement system AP II by Audio Precision includes the signal generator and analyzer in one package The generator output and amplifier input must be ac coupled However the EVMs already have the ac coupling capacitors Cn so no additional coupling is required The generator output impedance should be low to avoid attenuating the test signal and is important because the input resistance of APAs is not high Conversely the analyzer input impedance should be high The output resistance Royr of the APA is normally in the hundreds of milliohms and can be ignored for all but the power related calculations Figure 29 a shows a class AB amplifier system It takes an analog signal input and produces an analog signal output This amplifier circuit can be directly connected to the AP II or other analyzer input This is not true of the class D amplifier system shown in Figure 29 b which requires low pass filters in most cases in order to measure the audio output waveforms This is because it takes an analog input signal and converts it into a pulse width modulated PWM output signal that is not accurately processed by some analyzers Cop
16. DIMENSIONS TAPE DIMENSIONS Dimension designed to accommodate the component width Bo Dimension designed to accommodate the component length Dimension designed to accommodate the component thickness Y Overall width of the carrier tape Pitch between successive cavity centers 4 W1 TAPE AND REEL INFORMATION All dimensions are nominal Device Package Package SPQ Reel Reel AO BO KO P1 Pin1 Type Drawing Diameter Width mm mm mm mm mm Quadrant mm W1 mm TPA3123D2PWPR HTSSOP PWP 24 2000 330 0 16 4 6 95 8 3 1 6 8 0 16 0 Q1 Pack Materials Page 1 ip TEXAS PACKAGE MATERIALS INFORMATION INSTRUMENTS www ti com 14 Jul 2012 TAPE AND REEL BOX DIMENSIONS All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length mm Width mm Height mm TPA3123D2PWPR HTSSOP PWP 24 2000 367 0 367 0 38 0 Pack Materials Page 2 MECHANICAL DATA PWP R PDSO G24 PowerPAD PLASTIC SMALL OUTLINE Seating Plane A All linear dimensions are i
17. ETs turned on Copyright 2007 2010 Texas Instruments Incorporated Submit Documentation Feedback 15 Product Folder Link s TPA3123D2 TEXAS INSTRUMENTS TPA3123D2 SLOS541C JULY 2007 REVISED AUGUST 2010 www ti com VCLAMP Capacitor To ensure that the maximum gate to source voltage for the NMOS output transistors is not exceeded internal regulator clamps the gate voltage One 1 uF capacitor must be connected from VCLAMP pin 11 to ground and must be rated for at least 16 V The voltages at the VCLAMP terminal may vary with and may not be used for powering any other circuitry VBYP Capacitor Selection The scaled supply reference nominally provides 8 internal bias for the preamplifier stages external capacitor for this reference Cpyp is a critical component and serves several important functions During start up or recovery from shutdown mode Cpyp determines the rate at which the amplifier starts The start up time is proportional to 0 5 s per microfarad Thus the recommended 1 uF capacitor results in a start up time of approximately 500 ms The second function is to reduce noise produced by the power supply caused by coupling with the output drive signal This noise could result in degraded power supply rejection and THD N The circuit is designed for a Cpyp value of 1 uF for best pop performance The input capacitors should have the same value A ceramic or tantalum low ESR capac
18. Link s TPA3123D2 TEXAS INSTRUMENTS www ti com ABSOLUTE MAXIMUM RATINGS over operating free air temperature range unless otherwise noted 0 TPA3123D2 SLOS541C JULY 2007 REVISED AUGUST 2010 VALUE UNIT Voc Supply voltage AVCC PVCC 0 3 to 36 V Vi Logic input voltage SD MUTE GAINO GAIN1 0 3 to Voc 0 3 V Analog input voltage RIN LIN 0 3 to 7 V Continuous total power dissipation See the Thermal Information table Ta Operating free air temperature range 40 to 85 C Ty Operating junction temperature range 40 to 150 C Tstg Storage temperature range 65 to 150 C RL Load resistance minimum value 3 2 Q FAN Human body model all pins t2 kV ESD Electrostatic Discharge Charged device model all pins 500 V 1 Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device These are stress ratings only and functional operations of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied Exposure to absolute maximum rated conditions for extended periods may affect device reliability THERMAL INFORMATION TPA3123D2 THERMAL 102 PWP UNITS 24 PINS OJA Junction to ambient thermal resistance 30 2 OJCtop Junction to case top thermal resistance 27 8 Junction to board thermal resistance 6 8 CA
19. N WIT Junction to top characterization parameter 0 3 VJB Junction to board characterization parameter 32 1 OJCbot Junction to case bottom thermal resistance 0 5 1 For more information about traditional and new thermal metrics see the C Package Thermal Metrics application report SPRA953 2 For thermal estimates of this device based on PCB copper area see the PCB Thermal Calculator RECOMMENDED OPERATING CONDITIONS MIN MAX UNIT Voc Supply voltage PVCC AVCC 10 30 V Vin High level input voltage SD MUTE GAINO GAIN1 2 V Vi Low level input voltage SD MUTE GAINO GAIN1 0 8 V SD Vi Vee Vec 30 V 125 High level input current MUTE Voc Voc 30 V 125 uA GAINO GAIN1 Vi Vee Voc 24 V 125 SD 0 Voc 30 V 1 lit Low level input current MUTE 0 V Voc 30V 1 uA GAINO GAIN1 0 V Vcc 24 V 1 TA Operating free air temperature 40 85 C Copyright 2007 2010 Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link s TPA3123D2 TEXAS TPA3123D2 INSTRUMENTS SLOS541C JULY 2007 REVISED AUGUST 2010 www ti com DC CHARACTERISTICS 25 Voc 24 V 4 unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP UNIT Class D output offset voltage Vos
20. UTPUT POWER Icc Supply Current A 0 25 5 7 5 10 12 5 15 17 5 20 22 5 25 Po Output Power W Figure 15 Copyright O 2007 2010 Texas Instruments Incorporated Product Folder Link s 7 Supply Current A Power Supply Rejection Ratio dB SUPPLY CURRENT vs OUTPUT POWER 0 4 8 12 16 20 24 28 32 36 40 Po Output Power W Figure 14 POWER SUPPLY REJECTION RATIO vs FREQUENCY Vec 224V Vovripple 9 2 207 40 SE 30 Gain 20 dB 20 100 1k 10k 20k f Frequency Hz Figure 16 Submit Documentation Feedback 9 TPA3123D2 TPA3123D2 SLOS541C JULY 2007 REVISED AUGUST 2010 TYPICAL CHARACTERISTICS continued All tests are made at frequency 1 2 unless otherwise noted Gain dB 10 THD N Total Harmonic Distortion Noise TOTAL HARMONIC DISTORTION NOISE vs FREQUENCY 10 Vec 224V R 8 O BTL Gain 20 dB Po 20W 0 1 0 01 0 001 20 100 1k 10k 20k f Frequency Hz Figure 17 GAIN PHASE vs FREQUENCY 30 400 20 Gain 300 10 Phase
21. Vec 18V Vg 1 Vrms R 4 SE Gain 20 dB CROSSTALK vs FREQUENCY a 5 a 2 o 100 1k 10k 20k f Frequency Hz Figure 6 GAIN PHASE VS FREQUENCY 200 Gain 20 100 15 0 a Phase 9 10 Vcc 24 100 Rj 4 SE 5 Gain 20 dB Lii 33 UH filt Hu 200 1 HF 0 470 300 20 100 200 1k 2k 10k 20k 100k f Frequency Hz Submit Documentation Feedback Product Folder Link s TPA3123D2 Figure 8 7 TPA3123D2 SLOS541C JULY 2007 REVISED AUGUST 2010 TYPICAL CHARACTERISTICS continued All tests are made at frequency 1 2 unless otherwise noted Gain dB GAIN PHASE vs FREQUENCY 200 32 30 22 5 150 Gain 20 400 26 24 17 5 50 22 o 20 2 15 0 ow 18 E S 16 12 5 50 i Voc 224V 8 14 Rj 80 SE 100 12 Gain 20 dB a 10 Lei 47 pH 150 7 5 2 8 f 0 22 pF 470 200 5 ijti iti 4 jj tt 4 250 2 20 100 200 1k 2k 10k
22. advantage of its heat dissipating abilities refer to Technical Brief PowerPAD Thermally Enhanced Package Texas Instruments Literature No SLMA002 and Application Brief PowerPAD Made Easy Texas Instruments Literature No SLMA004 Both documents are available at www ti com The exposed thermal pad dimensions for this package are shown in the following illustration Exposed Thermal Pad Top View Exposed Thermal Pad Dimensions 4206332 29 AJ 10 14 NOTE All linear dimensions are in millimeters AN Exposed tie strap features may not be present PowerPAD is a trademark of Texas Instruments TEXAS INSTRUMENTS www ti com LAND PATTERN DATA PWP R PDS0 624 PowerPAD PLASTIC SMALL OUTLINE Example Board Layout Stencil Openings Via pattern and copper pad size Based on a stencil thickness may vary depending on layout constraints of 127mm 005inch Reference table below for other Increasing copper area will solder stencil thicknesses enhance thermal performance 150 5 af 2220 65 Ge Note D 4x0 25 18x90 5 See Note E X Z 4 87 Sa TTT See Note C D 22x0 65 2 4 3 4 5 6 ionin aniti i Example Non Soldermask Defined Pad Example Solder Mask Opening See Note F Ka Center Power Pad Solder Stencil Opening All Around M 22 4207609 16 U 10 14 NOTES All linear dimensions are in millimeters Thi
23. ations For this reason a low leakage tantalum or ceramic capacitor is the best choice When polarized capacitors are used the positive side of the capacitor should face the amplifier input in most applications as the dc level there is held at Vpyp 8 which is likely higher than the source dc level Note that it is important to confirm the capacitor polarity in the application Additionally lead free solder can create dc offset voltages and it is important to ensure that boards are cleaned properly Single Ended Output Capacitor C In single ended SE applications the dc blocking capacitor forms a high pass filter with the speaker impedance The frequency response rolls of with decreasing frequency at a rate of 20 dB decade The cutoff frequency is determined by f 1 2nC Z 4 Table 3 shows some common component values and the associated cutoff frequencies Table 3 Common Filter Responses Cse DC Blocking Capacitor uF Speaker Impedance 2 fe 60 Hz 3 dB f 40 Hz 3 dB f 20 Hz 3 dB 4 680 1000 2200 8 330 470 1000 14 Submit Documentation Feedback Copyright 2007 2010 Texas Instruments Incorporated Product Folder Link s TPA3123D2 TEXAS INSTRUMENTS TPA3123D2 www ti com SLOS541C JULY 2007 REVISED AUGUST 2010 Output Filter and Frequency Response For the best frequency response a flat passband output filter Second order Butterworth may be used The outp
24. by sinking some of the excess current Power supply pumping should be tested by operating the amplifier at low frequencies and high output levels Gain Setting via GAINO and GAIN1 Inputs The gain of the TPA3123D2 is set by two input terminals GAINO and GAIN1 The gains listed in Table 2 are realized by changing the taps on the input resistors and feedback resistors inside the amplifier This causes the input impedance Zi to be dependent on the gain setting The actual gain settings are controlled by ratios of resistors so the gain variation from part to part is small However the input impedance from part to part at the same gain may shift by 20 due to shifts in the actual resistance of the input resistors For design purposes the input network discussed in the next section should be designed assuming an input impedance of 8 kO which is the absolute minimum input impedance of the TPA3123D2 At the higher gain settings the input impedance could increase as high as 72 kQ Table 2 Gain Setting GAIN1 GAINO n dB INPUT pro ud kQ 0 0 20 60 0 1 26 30 1 0 32 15 1 1 36 9 INPUT RESISTANCE Changing the gain setting can vary the input resistance of the amplifier from its smallest value 10 20 to the largest value 60 2096 As a result if a single capacitor is used in the input high pass filter the 3 dB cutoff frequency may change when changing gain steps Zi
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27. f phase The load is connected between these pins This has the added benefits of quadrupling the output power to the load and eliminating a dc blocking capacitor A block diagram of the measurement circuit is shown in Figure 31 The differential input is a balanced input meaning the positive and negative pins have the same impedance to ground Similarly the SE output equates to a balanced output Evaluation Module Audio Power Crit z M Twisted Pair Wire Twisted Pair Wire Figure 31 Differential Input BTL Output Measurement Circuit The generator should have balanced outputs and the signal should be balanced for best results An unbalanced output can be used but it may create a ground loop that affects the measurement accuracy The analyzer must also have balanced inputs for the system to be fully balanced thereby cancelling out any common mode noise in the circuit and providing the most accurate measurement The following general rules should be followed when connecting to APAs with differential inputs and BTL outputs Use a balanced source to supply the input signal e Use analyzer with balanced inputs Use twisted pair wire for all connections Use shielding when the system environment is noisy Ensure that the cables from the power supply to the APA and from the APA to the load can handle the large currents see Table 5 Table 5
28. ising out of the use of any TI components in safety critical applications In some cases TI components may be promoted specifically to facilitate safety related applications With such components TI s goal is to help enable customers to design and create their own end product solutions that meet applicable functional safety standards and requirements Nonetheless such components are subject to these terms No TI components are authorized for use in FDA Class Ill or similar life critical medical equipment unless authorized officers of the parties have executed a special agreement specifically governing such use Only those TI components which TI has specifically designated as military grade or enhanced plastic are designed and intended for use in military aerospace applications or environments Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer s risk and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use Tl has specifically designated certain components as meeting ISO TS16949 requirements mainly for automotive use In any case of use of non designated products TI will not be responsible for any failure to meet ISO TS16949 Products Applications Audio www ti com audio Automotive and Transportation www ti com automotive Amplifiers amplifier ti com Communications and Telecom www
29. itor is recommended SHUTDOWN OPERATION The TPA3123D2 employs a shutdown mode of operation designed to reduce supply current lcc to the absolute minimum level during periods of nonuse for power conservation The SHUTDOWN input terminal should be held high see specification table for trip point during normal operation when the amplifier is in use Pulling SHUTDOWN low causes the outputs to mute and the amplifier to enter a low current state Never leave SHUTDOWN unconnected because amplifier operation would be unpredictable For the best power up pop performance place the amplifier in the shutdown or mute mode prior to applying the power supply voltage MUTE Operation The MUTE pin is an input for controlling the output state of the TPA3123D2 A logic high on this terminal causes the outputs to run at a constant 50 duty cycle A logic low on this pin enables the outputs This terminal may be used as a quick disable enable of outputs when changing channels on a television or transitioning between different audio sources The MUTE terminal should never be left floating For power conservation the SHUTDOWN terminal should be used to reduce the quiescent current to the absolute minimum level USING LOW ESR CAPACITORS Low ESR capacitors are recommended throughout this application section A real as opposed to ideal capacitor can be modeled simply as a resistor in series with an ideal capacitor The voltage drop across this resistor minimi
30. measured differentially in BTL mode as shown in 0 V Ay 36 dB 7 5 50 Figure 30 V evPass Bypass output voltage No load i V lcci Quiescent supply current vein 2V MUTE 0 VNo 23 37 mA Quiescent supply current mute mode MUTE 0 8 No load 23 mA Icc a Quiescent supply current in shutdown mode SD 0 8 V No load 0 39 1 mA DS on Drain source on state resistance 200 GAINO 0 8 V 18 20 22 GAIN1 0 8 V GAINO 2 V 24 26 28 Gain dB GAINO 0 8 V 30 32 34 GAIN 2V GAINO 2 V 34 36 38 Mute Attenuation Vj 1 Vrms 82 dB AC CHARACTERISTICS 25 Vec 24 V 40 unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP UNIT Voc 24 200 mVpp 100 Hz 48 ksvr Supply ripple rejection in dB pply ripple rej Gain 20 dB UE Voc 24V RL 40 f 1 kHz 16 Output power at 1 THD N B Voc 24V RL 8 Q f 1 kHz 8 W i Voc 24V 4 Q f 1 kHz 20 Output power at 10 THD N Voc 24 V RL 8 Q f 1 kHz 10 2 4Q f 1 kHz Pp 10 W 0 08 THD N Total harmonic distortion noise 80 f 1 kHz Po 5W 0 08 85 Va Output integrated noise floor 20 Hz to 22 kHz A weighted filter Gain 20 dB 0 dBV Crosstalk Po 1 W f 1 kHz Gain 20 dB 60 dB 5 r Max output at THD N lt 196 f 1 kHz SNR Signal to noise ratio Gain 20 dB 99 dB Thermal trip point 150 C Thermal hysteresis 30 fosc Oscillator frequency 230 250 270
31. mensions of the thermal pad and thermal land are described in the mechanical section at the back of the data sheet See TI Technical Briefs SLMA002 and SLOA120 for more information about using the thermal pad For recommended PCB footprints see figures at the end of this data sheet For an example layout see the TPA3123D2 Evaluation Module TPA3123D2EVM User Manual SLOU189 Both the EVM user manual and the thermal pad application note are available on the TI Web site at http www ti com Copyright 2007 2010 Texas Instruments Incorporated Submit Documentation Feedback 17 Product Folder Link s TPA3123D2 TEXAS TPA D INSTRUMENTS SLOS541C JULY 2007 REVISED AUGUST 2010 www ti com vec 22 uH 470 uF 470 uF 1 0 uF DIN pa O LOUT 10 uF PVCCL PGNDL Left In 2 SD 385 0 68 uF PvccL LOUT 2 MUTE BsL 21 3 LOUT 6 LIN TPA3123D2 AVCC 19 a e 8 RIN avcc qr Se RT d Right In zl 9 lap 2 sep 18 922 uF Wour 194 PvccR 2 n TOME v 11 VCLAMP PGNDR 132 alle B 9 2 pvccR 10 68 uF 25 Shutdown 22 uH Control ROUT Mute 470
32. n and additional product content details TBD The Pb Free Green conversion plan has not been defined Pb Free RoHS TI s terms Lead Free or Pb Free mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances including the requirement that lead not exceed 0 196 by weight in homogeneous materials Where designed to be soldered at high temperatures TI Pb Free products are suitable for use in specified lead free processes Pb Free RoHS Exempt This component has a RoHS exemption for either 1 lead based flip chip solder bumps used between the die and package or 2 lead based die adhesive used between the die and leadframe The component is otherwise considered Pb Free RoHS compatible as defined above Green RoHS amp no Sb Br TI defines Green to mean Pb Free RoHS compatible and free of Bromine Br and Antimony Sb based flame retardants Br or Sb do not exceed 0 196 by weight in homogeneous material 3 MSL Peak Temp The Moisture Sensitivity Level rating according to the industry standard classifications and peak solder temperature There may be additional marking which relates to the logo the lot trace code information or the environmental category on the device 6 Multiple Device Markings will be inside parentheses Only one Device Marking contained in parentheses and separated by a will appear on a device If a line is indented then it is a continuation of the previou
33. n millimeters B This drawing is subject to change without notice C Body dimensions do not include mold flash or protrusions Mold flash and protrusion shall not exceed 0 15 per side D This package is designed to be soldered to a thermal pad on the board Refer to Technical Brief PowerPad Thermally Enhanced Package Texas Instruments Literature No SLMA002 for information regarding recommended board layout This document is available at www t com http www ti com gt E See the additional figure in the Product Data Sheet for details regarding the exposed thermal pad features and dimensions E Falls within MO 153 NOTES PowerPAD is a trademark of Texas Instruments 3 TEXAS INSTRUMENTS www ti com THERMAL PAD MECHANICAL DATA PWP R PDSO G24 PowerPAD SMALL PLASTIC OUTLINE THERMAL INFORMATION This PowerPAD package incorporates an exposed thermal pad that is designed to be attached to a printed circuit board PCB The thermal pad must be soldered directly to the PCB After soldering the PCB can be used as a heatsink In addition through the use of thermal vias the thermal pad can be attached directly to the appropriate copper plane shown in the electrical schematic for the device or alternatively can be attached to a special heatsink structure designed into the PCB This design optimizes the heat transfer from the integrated circuit IC For additional information on the PowerPAD package and how to take
34. outputs can be used when floating but they may create a ground loop that affects the measurement accuracy The analyzer should have balanced inputs to cancel out any common mode noise in the measurement Twisted Pair Wire Twisted Pair Wire Figure 30 SE Input SE Output Measurement Circuit The following general rules should be followed when connecting to APAs with SE inputs and outputs Use an unbalanced source to supply the input signal Use an analyzer with balanced inputs Use twisted pair wire for all connections Use shielding when the system environment is noisy Ensure the cables from the power supply to the APA and from the APA to the load can handle the large currents see Table 5 Copyright 2007 2010 Texas Instruments Incorporated Submit Documentation Feedback 21 Product Folder Link s TPA3123D2 TEXAS INSTRUMENTS TPA3123D2 SLOS541C JULY 2007 REVISED AUGUST 2010 www ti com DIFFERENTIAL INPUT AND BTL OUTPUT TPA3123D2 Mono Configuration Many of the class D APAs and many class AB APAs have differential inputs and bridge tied load BTL outputs Differential inputs have two input pins per channel and amplify the difference in voltage between the pins Differential inputs reduce the common mode noise and distortion of the input circuit BTL is a term commonly used in audio to describe differential outputs BTL outputs have two output pins providing voltages that are 180 out o
35. s drawing is subject to change without notice C Customers should place a note on the circuit board fabrication drawing not to alter the center solder mask defined pad D This package is designed to be soldered to a thermal pad on the board Refer to Technical Brief PowerPad Thermally Enhanced Package Texas Instruments Literature No SLMA002 SLMA004 and also the Product Data Sheets for specific thermal information via requirements and recommended board layout These documents are available at www ti com http www ti com Publication IPC 7351 is recommended for alternate designs E Laser cutting apertures with trapezoidal walls and also rounding corners will offer better paste release Customers should contact their board assembly site for stencil design recommendations Example stencil design based on a 50 volumetric metal load solder paste Refer to 7525 for other stencil recommendations F Customers should contact their board fabrication site for solder mask tolerances between and around signal pads wi TEXAS INSTRUMENTS www ti com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries reserve the right to make corrections enhancements improvements and other changes to its semiconductor products and services per JESD46 latest issue and to discontinue any product or service per JESD48 latest issue Buyers should obtain the latest relevant information before placing orders and should verify that su
36. s line and the two combined represent the entire Device Marking for that device 9 Lead Ball Finish Orderable Devices may have multiple material finish options Finish options are separated by a vertical ruled line Lead Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width Addendum Page 1 H PACKAGE OPTION ADDENDUM TEXAS INSTRUMENTS www ti com 7 Nov 2014 Important Information and Disclaimer The information provided on this page represents TI s knowledge and belief as of the date that it is provided TI bases its knowledge and belief on information provided by third parties and makes no representation or warranty as to the accuracy of such information Efforts are underway to better integrate information from third parties TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals Tl and TI suppliers consider certain information to be proprietary and thus CAS numbers and other limited information may not be available for release In no event shall TI s liability arising out of such information exceed the total purchase price of the TI part s at issue in this document sold by TI to Customer on an annual basis Addendum Page 2 ip TEXAS PACKAGE MATERIALS INFORMATION INSTRUMENTS www ti com 14 Jul 2012 TAPE AND REEL INFORMATION REEL
37. ss otherwise noted EFFICIENCY POWER SUPPLY REJECTION RATIO vs vs OUTPUT POWER FREQUENCY m Rj 8 9 BTL Gain 20 dB 9 T se gt 5 5 5 Hi D 2 gt 2 2 5 z o 0 4 8 12 16 20 24 28 32 36 40 20 100 1k 10k 20k Po Output Power W f Frequency Hz Figure 21 Figure 22 Copyright 2007 2010 Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link s TPA3123D2 TEXAS INSTRUMENTS TPA3123D2 SLOS541C JULY 2007 REVISED AUGUST 2010 www ti com APPLICATION INFORMATION CLASS D OPERATION This section focuses on the class D operation of the TPA3123D2 Traditional Class D Modulation Scheme The TPA3123D2 operates in AD mode There are two main configurations that may be used For stereo operation the TPA3123D2 should be configured in a single ended SE half bridge amplifier For mono applications TPA3123D2 may be used as a bridge tied load BTL amplifier The traditional class D modulation scheme which is used in the TPA3123D2 BTL configuration has a differential output where each output is 180 degrees out of phase and changes from ground to the supply voltage Vcc Therefore the differential prefiltered output varies between positive and negative Vcc where filtered 50 duty cycle yields 0 V across the load The class D modulation scheme with voltage and current waveforms is shown in Figure 23 and Figure 24 Vcc 0v Output Current M Cc d Figure 2
38. system interaction PRINTED CIRCUIT BOARD PCB LAYOUT Because the TPA3123D2 is a class D amplifier that switches at a high frequency the layout of the printed circuit board PCB should be optimized according to the following guidelines for the best possible performance e Decoupling capacitors The high frequency 0 1 uF decoupling capacitors should be placed as close to the PVCC pins 1 3 10 and 12 and AVCC pins 19 and 20 terminals as possible The VBYP pin 7 capacitor and VCLAMP pin 11 capacitor should also be placed as close to the device as possible Large 220 uF or greater bulk power supply decoupling capacitors should be placed near the TPA3123D2 on the PVCCL and PVCCR terminals e Grounding The AVCC pins 19 and 20 decoupling capacitor and VBYP pin 7 capacitor should each be grounded to analog ground AGND pins 8 and 9 The PVCCx decoupling capacitors and VCLAMP capacitors should each be grounded to power ground PGND pins 13 14 23 and 24 Analog ground and power ground should be connected at the thermal pad which should be used as a central ground connection or star ground for the TPA3123D2 e Output filter The reconstruction filter L1 L2 C9 and C16 should be placed as close to the output terminals as possible for the best EMI performance The capacitors should be grounded to power ground Thermal pad The thermal pad must be soldered to the PCB for proper thermal performance and optimal reliability The di
39. udio input for right channel LIN 5 Audio input for left channel GAINO 18 Gain select least significant bit TTL logic levels with compliance to AVCC GAIN1 17 Gain select most significant bit TTL logic levels with compliance to AVCC MUTE 4 Mute signal for quick disable enable of outputs high outputs switch at 50 duty cycle low outputs enabled TTL logic levels with compliance to AVCC BSL 21 Bootstrap I O for left channel PVCCL 1 3 P Power supply for left channel H bridge not internally connected to PVCCR or AVCC LOUT 22 O Class D 1 2 H bridge positive output for left channel PGNDL 23 24 P Power ground for left channel H bridge VCLAMP 11 P Internally generated voltage supply for bootstrap capacitors BSR 16 VO Bootstrap I O for right channel ROUT 15 O Class D 1 2 H bridge negative output for right channel PGNDR 13 14 P Power ground for right channel H bridge PVCCR 10 12 Power supply for right channel H bridge not connected to AGND 9 P Analog ground for digital analog cells in core AGND 8 P Analog ground for analog cells in core BYPASS 7 inputs Nominally equal to 8 Also controls start up time via AVCC 19 20 P High voltage analog power supply Not internally connected to PVCCR or PVCCL Thermal pad Die pad 32 soldered down all applications to secure the 2 Submit Documentation Feedback Copyright 2007 2010 Texas Instruments Incorporated Product Folder
40. ut filter components consist of the series inductor and capacitor to ground at the LOUT and ROUT pins There are several possible configurations depending on the speaker impedance and whether the output configuration is single ended SE or bridge tied load BTL Table 4 lists the recommended values for the filter components It is important to use a high quality capacitor in this application A rating of at least X7R is required Table 4 Recommended Filter Output Components Output Configuration Speaker Impedance Q Filter Inductor uH Filter Capacitor nF 4 22 680 Single Ended SE 8 47 390 4 10 1500 Bridge Tied Load BTL 8 22 680 LOUT e LOUT ROUT Litter Litter Citer Gie Litter Citer Figure 25 BTL Filter Configuration Figure 26 SE Filter Configuration Power Supply Decoupling Cs The TPA3123D2 is a high performance CMOS audio amplifier that requires adequate power supply decoupling to ensure that the output total harmonic distortion THD is as low as possible Power supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker The optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power supply leads For higher frequency transients spikes or digital hash on the line a good low equivalent series
41. yright 2007 2010 Texas Instruments Incorporated Submit Documentation Feedback 19 Product Folder Link s TPA3123D2 TEXAS INSTRUMENTS TPA3123D2 SLOS541C JULY 2007 REVISED AUGUST 2010 www ti com Power Supply Signal R Analyzer Generator 20 Hz 20 kHz Power Supply Litt LYYY Signal E Cs Analyzer Ganarator Class D APA filt 1 R 20 Hz 20 kHz b Traditional Class D Figure 29 Audio Measurement Systems 20 Submit Documentation Feedback Copyright 2007 2010 Texas Instruments Incorporated Product Folder Link s TPA3123D2 TEXAS INSTRUMENTS TPA3123D2 www ti com SLOS541C JULY 2007 REVISED AUGUST 2010 SE Input and SE Output TPA3123D2 Stereo Configuration The SE input and output configuration is used with class AB amplifiers A block diagram of a fully SE measurement circuit is shown in Figure 30 SE inputs normally have one input pin per channel In some cases two pins are present one is the signal and the other is ground SE outputs have one pin driving a load through an output ac coupling capacitor and the other end of the load is tied to ground SE inputs and outputs are considered to be unbalanced meaning one end is tied to ground and the other to an amplifier input output The generator should have unbalanced outputs and the signal should be referenced to the generator ground for best results Unbalanced or balanced
42. zes the beneficial effects of the capacitor in the circuit The lower the equivalent value of this resistance the more the real capacitor behaves like an ideal capacitor SHORT CIRCUIT PROTECTION The TPA3123D2 has short circuit protection circuitry on the outputs that prevents damage to the device during output to output shorts and output to GND shorts after the filter and output capacitor at the speaker terminal Directly at the device terminals the protection circuitry prevents damage to device during output to output output to ground and output to supply When a short circuit is detected on the outputs the part immediately disables the output drive This is an unlatched fault Normal operation is restored when the fault is removed 16 Submit Documentation Feedback Copyright 2007 2010 Texas Instruments Incorporated Product Folder Link s TPA3123D2 TEXAS INSTRUMENTS TPA3123D2 www ti com SLOS541C JULY 2007 REVISED AUGUST 2010 THERMAL PROTECTION Thermal protection on the TPA3123D2 prevents damage to the device when the internal die temperature exceeds 150 C There is a 15 C tolerance on this trip point from device to device Once the die temperature exceeds the thermal set point the device enters into the shutdown state and the outputs are disabled This is not latched fault The thermal fault is cleared once the temperature of the die is reduced by 30 The device begins normal operation at this point with no external
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