AD622 User`s Manual
Contents
1. Table 4 INTCSR Interrupt Control Status Register Format Programming Guide GPIOC BADR0 0x54 Genaral Purpose I O Control R W Description Default Reserved 0x006C0 EOLC Reads EOLC end of last conversion bit of A D converter Active low 0 when all channels converted 1 during A D conversion Reserved LDAC Load D A converters active low Writing 0 makes D A latches transparent 1 holds D A outputs Can be used for simultaneous update of analog outputs Reserved a DACEN 1 enables D A outputs 0 forces OV to all D A outputs 31 27 Reserved Do Table 5 GPIOC General Purpose I O Control Register Format ADCTRL BADR1 0x00 A D Control Bit Description Default CHO select 1 enables chanel 0 in channel scan list CHI select 1 enables chanel 1 in channel scan list CH2 select 1 enables chanel 2 in channel scan list CH3 select 1 enables chanel 3 in channel scan list CHA select 1 enables chanel 4 in channel scan list CHS select 1 enables chanel 5 in channel scan list CH6 select 1 enables chanel 6 in channel scan list 7 CH7 select 1 enables chanel 7 in channel scan list Reserved Table 6 ADCTRL A D Control Register Format 0x00 1 Programming Guide ADDATA BADR1 0x00 A D Data R Bit Description Default A D Data Reads data from A D Data is valid after EOLC bit 13 0 in GPIOC goes low Data from channels selected in ADC2. AD 622 DATA ACQUISITION CARD USER S MANUAL Son HUMUSOFT COPYRIGHT 2014 by HUMUSOFT s r o All rights reserved No part of this publication may be reproduced or distributed in any form or by any means or stored in a database or retrieval system without the prior written consent of HUMUSOFT 5 1 0 Limited Warranty HUMUSOFT s r o disclaims all liability for any direct or indirect damages caused by use or misuse of the AD 622 device or this documentation HUMUSOFT is a registered trademark of HUMUSOFT s r o Other brand and product names are trademarks or registered trademarks of their respective holders Printed in Czech Republic Table of Contents Table of Contents 1 Introduction 4 1 1 General Description 4 ntt probiha tet ete epe 4 1 2 Features Eist ROI Ip REED EE 4 1 3 SDecifiCati Hs s eor AAE MAAN tae 5 1 3 1 A D Convert r lend us 5 1 32 D A Converter 43 curie Be eh eee ep 5 1 3 3 Digital Inputs ans etes cred escort ea det 6 1 3 4 Digital Outputs 6 2 Installation 7 2 1 Board Installation erc e eee e trata 7 2 2 Driver Installation od do Ip EIE 8 3 Programming Guide 10 3 IsR eister Map MA UU te a 10 3 2 Register Description Voie T bep er E la P CT YR e red 12 3 3 AD Convener gr dia 15
3. Input ranges 10V Input protection 18V Input impedance gt 10 1 3 2 D A Converter 14 bit 8 Resolution Number of channels Settling time Slew Rate Output current min 4 Introduction Requires one PCI 2 3 slot and optional second slot for second connector Can be used in 5V or 3 3V slot Power consumption 500 mA 5V 150 mA 12V 150 mA 12V Operating temperature 0 C to 70 C 14 bits le ended simultaneous sampling of all channels single channel 2 channels 4 channels 8 channels 8 entries one conversion cycle Ohm max 31 us full scale swing 1 2 LSB 10 V us E10 mA Introduction Short circuit current 15 mA DC output impedance max 0 5 Ohm Load capacitance max 50 pF Differential nonlinearity 1 LSB 1 3 3 Digital Inputs Number of bits 8 Input signal levels TIL Logic 0 0 8 V max Logic 1 2 0 V min 1 3 4 Digital Outputs Number of bits 8 Output signal levels TTL Logic 0 0 5 V max 24 mA sink Logic 1 2 0 V min 15 mA source Outputs TTL Hardware Installation 2 Installation 2 1 Board Installation AD 622 has no switches or jumpers and you can install it in any free PCI expansion slot of your computer Follow the steps outlined below Turn off the power of the computer system and unplug the power cord Disconnect all cables connected to the computer system Using a screwdriver remove the cover mounting screws These screw
4. BAe D ACOBVEELIS o enis 16 3 5 Digital kdyz tq UI t ea BIS 17 4 VO Signals 18 4 1 Output Connector Signal 18 Introduction Introduction 1 Introduction 1 1 General Description The AD 622 data acguisition card is designed for the need of connecting PC compatible computers to real world signals The AD 622 contains 8 channel fast 14 bit A D converter with simultaneous sample hold circuit 8 independent 14 bit D A converters 8 bit digital input port and 8 bit digital output port The card is designed for standard data acquisition and control applications and optimized for use with Real Time Toolbox for Simulink amp AD 622 features fully 32 bit architecture for fast throughput 1 2 Features List The AD 622 offers following features 32 bit architecture 14 bit A D converter with simultaneous sample amp hold circuit Conversion time 1 6 us for single channel or 3 7 us for 8 channels 8 channel single ended fault protected input multiplexer e Input range 10V Internal clock amp voltage reference e 8 D A converters with 14 bit resolution and 10V output range 8 bit TTL compatible digital input port e 8 bit TTL compatible digital output port Interrupt 1 3 Specifications 1 3 1 A D Converter Resolution Number of channels 8 sing Sample hold circuit Conversion time 1 6 us 1 9 us 2 5 us 3 7 us FIFO
5. 0 Terminal Board can be connected to X1 connector AD0 AD7 Analog inputs DA0 DA7 Analog outputs DINO DIN7 TTL compatible digital inputs DOUT0 DOUT7 TTL compatible digital outputs 12V 12V power supply 12V 12V power supply 5V 5V power supply AGND Analog ground GND Digital ground 18 I O Signals 21 be DAI 22 PEE 7 H4 23 DA3 5 6 alten 25 DAS AD6 7 AD7 i 27 12V AGND 28 5V DA6 10 p as 1 29 GND DA7 11 30 DOUTO DINO 12 ft 31 DOUTI DINI 13 32 DOUT2 DIN2 14 33 DOUT3 DIN3 15 34 DOUT4 pee 16 35 DOUTS eine c Mas 18 37 DOUT7 o Table 15 X1 Connector Pin Assignement 19 Contact Address Contact address HUMUSOFT s r o Pob e n 20 186 00 Praha 8 Czech Republic tel 420 2 84011730 tel fax 420 2 84011740 E mail info humusoft com Homepage http www humusoft com 20
6. ADRI 0x04 ADDATA A D data mirror BADRI 0x06 ADDATA A D data mirror BADRI 0x08 ADDATA A D data mirror BADRI 0x0A ADDATA A D data mirror BADR1 0x0C ADDATA A D data mirror BADRI 0x0E ADDATA A D data mirror BADRI1 0x10 DIN Digital input BADRI1 0x20 ADSTART A D SW trigger BADR1 0x22 BADR1 0x24 BADR1 0x26 BADR1 0x28 BADRI1 0x2A BADRI1 0x2C BADRI1 0x2E Table 3 BADR1 Memory INTCSR GPIOC ADCTRL A D control DOUT Digital output DAO D A 0 data DA1 D A 1 data DA2 D A 2 data DA3 D A 3 data DAS D A 5 data DA6 D A 6 data DA7 D A 7 data 11 Programming Guide 3 2 Register Description INTCSR BADR0 0x4C Interrupt Control Status Bit Description Default ADINT Enable 1 enables A D interrupt 0 disables A D interrupt ADINT Polarity 1 active high 0 active low Connected to EOLC of A D converter should be set to active low for normal operation ADINT Status 1 indicates interrupt active 0 indicates interrupt not active Reserved PCI Interrupt Enable 1 enables PCI interrupt Software Interrupt 1 generates PCI interrupt INTA if 7 PCI Interrupt Enable bit is set bit 6 1 ADINT Select Enable 1 indicates edge triggered 0 indicates 8 level triggered interrupt Note Operates only in High Polarity mode bit 1 1 9 Reserved ADINT Clear Writing 1 to this bit clears ADINT in edge mode Reserved 0x000600 hb
7. Hardware Wizard The wizard has finished installing the software for Humusoft AD622 The hardware you installed vil not work until you restart your computer Click Finish to close the wizard Programming Guide 3 Programming Guide 3 1 Register Map AD 622 uses PCI Vendor ID 0x186C and Device ID 0x0622 Registers of AD 622 card are located in 3 memory mapped regions Function Size Width bytes bits BADRO PCI chipset interrupts status bits memory mapped special functions BADRI A D D A digital I O memory mapped Table 1 Base Address Regions PCI chipset PCI 9030 and counter timer chip are located in 32 bit regions and should be accessed by 32 bit instructions BADRI containing analog I O has 16 bit architecture and registers are naturally 16 bit wide but 32 bit access to this area is allowed as well under certain conditions 32 bit access is broken by PCI chipset into two 16 bit cycles on the AD 622 internal bus This allows increasing throughput by accessing two consecutive internal 16 bit registers by single PCI cycle Therefore two D A channels can be written or two A D channels can be read at once which increases speed of data transfers almost twice Do not use 32 bit access to other registers than ADDATA and DAO DA7 10 Programming Guide BADRO0 0x4C INTCSR BADRO0 0x54 GPIOC Table 2 BADRO Memory Map BADR1 0x00 ADDATA A D data BADR1 0x02 ADDATA A D data mirror B
8. TRL N A register are available in FIFO lower number channels first 15 14 Reserved N A Table 7 ADDATA A D DATA Register Format Note ADDATA register has 7 mirror registers located from BADR1 0x02 to BADR1 0x0E This arrangement remaps FIFO to linear address space and allows reading consecutive values from A D FIFO by 32 bit instructions DIN BADRI 0x10 Digital Input R Description Digital input 7 0 Reads digital input port Reserved Table 8 DIN Digital Input Register Format DOUT BADRI 0x10 Digital Output Bit Description Default 7 0 Digital output 7 0 Writes to digital output port 15 8 Reserved N A Table 9 DOUT Digital Output Register Format B ADSTART BADR1 0x20 A D Conversion Start Bit Description Default 5 14 A D Conversion Start Reading this register triggers A D NJA conversion for all channels selected in ADCTRL Programming Guide Table 10 ADSTART A D Conversion Start Register Format DAO BADR1 0x20 D A Converter 0 W DAL BADRI 0x22 D A Converter 1 W DA2 BADRI 0x24 D A Converter 2 W DA3 BADR1 0x26 D A Converter 3 W DA4 BADR1 0x28 D A Converter 4 W DAS BADR1 0x2A D A Converter 5 W DA6 BADR1 0x2C D A Converter 6 W DA7 BADR1 0x2E D A Converter 7 W Description Default DAx D A converter channel n data 0x3FFF Reserved N A Table 12 DAx D A Converter Data Register Format Note D A converter outputs are updated only if LDAC bit in GPIOC regist
9. rer is set low bit 23 at BADRO 0x54 0 Otherwise D A outputs are keeping old values and data written to DAn registers are kept until LDAC goes low LDAC bit can be used for simultaneous update of D A outputs 3 3 A D Converter A D converter is controlled through ADDATA ADCTRL ADSTART and GPIOC registers Before starting a conversion it is necessary to configure channels which will be converted by ADCTRL register Each A D channel has one bit in ADCTRL Setting this bit includes the channel in conversion scan list Conversion can be initiated by a read operation from ADSTART register Once the conversion is started selected channels are simultaneously sampled and converted When the conversion of all selected channels is complete EOLC bit 17 in GPIOC register is set low which means that converted data is available in output FIFO and can be 15 Programming Guide read from ADDATA register EOLC remains low until next conversion is started Starting new conversion resets FIFO A D converter has fixed input range 10V and uses two s complement binary coding A D converter zero offset can be adjusted by R23 A D gain can be adjusted by R25 Digital Value Analog Voltage Ox3FFF 0 0012 V 0x2000 10 0000 V Ox1FFF 9 9988 V 0x0000 0 0000 V Table 13 A D Inputs Coding 3 4 D A Converters D A converters are accessed through eight data input latch registers DAO DA7 D A converter outputs are initiall
10. s are at the rear side of the PC Remove the computer system s cover Find an empty expansion slot in your computer for AD 622 card If the slot still has the metal expansion slot cover attached remove the cover with a screwdriver Save the screw to install the AD 622 Hold the AD 622 firmly at the top of the board and press the gold edge connector into an empty PCI expansion slot Using a screwdriver screw the retaining bracket tightly against the rear plate of the computer svstem In case of using also guadrature encoder inputs or timer counters install also the aditional connector with metal slot cover to the neighbouring slot Otherwise you can disconnect the aditional connector from the board and save it for future use Replace the cover of the computer and plug the power cord Reconnect all cables that were previously attached to the rear of the Hardware Installation computer 2 2 Driver Installation Once you have installed AD 622 to PCI slot you can install Windows driver Follow the steps outlined below Turn on the computer boot Microsoft Windows AD 622 is detected by system automatically In Add Hardware Wizzard window click Next Add Hardware Wizard Welcome to the Add Hardware Wizard This wizard helps pou Install software to support the hardware you add to your computer Troubleshoot problems you may be having with your hardware A u your hardware came with an installa
11. tion it is recommended that you click Cancel to close this wizard and use the manufacturer s CD to install this hardware To continue click Next Insert installation floppy into drive a In Found New Hardware Wizzard select Install the software automatically and click Next Found New Hardware Wizard Welcome to the Found New Hardware Wizard This wizard helps you install software for Humusoft AD622 If your hardware came with an installation CD or floppy disk insert it now What do you want the wizard to do G instal ftw i ommended Install from a list or specific location Advanced Click Next to continue Hardware Installation When prompted for driver location type and click Next Click Finish to complete installation Found New Hardware Wizard Please choose your search and installation options Search for the best driver in these locations Use the check boxes below to limit or expand the default search which includes local paths and removable media The best driver found will be installed v Search removable media floppy CD ROM v Include this location in the search S J Dont search will choose the driver to install Choose this option to select the device driver from a list Windows does not guarantee that the driver you choose will be the best match for your hardware Found New Hardware Wizard Completing the Found New
12. y connected to ground until DACEN bit 26 in GPIOC register is set to 1 This bit can be used to disconnecting all analog outputs from D A converters Data from D A input latch registers are passed to D A converters only if LDAC bit 23 in GPIOC register is 0 If this bit is set to 1 data remains just in input latches without being written to D A converters Then if LDAC is set to 0 all D A outputs are updated simultaneously from input latch registers Output voltage ranges of D A converters are 10V and straight binary coding is used After power on or hardware reset the output voltage is set to OV D A converter positive range can be adjusted by R5 while negative range can be adjusted by R8 16 Programming Guide Digital Value Analog Voltage Ox3FFF 9 9988 V 0x2000 0 0000 V Ox1FFF 0 0012 V 0x0000 10 0000 V Table 14 D A Outputs Coding 3 5 Digital I O AD 622 contains one 8 bit digital input port and one 8 bit digital output port Digital input port can be accessed directly by read from DIN register Inputs are TTL compatible Digital output port can be accessed by byte or word write to DOUT register Outputs are TTL compatible After power on or hardware reset digital outputs are set to 0 17 I O Signals 4 I O Signals 4 1 Output Connector Signal Description The AD 622 multifunction I O card is equipped with an on board 37 pin D type female connector X1 For pin assignment refer to Table 15 TB 62
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