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VT1432B VT1435 VT1436

1. 15 I2C EN 17 DC SDA 21 DC SCL 16 RFI GND I2C Shield 18 RFI GND I2C Shield 22 RFI GND I2C Shield 19 BOB EN 7 CAL LOW 20 CAL HIGH 23 24 V Power 24 24 V GND Return 25 24 V Power In general e DIFF n lines are the differential inputs for each channel Shielded twisted pair is recommended e RFI GND Drain Shield n are the grounds for the shield on the twisted pair for each input channel Connect at the VT1432B end of the cable only RFIGND Cable Shield are the grounds for a shield around the entire cable and the ground points for making individual channels single ended e 2 xxx supply control signals to the active breakout boxes Support for other usage is not provided These are not used with the VT3240 1A Voltage and Voltage IEPE breakout boxes e RFIGND DC Shield protects the analog input lines BOB EN is another breakout box control signal Support for the usage of these breakout boxes is restricted to those that are VXI Technology specified e HIGH LOW are signal lines to send calibration signals to VXI Technology specified breakout boxes The signals available on these lines are not specified and their usage is discouraged e 24 V Power and GND supply power to the signal conditioning circuitry in the active breakout boxes and IEPE in the active IEPE breakout box The power available on these lines is not specified and their usage is discouraged
2. 28 interrupts handling 44 host handling 25 iere pietre ber emeret le 44 host setup 56 102 105 56 102 106 56 102 106 116 Index www vxitech com L P LEDS page map register 56 102 105 level mode parameter level trigger ChanPes M a 38 45 library compatibility default values 45 VT1432B 4 1432 parameter 1 7 registers 106 library files oue Add ete eie 11 limitation of warranty esses PRE Ene 39 local priority interrupt 615 54 logical address 151 Ge lessees 11 logical address setting sse loop measurement R M random mode Shh RS avs 59 register based device 113 mainframes multiple 30 31 32 33 34 42 restricted rights legend sese 7 ATM tene ee eie pr pec 4 manual ti g r oneta iE Na hene 41 5 Meas button SFP BCA 49 53 62 66 76 113 MEASURE 4 44 4 4448 40 SETTLING states icc vnu 39 measurement sh
3. 12 x 24 Analog RAM Registers 56002 COLA Signal DAC 6 4 kHz AMP Range DAC gt OUT Shutdown Gate array 8 Circuitry control Digital 25 6 kHz Interpolation Summer Filter Input 96002 B Bus or A24 VXI FIGURE 5 1 SOURCE OPTION BLOCK DIAGRAM 60 The Arbitrary Source Option 1D4 www vxitech com THE ARBITRARY SOURCE OPTION FRONT PANEL The VT1432B with the arbitrary source option may have 8 or 16 input channels The following illustration shows a front panel for 16 channels VT1432B as well as the front panels for the VT1435 and VT 1436 with tachometer option The LEDs and connectors are described the next page and function identically for either the VT1432B or VT1435 36 modules Fail Acs Source COLA Shut Out 16 CHANNEL 102 4 kSa s AID DSP CHAN 9 12 CHAN 13 16 VT1432B Fail Acs Source on COLA Shut Out 4 CHANNEL 102 4 kSa s A D DSP VT1435 1DD Fail Acs Source on COLA Shut Out 1 CH5 CH4 Lere 8 CHANNEL 102 4 kSa s AID DSP Fail Acs Source OO on COLA Shut Out 5 fa fu OOJ IEPE 16 CHANNEL 102 4 kSa s AJD DSP FIGURE 5 2 ARBITRARY SOURCE OPTION FRONT PANELS The Arbitrary Source Option 1D4 61 VXI Technology Inc LEDs and Connectors for the Arbitrary Source Option Status LEDs e Fail This is the
4. 26 Done for idee nite aeterne 108 DRAM hte ea 34 drivers VXIplug amp play eee 22 25 26 27 DSP bus 109 DSP command register sse 109 DSP protocol eee 109 DTB arbitration bus 2 54 dynamic configuration protocol 103 dynamic RAM oes p eal wee 55 E electric Ss ee eee AS ee exact rpm triggering Exit button SEP ciere rette eiie dieere explosive atmosphere sse nace pO Po UE DRE EO d ses 53 Ex Trig connector sese 53 66 F 66 features 2 34 EFIEQ arcl tectute ORO ED OSEE 34 files Header Sct ae a aedes 27 library PP files omine tet tette EE frame or chassis ground 1 2 10 free running clock 2 00 000 56 frequency external clock ite ete 57 front panel Part numbers eet 87 TOMOVIN Gs e M 90 source wits standard uide ette 51 t chometer oue seresideme code e Ope e 65 VT1432B T V T1435 and V T1436 ene terrere 52 function reference See On line Help documentation VXI Technology Inc G general 2 4 47 general safety instructions essere 10 getting started
5. eda vei e eae 57 SECTION poA 59 The Arbitr ry Source Option 14 eee er RUE ERE eo ees 59 Arbitrary Source DescrIptOR os esee epe vete a eee 59 Mug 59 Arbitrary Outputs tret i SE TORO EGO GEFORDERT n eO cute 59 Source Output Modes 1 tet e e pn ebur tte e d b eor eto fend 59 COEA and Summer ii sd ice ent tie ete d ipta et E s 59 External Sh tdOWDBt 2 ott snos tte b erst ds tri etc tet ie 59 Block Diagram 5 eot mp etd edite bere das o dt e di dete 60 The Arbitrary Source Option Front Panel sessssssssseseseseeeeeee nennen enne eren nenne nennen 61 LEDs and Connectors for the Arbitrary Source Option eee 62 VT4435 V T1436 Tnput Connectors trt PUE e e UE RR SON t petet 62 M M X 63 Th Tachometer Opiom AYE 63 Tachometer Description 5 terr e eire R 63 Tachometer ond Sa e tee ie ea eer rt o ea te a etes 63 e eee ui e 63 Trip eer eden ome et du m ia e etos Peer 63 Tachometer Monitoring estere et e dede tbe de edat e eee os edere 63 Exact RPM Ttriggering ooi p medie ue adele hana p me e p ee tien 63 Input eek wa E ar elect t pns 64 Times dte eii ent
6. 77 Replacing Assemblies eee cide e e ee TR ER A UR Pe 77 Replaceable Parts ere eiae 77 Ordering Inform tion deed ies eR Pe ies td ee tede de diee ts 77 Direct Mail oh og seb eae 77 CAGE Code N mbers ied edd e Hee nero de Rete Po He Te Fit Ee He dee ee eR dn 78 Top COVet 89 To Remove the Front Patel ote teen oe a leet od rar Ue cose 90 To R emoverthe Input Assemblies etr DECIR RR TURA IRE GI RI IFTE ERR E iR e Eee ee ees 93 To Removethe Option AY F Assembly 94 Preface 5 VXI Technology Inc To Remove the Option 104 Assembly enne enne nre 95 Remove the A22 A24 ASsembly b eet em eee ded f e 96 To Remove the A10 A11 Assembly r a 97 Register 101 The V T143 2B Register Dern Ons ee ene EH REP sadder ie cheba Ud es 101 The AT6 aa eos t er ts em a d 102 TREADS Registets ossa ei eh ua de ec dai t m t te e lee un ide 103 32 bit E xa metae po teinte ir a t dw de indito tt e n etes 106 Command Response 5 2 5 he dee dte ed a iue tede eu n dtes 107 DSP Protocol
7. 21 global parameter 45 glossary 111 Go button SEP iic npe ta eorr ei iE 24 ground 54 grounding conductor essere 11 group channels 28 30 grouping 2 22 29 32 grouping of modules 29 H hardware configuration 14 header files 5 cede HO dette 27 Help file 26 46 holdotf ties i ere indes 64 host interface library see 25 55 101 also see On line 101 installing a sone a cedere c e e 15 hpe1432 bas 2 28 hpe1432 dll 2 28 hip l432 h ien eee een dete etate 28 1432 320 5 ee Seton ehe et ce e reg es 28 pe 1432 32 ID ences ete cient t e ER ee Ea 28 I IDE state Ren ne ab pitied Se 39 40 Current 49 29 initialization 39 s ee dela Nema e cette 39 input external trigger ssec dE E pere 63 TEPE p cuteness sabvedsestvvontudecod 70 parameters net eee te rb Pe een s 45 tachometet z dere euet 63 HAS BEL EE 23 voltage iios ene e REY 70 Input button SFP sss 24 input count division 64 instruments supported
8. A 64 Block Diagrams sten cente a e ittis en a t ett bar 64 The Tachometer Option Front Panel ener enne nnne nenne nnns 65 LEDs and Connectors for the Tachometer 66 XVT1435 VT1436 Input Connectors eme e ei deed ee p e nt 66 SECTION AEE 67 The TEDS Option eg ee pee ire ett rte ae eset di et n ae ron Rec 67 Transducer Electronic Data Sheet VT1435 and VT1436 67 TEDS Field Upgrade Bano STR e i E e p E tts 67 SECTION i 69 Breakout Boxes V T3240A and V T3241 A 5st 69 reddi M 69 The 240 and VT3241A Breakout Boxes eene 69 VT3240A Voltage typ Breakout BOX ree REPERI RR 70 VT3241A IEPE Voltage Breakout Box 70 Breakout Box Grounding coast dba o etui ua e ec teint 70 Breakout Box Cables hb See hs alah Lon D eL 70 Making a Custom Breakout Box Cable eene ener 70 Recommendations on wiring for the VT1432B 4 channel Input 72 SECTION ger 75 Troubleshooting the VjETA32B ete SERERE e RR 75 EP UG csi M 75 SECTION Lec
9. ee Her ee dei ie de e i E e i 44 Data Gatimng iue ede HR e eee e E e t eI AI Ue dea 45 Programming Setup Parameters 45 Where to Get More 46 The Function Reference for VXIplug amp play sese 46 SECTION 4 DP C 47 Module Description E epe ia tesa ane dre e 47 UniversaliModule Features s 5 et eedem nes 47 General ls t Nd etie do e oe idee e E UR E Este es 47 Arbitrary Source Features option 1D4 sse enne enne nnne nennen nnne 48 Tachometer Features option 48 48 Block Diagram esed eec e e Ee 48 VT1435 nd VT1436 Specific Features dei tenter itid ien lee etch re eie eines 49 Current Source eth dede iei ee eq dee qe aite 49 Single Ended Relay ie tee ite ee feet ie see Eee e e eit re deuce 49 Transducer Blectronic Data Sheet ecce ete eei 49 VT1432B Front Panel Description eccentric e beide edis 50 Front Panels for 4 8 and T6 channels eer rec n e ote ents 50 Standard VT 1432B Front Panel tec tete e etie aH pee iie re need 51 Standard VT1435 and VT14
10. CH4 E 4 CHANNEL 102 4 kSa s A D DSP VT1435 1DD Technology Fail Acs Trigger ExSamp Cal ExTrig Epen CHS 8 CHANNEL 102 4 kSa s AID DSP VT1435 i Technology Fail Acs Trigger O e ExSamp Cal ExTrig G0 IEPE IEPE ini YEN FC EPE ES if epe ou 7 Lere 16 CHANNEL 102 4 kSa s AID DSP FIGURE 4 5 VT1435 1DD VT1435 AND VT1436 FRONT PANELS Module Description www vxitech com Status LEDs e Fail This is the standard VXI Failed indicator It lights briefly when powering up and normally goes out after a few seconds If it stays on it indicates a hardware failure in the module e Acs This is the standard VXI Access indicator When it is on it indicates that another device on the bus is contacting the module for example to transfer data or read registers e Trigger This LED flashes on each time the measurement triggers so when it is blinking it indicates that the measurement is triggering If the VT1432B has the tachometer option the Trigger LED is defined differently See Section 6 VT1435 VT1436 only This LED is associated with each input connector and displays the status of the IEPE transducer while the current source is enabled for the specified channel If the IEPE current source is not enabled then
11. enne trente entren erret nennen nennen 25 Wis ine testet tts oe t eot sii edd tr vede vts 25 VXIpl g amp pl y driVets s E eee tee emeret teet rede e 26 Th Soft Front eC ente teet tie tete rU te S 26 Header and Library Etles 5 E EE A E A 27 VT1432B and E1432 Library 28 i Fe eH RU 28 eedem eie ee ee e He eden Oe e etd HU 28 29 Creating a 2220 29 Input Source and Tachometer Channels esses nnne enne enne 29 Multiple Module Mainframe Measurements 29 Grouping of 15 29 Multiple Module Measurement 421 1 010 1 30 Possible Trigger Line Conflict nece ene ei eie erede 30 Managing Multiple mainframe Measurement 30 Phase Performance in Multiple Mainframe Measurements sees enne nennen enne
12. Breakout Boxes VT3240A and VT3241A 73 VXI Technology Inc 74 Breakout Boxes VT3240A and VT3241A www vxitech com SECTION 9 TROUBLESHOOTING THE VT1432B DIAGNOSTICS The following describes a limited diagnostic program for the VT1432B VT1433B VT1434A VT1435 and VT1436 The program is called hostdiag exe It can be found with the VT1432B Host Interface Software Library at location lt VXIPNP gt winNT VT 1432 bin Usage hostdiag hPsuvV f file L laddr S slot O list h Does a quick partial test by bypassing the tests which involve downloading code to the module f file Uses file as the source of code to download to the module instead of the default sema bin L logical_addr Specifies the logical address of the module to be tested The default value is 8 O option list Tests the module against a list where the model and options are defined For example O VT1432 IDE VT1432B AYF tests the module as an 8 channel VT1432B with the tachometer option Without this option hostdiag only tests what it finds present Hardware which has failed in such a way that it appears to be absent will not be detected without this option P Prints only a pass fail message no diagnostic printouts 5 Runs the standard input output tests in addition to the other diagnostic tests Sources finish testing with 1 V peak 1 kHz sine on each output for manual verification of output fun
13. Trigger detection Trigger modes digital input external source TTL TRG RPM with opt AYF VXI SYSTEM LEVEL FEATURES VXI standard information Conforms to VXI revision 1 4 C size single slot width register based programming Slave Data Transfer Bus functionality A24 address capability and D32 data capability Optional Local Bus capability SUMBUS driver and receiver Requires 2 or 4 TTLTRG lines for multi module synchronization Installing the VT1432B 17 VXI Technology Inc SOFTWARE Driver type VXIplug amp play libraries with source code and ME4X ActiveX driver Supported operating systems MS Windows Linux HP UX Plug amp Play compliance MS Windows Linux HP UX ARBITRARY SOURCE 1D4 SPECIFICATIONS OUTPUT MODES sine and pseudo random with burst and band translation arbitrary waveform with loop or continuous output FREQUENCY BANDWIDTH Sine noise modes reconstruction filter bandwidth DSP data rate f data word size Arb modes reconstruction filter bandwidth data word size Signal output number of output channels maximum amplitude amplitude accuracy harmonic distortion output impedance maximum output current maximum capacitive load 0 Hz to 25 6 kHz 48 00 kHz to 65 636 kHz 16 bits 0 Hz to 6 4 kHz 20 bits 1 10 peak nominal 0 2 dB 10 V peak to 0 158 peak 1 kHz sine wave in 200 Q lt 70 dBc 2 V to 10 V peak range 0 05 to 1 00 scale
14. A24 A32 Enable A one 1 in this field enables access to the device s A24 VME Bus registers A zero 0 disables such access Sysfail Inhibit A one 1 disables the device from driving the SYSFAIL line Reset A one 1 forces the device into a reset state Offset Register This read write register defines the base address of the device s A24 registers The four most significant bits of the Offset register are the values of the four most significant bits of the device s A24 register addresses The 12 least significant bits of the Offset register are always zero 0 Thus the Offset register bits 15 12 map the VME Bus address lines A23 A20 for A24 register accesses A read of the Offset register always returns the address offset most recently written to the Offset register e Port Control Register This register is used to override the Local Bus control of the device This applies to VT1432B modules that are equipped to use Local Bus It has the following format Bit 15 2 1 0 Contents Unused LBus Pipe LBus Enable LBus Pipe Writing a one 1 puts the Local Bus into pipeline mode if the LBus Enable bit is also set Writing a zero 0 allows the Local Bus to operate in some other mode LBus Enable Writing a one 1 enables the Local Bus interface Writing a zero 0 disables the local bus interface RESET VALUE 0 e Page Map Register This read write register defines the internal location of the movable win
15. GS E 005 IE 006 B 17 i 2 2 J Jp a RS Ur Sop n fF MP003 N NI By LOE Ns MP008 ni MP007 g p E fn 4 1 5 22 24 4 AD Replacing Assemblies 81 VXI Technology Inc Ref VTI Part Mfr Mfr Part Des Number Qty Description Code Number A2 52 0459 000 4 VT1432B PC ASSY INPUT 03LB1 52 0459 000 A2 52 0560 000 4 VT1435 PC ASSY INPUT 03LB1 52 0560 000 A4 E1432 66504 1 ASSY LED 66049 1432 66504 5 1432 66505 1 ASSY OPT AYF 03LB1 E1432 66505 10 1433 66910 1 ASSY MAIN OPT UGV O3LBI E1433 66510 All E1433 66911 1 ASSY MAIN 03LB1 E1433 66511 A22 1818 5622 1 ICM DRAM SIMM 8x32 N121 1818 5622 A24 1818 5624 1 ICM DRAM SIMM 1x32 N90 HYM532100AM 70 001 41 0403 000 1 SHTF CVR BTTM ALSK 03LB1 41 0403 000 002 41 0402 000 1 SHTF CVR TOP 03LB1 41 0402 000 MP003 8160 0862 2 GSKT RFI STRIP FNGRS N109 0786 318 MP004 0515 2033 5 SCR MCH M3 0 10MMLG 5091 0515 2033 005 0515 2028 4 2 5 5091 0515 2028 006 1432 44101 1 GSKT THERMAL CONDUCTOR N046 E1432 44101 MP007 1485 40601 1 GSKT RFT CVR ADH SHT 77824 5774 194W 0 008 0515 0372 3 SCR MCH M3 0 8MMLG 93907 0515 0372 009 8160 0634 4 STMP SHLD RFI GRND N109 8160 0634 010 8160 0686 1 STMP FN
16. RAM 0 1 Send Data Receive Data Query Response Command 106 Register Definitions www vxitech com e Parameter 1 7 e Reading 32 bit Registers Reading 32 bit Registers When reading a 32 bit register using 8 or 16 bit modes a simple caching mechanism is used On any read including the most significant byte lowest address the 32 bit register is read and all 32 bits are latched into the read cache A read not including the most significant byte fetches data from the read cache without re reading the register This insures that the data will be unchanged by any intervening write by the DSP which would result in garbled data This mechanism also introduces a hazard Reads of less significant bytes get data from the 32 bit register last read by a most significant byte read In other words the least significant byte cannot be read first or by itself Thus there are two important rules 1 Always read all 32 bits of a 32 bit register 2 Always read the most significant part first Writing 32 bit Registers When writing to a 32 bit register using 8 or 16 bit modes a simple caching scheme is also employed On any write not including the least significant byte highest address the data is latched into the write cache A write to the least significant byte causes the cached data to be written to the 32 bit register in parallel with the current data for the least significant bytes s This mechanism has its own hazards Wr
17. o PO ORTI TOS channel groups COLA connector command response protocol complex sequences 109 configuration hardware 1 34 connector VET432B input nente eene 53 VT1435 and VT1436 53 62 66 constant output level amplifier 24 59 62 111 continuous mode sse 23 40 41 42 43 control Measurements v ELE ege 38 control register i94 controller protocol examples 108 count division nennen enne 64 count register 106 coupling iet abide 24 create group 28 29 30 Current RPM roii err rer 48 D o ic ee ER BV iR RR 47 data transfer bus transferring data buffer scs ti data flow 34 data transfer bus data transfer modes sss 42 decimation filter baseband 2 1 200022 02 2000000000000000000 9 36 Index 115 declaration of conformity essere 8 default logical address 2 14 default values parameters 45 RIO CEU S 28 device message based register based device type register sse CIAQNOSEICS TP disassembly Display button 24 division Input 52 2 21522 64 alo tile deep
18. 76 29395 15 625 78 125 19 53125 97 65625 9 6 25 31 25 7 324219 36 62109 7 629395 38 14697 7 8125 39 0625 9 765625 48 82813 10 3 125 15 625 3 662109 18 31055 3 814697 19 07349 3 90625 19 53125 4 882813 24 41406 11 1 5625 7 8125 1 831055 9 155273 1 907349 9 536743 1 953125 9 765625 2 441406 12 20703 12 0 78125 3 90625 0 915527 4 577637 0 953674 4 768372 0 976563 4 882813 1 220703 6 103516 Sample Freq 65 536 80 000 100 000 102 400 2 of 2 a 3 ae steps with 5 w o 5 with 5 w o 5 with 5 w o 5 with 5 w o 5 0 5120 25600 6250 31250 7812 5 39062 5 8000 40000 1 2560 12800 3125 15625 3906 25 19531 25 4000 20000 2 1280 6400 1562 5 7812 5 1953 125 9765 625 2000 10000 3 640 3200 781 25 3906 25 976 5625 4882 813 1000 5000 4 320 1600 390 625 1953 125 488 2813 2441 406 500 2500 5 160 800 195 3125 976 5625 244 1406 1220 703 250 1250 6 80 400 97 65625 488 2813 122 0703 610 3516 125 625 7 40 200 48 82813 244 1406 61 03516 305 1758 62 5 312 5 8 20 100 24 41406 122 0703 30 51758 152 5879 31 25 156 25 9 10 50 12 20703 61 03516 15 25879 76 29395 15 625 78 125 10 5 25 6 103516 30 51758 7 629395 38 14697 7 8125 39 0625 11 2 5 12 5 3 051758 15 25879 3 814697 19 07349 3 90625 19 53125 12 1 25 6 25 1 525879 7 629395 1 907349 9 536743 1 953125 9 765625 F
19. B Technology VT1432B 4 8 16 CHANNEL 102 4 kSa s DIGITIZER PLUS DSP VT1435 4 8 CHANNEL 102 4 kSa s DIGITIZER PLUS DSP WITH CURRENT SOURCE AND TEDS SUPPORT VT1436 16 CHANNEL 102 4 kSa s DIGITIZER PLUS DSP WITH IEPE CURRENT SOURCE AND TEDS SUPPORT USER S MANUAL P N 82 0110 000 Released July 20 2010 VXI Technology Inc 2031 Main Street Irvine CA 92614 6509 949 955 1894 VXI Technology Inc www vxitech com TABLE OF CONTENTS INTRODUCTION C ertfiCdlion o sees rd tees aos 7 T T Limitation of Wafranty E A E AA E 7 Restricted Rights Legend EAD 7 Declaratron Of Conformlity e ne eedem i e dettes 8 General Safety 5 10 Terms and Symbols eret ehe Ee a 10 Warnings cider eii efe i e eH 10 E 12 SECTION E 13 Installing the V TENA 3 2B 13 teu iie dl Mace ato 13 Inspecting the V T1432Bz c eee E e ote e e eee er 13 Installing the 2 et ehe E tele 14 Mating Connectors oos
20. DSP Bus Registers 6 Preface www vxitech com CERTIFICATION VXI Technology Inc certifies that this product met its published specifications at the time of shipment from the factory VTI further certifies that its calibration measurements are traceable to the United States National Institute of Standards and Technology formerly National Bureau of Standards to the extent allowed by that organization s calibration facility and to the calibration facilities of other International Standards Organization members WARRANTY The product referred to herein is warranted against defects in material and workmanship for a period of three years from the receipt date of the product at customer s facility The sole and exclusive remedy for breach of any warranty concerning these goods shall be repair or replacement of defective parts or a refund of the purchase price to be determined at the option of VTI For warranty service or repair this product must be returned to a VXI Technology authorized service center The product shall be shipped prepaid to VTI and VTI shall prepay all returns of the product to the buyer However the buyer shall pay all shipping charges duties and taxes for products returned to VTI from another country VTI warrants that its software and firmware designated by VTI for use with a product will execute its programming when properly installed on that product VTI does not however warrant that the operat
21. E S LB 2 24 4 Remove ribbon cable from the 4 assembly by pulling back the latch on the connector and removing cable Be sure to note the orientation of the cable d Dy atcl he 1 2 1 28 Y oN Replacing Assemblies VXI Technology Inc To replace the front panel with another that does not have its own side brackets remove the brackets from the old front panel using a T 8 Torx driver Be sure to note the positioning of the brackets alignment is critical ag replace the front panel with another that does not have the label already attached remove the tape backing and place it on the front panel as shown VT1432B only 92 Replacing Assemblies www vxitech com REMOVE THE INPUT ASSEMBLIES 1 Remove top cover see To Remove the Top Cover Remove the front panel see steps 1 and 2 in To Remove the Front Panel Note that the following steps are showing illustrations of a VT1432B with a standard configuration four input assemblies If the VT1432B has option 1DE two input assemblies the following steps will be the same except the length and quantity of screws 2 Using a T 10 Torx driver remove the four screws that attach the assemblies to the bottom cover EE E Sue W QV A 5 ape Aah 3 Remove the top two assemblies by gently pulling them forward releasin
22. MXI 2 MXI 2 Extender Extender Interface Interface VT1432B VT1432B 521 m ses 25 f i L LI il A E Ex VXI Mainframe C E VXI Mainframe E Example 3 Embedded Slot 0 Controller Example 4 MXI 2 Daisy Chain FIGURE 3 4 MULTIPLE MAINFRAMES THREE MAINFRAMES Synchronization in Multiple mainframe Measurements A TTL trigger line between VT1432Bs making group measurements keeps all modules synchronized This is an open collector line where each module holds the one designated as the SYNC line low until the module is ready to advance to the next measurement state Another TTL Trigger line is designated to carry the sample clock to all modules This shared sample clock may come from any VT1432B module in Mainframe A or from an external signal routed through the Slot 0 Commander in mainframe A One module is responsible for pulling the SYNC line low to start each group s state transition Then each module holds the line low until it is ready When all modules are ready the SYNC line drifts high The unidirectional line prevents modules in Mainframe B from holding off modules in Mainframe A Using the VT1432B 33 VXI Technology Inc The lowest logical address must be in mainframe A due to VXI MXI and Resource Manager RM constraints Group constraints with the VXIplug amp play Library force modules in Mainframe A to have their FIFOs emptied last The VXIplug amp play library reads data in channel or
23. The following table provides the name and address for the manufacturers CAGE Commercial And Government Entity code numbers Mfr Code listed in the replaceable parts tables Mfr Code Mfr Name Address OPL50 Quantum Graphics Inc Redmond WA 98052 U S A O3LBI VXI Technology Inc Irvine CA 92614 U S A 05791 Lyn Tron Inc Spokane WA 99224 U S A 30817 Laird Technologies Delaware Water Gap PA 18327 U S A 71824 Schlegel Systems Inc Rochester NY 14623 U S A 93907 Textron Fastening Systems Decorah IA 52101 U S A The manufacturer s listed below have not requested CAGE code numbers The Mfg Code provided is arbitrarily assigned and used for purposes of identification in this user s manual only Mfr Code Mfr Name Address N046 Boyd Corporation Modesto CA 95357 U S A NO91 Illinois Tool Works Inc Tempe AZ 85281 U S A N109 Laird Technologies Littleton CO 80120 U S A N114 Littlefuse Inc Denver CO 80222 U S A N116 Logan Industries Inc Spokane WA 99216 U S A N118 Mason Cable amp Assembly Inc Enumclaw WA 98022 U S A 78 Replacing Assemblies www vxitech com Assemblies without Option AYF or 104 s 004 7 MP002 05 016 MP017 A MP013 MPO11 Replacing Assemblies 79 VXI Technology Inc Ref VTI
24. amplifier constant output 24 59 arbitrary mode arbitrary output arbitrary cioe arbitrary source front panel ARM assemblies auto arm auto trigger AU TOSZGTOs Fe HEY PANE B backplane connections 2 54 base sample rates e EEs 36 2 drugs 36 111 baseband decimation 22 2 36 block diagram E decimation filter 2 1 0 2020 020000000000000000000000 36 49 source option 2 60 t chometer options oue eer eee perle 64 block mode 40 41 42 43 111 113 block size BOOTED testi sec pnto ird TES 39 BOOTING State nito oa PEOR US 39 bound mode breakout box 47 53 62 66 69 70 73 111 70 70 voltage 270 breakout box cables 270 burst mode 59 burst source random 24 b rst SINE sd dace teet etes e e Ie oou 24 bus priority interrupt 0 1 54 pull er 54 Cal connector calibration ease deett ie ote de e EYES certification
25. can be used as an interface The soft front panel can be useful for checking the system to make sure that it is installed correctly and that all of its parts are working However it is not very useful for making measurements It cannot be controlled from a program and it does not access all of the VT1432B s functionality 2 35 soft Panel FIGURE 2 1 THE SOFT FRONT PANEL INTERFACE The buttons on the right side of the SFP display are defined as follows Meas This button opens the Measurement Control dialog box that sets Measurement single repeat Mode block continuous Trigger auto manual input Frequency span Block size Getting Started 23 VXI Technology Inc Input This button opens a dialog box that sets up the VT1432B s inputs and configures Channel number Range Coupling ac or dc Grounding method Digital anti alias filter Analog anti alias filter Trigger on off Trigger mode level bound Trigger level Hysteresis Trigger Slope There is a checkbox to make all channels identical Source This opens a dialog box for controlling the source output of the VT1432B s source This is only available for VT1432B s that have the arbitrary source option 1D4 This sets Channel number Active on off Mode sine burst sine random burst random Ramp rate Sine frequency Sine phase Output normal grounded open cal multi COLA Constant Output Level Amplifier off on Duty Cycle S
26. depending on the nature of the call When the same library function may be called with either a channel or a group identifier its target is shown by a parameter named ID Abbreviation for transducer electronic data sheet Abbreviation for transistor transistor logic a standard for electrical signals TTL TRiGger lines part of the VXI bus Abbreviation for virtual engineering environment a program which facilitates the setup and programming of instruments by employing a graphic user interface An industry standard bus on the VXI backplane for module control setup and measurement data transfers For measurement data transfers the Local Bus offers higher transfer rates Abbreviation for VME extensions for instrumentation a standard specification for instrument systems A set of standards which provides VXI users with a level of standardization across different vendors beyond what the VXI standard specifications spell out In instruments that support zoom one can select a frequency span around a specified center frequency in order to focus on a specific frequency band 114 Glossary www vxitech com INDEX A A16 address space 16 registers 2 A24 address sse ADA T PISUOIS eee cote News deret eee e eios A32 address space i eerte access LED ii eee teet eie oy address 44000000
27. 0 00 A 0 00 A 0 00 A 0 00 A 0 26 A 0 22 A 0 00 A Cooling 10 C Rise External Device VT3243 MICROPHONE POWER Voltage 5 V 5 2 V 2 V 12 V 12 V 24 V 24 V 5 V STDBY DC Current 0 00 A 0 00 A 0 00 A 0 00 A 0 00 A 0 25 A 0 15 A 0 00 A Cooling 10 C Rise External Device 20 Installing the VT1432B www vxitech com SECTION 2 GETTING STARTED WITH THE VT1432B INTRODUCTION This section provides assistance in getting the VT1432B VT1435 and VT1436 modules running and making simple measurements It shows how to install the VXIplug amp play Library and how to run some of the example programs that are included The VXIplug amp play Library communicates with the hardware using VISA Virtual Instrument Software Architecture VISA is the input output standard upon which all the VXIp ug amp play software components are based The library is compatible with Microsoft Windows operating systems see System Requirements in this section for details For more information see Where to Get More Information m Section 3 Getting Started 21 VXI Technology Inc System Requirements e AnIBM compatible personal computer with either Windows 2000 Windows or later With any Windows OS use the VXIplug amp play library e Additional hardware and software to connect the IBM compatible computer to a VXI mainframe e Software is supplied on CD ROM VXIplug amp play Drivers and Product Manuals CD The VXIpl
28. 0515 1968 2 2 5 6 O3LBI 0515 1968 MP209 0515 1375 2 SCR MCH M2 5 6MMLG 93907 0515 1375 MP210 43 0016 003 1 LABEL VXI EXT VXI TECH LOGO O3LBI 43 0016 003 MP211 43 0016 002 1 LABEL VXI EXT VXIBUS O3LBI 43 0016 002 Front Panel VT1435 36 Common Components Ref VTI Part Mfr Mfr Part Res Number Qty Description Code Number MP206 1400 84106 1 MOLD HNDL 144 20897 255 MP207 1400 84105 1 MOLD KIT BTTM EXTR HNDL N144 20897 254 MP208 0515 1968 2 SCR MCH M2 5 6MMLG O3LBI 0515 1968 MP209 0515 1375 2 SCR MCH M2 5 6MMLG 93907 0515 1375 MP210 43 0016 003 1 LABEL VXI EXT VXI TECH LOGO 03 1 43 0016 003 211 43 0016 002 1 LABEL VXI EXT VXIBUS O3LBI 43 0016 002 Replacing Assemblies 87 VXI Technology Inc Front Panel VT1435 and VT1436 Ref VTI Part Mfr Mfr Part Res Number Qty Description Code Number MP200 41 0443 000 1 VT1435 8 CH PNL FRT STNDRD 03LB1 41 0443 000 W MP200 43 0158 000 1 VT1435 PNL OVRLY STNDRD 03LB1 41 0158 000 or W MP200 43 0158 002 1 VT1435 PNL OVRLY 03LB1 41 0442 002 or W MP200 43 0158 004 1 VT1435 PNL OVRLY SOURCE 03LB1 41 0442 004 MP201 41 0443 001 1 VT1436 16 CH PNL FRT STNDRD O3LBI 41 0443 001 W MP201 43 0158 001 1 VT1436 PNL OVRLY STNDRD 03 41 0158 001 W MP201 43 0158 003 1 VT1436 PNL OVRLY O3LBI 41 0442 003 or W MP201 43 0158 005 1 VT1
29. 13 through 16 are located on separate SCAs When settling the digital filter waits a designated number samples before outputting any data See soft front panel Memory locations in both a VXI module and in a host or controller which are shared and can be used to transmit data between the host and module The module which occupies the left most slot in a VXI mainframe It supplies important signals for the rest of the system Sub miniature a type of connector A VXIplug amp play program which provides and easy to use interface for the VT1432B It can be used in a Windows environment Abbreviation for static random access memory Glossary 113 summer sync trigger line SYSRESET system module tachometer target TEDS TTL TTLTRG VEE VME Bus VXI VXIplug amp play Zoom VXI Technology Inc A circuit that outputs the sum of two input signals A TTL line on the VXI backplane used for synchronization or triggering signals SYStem RESET line part of the VXI bus The module with the lowest VXI logical address It needs to be set to output the synchronization pulse for a multiple module group All system sync pulses come from the system module The tachometer produces a signal which is proportional to the rotation of a device It can be programmed to produce one or more signals per revolution The target of a library function is either a channel a group or rarely a module
30. 216 447 8951 VXI Technology Lake Stevens Instrument Division VXI Technology Inc 1924 203 Bickford Snohomish WA 98290 Phone 425 212 2285 Fax 425 212 2289 Technical Support Phone 949 955 1894 Fax 949 955 3041 E mail support vxitech com Visit http www vxitech com for worldwide support sites and service plan information 12 Preface www vxitech com SECTION 1 INSTALLING THE VT1432B OVERVIEW VXI Technology s VT1432B VT1435 and VT1436 digitizers henceforth referred to as VT1432B except where differences exist are C size single slot register based VXI modules that include digital signal processing DSP transducer signal conditioning alias protection digitization and high speed measurement computation In addition to these features the VT1435 and VT1436 modules have integrated electronics piezoelectric IEPE current sources as well as optional transducer electronic data sheet TEDS support An optional arbitrary source or dual input tachometer can be added to the VT1432B for increased measurement functionality On board computation of measurement results fast data transfer to the host computer and a dedicated high speed data bus for module to module communication all combine to provide outstanding measurement architecture for demanding mechanical acoustic and electrical test applications Putting so much capability into these instruments decreases system cost while
31. 5 2 V 2 V 12 V 12 V 24 V 24 V 5 V STDBY DC Current 5 50 A 0 95A 0 03A 0 56 0 05 0 44 0 42 0 00 Dynamic Current 0 20 A 0 02 A 0 01A 0 02 A 0 01A 0 01 0 01 0 00 Cooling 10 C Rise 5 08 L s 0 51 mm H O VT1434A POWER Voltage 5 5 2 2 V 12 V 12 V 24 V 24 V 5 V STDBY DC Current 4 90 A 0 60 A 0 03A 0 60 A 0 55A 0 20 A 0 25A 0 00 A Dynamic Current 0 03A 0 03A 0 01A 0 04A 0 05A 0 01A 0 01A 0 00 A Cooling 10 C Rise 4 39 L s 0 32 mm VT1435 POWER Voltage 5 V 5 2 V 2 V 12 V 12 V 24 V 24 V 5 V STDBY DC Current 530A 2 0 03 0 28A 0 04A 0 25A 0 25A 0 00 A Dynamic Current 0 70 A 0 02 A 0 01A 0 02 A 0 02 A 0 02 A 0 02 A 0 00 A Cooling 10 C Rise 3 61 L s 0 35 mm H O VT1436 POWER Voltage 5 5 2 2 V 12 V 12 V 24 V 24 V 5 V STDBY DC Current 7 90 A 0 19A 0 03A 0 41A 0 04 0 47 0 47 0 00 Dynamic Current 0 67A 0 02 A 0 01A 0 02 A 0 02 A 0 03 0 02 A 0 00 A Cooling 10 C Rise 5 76 L s 0 56 mm H O VT1435 1DD POWER Voltage 5 5 2 V 2 V 12 V 12 V 24 V 24 V 5 V STDBY DC Current 4 00 A 0 08A 0 03A 0 22 0 04 0 14A 0 14A 0 00 A Dynamic Current 0 68A 0 02 A 0 01A 0 02 A 0 01 0 02 0 02 A 0 00 A Cooling 10 C Rise 2 55 L s 0 25 mm H O Listed current for 12 V and 5 2 V measured with IEPE current enabled all inputs connected to IEPE sensors and the individual channel range settings adjusted for linear operation with no over voltage conditions Un
32. External Clock The VT1432B can be programmed to accept an external word rate clock from the sample 0 line on the VXI bus The digital filters are still functional providing a range of effective word rates All sampling is done simultaneously and is not multiplexed To connect an external sample clock use the External Sample SMB connector on front panel of the VT1432B External sample at word rate and External Trigger are available on the front panel of VT1432B s that do not have an arbitrary source or tachometer option The external clock must be a fixed frequency Its maximum frequency must not be higher than 100 kHz Its minimum frequency must be at least 40 96 kHz CALIBRATION DESCRIPTION The Cal connector on the front panel of the standard VT1432B can be configured in software as either an input or an output It can be set to any of four settings DC the VT1432B outputs a dc calibration signal from the millivolt range up to 15 V AC the VT1432B outputs a signal from an arbitrary source option in the same module or a different VT1432B module in the system e Ground the connector is shunted to ground for a 0 V reference e Open Circuit in this mode the connector becomes an input which can receive a calibration signal up to 15 V The VT1432B is calibrated at the factory and the calibration placed in EPROM memory for use at each power up In addition an auto zero function is provided Module Description 5
33. Number Qty Description Code Number W2 8120 6765 2 CBL ASM CXL W FE N116 224741 W3 8120 6766 2 CBL ASM CXL O3LBI N116 8120 6766 W4 8120 6762 1 RIBBON CABLE N118 8120 6762 Replacing Assemblies 85 VXI Technology Inc Cables with Option 104 Ref VTI Part Mfr Mfr Part Des Number Qty Description Code Number W2 8120 6765 2 CBL ASM CXL W FE N116 224741 W3 8120 6766 2 CBL ASM CXL 03LB1 N116 8120 6766 WA 8120 6762 1 RIBBON CABLE N118 8120 6762 Replacing Assemblies www vxitech com Front Panel 1432B MP210 SS MP200 MP201 MP202 MP206 203 MP204 205 MP208 MP209 Ref VTI Part Mfr Mfr Part Res Number Qty Description Code Number MP200 41 0442 001 1 VT1432B 16 CH PNL FRT STNDRD O3LBI 41 0442 001 MP201 41 0442 000 1 VT1432B 8 CH PNL FRT OPT 1DE O3LBI 41 0442 000 MP202 41 0442 002 1 VT1432B 4 CH PNL FRT 1 O3LBI 41 0442 002 MP203 1432 44301 1 LBL FRT PNL SMB S STD 0 50 E1432 44301 MP204 E1432 44302 1 LBL FRT PNL SMB S OPT 1D4 O3LBI E1432 44302 MP205 E1432 44303 1 LBL FRT PNL SMB S AYF O3LBI E1432 44303 MP206 E1400 84106 1 MOLD KIT TOP EXTR HNDL 144 20897 255 MP207 1400 84105 1 MOLD HNDL 5144 20897 254 208
34. Part Mfr Mfr Part Des Number Qty Description Code Number A2 52 0459 000 4 VT1432B PC ASSY INPUT O3LBI 52 0459 000 A2 52 0560 000 4 VT1435 PC ASSY INPUT 03LB1 52 0560 000 A4 E1432 66504 1 ASSY LED 66049 1432 66504 10 1433 66910 1 ASSY MAIN OPT UGV 03LB1 E1433 66510 All E1433 66911 1 ASSY MAIN 03LB1 E1433 66511 A22 1818 5622 1 ICM DRAM SIMM 8x32 N121 MT16D832M 6 A24 1818 5624 1 ICM DRAM SIMM 1 32 N90 HYM532100AM 70 001 41 0403 000 1 CVR BTTM ALSK O3LBI 41 0403 000 MP002 41 0402 000 1 SHTF CVR TOP 03LB1 41 0402 000 MP003 8160 0862 2 GSKT RFI STRIP FNGRS 109 0786 318 MP004 0515 2033 5 SCR MCH M3 0 10MMLG 091 0515 2033 MP005 0515 2028 4 SCR MCH M2 5 6MMLG 091 0515 2028 006 1432 44101 1 GSKT THERMAL CONDUCTOR N046 E1432 44101 MP007 E1485 40601 1 GSKT RFT CVR ADH SHT 77824 5774 194W 0 MP008 0515 0372 3 SCR MCH M3 0 8MMLG 93907 0515 0372 MP009 8160 0634 4 STMP SHLD RFI GRND 109 8160 0634 010 8160 0686 1 STMP FNGRS RFI BECU 109 786 185 011 8160 0683 1 STMP STRP SPNG FLTR GRD 109 0097 551 17 012 8160 0869 6 GSKT RFI 2MM X 4MM 71824 E8119T00090 013 0515 0368 2 SCR MCH 2 5 0 45 NO91 0515 0368 014 0380 4042 3 STDF HXMF M3 0 16 7MMLG 05791 SS5172 16 7 01 MP016 0515 2383 2 4 SCR MCH M3 0 12MMLG 03LB1 0515 2383 80 Replacing Assemblies www vxitech com Assemblies with Option AYF i 004 H E Ke MP002
35. RAM 0 OE IRQ Status Register IRQ Reset Register IRQ Config Register 0 Page Map Register 0816 Port Control Register 0616 Offset Register Status Register Control Register 0216 Device Type 00 6 ID Register Logical Address Register 102 Register Definitions www vxitech com The A24 Registers The following A24 registers are accessible at the base address defined by the device s offset Register The registers at offsets 0016 to are not accessible using longword D32 accesses The registers at offsets 1016 to may be accessed by any of the of the D08 EO D16 or D32 modes Movable DSP 8 0000 6 Bus Window 7 FFFF 6 Fixed DSP 3 000016 Bus Window 2 FFFF 6 Send Receive 2 000016 Data Registers 1 6 Fixed DSP 0 004F 16 Bus Window 0 003F i VXIbus A16 0 0000 6 Registers The A24 registers are defined as follows VXIbus A16 Registers These the same registers accessed at the device s A16 base address Fixed DSP Bus Window Accesses to this region are mapped to the corresponding locations at the base of the internal DSP s memory map also accessible through Page 0 of the moveable DSP bus window Send Receive Data Registers Accesses to any address in this region will read write the Send and Receive Data registers defined in the A16 register set VME Bus D32 B
36. VT1435 VT1436 PRODUCT OPTIONS All PRODUCT CONFIGURATIONS All VXI Technology Inc declares that the aforementioned product conforms to the requirements of the Low Voltage Directive 73 23 EEC and the EMC Directive 89 366 EEC inclusive 93 68 EEC and carries the CE mark accordingly The product has been designed and manufactured according to the following specifications SAFETY EN61010 2001 EMC EN61326 1997 w A1 98 Class A CISPR 22 1997 Class A VCCI April 2000 Class A ICES 003 Class A ANSI C63 4 1992 AS NZS 3548 w A1 4 2 97 Class A FCC Part 15 Subpart B Class A EN 61010 1 2001 The product was installed into a C size VXI mainframe chassis and tested in a typical configuration I hereby declare that the aforementioned product has been designed to be in compliance with the relevant sections of the specifications listed above as well as complying with all essential requirements of the Low Voltage Directive June 2007 Steve Mauga QA Manager 8 Preface www vxitech com Preface VXI Technology Inc GENERAL SAFETY INSTRUCTIONS Review the following safety precautions to avoid bodily injury and or damage to the product These precautions must be observed during all phases of operation or service of this product Failure to comply with these precautions or with specific warnings elsewhere in this manual violates safety standards of design manufacture and intended use of the product Service
37. VXI module are used for tachometer inputs When this option is not installed these connectors are normally used for External Sample and Trigger Each tachometer input has a programmable trigger level Each tachometer pulse causes a Tach Edge Time to be recorded in a 16 kword FIFO A Tach Edge Time is the instantaneous value of the 32 bit Tach Counter Decimate number can be set to ignore a number of tachometer pulses before recording each Tach Edge Time Holdoff time can be set to avoid false triggering due to ringing One of the tachometer inputs can be programmed for use as a trigger input rather than a tachometer input In this mode the tachometer option can trigger the system and measure the time between the trigger and the next sample clock edge The analog signal from either of the tachometer inputs can be routed to an input channel using the internal calibration path Tachometer Inputs The tachometer has two inputs that connect to analog conditioning holdoff and FIFO circuitry See the Figure 6 1 The inputs can be configured so that one input connector Tach 2 becomes an external trigger input and the other Tach 1 remains a tachometer input The Tach 1 connector cannot be a trigger input The switch that determines this configuration is controlled by software External Trigger Input A VT1432B without a tachometer option can accept a TTL external trigger signal see Trigger Lines TTL
38. be Arm RPM Step Arm Trigger External Trigger 40 Using the VT1432B www vxitech com To begin a throughput session at this same RPM TDC event the first external trigger after a specified RPM should start a continuous mode measurement Now using overlap block mode the settings would be Pre Arm RPS Step Arm Arm Auto Trigger Auto In the measurement loop an arm must take place before a trigger The number of triggers that occur before waiting for another arm condition can be defined The default is one trigger for each arm For each trigger a block of data is sent to the host The first arm in a measurement is the pre arm By default the pre arm condition is the same as the regular arm conditions Valid Arm and Pre Arm conditions are e Auto Arm e Manual Arm e RPM Step Arm Valid trigger conditions are Auto Trigger Input Trigger Source Trigger External Trigger Manual Trigger Tachometer Edge Trigger Triggering The following is a short discussion of triggering for the VT1432B Triggering is defined as the transition from the ARMED state to the TRIGGER state This transition is caused by a low going edge on TTL trigger line The function vt1432 getTtltrgLines selects which of the eight TTL trigger lines is to be used The low going transition of the TTL trigger line can be caused by any of the following items Trigger Type Enabling Function the AUTO TRIGGER circuitry vt1432 setAutoTrig
39. factor sine wave gt 1 load 0 5 Q typical 100 mA typical 0 01 uF typical AMPLITUDE CONTROL Maximum amplitude Amplitude ranges Amplitude scale factor 10 V peak nominal 79 mV peak to 10 V peak in 0 375 dB steps 0 0 to 1 0 with 20 bit resolution RESIDUAL DC OFFSET Offset after autozero 2 mV Offset after shutdown 20 mV Zeroing resolution 100 uV OUTPUT OVERLOAD TRIP gt 17V AMPLITUDE RAMP DOWN TIME 0 s to 30 s programmable SHUTDOWN Shutdown input TTL levels Shutdown time 5s Shutdown time ac fail lt 4 ms TACHOMETER INPUT AYF SPECIFICATIONS TACHOMETER COUNTER 32 bit counter with roll over detector bit DECIMATE COUNTER 16 bit counter INPUT SIGNAL TRIGGER LEVEL TYPICAL Voltage range 25 V to 25 V Resolution levels lt 5 V 40 mV Resolution levels gt 5 V 200 mV Hysteresis 0 mV to 250 mV programmable Slope positive or negative programmable INPUT SIGNAL TIMING Maximum pulse width Maximum pulse rate 5 us 100 kHz Trigger hold off 1 to 65536 clock periods INPUT IMPEDANCE 20 kQ typical 18 Installing the VT1432B www vxitech com ENVIRONMENTAL SPECIFICATIONS OPERATING RESTRICTIONS Ambient temperature 0 C to 55 Humidity non condensing 20 to 90 relative humidity at 40 C Maximum altitude 4600 m 15 000 ft STORAGE AND TRANSPORT RESTRICTIONS Ambien
40. function is enabled on a by four basis The input connectors on the VT1435 are grouped onto two SCAs signal conditioning assemblies each four input connectors channels 1 through 4 on one SCA and channels 5 through 8 on the other The same is true for the VT1436 except four SCAs are used If the IEPE current source is enabled on an SCA all channels on the SCA will have their IEPE current source enabled SCAs that do not have a current source enabled may be used for standard voltage measurements Each channel s current source is isolated allowing operation of all channels in IEPE mode to float relative to one another This is not the case when single ended operation is selected Single Ended Relay The inputs of each channel are differential and but the VT1435 36 channels have the capability to connect the terminal of each channel to system ground GND This feature makes each channel single ended and essentially creates a non isolated system by tying all channels terminals to the same GND potential The terminals are connected to GND via a 500 nominal positive temperature coefficient PTC resistor If the module senses a channel s terminal being forced to a potential other than GND via some external source the 50 resistor will increase and create a high resistance path from the terminal to GND This characteristic effectively creates an open circuit disconnecting the terminal from GND safely al
41. may damage components in the module 5 Place the module s card edges top and bottom into the module guides in the slot 6 Slide the module into the mainframe until the module connects firmly with the backplane connectors Make sure the module slides in straight 7 Attach the module s front panel to the mainframe chassis using the module s captive mounting screws e VXI Mainframe Slotted 1 Captive Screws Power Switch FIGURE 1 2 VT1432B CHASSIS INSTALLATION MATING CONNECTORS The VT1432B utilizes standard SMB connectors on its front panel An example of an SMB cable mount connector which will couple with this connector is P N PE4046 Pasternack Enterprises Inc CAGE 53919 although other SMB cable mount connectors may be used INSTALLING THE HOST INTERFACE LIBRARIES After the hardware has been assembled the next step in installing a VT1432B is to install the host interface libraries Refer to the section titled Troubleshooting the VT1432B to continue the installation process Installing the VT1432B 15 VXI Technology Inc STORING THE MODULE Store the module in a clean dry and static free environment For other requirements see storage and transport restrictions in Specifications TRANSPORTING THE MODULE Package the module using the original factory packaging or packaging identical to the factory packaging Containers
42. or queuing up more than one block when in block mode There is also no way for a FIFO overflow to occur The VT1432B s overlap block mode can be configured to act exactly like traditional block mode It also has additional capabilities as described below Continuous Mode In this mode the input hardware waits for an arm and trigger and then starts acquiring data continuously If the host is slow several blocks can be queued up in the input hardware If the host gets far enough behind a FIFO overflow occurs and the input stops acquiring data The VT1432B s overlap block mode can be configured to act similarly to continuous mode but not identically The VT1432B can also use the traditional continuous mode Overlap Block Mode Overlap block mode combines features of both block mode and continuous mode The main difference between overlap block mode and traditional block mode is that overlap block mode allows additional arms and triggers to occur before an already acquired block is sent to the host A trigger can occur before the end of the previous block so overlapping blocks are possible hence 42 Using the VT1432B www vxitech com the name overlap block mode As in continuous mode there is an overlap parameter which controls how much overlap is allowed between consecutive blocks Limit on Queuing of Data In overlap block mode a number of trigger events may be queued up before the host reads the data for those trigg
43. register based devices are programmed at a very low level using binary information The greatest advantage of this is speed Register based devices communicate at the level of direct hardware manipulation and this can lead to much greater system throughput Users do not need to access the registers in order to use the VT1432B The VT1432B s functions can be more easily accessed using the VT1432B Host Interface Library software However this section describing the registers is provided as supplemental information Register Definitions 101 16 Registers VXI Technology Inc The following A16 registers are accessible at the base address defined by the device s logical address The register at offsets 0016 to are not accessible using longword 032 accesses The registers at offsets 10 to may be accessed by any of D08 EO D16 D32 modes of these registers are also accessible at the device A24 base address Address 3Ci6 Read Parameter 7 Register 3 16 3816 Parameter 6 Register 3616 Parameter 5 Register 3216 Parameter 4 Register 2 16 2 16 Parameter 3 Register 2A16 2816 Parameter 2 Register 2616 2416 Parameter 1 Register 2216 2016 Query Response Register Command Register FIFO Count 1 16 1816 Send Data Receive Data 1616 RAM 1 1216 1046
44. register level The 1432 VT1435 VT1436 and VT1433B are register based VXI devices Module dependent commands change a parameter for all channels of the module even when only one channel has been specified in the channel list A bus standard that can be used to connected multiple VXI mainframes mode of data collecting in used in the VT1432B and VT1433B It is similar to block mode except that it allows additional arms and triggers to occur before an already acquired block is sent to the host A Local Bus mode in which data is sent through a module and on to the next one See VXIplug amp play Abbreviation for random access memory Register based devices communicate with the VXI bus by way of registers They must be programmed with low level binary commands but they can communicate faster than message based devices The VT1432B VT1435 VT1436 and VT1433B are register based VXI devices Memory locations in the hardware of a VXI module that can be used to program the module at a low level Abbreviation for revolutions per minute Abbreviation for read only memory The rate at which the measurement data is sampled For the VT1432B the sample rate is 2 56 times the frequency span Sample rate is abbreviated f for sample frequency Abbreviation for signal conditioning assembly Groups of four input channels are located on one SCA Channels 1 through 4 channels 5 through 8 channels 9 through 12 and channels
45. seven such lines Using vt1432 setlInterruptPriority the VT1432B can be set up to use any one of them The VTI432B can interrupt the host computer in response to different events Use vt1432 setInterruptMask to specify a mask of events on which to interrupt This mask is created by OR ing together the various conditions for an interrupt The following table shows the conditions that can cause an interrupt Define in vt1432 h Description VT1432 IRQ BLOCK READY Scan of data ready in FIFO VT1432 IRQ MEAS ERROR FIFO overflow VT1432 IRQ MEAS STATE CHANGE Measurement state machine changed state VT1432 IRQ MEAS WARNING Measurement warning VT1432 OVERLOAD CHANGE Overload status changed VT1432 IRQ MEAS STATE CHANGE Measurement state machine changed state VT1432 MEAS WARNING Measurement warning VT1432 OVERLOAD CHANGE Overload status changed VT1432 IRQ SRC STATUS Source channel interrupt VT1432 IRQ 5 Raw tachometer times ready for transfer to other modules 1432 TRIGGER Trigger ready for transfer to other modules TABLE 3 2 INTERRUPT MASK BIT DEFINITIONS Using the VT1432B 43 VXI Technology Inc Interrupt Handling To make the VT1432B module cause an interrupt both a mask and a VME Interrupt line must be specified by calling vt1432 setlnterruptMask and vt1432 setlnterruptPriority respectively Once the mask and line have been set and an interrupt occurs the cause of the int
46. standard VXI Failed indicator It lights briefly when powering up and normally goes out after a few seconds If it stays on it indicates a hardware failure in the module Acs This is the standard VXI Access indicator When it is on it indicates that another device on the bus is contacting the module for example to transfer data or read registers e Source If this LED is illuminated it indicates that the source is on and producing output VT1435 and VT1436 only This LED is associated with each input connector and displays the status of the IEPE transducer while the IEPE current source is enabled for the specified channel If the IEPE current source is not enabled then the LED will be non illuminated SMB Connectors not including channel input connectors e COLA This is the output connector for the COLA Constant Output Level Amplifier output This connector can also be configured as a summer input A signal connected to this input is summed with the internal source output to create the final output e Shut Shutdown Shorting the center pin of this connector to its shield causes the source to ramp down and shut off e Out This is the main output of the arbitrary source The Out connector can also be configured to output a calibration signal This is not quite the same as the calibration signal described in Section 4 because it comes directly from the internal source without going through the other circui
47. state until the Sync Trigger line goes high If the VT1432B is programmed with a pre trigger delay it collects enough data samples to satisfy this pre trigger delay and then releases the Sync Trigger line If no pre trigger delay has been programmed it releases the Sync Trigger line immediately When all modules in a system have released the Sync Trigger line allowing it to go high a transition to the TRIGGER state occurs Upon entering the TRIGGER state the VT1432B continues to collect data into the FIFO discarding any data prior to the pre trigger delay The VT1432B remains in the TRIGGER state until it sees a high to low transition of the Sync Trigger line The Sync Trigger line is pulled low by any VTI432B which encounters a trigger condition and is programmed to pull the Sync Trigger line If any VT1432B is programmed for auto triggering with vt1432 setAutoTrigger the Sync Trigger line is pulled low immediately The Sync Trigger line may also be pulled low by an explicit call to the function vt1432 triggerMeasure Upon entering the MEASURE state the VT1432B continues to collect data The VT1432B also presents the first data from the FIFO to the selected output port making it available to the controller to read The VT1432B holds the Sync Trigger line low as long as it is actively collecting data In overlap block mode the VT1432B stops taking data as soon as a block of data has been collected including any programmed pre or post trigge
48. tachometer handle for tachometer only functions The all channels handle could then be used for all other functions MULTIPLE MODULE MAINFRAME MEASUREMENTS Grouping of Channels Modules The interface library for the VT1432B is designed to allow programming of several channels from one or several distinct modules as if they were one entity Each VT1432B module has up to l6 channels The library may control up to a maximum of 255 VTI432B modules 4 080 channels Using the VT1432B 29 VXI Technology Inc The function vt1432_createChannelGroup can be used to declare any number of groups of channels possibly overlapping Each group can be uniquely identified by a group ID The target of a library function is either a channel a group or rarely a module depending on the nature of the call When the same library function may be called with either a channel or a group identifier its target is shown by a parameter named ID Multiple Module Measurements A channel group that spans more than one module will need to be configured to use the TTL trigger lines on the VXI bus for inter module communications This configuration is automatically performed in the vt1432_initMeasure call unless defeated using vt1432_setAutoGroupMeas The following discussion outlines what vt1432_initMeasure does automatically This must be done by the user if vt1432_setAutoGroupMeas has been used to defeat auto configuration There are
49. that of the Status ID word returned by an interrupt acknowledge LACK cycle It differs from the IACK cycle in that the ACK cycle will clear the status bits and cause the de assertion of the IRQ line The register has the following format Bit 15 8 7 0 Contents Status Logical Address Status Each of these bits indicates the status of a cause of interrupt A one 1 in a bit position indicates that the corresponding source is actively requesting and interrupt Logical Address This is the device s current logical address IRQ Reset Register This register is used to reset the interrupt function It has the following format Bit 15 8 7 0 Contents Reset Bits Unused Reset Bits Writing a one 1 to any of these bits will clear the corresponding bit in the IRQ status register This will not disable subsequent interrupt generation Clearing all of the IRQ status bits will cause the de assertion of the IRQ line Writing a zero 0 has no effect e Ram 0 1 These are 32 bit general purpose RAM locations which are also accessible to the on board DSP See the following section regarding 016 008 access of 32 bit registers e Send Data Register Reading this register gets the next available word from the measurement data FIFO The measurement data FIFO is a 32 bit device See the following section regarding D16 D08 access of 32 bit registers e Receive Data Register Writing to this reg
50. the LED will be non illuminated The operation of the LED is detailed below Condition LED Status Transducer shorted Illuminated RED Short circuit detected Transducer connected Illuminated GREEN Normal Transducer not connected Illuminated RED Open circuit detected IEPE Current Source turned OFF Non Illuminated IEPE current source not enabled SMB Connectors not including channel input connectors e ExSamp This is an input connector for an external sample clock The sample clock must be TTL level and have a frequency between 40 96 kHz and 100 kHz Internally this frequency can be decimated e Cal This connector is used for calibration It can be configured to output a calibration signal or to accept an input calibration signal See Calibration Description in this section e Exlrig This allows for an external trigger input to the VT1432B The input signal must be TTL other characteristics can be defined in software ExTrig can be enabled or disabled in software VT1432B Input Connectors These connectors are attached to the cables from an 8 channel input breakout box two input connectors for each 8 channel input They connect the input signal to the VT1432B Each connector carries four channels Depending on options there can be 2 or 4 input connectors 8 16 channels VT1435 VT1436 Input Connectors These SMB input connectors connect the input signal to the VT1435 36 measur
51. the utility bus Of these lines the VT1432B only use the SYSRESET line Pulling the SYSRESET line low a hardware reset has the same effect as setting the reset bit in the Control Register a software reset except that pulling the SYSRESET line low also resets the Control Register itself while a software reset does not The Local Bus UGV Option The VXI specification includes a 12 wire Local Bus between adjacent module slots Using the local bus a standard byte wide ECL protocol has been defined which can transfer data from left to right at up to 15 7 MB s using the VT1432B If equipped with the UGV option the VT1432B can be programmed to output its data using this high speed port instead of the VME data output register The Data Port Control register determines which output port is used Local Bus vs VME Transfers With this option data can be transferred from the VT1432B two different ways via the VME Bus or via the local bus The VME Bus is the universal data bus for VXI architecture It provides flexibility and versatility in transferring data Transfers over the VME Bus can be 16 or 32 bits wide The Local Bus supports faster transfer rates than the VME Bus For example if data is transferred from the VT1432B to the VT2216A VXI SCSI interface module the local bus provides a direct pipeline to the VT2216A Using the local bus data can be transferred in the background while processing data in a signal processing
52. 1 41 0403 000 1 CVR BTTM ALSK 03LB1 41 0403 000 002 41 0402 000 1 SHTF CVR TOP 03LB1 41 0402 000 MP003 8160 0862 2 GSKT RFI STRIP FNGRS N109 0786 318 MP004 0515 2033 5 SCR MCH M3 0 10MMLG 091 0515 2033 005 0515 2028 4 SCR MCH 2 5 6MMLG 5091 0515 2028 006 1432 44101 1 GSKT THERMAL CONDUCTOR N046 E1432 44101 007 1485 40601 1 GSKT RFT CVR ADH SHT 77824 5774 194W 0 008 0515 0372 3 SCR MCH M3 0 8MMLG 93907 0515 0372 009 8160 0634 4 STMP SHLD RFI GRND N109 8160 0634 010 8160 0686 1 STMP FNGRS RFI N109 786 185 011 8160 0683 1 STMP STRP SPNG FLTR GRD N109 0097 551 17 X MP012 8160 0869 6 GSKT RFI 2MM X 4MM 77824 E8119T00090 MP013 0515 0368 2 SCR MCH M2 5 X 0 45 5091 0515 0368 014 0380 4042 5 STDF HXMF 3 0 16 7MMLG 05791 555172 16 7 01 015 0380 4041 3 STDF HXMF M3 0 05791 555172 15 0 01 016 0515 2383 2 4 SCR MCH M3 0 12MMLG 5091 0515 2383 84 Replacing Assemblies www vxitech com Cables without Option AYF or 1D4 _ EXTRIG m EXSAMP Ref VTI Part Mfr Mfr Part Des Number Qty Description Code Number WI 8120 6767 1 CBL ASM CXL W FE N116 224743 W2 8120 6765 2 CBL ASM CXL W FE N116 224741 WA 8120 6762 1 RIBBON CABLE N118 8120 6762 Cables with Option AYF W3 1 W3 TACH2 A E 2 EXTRIG Ref VTI Part Mfr Mfr Part Des
53. 32 Synchronization in Multiple mainframe Measurement 33 VXI MXI Module Setup and System Configuration essen 34 Preface 3 VXI Technology Inc Mod le Features bie Sac en taste eb dementiae 34 Data Flow Diagram and FIFO Architecture rennen enne nnns 34 Base Sample Rat s i iate e a EE e etui ets 36 Measurement Processo o adimit n d e ed tie d teo tes 38 Measurement Setup and eese e edis 38 Parameter SettlHps sor e Cenc touted doc Ui HT AT edi coos 38 Measurement Initiation 39 Measurement LO0p temer edep dbus dedo dee te o 39 Register based VXI Devices sess E 40 Arm ANG KA N at BOL es ey eee ett vedere etie e tert Oe Me 40 WTS RETIN oso EE 41 eco 42 tite Ne epo 42 tenuti dus ar itte d itus eie ties Pad 43 Iss ENIM 43 TnterruptsHand ling 2 44 Host Interrupt i 44 Host Interrupt Handling
54. 32B 5 5 dag oen gie 25 UTINAM 54 V ventilationzdzu saute Od eee E SERS 11 VISA 21 25 26 27 28 re 34 47 54 103 105 106 114 VT1432 and E1432 library compatibility 28 vt1432 ba3 nm tene 2 28 vt1432 dll 28 vt1432 h 28 vtl432_32 dll 4428 UE ELEKPAL MES 28 VXI backplane button local bus nre eh ree depot MXIDUS Peor 30 55 57 103 111 113 114 dynamic configuration protocol s 103 o des fts a M te 103 VXIplug amp play driver esee 22 VXI Technology Inc W Wait for Done i4 decet eee der oed 108 induta ead f a te dade rh 10 mor 7 10 wet or damp conditions 401 Windows Hel pias aeter dei rede be 46 wrte cotnimand rere Ett 108 118 Index
55. 36 Front Panels sese enne enne nnne 52 Status LEDS MC 53 SMB Connectors not including channel input connectors 53 VTT432B Input Conn ctors Ne ede due 53 VTT435 V T1436 Input Connectors 2 inr Side ii iub eee a Re 53 V XI Backplane Cotfectiotis ee es GR EE RE week Medea dti tih 54 Power Supphes and Ground Eie erue i 54 Data Transfer Bus IE iecit Mire a dtt 54 DTB Arbitration reta e e E I es RH n de teh 54 Priority Interr pt BUS sene as et E eei uie ae Ru alte de ead Eb ire e ER 54 Utility Bus Ronde t See iiim du ee iet tas eh 54 The Eocal Bus UGV Option x eie te eles t nu EU eee ae 54 Local Bus vs Transtets ese ee RR RS RE Haat RUE TA RECO EU RR IUE 54 The VTI432B VXLD6VICe erre or re RD EORR 55 Address Space acte RU NONO RE e ORG atte e 55 Shared Memory tee cn e EN REPRE OUO E aude 55 M M 55 List ot A TO R glsters ec aee Ge RR RE e RD UENIRE 56 TngeerLines aieo ce eee m tete e Oe Rat e e e ea estas am tegat 56 Providing an External Clock Ada hints RE RETRO DIT t e e 57 4 Preface www vxitech com Calibration Desetiption
56. 3816 3616 3416 3216 3016 2E 2 16 2416 2216 2016 1E FIFO Count 1A 6 14 1216 1016 IRQ Status Register IRQ Reset Register 0C IRQ Config Register 0 Page Map Register 0816 Port Control Register 0616 Offset Register 04 6 Status Register Control Register 0216 Device Type 0016 ID Register Logical Address Register Parameter 7 Register Parameter 6 Register Parameter 5 Register Parameter 4 Register Parameter 3 Register Parameter 2 Register Parameter 1 Register Query Response Register Command Register Send Data Receive Data RAM 1 RAM 0 Trigger Lines TTLTRG TTLTRG consists of eight TTL lines on the VXI backplane on connector P2 They are available to provide synchronization between devices VXI devices can use the TTLTRG lines for simple communication with other devices For example a device can wait for a line to go high before taking an action or it can assert a line as a signal to another device The VT1432B use two trigger lines These can be placed on any two of the eight TTLTRG lines available on the VXI backplane The lines are Sync Trigger line e Free running clock line When programmed in a multiple module configuration only one of the VT1432B modules can provide the clock signal but any of them can trigger 56 Module Description www vxitech com Providing an
57. 4 inch nut driver and remove the three screws using T 8 Torx driver If option AYF is installed proceed to step 0 If option 1D4 is installed proceed to step 0 GN n Replacing Assemblies 97 VXI Technology Inc 3 If the module has option AYF do the following Remove the AYF option assembly see To Remove the Option AYF Assembly Remove the five long and the three short standoffs using a 1 4 inch nut driver 24 AE SS 98 Replacing Assemblies www vxitech com 4 If the module has option 1D4 do the following Remove the 1D4 option assembly see To Remove the Option 1D4 Assembly Remove the three long and the five short standoffs using a 1 4 inch nut driver amp SE Q 22 NN we amp FA gt ay w EN SE m n Ib S NS ey m Cum pu _ Sas A m 22 1 E PA TAL Replacing Assemblies 99 VXI Technology Inc 100 Replacing Assemblies www vxitech com APPENDIX A REGISTER DEFINITIONS THE VT1432B REGISTER DEFINITIONS The VT1432B 8 and 16 channel 102 4 kSa s digitizers plus DSP are register based VXI devices Unlike message based devices that use higher level programming using ASCII characters
58. 432B VXIplug amp play Host Interface Library software Refer to the VT1432B or VT 1435 36 block diagram Figure 4 1 The VXI interface maps some of the VT1432B s B bus internal memory space so that it is visible to the VXI bus The port connecting the A and B busses also allows the VXI bus access to the SRAM DRAM and inputs which are on the A bus SRAM stands for static RAM DRAM is dynamic RAM The VXI interface has two windows on the B bus memory space Each is 512 kB which is 128 32 bit words One of the windows is fixed and the other is movable The movable window allows the VXI bus access to many different parts of the memory space The fixed window contains The A16 registers The B bus SRAM The hardware registers The FIFO which is in DRAM The mapping of the fixed and movable windows is illustrated as follows Address FFFF 6 Movable DSP 8 00006 Bus Window 7 FFFF 6 Fixed DSP 3 000016 Bus Window 2 FFFF 6 Send Receive 2 000016 Data Registers Fixed 1 FFFF 6 Fixed DSP 0 004F 16 Bus Window 0 VXIbus A16 0 0000 6 Registers For more information see The A24 Registers in the section titled Register Definitions Module Description 55 VXI Technology Inc List of A16 Registers The following lists the A16 registers For more information see The 424 Registers in the section titled Register Definitions Address Read Write 3
59. 436 PNL OVRLY SOURCE O3LBI 41 0442 005 MP202 41 0443 002 1 VT1435 1DD 4 CH PNL FRT O3LBI 41 0443 002 STNDRD W MP202 43 0158 006 1 VT1435 1DD PNL OVRLY O3LBI 43 0158 006 STNDRD or W MP202 43 0158 007 1 VT1435 1DD PNL OVRLY O3LBI 43 0158 007 SOURCE or W MP202 43 0158 008 1 VT1435 1DD PNL OVRLY TACH 03LB1 43 0158 008 Replacing Assemblies www vxitech com TO REMOVE THE TOP COVER 1 Remove the five long screws using a T 10 Torx driver and remove the three short screws using a T 8 Torx driver Lift cover off Long Replacing Assemblies 89 VXI Technology Inc TO REMOVE THE FRONT PANEL 1 Remove top cover see Remove the Top Cover Gently disconnect cables from the printed circuit assemblies Using a T 8 Torx driver remove the two screws that attach the handles to the assembly Pull out the handles making sure not to lose the two spacers 2 Using T 8 Torx driver remove the screw that attaches the front panel to the bottom cover Gently pull the front panel off 90 Replacing Assemblies www vxitech com 3 Remove the nuts that fasten the cables and assembly to the front panel Using a 1 4 inch nut driver lt fa S RR JE MJ M ES TS Ta 5 S S a RS SO 8 TK C Ss q AN BART a 7 2224 a SS
60. 6 ns sample clock delay in Mainframe B This corresponds to an additional 0 007 degree phase error at 256 Hz and an additional 0 55 degree phase error at 20 kHz Using a 4 m cable which adds approximately 18 ns of delay causes a total of 94 ns clock delay in Mainframe B This corresponds to an additional 0 0087 degree phase error at 256 Hz and an additional 0 68 degree phase error at 20 kHz The cable adds approximately 6 ns per meter of cable Each daisy chained mainframe adds another increment of delay but only for the additional cabling length 32 Using the VT1432B www vxitech com Ethernet FireWire or VT1432B MXI 2 gt 1432 Embedded Controller Ll Extender Interface 0 VXI Mainframe Z VXI Mainframe MXI 2 Extender Interface MXI Bus MXI Bus Cable Cable Em VXI Mainframe me VXI Mainframe VT1432B VT1432B
61. 7 VXI Technology Inc 58 Module Description www vxitech com SECTION 5 THE ARBITRARY SOURCE OPTION 1D4 ARBITRARY SOURCE DESCRIPTION An arbitrary source can be included with the VT1432B VT1435 and VT1436 digitizers as Option 1D4 It cannot be installed with a tachometer Option AYF The arbitrary source option can supply arbitrary or sine signals under control of measurement software Trigger The arbitrary source can be used to trigger the measurement and to trigger other modules in the measurement system Arbitrary Output The arbitrary source can be programmed to output any signal that is described by data downloaded by the software Source Output Modes The arbitrary source has several output modes including the following arbitrary sine noise random burst COLA and Summer The COLA Constant Output Level Amplifier output supplies a signal similar to the source Out output except that it is at a constant output level of about one volt peak The same connector labeled COLA can also be programmed as a summer input A signal connected to this input is summed with the internal source output to create the final output External Shutdown Shorting the center pin of the shutdown connector to its shield causes the source to ramp down and shut off The Arbitrary Source Option 1D4 59 Block Diagram VXI Technology Inc
62. ARY FILES In a Windows environment the following directories files are in the directory lt VXIPNP gt KBASE vt1432 kb Knowledge base file winNT Y Bin vt1432_32 dll The VXIplug amp play driver winNT Include vt1432 h Header for linking to the VXIp ug amp play driver winNT Y Lib Msc vt1432_32 lib Lib for linking C programs to VXIplug amp play The following files are in the directory lt Vxipnp gt winnt VT1432 vt1432 exe Soft front panel program vt1432 bas header for Visual Basic vt1432 fp The FP file used by VEE and CVI vt1432 hlp Windows help file Read me The latest information for the product examples vb V Visual Basic example programs examples V C example programs lib sema bin Firmware program for the VT1432B lib X sfp ico Icon for help file lib sinewave ico Icon for soft front panel source Source files for 1432 32 411 where lt VXIPNP gt is typically C VXIPNP or C Program Files WISA Using the VT1432B 27 VXI Technology Inc VT1432B AND E1432 LIBRARY COMPATIBILITY The following table lists similar library calls that existed in the Agilent HP E1432 It provides the name of the former Agilent HP call the present VXI Technology Inc call and a brief description of the call s function VT1432B E1432A Location Description 1432 32 01 hpe1432 32 dl lt VXIPNP gt winnt bin plug amp play library DLL vt1432 32 ib hpe1432 32lib lt VXIPNP gt winnt
63. GRS RFI N109 786 185 11 8160 0683 1 STMP STRP SPNG FLTR GRD N109 0097 551 17 X MP012 8160 0869 6 GSKT RFI 2MM X 4MM 71824 E8119T00090 MP013 0515 0368 2 SCR MCH 2 5 X 0 45 5091 0515 0368 014 0380 4042 5 STDF HXMF M3 0 16 7MMLG 05791 555172 16 7 01 015 0380 4041 3 STDF HXMF M3 0 05791 555172 15 0 01 MP016 0515 2383 2 4 SCR MCH M3 0 12MMLG 091 0515 2383 82 Replacing Assemblies www vxitech com Assemblies with Option 104 _ 004 f 002 005 4 ml i 006 B N ae iv T a ENS 4 QS 5 MPoo8 s 7 007 B A22 A24 rt MP016 017 11 p A EN gt p P Replacing Assemblies 83 VXI Technology Inc Ref VTI Part Mfr Mfr Part Des Number Qty Description Code Number A2 52 0459 000 4 VT1432B PC ASSY INPUT O3LBI 52 0459 000 A2 52 0560 000 4 VT1435 PC ASSY INPUT 03LB1 52 0560 000 A4 E1432 66504 1 55 66049 1432 66504 10 1433 66910 1 ASSY MAIN UGV 03LB1 E1433 66510 All E1433 66911 1 ASSY MAIN O3LBI E1433 66511 A22 1818 5622 1 ICM DRAM SIMM 8x32 N121 MT16D832M 6 A24 1818 5624 1 ICM DRAM SIMM 1x32 N90 HYM532100AM 70 41 1432 66541 1 ASSY OPT 1D4 03LB1 E1432 66541 00
64. Mainframe B Lower spans or longer blocksizes in Mainframe B Ethernet FireWire or Embedded Controller 432B Different digital filter settling times between VT1432B modules NT1432B MXI 2 7 Extender Interface f 7 sey VXI Mainframe A VXI Mainframe pF MXI 2 Extender Interface 5553 e S VXI Mainframe E VXI Mainframe B EN 7 MN MXI 2 Extender Interface 14 2 Example 1 Slot 0 Controller MXI 2 Extender Interface Example 2 2 Daisy Chain FIGURE 3 3 MULTIPLE MAINFRAMES TWO MAINFRAMES In the Example 1 above mainframe A contains the Slot 0 embedded controller for a multiple mainframe system Mainframe A is connected to mainframe B with a MXI 2 extender interface In Example 2 a MXI 2 daisy chain configuration is used To manage this multipl
65. PLUG amp PLAY VXI Technology uses VXIplug amp play technology in the VT1432B This section outlines some of the details of VXIplug amp play technology Overview The fundamental idea behind VXIplug amp play is to provide VXI users with a level of standardization across different vendors well beyond what the VXI standard specification spells out The VXIplug amp play Alliance specifies a set of core technologies centering on a standard instrument driver technology VXI Technology offers VXIplug amp play drivers for VEE Windows The VXIplug amp play instrument drivers exist relative to so called frameworks A framework defines the environment in which a VXIplug amp play driver can operate The VTI432B has VXlplug amp play drivers for Windows frameworks Using the VT1432B 25 VXI Technology Inc VXIplug amp play drivers VT1432B VXIplug amp play driver is based on the following architecture User Program EXE amp CHM files such as soft front panel Function Panel Programmatic Developer s based on FP file Interface Library Instrument Driver KB DLL C H LIB HLP file VISA I O Interface FIGURE 3 1 VXIPLUG amp PLAY DRIVER ARCHITECTURE It is most useful to discuss this architecture from the bottom up The VISA I O interface allows interoperability of the VXIplug amp play driver technology across interfaces T
66. Ready Passed Q Resp Cmd OK Ready Ready A24 Active A one 1 in this field indicates that the A24 registers can be accessed It reflects the state of the Control register s A24 Enable bit MODID A one 1 in this field indicates that the device is not selected via the P2 MODID line A zero 0 indicates that the device is selected by a high state on the P2 MODID line Unused A read of these bits will always return zero 0 Block Ready A one 1 indicates that there is a block of data available to be read from the Send Data registers A zero 0 indicates that less than a full block is available Data Ready A one 1 indicates that there is at least one word 32 bits of data available in the Send Data register A zero 0 indicates that there is not valid data in the Send Data register ST Done A one 1 indicates that the internal DSP has competed and passed its self test Loaded A one 1 indicates that the internal DSP has successfully booted and has loaded a valid model code Done A zero 0 indicates that the on card microprocessor has not finished processing the last command and the Err bit is not valid This bit is set and cleared by the DSP Err A zero 0 indicates that an error has occurred in communicating with the DSP for example invalid parameters This bit is set and cleared by the DSP Ready The meaning of this depends on the state of the Passed bit While Passed is false a o
67. SP Command Register Boot Register Note that these registers appear multiple times in the memory map since only the address lines A31 30 17 13 A9 8 and A3 0 are used for decoding The A24 registers are defined as follows e Boot Register This read write register is used to configure the device after a device reset It has the following format Bit 31 16 15 14 13 12 11 0 Contents Unused Spare ST Done Loaded Ready Model Code Spare This read write bit has no pre defined function Register Definitions 109 VXI Technology Inc ST Done This bit should be written to a one 1 when the DSP successfully competes its self test within five seconds after is de asserted Its initial value is zero 0 Loaded This bit should be written to a one 1 when or immediately after the DSP loads the model code before competing its self test Its initial value is zero 0 Ready This bit is written to a one 1 to indicate that the device is ready for normal operation Its initial value is zero 0 Model Code As soon as possible and within 25 ms after coming out of reset when the DSP has valid code loaded it should write the VXI model code to these bits Their initial value is 0x0200 e DSP Command Register This register is used to assert VXI interrupts and toggle various status register bits Many of the bits in this register are grouped into related Clock and Value pai
68. TRG in Section 4 With the tachometer option the VT1432B retains this capability and is also able to accept an analog external trigger signal at the Tach 2 input Trigger Level The trigger level of the tachometer can be set by software Tachometer Monitoring The tachometer is capable of sending its analog input signal onto the VT1432B module s internal calibration line The calibration line can be connected to the 102 4 kHz 4 channel input assembly so that the signal on the tachometer s connector can be monitored via an input channel This can be useful when deciding where to set the trigger level of the tachometer An example program is supplied with the VT1432B host interface library which shows how to perform this tachometer monitoring Exact RPM Triggering The tachometer can be used to create exact rpm triggering controlled by software The rpm of the tachometer channel is calculated from tachometer transition times Then the sample numbers in the data FIFO are determined for exact rpm triggering The Tachometer Option AYF 63 VXI Technology Inc Input Count Division The tachometer can be programmed to divide the input signal For example if a signal is coming in at 100 counts per second the tachometer can be set to look at only every 10 count for a result of 10 counts per second Holdoff Time The tachometer can be programmed to wait for a specified period of time between counts that it will
69. ULE DESCRIPTION UNIVERSAL MODULE FEATURES The VT1432B 4 8 and 16 channel 102 4 kSa s digitizers plus DSP are VXI C sized scalable input modules The VT1432B may contain up to four 4 channel input assemblies so that the module may have a total of up to 16 channels The VT1432B 1DE is the 8 channel version of the VT1432B while the VT1432B 1DD has only 4 channels The VT1435 contains two 4 channel input assemblies for a total of 8 channels and the VT1436 contains four 4 channel input assemblies making for 16 channels total These modules also contain on board IEPE current sources as well as the ability to read sensor s Transducer Electronic Data Sheets TEDS as described in the Section 7 The following is a list of some of the features of the VT1432B VT1435 and VT1436 See Specifications for more detailed information on the specific modules The standard VT1432B as well as the voltage measurement sections of the VT1435 36 are described in this section The arbitrary source and tachometer options are described in other sections Features specific to the 1435 and VT1436 are also discussed in this section General Features Fundamental sample rate selectable within the range of 40 960 Hz to 102 400 Hz User selectable digital sample rate decimation using filtering in a 1 2 5 sequence Variable block size binary Large data buffer up to 16 MSa Data from FIFO available with overlap VXI shared memory Flexi
70. VT1432B module until the measurement is started with vt1432 initMeasure Some parameters can be changed while a measurement is running but many do not take effect until the next start of a measurement 38 Using the VT1432B www vxitech com Measurement Initiation This section describes the measurement initiation process in the VT1432B The measurement initialization states and the corresponding sync trigger line transitions with for high L for Low Tested gt Booting Booted Settling Pre arm gt Idle HL LH gt L H Sync Trigger Line FIGURE 3 8 MEASUREMENT INITIALIZATION The module enters the TESTED state after a reset In this state all of the module parameters may be set The VT1432B stays in the TESTED state until it sees a high to low transition of the Sync Trigger line In the BOOTING state the digital processors of the module load their parameters and their program Once done the module releases the sync trigger line and moves to the BOOTED state The VT1432B stays in the BOOTED state until it sees a high to low transition of the Sync Trigger line that is all the VT1432Bs in the system have booted In the SETTLING state the digital filters are synchronized and the digital filter output is settled it waits n samples before outputting any data Once the module is settled it advan
71. and Register last 6 When executing a command that requires it to return response data the DSP must set the Query Response Ready bit no later than the Command Parameter Ready bit 7 The DSP must not clear the Done bit while Command Parameter Ready is true 8 The DSP must not change the Err bit while Done is true 9 Acontroller must not regard the done bits a valid while Command Parameter Ready is false 10 A controller must not regard the Err bit as valid while Done is false Controller Protocol Examples There are three basic procedures used by a controller Write Command Read Response and Wait for Done These can be combined for more complex sequences Write Command This is the procedure to send a command to the DSP 1 Wait for Command Parameter Ready true 2 Write any parameters to the Parameter registers and RAM 3 Write the command to the Command register Read Response This is the procedure for reading a response to query command 1 Wait for Query Response Ready true 2 Read the data from the Query Response register and any additional data from the parameter registers and RAM Wait for Done This is the procedure to wait for command completion and check for error 1 Wait for Command Parameter Ready true 2 Wait for Done true 3 If Err 0 handle error 108 Register Definitions www vxitech com Complex Sequences A robust procedure for sending a query and reading the response would look like t
72. and materials identical to those used in factory packaging are available through VXI Technology offices If returning the module to VXI Technology for service attach a tag describing the following Type of service required Return address Model number Full serial number In any correspondence refer to the module by model number and full serial number Mark the container FRAGILE to ensure careful handling If it is necessary to package the module in a container other than the original packaging observe the following use of other packaging is not recommended Wrap the module in heavy paper or anti static plastic Protect the front panel with cardboard Use a double wall carton made of at least 350 Ib test material Cushion the module to prevent damage 16 Installing the VT1432B www vxitech com SPECIFICATIONS GENERAL SPECIFICATIONS FREQUENCY Sampling range maximum 102 4 kSa s minimum 2 Sa s Decimate by 5 and 2 filters provide lower sample rate settings External sampling allows continuous settings from 102 4 kSa s to 40 96 kSa s Frequency bandwidth maximum 46 kHz minimum 244 2 FFT block size samples 32 to 8192 INPUT VT1432B VT1436 16 VT1432B 1DE VT1435 8 VT1432B 1DD VT1435 1DD 4 Full scale input ranges in peak volts Input impedance differential either side to chassis single ended mode AC coupling 3 dB corner frequency CMRR common mode rejection ratio dc coupled dc to 1 kHz ac c
73. annel specific parameter only that channel is set to the new value Some parameters such as clock frequency or data transfer mode apply globally to a module When a channel ID is used to change a parameter that applies to a whole module the channel ID is used to determine which module The parameter is then changed for that module Starting and stopping a measurement is somewhat like setting a global parameter Starting a measurement starts each active channel in each module that has a channel in the group After firmware is installed and after a call to vt1432 preset is made all of the parameters both channel specific and global in the VT1432B module are set to their default values For channel specific parameters the default value may depend on the type of channel Some channel specific parameters apply only to a specific type of channel For example tachometer holdoff applies only to tachometer channels Setting a parameter for a channel that the parameter does not apply to will result in an error At the start of a measurement the VT1432B firmware sets up all hardware parameters and ensures that the input hardware 1s settled before starting to take data The firmware also ensures that any digital filters have time to settle This ensures that all data read from the module will be valid However after a measurement starts VT1432B parameters can still be changed The effect of this change varies depending on the parameter For some pa
74. ared memory 855 SR Henn T eC 39 Shut connector 62 measurement control 38 Sine mode iets ace 59 measurement control 5 23 single ended 1 49 measurement 38 39 SMB Connectors 53 62 66 measurement process 38 43 Source button SFP sss 24 measurement 38 specifications 2417 Inemory map s esses 35 SRAM 4599 memory shared sss 55 standard front panel 51 message based 404 9 113 OE HER UR 21 mode state continuous data transfer overlap bloCk ter b ee module features modu le find einer modules more than TESTED monitor acs TRIGGER multiple mainframe 4 30 static petere xr P EH Re res multiple mainframes 29 34 Status LED limitations phase 4 444 44 4 7 SUMET 2s 2 2 support 12 tenentes 12 multiple
75. ble triggering including pre and post triggering AC DC coupling IEPE power supplies with the optional IEPE 8 channel input via breakout box options Overload detection Synchronous sampling over multiple channels and VT1432B modules Large FIFO for long pre trigger delays D32 VME Bus data transfer Local Bus data transfer with Local Bus option In addition to the features mentioned above the VT1435 and VT1436 have the following Convenient SMB front panel connectors IEPE front panel transducer status LEDs On board current source Transducer Electronic Data Sheet TEDS support with the TEDS option Single Ended Relay Module Description 47 Arbitrary Source Features option 1D4 VXI Technology Inc Sine output e Random noise output Arbitrary output Tachometer Features option AYF e Current RPM value measurements e Up Down RPM triggered measurements Other Options Local bus option e Transducer Electronic Data Sheet TEDS option available on VT1435 and VT1436 only Block Diagram LBUS FIFO optional Local bus Bus connector e x gt SRAM Bus 96002 SRAM 512 kB micro 512 kB processor DRAM Hardware 32 MB registers DMA memory VXI control interface td Input BOAT 2 2 Bu
76. ces to the PRE ARM state In the PRE ARM state the module waits for a pre arm condition to take place The default is to auto arm so the module would not wait at all in this case When the pre arm condition is met the module releases the Sync Trigger line and advances to the IDLE state This complete measurement sequence initialization from TESTED through BOOTING BOOTED SETTLING PRE ARM and IDLE can be performed with a call to the function vt1432_initMeasure Measurement Loop This section describes the measurement loop in the VT1432B The progression of measurement states and the corresponding sync trigger line transitions are Idle gt Trigger Measure HL L gt H H gt L Sync Trigger Line FIGURE 3 9 MEASUREMENT LOOP Using the VT1432B 39 VXI Technology Inc In the IDLE state the VT1432B writes no data into the FIFO The VT1432B remains in the IDLE state until a high to low transition of the sync trigger line occurs or an RPM arm trigger point is calculated If any of the VT1432Bs in the system are programmed for auto arming with vt1432 setArmMode the Sync Trigger line is immediately pulled low by that VT1432B VT1432B may also be moved to the ARM state by an explicit call to the function vt1432 armMeasure Upon entering the ARM state the VT1432B starts saving new data in its FIFO It remains in the ARM
77. ciated cabling and the software routines controlling the write function during this phase of operation of the TEDS device For information on upgrading the VT1435 36 or replacing parts contact VXI Technology Customer Support Services See the Support Resources section in the preface of this manual for contact information TEDS FIELD UPGRADE To perform a field upgrade of a VT1435 6 to enable the TEDS option the following procedure can be used 1 Contact VXI Technology Customer Support Services and provide the serial number of the VT1435 6 The serial number is typically found on the outside of the VT1435 6 module a label 2 VXI Technology Customer Support Services will supply a TEDS Code Word that will be used to enable the TEDS feature on the module The TEDS Option TEDS 67 Set the module s address to 0x8 Install the module to be upgraded into a VXI chassis and turn the power on Run Resman or and equivalent program Open a Command Line window by navigating to Start 2Run Cmd In the Command Line window navigate to the directory that contains the Option Loading Program OLP Example 8 Cd lt rtn gt VXI Technology Inc Cd progam files visa winnt vt1432 bin lt rtn gt Run the OLP progopt exe program Example progopt h Usage progopt RuVZ A optStr D optStr Read or Write E1432 PARM2 block A Add option optstr to option list D Delete option optstr from op
78. com Standard VT1432B Front Panel This is the front panel for a standard VT1432B this example has 16 inputs The LEDs and connectors are described on the next page If the VT1432B has an arbitrary source Option 1D4 or a tachometer Option AYF its front panel will be different See Section 5 and or Section 6 for a description the front panels for these options 59 Sy Technology Fail Acs Trigger Holl ld e VXI e Technology ExSampCal ExTrig Trigger Ji ExSampCal ExTrig CAN 16 CHANNEL 102 4 kSa s A D DSP CHAN 1 4 CHAN 9 12 CY 13 16 VT1432B ar FIGURE 4 4 VT1432B STANDARD FRONT PANEL Module Description 51 Standard VT1435 and VT1436 Front Panels VXI Technology Inc The VT1435 36 may have any of several front panels depending on options and number of input channels The following illustration shows front panels for 4 8 and 16 channels If an arbitrary source Option 1D4 or a tachometer Option AYF option is installed its front panel will be different See Section 5 and or Section 6 for a description the front panels for these options Technology Fail Acs Trigger ExSamp Cal ExTrig S IEPE fas CH2 5 IEPE KO MO IEPE
79. ctionality Input testing both VT1432B and VT1433B inputs and the Tachometer input assumes 1 V peak 1 kHz sine input on each channel This allows testing of additional portions of the signal path which are inaccessible from the internal tests S vxi slot Tests the module in the vxi slot vxi slot The default is to test the module at logical address 8 u Display usage message v Specifies the verbose printing Normally hostdiag does not print anything unless an error is found With this option hostdiag prints status messages as it operates This option also enables additional diagnostic information which is not generally useful V Print version info Troubleshooting the VT1432B 75 VXI Technology Inc Hostdiag returns 0 upon success or returns non zero if an error is detected Coverage Main board DRAM SIMMs Input SCAs Signal Conditioning Assemblies Source SCAs VT1434A Optional source Optional tachometer VT1432B 35 36 and VT1433B Notes e Tests are somewhat limited but will catch many hardware errors errors printed means that all tests passed 76 Troubleshooting the VT1432B www vxitech com SECTION 10 REPLACING ASSEMBLIES REPLACEABLE PARTS For information on upgrading the VT1432B or replacing parts contact VXI Technology Customer Support Services See the Support Resources section in the preface of this manual for contact information Replacement parts are listed i
80. der so the highest channel is read last To get this to work automatically the call to vt1432 init must list the logical addresses in descending order Channel triggering must be done only by modules in mainframe A A trigger in any other mainframe would not be communicated back on the SYNC line to Mainframe A The Library Itself selects the VT1432B with the highest channel number for synchronization VXI MXI Module Setup and System Configuration The VXI MXI Module setup in Mainframe A needs to be changed from those set by the factory The VXI MXI module is not the Slot 0 Controller for mainframe A Refer to the VXI MXI2 user s manual for configuration settings This requires changing several switch settings Set the module as not being the Slot 0 Controller Set the VME timeout to 200 us Set the VME BTO chain position to 1 extender non slot 0 Do not source CLK10 Set the proper logical address MODULE FEATURES Data Flow Diagram and FIFO Architecture Figure 3 5 shows data flow in the VT1432B In this example there are four 4 channel input assemblies for a total of 16 input channels The data for all channels is sent to the FIFO The FIFO Is divided into sections one for each channel The data moves through a circular buffer first in first out until a trigger causes it to be sent on to the VME Bus The data can also be sent to the Local Bus if option UGV is present The size of the sections in the FIFO is flexible The a
81. detect After a count is detected subsequent counts will be ignored until the holdoff time has passed Block Diagram System LX Trigger Channel 2 Tach ExtTrig Analog Holdoff Ctrl 32 bit gt Conditioning 1 of N select Latch FIFO 10 20 MHz gt 32 bit gt Ctrl amp Status Reset Counter Registers Channel 1 Y Tach naog Holdoff 32 bit y Conditioning 1 of N select Latch FIFO DSP B Bus or paged A24 VXI FIGURE 6 1 TACHOMETER OPTION BLOCK DIAGRAM 64 The Tachometer Option AYF www vxitech com THE TACHOMETER OPTION FRONT PANEL The VT1432B with the tachometer option may have 8 or 16 input channels The following illustration shows a front panel for a 16 channel VT1432B as well as the front panels for the VT1435 and VT1436 with tachometer option The LEDs and connectors are described on the next page and function identically for either the VT1432B or VT1435 36 modules Fail Acs Trigger e O bis O Tachi Tachi Tach2 ExTrig Tachi Tach2 ExTrig Tachi Tach2 ExTrig rdi F F CHS aw 9 9 1 em IEPE e Lere EPE a FEN A fe To fee ire Lere eee e o CH7 OG CH7 QOO 1
82. dow into the device s DSP bus This 512 kB window begins at 512 kB into the device s A24 registers The eight least significant bits of the Page Map register are the page number These bits are mapped to the internal DSP bus address lines as follows Bit 0 DSP 17 Bit 1 DSP 18 Bit 2 DSP 19 Bit 3 DSP A 20 Bit 4 DSP A 21 Bit 5 DSP A 22 Bit 6 DSP 30 A 24 Bit 7 DSP 31 The eight most significant bits of the Page Map Register are always zero 0 IRQ Config Register This register configures the first VME Bus interrupt source It provides for selection of the VME Bus IRQ level used and a bit mask It has the following format Bit 15 8 7 4 3 2 0 Contents Mask Unused IRQ Enabled IRQ Line Mask This is a bit mask used to enable up to eight interrupt causes A bit value of zero 0 disables the corresponding interrupt source RESET VALUE 0 IRQ Enable A one 1 in this bit enables the generation of IRQ s A zero 0 resets each of the eight interrupt causes and status bits RESET VALUE 0 Register Definitions 105 VXI Technology Inc IRQ Line This field selects which VME Bus IRQ line is driven by this device A value of zero 0 disconnects the interrupt source RESET VALUE 0 IRQ Status Register This read only register indicates the reason for asserting the VME Bus interrupt The format of the data is identical to
83. e is automatically set to be the same as the sample rate selected for the inputs When the source is active the sample rate cannot be greater than 65 536 kHz Decimation Filter Diagram Figure 3 6 illustrates the way the spans in the table are generated In the case of baseband spans lower limit of span fixed at zero the frequency can optionally be divided by five and then optionally divided by two up to eight times ADC gt 5 2 Zero or one time Zero to twelve times FIGURE 3 6 DECIMATION FILTER DIAGRAM BASEBAND 36 Using the VT1432B www vxitech com Sample Freq 40 960 48 000 50 000 51 200 64 000 2 di with 5 w o 5 with 5 w o 5 with 5 w o 5 with 5 w o 5 with 5 w o 5 0 3200 16000 3750 18750 3906 25 19531 25 4000 20000 5000 25000 1 1600 8000 1875 9375 1953 125 9765 625 2000 10000 2500 12500 2 800 4000 937 5 4687 5 976 5625 4882 813 1000 5000 1250 6250 3 400 2000 468 75 2343 75 488 2813 2441 406 500 2500 625 3125 4 200 1000 234 375 1171 875 244 1406 1220 703 250 1250 312 5 1562 5 5 100 500 117 1875 585 9375 122 0703 610 3516 125 625 156 25 781 25 6 50 250 58 59375 292 9688 61 03516 305 1758 62 5 312 5 78 125 390 625 7 25 125 29 29688 146 4844 30 51758 152 5879 31 25 156 25 39 0625 195 3125 8 12 5 62 5 14 64844 73 24219 15 25879
84. e mainframe environment successfully use the following guidelines Locate modules with logical addresses less than 128 in mainframe A Locate modules with logical addresses greater than 127 in mainframe B Locate the highest numbered channels in mainframe A Locate the last module in the module list specified in the call to vt1432_init in mainframe A Locate the module that generates the group synchronization pulse in mainframe A Locate the channels performing channel triggering in mainframe A Locate the module with the shared sample clock in mainframe A Using the VT1432B 31 VXI Technology Inc Ifa groupID is not used with the call vt1432 readRawData or vt1432_readFloat64Data empty the VT1432B s FIFOs in Mainframe B before mainframe A In other words do not empty the FIFOs in Mainframe A unless the FIFOs in mainframe B have been emptied For more information about groupID see Grouping of Channels Modules in this section e If more than two mainframes are needed daisy chain them together Treat each mainframe after the first as a mainframe B See the example on the next page Phase Performance in Multiple Mainframe Measurements Phase specifications are degraded by the delay that the inter mainframe interface gives the sample clock This delay is insignificant for many low frequency applications because the phase error is proportional to frequency A system with two VXI MXI modules and a 1 m cable typically has a 7
85. e oe cr d sot o dtu sos Mo do ies i tales te t dm e 15 Installing the Host Interface 15 Storing the Module o rmt toe ed ads re HS 16 Transporting the e tei e FE de ie ee e ee RR 16 17 ev pac REP 21 Getting Started with the 1432 8 21 Introd ctiOni ette fedt e et tust LN Ne 21 System Requirements tpe idee dr e eU eoe ie nue TU ee RO ER 22 VXIplug amp play Drivers and Product Manuals 22 Getting Updates eee studs Hn es Lb dde Me ah aT 22 Installing the VXIplug amp play Drivers sess nnne nnns 22 The Resource Man get esee 22 The VXIplug amp play Soft Front eene nre enne nnne nnne nnns 23 Using the soft front panel aine ccs decente ee Herde 23 SECTION pos M MP X 25 Using the V T T432B eei te p detti aere tu ete eet ie e ER IAS 25 Introduction 2st tee mr eate ettet eret tete te ox e te etes 25 What is VXIplug amp play
86. ed to using channels and groups For more detailed information see the VT1432B help text Channel Groups In the VT1432B VXIplug amp play driver a channel group 15 the basic unit of hardware control To control any channel it must first be assigned to a group with the vt1432 createChannelGroup function In addition to creating the group this function returns a handle that uniquely identifies the group This handle can then be used to direct functions to all channels in the group When a channel group is created all input and tachometer channels in the group are automatically activated and all source channels are de activated However when deleted the input and tachometer channels are not automatically de activated Any input or tachometer channel that remains active after its group is deleted will continue to supply data to its module s FIFO buffer during a measurement consuming module resources For this reason channels should always be explicitly de activated in a group before deleting them Channels can be de activated with the vt1432 setActive command Delete channel groups with vt1432 deleteChannelGroup and vt1432 deleteAllChanGroups In addition when creating a channel group channels which are not mentioned in the new group are not turned off Any channels that are not to be active must be explicitly de activated An exception is a power up when only the channels in the initial channel group are active 28 Using t
87. eight VXI TTL trigger lines that can be used for multi module synchronization Often these lines are used in pairs one for sample clock and for Sync Trigger The vt1432_setTtItrgLines function selects which TTL trigger lines to use this function always uses the TTL trigger lines in pairs Calling vt1432 setClockSource with the group ID will set all modules to the same pair All modules need to be set to use the shared sync line rather than the default setting of internal sync This can be done with the vt1432 setMultiSync function using the group ID One module of the set of modules needs to be set to output the sync pulse The module with the lowest VXI logical address is called the system module and is assigned this duty This can be set with the vt1432 setMultiSync function call using the lowest channel ID in the group NOT the group ID All modules except the system module need to be set to use the VXI TTL trigger lines as the clock source Use vt1432 setClockSource for this Set the system module to output the clock Use vt1432 setClockMaster for this After this is done all system sync pulses come from the system module and drive the measurement state machines on all boards in the group Possible Trigger Line Conflict The following describes a scenario where VT1432B modules might conflict and prevent a proper measurement The conditions allowing the conflict are complex but should be understood by the us
88. em such as at the sensor The connector shell should not be allowed to float if the switch is in the DIFF position the shell should be grounded elsewhere in the system Backshell kit plug Cable Connector plug Shielded cable part number AMP 750850 3 part number AMP 750833 1 Qty 2 Qty 2 Qty 2 gt M FIGURE 8 2 BREAKOUT BOX CABLE AND PART NUMBERS BREAKOUT BOX CABLES Making a Custom Breakout Box Cable A cable to connect the breakout box with the VT1432B is supplied with the each of the breakout boxes described in this section However this section 1s included for those users who may want to make their own connecting cable Figure 8 2 shows the AMP part numbers for the parts needed to make the plug end of the cable This illustration shows a VT3240A voltage breakout box a VT3242A breakout box requires a single cable with connectors at both ends The next page shows the pinout for the connector 70 Breakout Boxes VT3240A and VT3241A www vxitech com 01 Technology Fail Acs Source B one T Pin 26 Pin 13 16 CHANNEL 102 4 kSa s A D DSP Pin 14 Pin 1 gt VT1432B a FIGURE 8 3 VT1432B CONNECTOR PIN LOCATIONS Definit
89. ement circuitry There are four SMB connectors per SCA measurement module The VT1435 contains two SCAs and eight SMB connectors The VT1436 contains four SCAs and sixteen SMB connectors Each connector carries a single input channel The center conductor of the SMB connector is the input and the outer conductor of the SMB is the input to the measurement circuitry Each connector has an associated LED that displays the status of the IEPE transducer while the IEPE current source is enabled for the specified channel Module Description 53 VXI Technology Inc VXI BACKPLANE CONNECTIONS Power Supplies and Ground The VT1432B conform to the VME and VXI specifications for pin assignment The current drawn from each supply is given in the respective specifications section Data Transfer Bus The VT1432B conform to the VME and VXI specifications for pin assignment and protocol A16 A24 D16 and D32 data transfers are supported DTB Arbitration Bus The VT1432B module is not capable of requesting bus control Thus it does not use the Arbitration bus To conform to the VME and VXI specifications it passes the bus lines through Priority Interrupt Bus The VT1432B generates interrupts by applying a programmable mask to its status bits The priority of the interrupt is determined by the interrupt priority setting in the control register Utility Bus The VME specification provides a set of lines collectively called
90. er to help avoid any conflicts After a measurement has completed the modules are left set up If a module call it module is driving the TTL trigger lines and a different group 1s started which also drives the TTL trigger lines and that different group does not include module A then module A will conflict and prevent the other group from functioning In this case make a call to vt1432 finishMeasure using the old group ID which includes A to turn off module A and allow the new group to function Note that 1f the new group includes all modules of the old group the conflict will not occur as vt1432_initMeasure will reset all modules as needed Also note that single module groups do not drive the TTL trigger lines so single module groups are immune to this conflict Managing Multiple mainframe Measurements In a single mainframe measurement the VT1432B communicates with other VT1432Bs through the TTLTRG lines However when using the VXI MXI bus extender modules the TTLTRG lines which carry the group synchronization pulse and sample clock are extended only in one direction This unidirectional signal connection restricts the types of measurements that can be made in a multiple mainframe environment 30 Using the VT1432B www vxitech com The following types of multiple mainframe measurements cannot be performed Unequal pre trigger delay settings between mainframes Channel triggering by channels in
91. ere ere EHE e Toro cus CH4 J Lere E 24 KSals 1024 1024 102 4 kSuls AID DSP A D DSP AID DSP AID DSP a eU re Ls g aS le 13 16 Q pw nte A9 9 IEPE VT1435 VT1432B 1DD VT1435 VT1436 FIGURE 6 2 TACHOMETER OPTION FRONT PANELS The Tachometer Option AYF 65 VXI Technology Inc LEDs and Connectors for the Tachometer Option Status LEDs e Fail This is the standard VXI Failed indicator It lights briefly when powering up and normally goes out after a few seconds If it stays on it indicates a hardware failure in the module Acs This is the standard VXI Access indicator When it is on it indicates that another device on the bus is contacting the module for example to transfer data or read registers e Trigger This LED flashes on each time an edge is detected on the tachometer signal so when it is blinking it indicates that the tachometer signal is on For a VT1432B that does not have the tachometer option this LED is defined differently VTI435 and VT1436 only This LED is associated with each input connector and displays the status of the IEPE transducer while the IEPE current source is enabled for the specified channel If the IEPE current source is not enabled then the LED will be non illuminated SMB Connectors not including channel in
92. errupt can be obtained by reading the VT1432 IRQ STATUS REG register using vt1432 getlnterruptReason The bit positions of the interrupt mask and status registers match so the defines can be used to set and check IRQ bits Once the interrupt occurs the module will not cause any more VME interrupts until it is re enabled using vt1432 reenablelnterrupt Normally the last thing a host computer s interrupt handler should do is call vt1432 reenablelnterrupt Events that would have caused an interrupt but which are blocked because vt1432 reenablelnterrupt has not yet been called will be saved After vt1432 reenablelnterrupt is called these saved events will cause an interrupt so that there is no way for the host to miss an interrupt However the module will only do one VME interrupt for all of the saved events so that the host computer will not get flooded with too many interrupts For things like VT1432 IRQ BLOCK READY which are not events but are actually states the module will cause an interrupt after vt1432 reenablelnterrupt is called only if the state is still present This allows the host computer s interrupt handler to potentially read multiple scans from a VT1432B module and not get flooded with block ready interrupts after the fact Host Interrupt Setup This is a summary of how to set up a VT1432B interrupt e Look at the Resource Manager to find out which VME interrupt lines are available e Tell the VT1432B mod
93. ers The host may get further and further behind the data acquisition However if the host gets far enough behind that the FIFO fills up data acquisition must momentarily stop and wait for data to get transferred to the host This places a limit on how far in time the host can be behind the data acquisition By setting the size of the FIFO it is possible to control how far behind the host can get Making Overlap Block Mode Act like Traditional Block Mode If the FIFO size is set the same as the block size or if the number of pending triggers is limited to zero then overlap block mode becomes identical to traditional block mode Making Overlap Block Act like Continuous Mode If the module is in auto arm and auto trigger mode then overlap block mode becomes nearly the same as continuous mode One difference is that traditional continuous mode has a single arm and trigger while overlap block mode may have multiple arms and triggers Another is that continuous mode can be configured to start at any type of trigger event while overlap block mode must be in auto trigger mode to act like continuous mode Finally continuous mode always stops when a FIFO overflow occurs but overlap block mode does not INTERRUPT BEHAVIOR Interrupt Setup For an example of interrupt handling see the program event c in the examples directory The VT1432B VXI module can be programmed to interrupt a host computer using the VME interrupt lines VME provides
94. g them from the connectors N Replacing Assemblies 93 VXI Technology Inc 4 Remove the remaining input assemblies TO REMOVE THE OPTION AYF ASSEMBLY 1 Remove the top cover see To Remove the Top Cover Disconnect the three cables leading to the A41 assembly and move cables aside 2 Using T 10 Torx driver remove the three screws that attach the assembly to the module s motherboard and lift the assembly off 94 Replacing Assemblies www vxitech com To REMOVE THE OPTION 1D4 ASSEMBLY 1 Remove the top cover see To Remove the Top Cover Disconnect the three cables leading to the A41 assembly and move cables aside 2 Using T 10 Torx driver remove the three screws that attach the assembly to the module s motherboard and lift the assembly off Replacing Assemblies 95 VXI Technology Inc REMOVE THE 22 24 ASSEMBLY 1 Remove the top cover see To Remove the Top Cover Gently push the silver tabs outward and tilt the A22 A24 assembly forward releasing it from the connector 96 Replacing Assemblies www vxitech com To REMOVE THE 10 11 ASSEMBLY 1 Remove top cover and input assemblies See To Remove the Top Cover and To Remove the Input Assemblies 2 If the module does NOT have option AYF or option 1D4 do the following Remove the five standoffs using a 1
95. ger the vt1432 triggerMeasure function vt1432 triggerMeasure a source trigger vt1432_setTriggerChannel a tach trigger vt1432_setTriggerChannel an external trigger vt1432 setTriggerExt an input level or bound trigger event vt1432_setTriggerChannel and vt1432_setTriggerMode Each of these trigger sources can be enabled or disabled independently so quite complex trigger setups are possible In all cases however the first trigger event kicks off the measurement and the following trigger events become superfluous Note that for vt1432 setAutoTrigger the setting VT1432 MANUAL TRIGGER really means do not auto trigger not expect a manual trigger For single VT1432B systems the TTL trigger signal is not connected to the VXI backplane For multiple VT1432B systems the vt1432_initMeasure function connects the VT1432B trigger lines to the VXI backplane and at that point the selection of which TTL trigger lines through Using the VT1432B 41 VXI Technology Inc vt1432 getTtltrgLines is relevant Multiple mainframe systems will need to account for the unidirectional nature of the inter mainframe MXI extenders which will prevent all but the upstream mainframe from triggering the system Trigger Level To set the trigger level use vt1432 setTriggerMode to select level or bound mode and use vt1432 setTriggerLevel twice to set both the upper and lower trigger levels The difference between the upper and lowe
96. he VT1432B www vxitech com Initialization The command used to initialize the system is 1432 init This function initializes the VXIplug amp play library and registers all VT1432B modules It also checks the existence of a VT1432B module at each of the logical addresses given in the resource list and allocates logical channel identifiers for each channel in all of the VT1432Bs Input channels source channels and tachometer trigger channels are kept logically separated Most other functions cannot be used until after vt1432_init but there are two functions that can be used before initialization to get information needed by vt1432 init These are vt1432 find and vt1432 getHWConfig The vt1432 find function searches the VXI mainframe and returns the VXI Logical Address for every VT1432B found The vt1432 getHWConfig function returns additional information about the hardware After vt1432 init is run use vt1432 getNumChans to get the total count of inputs sources and tachs for all VT1432B modules named in the vt1432 init call Creating a Channel Group The function vt1432 createChannelGroup creates and initializes a channel group A channel group allows commands to be issued to several VT1432B channels at once simplifying system setup Channel groups can overlap The state of an individual VT1432B channel that is in more than one channel group is determined by the most recent operation performed on any group to which this channel bel
97. he actual instrument driver itself is a DLL Dynamic Linked Library created from set of source C files set of header H files used for compiling the file as well as to describe the driver s calls to any program using the driver e standard driver library LIB file to provide the standard functionality all the drivers would require This DLL is a set of calls to perform instrument actions at heart that is all a VXIplug amp play driver is a library of instrument calls This driver is accessed by Windows applications programs written in languages such as Visual C or Visual BASIC using programming environments such as VEE or NI LabView A Windows Help chm file is included which provides descriptive information and code samples for the functions in the VXIplug amp play DLL This help file can be viewed in the standard Windows Help viewer The Soft Front Panel The soft front panel is a stand alone Windows application built on top of the VXIplug amp play driver DLL it is used for instrument evaluation and debugging and as a demo It is not a programmable interface to the instrument nor can it be used to generate code Using the VT1432B www vxitech com The soft front panel also accesses the same Windows Help file as provided with the DLL EP TI T1432 36 Soft Front Panel Meas Input Source Display FIGURE 3 2 AN EXAMPLE OF A SOFT FRONT PANEL SFP HEADER AND LIBR
98. he next state See the Measurement Initiation and Measurement Loop sections below for more details about these transitions During all the transitions of the Sync Trigger line the clock line continues with a constant pulse The Sync Trigger line is wire OR d such that all modules in a multiple module system within one mainframe must release it for it to go high Only one VT1432B is required to pull the Sync Trigger line low In a system with only one VT1432B the Sync Trigger line is local to the module and not is routed to TTL TRIGGER line on the VXI backplane Sync Trigger Line Idle Trigger _ Pre arm Arm LEES Meas Start of Start of State State FIGURE 3 7 TRANSITIONS BETWEEN STATES Parameter Settings Many parameters are channel dependent meaning that each channel can be set independently of the others in the module Other parameters are module dependent changing a module dependent parameter for a channel will change it for all channels on that module For example changing blocksize a module dependent parameter for input channel 3 will also change the block size for all other channels in the same VT1432B module as channel 3 When possible parameters are written to the hardware as soon as they are received Sometimes the parameter cannot be written to the hardware until the start of a measurement in this case the value of the parameter is saved in RAM in the
99. his 1 Send Command 2 Wait for Done 3 Ifno error then Read Response Multiple commands may be sent with a test for errors at the end of the sequence This example sends three commands before checking for errors 1 Send Command 2 Send Command 3 Send Command 4 Wait for Done DSP Protocol When a controller writes to the Command register a DSP interrupt is generated When responding to this interrupt the DSP will follow this procedure 1 Clear the Done bit 2 Read and decode the command from the Command register 3 Read any parameters from the Parameter registers and RAM 4 Ifaresponse data is required a Write the data to the Query Response register Parameter registers and RAM b Set Query Response Ready true 5 Set Command Parameter Ready true 6 Finish command execution 7 lfany errors are pending set Err 0 else set Err 1 8 Set Done true There are two additional requirements for the DSP 1 Once it begins processing a command interrupt the DSP must defer processing subsequent commands until it has finished 2 The DSP software maintains an error s pending flag and possibly and error queue that is set by any command decoding or execution error and cleared by some other method such as an error query DSP Bus Registers There are two 32 bit registers in the DSP bus address space The VXI FPGA does not assert TA when these registers are accessed 200 16 200 6 D
100. i lt m clock trigger gi gt SCA2 co an Tachometer S ER lt optional CH12 optional Or Source cHiz optional CH14 SCA 4 cH16 optional FIGURE 4 1 VT1432B BLOCK DIAGRAM 48 Module Description www vxitech com For block diagrams of the arbitrary source and the tachometer see the sections on The Arbitrary Source Option and The Tachometer Option IEPE Current Source 94 Tepe AC DC a Differentia n Gain Anti aliasing Sigma Delta Trigger Digital Coupling 363 Amplifier Selection Filter ADC Decimation z Single Ended Relay with 50 Q Load 500 247 VT1435 and VT1436 Only FIGURE 4 2 TYPICAL INPUT CHANNEL SECTION BLOCK DIAGRAM VT1435 AND VT1436 SPECIFIC FEATURES The following features are available only on the VT1435 and VT1436 IEPE Current Source The current source is set to a nominal 4 mA and has a very high compliance voltage and low output impedance The current source is polarized and must be operated with positive current flowing from the terminal to the terminal and may not be operated in the opposite polarity The voltage created by the current source s current flowing through and transducer 1s sampled internally and directly controls the Status LED s state The IEPE
101. increasing system performance The VT1432B may contain up to four 4 channel input assemblies giving them up to 16 inputs channels On board DSP and 32 MB of RAM maximize total system performance and flexibility The new redesigned 24 bit digitizer input combined with a large number of input ranges allow the VT1432B to operate in the most optimum measurement range Even low sensitivity low output level transducers work well with the VT1432B The high performance floating point DSP used for the linear phase FIR anti alias filters is also user programmable with TI s Code Composer Studio A standard JTAG interface is included to ease interfacing to this DSP The FIR anti alias filter vastly improves the phase accuracy of all channels relative to the tachometer trigger and other channels INSPECTING THE VT1432B The VT1432B module was carefully inspected both mechanically and electrically before shipment They should be free of marks or scratches and they should meet their published specifications upon receipt If the module was damaged in transit do the following e Save all packing materials e File a claim with the carrier VXI Technology sales and service office Installing the VT1432B 13 VXI Technology Inc INSTALLING THE VT1432B m Set up the VXI mainframe See the mainframe s installation guide for assistance 2 Select a slot in the VXI mainframe for the VT1432B module The module s local bus receive
102. ion Pin Pin Definition RFI GND Cable Shield 26 13 Diff 1 24 V Power 25 12 Diff 1 GND Return for 24 V 24 11 RFI GND Drain Shield 1 24 Power 23 10 RFI GND Drain Shield 2 RFI GND 22 9 Diff 2 12 SCL 21 8 Diff 2 CAL HIGH 20 7 CAL LOW BoB_EN 19 6 Diff 3 RFI GND 18 5 Diff 3 12 SDA 17 4 RFI GND Drain Shield 3 RFI GND 16 3 RFI GND Drain Shield 4 I2C EN 15 2 Diff4 RFI GND Cable Shield 14 1 Diff 4 TABLE 8 1 PIN DEFINITIONS FOR INPUT CONNECTOR Breakout Boxes VT3240A and VT3241A 71 VXI Technology Inc Recommendations on wiring for the VT1432B 4 channel Input Connector Allowed Connections Differential Input Channels Connect at VT1432B end of cabling and at DUT Recommended shielded twisted pair 1 Diff 4 2 Diff 4 5 Diff 3 6 Diff3 8 9 1 Diff 2 Diff 2 2 Diff 1 13 Diff 1 Input Channel Shielding Connect at VT1432B end of cabling ONLY 3 RFI GND Drain Shield 4 4 RFI GND Drain Shield 3 10 RFI GND Drain shield 2 11 RFI GND Drain Shield 1 Additional shielding of entire cable 14 RFI GND Cable Shield 26 RFI GND Cable Shield 72 Breakout Boxes VT3240A and VT3241A www vxitech com Disallowed Connections Do NOT connect these pins on VT1432B end of cabling These signals and supplies are provided for VXI Technology specified breakout boxes and are unspecified for other usage
103. ion of the product or software or firmware will be uninterrupted or error free LIMITATION OF WARRANTY The warranty shall not apply to defects resulting from improper or inadequate maintenance by the buyer buyer supplied products or interfacing unauthorized modification or misuse operation outside the environmental specifications for the product or improper site preparation or maintenance VXI Technology Inc shall not be liable for injury to property other than the goods themselves Other than the limited warranty stated above VXI Technology Inc makes no other warranties express or implied with respect to the quality of product beyond the description of the goods on the face of the contract VTI specifically disclaims the implied warranties of merchantability and fitness for a particular purpose RESTRICTED RIGHTS LEGEND Use duplication or disclosure by the Government is subject to restrictions as set forth in subdivision b 3 11 of the Rights in Technical Data and Computer Software clause in DFARS 252 227 7013 VXI Technology Inc 2031 Main Street Irvine CA 92614 6509 U S A Preface 7 VXI Technology Inc DECLARATION OF CONFORMITY Declaration of Conformity According to ISO IEC Guide 22 and EN 45014 MANUFACTURER S NAME VXI Technology Inc MANUFACTURER S ADDRESS 2031 Main Street Irvine California 92614 6509 6509 PRODUCT NAME 4 8 16 channel 102 4 kSa s Digitizer with DSP MODEL NUMBER S VT1432B
104. ister puts a word into the source data FIFO The source data FIFO 15 a 32 bit device See the following section regarding D16 D08 access of 32 bit registers e Count Register The Count register contains an unsigned 16 bit integer which is the number of 16 bit words of data which are currently available from the Send Data register or which the Receive Data register is currently ready to accept While a device is generating or accepting data the Count register may indicate fewer than the actual number of words available Query Response Command Register This register is used to send commands to and receive responses from the device It is implemented as a 32 bit RAM location Writing the least significant byte highest address clears the Command Parameter Ready and Query Response Ready bits in the status register and interrupts the on board DSP See the following section regarding D16 D08 access of 32 bit registers and the communication protocol e Parameter 1 7 Registers These are 32 bit RAM locations used to pass parameters along with commands to the device or query responses from the device See the following section regarding D16 D08 access of 32 bit registers and the communication protocol 32 bit Registers Several of the 16 registers and all other 24 bit registers are implemented as 32 bit only resources These are accessible using VME Bus D16 and D08 EO accesses However certain restrictions apply The affected A16 registers are
105. itech com SECTION 7 THE TEDS OPTION TEDS TRANSDUCER ELECTRONIC DATA SHEET VT1435 AND VT1436 ONLY Each channel of the VT1435 36 has the ability to read and write TEDS data from TEDS enabled transducers DS2430A based devices only In read mode the module will return the device s 6 bit family code 48 bit serial number 8 bit CRC and 32 byte user calibration data fields There is no processing on the VT 1435 36 to format the data read from the TEDS device In write mode the module expects 40 bytes of data The first 8 bytes are ignored and take the place of the family code serial number and CRC bytes The last 32 bytes are destined for the TEDS device s 32 byte EEPROM It is recommended that the user first read the contents of the TEDS device 40 bytes change the user modifiable EEPROM 32 bytes as required and then write the new values to the device Note When writing to the 32 byte EEPROM all 32 bytes must be written to at the same time vt1432 writeTEDS function contains many data verification steps to assure that write data is correctly written to the TEDS device If data is correctly written to the device the function call returns no error It should be noted that the write function of a TEDS device has many exacting timing constraints and interruption by the user of this function could result in lost data or corrupted EEPROM memory Care should be taken in both the hardware setup of the transducer and asso
106. ites to the least significant byte will always include the most recently cashed data whether intended for that register or not Lone writes to the most significant part of a 32 bit register will be lost if not followed by a write to the least significant part of the same register Thus there are two important rules 1 Always write all 32 bits of a 32 bit register 2 Always write the least significant part last Command Response Protocol The Command Response protocol uses the following resources Command Query Response register implemented as a general purpose RAM Three parameter registers implemented as a general purpose RAM Additional A24 accessible RAM contiguous with the parameter registers The Command Ready Query Response Ready Err and Done bits of the Status register The RAM registers are the communications media while the Status register bits provide synchronization In general a controller sends a command to the DSP by first writing any parameters to the parameter registers and the following RAM location It then writes the command to the command register which clears the Command Parameter Ready bit and interrupts the DSP At this point the DSP has exclusive access to the RAM registers The controller may not access that RAM again until the Command Parameter Ready bit is true When interrupted the DSP reads the command and its parameters writes any response data back to the Query Response Register and any other data t
107. lib msc import library DLL vt1432 h hpe1432 h lt VXIPNP gt winnt include include file for C programming vt1432 bas hpe1432 bas lt VXIPNP gt winnt include include file for visual basic programming vt1432 dll hpe1432 dll lt VXIPNP gt winnt VT 1432 Matlab MEX DLL for Matlab users or HPE1432 examples matlab where lt gt is usually C VXIPNP or C Program Files VISA Instruments Supported by the VT1432B library include E1432A E1433A B E1434A VT1432A VT1432B VT1433B VT1434A VT1435 and VT1436 Instruments Supported by the E1432 library include E1432A E1433A B E1434A VT1432A VT1433B and VT1434A In addition to the files listed above the VT1432 plug amp play library has the hpel432 h and hpel432 bas include files from the E1432 library This allows V T1432 35 36 users to use application programs that were written for the Agilent HP E1432 VXI plug amp play library By using these include files the user can compile and link existing source programs that have hpe1432 xxxx API calls C programmers can use vt1432 32 lib to link the library For existing applications that are dependent on previous 1432 32 dll or hpe1432 dll Matlab the user is able to run these applications without recompiling the source code Simply rename the 1432 32 41 file as 1432 32 411 or vt1432 dlI as hpe1432 dll CHANNELS AND GROUPS This section provides information relat
108. lock Transfers are supported for these addresses only Movable DSP Bus Window Accesses to this region are mapped by the Page Map register to different 512 kB regions of the internal DSP bus The VXI Bus Registers are defined as follows ID Register A read of this 16 bit register provides information about the device s configuration Its value is always CFFF g as defined in the following table Bit 15 14 13 12 11 0 Contents 11 Register Based Device 00 A16 A24 111111111111 ID Logical Address Register A write to this register changes the device s logical address according to the VXI bus Dynamic Configuration protocol Its format is defined in the following table Bit 15 8 7 0 Contents No effect Logical Address Device Type Register A read of this register provides information about the device s configuration Its format is defined in the following table Bit 15 12 11 0 Contents 0011 Model Code 1 MB of A24 20116 for VT1432B Contents 0011 Model Code 1 MB of A24 20516 for VT1435 36 Register Definitions 103 VXI Technology Inc e Status Register A read of this register provides information about the device s status as defined in the following table Bit 15 14 13 12 11 10 9 8 Contents A24 MODID Unused Block Data ST Loaded Active Ready Ready Done Bit 7 6 5 4 3 2 1 0 Contents Done Err Unused HW
109. lowing the channel to float to the potential to which it is being driven Transducer Electronic Data Sheet Each channel of the VT1435 36 has the ability to read and write TEDS data from TEDS enabled transducers DS2430A based devices only For more information on the TEDS option please see Section 7 Module Description 49 VT1432B FRONT PANEL DESCRIPTION Front Panels for 4 8 and 16 channels VXI Technology Inc The VT1432B may have any of several front panels depending on options and number of input channels The following illustration shows front panels for 4 8 and 16 channels ZN VXI Technology Fail Acs Trigger ExSamp Cal ExTrig CHAN 1 4 ZN D gt Wi VXI VXI Technology Technology Fail Acs Trigger Fail Acs Trigger ExSamp ExTrig J i CHAN 5 8 L p 999 ExSamp Cal ExTrig CHAN 5 8 L 1 J 4 CHANNEL 8 CHANNEL 16 CHANNEL 102 4 kSa s 102 4 kSa s 102 4 kSa s A D DSP A D DSP A D DSP 9 12 7y 13 16 VT1432B VT1432B 1DD 1DE VT1432B EL F A a S S MY 2 Z FIGURE 4 3 FRONT PANELS FOR 4 8 AND 16 CHANNELS Module Description 50 www vxitech
110. module All Local Bus data transfers originate in an input module and move towards a signal processing or disk throughput module to the right of the input module If other modules generate data to the left of the input module the input module will pass the data to its right and append its own data to the data blocks from previous modules 54 Module Description www vxitech com THE VT1432B VXI DEVICE Address Space The VXI system architecture defines two types of address space Al6 space consists of 64 kilobytes kB and A24 consists of 16 megabytes MB The VT1432B have a 32 bit port through which it has access to 16 and A24 space It can also use D32 to send and receive data though the port Or it can use the port for 16 bit data transfers by using only 16 of the 32 bits available The VT1432B perform different types of VME cycles depending on the number of bits transferred per cycle two cycles for 16 bit transfers and one cycle for 32 bit Shared Memory Shared memory provides a way for the VT1432B to transfer data to a controller The shared memory in the VT1432B is mapped to the A24 VXI address space The controller can then access that same address space to receive or write data A function can be called to get the data Memory Map The following discussion of memory mapping is included as supplemental information It is not needed to operate the VT1432B as this functionality is hidden when using the VT1
111. module measurements n supported instruments multiple modules 4 440480089882 EDS essei reece dl N VTI432B VT1435 NO1Se Modes wath doen cree eee 59 VTI1436 sync trigger 0 synchronization offset register multiple mainframe sees Out source output TTLTRG Out connector synchronous sampling Overheating SYSRESET M DLL 5 OVEDIAD i edite e system requirements essere overlap block mode overload detection eee Index 117 T Tach connector 66 Tach2 connector tachometer block diagr m 64 block monitoring 63 description 2 63 edge trigger 2 41 exact RPM triggering 2 63 features s DEREN RR a 48 temperature 22 2042 2 0 terms and symbols 25 test TESTED states is transducer electronic data sheet transferring data osise n nren nai ii transporting module er eies trigger auto external input eere aterert ense lines manual source eoo trigger level TRIGGER state troubleshooting eio bere rn Rei tier U up down RPM esee nete ennt nennen ene 48 using the VT14
112. mount of DRAM memory for each channel is the total DRAM memory divided by the number of channels The DRAM size is 32 MB The trigger can be programmed to trigger on the input or on information from the software The following are examples of ways a trigger can be generated input level or bound source external trigger RPM level with tachometer option AYF ttl trigger VXI backplane free run automatic 34 Using the VT1432B www vxitech com 96002 trigger ch 1 42 Input 1 96002 E host gt Input 2 gt Static 0 FIFO Input 3 RAM o Local a Input 4 gt Bus FIFO S ch 16 FIFO DRAM circular buffer P Xr ce y to VMEBus Local Bus trigger ch2 ch 3 ch 4 ch5 FIGURE 3 5 DATA FLOW AND FIFO ARCHITECTURE 35 Using the VT1432B VXI Technology Inc Base Sample Rates Baseband Measurement Spans Table 3 1 on page 37 shows the measurement spans available for base sample rates for baseband measurements In this table is the sample frequency or sample rate The value for zero divide by two steps and no divide by 5 step is the top measurement span corresponding to the sample rate This is with no decimation and using 400 lines to avoid alias The other values on the table are for this top span decimated by five and or two For a VT1432B which has the arbitrary source option 1D4 the sample rate for the sourc
113. n bus ECL Engineering Unit EU FFT FIFO Free run counter VXI Technology Inc A digital filter that simultaneously decreases the bandwidth of the signal and decreases the sample rate The digital filter provides alias protection and increases frequency resolution For more information see Spectrum amp Network Measurements available through VXI Technology A method for converting an analog input to digital data It involves using a difference of two voltages delta and a summation of signals sigma to improve accuracy An instrument which converts analog signals into digital data suitable for digital signal processing Abbreviation for dynamic random access memory Abbreviation for digital signal processing or processor The VT1432B does not use the arbitration bus The arbitration bus is part of the VXI specification and is used by some modules to request bus control Abbreviation for emitter collector logic a standard for electrical signals A scale factor used to convert the output of a transducer in volts into another unit for example g s Abbreviation for fast Fourier transform Abbreviation for first in first out A buffer and controller used to transmit data The FIFO in the VT1432B VT1433B input is implemented using DRAM A counter in which the bits always increment When the free run counter reaches all ones it resets to all zeros and continues counting f Abbreviation for sample frequency
114. n the following tables Assemblies without option AYF or 1D4 Assemblies with option AYF Assemblies with option 1D4 Assemblies with option TEDS VT1435 36 only see VT1435 36 Section Cables without option AYF or 1D4 Cables with option AYF Cables with option 1D4 Front Panel Ordering Information To order a part listed in one of the tables quote the part number VTI Part Number indicate the quantity required and address the order to the nearest VXI Technology sales and service office see the preface of this manual The first time a part is listed in the table the quantity column Qty lists the total quantity of the part used in the module For the corresponding name and address of the manufacturer s codes shown in the tables see CAGE Code Numbers Direct Mail Order System Within the U S A VXI Technology can supply parts through a direct mail order system Advantages of the Direct Mail Order System are Direct ordering and shipment from VXI Technology No maximum or minimum on any mail order Transportation charges are prepaid A small handling charge is added to each order No invoicing A check or money order must accompany each order Mail order forms and specific ordering information are available through VXI Technology See Support Resources for a list of VXI Technology sales and service office locations and phone numbers Replacing Assemblies 77 CAGE Code Numbers VXI Technology Inc
115. ne 1 indicates that the device is in the Config Reg Init state and the Model Code bits of the Device Type register are not valid while a zero 0 indicates that the device is in either the self test or failed state When Passed is true a one 1 indicates that the DSP has finished its initialization and is ready for normal operation while a zero 0 indicates that the device is in the passed state Passed A zero 0 indicates that the device is in either the Hard Reset Soft Reset Config Reg Init Failed or Init Failed state A one 1 indicates that the device is in the passed state HW OK A one 1 indicates that all the on card FPGAs have successfully be initialized Q Resp Ready Query Response Ready A one 1 indicates that the Query Response Register is loaded and ready to be read It is set by the DSP and cleared in hardware by a write to the Command Register Cmd Ready A one 1 indicates that the command register and parameter register are available for writing It is set by the DSP microprocessor and cleared in hardware by a write to the Command Register When this bit is zero 0 it additionally indicates that the Done bit is not valid e Control Register A write to this register causes specific actions to be executed by the device The actions are described in the following table 104 Register Definitions www vxitech com Bit 15 14 2 1 0 Contents A24 A32 Unused Sysfail Inhibit Reset Enable
116. not connect or disconnect any cable probes test leads etc while they are connected to a voltage source Remove all power and unplug unit before performing any service Service should only be performed by qualified personnel This product is grounded through the grounding conductor of the power cord To avoid electric shock the grounding conductor must be connected to earth ground To avoid injury electric shock or fire hazard Do not operate in wet or damp conditions Do not operate in an explosive atmosphere Operate or store only in specified temperature range Provide proper clearance for product ventilation to prevent overheating NOT operate if any damage to this product is suspected Product should be inspected or serviced only by qualified personnel The operator of this instrument is advised that if the equipment is used in a manner not specified in this manual the protection provided by the equipment may be impaired Conformity is checked by inspection Preface 11 VXI Technology Inc SUPPORT RESOURCES Support resources for this product are available on the Internet and at VXI Technology customer support centers VXI Technology World Headquarters VXI Technology Inc 2031 Main Street Irvine CA 92614 6509 Phone 949 955 1894 Fax 949 955 3041 VXI Technology Cleveland Instrument Division 5425 Warner Road Suite 13 Valley View OH 44125 Phone 216 447 8950 Fax
117. o the parameter registers and the following RAM and set the Command Parameter Ready bit true The Query Response Ready bit is used to indicate that the DSP has written query data to the RAM registers It is set by the software and cleared by a write of the Command Register Register Definitions 107 VXI Technology Inc The Done bit is set by DSP software when it finishes execution of a command or a command sequence This may be long after it has set the Command Parameter Ready bit The DSP software clears the Done bit immediately on receipt of a new command before it sets the Command Parameter Ready bit The Err bit is asserted to 0 by the DSP software to indicate an error in the decoding or execution of a command It is asserted to 1 if the command was executed with no error This bit must be valid before Done is set at the end of a command In order to avoid contention and or invalid data reads there are certain rules that must be observed 1 controller must not write to any of the RAM registers when Command Parameter Ready 15 false 2 The DSP must not write to any of the RAM registers when either Command Parameter Ready or Query Response Ready is true 3 Acontroller must not read any of the RAM registers when Query Response Ready is false 4 The DSP must not read any of the RAM registers when Command Parameter Ready is true 5 When writing a command together with parameter a controller must always write to the Comm
118. ongs As a side effect this function makes all input and tachometer channels in the channel group active and all source channels in the channel group inactive This function does not inactivate other channels within the modules that the channels are in and does not preset the channels in the new group After a channel group has been created use vt1432 getGrouplnfo to get selected information about the group It is possible for vt1432 getGrouplnfo to be set up to return the number of modules channels inputs sources or tachs in the group It can also return a list of the modules channels inputs sources or tachs Input Source and Tachometer Channels Channel numbers must fall in particular ranges for different types of channels Input channel numbers range from 1 to 4 095 Source channel numbers range from 4 097 to 8 191 Tachometer channel numbers range from 8 193 to 12 287 A mixture of input source and tachometer channels may exist in one group However it is also important for many functions to be sent only to the appropriate type of channel For example asking for a blocksize from a tachometer channel can cause an error It may be useful to set up several channel groups at the beginning of the program one for input channels one for source channels one for tachometer channels and one that combines all three channel types The input handle could be used for input only functions the source for source only functions and the
119. or sample rate group ID Any number of channels may be declared and uniquely identified by a groupID A channel can be a member of more than one group holdoff time A circuit that detects a trigger signal will not respond to another trigger until the hold off time has passed This prevents a ringing signal from be detected as multiple triggers IACK Abbreviation for interrupt acknowledge IEPE Abbreviation for integrated electronics piezoelectric IRQ Abbreviation for interrupt request kSa s Abbreviation used for kilosamples per second LED Abbreviation for ight emitting diode Local Bus A high speed port that is defined as a standard byte wide ECL protocol which can transfer measurement data at up to 2 62 MSamples per second from left to right on the VXI backplane logical address The VXI logical address identifies where each module is located in the memory map of the VXI system 112 Glossary www vxitech com Message based VXI device module dependent commands bus overlap block mode pipeline mode plug amp play RAM register based VXI device registers RPM ROM sample rate SCA Settling SFP shared memory slot 0 commander SMB Soft Front Panel SRAM Message based devices communicate with the VXI bus using high level ASCII commands Programming is easier and more sophisticated but communication is slower than with register based devices Message based devices can also be programmed at the
120. or the top span the bandwidth is 1 16 times span shown TABLE 3 1 TABLE OF BASEBAND MEASUREMENT SPANS HZ Additional Notes on Measurement Spans The minimum span is approximately is 8 Hz where the maximum span is 40 kHz Top span 46 400 Hz 464 lines To select a sample frequency for time domain data first divide the desired sample frequency by 2 56 to convert it to a measurement span Then locate the closest measurement span on this table and choose the corresponding sample frequency at top of the table For a VT1432B which has the arbitrary source option 1D4 the sample rate for the source is automatically set to be the same as the sample rate selected for the inputs When the source 1s active the sample rate cannot be greater than 65 536 kHz Using the VT1432B 37 VXI Technology Inc MEASUREMENT PROCESS Measurement Setup and Control When the VT1432B makes a measurement the measurement itself consists of two phases the measurement initialization and the measurement loop Each of these phases consists of several states through which the measurement progresses The transition from one state to the next is tied to a transition in the Sync Trigger line one of the TTL trigger lines on the VXI backplane A state such as Idle begins when the Sync Trigger line goes low The Sync Trigger line then remains low as long as the state is in effect When the Sync Trigger line goes high it signals the transition to t
121. orm according to the way it is programmed See DTB arbitration bus Abbreviation for American Standard Code for nformation nterchange a standard format for data or commands A set of lines that connects all the modules in a VXI system A band in the frequency spectrum that begins at zero By contrast a zoomed band is centered on a specified center frequency A mode of data collecting where the instrument stops taking data as soon as a block of data has been collected Overlap block mode in the VT1432B and VT1433B can be configured to act exactly like block mode The number of sample points in a block of data Another name for the 8 channel input connector One of several possible sizes for VXI modules The VT1432B VT1435 VT1436 and VT1433B are C size modules Commands that are channel dependent change a parameter for each channel independently Abbreviation for constant output level amplifier A mode of data collecting used where the instrument collects data continuously and stops only if the FIFO overflows The VXI bus provides 32 data lines Modules can use all 32 lines or 16 lines or 8 lines For example D16 access refers to data read across 16 lines A set of instruments or modules connected together in a line Data and instructions enter each one before being buffered and passed out to the next module in line Glossary 111 decimation filter delta sigma digitizer DRAM DSP DTB arbitratio
122. ors for input They each have two cables that connect to the sub miniature D connectors on the front panel of the VT1432B Each of the two cables carries four channels For a 16 channel VT1432B two breakout boxes are used VOLTAGE 8 CH INPUT X FIGURE 8 1 VT3240A VOLTAGE BREAKOUT BOX Breakout Boxes VT3240A and VT3241A 69 VXI Technology Inc VT3240A Voltage type Breakout Box In this type of breakout box the signal is sent straight through to the sub miniature D connectors on the VT1432B VT3241A IEPE Voltage Breakout Box Each of the eight connectors in this type of breakout box is connected to an independent floating current source These are intended to power integrated electronics piezoelectric transducers They supply 4 5 mA nominal at up to 28 V The current sources are controllable by software in groups of four That is the current sources for connectors 1 4 can be turned on or off as a group as can the current sources for connectors 5 8 Breakout Box Grounding Each connector on the VT3240A and VT3241A breakout box has a small manual switch next to it When this switch is in the GND position the outer shell of the connector is grounded to the chassis ground of the VXI mainframe When it is in the DIFF position it is not grounded to the mainframe and will float if not grounded elsewhere in the syst
123. oupled 1 kHz maximum signal either side to chassis 5 V 10 V and 20 V range all other ranges Amplitude over range detection over range detection after common mode overload 5 V 10 V and 20 V range all other ranges differential overload over voltage protection DC residual 100 mV 200 mV 500 mV 1 V 2 V 5 V 10 V 20 V Add 23 to include over range capability 1 MQ 110 pF nominal 500 kQ 220 pF nominal 50 nominal VT1435 VT1436 only terminal to GND lt 1 Hz gt 63 dB gt 63 dB 20 V peak 10 V peak 22 5 10 5 V 130 20 of range 42 V peak lt 1 of range 5 mV AMPLITUDE Amplitude accuracy at 1 kHz Flatness relative to 1 kHz at full scale dc to 42 kHz typical worst case Amplitude resolution 0 7 of reading 0 01 of full scale 0 01 dB 1 24 bits 16 bits in some ranges for better data throughputs less 2 3 dB over range Cross CHANNEL MATCH Cross channel amplitude match Cross channel phase match 2 V and 20 V ranges all other ranges Phase match relative to tachometer 0 01 dB full scale signal Input ranges equal frequency above 10 Hz if ac coupled 0 1 at 1 kHz fiz x 6x10 0 1 lt 0 1 typical DYNAMIC RANGE Spurious free dynamic range Crosstalk 108 dBfs typical includes spurs harmonic distortion intermodulation distortion alias products lt 104 dBfs typical TRIGGER
124. p dialogue box appears providing the opportunity to change the name of the program folder that will be created in the Start Menu The default name is VXI Technology Click Next to continue 8 The Start Installation dialogue box appear next Click on Next to begin installation 9 After the program files load the Installation Complete dialogue box will appear Click Finish to complete the installation process The Resource Manager The Resource Manager is a program from the hardware interface manufacturer It looks at the VXI mainframe to determine what modules are installed It should be run every time the system 1s powered up If a No VT1432 36 can be found in this system message appears from the VT1432B 35 36 soft front panel run the Resource Manager Before running the VT1432B software make sure that the hardware 1s configured correctly and that the Resource Manager runs successfully Before using the measurement system all of its devices must be set up including setting the addresses and local bus locations No two devices can have the same address Usually addresses 0 and 1 are taken by the Resource Manager and are not available For more information about the Resource Manager see the hardware interface documentation 22 Getting Started www vxitech com THE VXIPLUG amp PLAY SOFT FRONT PANEL Using the soft front panel If the VT1432B software is run in a Windows environment the soft front panel SFP program
125. put connectors e 1 This is one of the two tachometer inputs Tachl cannot be configured as an external trigger e 2 This is the second of the two tachometer inputs Tach2 can also be configured via software to be an external trigger input e ExTrig This allows for an external trigger input to the VT1432B The input signal must be TTL although other characteristics can be defined in software ExTrig can be enabled or disabled in software VTI432BInput Connectors These connectors are attached to the cables from an 8 channel Input breakout box two input connectors for each 8 channel Input They connect the input signal to the VT1432B Each connector carries four channels Depending on options there can be 2 or 4 input connectors 8 16 channels VT1435 VT1436 Input Connectors These SMB input connectors connect the input signal to the VT1435 36 measurement circuitry There are four SMB connectors per SCA measurement module The VT1435 contains two SCAs and eight SMB connectors The VT1436 contains four SCAs and sixteen SMB connectors Each connector carries a single input channel The center conductor of the SMB connector is the input and the outer conductor of the SMB is the input to the measurement circuitry Each connector has an associated LED that displays the status of the IEPE transducer while the IEPE current source is enabled for the specified channel The Tachometer Option AYF www vx
126. r delays It starts again when another trigger occurs In continuous mode the VT1432B stops taking data only when the FIFO overflows When data collection stops the VT1432B releases the Sync Trigger line When all VT1432Bs are finished and the Sync Trigger line goes high the VT1432B goes into the IDLE state again The measurement initialization and loop may be interrupted at any time with a call to vt1432 resetMeasure which puts the module in the TESTED state Register based VXI Devices The VT1432B is a register based VXI device Unlike message based devices which use higher level programming using ASCII characters register based devices are programmed at a very low level using binary information The greatest advantage of this is speed Register based devices communicate at the level of direct hardware manipulation and this can lead to much greater system throughput Users do not need to access the registers in order to use the VT1432B The VT1432B s functions can be more easily accessed using the VT1432B VXlplug amp play Library However more information about the registers is provided in Appendix A Register Definitions Arm and Trigger This section explains some terminology relating the Arm and Trigger steps in the measurement loop As an example a measurement might be set up to arm at a certain RPM level and then subsequently trigger at an external event corresponding to top dead center TDC The settings would
127. r trigger levels must be at least 10 of full scale and 10 is usually the best amount Also use vt1432_setTriggerSlope to specify a positive or negative trigger slope Level mode If the mode is set to level and the trigger slope is positive then the module triggers when the signal crosses both the upper and lower trigger levels in the positive direction If the trigger slope is negative the module triggers when the signal crosses both levels in the negative direction Setting two trigger levels prevents the module from triggering repeatedly when a noisy signal crosses the trigger level Bound mode If the mode is set to bound and the trigger slope is positive then the module triggers when the signal exits the zone between the upper and lower trigger levels in either direction If the trigger slope is negative the module triggers when the signal enters the zone between the upper and lower trigger levels Data Transfer Modes The VT1432B can be programmed to use either of two data transfer modes overlap block mode and continuous mode Block mode will be described first Block Mode In block mode the input hardware acquires one block after getting an arm and trigger It does not allow the system to trigger until it is ready to process the trigger and it acquires pre trigger data if necessary The hardware does not accept a new arm and trigger until the acquired block is sent to the host There is no provision for overlap
128. rameters changing the value aborts the measurement immediately For other parameters the measurement is not aborted but the changed parameter value is saved and not used until a new measurement is started For still other parameters the parameter change takes place immediately and the data coming from the module may contain glitches or other effects from changing the parameter For more information please see the Programming Information of the VT1432B VXIplug amp play Library online help The module cannot be told to wait for settling when changing a parameter in the middle of a measurement The only way to wait for settling is to stop and re start the measurement Also the settling that takes place at the start of a measurement cannot be disabled Refer to the on line VT1432B Function Reference for the parameters needed for each function See Where to Get More Information in this section Using the VT1432B 45 VXI Technology Inc WHERE TO GET MORE INFORMATION There is more information available about the VT1432B This section shows how to access it and print it if desired The Function Reference for VXIplug amp play On PCs the VT1432B Functions Reference is provided in Microsoft Help text Select the Help icon in the lt VXIPNP gt winNT VT1432 directory Refer to Windows documentation including Help text for information on using and printing Help 46 Using the VT1432B www vxitech com SECTION 4 MOD
129. rs This allows the bits to be modified independently with single register writes In order to change an output value the Clock bit must be written as a one 1 while the Value is written as the desired output value Writing the Clock bit as a zero 0 will not change the output state The current state is read from the Value bit The DSP Command register has the following format Bit 31 24 23 22 21 20 19 18 17 16 aet Vs un y ps DONE DONE ERRn ERRn e uc euis 7 Clock Value Clock Value Clock Value Clock Value Bit 15 14 13 12 11 10 9 8 7 0 Q Resp Q Resp Cmd Cmd IRQ IRQ Contents Ready Ready Ready Ready Enable Enable Unused IRQ7 Clock Value Clock Value Clock Value 110 Register Definitions www vxitech com APPENDIX B GLOSSARY 16 registers A24 registers Agilent VEE arbitrary source arbitration bus ASCII backplane baseband block mode block size breakout box C size Channel dependent commands COLA continuous mode D32 D16 008 EO daisy chain Address space using 16 address lines The VXI definition gives each VXI module 64 bytes of A16 registers Address space using 24 address lines VXI modules can configure how much A24 address space they use An Agilent program for graphical programming See VEE A signal source capable of producing an arbitrary wavef
130. s ECL level data from the module immediately to its left and outputs ECL level data to the module immediately to its right Every module using the local bus is keyed to prevent two modules from fitting next to each other unless they are compatible If using the local bus select adjacent slots immediately to the left of the data receiving module The local bus can support up to nine VT1432B modules at full span at real time data rates If the VXIbus is used maximum data rates will be reduced but the module can be placed in any available slot 3 Using a small screwdriver or similar tool set the logical address configuration switch on the VT1432B See Figure 1 1 Each module in the system must have a unique logical address The factory default setting is 0000 1000 8 If a GPIB command module will be controlling the VT1432B module select an address that is a multiple of 8 If the VXI system dynamically configures logical addresses set the switch to 255 4 Check the settings of the Boot Source and ROM Programming switches on the bottom of the module Set switches 1 and 3 BS1 and BS3 up with all the others switched down Logical Address T E eo A U Boot Source 1 amp n Programming FIGURE 1 1 VT1432B SWITCH LOCATIONS Set mainframe s power switch to standby 14 Installing the VT1432B www vxitech com CAUTION Installing or removing the module with power on
131. should only be performed by qualified personnel TERMS AND SYMBOLS These terms may appear in this manual WARNING Indicates that a procedure or condition may cause bodily injury or death CAUTION Indicates that a procedure or condition could possibly cause damage to equipment or loss of data These symbols may appear on the product ATTENTION Important safety instructions Frame or chassis ground Indicates that the product was manufactured after August 13 2005 This mark is placed in accordance with EN 50419 Marking of electrical and electronic equipment in accordance with Article 11 2 of Directive 2002 96 EC WEEE End of life product can be returned to VTI by obtaining an RMA number Fees for take back and recycling will apply if not prohibited by national law Pts gt WARNINGS Follow these precautions to avoid injury or damage to the product Use Proper Power Cord To avoid hazard only use the power cord specified for this product Use Proper Power Source To avoid electrical overload electric shock or fire hazard do not use a power source that applies other than the specified voltage Use Proper Fuse To avoid fire hazard only use the type and rating fuse specified for this product 10 Preface www vxitech com WARNINGS CONT Avoid Electric Shock Ground the Product Operating Conditions Improper Use To avoid electric shock fire hazard do not operate this product with the covers removed Do
132. t temperature 20 C to 65 C Humidity non condensing 20 to 90 relative humidity at 40 C Maximum altitude 4600 m 15 000 ft POWER AND COOLING REQUIREMENTS VT1432A POWER Voltage 5 V 5 2 V 2 V 12 V 12 V 24 V 24 V 5 V STDBY DC Current 4 90 A 0 60 A 0 03 A 0 19 A 0 05 A 0 38 0 45A 0 00 A Dynamic Current 0 10 A 0 01 A 0 01 A 0 02 A 0 01 A 0 01 A 0 01 A 0 00 A Cooling 10 C Rise 4 24 L s 0 33 mm VT1432B POWER Voltage 5 5 2 V 2 V 12 V 12 V 24 V 24 V 5 V STDBY DC Current 6 00 A 0 19 0 03 0 40 A 0 04 0 47 0 47 0 00 Dynamic Current 0 66 A 0 02 A 0 01 A 0 02 A 0 02 A 0 03 A 0 02 A 0 00 A Cooling 10 C Rise 4 94 L s 0 38 mm VT1432B 1DE POWER Voltage 5 5 2 V 2 V 12 V 12 V 24 V 24 V 5 V STDBY DC Current 430A 0 12 0 03 0 28 0 04 0 25 0 25 0 00 Dynamic Current 0 55A 0 02 A 0 02 A 0 02 A 0 02 A 0 03 A 0 02 A 0 00 A Cooling 10 C Rise 3 19 L s 0 25 mm H O VT1432B 1DD POWER Voltage 5 5 2 2 V 12 V 12 V 24 V 24 V 5 V STDBY DC Current 3 40 A 0 08 A 0 03 A 0 22 A 0 04 A 0 14 0 14 0 00 Dynamic Current 0 58 0 02 A 0 01 A 0 02 A 0 02 A 0 02 A 0 02 A 0 00 A Cooling 10 C Rise 2 29 L s 0 18 mm H O VT1433A B POWER Voltage 5
133. terminated inputs with current enabled and voltage range settings lt 10 V can cause 12 V current consumption to increase as much as 65 and 5 2 V current consumption to increase as much as 130 Unterminated inputs should have their ranges set to 20 V to eliminate any possibility of excess current flow 5 V current consumption will be as much as 25 less if IEPE current is disabled Installing the VT1432B VXI Technology Inc POWER AND COOLING REQUIREMENTS OPTIONS AYF TACHOMETER POWER Voltage 5 5 2 V 2 V 12 V 12 V 24 V 24 V 5 V STDBY DC Current 0 14 A 0 00 A 0 00 A 0 00 A 0 00 A 0 10 A 0 06 A 0 00 A Cooling 10 C Rise 0 38 L s 0 05 mm H20 1D4 SOURCE POWER Voltage 5 V 5 2 V 2 V 12 V 12 V 24 V 24 V 5 V STDBY DC Current 0 60 A 0 00 A 0 00 A 0 19 0 18 0 03 0 03 0 00 A Cooling 10 C Rise 0 75 L s 0 12 mm H O VT3240 AFV POWER Voltage 5 5 2 V 2 V 12 V 12 V 24 V 24 V 5 V STDBY DC Current 0 00 A 0 00 A 0 00 A 0 00 A 0 00 A 0 00 A 0 00 A 0 00 A Cooling 10 C Rise External Device VT3241 AFW POWER Voltage 5 V 5 2 V 2 V 12 V 12 V 24 V 24 V 5 V STDBY DC Current 0 00 A 0 00 A 0 00 A 0 00 A 0 00 A 0 17 0 00 A 0 00 A Cooling 10 C Rise External Device VT3242 CHARGE POWER Voltage 5 V 5 2 V 2 V 12 V 12 V 24 V 24 V 5 V STDBY DC Current 0 00 A
134. tion list L Talk to logical address lt laddr gt default 8 R Read option list from hardware S Read serial string from hardware u Print this usage message V Print version info Z Zero delete all options from option list Example progopt A TEDS Code Word as supplied by VTI Customer Service L laddr 9 Verify that the TEDS Code Word has been accepted by the module Example progopt R optionO0 CodeWord 10 Connect a TEDS capable device to the module and verify correct TEDS operation 68 The TEDS Option TEDS www vxitech com SECTION 8 BREAKOUT BOXES VT3240A AND VT3241A INTRODUCTION A breakout box connects the VT1432B or VT1433B to a set of connectors to receive input signals Note that breakout boxes are not required for the VT1435 36 modules as the IEPE current sources are built in on board the modules and may be enabled via software control Several types of breakout boxes are available This section covers e VT3240A Voltage Breakout Box e VT3241A Breakout Box Other breakout boxes include the VT3242A charge breakout box and the VT3243A microphone breakout box See the documentation supplied with those products for more information Service For service on the breakout boxes contact the nearest VXI Technology Customer Support center THE VT3240A AND VT3241A BREAKOUT BOXES Each of the breakout boxes described in this section has eight BNC connect
135. try of the calibration section VTI432BInput Connectors These connectors are attached to the cables from an 8 channel Input breakout box There are two input connectors for each 8 channel Input They connect the input signal to the VT1432B Each connector carries four channels Depending on options there can be 2 or 4 input connectors 8 16 channels VT1435 VT1436 Input Connectors These SMB input connectors connect the input signal to the VT1435 36 measurement circuitry There are four SMB connectors per SCA measurement module The VT1435 contains two SCAs and eight SMB connectors The VT1436 contains four SCAs and sixteen SMB connectors Each connector carries a single input channel The center conductor of the SMB connector is the input and the outer conductor of the SMB is the input to the measurement circuitry Each connector has an associated LED that displays the status of the IEPE transducer while the IEPE current source is enabled for the specified channel Updating the arbitrary source firmware When updated firmware for the arbitrary source is available the ROM in the VT1432B can be updated by using the procedure documented in lt VXIPNP gt winNT VT1432 source read me The Arbitrary Source Option 1D4 www vxitech com SECTION 6 THE TACHOMETER OPTION A YF TACHOMETER DESCRIPTION Option AYF provides two tachometer inputs When this option is installed two of the three SMB connectors on the
136. ug amp play Drivers and Product Manuals CD ROM is shipped with the VT1432B module This CD includes the VT1432B VXlplug amp play host interface library for Windows operating systems with associated examples and the user s manual Getting Updates The latest version of the VT1432B instrument drivers can be found on line at www vxitech com INSTALLING THE VXIPLUG amp PLAY DRIVERS 1 Insert the VXIplug amp play Drivers and Product Manuals CD into the CD ROM drive 2 Navigate to CD ROM Drivers Drivers y Double click on driver vxipnp vt1432 b 07 04 or later to begin installation of the driver suite 3 The Welcome dialogue box will appear Click Next to continue 4 The Select Components dialogue box appears next Choose the drivers to be installed Once the required drivers are selected click Next 5 The Choose VXI PnP Location dialogue box appears next The default destination folder is determined by the VISA version previously installed on the PC If no VISA software has been previously installed the default destination folder is C Program Files VISA winnt To change the location click Browse and choose a new folder location Click on Next to continue 6 The Choose ME COM Driver Location dialogue box will appear The default destination folder is C Program Files VXI Technology ME To change the location click Browse and choose a new folder location Click on Next to continue 7 The Select Program Manager Grou
137. ule to use one of the VME interrupt line found in the step above using the vt1432 setlnterruptPriority call Set up an interrupt handler routine using the vt1432 callBacklnstall call The interrupt handler routine will be called when the interrupt occurs e Set up the interrupt mask in the VT1432B module using the vt1432_setInterruptMask call Host Interrupt Handling When the VT1432B asserts the VME interrupt line the program will cause the specified interrupt handler to be called Typically the interrupt handler routine will read data from the module and then re enable VT1432B interrupts with the vt1432 reenablelnterrupt call The call to vt1432 reenablelnterrupt must be done unless the host is not interested in any more interrupts Inside the interrupt handler almost any VT1432B Host Interface library function can be called This works because the Host Interface library disables interrupts around critical sections of code ensuring that communication with the VT1432B module stays consistent Things that are not valid in the handler are e Calling vt1432 createChannelGroup to delete a group that is simultaneously being used by non interrupt handler code e Calling one of the read data functions vt1432 readRawData or vt1432 readFloat64Data if the non interrupt handler code is also calling one of these functions e Calling vt1432 init to reset the list of channels that are available to the VT1432B library As is always the case
138. um off on Seed Range Display This button opens a dialog box that specifies how the data will be displayed For each trace an input channel or OFF and an output file can be specified VXI This button opens a dialog box showing the modules installed in the VXI mainframe and indicating which are active and inactive The resource name for each module is the interface card name that has been assigned to it Go Use the Go button to start the measurement Exit Use the Exit button to exit the soft front panel 24 Getting Started www vxitech com SECTION 3 USING THE VT1432B INTRODUCTION This section shows how to use the VT1432B using the VXIp ug amp play Host Interface Library The host interface library for the VT1432B is a set of functions that allow the user to program the register based VT1432B at a higher level than register reads and writes The library allows groups of VT1432Bs to be set up and programmed as if they were one entity It is compatible with Windows operating systems and communicates with the hardware using VISA VISA is the input output standard upon which VXIplug amp play software components are based The library includes routines to set up and query parameters start and stop measurements read and write data and control interrupts Routines to aid debugging and perform low level I O are also included For information on diagnostics see Troubleshooting the VT1432B WHAT 15 VXI
139. with interrupt handlers it is easy to introduce bugs into the program and generally difficult to track them down Be careful when writing this function 44 Using the VT1432B www vxitech com Data Gating Sometimes it is desirable to monitor data from some input channels and not from others The function vt1432_setEnable enables or disables data from an input channel or group of channels If data is enabled then the data can be read using the vt1432_blockAvailable and vt1432_readRawData call or the vt1432_readFloat64Data call If data is disabled data from the specified channel is not made available to the host computer This parameter can be changed while a measurement is running to allow the host computer to look at only some of the data being collected by the VT1432B module While data from a channel is disabled the input module continues to collect data but it is not made available to the host computer The host can then switch from looking at some channels to looking at others during the measurement By contrast the vt1432 setActive call completely enables or disables a channel and cannot be changed while a measurement is running For order tracking measurements this function can be used to switch between receiving order tracking data ordinary time data or both Programming Setup Parameters Some parameters such as range or coupling apply to specific channels When a channel ID is given to a function that sets a ch

VT1432B VT1435 VT1436

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