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CPС152 User Manual

1. v02 61 C Copyright 1985 2006 American Megatrends Inc Table 5 20 Description of NV SRAM Configuration menu Menu item Assignment NV SRAM Function Setting the operation mode of nonvolatile RAM Disabled Operation of NV SRAM is prohibited READ ONLY Setting READ ONLY mode READ WRITE Setting the READ WRITE mode NV SRAM Page Setting a base address for page access to the nonvolatile RAM 128KB page size Base Address 16 KB C8000 Base address C8000h 000 Base address 000 D0000 Base address D0000h D4000 Base address D4000h D8000 Base address D8000h Base address October 2015 5 28 Basic input output system User Manual 152 105 5 7 Exit Screen of Exit menu is shown in the Figure 5 24 Description of menu items is given in the Table 5 21 Fig 5 24 Screen of Exit menu Bios SETUP UTILITY Main Advanced PCIPnP Boot Security Chipset Exit WORDEN EG NAAA AAA
2. Exit Options Exit system setup WO NUN UN NUN UN UN UN UN US UN S UN UN US UN NUS NS after saving the changes Discard Changes and Exit Discard Changes F10 key can be used for this operation Load Optimal Defaults Reset WatchDog and Boot Main BIOS S Q E How Select Screen m select Item Enter Go to Sub Screen oat General Help E 6 Reset WDT Save Exit E ESC Exit 02 61 C Copyright 1985 2006 American Megatrends Inc Table 5 21 Description of Exit menu Menu item Assignment Save Changes and Exit Save the settings in CMOS and FRAM memory and exit the BIOS Setup program Discard Changes and Discard changes in CMOS and FRAM memory and exit Exit Discard Changes Discard changes made in settings without exiting the BIOS Setup program Load Optimal Defaults Load optimal factory default settings without exiting the BIOS Setup program October 2015 5 29 SECTION 6 TRANSPORTATION UNPACKING AND STORAGE Transportation unpacking User Manual 152 and storage 6 TRANSPORTATION UNPACKING AND STORAGE 6 1 Transportation The module must be transported in individual factory packages consisting of an individual antistatic bag and a cardboard box in closed vehicles in heated and airtight compartmen
3. User Manual 152 acronyms Term Meaning PIO Programmed Input Output PLCC Plastic Leaded Chip Carrier PM Peripheral Management Controller POST Power On Self Test PSB Processor System Bus PWM output Pulse Width Modulation RAMDAC Random Access Memory Digital to Analog Converter RTC Real Time Clock SMB System Management Bus SMBus System Management Bus SODIMM Small Outline Dual In Line Memory Module SSD Solid State Disk TFT Thin Film Transistor TTL Transistor Transistor Logic UART Universal Asynchronous Receiver Transmitter UHCI Universal Host Controller Interface USB Universal Serial Bus UTP Unshielded Twisted Pair October 2015 C 2
4. ne hine hire 69 3 1 Installation of module switclies caters t etre il 70 3 2 Configuration of module s parameters BIOS SETUP ssssssssssssssse eee mee ene ene ne he hne nee nne nee ener 73 SECTIONA 5 ume NR A Ee Da cda s eee i rp aaah ae oats 74 4 INTENDED USE OF CPC152 cono bte ob ted 75 04 eoe A e eral a cp fe dese 75 4 2 Setting connection between PC and 152 75 4 3 Module operation wit AT keyboard and mI He mem he ene hene 75 4 4 Loading files with FTRANS EXE 76 4 5 Interface BIOS SOC Vortex86DX for reading serial number 76 4 6 Interface BIOS SOC Vortex86DX for reading writing to 77 427 Semice M Mea de is d ate 78 SECTION 5 sateen es 79 5 BASIC INPUT OUTPUT SYSTEM 5 80 RECTE 82 5 2 Advanced additional settings ences O chine adie Ue bh ci cata ale Ee we ca uh Sh ce tu ale Ne ERR EAM Did 83 5 3 PCI PnP additio
5. RRA RRA Disable USB Port 0 1 Enabled USB Port 2 3 Enabled B USB IRO use IRO 6 m LAN IRQ 10 9 Address F4 6D 04 66 4B ISA Configuration E x Serial Parallel Port Configuration WatchDog Configuration E GPIO Configuration ram Select Sereen E NV SRAM Configuration Lf Select Item x NECS Change Option y LEN A 02 61 C Copyright 1985 2006 American Megatrends Inc Table 5 14 Description of SouthBridge Configuration menu SouthBridge Configuration USB Port 0 1 Control of operation of O and 1st USB port Enabled Permit operation of ports Disabled Prohibit operation of ports USB Port 2 3 Control of operation of the 2nd and 3rd USB ports Enabled Permit operation of ports Disabled Prohibit operation of ports USB IRQ Selection of interrupt line for USB controller SB LAN Control of operation of integrated Ethernet controller LAN Enabled Permit controller operation Disabled Prohibit controller operation LAN IRQ Selection of interrupt line for LAN controller MAC Address MAC address of integrated Ethernet controller LAN information field ISA Configuration This option enables to install timings for ISA bus operati
6. Fig 5 13 Screen of Boot merus aieo de give vetare nade mu e Fig 5 14 Screen of Boot Settings Configuration Fig 5 15 Screen of Security merus e a doeet plene taies e tete rege te pue ite drogue dade E Fig 5 16 Screen of Chipset mer ooi ie Et cen reel a a bc devas er re De peu a n o pde ne d prete Fig 5 17 Screen of SouthBridge Configuration Fig 5 18 Screen of Onboard Devices Fig 5 19 Screen of ISA Configuration Fig 5 20 Screen of Serial Parallel Port Configuration Fig 5 21 Screen of WatchDog Configuration 0 E hene trennen rene nnne rese renes Fig 5 22 Screen of GPIO Configuration ceca en mene hne nn hse rese Fig 5 23 Screen of NV SRAM Configuration Fig 5 24 Screen Ot Exit MOM cs ice ccs cee TTEE Fig Fig Fig Fig Fig Fig Fig Fig Fig Fig Fig Fig Fig No rl uum 0 075 0 E E E A All information in this document is
7. Save and Exit DESG Exit woo oW Wo Wo A o A o o o o o o o v02 61 C Copyright 1985 2006 American Megatrends Inc Table 5 10 Description of the Boot menu boot modes Menu item Assignment Boot Settings Configuration submenu 1st Boot Device Priority submenu October 2015 5 16 Basic input output system User Manual 152 105 5 4 1 Boot Settings Configuration Screen of the Boot Settings Configuration menu is shown in the Figure 5 14 description of menu items is given in the Table 5 11 Fig 5 14 Screen of Boot Settings Configuration menu BIOS SETUP UTILITY We Wo Wo o ee Boot Settings Configuration Allows BIOS to skip certain tests while booting This will AddOn ROM Display Mode Force BIOS decrease the time Bootup Num Lock On needed to boot the PS 2 Mouse Support Auto system For TE EEEGE Enabled Hit DEL Message Display Enabled Interrupt 19 Capture Disabled Support TFT console Enabled Select Screen x Select Item E EL Change Option E General Help x F6 Reset WDT E E ESC Exit 702 61 C Copyright 1985 2006 Ame
8. 152 A1 and B1 contacts of edge connector O It is also possible to extend functionalities by installing modules in PC 104 format ISA 8 16 bit It is permitted to install no more than 4 PC 104 extension modules Conventional view of installation and connection of extension modules PC 104 format is shown in the figure Fig 3 2 Conventional view of installation and connection of extension modules in PC 104 format PC 104 card E October 2015 3 1 User Manual 152 Installation and configuration 3 1 Installation of module switches For module hardware configuration it is possible to use the group of switches which general description is specified in the table below Table 3 1 Purpose of switched for module configuration Service jumper do not close Selection of power supply voltage for LCD panel connection via KIB98102 XP15 Switching of Power Fail signals watchdog timer WDT2 actuation of remote reset line XT X8 X9 to CPU hardware reset line X10 X13 Binding of COM1 RS 422 485 lines and connection of conforming resistors Selection of COM1 operation mode RS 422 485 rate of rise limitation Binding 2 lines RS 422 485 and connection of conforming resistors Selection of COM2 operation mode RS 422 485 rate of rise limitation X23 3 1 1 Switching to BIOS booting from the main standby source Table 3 2 Switching to BIOS booting from th
9. 125 C Digital accelerometer measuring acceleration via 3 axes Digital barometer measuring pressure from 50 to 115 KPa Compatibility with operating systems FreeDOS Microsoft MS DOS 6 22 Linux 2 6 a Microsoft Windows CE 5 a Microsoft Windows XP Embedded a QNX 4 25 QNX 6 5x Console ports COM3 4 and or VGA TFT and or Keyboard m Extension buses a 15 8 bit MicroPC 15 8 16 bit PC 104 m Power supply voltage 5 V 5 Consumed current without external devices more than 0 85 A 5 V at 25 C Standardized value under normal conditions humidity from 5 to 9596 25 8 By default the module is supplied with preinstalled FreeDOS October 2015 1 3 User Manual 152 Brief description m Operating temperature range from 40 to 85 C Modules storage conditions 1 in accordance with GOST 15150 69 Humidity up to 95 at 25 C without condensation m Resistance to multiple shocks 50g m Vibration resistance 5g MTBF No less than 160 000 hours Dimensions 125 0 x 123 0 x 27 0 mm no more than m Module weight No more than 140 g without CompactFlash card October 2015 1 4 User Manual 152 Brief description 1 3 Connection to module Below is a standardized list of interface boards and devices which could be connected to 152 m Devices with Ethernet 10 100 Mb sec interface m RS 232 compatible devices m RS 422 RS
10. 0278h 027Fh LPT port possible value 01F9h 0277h ports of matrix keyboard LEDs analog I O internal control registers PLD 505 0280h 028Fh Internal control registers 0290h 029Fh 02A0h 02AFh 02B0h 02BFh 02C0h 02E7h 02E8h 02EFh 02F0h 02F7h 02F8h 02FFh 0300h 0377h 0378h 037Fh 0380h 03B0h 03BBh 03BCh 03BFh 03C0h 03CFh 03D0h 03DFh O3EOh 03E7h 03E8h O3EFh OSF7h 03F8h OSFFh 0400h 04CFh 04D0h 04D1h 04D2h 0777h 0778h 077Fh 0780h OCF7h OCF8h OCFFh oDooh EDFFh EEOO0h EF3Fh EF40h FBFFh FCODh FCOEh FFEFh FFFOh FFFFh ISA bus COM2 ISA bus 4 ISA bus LPT port ISA bus MDA Adapter LPT port EGA VGA Adapter CGA Adapter ISA bus COM1 Floppy Controller 1 COM3 ISA bus Reserved ISA bus Reserved ISA bus Configuration registers of host PCI controller ISA bus Reserved ISA bus Reserved ISA bus Reserved possible value possible value possible value possible value possible value possible value possible value possible value possible value possible value Access to external bus October 2015 2 6 User Manual 152 Technical information Table 2 12 Internal I O addresses Address Setting a base address of internal PLD registers BA 01h Port of LEDs control
11. In addition this document may include names company logos and trademarks which are registered trademarks and therefore are property of their respective owners Fastwel welcomes suggestions remarks and proposals regarding the form and the content of this Manual October 2015 6 User Manual 152 Specification This manual contains technical description regulations directions and recommendations for installation setting and operation of CPC152 CPU module manufactured by Fastwel CPC152 CPU module is designed for the use as part of various integrated systems which require a combination of high performance and a low level of heat power released and power consumption operation within an extended temperature range 40 85 as well as compatibility of applications with x86 architecture of CPUs CPC152 is implemented in MicroPC format and is compatible with the majority of peripheral modules and power sources supplied by various manufacturers The document is designed for developers of distributed control and data acquisition systems for IT administrators and engineers in industrial automation area Trademarks Fastwel logotype is a trademark belonging to Fastwel Group Co Ltd Moscow Russian Federation Besides this document may contain names corporate logotypes and trademarks being registered trademarks consequently property rights to them belong to their respective legitimate owners Ownership Rights
12. October 2015 User Manual 152 Brief description Attention For proper operation of transmitter receivers RS 422 485 in multi terminal networks it is required to install line terminators for 120 Ohm using relevant jumpers at two the most remote network nodes as well as biasing resistors for 680 Ohm on one or two of the most remote network nodes Depending on the default configuration each port contains lightning protection circuits based on self recovering fuses and gas discharge elements The port also contains protection circuits against pulse interference on the basis of TVS diodes Diagram of output stages of COM1 port is specified below 2 port has a similar circuit design Fig 1 5 Output stages of RS 422 485 ports of CPC152 RS 422 convertor for 120 COM1 COM2 ports R 4 RX 5 GNDS LTM2881 October 2015 1 18 User Manual 152 Brief description Fig 1 6 Connection of modules via RS 485 interface Fig 1 7 Connection of modules via RS 422 interface MASTER Rtr SLAVE For manufacturing the cable it is required to use a removable part of WAGO 733 105 terminal block and shielded twisted pair Fig 1 8 Numbering of contacts of XP3 XP4 connectors 5 1 EL M penne October 2015 1 19 User Manual 152 Brief description 1 10 10
13. 2x20 contacts lines C D Contact Configuration ci c a Power supply Output Output Output Output Output Output Output Output Output Output Input Output Input Output Input Output Input Output Input Output Input Output Input Output Input Output ESO comers o eno Power supp fer saver output e o a c c fer c o mew our co output sos cu 509 impar ias sow impar ar era foon cs soz impar ias ci sos impar nar gt sora cs sors impar ias 8 2 p 2 vo 5 D16 D17 D18 D19 Configuration Power supply Input Input Output Input Output Input Output Input Output Input Power supply Power supply Power supply October 2015 2 27 User Manual 152 Technical information 2 9 15 Table of XS6 connector contacts MicroPC ISA 8 bit Table 2 48 Purpose of XS6 connector contacts MicroPC ISA 8 bit XS6 Edge connector of MicroPC bus extension 2x31 contacts Contact Configuration Contact Configuration 1 IOCHK Input B1 GND Power supply A2 SD7 Input Output B RESET Output A3 506 Input Output B3 5V Input 4 5 Input Output 4 IRQ9 A5 SD4 Input Output B5 503 Inpu
14. bata meme ee Power spo res Lx aes m ee ese 9e CET O A s EC AO contr tT meom comas ren Powersupply ow pa ven 96 7 8 ET conta ven Seniee ven s ee Powersupply dis monr Powersupply Power spt fui Auo ssi October 2015 2 23 User Manual 152 Technical information 2 9 10 Table of XP16 connector contacts connection to KIB98201 IDE LPT Table 2 42 Purpose of XP16 connector contacts 98201 IDE LPTTFT AUDIO KB MS 15 IDC72 1 27 mm 6 104068 5 ECON MECO LPT_STB Control LPT LPT_AFD Control LPT LPT_DO Data LPT LPT_ERR Control LPT LPT_D1 Data LPT 0 LPT_INIT Control LPT LPT_D2 Data LPT LPT_SLIN Control LPT LPT_D4 Data LPT HERES LPT_D5 Data LPT LPT_D6 Data LPT 18 LPT_D7 Data LPT
15. v02 61 C Copyright 1985 2006 American Megatrends Inc Table 5 8 Description of USB Mass Storage Device Configuration menu Configuration of USB drive Emulation Type Operation mode Auto Automatic mode Floppy Emulation type of the drive on floppy disks Forced FDD Forced emulation mode of the drive on floppy disks Hard Disk HDD emulation mode CDROM CDROM emulation mode October 2015 5 12 Basic input output system User Manual 152 105 5 3 PCI PnP additional settings of PCI plug and play This tab contains items responsible for operation of PCI and ISA buses as well as control of interrupt switching Screen of PCI PnP menu is shown in Figures 5 11 and 5 12 description of the menu is given in the Table 5 9 Fig 5 11 Screen of PCI PnP menu BIOS SETUP UTILITY Main Advanced Security Chipset Advanced PCI PnP Settings Clear NVRAM during m oR UB d Boh B AREA RARA RARA e d e f e d e d AA e d e s e e e e ARAS System Boot WARNING Setting wrong values in below sections a pS may cause system to malfunction ue l tk Plug amp Play 0 5 No PCI Latency Timer 64 Allocate to PCI VGA No Palette Snooping Disabled PCI IDE BusMaster Enabled OffBoard PCI ISA IDE Card Auto Select Reserved FE Select Item IRO4 R
16. WDTO WDTF Flag of WDTO timer actuation 1 there was a timer actuation record 1 into this bit resets the flag 0 there was no timer actuation WDTRL timer restart 1 Reboot of WDTO CNT counter 0 This value is not allowed to be written October 2015 2 12 User Manual 152 Technical information Table 2 25 WDT1 restart register Bits Address Action 7 6 5 4 3 2 1 0 Writing RST_WDT1 67h Reading Any writing to this port will lead to the restart of WDT1 timer Table 2 26 Control register of WDT1 timer Bits Address Action 7 6 5 4 3 2 1 0 68h Writing WDT1_WE 00h Reading WDT1_WE WDT1_WE Permission of WDT1 watchdog timer operation 1 permitted 0 prohibited default value Table 2 27 Register of WDT1 event selection Bits Address Action 7 6 5 4 3 2 1 0 69h Writing WDT1 SSEL 00h Reading WDT1 SSEL Selection of the event upon completion of WDT1 timer count 0000 reserved 0001 IRQ 3 0010 1 4 0011 IRQ 5 0100 IRQ 6 0101 IRQ 7 0110 IRQ 9 0111 IRQ 10 1000 IRQ 11 1001 IRQ 12 1010 IRQ 14 1011 IRQ 15 1100 NMI default value 1101 module reboot 1140 reserved 1144 reserved October 2015 2 13 152 Technical info
17. are underlined Information fields should be printed in italics Setting the wrong values could lead to malfunctions in system operation October 2015 5 1 Basic input output system User Manual 152 BIOS For displaying the menu for selection of a drive which will be used for booting of operating system during system booting and at the time of POST procedure it is required to press the F11 button on keyboard or F3 button on the keyboard of console PC the Console Redirect option should be on Example of the menu of boot device selection is given in the figure 5 2 Fig 5 2 Menu of boot device selection October 2015 5 2 Basic input output system User Manual 152 105 5 1 Main This menu tab contains description of BIOS version installed CPU and RAM There are also two items responsible for adjustment of current date and time Screen of Main menu is shown in Figure 5 3 description of items is shown in table 5 1 Fig 5 3 Screen of Main menu BIOS SETUP UTILITY Advanced PCIPnP Boot security Chipset A eee PD D Wem aaa aaa System Overview Use ENTER AMIBIOS Version 080015 Build Date 07 09 13 ID Fastwel FPGA Firmware 5 Rev 1 3 or SHIFT TAB to select a field Use or to configure system Time Processor VortexS6DX 49121 Speed 600MHz System Mem
18. 02 120 mm 500016 03 140 mm or 500016 02 500 For proprietary manufacturing of the cable for connection to the KIB98201 interface board it is recommended to use a 72 pin socket 1 111196 4 AMP with a pitch of 1 27 mm and a ribbon cable 1 57013 2 AMP Fig 1 17 External view of XP16 connector October 2015 1 26 SECTION 2 TECHNICAL INFORMATION User Manual 152 Technical information 2 TECHNICAL INFORMATION 2 1 General technical specifications of CPC152 Table 2 1 Requirements for power supply of CPC152 Requirements for power supply Power supply voltage 5 V 5 12 V Module current consumption over 5 V without external devices at 25 C no more than 152 01 0 85 A Maximum available consumption current over external circuits minimum value for the whole operating temperature range is limited by the installed short circuit protection system Maximum available total consumed current with due US 5 5 A consideration of internal and external circuits Table 2 2 Characteristics of digital inputs outputs GPIO Digital inputs outputs Load carrying capacity of Log 0 Log 1 TTL levels 16 0 4 0mA Required only for illumination of LCD panels October 2015 2 1 User Manual 152 Technical information Table 2 3 Characteristics of serial ports Maximum exchange speed over RS 232 250 Kb sec Maximum exchange speed over RS 422 485 750 Kb sec Volt
19. 1 16 User Manual 152 Brief description Table 1 4 Frequency divider values for serial ports Exchange speed F 1 8432 MHz F 24 MHz bit sec Divider Error 96 Divider Error 96 50 2304 0 000 30000 0 000 75 1536 0 000 20000 0 002 110 1047 0 026 13636 0 000 150 768 0 000 10000 0 000 300 384 0 000 5000 0 000 600 192 0 000 2500 0 000 1 200 96 0 000 1250 0 000 1 800 64 0 000 833 0 040 2 000 58 40 69 750 0 000 2 400 48 0 00 625 0 000 3 600 32 0 00 417 0 079 4 800 24 0 00 312 40 160 7 200 16 0 00 208 0 160 9 600 12 0 00 156 0 160 19 200 6 0 00 78 0 160 38 400 3 0 00 39 0 160 57 600 2 0 00 26 0 160 115 200 1 0 00 13 0 160 250 000 6 0 000 256 000 6 2 340 375 000 4 0 000 500 000 3 0 000 750 000 2 0 000 1 10 10 1 COM1 COM2 RS 422 485 COM1 and COM2 ports operate in the RS 422 485 mode and ensure galvanic isolation of up to 500 V each port is equipped with individual isolation from the system Maximum data exchange speed 115 2000 bit sec The ports are routed to one row WAGO 733 335 connectors with 5 outputs As transmitter receivers integral solutions based on LTM28811V 5 Linear Technology are used Through installation of X10 jumpers X14 COM1 X15 X19 COM2 consistent circuits will be connected to signaling lines of RS 422 or RS 485 interfaces and operation mode will be set
20. 128 45 connector XP5 IDC2 26 VH 12V VH 12V 6 ICS GND GND zo REY gt 23 GND a oma Connection of display to LPT port requires the development of a relevant driver October 2015 A 1 Frequently asked questions User Manual 152 considering programming of 152 Frequently asked questions related to programming of CPC152 1 need to use an external watchdog timer however some functions of the library that I use are performed longer than 1 6 seconds and as a result the watchdog timer makes CPU to restart don t have the source texts of this library and as a consequence can t insert a watchdog strobing procedure into the code Microcontroller does not allow to repeatedly stop and restart the watchdog timer What should do Solution If functions of your library operate at permitted interrupts you should create your own program for pre processing of occasionally emerging interrupts During the performance of library functions at this time only you should strobe the watchdog timer in this pre processor 2 While working with CPC152 use SmartLink terminal program noticed that some of the files transferred to the module using FTRANS EXE program are saved with errors What could be the reason It happens because SmartLink program uses XMODEM protocol while exchanging files with FTRANS EXE program This protocol does not have a sufficient ability to detect transmission
21. 2 COM3 RS 232 COM3 and COM4 pors operate in the ful 9 wire of RS 232 interface and have standard basic addresses for PC AT Integral solutions based on ADM3311EARU Analog Devices are used as transceivers The both ports can be used for console input output and loading of files For connection with PC used as hyperterminal the null modem cable is required COM3 port is used by default Maximum speed of data transfer for COM3 and COM4 is 115 2 Kb sec The ports are fully software compatible with UART 16550 version and COM4 ports are routed to XP6 and XP7 connectors respectively IDC10 2 54mm 5104338 1 AMP For connection to COM3 and COM4 ports 500005 01 cable 1 pcs included into the delivery checklist is used For proprietary manufactured cable it is recommended to use 10 pin socket for the ribbon cable with a pitch of 1 27 mm 1 215919 0 AMP Fig 1 9 Numbering of contacts of XP6 and XP7 connectors 1 10 11 PS 2 keyboard and mouse pointing device XP8 Interface for the connection of PS 2 keyboard and mouse is routed to the 6 pin XP8 connector PS 2 keyboard or mouse can be connected via ACS00043 adapter cable For proprietary manufacturing of the adapter cable it is recommended to use PHR 6 JST socket with contacts SPH 002T P0 5S JST For connection of both keyboard and mouse it is required to additionally use a Standard Y cable Fig 1 10 Numbering of XP8 connector conta
22. 485 multiuser networks Compact Flash type 1 2 2 5 and 3 5 HDD PATA interface via KIB98201 m USB devices types 1 1 and 2 0 Full speed High speed including devices of USB Mass Storage Device type Floppy Disc Drive only USB port m Keyboard mouse controller ports PS 2 USB LCD panels digital RGB via KIB98102 or via XP2 connector m VGA displays and TFT panels analog RGB m Audio devices via KIB98102 PC compatible printer ports USB LPT m Other modules in MicroPC ISA 8 bit and PC 104 ISA 8 16 bit formats graphics cards additional memory cards digital analog modules communication special purpose modules etc m Isolated reset interrupt signal 1 4 Module power supply Module s electric power supply should correspond to the requirements specified in the table 1 1 Module is supplied with power via MicroPC and PC 104 connectors In addition for transferring power supply voltage from an external source there is additional XP20 power supply connector 4 pin connector Molex 22 27 2041 As a mating part it is recommended to use 22 01 2047 Molex connector 1 pcs contacts 08 52 0101 Molex 4 pcs The kit containing socket and contacts for the connection of power supply via additional connector ACS00039 Power supply source should provide starting current specified in the table below depending on module s version It is also permissible to use a power supply source with a cur
23. 5 7 Screen Primary IDE Master menu BIOS SETUP UTILITY Gecko Wo o o NN o S UU S o o UN o o o o o S o o o o o o o o Primary IDE Slave Select the type WO TRATARA UN NU UN NU UN NUS NN UN S UR NN S UN I OF device connected Device Hard Disk to the system Vendor Fastwel Embedded AT Flash Disk Size OMB LBA Mode Supported Block Mode Not Supported PIO Mode 4 Async DMA MultiWord DMA 2 Ultra DMA Ultra DMA 2 S M A R T Supported oW oh Select Screen LBA Large Mode Auto select Item E Block Multi Sector Transfer Auto Change Option E PIO Mode Auto General Help DMA Mode Auto NES Reset WDT S M A R T Auto 32Bit Data Transfer Enabled ESC Exit E vOZ 61 C Copyright 1985 2006 American Megatrends Inc Table 5 5 Description of Primary IDE Master menu Menu item Assignment Type Type of device connected to this IDE channel Not Installed Prohibition for searching for the connected devices Auto Automatic detection of connected device type CD DVD Determine the connected device as CD DVD drive ARMD Determine the connected device as removable data storage device ZIP LS 120 LBA Large Mode Addressing type of device connected to this IDE channel Auto Autom
24. 6 kbaud 8 bit without parity check 1 stop bit Flow Control Control of symbol stream for console port None No Hardware CTS RTS hardware control Software XON XOFF software control Redirection After BIOS Console I O operation mode after the POST procedure of by BIOS POST Disabled Disable the console after the POST procedure by BIOS Boot Loader Console I O is active during the POST procedure by BIOS and during OS booting Always Console I O operates constantly Certain OS could not work case this option is selected Terminal Type ANSI ANSI standard VT100 VT100 standard VT UTF8 VT UTF8 standard VT UTF8 Combo Key Support of VT UTF8 symbols for ANSI ME100 terminals Suppor Disabled Support is deactivated Enabled Support is allowed Sredir Memory Display Delay of module booting during displaying the screen with information on the Delay installed RAM to console PC No Delay Without delay Delay 1 Sec Set the delay for 1 sec Delay 2 Sec Set the delay for 2 sec Delay 4 Sec Set the delay for 4 sec Terminal Display Mode Mode of data transmission to console PC Normal Mode Recorder Mode Only text October 2015 5 10 Basic input output system User Manual 152 105 Menu item Assignment Terminal Size Number of transferred symbols and lines 80x24 80 symbols 24 lines 80x25 80 symbols 25 lines Manufac
25. 787 8443 1 877 RURUGGED E mail info fastwel com Web http www fastwel com October 2015 User Manual 152 Specification Contents COMES A 3 LiStoF tables ld dl to dit ld d 5 8 MIT 6 ME 7 OWNEFSHIP Te 8L SEP ia 7 8 Safety requirements A AAA A 9 General Board Operation Rules 2 recte Dre o e A a 10 The Man ufacturer s Guarantees cerillas a ele Mi needa 10 SECTION iim AA AE AAA A 12 1 BRIEF DESCRIPTION 13 Tidy DEVICES PUIPOS O a AA AAA lod Soins see s AAA AA AAA 13 t2 intra E A A 13 1 3 Connection to module iii ol evi A A A et eve dt REO EET ae 17 1 4 Module power supply edi A A ERN ERES 17 1 5 Block diariamente Pag cade 18 1 6 Location of components and external view of 152 19 TC A ne eroe rhe e ee exe ku eain een eae en aee eee eei de PO RU ERU RU EY D POE ERE E EC KT deg 21 1 8 Delivery checklista ni nenei ia
26. Environmental conditions Operating temperature range 40 85 C Storade temberat re Modules storage conditions 1 in accordance with GOST 15150 69 Humidity up to 95 at 25 without condensation Table 2 8 Mechanical characteristics Mechanical characteristics Vibration resistance 5 g acceleration amplitude Resistance to single shocks 100 g peak acceleration Resistance to multiple shocks 50 g peak acceleration Weight no more than 1409 MTBF no less than 72 160 000 hours 12 MTBF values are calculated using the Telcordia Issue 1 computation model Method Case 3 calculation technique for continuous operation in case of the ground based placement under the conditions corresponding to the climatic category Moderately Cold Climate 4 according to the GOST 15150 69 at ambient temperature of 30 October 2015 2 3 User Manual 152 Technical information 2 2 Allocation of hardware interrupts Table 2 9 Addresses of hardware interrupts MES Default source Alternative sources Internal WDT NMI SYSTEM EVENT External ISA devices IOCHCK Rewwdmmemime ma Rap Reserved eascadng RS 422 485 RS 232 RS 422 485 COMB RS 232 USB controller IR LPT port External ISA devices IRQ5 External ISA devices EN USB controller Internal WDT Internal WDT External ISA devices I
27. LPT_BUSY Control LPT Control LPT up Ae 07 7 2 Eme qe spp ee AO e cup see t IDE D 8 Data IDE 42 IDE Di6 Data IDE IDE_D 9 Data IDE 4 IDE D 5 Data IDE IDE_D 10 Data IDE 4 4 Data IDE IDE_D 3 Data IDE 50 iE n2 Data IDE IDE_D 2 Data IDE 52 IDE_D 13 Data IDE IDE_D 1 Data IDE 5 IDE D 14 Data IDE IDE_D 0 Data IDE 56 IDE_D 15 Data IDE IDE_IORDY Control IDE 64 IDE_DACK Control IDE IDE_INT Control IDE 66 Control IDE IDE BA 0 Control IDE 68 Control IDE 6 IDE_CSO Control IDE IDE_CS1 Control IDE 5VEXTD Power supply 77 3 5VEXTD Power supply October 2015 2 24 User Manual 152 Technical information 2 9 11 Table 2 43 2 9 12 2 9 13 Table of XP17 XP18 connector contacts remote reset interrupt 17 2B PH KL JST pitch of 2 mm 18 2B PH KL JST pitch of 2 mm Table of XP20 connector contacts module power supply Table 2 44 Purpose of 20 connector contacts module power supply XP20 22 27 2041 pitch of 2 54 mm Molex Table of XP21 connector contacts USB2 3 ports Table 2 45 XP21 IDC10 pitch of 2 mm 98424 G52 10LF FCI Configuration Contact Purpose of XP21 connector contacts USB2 3 ports Configuration EA
28. MicroPC 8 16 bit ISA PC 104 RST IRQ Port October 2015 FRAM 1 NV SRAM 64Kbit 128Kbyte lt RS 232 Driver RS 232 Driver Opto Opto Isolation Isolation RS 422 485 Driver 1 0V 1 2V 1 8V 2 5V 3 3V RS 422 485 Driver Overvoltage Overcurrent Reverse Polarity Protection Circuitry 1 6 User Manual 152 Brief description 1 6 Location of components and external view of CPC152 Fig 1 2 External view of CPC152 ET E October 2015 1 7 User Manual 152 Brief description Fig 1 3 Location of primary components of CPC152 leet rz O gu o a usum mu rum ads LE ET m TN TER Be TuE a a 3 m mam EE SE son Purposes of module s connectors are described in section 1 9 Integral parts of CPC152 and in section 2 9 Tables of module s connectors contacts Purpose of X1 X40 switches is given in section 3 1 Setting module s switches October 2015 1 8 User Manual 152 Brief description 1 7 Versions 152 is supplied as one version CPC152 01 CPU Module 152 MicroPC Vortex86DX 600 MHz 256 MW DDR2 SDRAM GPU SM718 16 MB DDR 2 GB FFD NV SRAM 128 KB Compact Flash socket 4 x USB 2 0 Ethernet 10 100 Mbps 2 x RS 232 2 x RS 422 485 isolated with lightning protect
29. Power_Fail event from power supply supervisor reduction of input power supply lower than the level of 4 65V participates in generation of SYSTEM_EVENT WDT2 Only event of a watchdog timer integrated into the power supply supervisor participates generation SYSTEM_EVENT EXT_INT amp Generation of SYSTEM EVENT is carried out with PWR_FAIL participation of EXT INT PWR FAIL events via or ALL Generation of SYSTEM EVENT is carried out with participation of EXT FAIL and WDT2 events via or 5 15 Basic input output system User Manual 152 105 5 4 Boot Boot modes This tab contains items responsible for module booting modes as well as for choosing the IDE device which will be used for booting operating system Screen of Boot menu is shown in the Figure 5 13 description of the items is given in the Table 5 10 Fig 5 13 Screen of Boot menu SETUP UTILITY Main Advanced PCIPnP Security Chipset ERRERERARE REE EEE RAR ERA RARE ARE RE ERE EE RARE RRA ARE EE REE ERA AAA REE AENA AAA RA Boot Settings Configure Settings oO CR CR A A AAA AAA AAA AAA AAA AA AAA AR AAA AAA AA AA AAA AeA eA during System Boot a 1st Boot Device HDD PS SanDisk SDC a ES Select Screen E x RS Select Item Z EOCEE CO CO SuN screen General Help a Reset WDT
30. SEVERE OPERATING CONDITIONS IT IS REQUIRED TO TAKE FURTHER MEASURES FOR FIXING THE COMPACT FLASH INTO THE CONNECTOR October 2015 1 13 User Manual 152 Brief description Table 1 2 Table of available combinations of IDE devices with MIC230xx Capacity of LO N co O c N CompactFlash gt S m Sa 9m Sm Sm Sm 2 oz 2 e e 5 5 5 A A eO NO NO NO NS Na ON og 5 ow OF OH OG Configuration E NAND master CF slave de 4E dh dh 4 dp de MAND SANE 4 E E E E master Only m 4 CF master Only CF L slave m T T T T TE T HDD master E E E slave HDD slave z m E E h CF master CD DVD slave B E E T CF master CD DVD master slave T F a a F 1 10 8 IDE port 16 Two HDDs with IDE interface can be connected to the module via KIB98201 interface board connector XP16 of CPC152 and use the Primary channel for operation in Master Slave modes In case of using two external devices the Compact Flash should be preliminary disconnected from XP1 connector and the integrated FLASH drive is disconnected using the respective jumpers see section Setting module s switches IDE interface supports U
31. connected to I2C bus of the CPU Measurement area is not rated the standard error is defined by characteristics stated by sensors manufacturer In order to use the sensors as measuring sensors it is required to perform their calibration testing system of calibration factors storage maybe arranged on the basis of FRAM nonvolatile memory which main principles of operation are specified in Section 4 6 Interface BIOS SOC Vortex86DX for read write in FRAM 1 10 22 Audio port Audio port in CPC152 module is implemented on the basis of integrated circuit CMI8738MX Cmedia including a sound controller and 16 bit audio codec Codec is compatible with SBPRO version the set of audio ports includes LINE IN Stereo LINE OUT STEREO and MIC MONO Audio ports are routed to the XP15 connector Connection of devices is possible via KIB98102 interface board on which these interfaces are routed to the standard Audio Jack type connectors October 2015 1 24 User Manual 152 Brief description Attention For proper operation of Audio ports it is required to remove the jumpers XP1 1 2 XP2 1 2 and install jumpers XP3 1 2 XP4 2 3 on interface board KIB98102 Use of KIB98101 is not recommended since KIB98101 does not provide compatibility with a number of TFT panels and does not ensure an accurate playback record of sound 1 10 23 Video port Analog RGB and TFT Video subsystem of CPC152 is implemented on the basis o
32. contacts KIB98102 5 62 Purpose of XP16 connector contacts KIB98201 5 63 Purpose of XP17 XP18 connector contacts ports of isolated remote reset 64 Purpose of XP20 connector contacts module power 64 Purpose of XP21 connector contacts USB2 3 64 Purpose of XS4 connector contacts 104 ISA 8 16 bit lines A 65 Purpose of XS4 connector contacts PC 104 ISA 8 16 bit lines C 66 Purpose of XS6 connector contacts MicroPC ISA 8 67 Purpose of switched for module 70 Switching to BIOS booting from the main standby 70 Purpose of IDE integrated devices Master or 71 Selection of power supply voltage for LCD panel connection KIB98102 15 71 Switching of Power Fail signals watchdog timer actuation remote access to the line of CPU hardware 71 Binding and matching of COM1 port 5 422 485 nen 72 Selection of COM1 port
33. eee rese trt ve e ea ee eie eee a Ro Re 28 Output stages of RS 422 485 ports of 152 30 Connection of modules via RS 485 31 Connection of modules via RS 422 emen nen ren hee ne ree nennen rne 31 Numbering of contacts of XP3 XP4 22 9 999 se rens 31 Numbering of contacts of XP6 and XP7 32 Numiberirig of XP8 connector cohltacts atole oe ue TE EUR EO SEEN 32 Numbering of XP21 connector s CONTACTS word bet erede s arce ge de late 33 Numbering of XP5 connectors Contacts i deo e Tor Ede aio Lega 33 Numbering of XP22 connector 34 Fig Numbering of XP17 XP18 connectors nee rennen rne 35 Fig Numbering of contacts of XS4 connector a top view of the module b bottom view of the module with personal organizer INSTA OMS r 35 Fig 1 16 External view of XP 15 connector icai iid eere pee Rete ebat cte bee tete e epe OE pane ins 38 Fig 1 17 External view of XPT CONNECCION so caede dette ee e TE Tee b endet ee Pocket esee sek Onda age pese genes
34. established by the accompanying documents The Manufacturer hereby guarantees that the products supply thereby are free from defects in workmanship and materials provided operation and maintenance norms were observed during the currently established guarantee period The Manufacturer s obligation under this guarantee is to repair or replace free of charge any defective electronic component being a part of a returned product Products that broke down through the Manufacturer s fault during the guarantee period will be repaired free of charge Otherwise the Consumer will be invoiced as per the current labor remuneration rates and expendable materials cost Liability Limitation Right The Manufacturer shall not be liable for the damage inflicted to the Consumer s property because of the product breakdown in the process of its utilization Guarantee Period The guarantee period for the products made by the manufacturer company is 36 months since the sale date unless otherwise provided by the supply contract The guarantee period for the products made to special order is 60 months since the sale date unless otherwise provided by the supply contract The warranty set forth above does not extend to and shall not apply to October 2015 10 User Manual 152 Specification 1 Products including software which have been repaired or altered by other than Fastwel personnel unless Buyer has properly altered or repaired the products in
35. for accessing via 23h data register Table 2 18 Data register of WDTO port Bits Address Action 7 6 5 4 3 2 1 0 Writing WRDATA_REG_WDTO 23h Reading WRDATA_REG_WDTO WRDATA_REG_WDTO Contains data for writing to the internal register of WDTO timer which address is specified in the ADDR_REG_WDTO field of 22h index register address WRDATA_REG_WDTO Contains data when reading from the internal register of WDTO timer which address is specified in the ADDR_REG_WDTO field of 22h index register address October 2015 2 10 User Manual 152 Technical information Table 2 19 Control register of WDTO timer Address Bits in 23h data register in 22h Action address 7 6 5 4 3 2 1 0 register 37h Writing WDTO_WE 40h Reading WDTO_WE WDTO_WE Permission of WDTO watchdog timer operation 1 permitted default value 0 prohibited Table 2 20 Register of WDTO event selection Address Bits in 23h data register in 22h Action 7 6 5 4 3 2 1 0 register 38h Writing WDTO_SSEL DOh Reading WDTO SSEL Selection of the event upon completion of WDTO timer count 0000 reserved 0001 IRQ 3 0010 IRQ A 0011 IRQ 5 0100 IRQ 6 0101 IRQ 7 0110 IRQ 9 0111 IRQ 10 1000 IRQ 11 1001 IRQ 12 1010 IRQ 14 1011
36. installation of extension boards During installation repairs and maintenance of the device there is a serious risk of electric shock this is why you should always unplug the power cord from the socket during carrying out of works This also applies to other feeder cables BOARD HANDLING INSTRUCTIONS Device sensitive to static electricity Electronic boards and their components are sensible to static electricity This is why you should give special attention to handling with these devices in order to ensure their integrity and working efficiency Do not leave the board without protective packaging when it is not operated When applicable always operate the board at the workplace equipped with protection against static electricity If it is impossible the user should remove a static discharge before touching the device by hand or using tools The best way to do it is touch a metal part of system enclosure Crucially the safety precautions should be observed during operations related to the replacement of jumpers etc If the device is equipped with batteries for power supply of memory or real time clock do not put the board onto current conducting surfaces such as antistatic mats or sponges They could cause short circuit and lead to damages of battery and board conducting circuits October 2015 9 User Manual 152 Specification General Board Operation Rules To preserve the manufacturer s guarantee the
37. most efficient data transmission BIOS will automatically determine the most relevant DMA mode SWDMAQ Single Word DMA modes SWDMA1 SWDMA2 MWDMAQ Multi Word DMA modes MWDMA1 MWDMA2 S M A R T Smart Monitoring Analysis and Reporting Technology Auto BIOS will automatically determine and support the connected device It is recommended to use this option when it is impossible to determine and support of the connected drive Enabled This option enables BIOS to use the SMART function during operation with the connected drives Disabled This option prohibits BIOS to use the SMART function during operation with the connected drives 32 bit Data Transfer 32 bit Data Transfer Mode Enabled This option enables to use 32 bit data transmission for the device connected Disabled This option prohibits to use the 32 bit data transmission for the device connected Available volume of integrated drive 1 8 GB incorrect determination of the volume of integrated drive is attributed to peculiarities of AMI BIOS operation October 2015 5 8 Basic input output system User Manual 152 105 5 2 3 Remote Access Configuration Screen of Remote Access Configuration menu is shown in the Figure 5 8 description of items is given in the table 5 6 Fig 5 8 Screen of Remote Access Configuration menu BIOS SETUP UTILITY RRA Configure Remote Access type and parameter
38. order to call the FRAM reading writing service INT 17H interrupt is used with a parameter in the AH OADh register Values of other parameters transferred in CPU registers are described below In case of a wrong number of AL function AX 1 OFFFFh is returned 4 6 1 Reading user data from FRAM Input AL 0Ch BX address of data start in the user area of FRAM CX number of readable bytes DS DX indicator to the reading buffer Output AX result code 0 no error 2 OFFFEh parameter error wrong address BX maximum permissible address size of user area 1 CX number of actual bytes read This function reads the specified bytes of FRAM user area into the buffer of calling program 4 6 2 Writing user data from FRAM Input AL 0Dh BX address of data start in the user area of FRAM CX number of bytes written DS DX indicator to the data written Output AX result code 0 no error 2 OFFFEh parameter error wrong address BX maximum permissible address size of user area 1 CX number of actual bytes written This function writes data to FRAM user area October 2015 4 3 User Manual 152 Intended use of CPC152 4 7 Service utility programs This chapter describes a set of drivers for operation with I O devices connected to CPC152 module 4 7 1 XFLASH EXE utility upgrade of BIOS backup copy The xflash exe program is designed for modifying BIOS with writing into the int
39. provided for reference only with no warranty of its suitability for any specific purpose This information has been thoroughly checked and is believed to be entirely reliable and consistent with the product that it describes However Fastwel accepts no responsibility for inaccuracies omissions or their consequences as well as liability arising from the use or application of any product or example described in this document Fastwel Co Ltd reserves the right to change modify and improve this document or the products described in it at Fastwel s discretion without further notice Software described in this document is provided an as is basis without warranty Fastwel assumes no liability for consequential or incidental damages originated by the use of this software This document contains information which is property of Fastwel Co Ltd It is not allowed to reproduce it or transmit by any means to translate the document or to convert it to any electronic form in full or in parts without antecedent written approval of Fastwel Co Ltd or one of its officially authorized agents Fastwel and Fastwel logo are trademarks owned by Fastwel Co Ltd Moscow Russian Federation Ethernet is a registered trademark of Xerox Corporation IEEE is a registered trademark of the Institute of Electrical and Electronics Engineers Inc Intel is a trademark of Intel Corporation Geode is trademark of AMD Microsoft is a trademark of the Microsoft corporation
40. set the Base Address of module s internal control registers or address segment in I O area where these registers will be available for the system If the address bits of ISA_SA bus 9 6 match with the BA bits 9 6 internal registers will be addressed in read write cycles in the area BA value after power on or hardware reset by default 0280h For example in order to set BA 0300h it is required to write 30h into the port Bit 5 and 4 of the base address BA always are written as equal to 0 2 8 2 Control LED condition register Enables a program control of two LED oscillators as well as read their current condition Address was YAA cor LEDG Green LED control Write 1 actuation of LED indicator write 0 deactivation LEDR Red LED control Write 1 actuation of LED indicator write 0 deactivation SLEDG Green LED condition 1 activated 0 deactivated by default SLEDR Red LED condition 1 activated 0 deactivated by default 2 8 3 Interrupts condition register of ISA bus controller Enables prohibits to use external signals when generating an interrupt of NMI CPU SYSTEM EVENT signal during writing to the port The port also enables to determine a hardware source of NMI and SYSTEM EVENT IRQx_ST Event flag on IRQx interrupt line of ISA bus controller of CPU 1 there was an interrupt 0 there was no interrupt IRQx
41. when handling this device and and at the time of inspections in order to guarantee integrity and working capacity of the device See also Section devoted to the directions for handling with the board and unpacking specified below Attention Hot surface This sign and caption warn us of a danger related to touching hot surfaces containing within the device Attention This sign is designed to make you consider those aspects of the User Manual which incomplete understanding or failure to follow could endanger your health or result in damages of the equipment Note This sign is used to mark the parts of the text which should be read thoroughly October 2015 User Manual 152 Specification Safety requirements This product is designed and tested for the purpose of ensuring compliance with the electric safety requirements lts design guarantees long term failsafe operation Life cycle of the device can be sufficiently reduced due to improper handling during unpacking and installation Therefore for your own safety and in order to ensure the proper operation of the device you should observe the below recommendations High voltage safe handling rules Attention All works with this device should be performed only by employees which have sufficient skills for these types of works Attention high voltage Before installing the board into the system make sure that the mains supply is off This also applies to
42. 0 interrupt line assignment IRQ11 IRQ11 interrupt line assignment Serial Port Baud Rate This option sets the speed of data exchange for the relevant serial port for each port individually 2400 BPS 4800 BPS 9600 BPS 19200 BPS 38400 BPS 57600 BPS 115200 BPS SB Parallel Port Address This option sets the address for LPT1 parallel port Disabled Port operation is prohibited 378 378h I O base address assignment 278 278h I O base address assignment Parallel Port Mode This option sets the operation mode for LPT1 parallel port BPP Operation mode Bi directional Parallel Port BPP Data receive transmit mode for parallel port EPP 1 9 AND SPP Operation mode compatible with EPP 1 9 and SPP modes ECP Operation mode Enhanced Capabilities Port ECP ECP uses DMA protocol for reaching the speed of data transmission up to 2 5 Mb sec ECP ensures symmetrical bidirectional data communication ECP AND EPP 1 9 Operation mode compatible with ECP and EPP 1 9 modes SPP Operation mode Standard Parallel Port SPP EPP 1 7 AND SPP Operation mode compatible with EPP 1 7 and SPP modes Operation mode Enhanced Parallel Port EPP uses parallel port existing signals for asymmetrical bidirectional data communication from the main device ECP AND EPP 1 7 Operation mode compatible with ECP and EPP 1 7 mo
43. 16bits I O wait state Duration of I O wait state cycle at 16 bit memory reference on ISA bus 1 clock 2 clock 3 clock 4 clock 5 clock 6 clock 7 clock 8 clock ISA 8bits I O wait state Duration of l O wait state cycle at 8 bit memory reference on ISA bus 1 clock 2 clock 3 clock 4 clock 5 clock 6 clock 7 clock 8 clock ISA 16bits Memory wait Duration of Memory wait state cycle at 16 bit memory reference on ISA bus state 0 clock 1 clock 2 clock 3 clock 4 clock 5 clock 6 clock 7 clock October 2015 5 23 Basic input output system User Manual 152 105 ISA 8bits Memory Duration of Memory wait state cycle at 8 bit memory reference on ISA bus state 1 clock 2 clock 3 clock 4 clock 5 clock 6 clock 7 clock 8 clock 5 6 2 2 Serial Parallel Port Configuration Screen of Serial Parallel Port Configuration menu is shown in the Figure 5 20 description of menu items is given in the Table 5 17 Fig 5 20 Screen of Serial Parallel Port Configuration menu BIOS SETUP UTILITY Loc a a a a a a a a a a e e a a aa a a a a a a a e a o a oo 19121 Internal UART Serial Port 1 IRO4 Serial Port Serial Port Baud Rate 115200 BPS Terminator 120 Ohm Enabled SB Serial Port 2 2 8 Serial Port IRQ 2 IRO3 Serial Port Baud Rate 115200 B
44. 5 V 0 5A Power supply 2 5 V 0 5A Power supply 3 foma Power supply GND D wm Power supply Purpose of XP17 XP18 connector contacts ports of isolated remote reset interrupt October 2015 2 25 User Manual 152 Technical information 2 9 14 Table of XS4 connector contacts PC 104 ISA 8 16 bit Table 2 46 Purpose of XS4 connector contacts PC 104 ISA 8 16 bit lines A B XS4 Connector of PC 104 bus extension 2x32 2x20 contacts lines A B Contact Configuration Contact Configuration 1 Input B1 GND Power supply A2 SD7 Input Output B Output A3 SD6 Input Output B3 5V Input A4 505 Input Output IRQ9 Input A5 504 Input Output E A 503 Input Output Input A7 502 Input Output Power supply A8 SD Input Output Input 9 SDO Input Output Power supply Input GN Power supply AE Output Output Output Output Output Output Output Output Output Output Output Input Output Output Output Input Output Output Output Output Output Input SA9 Output IRQ6 Input SA8 Output Input SA7 Output Input SA6 Output Input SA5 Output Output SA4 Output Output SA3 Output Output 5 2 Output 5V Power supply SA1 Output OSC Output SAO Output GND Power supply GND Power supply GND Power supply October 2015 2 26 User Manual 152 Technical information Table 2 47 Purpose of XS4 connector contacts PC 104 ISA 8 16 bit lines C D XS4 Connector of PC 104 bus extension 2x32
45. A bus 0 deactivated outputs in Z condition 1 buffer elements of ISA bus are activated by default during power on or reset If buffer elements are deactivated no devices on external ISA bus will be available RSVD Reserved October 2015 2 17 User Manual 152 Technical information 2 8 6 Control register of page access to NV SRAM 128 KB Enables a program control of NV SRAM active page number INCAS AA Address A e EUA E O eee Lee aac os BNK 2 0 SRAM active page number Page size 16 KB Base window address is selected in BIOS Setup settings by default D8000h 2 8 7 Code register of XCS05 version Code of the version number of XCS05 matrix diagram is available over reading via byte port with BA 0Eh address AA AE AAA AAA Ver_05 numeric code of the version number of 505 matrix diagram Rev 05 numeric code of the revision number of XCS05 matrix diagram October 2015 2 18 User Manual 152 Technical information 2 9 Table of module connector contacts 2 9 1 Table of XP1 connector contacts Compact Flash Table 2 32 Purpose of XP1 connector contacts Compact Flash XP2 N7E50 M516RB 50 3M Contact Function GND 5 7 D E i E x n wm D3 D5 D7 9 7 6 4 2 0 D1 x ow IORDY REGA
46. C Copyright 1985 2006 American Megatrends Inc Table 5 3 Description of CPU Configuration menu Menu item Assignment L1 Cache Enabled Operation of L1 Cache memory is permitted Disabled Operation of L1 Cache memory is prohibited L2 Cache Enabled Operation of 12 Cache memory is permitted Disabled Operation of L2 Cache memory is prohibited October 2015 5 5 Basic input output system User Manual 152 105 5 2 2 IDE Configuration Screen of IDE Configuration menu is shown in figure 5 6 description of items is given in the table 5 4 Fig 5 6 Screen of IDE Configuration menu BIOS SETUP UTILITY IDE Configuration DISABLED disables the oW Won A integrated IDE E Controller M OnBoard IDE Operate Mode Legacy Mode PRIMARY enables only the Primary IDE m Primary IDE Master Not Detected Controller Primary IDE Slave Hard Disk 9 Hard Disk Write Protect Disabled IDE Detect Time Out Sec E35 ATA PI SOPin Cable Detection Host amp Device ES Select Screen E Select Item E E L oq Change Option m E Son General Help E Reset E EE Save and Exit SEES Exit v02 61 C Copyright 1985 2006 American Megatrends Inc Table 5 4 Description of IDE Configuration menu IDE controller configuration Menu item Assignment Onboa
47. DMA 100 mode cable length during connection should not exceed 0 1 m 2 5 HDD devices are connected to J2 of KIB98201 interface board not included into the delivery checklist to be purchased separately using the 500010 cable not included into the delivery checklist to be purchased separately Other HDD types 3 5 and CD DVD write and read devices having 40 pin connector with a pitch of 2 5 mm are connected to the module to J1 of KIB98201 interface board using the standard IDE cable Using other types of cables it is recommended for connection to use cables with connectors of 2040 3442 Leotronics or IDC2 44 types socket 44 pins for the ribbon with a pitch of 1 mm Attention When connecting Compact Flash modules to IDE port using IDE Compact Flash adapters it is permissible to use only Compact Flash modules supporting UDMA 5 and higher modes e g MIC230 modules with a volume from 2 GB and more Using other Compact Flash cards could result in damage of CPC152 module damage of integrated FLASH drive and would not be October 2015 1 14 User Manual 152 Brief description considered as warranty case caused by various voltage levels on signal IDE lines for various Compact Flash modules For Compact Flash modules installed into XP1 connector located on CPC152 module there are no such limitations Attention When connecting such external devices as HDDs or CD DVD reading device to IDE port wit
48. Display DEL button for entering the setup program Disabled Output of message is prohibited Enabled Output of message is permitted Interrupt 19 Capture Interception of INT19 program interrupt Disabled BIOS prohibits additional controllers to intercept INT19 interrupt Enabled BIOS permits additional controllers to intercept INT19 interrupt Support TFT Console Showing information on TFT display in text mode after the OS control transfer Disabled Showing information on TFT display in text mode of OS control transfer is prohibited Enabled Showing information on TFT display in text mode of OS control transfer is permitted October 2015 5 18 Basic input output system User Manual 152 105 5 5 Security Screen of Security menu is shown in the Figure 5 15 description of menu items is given in the Table 5 12 Fig 5 15 Screen of Security menu BIOS SETUP UTILITY Main Advanced PCIPnP Boot 1 Chipset Wok ok ko ok hok hok ok ok hok ook hok ok ko Rok ok hok hok ko Rok ok ok ok ok ok ok ok hok hok hok ok Kok k ok Kok ok ok Kok Kock hok hok ok ok ok ok ok o o n n Security Settings Install Change the LEE x dcc dd d dd ddddddddddddddddddddddddddcdko k password Supervisor Password Not Installed User Password Not Installed Change User Password Boot Sector Virus Protection Disabled s o wo
49. IRQ 15 1100 NMI 1101 module restart default value 1110 reserved 1111 reserved Table 2 21 CNTO register of timer value Address Bits in 23h data register in 22h address Action register 7 6 5 4 3 2 1 0 39h Writing WDTO CNTO 00h Reading WDTO CNTO October 2015 2 11 User Manual 152 Technical information WDTO_CNTO Bits 7 0 of counter 23 0 of WDTO timer The counter has a resolution of 30 5 us Table 2 22 CNT1 register of WDTO timer value Address Bits in 23h data register in 22h Action address 7 6 5 4 3 2 1 0 register 3Ah Writing WDTO_CNT1 00h Reading WDTO_CNT1 WDTO_CNT1 Bits 15 8 of counter 23 0 of timer The counter has a resolution of 30 5 us Table 2 23 2 register of WDTO timer value Address Bits in 23h data register in 22h Action address 7 6 5 4 3 2 1 0 register 3Bh Writing WDTO_CNT2 20h Reading WDTO_CNT2 WDTO Bits 23 16 of WDTO_CNT counter 23 0 of timer The counter has a resolution of 30 5 us Table 2 24 Register of WDTO timer condition Address Bits in 23h data register in 22h Action address 7 6 5 4 3 2 1 0 register 3Ch Writing WDTO_WDTF WDTO_WDTRL 00h Reading WDTO_WDTF
50. PDIAG E VCC 3 3V 13 From this point on symbol the name of the signal active level of log 0 October 2015 2 19 User Manual 152 Technical information 2 9 2 Table of XP2 connector contacts Analog RGB port Table 2 33 Purpose of XP2 connector contacts IDE port XP2 98424 G52 10LF FCI Contact Function DDC_SCL 2 9 3 Table of XP3 XP4 connectors contacts COM1 COM2 RS 422 485 Table 2 34 Purpose of XP3 connector contacts COM1 RS 422 485 XP3 733 335 WAGO 5 contacts pitch of 2 5 mm me Table 2 35 Purpose of XP4 connector contacts 2 RS 422 485 XP4 733 335 WAGO 5 contacts pitch of 2 5 mm po 14 Ground isolated from the system isolation from the system 500 V 5 Ground isolated from the system isolation from the system 500 V October 2015 2 20 User Manual 152 Technical information 2 9 4 Table of XP5 connector contacts LPT port Table 2 36 Purpose of XP5 connector contacts LPT port XP5 IDC 26 2 54 mm 5104338 6 AMP Function Contact e eo m oo n oo n foo 5V EXTP 2 9 5 Table of XP6 XP7 connectors contacts 4 RS 232 Table 2 37 Purpose of XP6 XP7 connector contacts COM3 COMA XP6 XP7 IDC 10 pitch of 2 54 mm 5104338 1 AMP eme 8 mw 2 9 6 Ta
51. PS Terminator 120 Ohm Enabled SB Serial Port 3 3F8 Serial Port 3 IRO4 Serial Port Baud Rate 115200 BPS SB Serial Port 4 2F8 Serial Port 4 TIROS Select Screen Serial Port Baud Rate 115200 BPS tt Select Item SB Parallel Port Address 278 t Change Option Parallel Port Mode EPP 1 7 AND SPP Fi General Help Parallel Port TIROS F6 Reset WDT F10 Save and Exit ESC Exit v02 61 C Copyright 1985 2006 American Megatrends Inc Table 5 17 Description of Serial Parallel Port Configuration menu Menu item Assignment SB Serial Port 1 This option sets the address for the relevant serial port SB Serial Port 2 for each port individually SB Serial Port 3 Disabled Port operation is prohibited SB Serial Port 4 3E8 3E8h I O base address assignment 2E8 2E8h I O base address assignment SF8 3F8h I O base address assignment 2F8 2F8h I O base address assignment Serial Port IRQ 1 This option assigns the interrupt line for the relevant serial port for each port Serial Port IRQ 2 individually Serial Port IRQ 3 IRQ3 IRQ3 interrupt line assignment Serial Port IRQ 4 IRQ4 IRQ4 interrupt line assignment IRQ9 IRQ interrupt line assignment October 2015 5 24 User Manual Basic input output system 152 BIOS Menu item Assignment IRQ10 IRQ1
52. Program control of LEDs BA 02h BA 03h BA 04h Port of interrupts control over NMI IRQ line of CPU BA 05h con IRQ interrupt External Power Fail SYSTEM EVENT ISASIOCHK Port of IRQ7 11 12 15 interrupts control of CPU sets BA 06h Port Oh 27 1 1215 the source over interrupt lines of CPU BA 07h Port R trol SYSTEM EVENT Activation Deactivation of ISA bus buffers BA 0Ch BA 0Dh BA 0Eh Number of 52227 Codes from 00 to 255 see register description Port of base address BA control October 2015 2 7 User Manual 152 Technical information 2 5 Memory address space Table 2 13 Memory devices addresses ss we es Non volatile RAM 128Kbyte page access 16 KB E0000 EFFFFh F0000 FFFFFh E0000 EFFFFh System BIOS Extended System BIOS area 64 KB 16 KB x 4 F0000 FFFFFh System BIOS System BIOS area 64 KB ess eme High BIOS Area 2 Mbytes mapped to PCI Number of current page of non volatile RAM is software selectable via I O port BA 0x0C Volume of installed memory DDR2 SDRAM 256 Mbyte 2 6 Use of GPIO ports of CPU Vortex86DX microchip is equipped with 4x I O GPIO General Purpose Input Output ports available for the user via internal microchip registers Each port represents 8x I O lines each of these lines can be set as an input or output by programming the registers of the relevant po
53. RQ6 IRQ7 IRQ9 IRQ10 IRQ11 IRQ12 IRQ14 IRQ15 Redundancy of IRQ interrupt for internal Legacy devices SNK Vortex86DX Available Permit the use of this interrupt for external PCI PnP devices Reserved Prohibit the use of this interrupt for external PCI PnP devices reserve for Legacy device From ISA_IRQx Use interrupt redirection E g option From ISA_IRQ3 installed for IRQ10 interrupt means redirection of IRQ3 interrupt line of ISA bus to the IRQ10 line of ISA bus controller of Vortex86DX CPU SYSTEM_EVENT Use of the interrupt line for indication of SYSTEM_EVENT see Section 2 8 4 Register of control state of system interrupts DMA Channel 0 DMA Channel 1 DMA Channel 3 DMA Channel 5 DMA Channel 6 DMA Channel 7 Redundancy of DMA channel for internal Legacy devices SnK Vortex86DX Available Permit the use of this DMA channel to external PCI PnP devices Reserved Prohibit the use of this DMA channel to external PCI PnP devices reserve for Legacy devices Reserved Memory Size BIOS reservation of memory for devices based on ISA bus Disabled Prohibit reservation of memory for ISA devices on ISA bus by BIOS Recommended value 16k 82k 64k Reserve the specified volume of memory for devices based on ISA bus SYSTEM_EVENT October 2015 EXT_INT Only external interrupt source XP17 XP18 participates in generation of SYSTEM_EVENT PWR_FAIL Only the
54. RQ7 IRQ7 SYSTEM EVENT 8 see Registers of control interrupts condition ion see Registers of control interrupts condition MUSAS OSLO USB controller Pave Molise External ISA devices IRQ12 IRQ14 Primary IDE HDD Compact Flash External ISA devices IRQ14 SYSTEM EVENT ers LAN contalar External ISA devices IRQ15 USB controller by default occupies IRQ6 interrupt line If the LPT port is switched off in the BIOS Setup settings the USB controller occupies IRQ5 line Use of alternative sources is possible only when switching off the PS 2 Mouse support in BIOS Setup settings see Boot gt Boot Settings Configuration parameter PS 2 Mouse Support The following sources are combined over or inside the FPGA and can be switched to the input of relevant interrupt by way of recording to the respective FPGA control register hereinafter referred to as the SYSTEM EVENT PFO power supply 5V reduction lower than the level of 4 65 V External WDT External optoisolated input October 2015 2 4 User Manual 152 Technical information 2 3 Channels of DMA module Table 2 10 Channels of DMA module Lm 2 4 I O address space Table 2 11 Allocation of the I O address space mon NS October 2015 2 5 User Manual 152 Technical information Function es ISA bus Access to external bus
55. Save and Exit SE EGG Exit v02 61 C Copyright 1985 2006 American Megatrends Inc Table 5 19 Description of GPIO Configuration menu Menu item Assignment GPIO PORT2 7AH 3 0 Configuration of the relevant line of GPIO 2 port integrated into the SnK FUNC Vortex86DX CPU as input or output Setting bitto I assigns this bit as input GPIO PORT2 7AH 7 4 Setting bitto O assigns this bit as output FUNC IIII 0 11001 1011 1010 1001 1000 0000 GPIO PORT2 7AH 3 0 Setting condition of the relevant line of GPIO PORT2 port integrated into SnK DATA Vortex86DX CPU Setting bit to 1 assigns the relevant output to 1 GPIO PORT2 7AH 7 4 Setting bitto 0 assigns the relevant output to 0 DATA 1111 1110 1101 1100 1011 1010 1001 1000 0000 October 2015 5 27 Basic input output system User Manual 152 105 5 6 2 5 SRAM Configuration Screen of NV SRAM Configuration menu is shown in the Figure 5 23 description of menu items is given in the Table 5 20 Fig 5 23 Screen of NV SRAM Configuration menu BIOS SETUP UTILITY Chipset RARA NY SRAM Configuration NY SRAM Function READ WRITE caooo econo 50000 D4000 D5000 pcooo DODOO Select Screen Select Item Change Option Fi General Help Reset F10 Save and Exit ESC Exit
56. Soba desea ipee tte e eie serra 44 Allocation of the O address Space eor ip De tgo der eere o fd 44 Internal l O addresses iiie eei RA AAA veau eet 46 Memory devices addresses mec 2 3 de des ERA ete E CON Ede LER Idee ee dash dea Sha M dera aa 47 GPIO controltregisters 256 rdc ta ee mter eite dde ber dept p e ete reet 47 P rpose of GPIO Ports oos ee dept ce De Ph pente dete e eed ud ope ql de rele Pu i E neem V aeo redes oe pi tesa xe ed 48 WDTO restart tegister eer n dn e ede acc oe ee petat boda eese ai cele eo ee leere ow ab rra arte 49 Index register of WDTO address port rti e a reme etie rhe eee ER RD 49 Data register of WD TO DOrtl ir arcu be eet macte terit dd des 49 Control register OF WD T O time nai Mice wrote rat trice fis de de ode er de ded 50 Register of WDTO event 9 50 GNTO tegister of WDTO timer valle erri erri rentre nnt pe aaoun 50 CNTT register of WDTO timer valle pr torpet tiep ete ger epe Ponce adl cete a Be eat ee ded 51 CNT2 register of WDTO timer valle dd Probes due ise Re Pon o he alte 51 Register of WDTO timer eei El t ied eade Y Nad 51 WDT 1 restart register Aditi crece etes rette eee 52 Gontrol r
57. This document contains information being the property of Fastwel Group Co Ltd lt can neither be copied nor transferred with the utilization of known media nor be stored in data storage and search systems without the prior written authorization of Fastwel Group Co Ltd To our best knowledge the data in this document does not contain errors However Fastwel Group Co Ltd cannot take responsibility for any inaccuracies and their consequences as well as responsibility arising as a result of utilization or application of any diagram product or example cited in this document Fastwel Group Co Ltd reserves the right to alter and update both this document and the product presented therein at its own discretion without additional notification October 2015 7 User Manual 152 Specification NOTATIONS gt gt RE Attention high voltage This sign and caption warn you about the dangers related to electric discharges gt 60 V when touching a product or any parts thereof Failure to observe safety measures mentioned or prescribed by the regulations may expose your life or health to danger as well as may lead to product damages See also the section devoted to operation with a high voltage specified below Attention Device sensitive to static electricity This sign and caption indicate that electronic boards and their components are sensitive to static electricity This is why it is required to exercise caution
58. U module contains power supply supervisor microchip which monitors module s power supply voltage as well as 3 hardware watchdog timers 2 watchdog timers integrated into the CPU WDTO WDT1 and 1 external integrated into power supply supervisor WDT2 Supervisor generates RESET hardware signal when the power supply voltage 3 3V drops lower than 3 08 V as well as NMI signal interrupt hardware reset at the reduction of principal power supply voltage 5V lower than level of 4 65 V which enables to save user data in the nonvolatile RAM if necessary Permission for NMI generation during the reduction of power supply voltage lower than the level of 4 65 V is provided within the SYSTEM BIOS SETUP see Section 3 2 Module parameters configuration Watchdog timers can be used to avoid software hangups Actuation of WDT1 watchdog timers is performed when there are no software confirmations within 30 5 ps 512 sec Internal watchdog timer is launched in the SYSTEM BIOS SETUP Actuation of internal watchdog timers is carried out without generation of RESET hardware signal Actuation of WDT2 watchdog timer is carried out when there are no software confirmations within 1 6 sec approximately within the whole temperature range from 1 0 sec to 2 25 sec External watchdog timer WDT2 has been launched after power ON or reset Actuation of an external watchdog timer is carried out with generation of RESET hardware signal is s
59. User Manual 152 Brief description m Extension buses a MicroPC ISA 8 bit 8 16 MHz a PC 104 ISA 8 16 bit 8 16 MHz m Connector for Compact Flash Support of Type 1 2 modules a Support of PIO UDMA modes m Port of HDD connection a 1 Primary channel Connection up to 2x devices Support of Ultra DMA 100 m Port LAN 10 100 Mb Standard RJ45 connector with LED indication Insulation from the system 500 V m USB ports host Support of USB 1 1 USB 2 0 HS FS LS Connection up to 4 x devices Standard connector 2x USB Type A m Video subsystem Video controller with 2D accelerator Volume of video memory 16 MB DDR Independent connection of 2x displays Port for the connection of RGB display with resolution up to 1920x1440 32 bit color Port for the connection of TFT panels with resolution of up to 1920x1440 18 bit color a Connection of display a separate VGA connector XP2 IDC2 10 port Connection of the display via a standard connector DSUB15F using KIB98102 interface board m Audio port Linear stereo input output Input for MIC connection mono m Universal parallel port with support of SPP EPP ECP modes Connection via a separate IDC 26 Connection of devices via standard DSUB 25 connector using KIB98201 interface board Serial ports a isolated RS 422 485 individual insulation form the system 500 V COM2 isolated RS 422 485 indiv
60. User Manual 152 Specification Fastwel y MICRO CPC152 MicroPC Vortex86DX 600 MHz CPU Module User Manual Version 1 04 September 2015 The product described in this manual is compliant with all related CE standards Product Title 152 October 2015 User Manual 152 Specification Document name CPC152 User Manual Manual version 1 04 Copyright O 2015 Fastwel Co Ltd All rights reserved Revision Record 0 01 ltem number 687263 045 v 1 0 152 2013 Initial version of User Manual 152 1 00 ltem number 687263 045 v 1 1 152 December 2013 Section_2 8 Description of internal registers description of control registers interrupt state is added by new information description of control register of page access to NV SRAM 128KB Section_1 6 Location of components and external view of CPC152 was updated in accordance with the new version of item number Section 3 1 4 Switching of Power Fail signals watchdog timer actuation remote reset to the line of CPU hardware reset purpose of X9 jumper has been adjusted 1 01 ltem number 687263 045 v 1 1 152 April 2014 Section 1 10 22 Audio port recommendation for switching jumpers on 98102 interface module has been adjusted New Section 2 8 3 Register of interrupts state of ISA bus controller Section 2 8 5 Registers of interrupts control of ISA bus controller purpose of interrupt
61. _EN Reset permission of setting a flag of IRQx interrupt Permit 1 prohibit 0 by default after power on or reset October 2015 2 15 User Manual 152 Technical information Attention After each interrupt generation on IRQx events it is required to reset a relevant IRQx_EN interrupt flag by consecutive writing of 0 and then 1 into the relevant bit of interrupt permission If this is not done there will be no further settings of event flags 2 8 4 Register of control system interrupts condition Enables prohibits to use external signals when generating an interrupt of NMI CPU SYSTEM EVENT signal during writing to the port The port also enables to determine a hardware source of NMI and SYSTEM EVENT Address IOCHK_EN Switching to the line of CPU Permit 1 prohibit O PFO EN Switching Power Fail to the line SYSTEM EVENT Permit 1 prohibit WDO EN Switching WatchDog Timeout to the line SYSTEM EVENT Permit 1 prohibit 0 EXT EN Switching RMTRES to the line SYSTEM EVENT Permit 1 prohibit O SE EN Switching SYSTEM EVENT to the line of NMI CPU Permit 1 prohibit O EN Permit generation of NMI Generation of events interrupt of NMI CPU from ISA or SYSTEM EVENT during writing 1 prohibition during writing in this case the hardwa
62. accordance with procedures previously approved in writing by Fastwel 2 Products which have been subject to power supply reversal misuse neglect accident or improper installation Returning a product for repair 1 Apply to Fastwel company or to any of the Fastwel s official representatives for the Product Return Authorization 2 Attach a failure inspection report with a product to be returned in the form accepted by customer with a description of the failure circumstances and symptoms 3 Carefully package the product in the antistatic bag in which the product had been supplied Failure to package in antistatic material will VOID all warranties Then package the product in a safe container for shipping 4 The customer pays for shipping the product to Fastwel or to an official Fastwel representative or dealer October 2015 11 SECTION 1 BRIEF DESCRIPTION User Manual 152 Brief description 1 BRIEF DESCRIPTION 1 1 Device purpose CPC152 CPU Module is a high integrity solution based on x86 platform in MicroPC format designed for use in real time management manufacturing control as well as data collection and processing systems The module can operate in an independent or slave mode Connection of primary I O devices VGA displays TFT panels AT keyboards and other handling equipment audio devices printers USB devices makes it possible to use the CPC152 CPU Module in the systems attended by operator Fo
63. age of RS 422 485 ports isolation from the system 500V ESD protection 15 kW IEC1000 4 2 Table 2 4 Characteristics of USB LAN ports green LED activity LED activity indication of LAN channel yellow LED operation mode full half duplex LAN port isolation Table 2 5 IDE port characteristics An Table 2 6 Characteristics of integrated temperature pressure acceleration sensors Temperature sensor Temperature measurement range 125 C complementary code with a Type of sensor used LM92CIM National Semiconductor 0 5 C 10 50 Rated absolute temperature measurement error 1 0 10 85 C 2 0 40 85 C Price of the least significant digit value 0 0625 C 2 Exchange speed over serial ports is defined by the value of frequency divider register in the BIOS Setup settings maximum standard frequency 115200 Kb sec 19 Setting of UltraDMA 5 mode is only possible if the integrated drive is solely active and this drive is set as Primary Master and other devices are not connected to IDE interface relative error is not rated data specified in the table are guaranteed by sensor manufacturer and are not verified during the tests October 2015 2 2 User Manual 152 Technical information Conversion time up to 3 ms Acceleration sensor Measurement ranges 2g 4g 8g additional code with a sign Type of sensor used MMA8451Q Freescale Table 2 7
64. al 152 105 Menu item Assignment USB 2 0 Controller Determination of the speed of data exchange with USB device Mode HiSpeed data exchange speed is 25 480 Mb sec FullSpeed data exchange speed is 0 5 12 Mb sec USB 1 0 1 1 mode USB EHCI Hand Off Mechanism of interface control transfer EHCI Enhanced Host Controller Interface between devices with support of BIOS resources Disabled controlled by operating system Enabled controlled by BIOS resources In case of detection of a USB drive USB Mass Storage Device Configuration an additional submenu is available Screen of the USB Mass Storage Device Configuration menu is shown in the Figure 5 10 description of items is given in the Table 5 8 Fig 5 10 Screen of the USB Mass Storage Device Configuration menu BIOS SETUP UTILITY La i i a a a a e a a a a a a e a USB Mass Storage Device Configuration Number of seconds Fi General Help F6 Reset WDT F10 Save and Exit ESC Exit RARA x 8 8 8 5 5 5 5 POST waits for the USB mass storage m E device after start Device 1 UFD Silicon Power4G 1100 unit cormand Emulation Type Auto a Y Select Screen ar p Select Item E 2 Change Option E
65. atic determination of LBA mode support Disabled Prohibition of LBA mode determination Large Mode is used Block Multi Sector Mode of block data transmission Transfer 7 Auto This option enables BIOS to automatically determine whether the Multi Sector Transfers mode is supported on this channel This option enables BIOS to automatically determine the number of sectors per block for transmission from the hard drive to memory Data to from the device will be transmitted via several sectors per unit of time Default value Disabled This option prohibits BIOS to use the Multi Sector Transfer mode on this channel Data to from the device will be transmitted via a single sector per unit of time October 2015 5 7 User Manual Basic input output system 152 BIOS Menu item Assignment PIO Mode Programmable input output PIO mode Auto his option enables BIOS to automatically determine whether a device supports the PIO mode It is recommended to use this unit when it is impossible to determine which mode is supported by the connected device 0 1 2 3 4 St the PIO 0 1 2 3 4 mode for the connected device Data transmission rate in the mode PIO 0 up to 3 3 MB sec PIO 1 up to 5 2 MB sec PIO 2 up to 8 3 MB sec PIO 3 up to 11 1 MB sec PIO 4 up to 16 6 MB sec DMA Mode DMA Direct Memory Access mode of data transmission Auto Recommended value for the
66. ble of XP8 connector contacts PS 2 port of keyboard mouse Table 2 38 Purpose of XP8 connector contacts PS 2 port of keyboard mouse XP3 B 5B PH KL JST 5 contacts pitch of 2 mm KBD DAT GND 5V_EXTK October 2015 2 21 User Manual 152 Technical information 2 9 7 Table of XP10 connector contacts GPIO port Table 2 39 Purpose of XP10 connector contacts XP10 98424 G52 10LF FCI Function Contact Function GPIO 0 GPIO 1 GPIO 2 GPIO 3 GPIO 4 GPIO 5 GPIO 6 GPIO 7 5VEXT GND 2 9 8 Table of XP14 connector contacts buzzer Table 2 40 Purpose of XP14 connector contacts buzzer 14 2B PH KL JST pitch of 2 mm 5V_EXTL October 2015 2 22 User Manual 152 Technical information 2 9 9 Table of XP15 connector contacts connection to KIB98102 VGA TFT AUDIO KB MS Table 2 41 Purpose of XP15 connector contacts 98102 VGA TFT AUDIO KB MS XP15 IDC60 1 27 mm 5 104068 6 AMP Eeo AA a ri EXOTIC wa max E 3 mak 4 peak 3 ee Ge mouse 8308 rower arn Power sup arm mus mue T gem mue ee re cree ate TP ere cree s Fom
67. ble to generate one of the WatchDog 1 Signal interrupts including a non maskable interrupt as well as generate the module Select reset signal IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ9 IRQ10 IRQ1 1 IRQ12 IRQ14 IRQ15 NMI Reset WatchDog 0 Timer Setting the time counting interval of the relevant timer Watchdog timer counts WatchDog 1 Timer backward during operation If the value of 64 seconds is set it will count to 0 and then will generate the RESET NMI or IRQ signal If during the backward counting the timer obtains a restart signal it interrupts the counting process and starts to count again from 64 1 Sec 2 Sec 4 Sec 8 Sec 16 Sec 32 Sec 64 Sec 128 Sec 256 Sec 512 Sec October 2015 5 26 Basic input output system User Manual 152 105 5 6 2 4 GPIO Configuration Screen of GPIO Configuration menu is shown in the Figure 5 22 description of menu items is given in the Table 5 19 Fig 5 22 Screen of GPIO Configuration menu BIOS SETUP UTILITY GPIO Configuration Options RARAS TE GPIO PORT2 3 0 DATA 0000 IIOI GPIO PORT2 7 4 FUNC IIII IIOO GPIO PORT2 7 4 DATA 0000 LENTO IOIO IOOI IOOO Select Screen o Select Item t Change Option F1 General Help F6 Reset WDT F10
68. control bits has been changed Section 5 3 PCI PnP Additional PCI plug and play settings table of additional settings description has been supplemented by a section connected to the SYSTEM_EVENT Section 1 10 8 IDE XP16 port is supplemented with recommendations for the connection of external IDE devices and a table of possible combinations of external and internal IDE Master Slave devices Section 5 Basic Input Output System BIOS is supplemented with new information in accordance with the changes in the new module s version subsections are added with the description of purpose of interrupt line integrated devices 1 02 Section 1 6 Location of components and CPC152 external view CPC152 April 2014 scheme with the location of module s major components has been updated 1 03 Section 1 9 Additional equipment obsolete devices were CPC152 April 2014 deleted from the list 1 04 Section1 9 Additional equipment has been added with CPC152 June 2014 Compact Flash MIC23012 64 GB Section 1 10 7 Compact Flash XP1 has been added with a table of compatibility with Compact Flash MIC230xx modules Contact Information Fastwel Co Ltd Fastwel Corporation US Address 108 Profsoyuznaya st 55 Washington St 310 Moscow 117487 Brooklyn New York 11201 Russian Federation USA Tel 7 495 232 1681 1 718 554 3686 Fax 7 495 232 1654 1 718 797 0600 Toll free 1 877
69. controller integrated into the CPU LAN channel is routed to the standard XS2 connector of RJ 45 type installed on the verge of module s board Purpose of connector s contacts corresponds to the one set by the standard IEEE 802 3 Ethernet specification 1 10 14 LPT parallel port XP5 Universal parallel port with support of SPP PC compatible printer port EPP Extended Capabilities Port ECP Enhanced Parallel Port modes The interface is routed to the connector of IDC type pitch of 2 54 mm 26 pins 5104338 6 AMP For cable manufacturing it is recommended to use the 26 pin socket to the ribbon cable with a pitch of 1 27 mm 2 215919 6 Fig 1 12 Numbering of XP5 connectors contacts 26 2 0000000000000 0000000000000 1 25 In addition LPT port is routed to the XP16 for the connection of LPT devices to the DSUB 25F connector J5 on KIB98201 interface board 1 10 15 RTC SPI FRAM lithium battery CPC152 module is equipped with AT compatible real time clock with the lithium battery installed XS7 socket The expected standardized operating time of the battery at turned off or lacking integrated circuit of non volatile RAM of 128 KB approx 10 years However the service life of the battery depends on operating temperature as well as on the length of the period within which the system is off 7 Under normal conditions humidity from 5 to 95 25 C October 2015 1 21 User Manual 152 Bri
70. cts Additional PS 2 keyboard or mouse can be connected to the standard MiniDIN 6F located on the KIB98201 interface board J4 For connection of both keyboard and mouse it is required to additionally use a standard Y cable 1 10 12 USB ports XS1 XP21 The module has 4 USB Host ports with support of USB 1 1 and USB 2 0 specifications In terms of design the USB ports represent a dual XS1 connector of USB A type installed on the brink of module s board and a vertical two row 10 pin XP21 connector of IDC2 10 type with a pitch of 2 mm 98424 G52 10LF FCI In this case two channels USBO USB1 are routed to the standard XS1 connector two others USB2 USB3 to XP21 connector October 2015 1 20 User Manual 152 Brief description Each pair of channels has an individual power scheme Purpose of XP1 USB A connector s contacts corresponds to the one set by USB specification Purpose of XP21 IDC2 10 connector s contacts is specified in the relevant table Connection of USB devices to USB2 USB3 ports is available through the adapter cable 500051 For proprietary manufacturing of the cable for USB2 USB3 ports it is recommended to use 10 pin socket to the ribbon cable with a pitch of 1 mm 89947 710LF FCI Fig 1 11 Numbering of XP21 connector s contacts 1 10 13 LAN 10 100 Mb port XS2 The module has one LAN port with the exchange speed of 10 100 Mb sec and is implemented on the basis of LAN 10 100 Mb
71. d the module will not be switched to BIOS backup copy X1 jumper should also be installed if there is watchdog timer WDT2 is used in the user program in order to avoid software failures with an automatic reboot of CPU at the end of a timeout of 1 sec Flag of WDT2 watchdog timer actuation is available regarding reading of GPIO1 0 line 0 watchdog timer has been actuated 1 watchdog timer has not been actuated flag value is snapped with a trigger and can be reset by recording 0 to the GPIO1 1 port and a further record 1 This way enables to control the reason of hardware reset in case of watchdog timer actuation even after reboot of the CPU In case of further actuations of the WDT2 external watchdog timer the module will also reboot from the backup BIOS copy Booting can be resumed from the main copy using one of the following three methods e By using a relevant item in BIOS Setup settings e By installing GPIO_P3 7 line in 0 e By turning OFF and turning ON of module s power supply October 2015 1 12 User Manual 152 Brief description Indication of watchdog timer actuation and indication of booting from the main BIOS copy is carried out using HL4 LED Hardware reset is indicated by HL3 LED 1 10 6 FLASH drive CPC152 modules are equipped with Flash memory microchip using NAND SLC technology It can be used as the boot drive can be turned OFF in BIOS SETUP settings or by the jumper For accessing t
72. des Parallel Port IRQ October 2015 This option assigns the interrupt line for LPT1 parallel port IRQS IRQ5 interrupt line assignment IRQ7 IRQ7 interrupt line assignment 5 25 Basic input output system User Manual 152 105 5 6 2 3 WatchDog Configuration Screen of WatchDog Configuration menu is shown in the Figure 5 21 description of menu items is given in the table 5 18 Fig 5 21 Screen of WatchDog Configuration menu BIOS SETUP UTILITY WatchDog 0 Function Disabled Options WatchDog 1 Function Enabled TRO3 Boot timeout 64 Sec TROY m IRQS 6 IRQS x IRO10 B n IRO11 uy IRQ12 Y E wo select Screen Aia Select Item Change Option S E zog General Help E Reset WDT E EESTI Save and Exit y PESE vO2 61 C Copyright 1985 2006 American Hegatrends Inc Table 5 18 Description of WatchDog Configuration menu Menu item Assignment WatchDog 0 Function Control of operation of WDTO WDT1 watchdog timers integrated into SnK WatchDog 1 Function Vortex86DX CPU Disabled Timer operation is prohibited Enabled Timer operation is permitted WatchDog 0 Signal This option enables to define an action which will be chosen upon completion of Select counting time of the relevant watchdog timer It is possi
73. digital converter 16bit 32 channels 250kHz 10V 0 625V Digital to analog converter 16bit 6us 4 channels 10V 2 5V 24 digital inputs outputs timer 32 16 bit 40 85C Analog digital input output module AIC324 104 analog to digital converter 16bit 32 channels 250kHz 10V 0 625V Digital to analog converter 16bit 6us 4 channels 10V 2 5V 24 digital inputs outputs timer 32 16 bit 40 85C high precision CompactFlash drive 128 MB 40 85 CompactFlash drive 256 MB 40 85 CompactFlash drive 512 MB 40 85 CompactFlash drive 1 GB 40 C 85 C CompactFlash drive 2 GB 40 C 85 C CompactFlash drive 4 GB 40 C 85 C CompactFlash drive 8 GB 40 C 85 C CompactFlash drive 16 GB 40 C 85 C CompactFlash drive 32 GB 40 C 85 C CompactFlash drive 64 GB 40 C 85 C List of additional accessories on Fastwel ftp server ftp ftp prosoft ru oub Hardware Fastwel ACSx October 2015 User Manual 152 Brief description 1 10 Constituent parts of CPC152 1 10 1 CPU CPC152 module is based on x86 compatible 32 bit Vortex86DX CPU with low power consumption and manufactured using 90 nm technology CPU clock frequency is 600 MHz A more detailed information on the CPU as well as latest versions of drivers and system level software can be found at manufacturer s website http www dmp com tw tech vortex86dx 1 10 2 Supervisor and watchdog timer The CP
74. e first contact of the connector Fig 1 13 Numbering of XP22 connector contacts a n 1 10 16 Port of isolated remote reset interrupt XP17 18 When connecting to the XP18 contacts of an external button potential free contact it is possible to generate an external reset or interrupt signal isolated from the system 500 V In order to receive the reset signal using XP18 connector it is required to close the contacts of XP18 1 and XP18 2 connectors where XP18 2 is directly connected with GNDS1 circuit common wire ground of isolated RS 422 485 interface COMI For receipt of reset signal using XP17 connector it is required to feed the voltage to contacts of XP17 1 and XP17 2 connectors depending on the installed X23 jumper 3 15 V or 10 30 V The reset interrupt signal is generated via or from the sources connected to XP17 XP18 Connectors are isolated from each other October 2015 1 22 User Manual 152 Brief description For manufacturing of the cable it is required to use the PHR 2 JST socket with SPH 002T P0 5S JST contacts Fig 1 14 Numbering of XP17 XP18 connectors contacts 1 10 17 104 extension bus ISA 8 16 bit PC 104 XS4 connector is designed for installation of extension modules in PC 104 format to the module It is possible to install no more than 4 PC 104 extension modules Fig 1 15 Numbering of contacts of XS4 connec
75. e main standby source OOOO xna Prohibition of automatic switching to BIOS backup copy in this case there will be no automatic switching to the backup copy October 2015 3 2 User Manual 152 Installation and configuration 3 1 2 Purpose of IDE integrated devices Master or Slave Table 3 3 Purpose of IDE integrated devices Master or Slave X3 0 0 4 1 2 Flash drive Primary Slave Compact Flash Primary Master X5 0 0 X3 0 0 1 2 Flash drive deactivated Compact Flash Primary Master X5 1 2 X3 0 0 X4 0 0 Flash drive deactivated Compact Flash Primary Slave X5 1 2 3 1 3 Selection of power supply voltage for LCD panel connection via KIB98102 XP15 Table 3 4 Selection of power supply voltage for LCD panel connection via KIB98102 XP15 X6 1 2 There was a selection of voltage of 5 V for power supply of LCD panel connected via KIB98102 module XP15 connector of CPC152 module 3 1 4 Switching of Power Fail signals watchdog timer actuation remote access to the line of CPU hardware reset Table 3 5 Switching of Power Fail signals watchdog timer actuation remote access to the line of CPU hardware reset X7 1 2 Switching of Power Fail signal to the line of CPU hardware reset X9 1 2 Switching of external signal of a remote reset interrupt from XP17 XP18 connectors to the line of CPU hardware reset October 2015 3 3 User Manual 152 I
76. eade 38 Fig 31 Diagram of CPC152 module connection e nee ene ne re nennen 69 Fig 32 Conventional view of installation and connection of extension modules in PC 104 69 Fig 51 Screen view during module booting process 80 Fig 5 25 Menu of boot d vice selection chee dei a Bee tu e poaae ipee ou e denen Fig 5 3 Screen ot Main miens iso ur o tuo cepere er Ee cae en dede uoo eub ve exec e e Eu Senda yen ue einn Eig 5 4 Screen of Advanced ro peer erede bu e QU eee RE Fig 55 Screen of CPU Configuration nnne nr e ise hse serene tenere rre nene Fig 5 6 Screen of IDE Gontiguration Menus se acc oed ot re a e ole c este beeen ce ate eod DES oan Hee Dee PUE Pope an Fig 57 Screen Primary IDE Master Fig 58 Screen of Remote Access Configuration menu Fig 59 Screen of USB Configuration Fig 5 10 Screen of the USB Mass Storage Device Configuration menu Fig 5 11 Screenm of POIL PnP te it Fo e b Co ye bee do east ed bo ete feed eo ea ode dL E eet ho ve odo Fig 5 12 Screen of PCI PnP menu
77. ef description Important note It is recommended to replace the battery in about 4 years of service not waiting for the end of its service life Important note During battery replacement polarity should be observed above The used batteries should be utilized in accordance with the established standards FRAM nonvolatile memory with a serial SPI interface is designed for saving the SETUP BIOS copy and recovery of RTC memory state in case of an error as well as for storing gauge coefficients of analog to digital converter digital to analog converter User has also access to free FRAM cells Access is provided via INT 17H BIOS function Memory volume available to the user amounts to 7 KB Switching to the main voltage of 3 3 V instead of battery voltage when the power supply is on ensures additional resource economy of the installed lithium battery For use of CPC152 modules with conformal coating there is a possibility of connecting an external battery For this purpose an additional XP22 connector 500058 a set of Li battery of 3V with PHR 2 connector length of 40 mm is provided For proprietary manufacturing of the cable it is recommended to use PHR 2 JST socket with SPH 002T P0 5S JST contacts Important note If an external battery is connected to the additional XP22 connector it is required to remove the Li batter from XS7 socket During installation polarity should be observed corresponds to th
78. egister 2 pt eder mee dag dar os ue none bats 52 Register of WDT1 event ese 52 CNTO registetot WDT1 timer Valle ier test ente E pee iem ceto Php he De ges eic Ry 53 CONT register of WDT1 timer Value uir eed eed eet ee ree iie iiie im eer Pe Do 53 GNT2 register of timer Valle cont ote cot rep depot Ge eese tt POR eR eb o othe 53 Register of WDT1 timer 53 Purpose of XP1 connector contacts Compact e meme mene emere 58 Purpose of XP2 connector contacts IDE 59 Purpose of XP3 connector contacts COM1 5 422 485 59 Purpose of XP4 connector contacts COM2 5 422 485 nennen 59 Purpose of XP5 connector contacts nennen nennen 60 Purpose of XP6 XP7 connector contacts COM3 4 22 60 Purpose of XP8 connector contacts PS 2 port emere 60 Purpose of XP TO connector Contacts e A ii a e el de 61 Purpose of XP 14 connector contacts LUZ A iaa 61 Purpose of XP15 connector
79. egrated SPI Flash of the CPU in the CPC152 module A prerequisite of the upgrade is booting from BIOS backup copy In order to modify BIOS it is required to start the program with w key and specify BIOS file name as parameter xflash w bios bin 4 7 2 VXDXBIOS EXE utility upgrade of BIOS main copy vxdxbios exe program is designed for modifying BIOS with writing to the external FLASH memory from PLCCC32 socket in the CPC152 module In this case it is required to properly install the jumpers responsible for switching the BIOS booting source In order to modify BIOS it is required to start the program and specify BIOS file name as parameter vxdxbios bios bin Attention After BIOS upgrade it is required to enter the BIOS Setup menu and load optimum values since CMOS structure can distinguish from various BIOS versions see Section 5 Basic Input Output System BIOS of this User Manual After that BIOS Setup settings can be changed 4 7 3 CMOS_RST EXE utility remote reset of BIOS settings The CMOS_RST EXE program is designed for reset of BIOS settings to the default state similarly to the effect of item BIOS Setup Load Optimal Defaults For reset of the setting using CMOS_RST EXE program it is required to connect COM3 or COM4 port of CPC152 module with COM port of the PC by a null modem cable and turn on the module power supply settings will be reset and written to the CMOS and FRAM then a hardware reset
80. em is started preinstalled to the integrated FLASH drive during delivery namely pressing of such buttons as Backspace and lt gt is carried out improperly though such problems were not detected during operation with MSDOS OS October 2015 B 2 User Manual 152 Terms abbreviations and acronyms Term Meaning ACPI Advanced Configuration and Power Interface AGP Accelerated Graphics Port AGTL Advanced Gunning Transceiver Logic BIOS Basic Input Output System CRT display Cathode Ray Tube Display DAC Digital Analog Converter DDR SDRAM Double Data Rate Synchronous Dynamic Random Access Memory DMA Direct Memory Access DMI Direct Media Interface DVMT Dynamic Video Memory Technology ECC Error Correction Code EEPROM Electrically Erasable Programmable Read Only Memory EHCI Enhanced Host Controller Interface Universal Serial Bus specification EIDE Enhanced Integrated Drive Electronics EOS Electrical Overstress ESD Electrostatically Sensitive Device Electrostatic Discharge FSB Frequency System Bus FWH Firmware Hub GMCH Graphics and Memory Controller Hub cw Inter Intergrated Circuit LCD Liquid crystal display LPC Low Pin Count LVDS Low Voltage Differential Signal MDI Media Dependent Interface PC Personal Computer October 2015 C 1 Terms abbreviations and acronyms Terms abbreviations and
81. errors In order to completely exclude possibility of errors during file transmission it is strongly recommended not to use SmartLink and use the terminal program instead which supports XMODEM CRC HYPERTERMINAL TELEMAX TERM90 TERM95 exchange protocol In this case for exchange of files the CPC152 is required to have the FTRANS EXE program written in Fastwel which is supplied from the beginning of March of 2001 can be obtained at ftp ftp prosoft ru pub Hardware Fastwel CPx CPC152 While transferring the file to module it is recommended to launch the FTRANS program with the key CRC During transfer of files with FTRANS it is also recommended to specify an exact size of the transferred file 3 Problem with a console via COM port It is possible to enter BIOS Setup settings but when DOS is started using keyboard via terminal is unsuccessful What could be the reason The most probable cause for that is in BIOS Setup settings A remote console integrated into the AMI BIOS by default is switched on until the time BIOS will pass control to the operating system In order to activate console I O integrated into the AMI BIOS it is required to change BIOS Setup settings in section Advanced gt Remote Access Configuration it is necessary to set the parameter Redirection after BIOS POST to Always By default this parameter is set to Boot Loader at the time of delivery However it should be considered t
82. es Requirements to parameters of the power supply 18 Table of available combinations of IDE devices with 2 0 meme 26 Table of allowable combinations of IDE 27 Frequency divider values for serial 29 Purpose op CPO152 EE DS sere Socal eno ee erre tee dose tre ee esq pude Pe a AE 36 Requirements for power supply of 152 0 00 00 40 Characteristics of digital inputs outputs 40 Characteristics of serial ports cct bene ete ete te E PUR HEURE uc ERU eb ete de UE e Seve OA D Ud 41 Characteristics of USB LAN ports reci hee pte ep ai ed ex anda ets 41 IDE port Characteristies iieri ree pte eaae eot eo pte prego eia ee eo mone eb oae DADA canada CEDERE DUET 41 Characteristics of integrated temperature pressure acceleration sensors sss 41 Environmental conditlons RITE OR ure 42 Mechanical characte ristiCs 2 e beret rete t oo Er eet ie ge Eee C e Rae aed cU eH 42 Addresses of hardware 43 Ghannels oft DMA module 5 ot dere eer rr e exe dre sete deems s cd
83. eserved 4 Change Option IRQ5 Available Fi General Help IRQ Available FG Reset WDT IRQS Available F10 Save and Exit TRO10 Available ESC Exit IRQ11 Reserved 02 61 C Copyright 1965 2006 American Megatrends Inc October 2015 5 13 Basic input output system 152 User 5 BIOS Fig 5 12 Screen of PCI PnP menu continued BIOS SETUP UTILITY Main Advanced PCIPnP Boot Security Chipset Exit Palette Snooping Disabled Available Specified PCI IDE BusMaster Enabled IRO available to be OffBoard PCI ISA IDE Card Auto used by PCI PnP te devices IRQS Reserved Reserved Specified TRO4 Reserved is reserved for TIROS Available use by Legacy ISA IRQ6 ts devices IRQS 11 ZOTBOTA Jur us Select Screen E IRQI5 tt Select Ttem Vut Gr Change Option DMA Channel 0 Available F1 General Help DMA Channel 1 Available Jur qs Reset WDT DMA Channel 3 Available ASEO Save and Exit DMA Channel 5 Available t ESC Exit DMA Channel 6 Available LAXE ELE EE vO02 61 C Copyright 1985 2006 American Megatrends Inc Table 5 9 Description of PnP menu additional settings of PCI Plug and Play Menu item Assignment Clear NVRAM Reset of t
84. f SM718KE160000 AB video processor Video controller with 2D accelerator function has the following technical characteristics and capacities e Volume of integrated video memory 16 DDR Possibility of connecting LCD TFT panels with TFT interfaces and resolution of no more than 1920 x 1440 60 Hz color depth of no more than 18 bit e Possibility of connecting RGB VGA displays with resolution of no more than 1920 x 1440 75 Hz 32 bit TFT and Analog RGB ports are routed to the XP15 connector Connection of devices is possible via KIB98102 interface board on which these interfaces are routed to IDC 34 TFT and DSUB 15F Analog RGB connectors Using the X6 jumper on CPC152 makes it possible to select the power supply voltage of TFT panel 3 3 5 V An additional XP2 connector 98424 G52 10LF FCI is also provided for the connection of display or TFT panel to the Analog RGB port by a separate cable to XP2 connector without the use of KIB98102 interface board For the connection 500027 02 cable will be required not included into the Delivery Checklist to be purchased as an option For proprietary manufacturing of the cable it is recommended to use the 10 pin socket to the ribbon cable with a pitch of 1 mm 89947 710LF FCI Numbering of XP2 connector contacts 1 10 24 XP15 16 extension ports For connection of such devices as TFT panel VGA display PS 2 mouse and keyboard in CPC152 module an exten
85. grated audio controller CMI8738 Enabled Integrated audio controller is activated Disabled Integrated audio controller is deactivated October 2015 5 22 Basic input output system User Manual 152 105 Menu item Assignment Used IRQ Selection of interrupt for Audio controller 5 6 2 1 ISA Configuration Screen of ISA Configuration menu is shown in the Figure 5 19 description of menu items is given in the Table 5 16 Fig 5 19 Screen of ISA Configuration menu BIOS SETUP UTILITY Options ISA 16 I O wait state 1 clock ISA Shits I O wait state 4 clock 8 3MHz ISA 16 Memory wait state 16 6MHz ISA Shits Memory wait state 4 clock Select Screen E SS Select Item PEEL Change Option SOEI General Help m F6 Reset WDT E Save and Exit ESC Exit v02 61 C Copyright 1985 2006 American Megatrends Inc Table 5 16 Description of ISA Configuration menu ISA configuration Menu item Assignment ISA Clock Clock frequency ISA_SYSCLK CLK XS2 connector B20 output 8 3MHz Set the clock frequency of 8 3 MHz 16 6MHz Set the clock frequency of 16 6 MHz ISA
86. h the use of KIB98201 interface board it is permitted to use a cable with a length not exceeding 140 mm 500016 01 or 500016 02 available IDE cable length from KIB98201 to an external device no more than 100 mm When connecting two external devices it is allowed to use a standard IDE cable in this case the FLASH drive should be turned OFF and Compact Flash module should be removed from the XP1 connector Available combinations for the connection of internal and external IDE devices are specified in the table below Table 1 3 Table of allowable combinations of IDE devices FLASH drive Compact Flash HDD CD DVD Drive Slave Slave Slave Slave FLASH drive Master ii Compact Flash n D Master HDD Master 5 CD DVD Drive Master 1 10 9 GPIO port XP10 GPIO port is implemented on the basis of GPIO_P2 7 0 port of Vortex86DX CPU Port lines are tolerant to the voltage level 5V Each port line can be configured as input or output Modes of using the GPIO port Digital I O port Control of servo drives PWM signal Mode of compatibility with 8051 In order to ensure the certainty of state of GPIO port lines after power is ON it is recommended to use a dedicated line of power supply voltage 5VEXT output 9 of XP10 connector for feeding the logical circuitry connected to the GPIO port as well as using a binding to high 5V or ground GND levels immediately in
87. hat console implemented in the AMI BIOS uses system timer It is also possible to use FreeDOS resources OS preinstalled by default namely the MODE commands changing parameters of l O devices CTTY changing a standard device in AUTOEXEC BAT file MODE COMm BAUD HARD b PARITY p DATA d STOP s CTTY COMm October 2015 B 1 Frequently asked questions User Manual 152 considering programming of 152 COMm used COM port COM1 COM2 COM3 COM4 Remember That BIOS Setup settings for COMS port RS 232 and COM4 RS 232 port base addresses of COM1 3F8h and 2 2F8h ports are assigned by default therefore they are recognized by FreeDOS operating system as COM1 2 ports In order to use COM3 RS 232 for console it is required to set the BAUD parameter as equal to COM1 BAUD code of exchange speed 96 9600 kbit s 192 19200 kbit s BAUDHARD code of exchange speed 96 9600 kbit s 192 19200 kbit s 384 38400 kbit s 1152 115200 kbit s PARITY even parity Even Odd Mark Space None DATA number of data bits 7 8 STOP number of stop bits 1 2 Examples of entries in AUTOEXEC BAT file MODE 1 BAUDHARD 1152 PARITY NONE DATA 8 STOP 1 CTTY COM1 MODE COM2 BAUD 96 PARITY NONE DATA 8 STOP 1 CTTY COM2 However it is required to consider certain limitations when operating with the console while FreeDOS operating syst
88. he table of PnP parameters No Without change Yes Reset table after reboot Plug amp Play O S OS with PnP support is installed No No Yes Yes PCI Latency Timer Maximum number of PCI bus strokes during which the device connected to the bus can hold it occupied transmitting data 92 64 96 128 160 192 224 248 Allocate IRQ to PCI VGA Permission of interrupt purpose to the graphics card on PCI bus No Not to assign interrupt to the PCI graphics card Yes Assign interrupt to the PCI graphics card Palette Snooping Synchronization of graphics card palette and image video captured with the I O card video editing card Disabled Function is deactivated Recommended value Enabled Function is activated PCI IDE BusMaster Permission for using the Bus Mustering PCI mode by the IDE bus controller Disabled Prohibit the use of Bus Mastering mode Enabled Permit the use of Bus Mastering mode OffBoard PCI ISA IDE Selection of the external PCI ISA card of IDE bus controller Card Auto Automatic detection of presence of the PCI ISA card of IDE bus controller Recommended value October 2015 5 14 User Manual Basic input output system 152 BIOS Menu item Assignment PCI Slot1 PCI Specify that the relevant PCI slot contains the installed IDE bus Slot2 PCI controller card Slot3 PCI Slot4 PCI Slot5 PCI Slot6 IRQ3 IRQ4 IRQ5 I
89. ice integrated FreeDOS operating system service program of data uploading downloading ftrans exe W system utility for transfer of system files sys roro B C Ans FLASH BIOS The latest versions of documents BIOS and utilities be found at ftp ftp prosoft ru pub Hardware Fastwel CPx CPC152 4 2 Setting connection between PC and CPC152 For setting connection between the PC and CPC152 module it is required 1 When the power of PC and CPC152 is off connect the cable VTC 9F with a 0 modem adapter to PC COM port and XP6 XP7connector of the CPC 152 module by default COM3 is set as a console one For connection to COM3 XP6 and COM4 ports XP7 500005 adapter cable is used 1 pcs included into the delivery checklist 2 Install the package of terminal software SmartLINK or any other equivalent program with the following sequence link parameters PC port COM2 8 bit data 1x stop bit without even parity check exchange rate of 115200 Kb sec 3 Switch on the power and press the RESET button if it is not necessary to fulfill items 1 2 and the power is on In case the connection has been set successfully after the booting of operating system on PC screen there will be a line of DOS in
90. idual insulation form the system 500 V automatic hardware control of information transfer direction for RS 422 485 ports a RS 232 9 wore set of signals a 4 RS 232 9 wore full set of signals a exchange rate RS 232 up to 250 KB sec exchange rate via RS 422 RS 485 up to 750 KB sec a ESD protection 15 kW IEC1000 4 2 s Exchange rate via serial ports is defined by a frequency divider register value October 2015 1 2 User Manual 152 Brief description GPIO port a 8x lines compatible with 5 V a GPIO_P2 7 0 CPU port is used Maximum output load capacity 16 mA Compatibility with 5 V level Using the port for control of servo drives PWM ability to use the port in the mode of compatibility with 8051 m PS 2 keyboard and mouse port m Watchdog timers two watchdog timers integrated into CPU with a programmable event and actuation interval of 30 5 microseconds 512 seconds One watchdog timer integrated into the power supply supervisor with a fixed actuation interval of 1 6 seconds m Real time clock Consumption current when the power is OFF 2 mkA m Integrated lithium battery of 3 V CR2032 standardized capacity 180 220 mA h m Opto isolated reset interrupt a Potential free contact a Voltage 3 15 V 10 30 V m Generation of interrupt reset in case power supply voltage is lower than 4 65 V m PC buzzer m Temperature sensor LM92 55
91. iguration titt ertt meme herren 96 Table 512 Description of Security 98 Table 513 Description of Chipset menu integrated 99 Table 514 Description of SouthBridge Configuration menu SouthBridge 2 100 Table 5 15 Description of NorthBridge Configuration 101 Table 5 16 Description of ISA Configuration menu ISA 102 Table 5 17 Description of Serial Parallel Port Configuration 103 Table 518 Description of WatchDog Configuration 105 Table 519 Description of GPIO Configuration Mii A d A ONE edi deen ida Table 5 20 Description of NV SRAM Configuration menu Table 521 Descriptionrot Exit MO Table 1 Table of cable contact for connection of 4 bit STN EL displays to LPT 112 List of figures 1 Block dlagram 0t 82 td Un EUER OM E PRADA 18 2 External view of CPRG15 23 22 i erect ehe bt de pi e a pe ett oe Bote c pend bete bid d eer ida teat 19 3 Location of primary components of 152 rentre tener ren 20 nodes Numbering ot XP 10 connector contacts or rr
92. in the Figure 5 16 Description of menu items is given in the table 5 13 SETUP UTILITY Main idvanced PCIPnP oot Security ERERERARA RARA RARA RARA AAA ARRE RARA RARA RARA RARA RANA Advanced Chipset Settings Options for 5B ul F WARNING Setting wrong values in below sections E may cause system to malfunction E E Onboard Devices Select Screen 6 Select Item Enter Go to Sub Screen General Help E F6 Reset WDT 10 Save and Exit ESC Exit eee eee ee eee ee ee eee ee eee ee ee eee ee v02 61 C Copyright 1985 2006 American Megatrends Inc Table 5 13 Description of Chipset menu integrated devices Menu item Assignment SouthBridge Configuration submenu Onboard Devices Configuration of integrated devices audio and video controllers submenu October 2015 5 20 Basic input output system User Manual 152 105 5 6 1 SouthBridge Configuration Screen of SouthBridge Configuration menu is shown in the Figure 5 17 description of menu items is given in the Table 5 14 Fig 5 17 Screen of SouthBridge Configuration menu OS SETUP UTILITY k a a LL E LE E E E E EO F1 General Help F6 Reset WDT 10 ESC Exit South Bridge Chipset Configuration 9121 LAN Enable TRAER ARA RRA
93. ion acceleration pressure and temperature sensors Additional options for CPC152 01 Preinstalled operating system WCE Windows CE 5 0 LNX Linux 2 6 WXPe Windows XP Embedded Coating COATED Conformal coating Information on possibility of pre installing QNX operating system is provided upon special request 1 8 Delivery checklist Standard delivery checklist for CPC152 includes CPC152 Module Cable adapter ACS00005 01 port RS 232 IDC 10 DB9M length 180 mm Cable adapter ACS00027 02 port VGA IDC2 10 D SUB 15F length 180 mm Removable part of the terminal block WAGO 733 105 port RS 422 485 2 pcs Set of jumpers step 2 Package PATA 1 9 Additional accessories KIB98102 Interface board Audio VGA TFT PS 2 KIB98201 Interface board 2 5 HDD 3 5 HDD LPT 500015 cable adapter for 98102 ACS00015 01 cable adapter for KIB98102 ACS00015 02 cable adapter for KIB98102 ACS00015 03 cable adapter for KIB98102 500016 cable adapter for 98201 ACS00016 01 cable adapter for KIB98201 ACS00016 02 cable adapter for KIB98201 ACS00016 03 cable adapter for KIB98201 length 300 mm length 120 mm length 140 mm length 500 mm length 300 mm length 120 mm length 140 mm length 500 mm wm wm ACS00005 cable adapter IDC 10 D SUB 9M port RS 232 length 1800 mm ACS00005 01 cable adapter IDC 10 D SUB 9M
94. ize of 16 KB page oriented access to NV SRAM in CPC152 modules starting from version 1 1 The pages are switched by recording page numbers to I O register see Section 2 8 5 Control register of page oriented access to NV SRAM 128 Base window address is selected in BIOS Setup settings by default D8000h see Section 5 6 2 5 NV SRAM Configuration Attention For using nonvolatile RAM it is required to install X40 switch 1 10 5 Read only memory FLASH BIOS In order to store Basic Input Output System hereinafter referred to as the BIOS the module uses FLASH memory microchip of 512 KB It is also possible to boot from the BIOS backup copy stored in the internal Flash memory integrated into Vortex86DX CPU microchip The module stores two BIOS copies primary and backup copy CPC152 are equipped with a mechanism of automatic switching to BIOS backup copy By turning the power ON the module will be booted from primary BIOS copy If an external watchdog is actuated which is integrated into ADM706T power supply supervisor microchip the module will be rebooted with a BIOS backup copy for automatic reboot it is required to install X8 jumper If X8 jumper is not installed the boot from the backup copy will be carried out only after manual hardware reset of the module reset button or remote reset port If you want to boot only from the primary BIOS copy it is required to install X1 jumper If X1 jumper is installe
95. n ate 21 1 9 Additional aceessorles t e hec Beta ertet 21 1 10 Gonstit ent parts of OPG152 x see rere oret rri e pees cantons ERR 23 SECTION tasadores 39 2 TECHNICAL INFORMATION a a 40 2 1 General technical specifications of 152 40 2 2 Allocation of hardware tensis teen ee nee 43 2 3 Ghannels of DMA mod ule atre tT sind 44 2 4 Q addtess Space tee i Dee ot ice s eL t EC ee eee eel a tud Mee ee IS dead Haee ie imet ptu 44 2 5 Memory address Space ur a ede ete et tn a 47 267 seo GEI ports eo MM cs Ee 10 ee A So pum ca sos Ac hr kd LO Les Len At eir 47 24 WDTIO WDTT watchdog tlmetrs ie eee eoe id de IER e ENTRAR 49 28 gt Descriptionof intemal registers A Ar Rer ene fay 54 2 9 Table of module cotinector Contacts is c erede eee ee Sade pets eode edna dae ber ture noue ver dabo vena bee beer ense RE ERR DO BERT 58 SECTION m Se 68 3 INSTALLATION AND 1
96. n the South Bridge Configuration settings and other parameters remained as by default in this case after system restart there will be displacement of the console COM port by 1 in such way that for console COM 4 parameters will be used the third succession among the available COM ports Table 5 6 Remote Access Configuration menu description Console settings Menu item Assignment Remote Access Console I O Disabled Console I O is deactivated October 2015 5 9 Basic input output system User Manual 152 BIOS Menu item Assignment Enabled Console I O is activated additional options of console I O parameters setting become available Serial port number Selection of console I O serial port COM1 COM port is used as console I O port COM2 port is used as console l O port COM3 CONS port is used as console I O port port is used as a console port Serial port mode Operation mode of the console l O port 115200 8 11 Data transmission speed115 2 kbaud 8 bit without parity check 1 stop bit 57600 8 n 1 Data transmission speed 57 6 kbaud 8 bit without parity check 1 stop bit 38400 8 n 1 Data transmission speed 38 4 kbaud 8 bit without parity check 1 stop bit 19200 8 n 1 Data transmission speed 19 2 kbaud 8 bit without parity check 1 stop bit 09600 8 n 1 Data transmission speed 9
97. nal settings of PCI plug and 92 October 2015 3 User Manual 152 Specification 5 4 5 MM 95 5B SE U Wh ee ev 98 5 6 sChipsetintegratediclevices 54 99 ELA 108 6 eR 109 TRANSPORTATION UNPACKING AND 5 110 ANNEXES A A RE 111 Tables of contacts for connecting sa sivas A A dd 112 B Frequently asked questions related to programming of 52 113 Terms abbreviations and Acronyms LU e ee Rr ee haa 114 October 2015 4 User Manual 152 Specification Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table List of tabl
98. ng to BIOS backup copy is deactivated in case of hang up during completion of the POST procedure the function is deactivated immediately after th start of BIOS Start Manufacturing Link Activating the mode of direct access to Primary IDE Master via a console COM port CPU Configuration It contains information on CPU manufacturer as well as items to control operation submenu of integrated Cache memory of CPU IDE Configuration Operation control of devices on IDE bus submenu Remote Access Console input output settings Configuration October 2015 5 4 Basic input output system User Manual 152 105 Menu item Assignment submenu USB Configuration Settings of USB ports These settings apply to all 4 USB ports submenu 5 2 1 CPU Configuration Screen of CPU Configuration menu is shown in Figure 5 5 description of items is given in the table 5 3 Fig 5 5 Screen of CPU Configuration menu BIOS SETUP UTILITY CPU Configuration Module Version 00 01 F Disabled Manufacturer RDC Enabled Brand String VortexS 6DX 9121 Frequency 600MHz Cache Li 16 KB L2 Cache Enabled Cache 12 256 KB select Screen x o ds TEEM E e Change Option v gut General Help m ORB Reset WDT E E zi e Save and Exit E SEDC Exit 02 61
99. nstallation and configuration 3 1 5 Binding and matching of COM1 port lines RS 422 485 Table 3 6 Binding and matching of COM1 port RS 422 485 X10 1 2 Signal TX RTXD via resistor 680 Ohm is brought up to the isolated power supply voltage of 5VS1 for generation of 200 mW displacement on Y Z lines X11 1 2 Signal TX RTXD via resistor 680 Ohm is brought up to the GNDS1 isolated ground i T E Connection of conforming resistor 120 Ohm between the lines TX X12 1 2 Selection of rate of rise mode limitation of output signal In this case the exchange speed is limited by the value of 250 Kb sec 3 1 6 Selection of COM1 port operation mode RS 422 485 Table 3 7 Selection of COM1 port operation mode RS 422 485 X13 1 2 8 3 1 7 Binding and matching of COM2 port lines RS 422 485 Table 3 8 Binding and matching of COM2 lines RS 422 485 X15 1 2 Signal TX RTXD via resistor 680 Ohm is brought up to the isolated power supply voltage 5VS2 for generating 200 mW displacement Y Z lines 16 1 2 Signal TX RTXD via resistor 680 Ohm is brought up to the GNDS2 isolated ground x ms Connection of conforming resistor 120 Ohm between the lines TX RTxD X17 1 2 Selection of rate of rise mode limitation of output signal In this case the exchange speed is limited by the value of 250 Kb sec 3 1 8 Selection of 2 port operation mode RS 422 485 Table 3 9 Selec
100. o NAND Flash IDE controller with integrated error correction and wear adjustment systems will be used and it is connected to IDE interface of CPU Primary Channel Attention Volume of integrated drive in CPC152 2 GB available volume 1 8 GB Attention In case of joint use of Compact Flash module and integrated FLASH drive as well as if only integrated FLASH drive without additional accessories connected to IDE ports is used it is recommended to set operation mode of the integrated FLASH drive to Primary Master using the group of jumpers X3 and X4 see Section 3 1 11 Purpose of integrated IDE devices Compact Flash cards of 1 2 types and external devices with IDE interface can be used as additional drive memory Selection of operation mode of Compact Flash and soldered FLASH drive Primary Master Slave is carried out using jumpers Integrated Flash drive is connected to IDE controller integrated into the CPU In this case its operation could require a standard IDE driver 1 10 7 Compact Flash XP1 The Compact Flash CF type Il device can be connected to the module via 1 N7E50 M516RB 50 3M and uses the same channel Primary that is used with UIDE interface In this case if it is used connection of only one IDE device is possible Compact Flash device as a storage can be operated in Master Slave modes as well as it can be used as a boot drive Attention USING THE MODULE UNDER
101. o Select Screen Select Item Enter Change Fi General Help m F6 Reset WDT PERI Save and Exit Exit 02 61 C Copyright 1985 2006 American Megatrends Inc Table 5 12 Description of Security menu Menu item Assignment Change Supervisor Change of password for system booting permission request is output during the Password P O S T procedure Change of password for access to BIOS Setup request at the time of entering Change User Password BIOS Setup Protection of boot sector against viruses Disabled Selection of this value deactivates boot sector protection against viruses Selection of Enabled value includes protection of boot sector against viruses If any program or virus executes Disk Format command or tries to write into the boot sector on a hard drive in this case Boot Sector Virus there will be a warning on the display Protection An attempt to address to the boot sector in case of activated Enabled protection the following messages will appear Boot Sector Write Possible VIRUS Continue Y N _ The following messages will appear in case of any attempt to format any hard drive via BIOS INT 13 Hard disk drive Service Format Possible VIRUS Continue Y N _ October 2015 5 19 Basic input output system User Manual 152 105 5 6 Chipset integrated devices Screen of Chipset menu is shown
102. ondition 3 V GPIO P3 6 input 0 battery needs to be replaced 1 battery is in proper operating condition Reset of trigger condition of WDT2 watchdog timer module restart GPIO PSN input output The line is configured as input by default October 2015 2 9 User Manual 152 Technical information 2 7 WDTO WDT1 watchdog timers Microchip of the Vortex86DX CPU is equipped with two adjustable hardware watchdog timers Access to registers of WDTO timer is carried out via 65h port and 22h ports Index address register and 23h Data register For accessing registers it is required to write the port address to the 22h port which data reading and or writing is carried out via 23h port Tables 2 20 2 28 contain detailed description of control registers of WDTO watchdog timer Access to the registers of WDT1 timer is carried out via 67h 6Dh ports The tables below 2 29 2 35 contain detailed description of control registers of WDT1 watchdog timer Table 2 16 WDTO restart register Bits Address Action 7 6 5 4 3 2 1 0 Writing RST_WDTO 65h Reading Any writing to this port will lead to the restart of WDTO timer Table 2 17 Index register of WDTO address port Bits Address Action 7 6 5 4 3 2 1 0 Writing ADDR_REG_WDTO 22h Reading ADDR_REG_WDTO Indicates address of the selected register of WDTO watchdog timer
103. ons of I O and memory submenu access October 2015 5 21 Basic input output system User Manual 152 105 Menu item Assignment Serial Parallel Port This option sets the address mode interrupt for serial and parallel ports Configuration submenu WatchDog Control of operation of WDTO WDT1 integrated watchdog timers Configuration submenu 5 6 2 Onboard Devices Screen of Onboard Devices menu is showm in the Figure 5 18 description of menu items is given in the Table 5 15 Fig 5 18 Screen of Onboard Devices menu Onboard Devices Configuration a ER m ct n n n n n n n n dn n n n n 5 718 Video IC Enabled CMIS8738 Audio Enabled Auto TRO 5 10 15 E Options uto m 5 IRQ 10 p uo Select Screen Select Item gt Change Option 1 1 m F6 Reset WDT Save and Exit X ESC Exit E 02 61 C Copyright 1985 2006 American Megatrends Inc Table 5 15 Description of NorthBridge Configuration menu Menu item Assignment SM718 Video IC Configuration of integrated controller SM718 Enabled Integrated video controller is activated Disabled Integrated video controller is deactivated CMI8738 IC Configuration of inte
104. operation mode 5 422 485 72 Binding and matching of COM lines 5 422 485 72 Selection of COM2 port operation mode 5 422 485 72 Setting the voltage level of remote reset actuation 17 73 Connection of integrated nonvolatile 73 Description ot Main cti to Ere Do Ro He Me Lot 82 Description of Advanced menu additional 05 83 Description of CPU Configuration 84 Description of IDE Configuration menu IDE controller 2 2 85 Description of Primary IDE Mastet moernl o ieii iio etario 86 Remote Access Configuration menu description Console 05 88 Description of USB Configuration menu Configuration of USB 90 Description of USB Mass Storage Device Configuration menu Configuration of USB 91 Description of PCI PnP menu additional settings of PCI Plug and 93 Description of the Boot menu boot 95 October 2015 5 User Manual 152 Specification Table 511 Description of the Boot Settings Conf
105. or user LED red green HL2 Activity of IDE devices green HL3 Indication of module s hardware reset green HL4 Indication of watchdog timer actuation red HL5 Indication of module s power supply green XS2 HL6 LED of network interface controller activity green 52 HL7 LED of network interface controller operation mode yellow HL1 LED is controlled via recording to the integrated circuit register FPGA input output space ISA bus 1 10 20 JTAG port XP9 JTAG XP9 connector is used during module production and represents a process connector 1 10 21 Acceleration pressure and temperature sensors As acceleration sensor a capacitance integrated sensor MMA8451Q Freescale is used With resolution of 8 14 bit this sensor enables to measure acceleration via three axes vibrations in ranges 2 4 8 g determine a slope angle free fall ripples and shocks The module also includes a digital integrated pressure sensor MPL115A2 Freescale which enables to measure pressure in the range from 50 to 115 kPa standard measurement accuracy amounts to 1 kPa in the operating temperature range from 20 to 85 C Additionally the module is equipped with temperature sensor LM92CIM National Semiconductor which enables to measure temperature on module s surface with resolution of 12 bit sign in the range from 55 to 125 C The sensor is located in the Vortex86DX CPU area Acceleration pressure and temperature sensors are
106. ory 256MB at 333MHz Select Screen Select Item Change Field Tab Select Field E General Help F6 Reset WDT 10 Save and Exit ESC Exit WoW ch A A oh oh A A A A Ak 8 8 ttt 22238207 System Date Tue 07 09 2013 v02 61 C Copyright 1985 2006 Table 5 1 Description of Main menu Menu item Assignment AMIBIOS Version current BIOS version Information on BIOS version Build Date build date of BIOS ID BIOS identifier Fastwel FPGA Firmware 505 Rev version of system PLD firmware versions and identifiers of integrated PLDs Processor Information on CPU installed on the module information field Vortex A9121 version of Vortex86DX CPU Speed CPU clock frequency System Memory Information on DDR2 SDRAM installed on the module information field volume of RAM and frequency of bus operation System Time Current time in format hour min sec System Date Current date in format month day year October 2015 5 3 Basic input output system User Manual 152 105 5 2 Advanced additional settings This menu tab contains items responsible for operation of the soldered ATA Flash Disk controller Cache memory of the CPU IDE bus console inpu
107. port RS 232 length 180 mm 500006 cable adapter IDC 10 D SUB port RS 232 length 1800 mm October 2015 1 9 User Manual 152 Brief description ACS00010 ACS00027 02 ACS00042 ACS00043 ACS00051 01 ACS00058 ACS00031 02 ACS00031 03 ACS00039 ACS00064 ACS00064 01 19001 19101 19201 19301 19401 5151 01 AIC324 01 AIC324 02 MIC23003 MIC23004 MIC23005 MIC23006 MIC23007 MIC23008 MIC23009 MIC23010 MIC23011 MIC23012 FC44 2 5 HDD connecting cable cable IDC2 10 D SUB 15F port VGA length 180 mm null modem cable 1 8 m cable adapter PS 2 PHR 6 MiniDIN 6F cable adapter 2x USB Type A Female 2x USB ports kit of Li battery 3 V with PHR 2 connector length 40 mm PHR 6 socket with contacts port PS 2 PHR 2 socket with contacts RESET PC Speaker VBAT ports Molex 22 01 2045 socket with contacts additional power supply connector connector for ribbon cable 89947 710LF VGA GPIO USB ports connector for cable 10073599 020LF FCI with contacts VGA GPIO USB ports ISA 8 mounting frame MicroPC 4 slots ISA 8 mounting frame MicroPC 8 slots ISA 8 mounting frame MicroPC 12 slots ISA 8 mounting frame MicroPC 3 slots desk mounted ISA 8 mounting frame MicroPC 6 slots wall mounted Power supply source 5V 6A 12V 1 6A 3 3V 3A isolation input output 1500V control system UPS function Analog digital input output module AIC324 104 analog to
108. product must not be reworked or altered in any way Any alterations and improvements not authorized by Fastwel Group Co Ltd company except those described in this Manual or obtained from the Fastwel Group Co Ltd technical support service in the form of a set of instructions describing their performance cancel the guarantee This device must be only installed into and connected to systems meeting all necessary technical and climatic requirements This relates to the operating temperatures range of the specific board design version The temperature limitations of the batteries installed on the board should be taken into account as well Please follow only the instructions of this Manual while performing all necessary installation and configuring operations Keep original package to store the product in the future or to transport it in case of a guarantee event Should it become necessary to transport or store the board pack it in the same way it was packed upon receipt Take particular care during handling the product and its unpacking Act in accordance with the instructions of the above section and Chapter 6 6 TRANSPORTATION UNPACKING AND STORAGE The Manufacturer s Guarantees Guarantee Liabilities The Manufacturer hereby guarantees the product conformity with the requirements of TU 4013 004 52415667 05 specifications provided the Consumer abides by the conditions of operation transportation storage installation and assembly
109. r Sets the source of interrupts on lines IRQ3 IRQ4 IRQ7 IRQ10 IRQ11 IRQ12 IRQ15 of the CPU Each line makes it possible to independently connect ISA bus interrupts IRQ3 IRQ4 IRQ7 IRQ10 IRQ11 IRQ12 IRQ15 as well as the SYSTEM EVENT external source of interrupts Power Fail event actuation of watchdog timer The port is also used for activation deactivation of buffer elements of ISA bus Bits Address 7 6 5 4 3 2 1 0 i15SEL 1 0 Code of IRQ15 line selector Possible options ISA IRQ15 b 00 by default ISASIRQ7 b 01 ISASIRQ3 b 10 SYSTEM EVENT b 11 i12SEL 1 0 Code of IRQ12 line selector Possible options ISA IRQ12 b 00 by default ISASIRQ3 b 01 ISASIRQ4 b 10 SYSTEM EVENT b 11 i11SEL 1 0 Code of IRQ11 line selector Possible options ISA IRQ11 b 00 by default ISASIRQ7 b 01 ISASIRQ4 b 10 SYSTEM EVENT b 11 7SEL 1 0 Code of IRQ7 line selector Possible options ISA SIRQ7 b 00 by default RSVD b 01 RSVD b 10 SYSTEM EVENT b 11 iSSEL 1 0 Code of IRQ3 line selector Possible options ISA IRQ3 b 00 by default RSVD b 01 RSVD b 10 ISASIRQ3 b 11 i4SEL 1 0 Code of IRQ4 line selector Possible options ISA IRQ4 b 00 by default RSVD b 01 RSVD b 10 ISASIRQ4 b 11 i10SEL 1 0 Code of IRQ10 line selector Possible options ISA IRQ10 6 00 by default ISASIRQ7 b 01 ISASIRQ3 b 10 SYSTEM EVENT b 1 ISAE Control of buffer elements of IS
110. r base addresses 3F8h and 2F8h in BIOS Setup settings which corresponds to the standard allocation of addresses for COM1 COM2 set by default in BIOS Setup settings 4 5 Interface BIOS SOC Vortex86DX for reading serial number MAC address for storing system parameters FRAM array is used In order to store the whole system information a volume equal to 1KB is used it can be subject to minor changes depending on BIOS revision 4 5 1 Array structure _FRAM STRUCT db 256 dup 0 Reserve for storage of CMOS copy dSerNum dd 0 Module serial number wMac dw 21 1 1 MAC address of integrated LAN _FRAM ENDS Parameter values transfered in CPU registers are given below In case of a wrong number of AL function AX 1 OFFFFh is returned 4 5 2 Obtaining module serial number Input AL 6 Output AX Result code 0 no error CX DX serial number 4 5 3 Reading of MAC address of integrated LAN control from the FRAM area Input AL 8 Result code 0 no error October 2015 4 2 User Manual 152 Intended use of CPC152 Output SI CX DX MAC address The function returns the value stored in the area of MAC address of FRAM Actual value used by the controller can vary if it was overwritten to the registers of controller by application software 4 6 Interface BIOS SOC Vortex86DX for reading writing to FRAM Integrated nonvolatile memory is also available for storing user data In
111. r storing data it is possible to use both an integrated drive and external USB and IDE devices In addition to the standard MicroPC extension bus ISA 8 bit the module is equipped with PC 104 bus ISA 8 16 bi which makes it possible to connect extra extension modules to 152 152 can be connected to RS 232 RS 422 485 Ethernet networks which enables to use the module in distributed I O data processing systems 1 2 General information m CPU Vortex86DX 600MHz 32 bit x86 core 16 bit memory bus L1 Cache 32 KB L2 Cache 256 KB System bus frequency 333 MHz RAM soldered DDR2 SDRAM 256 Flash drive PATA NAND Flash controller with integrated system of ECC control and wear 2GBNAND Flash SLC m FLASH BIOS a 256 KB modifiable within the system and back up copy Automatic switching to the backup copy in case of error when booting the primary copy m Integrated nonvolatile memory Internal memory 256 byte a 8 FRAM SPI used for storing configuration calibration factors of sensors a 128 KB SRAM ISA Consumption current from 3 V battery when the power is OFF 4 mkA 2 consumption current from battery when the power is ON 2 mkA 1 Available volume of integrated drive 1 8 GB Standardized value under normal conditions humidity from 5 to 95 25 3 Standardized value under normal conditions humidity from 5 to 95 25 October 2015 1 1
112. rd PCI IDE Operation control of integrated PCI controller of IDE bus Controller Primary operation is permitted Disabled operation if prohibited Primary IDE Master It contains information on the connected IDE device operating in the Master mode submenu Fig 5 5 table 5 3 Primary IDE Slave It contains information on the connected IDE device operating in the Master mode submenu Menu structure is gully identical to the Primary IDE Master menu structure Fig 5 5 table 5 3 Hard Disk Write Protect Permission to set the access lockout for writing to IDE devices Enabled Set the lockout Disabled lift the lockout IDE Detect Time Out Waiting limit for determination of ATA ATAPI device in seconds The following Sec values are available 0 5 10 15 20 25 30 35 ATA PI 80Pin Cable Selection of a way for determination of 80 wire ATA PI cable D erection Host amp Device check from the side of system and IDE devices Host check only from the side of system Device check only from the side of IDE devices October 2015 5 6 Basic input output system User Manual 152 105 5 2 2 1 Primary IDE Master Configuration of IDE Primary Master Screen Primary IDE Master menu is shown in the figure 5 7 description of items is given in the table 5 5 IDE Primary Slave menu is fully identical to the Primary IDE Master menu Fig
113. re line NMI has Z condition IOCHK ISA IOCHK indicator 1 active level of ISA_IOCHK signal PEO POWER FAIL indicator 1 reduction of input power supply 5V lower than the level of 4 65 V WDO WATCHDOG Timeout indicator 1 actuation of the watchdog timer WDT2 integrated into the supervisor EXT RMTRES indicator 1 external source of reset interrupt 17 18 Attention SYSTEM EVENT is generated over or from the following sources Power Fail reduction of power supply voltage value down to the level of 4 65 V WatchDog Timeout actuation of the external watchdog timer RMTRES external source of reset interrupt XP17 XP18 Signal of NMI CPU is generated over or from the SYSTEM EVENT and SA IOCHK sources October 2015 2 16 User Manual 152 Technical information Attention After each interrupt generation ISA POWER WATCHDOG Timeout RMTRES events it is required to reset a relevant interrupt flag by consecutive writing of 0 and then 1 into the relevant bit of interrupt permission If this is not done there will be no further generation of interrupts from this port E g after generation of interrupt over RMTRES event in the interrupt handler it is required to first reset the EXT flag in 0 and then set it into s 2 8 5 Register of interrupts control of ISA bus controlle
114. rent limitation mode of no less than 2 0 A When choosing the power supply source consideration should be given to the starting current of CPC152 and consumption current of extension modules and other devices connected to the ports of CPC152 The module is equipped with a soft start mechanism enabling to reduce the maximum value of starting current during the voltage supply Module s start delay after voltage supply amounts to 200 msec approx no more than Additional measures should be taken in order to provide particular level on lines of I O ports within a period of 200 msec after power supply October 2015 1 5 User Manual 152 Brief description Table 1 1 Power supply Operating range of power voltage V supply voltages V Load current A Starting current A Requirements to parameters of the power supply source 1 5 PS 2 Keyboard amp Mouse Port Ethernet Port 10 100Mb 4 x USB 2 0 Fig LPT IDE XP16 Block diagram of CPC152 1 1 Compact Flash Socket Block diagram of CPC152 CRT TFT Audio PS 2 15 CRT S1D13781 NAND Flash 2 Gbyte ATA Flash Controller IDE LPT DDR2 SDRAM 256 Mbyte SPI SM718 4 8 bit STN LPT Port GPIO Port External Watchdog BUFFERS Opto Isolation 8 bit ISA
115. rican Megatrends Inc Table 5 11 Description of the Boot Settings Configuration menu Menu item Assignment Quick Boot Disabled Selection of this value ensures the complete self testing of the system during power on Enabled Selection of this value enables to reduce the number of tests during the power on and this way to speed up the booting process Add On ROM Display Mode Force BIOS This value permits to output data to monitor from BIOS extension cards during the system booting Keep Current This value enables computer system to display only P O S T information during the booting process Bootup Num Lock Off Bootup Num Lock is OFF On Bootup Num Lock is ON PS 2 Mouse Support Disabled Support is deactivated Enabled Support is activated Auto Automatic support detection Recommended value Wait for F1 If Error Waiting for F1 button pressing in case of an error October 2015 5 17 Basic input output system User Manual 152 BIOS Menu item Assignment Disabled This option does not require waiting for user s interference in case of an error This value should be selected only if you know the reason why the BIOS error is occurred Enabled Permit BIOS system to wait for pressing the F1 button in case of an error during booting Hit DEL Message Display of Hit Del to enter Setup message during memory initialization press
116. rmation User Manual Table 2 28 CNTO register of WDT1 timer value Bits Address Action 7 6 5 4 3 2 1 0 6Ah Writing WDT1_CNTO 00h Reading WDT1_CNTO WDT1_CNTO Bits 7 0 of WDT1_CNT counter 23 0 of WDT1 timer The counter has a resolution of 30 5 us Table 2 29 CNT1 register of WDT1 timer value Bits Address Action 7 6 5 4 3 2 1 0 6Bh Writing WDT1_CNT1 00h Reading WDT1 CNT1 WDT1_CNT1 Bits 15 8 of WDT1_CNT counter 23 0 of WDT1 timer The counter has a resolution of 30 5 us Table 2 30 2 register of WDT1 timer value Bits Address Action 7 6 5 4 3 2 1 0 6Ch Writing WDT1 CNT2 00h Reading WDT1 CNT2 WDT1_CNT2 Bits 23 16 of WDT1_CNT counter 23 0 of WDT1 timer The counter has a resolution of 30 5 us Table 2 31 Register of WDT1 timer condition Bits Address Action 7 6 5 4 3 2 1 0 6Dh Writing WDT1 WDTF 00h Reading WDT1 WDTF WDT1 WDTF Flag of WDT1 timer actuation 1 there was a timer actuation record 1 into this bit resets the flag 0 there was no timer actuation October 2015 2 14 User Manual 152 Technical information 2 8 Description of internal registers 2 8 1 Register of base address BA control Used for setting the base address for module s internal registers BA 9 6 Enables to
117. rmed booting from the main BIOS GPIO_P1 1 input output Reserved logics of switching to backup BIOS copy Actuation of protection of USB ports power supply GPIO_P1 2 input 0 actuation was performed 1 actuation was not performed Error malfunction in operation of of the RS 422 485 GPIO transceivers COM1 COM2 P1 3 input 0 there was no malfunction 1 there was a malfunction Connection of 120 Ohm terminator to A B lines of COM1 port RS IO P14 422 485 GPIO_P1 4 output 0 120 Ohm terminator is not connected 1 120 Ohm terminator is not connected Connection of 120 Ohm terminator to lines of COM2 port RS P1 422 485 _ 1 5 output 0 120 Ohm terminator is not connected 1 120 Ohm terminator is not connected When setting the GPIO_P16 port to the output permit of operation of WDT2 watchdog timer integrated into the power supply GPIO_P1 6 input output supervisor 0 WDT2 watchdog timer is prohibited 1 WDT2 watchdog timer is permitted Control of the integrated FLASH drive 0 is deactivated GPIO P1 7 input 1 is activated Line control only via BIOS Setup GPIO line control only via CPU registers is not permitted port lines are routed to the XP10 connector GPIO_P2 7 0 input output The lines are configured as input by default GPIO_P3 3 0 Reserved SPI FRAM interface GPIO_P3 5 4 Poe Reserved I C interface Lithium battery c
118. rt For operation with GPIO ports by two 8 bit registers per port will be used date register and direction register Each data register bit is matched with the relevant circuit on the board Bit 0 corresponds to the line of 0 port GPIO 0 bit 7 corresponds to the line of 7 port GPIO Px7 etc Each bit of the direction register is matched with the respective circuit on the board Bit 0 corresponds to the line of 0 port GPIO_Px0 bit 7 corresponds to the line of 7 port GPIO Px7 etc Table 2 14 GPIO control registers Dataregister Dataregister Direction register A Line is an input y 1 Line is an output Purpose of the used GPIO ports is specified in the table below October 2015 2 8 User Manual 152 Technical information Table 2 15 Purpose of GPIO ports Reserved GPIO PO 2 0 input output Lines used for configuring PLD GPIO Po 3 input from temperature and accelerometer sensor Active Reserved Lines used for configuring PLD GPIO PO 5 input output deactivation of video processor switching to power saving mode Reserved GPIO_PO 6 Lines used for configuring PLD Reset of external watchdog timer changing the output state to the GPIO_PO 7 input output contrary restarts the WDT2 watchdog timer Activation flag of WDT2 external watchdog timer GPIO_P1 0 input 0 actuation was performed booting from backup BIOS 1 actuation was not perfo
119. s Select Remote Access E WoW A 4 A n n o o Nm tthttt type Serial port number COM3 Base Address IRQ 3F8h 4 Serial Port Mode PA Flow Control None Redirection After BIOS POST Boot Loader Terminal Type ANSI VT UTF8 Combo Key Support Disabled Sredir Memory Display Delay No Delay Terminal Display Mode Recorder Mode o Select Screen Terminal Size 80 X 25 Select Item F Option Manufacturing Link Mode Disabled Fi General Help F6 Reset WDT F10 Save and Exit ESC Exit 2 61 C Copyright 1985 2006 1 Megatrends Inc Attention Console 1 module integrated into BIOS carries out scanning of the available COM ports during system start Scanning is carried out using base addresses the following sequence 0x3F8 0x2F8 0x3E8 0x2E8 In BIOS Setup Advanced gt Remote Access Configuration section the first available port obtains the number of COM1 and further in the right order If the number of available COM ports changes during the next start of the system e g by changing the settings of SouthBridge Configuration gt Serial Parallel Port Configuration in this case it can result in a displacement of actual base address and COM port used for console E g if COM3 has been selected as a console port and then COM 1 has been deactivated i
120. sion in the shape of XP15 connector 5 104068 6 AMP is provided This extension is designed for connection to CPC152 module of KIB98102 interface board Connection to KIB98102 is carried out by cables 500015 300 mm 500015 02 120 mm 500015 03 140 mm or 500015 02 500 mm For proprietary manufacturing of the cable for connection to the 98102 interface board it is recommended to use a 60 pin socket 1 111196 2 AMP with a pitch of 1 27 mm and a ribbon cable 57013 3 AMP October 2015 1 25 User Manual 152 Brief description Fig 1 16 External view of XP15 connector Attention It is not recommended to use 98101 interface board jointly with the CPC152 CPU Module While connecting KIB98101 interface board instead of KIB98102 to 152 there are the following limitations Power supply of the TFT panel is possible only by a 5 V level it is required to choose 5V power supply voltage using the X6 jumper proper operation of TFT panel in this case is not guaranteed e Limited functionality of Audio port lack of electret microphones support additional noises in LINE_IN LINE_OUT channels For the connection of such devices as HDD 2 5 HDD 3 5 LPT in CPC152 module an extension in the form of XP16 connector is provided This extension is designed for the connection of KIB98201 interface board Connection to 98102 is carried out by cables 500016 300 mm 500016
121. t Output DRQ2 Input A7 502 Input Output Power supply A8 SD Input Output Input 9 SDO Input Output Power supply Input B10 GN Power supply AEN Output B11 Output Output B12 Output Output B13 Output Output B14 Output Output B15 Output Output B16 Input Output B17 Output Output B18 Input Output B19 Output Output B20 Output Output B21 Input SA9 Output B22 IRQ6 Input SA8 Output B23 Input SA7 Output B24 Input SA6 Output B25 Input SA5 Output B26 Output SA4 Output B27 Output SA3 Output B28 Output SA2 Output B29 5V Power supply SA1 Output B30 OSC Output SAO Output GND Power supply October 2015 2 28 SECTION 3 INSTALLATION AND CONFIGURATION User Manual 152 Installation and configuration 3 INSTALLATION AND CONFIGURATION The module can be installed into MicroPC mounting baskets ISA compatible mounting frames or connected by a flexible ribbon cable with edge connectors to other modules Attention Installation into PC slots can bring module out of operation Attention The module contains sensitive components Installation removal connection of module with its power on as well as a static discharge from your hands can damage the module Attention During installation it is required to observe the proper orientation of module connectors towards connectors of the backplane Fig 3 1 Diagram of CPC152 module connection to backplane O O A31 and B31 contacts of edge connector Backplane
122. t output and USB devices Screen of Advanced menu is shown in Figure 5 4 description of items is given in the table 5 2 Fig 5 4 Screen of Advanced menu BIOS SETUP UTILITY Main Advanced PCIPnP Boot Security Chipset Exit Advanced Settings Configure Remote WoW A Access WARNING Setting wrong values below sections may cause system to malfunction Embedded NAND Flash Disabled Reserve BIOS Switch by WDT Enabled E Start Manufacturing Link n Module Temperature te Es USB Power Overcurrent not found Main Reserve BIOS Main Select Screen CPU Configuration 4 Select Item IDE Configuration Enter Go to Sub Screen F1 General Help USB Configuration F6 Reset WDT F10 Save and Exit MES Exit E ee oW Non ee 702 61 C Copyright 1985 2006 American Megatrends Inc Table 5 2 Description of Advanced menu additional settings Menu item Assignment Embedded NAND Flash Operation of soldered ATA Flash Disk controller is permitted FLASH disk Enabled operation is permitted Disabled operation if prohibited Reserve BIOS Switch by Control of switching to BIOS backup copy WDT Enabled function of switching to BIOS backup copy is activated in case of hang up during completion of the POST procedure Disabled function of switchi
123. the devices connected to the port When connecting external devices common wire connector XP10 output 10 connection is obligatory GPIO port is routed to the XP10 connector 98424 G52 10LF FCl October 2015 1 15 User Manual 152 Brief description For manufacturing cable for GPIO port it is recommended to use the 10 pin socket for ribbon cable with a pitch of 1 mm 89947 710LF Fig 1 4 Numbering of XP10 connector contacts 1 10 10 Serial ports COM1 2 3 4 XP3 XP4 XP6 XP7 CPC152 has 4 asynchronous serial ports COM1 XP3 connector COM2 XP4 connector RS 422 485 4 2 wire power XP6 connector COM4 XP7 connector RS 232 full 9 wire interface Exchange rate via serial ports be set in the BIOS Setup settings Exchange rate is defined by the value of CPU frequency divider register Divider s value is calculated by the formula DIV 16 BR BR F DIV 16 F frequency of internal generator MHz 1 8432 or 24 DIV divider s value for F 1 8432 MHz minimum value DIV 1 for F 24 MHz minimum value DIV 2 BR required speed of exchange bit sec Attention The receiver tolerates deviation of the exchange speed value by 3 0 to the lesser side and by 2 5 to the greater side The table below contains frequency divider s values for a number of exchange speeds using an internal generator 8432 MHz and 24 MHz October 2015
124. tion of COM2 port operation mode RS 422 485 18 1 2 amp 1 x19 1 2 Half duplex mode 18 From this point on write of Xnn 0 0 view means that the specified jumper is open October 2015 3 4 User Manual 152 Installation and configuration 3 1 9 Setting the voltage level of remote reset actuation XP17 Table 3 10 Setting the voltage level of remote reset actuation XP17 X23 2 3 Range of actuation voltages 10 V 30 V 3 1 10 Connection of nonvolatile RAM Table 3 11 Connection of integrated nonvolatile RAM X40 1 2 Integrated nonvolatile RAM of 128 KB is connected 3 2 Configuration of module s parameters BIOS SETUP Parameters of CPC152 module configuration are stored in the internal nonvolatile memory FRAM and can be changed in BIOS Setup Setting configuration parameters for CPC152 is carried out during module s booting while pressing the lt De1 gt button on the keyboard connected to the PS 2 or USB port by F4 button on the keyboard of the remote terminal when connection the module via a console serial COM port Description of BIOS Setup settings is given in Section 5 Basic Input Output System BIOS October 2015 3 5 SECTION 4 INTENDED USE OF CPC152 User Manual 152 Intended use of CPC152 4 Intended use of CPC152 4 1 Basic software At the time of delivery the integrated FLASH drive of CPC152 contains programs ensuring operating readiness of the dev
125. tor a top view of the module b bottom view of the module with personal organizer installed on the connector B1 B32 1 A32 co C19 DO D19 6 1 10 18 MicroPC extension bus ISA 8 bit Edge connector MicroPC XS6 is designed for installation of CPC152 into MicroPC mounting frame and for extension of system functionality by way of installing extension modules in MicroPC format into the frame lt is possible to install no more than 8 extension modules in MicroPC format Attention Connection of FDDs in MicroPC format is not supported however connection of an external drive to the USB port 1 10 19 Diagnostic LEDs For indication of various conditions the module is equipped with separately located LEDs as well as 2 LEDs integrated into the XS2 connector The LEDs are installed from TOP side Purpose of module s LEDs is specified in the table October 2015 1 23 User Manual 152 Brief description Table 1 5 Purpose of CPC152 LEDs LED Function HL1 Two col
126. ts of motor railroad or airborne vehicles under storage conditions 5 as per GOST 15150 69 or under storage conditions 3 during transportation by sea It is allowed to transport modules packed in individual antistatic bags in factory multipacks Packed modules must be transported pursuant to the cargo transportation rules applicable to this mode of transport During loading and unloading work and transportation packed modules must not be exposed to jerks falls shocks and atmospheric precipitation The stowage of packed modules in a vehicle must exclude their shifting 6 2 Unpacking The modules that were transported at subzero ambient temperature must be stored for 6 hours under storage conditions 1 as per GOST 15150 69 before they can be unpacked Placing packed modules in front of a heat source before their unpacking is forbidden In the process of the modules unpacking one must observe all the precautions ensuring their safety and marketable appearance of the factory packages Upon unpacking the modules must be checked for external mechanical damage after transportation 6 3 Storage Modules storage conditions 1 as per GOST 15150 69 IEC721 October 2015 5 1 ANNEXES Tables of contacts for User Manual 152 connection of displays ANNEXES A Tables of contacts for connecting displays Table A 1 Table of cable contact for connection of 4 bit STN EL displays to LPT port SGD DEMO or LPT connector EL240
127. turing Manufacturing Link mode Enables to gain access to the connected data storage Link Mode media using the special purpose software via COM port selected Disabled Support is deactivated Enabled Support is allowed 5 2 4 USB Configuration Screen of USB Configuration menu is shown in Figure 5 9 description of the items is given the Table 5 7 Fig 5 9 Screen of USB Configuration menu BIOS SETUP UTILITY USB Configuration Enables support for ERRATA legacy USB AUTO Module Version 2 24 2 13 4 option disables LJ legacy support if USB Devices Enabled no USB devices are 1 Keyboard 1 Mouse 1 Hub connected USB 2 0 Controller Mode HiSpeed E BIOS Hand Off Enabled a Select Screen E m SS Select Item E NEL Change Option igal General Help 6 Reset WDT E ESC Exit 02 61 C Copyright 1985 2006 American Megatrends Inc Table 5 7 Description of USB Configuration menu Configuration of USB ports Menu item Assignment Legacy USB Support Support of Legacy USB mode Disabled Legacy USB mode is deactivated Enabled Legacy USB mode is activated Auto Legacy USB mode is activated only if at least one USB device is connected October 2015 5 11 Basic input output system User Manu
128. vitation C gt 4 For booting of operating system without execution of commands of CONFIG SYS and AUTOEXEC BAT files after power on or RESET it is required to press combinations of lt Ctrl B gt or lt Ctrl C gt keys PC keyboard for step by step execution of commands 4 3 Module operation wit AT keyboard and CRT display TFT panel When connecting an AT keyboard and CRT display or TFT panel to the module via KIB98102 interface board using an integrated video controller or by using an external MicroPC or PC 104 video adapter the CPC152 module can be used as a standard AT x86 compatible PC In this case start and debugging of programs is carried out as usual and is not described here October 2015 4 1 User Manual 152 Intended use of CPC152 4 4 Loading files with FTRANS EXE program File exchange between PC and CPC152 module is performed using the ftrans exe utility For exchanging files it is required to carry out the following activities set the connection between PC and CPC152 start the ftrans exe program with the required parameters see integrated program help within no more than 50 seconds from the start of ftrans exe program to carry out the required activities specify the transfer direction file name etc in SmartLINK program or other terminal program see program description In order to use the FTRANS utility for remote loading of files via COM3 COM4 ports it is required to specify thei
129. will be carried out automatically and module will be started with default settings The used PC should be equipped with installed OS Win32 WinNT 2000 XP Syntax cmos_rst exe COM where COM number of the COM port used in PC COM1 by default October 2015 4 4 SECTION 5 BASIC INPUT OUTPUT SYSTEM BIOS Basic input output system User Manual 152 BIOS 9 BASIC INPUT OUTPUT SYSTEM BIOS In order to enter the BIOS Setup it is required during system booting and at the time of the POST Power On Self Test procedure to press the DEL button on the keyboard or F4 button on the keyboard of a console PC the Console Redirect option should be on Example of the POST procedure screen is shown in Figure 5 1 Fig 5 1 Screen view during module booting process POST Inc 18 00 15 Main BIOS modu No WDT activation Initializing USB Controllers Done 256MB OK USB Device s 1 Keyboard 1 Mouse 1 Hub 0075 Using the BIOS Setup Utility it is possible to change BIOS Basic Input Output System parameters and control special modes of module operation This program uses the system menu for making changes as well as for activation or deactivation of special functions Information fields highlighted with grey font color are designed for output of additional information on module and or module settings and are not available for changing by the user When describing menu items values set by default
130. witched off when the control is transferred to operating system In case of jumper is installed which enables automatic switching to BIOS back up copy then in case of an error during BIOS code execution an automatic system reset and system boot from back up copy will be carried out In this case BIOS Setup settings will be reset to default settings Attention For CPC152 using an external watchdog timer WDT2 in application programs it is required to turn OFF an automatic switching to the BIOS back up copy see Section 3 1 9 Switching to BIOS booting from the primary reserve source 1 10 3 Random Access Memory RAM As system memory the module uses dynamic memory DDR2 SDRAM with a total volume of 256 MB Bus operation frequency 333 MHz No memory extension module is to be installed October 2015 1 11 User Manual 152 Brief description 1 10 4 Nonvolatile memory NV SRAM The module is equipped with integrated nonvolatile memory 256 byte for storage of configuration data CMOS recorded by SETUP program integrated into BIOS In addition the use of integrated FRAM 64 KB or static nonvolatile memory of 128 KB is possible Line GPCSO of address decoder integrated into CPU is used for accessing static nonvolatile memory For work with nonvolatile RAM it is required to install the relevant option in BIOS Setup settings as well as install respective jumpers Access to the nonvolatile RAM page oriented page s

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