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1. a o a E ay kaul g 8 92 sk ular lt 5 E gt O 998 c IS 8 en 92 8 gt lo o E el ha ba Sa lt 58 F L dim i ta 9 o c c o o rx o m o a 4 50 66 Doc ID 023566 Rev 1 Schematics UM1564 STM32373C EVAL RS 232 and IrDA Figure 29 r 5 19 89945 210 6 VAISZECSAVAS OELECEWLS 00 9NG4L 218 6 V _ mod GOA VANS 9e ru E 08 xiziuven lt 23 21 1 2 D HH EH NOUS reri 31001 Wn GOA 0219 po gt T a ED o 2 now cer M 01008 oz ors MIS li 2 dum maven gt 1 3001 p 12 NU ziuvsn eru ega 22 O REA eo oin 300 v 5 51 66 Doc ID 023566 Rev 1 UM1564 Schematics STM323
2. 20 18 16 14 12 108 6 4 2 MS30946V1 Table 33 JTAG SWD debugging connector CN17 Pin number Description Pin number Description 1 VDD power 2 VDD power 3 4 4 5 15 6 7 1 8 9 14 10 11 RTCK 12 GND 13 PB3 14 GND 15 RESET 16 GND 17 DBGRQ 18 GND 19 DBGACK 20 GND 3 14 Power connector CN18 The STM32373C EVAL evaluation board can be powered by a DC 5V power supply via the external power supply jack connector CN18 shown in Figure 20 The central pin of CN18 must be positive Figure 20 Power supply connector CN18 front view GND Front view amp 19146 ky Doc ID 023566 Rev 1 41 66 Connectors UM1564 3 15 ST LINK V2 programming connector CN19 Connector CN19 is used only for embedded ST LINK V2 programming during board manufacture It is not populated by default and not for end user 3 16 TFT LCD connector CN20 A TFT color LCD board is mounted on CN20 Please refer to Section 2 24 Display and input devices for more details 3 17 Audio jack CN21 A 3 5 mm stereo audio jack CN21 connected to audio DAC is available on STM32373C EVAL board 3 18 ST LINK V2 USB type B connector CN22 USB connector CN22 is used to connect the embedded ST LINK V2 to the PC for board debugging purposes Figure 21 USB type B connector CN22 front view MS18660V1 Table 34 USB type B connector CN22 Pin number Description Pi
3. 23 219 26 220 Anal g Input isses bebas eR Benes SOS UR PARES Edd xe RR EE 28 2 21 Polenti meler L E EA PER 28 222 A err 29 2 23 Temperature 5 29 2 24 Display and input devices 30 2 66 Doc ID 023566 Rev 1 UM1564 Contents 3 L suu sal gua D ECOL A i Que 31 3 1 HDMI sink connector 1 31 3 2 HDMI source connector CN2 31 3 3 RF EEPROM daughterboard connector 32 3 4 CAN D type 9 pin male connector CN5 32 3 5 MicroSD connector 7 33 3 6 Sigma Delta ADC connector CN9 33 3 7 SAR ADC DAC connector CN10 34 3 8 SAR ADC DAC connector CN11 34 3 9 RS 232 connector as aer ee Xe eee 35 3 10 Daughterboard extension connectors CN13 and CN14 36 3 11 Trace debugging connector CN15 40 3 12 User USB type B connector CN16 40 3 13 JTAG SWD debugging connector 17 41 3 14
4. 57 STM32373C EVAL ECG and pressure 58 MB989 LCD 59 STM32373C mechanical 64 Doc ID 023566 Rev 1 5 66 Overview UM1564 1 1 1 2 6 66 Overview Features Four 5 V power supply options Power jack ST LINK V2 USB connector User USB connector Daughterboard 125 audio DAC and stereo audio jack 2 Gbyte or more SPI interface MicroSD card I2C compatible serial interface temperature sensor EEPROM and RF EEPROM dual interface EEPROM RS 232 communication IrDA transceiver JTAG SWD and ETM trace debug support ST LINK V2 embedded 240x320 TFT color LCD connected to SPI interface Joystick with 4 directional control and selector Reset wakeup or tamper and key button 4 color user LEDs and 2 LEDs as MCU power range indicators pressure sensor and PT100 temperature sensor connected to 16 bit sigma delta ADC of the STM32F373VCT6 Extension connectors for daughterboard or wrapping board Microcontroller voltage choice 3 3 V or adjustable from 2 0 V to 3 6 V USB FS connector Touch slider RTC with backup battery CAN2 0A B compliant connection Light dependent resistor LDR Two HDMI connectors with DDC display data channel and CEC IR transmitter and receiver Two ADC and DAC input and output sig
5. connected to a fixed 3 3 V DC power supply when JP12 is set as shown to the right 123 22 JP12 This is the default setting VDD is connected to an adjustable DC power supply from 2 0 123 V to 3 6 V when JP12 is set as shown to the right eoe VDDA power is connected to VDD when JP13 is set as shown to the right 123 This is the default setting JP13 2 VDDA power is connected to a fixed 3 3 V DC power supply 123 when JP13 is set as shown to the right e e Note VDD is adjustable from 2 0 V to 3 6 V However to take component tolerance into account and to guarantee that VDD does not exceed the chip range specification VDD is ideally designed to be adjusted from 2 1 V to 3 5 V on the board JP17 is connected with the VDDA power supply and the SD VREF pin of the microcontroller The default setting is closed When the SD VREF pin needs an extended reference level please open JP17 and connect the extended reference to pin 1 the top pin of JP17 LED 108 is lit red when the STM32373C EVAL evaluation board is powered by 5 V DC power supply LED LD6 is lit red when the microcontroller is powered by VDD 2 4 V low voltage LED LD5 is lit green when the microcontroller is powered by VDD gt 2 4 V Doc ID 023566 Rev 1 13 66 Hardware layout and configuration UM1564 2 3 14 66 Power modes A total of three power modes are supported on the board and can be configured by setting
6. vs 0 23 0 0 YOLOANNOO 3ZWSIW 15 w c iV INISQ Ov 75 GIA ws vin Doc ID 023566 Rev 1 56 66 Schematics UM1564 STM32373C EVAL PT100 temperature sensor and connectors Figure 35 v SL 40 989945 2102 6 2 8120 eH 6gWi qunN 90sueg duie 00 LAYAI OELEZENLS Sni S2IUOJ 29 90J9I A LS GLIWLS 00 1 4 00 14 jueun N 400 311116012 AIVLE9ASL 2044 12019 Y 4 m cu 311119010 nov Josueg 57 66 Doc ID 023566 Rev 1 UM1564 Schematics STM32373C EVAL ECG and pressure sensor Figure 36 v 5 0 919945 210 6 8 6gWi qunN 1054959155914 8995 3 981868 15 em S LAV2E9ASL ZOLZXdW SA GOV NOV NOV ZN 18 709 5 any Dit 001 AB VZ9AS L 260 8819 7604 260 6 7
7. yq 9 10 99UU0D ND A are X Ter 8 1991 D 3 amp x os I 05 cus avo oS FA 9 8 St viaa DA HE na E yz ERN cas Zidd g 110058 NOH 01902 co SL ___12 _8 _____ 45 10 80 a neojddeids 10 3 Oldd vb Mu od 804 giu s Te Ds OW ZI 25 HM 89 9 s sad S so 7047772 Sd ZL sq ee See eT Oa sa or FS dedu usi si 0 y BISA 1991 8 E 91 r E EXER cue ISAM s ln z UNO Ej ZH ai Ej amp L Kd 19 So 29 v D z STM32373C EVAL pinout UM1564 Appendix A STM32373C EVAL pinout 60 66 Table 35 STM32373C EVAL pinout Fn Pin name Description no 1 PE2 TRACECLK SPI3 CS uSDcard 2 TRACEDO uSDcard Detect 3 4 TRACED1 SHIELD 4 TRACED2 SHIELD CT 5 PE6 WKUPS3 TRACED3 WKUP JOYSTICK SEL 6 VBAT VBAT 7 PC13 TAMPER WKUP2 8 PC14 OSC32 IN OSC32 IN 9 PC15 OSC32 OUT OSC32 OUT 10 PF9 JOYSTICK RIGHT 11 PF10 JOYSTICK UP 12 OSC IN OSC IN 13 PF1 OSC OUT OSC OUT 14 NRST NRST 15 PCO LED1 16 PC1 L
8. Table 30 Daughterboard extension connector CN14 Pin Description Alternative function How to disconnect Trom function block on STM32373C EVAL board 1 GND 3 PD14 SLIDER_3 Remove R11 close SB9 5 PD11 AUDIO_RST Remove R79 7 PD9 9 PC13 11 RESET 13 PB15 15 PB10 17 PE14 PRESSURE_TEMPERATURE Remove R196 19 D5V 21 PE11 ADC_SD Remove R39 23 PFO OSC IN Remove X2 C18 close SB23 25 PE9 PRESSURE N Remove R21 C9 close SB17 27 PE8 PRESSURE P Remove R23 C10 close SB16 29 PB2 1 8V Remove R98 31 PB1 ADC POT IN Remove R52 C62 33 PC5 USB DISCONNECT Remove R51 35 PA7 COMP2 OUT LED Remove R22 37 PA5 ADC DAC SAR2 Remove R40 39 GND 41 COM Remove R54 43 PA1 LDR OUT Remove R62 45 PF2 JOYSTICK DOWN Remove R67 47 PC2 LED3 Remove R77 49 PCO LED1 Remove R88 2 PD15 SLIDER CT Remove C7 close 588 4 PD13 SLIDER 2 Remove R12 close SB10 6 PD12 SLIDER 1 Remove R13 close SB11 8 PD10 10 GND 12 PD8 14 PB14 16 PE15 18 1 38 66 Doc ID 023566 Rev 1 ky UM1564 Connectors Table 30 Daughterboard extension connector CN14 continued Pin Description Alternative function How 51 20 12 Remove R14 close SB13 22 PE10 24 VDD 26 PF1 OSC OUT Remove R38 close SB24 28 7 IN Remove C11 C17 R34 close SB18 30 GND 32 PBO MIC IN Remove R136 34 PC4
9. e e r 2 L 47 66 Doc ID 023566 Rev 1 UM1564 Schematics STM32373C EVAL power Figure 26 v z L 10 45946 WASDELECENLS endi 15 _ ayov NOV E NOV 6705 hoo oor oor on 300 foor 4001 690 4 2M9 4 66024 9110 vo eS VOT ose COTR MO z c 1 S M1SZSZLLLO1 8 as HAMA NVS vada ven JOPIOYOZZ LHO ug 120 xe 910A BEWLS Lamo fav Aiddng semog Nov TFT BAWA OS on Dota E 5 uvsivssA YYS nS ocv S as Ceas ene 22 sah 19 uuonuelod Buu pisuoo 56 SSA Ase Aiddng purse STE 19pe H email y b E g Boy punog 9 4 Gal 9 8 1 15 ASN O ps Old T Dir 16H d DN s ANASO 11S gin LO ZO0XNG
10. UM1564 J User manual STM32373C EVAL evaluation board Introduction The STM32373C EVAL evaluation board is designed as a complete demonstration and development platform for STMicroelectronics ARM cortex M4 core based STM32F373VCT6 microcontroller It features two I2Cs three SPIs three USARTs CAN one controller one 12 bit ADC three 16 bit sigma delta ADCs three 12 bit DACs internal 32 KByte SRAM and 256 KByte Flash touch sensing USB FS and JTAG debugging support This evaluation board can be used as a reference design for user application development but it is not considered as the final application The full range of hardware features on the board can help the user evaluate all peripherals USB FS USART audio DAC microphone ADC color LCD IrDA LDR light dependent resistor MicroSD card HDMI electrocardiogram pressure sensor CAN IR infrared transmitter and receiver EEPROM touch slider temperature sensor etc and develop their own applications Extension headers make it possible to easily connect a daughterboard or wrapping board for a specific application An ST LINK V2 is integrated on the board as an embedded in circuit debugger and programmer for the STM32 MCU Figure 1 STM32373C EVAL evaluation board Table 1 Applicable tools Type Part number Evaluation tools STM32373C EVAL September 2012 Doc ID 023566 Rev 1 1 66 www st com
11. 36 6 DAC2 OUT1 AUDIO ECG DAC Remove R92 R201 38 PA4 DAC SAR1 Remove R43 40 4 JOYSTICK LEFT Remove R68 42 PA2 KEY BUTTON Remove R90 44 WKUP BUTTON IDD Remove R150 46 PC3 LED4 Remove R87 48 PC1 LED2 Remove R78 50 GND 2 Doc ID 023566 Rev 1 39 66 Connectors UM1564 3 11 ETM Trace debugging connector CN15 Figure 17 ETM Trace debugging connector CN15 top view v 19 17 15 13 41 9 7 5 3 4 20 18 16 14 12 108 6 4 2 MS30946V1 Table 31 Trace debugging connector CN15 Pin number Description Pin number Description 1 VDD power 2 TMS PA13 3 GND 4 TCK PA14 5 GND 6 TDO PB3 7 KEY 8 TDI PA15 9 GND 10 RESET 11 GND 12 TraceCLK PE2 13 GND 14 TraceDO PE3 or SWO PB3 15 GND 16 TraceD1 PE4 or nTRST PB4 17 GND 18 TraceD2 PE5 19 GND 20 TraceD3 PE6 3 12 User USB type B connector CN16 Figure 18 User USB type B connector CN16 front view MS18660V1 Table 32 User USB type B connector CN16 Pin number Description Pin number Description 1 VBUS power 4 GND 2 DM 5 6 Shield 3 DP 40 66 Doc ID 023566 Rev 1 ky UM1564 Connectors 3 13 JTAG SWD debugging connector CN17 Figure 19 JTAG SWD debugging connector CN17 top view v 19 17 15 13 119 7 5 3 1
12. 14 8 MHz crystal X2 related solder bridge 15 32 KHz crystal X1 related solder 15 Boot related 1 16 BootO related jumper 17 Audio related 17 RS 232 and IrDA related lt 18 Touch sensing slider related solder 19 EEPROM related jumpers 20 CAN related jumpers 1 21 Jumpers of the ECG 22 Temperature sensor voltage 24 PT100 related 25 Temperature sensor related solder 29 LCD eee x eR ad Bones POUR eek h 30 HDMI sink connector 1 31 HDMI source connector 2 32 RF EEPROM daughterboard connector 32 CAN D type 9 pin male connector 5
13. 2102 R1 Vin V our V TEMP R3 R4 ale MS30570V1 The differential voltage at output of the amplifier is given in Equation 9 Equation 9 Vour Your Vins Vin X G R2 VDD x R2 R3 where e Grepresents the operational amplifier differential gain when R3 is infinite G 2 R2 R1 1 Doc ID 023566 Rev 1 UM1564 Hardware layout and configuration Note The operational amplifier differential input voltage provided by the pressure sensor is given in Equation 10 Equation 10 Vin Kx VDD Where the pressure measured e sensitivity of the sensor 40 mV VDD 10 V and 1000 HPa The ADC output is related to the differential voltage by Equation 1 1 Equation 11 Viet ape X 29 1 Kx VDD x G 82 R3 VDDx R2 R3 x Gane where Nis value returned by the ADC corresponding to the pressure measured Vie Apc is the ADC reference voltage SD in Figure 26 Gapc is the ADC digital gain So if Ver VDD Equation 11 becomes Equation 12 Equation 12 N 29 1 Kx 8 82 R3 R2 R3 x Gano Conclusion 1 When the ADC external reference voltage is selected and JP17 jumper is closed Viet Apc VDD so the pressure measurement becomes VDD independent 2 The R2 R3 term in Equation 11 and Equation 12 allows the offset voltage corresponding to atmospheric pressure to be partially reduced Cons
14. 32 MicroSD connector 7 1 33 Sigma Delta ADC connector 9 33 SAR ADC DAC connector 10 34 SAR ADC DAC connector 11 1 34 RS 232 connector CN12 with HW flow control and ISP support 35 Daughterboard extension connector CN18 36 Daughterboard extension connector CN14 38 ETM Trace debugging connector 15 40 User USB type B connector 16 40 JTAG SWD debugging connector CN17 41 USB type B connector CN22 42 STM32373C EVAL pinout 60 STM32373C mechanical 64 Document revision history 65 Doc ID 023566 Rev 1 UM1564 List of figures List of figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 Figure 14 Figure 15 Figure 16 Figure 17 Figure 18 Figure 19 Figure 20 Figure 21 Figure 22 Figure 23 Figure 24
15. Contents UM1564 Contents 1 OVGIVIEW Mee XC 6 1 1 lic c ITUNES 6 1 2 Demonstration software 6 1 3 Code EEG os 7 1 4 Delivery recommendations 7 2 Hardware layout and configuration 8 2 1 Development and debug support 11 2 2 Power SUPPLY hasa 12 2 3 Power modes 14 2 4 u ERE ew RR p Um a QE RC e d 15 2 5 Reset RR RE 16 2 6 Boot ODIO qaa PADRES dE IEEE MEE 16 17 28 EEUU UR RUNE 18 2 9 H3 232 and IrDA ix ER pasaqa OR RE ER e Edere m HA RN RE 18 2 10 Touch sensing 5 19 211 MIeroSD Gard a eei bees REPRE ES LESS 20 212 4 ten paid m Uma m e dre T 20 23 EEPROM kata a ideae bes ideis d a BA pta edd 20 214 CAN ceres see he eds pee eee one 21 215 BEMEGED susya o ium d 21 2 16 transmitter and IR receiver 22 2 17 Electrocardiogram demonstration 22 218 PT100 temperature
16. 35 66 Connectors UM1564 3 10 Daughterboard extension connectors CN13 and CN14 Two 50 pins male header connectors CN13 and CN14 can be used to connect with daughterboard or standard wrapping board to STM32373C EVAL evaluation board All GPI Os are available on them The space between these two connectors and position of power GND and RESET pins are defined as a standard which allows to develop common daughterboards for several evaluations boards The standard width between CN13 pin1 and CN14 pin1 is 2700 mils 68 58 mm The standard was implemented on the majority of evaluation boards Each pin on CN13 and CN14 can be used by a daughterboard after disconnecting it from the corresponding function block on STM32373C EVAL evaluation board Please refer to Table 29 and Table 30 for more details Table 29 Daughterboard extension connector CN13 Pin Description Alternative function How 5222 7 1 3 PC7 125_ CK 5 PC9 125 DIN 7 PA10 2 2 SDA Keep JP5 on open 9 PA11 USB DM Remove R61 11 PC14 OSC32 IN Remove R36 close SB25 13 PA13 SWDAT JTMS Disconnect CN15 CN17 15 PC15 OSC32 OUT Remove R37 close SB26 17 PA15 JTDI Disconnect CN15 CN17 19 GND 21 PDO CAN RX Remove H10 23 PD2 LCD CS Remove R163 25 PD4 USART2 RTS Remove R46 27 PD6 USART2 RX IRDA Remove 199 29 PD7 HDMI HPD SOURCE Remove R135 31 PB3 JTDO TRACESWO Disconnect CN15 CN1
17. Jumper JP10 selects one of the four possible power supply resources Description For power supply from the power supply jack CN18 to the STM32373C EVAL only JP10 is set as shown to the right Jumper setting sa e e ns e e us For power supply from the USB connector of ST LINK V2 CN22 to STM32373C EVAL only JP10 is set as shown to the right sa s n For power supply from the USB connector CN16 to STM32373C EVAL only JP10 is set as shown to the right nsa e e s sa e e san For power supply from the daughterboard connectors CN13 and CN14 to STM32373C EVAL only JP10 is set as shown to the right nsa e e s sm For power supply from the power supply jack CN18 to both STM32373C EVAL and daughterboard connected on CN13 amp CN14 JP10 is set as shown to the right Note the daughterboard must not have its own power supply connected e nsa e us Doc ID 023566 Rev 1 UM1564 Hardware layout and configuration Table 3 Power related jumpers continued Jumper Description Jumper setting Vbat is connected to a battery when JP11 is set as shown to 123 the right 11 i Vbat is connected to the VDD power when JP11 is set as shown to the right 123 This is the default setting
18. Power connector CN18 41 3 15 ST LINK V2 programming connector CN19 42 3 16 TFT LCD connector CN20 42 3 17 Audio jack CN21 Shee Sw ben Rae 42 3 18 ST LINK V2 USB type B connector CN22 42 4 KR CR o 43 Appendix STM32373C EVAL pinout 60 Appendix B Mechanical 5 64 5 Revision history 65 ky Doc ID 023566 Rev 1 3 66 List of tables UM1564 List of tables Table 1 Table 2 Table 3 Table 4 Table 5 Table 6 Table 7 Table 8 Table 9 Table 10 Table 11 Table 12 Table 13 Table 14 Table 15 Table 16 Table 17 Table 18 Table 19 Table 20 Table 21 Table 22 Table 23 Table 24 Table 25 Table 26 Table 27 Table 28 Table 29 Table 30 Table 31 Table 32 Table 33 Table 34 Table 35 Table 36 Table 37 4 66 Applicable tools ue eee e exor RO AU E AUOD P RH RR 1 Third party toolchain 1 11 Power related lt 12 Power mode related jumpers 14 Low voltage limitationS
19. the related jumpers JP12 and JP13 as described below in Table 4 The power modes are as follows e Power mode 1 VDD and VDDA are connected together and powered by a fixed 3 3 V DC power supply Power mode 2 VDD and are connected together and powered by an adjustable voltage that ranges from 2 0 V to 3 6 V e Power mode 3 VDD is powered by an adjustable voltage that ranges from 2 0 V to 3 6 V while VDDA is powered by a fixed 3 3 V DC power supply Table 4 Power mode related jumpers Power mode configuration Microcontroller IDD Power mode NU JP12 JP13 measuremen 123 123 OK e e e eee Power mode 1 TS 123 Not allowed e e e 2 123 123 eee Power mode 3 123 123 Not allowed e e e 1 To measure the IDD of the microcontroller use a current meter mounted on JP15 which must be open JP16 must also be open to disconnect VDDA from any analog power VDD ANA connected to the analog circuit Table 5 shows the low voltage limitations that might apply depending on the characteristics of some peripheral components Components might work incorrectly when the power level is lower than the limitation Table 5 Low voltage limitations Low voltage Peripheral Component IO name limitation USB CN16 USB 3v MicroSD card CN7 SPI3 2 7 V CAN CN5 CAN 3V Doc ID 023566
20. 1 29 66 Hardware layout and configuration UM1564 2 24 30 66 Display and input devices The 240x320 TFT color LCD connected to port SPI3 of STM32F373VCT6 shared with the MicroSD card and four general purpose color LEDs LD1 LD2 LD3 LD4 are available as display devices LED LD9 is connected with PA7 to show the status of comparator 2 when debugging The 4 direction joystick U34 with selection wakeup button B2 and key button B3 are available as input devices The LCD can be enabled by chip select signal PD2 and this signal should be set as open drain output pin in STM32F373VCT6 joystick signals should be set as pull down input pin in STM32F373VCT6 Table 19 LCD modules TFT LCD CN20 Pin on CN20 Description Pin connection 1 CS PD2 2 SCL PC10 3 SDI PC12 4 RS 5 WR 6 RD 7 SDO PC11 8 RESET RESET 9 VDD 3 3V 10 VCI 3 3V 11 GND GND 12 GND GND 13 BL VDD 3 3V 14 BL_Control 3 3V 15 BL_GND GND 16 BL_GND GND Doc ID 023566 Rev 1 Connectors UM1564 3 Connectors 3 1 HDMI sink connector CN1 Figure 8 HDMI sink connector CN1 front view MS19138V1 Table 20 HDMI sink connector CN1 Pin number Description Pin number Description 1 3 4 6 7 9 TMDS differential signal pair 10 12 connected to CN2 18 l2C1_5CL PB6 2 5 8 11 17 GND 16 I2C1_SDA PB7 13 CEC PB8 through NMOS 18 HDMI_5V_Si
21. AIN2M 1 joco a a Du VDDA RV3 0 GPCOMP2 IN P our GPCOMP2 IN ees NC a o oU GND Band gap 1 2 V MS30943V1 28 66 Doc ID 023566 Rev 1 ky UM1564 Hardware layout and configuration 2 22 2 23 Note LDR A light dependent resistor LDR is connected to ADC or comparator 1 through PA1 as shown in Figure 7 Figure 7 STM32373C EVAL LDR VDDA ADC SAR IN1 GP comparator 2 0 LDR OUT 1 GPCOMP2_IN LDR Band Band gap 1 2 V 1 2V GND MS30944V1 Temperature sensor Temperature sensor STLM75M2E is connected to the I2C2 bus of STM32F373VCT6 when jumpers JP4 and JP5 are set as shown in Table 10 It shares the same I2C2 bus with RF EEPROM Audio codec and DDC on the HDMI Source connector I2C address of temperature sensor is 100100 can be 0 or 1 depending on the setting of SB27 Table 18 Temperature sensor related solder bridge Solder bridge Description I2C address AO is 0 when 5827 is open default setting I2C address 0 is 1 when 5827 is closed 5827 The temperature result measured from 51 75 is slightly higher than ambient temperature due to board heat Doc ID 023566 Rev
22. CAN and IR Figure 32 r 9140 119945 210 16 8 28 HI NVIVAS OEZLEZEN LS S2IUOJ 29 90J2IIN S NYO Sd 968064061 zn MI 9 TA NI 9 E SALLIWSNVAL gt 9 org at lt Doc ID 023566 Rev 1 54 66 Schematics UM1564 Figure 33 STM32373C EVAL Touch slider r 910 eL0c o ceyxea 68Wi qunN 1J p lS 26 626 115 2 1 S sod guepiis Ls ped NOW iolsis iqs3 gt peus gt 49 s sussa gt 90 55 66 Doc ID 023566 Rev 1 UM1564 Schematics STM32373C EVAL 12 peripherals Figure 34 v e SL yeeus 21016 sjeeudued DZIVAA DEZ ZEW LS a SOIUOIJDOJSOIDI LS 1v LOOLOLSseJppy Ov 00L001sseuppy Josues
23. DIN PC12 8 NC 4 3V3 9 GND 5 MicroSDcard_CLK PC10 10 MicroSDcard_detect PE3 3 6 Sigma Delta ADC connector CN9 Figure 13 Sigma Delta ADC connector CN9 top view O MS30945V1 Table 25 Sigma Delta ADC connector CN9 Pin number Description Pin number 1 AGND 2 Description Sigma Delta ADC input PE11 Doc ID 023566 Rev 1 33 66 Connectors UM1564 3 7 SAR ADC DAC connector CN10 Figure 14 SAR ADC DAC connector CN10 top view MS30945V1 Table 26 SAR ADC DAC connector CN10 Pin number Description Pin number Description 1 AGND 2 ADC DAC input amp output PA5 3 8 SAR ADC DAC connector CN11 Figure 15 SAR ADC DAC connector CN11 top view MS30945V1 Table 27 SAR ADC DAC connector 11 Pin number Description Pin number Description 1 GND 2 ADC DAC input amp output PA4 34 66 Doc ID 023566 Rev 1 437 UM1564 Connectors 3 9 RS 232 connector CN12 Figure 16 RS 232 connector CN12 front view 12345 00000 0000 6789 Front view MS19140V2 Table 28 RS 232 connector CN12 with HW flow control and ISP support Pin number Description Pin number Description 1 NC 6 Bootloader BOOTO 2 RS232 RX PD6 7 RS232 RTS PD4 3 RS232 TX PD5 8 RS232 CTS PD3 Bootloader RESET 4 NC 9 NC 5 GND Doc ID 023566 Rev 1
24. Figure 25 Figure 26 Figure 27 Figure 28 Figure 29 Figure 30 Figure 31 Figure 32 Figure 33 Figure 34 Figure 35 Figure 36 Figure 37 Figure 38 STM32373C EVAL evaluation board 1 Hardware block 5 9 STM32373C EVAL evaluation board layout 10 Temperature measurement schematic 23 Pressure measurement schematic 26 STM32373C EVAL potentiometer 28 56 32373 29 HDMI sink connector CN1 front 1 31 HDMI source connector CN2 front 31 RF EEPROM daughterboard connector CNS front view 32 CAN D type 9 pin male connector 5 32 MicroSD connector 7 33 Sigma Delta ADC connector CN9 top view 33 SAR ADC DAC connector CN10 top 34 SAR ADC DAC connector CN11 top 34 RS 232 connector CN12 front view 35 ETM Trace deb
25. PA9 is connected to the 12 2 SCL 5V signal the audio DAC temperature sensor RF EEPROM and HDMI source connector 123 when is set as shown to the right eje JP4 This is the default setting PA9 is connected to the 2 2 signal on the EEPROM 123 when 4 is set as shown to the right ele e PA10 is connected to the I2C2 SDA 5V signal on the audio DAC temperature sensor RF EEPROM and HDMI source 123 connector when JP5 is set as shown to the right JP5 This is the default setting PA10 is connected to the 12 2 SDA signal on the EEPROM 123 when JP5 is set as shown to the right e e e Note The I2C address of CS43L22 is 061001010 The audio reset is connected with PD11 which is powered by the VDDA domain When the voltage of VDDA is not the same as the voltage of VDD see Power mode 3 in Section 2 3 the signal voltages are translated by divider resistance R79 and 103 to avoid harming the Audio Codec Chip U19 ky Doc ID 023566 Rev 1 17 66 Hardware layout and configuration UM1564 2 8 2 9 18 66 USB STM32373C EVAL evaluation board supports USB2 0 compliant full speed communication via a USB type B connector CN16 The evaluation board can be powered by this USB connection at 5 V DC with 500 mA current limitation USB disconnection simulation can be implemented by controlling an external 1 5 KO pull up resistor on the USB line The pull up function can be en
26. Rev 1 ky UM1564 Hardware layout and configuration Note The recommended 220 V to DC5 V power adapter is PSU 5V24A It is not included with the board but can be ordered from ST as a separate item You can also use another equivalent 5 V power adapter polarity compatible with CN18 to power the STM32373C EVAL board via the CN18 power jack on the board To order the recommended power supply use order code PSU 5V2A 2 4 Clock sources Two clock sources are available on the STM32373C EVAL evaluation board for use with the STM32F373VCT6 microcontroller and embedded real time clock They e 8 MHzcrystal X2 with socket clock source for the STM32F373VCT6 microcontroller It can be removed from the socket when an internal RC clock is used see Table 6 e 32 KHz crystal X1 for use with an embedded see Table 7 Table 6 8 MHz crystal X2 related solder bridge Solder bridge Description When SB23 is open PFO is connected to the 8 MHz crystal oscillator This is the default setting 5823 When 5823 is closed is connected to the extension connector CN14 In this case C18 and the X2 pin must be removed to avoid disturbance due to the 8 Mhz quartz When SB24 is open PF1 is connected to the 8 MHz crystal oscillator This is the default setting SB24 When SB24 is closed PF1 is connected to the extension connector CN14 In this case R38 must be removed to avoid disturbance due to
27. SMB 68 PA9 2 2 69 10 12 2 SDA 70 PA11 USB DM 71 PA12 USB DP 72 PA13 SWDAT JTMS 738 PF6 74 IVSS 3 75 IVDD 3 76 14 SWCLK JTCK 77 PA15 JTDI 78 10 SPI3 SCK 79 PC11 5 3 MISO 80 12 SPI3 MOSI 81 PDO CAN RX 82 PD1 CAN TX 83 PD2 LCD CS 84 PD3 USART2 CTS 85 4 USART2 RTS 86 PD5 USART2 TX IRDA 87 PD6 USART2 RX IRDA 88 PD7 HDMI HPD SOURCE 89 JTDO TRACESWO 90 4 JNTRST 91 PB5 IR IN 92 PB6 I2C1 SCL 93 7 I2C1 SDA 94 BOOTO Doc ID 023566 Rev 1 UM1564 STM32373C EVAL pinout Table 35 STM32373C EVAL pinout continued Pin Pin name Description no 95 PB8 CEC 96 PB9 IR Out LED 97 PEO HDMI HPD SINK 98 PE1 99 VSS 1 100 1 Doc ID 023566 Rev 1 63 66 Mechanical dimensions UM1564 Appendix Mechanical dimensions 64 66 Figure 38 STM32373C mechanical dimensions Table 36 STM32373C mechanical dimensions Symbol Size mm Symbol Size mm Symbol Size mm a1 2 54 H 11 P2 110 49 a2 2 54 Lx 5 715 Q1 24 13 47 Ly 5 715 Q2 15 875 3 5 Mx 17 145 X 114 3 3 2 My 18 415 172 72 Doc ID 023566 Rev 1 UM1564 Revision history 5 Revision history Table 37 Document revision history Date 11 Sep 2012 Revision 1 Initial release Changes Doc ID 023566
28. Wd 8 gt Dit LN L oen 0813 Lely POL 969 n WV Sik NOV NOV E 028 31001 69 s 212 OF NOV olwz 9 LN JHOM gn LLY lal T ade NE 960 5 19607015001 ed 0 WY 022 L Juv 9 169 8 ER 107001 H MOGIVESEVNI 9H x ldr zn eo Sie 61H was wool OV 862 uoo 069 JosuegaJnssa8Jd yr VO vel x 994 Doc ID 023566 Rev 1 58 66 Schematics MB989 LCD daughter UM1564 Figure 37 59 66 v 4 L jo 19995 200 V8 lesed 91 2015 Hoddns 82 S21UOJ 29 90J9I N S a jees dS 10 J0 29UUO HS __ now rm 1g E 2 GOT 10 101090002949 1 wor 148 mm rsra Doc ID 023566 Rev 1 Vuld LSSZE6 eopueju LS SZOMW
29. codec U19 and DDC on the HDMI Source connector CN2 The RF EEPROM can be accessed the microcontroller via the I2C2 bus or by radio frequency RF using a 13 56 MHz reader for example CR95HF The 12 address of the RF EEPROM daughterboard is 0b1010000 I2C2 communication depends on the settings of jumper JP4 and JP5 as shown in Table 10 Audio related jumpers EEPROM To fit Fast mode requirements a 1 Mbit EEPROM 24 01 is directly connected to the 2 2 bus of the STM32F373VCT6 by setting jumper JP4 and JP5 as shown in Table 10 Audio related jumpers Table 13 _ EEPRONM related jumpers Jumper Description When JP14 is closed the EEPROM is in Write protection mode JP14 AW RN This is the default setting it is not fitted JP5 Refer to Table 10 Audio related jumpers Doc ID 023566 Rev 1 UM1564 Hardware layout and configuration 2 14 CAN The STM32373C EVAL evaluation board supports one channel of CAN2 0A B complaint CAN bus communication based on a 3 3 V CAN transceiver High speed mode Standby mode and Slope control mode are available and can be selected by setting JP3 Table 14 CAN related jumpers Jumper Description and jumper setting The CAN transceiver operates in Standby mode when JP3 is set 123 as shown to the right JP3 The CAN transceiver operates in High speed mode when JP3 is set as shown to the right 123 This is
30. either resistor capacitor RC charging or charge transfer technology The charge transfer technology is enabled by default assembly Table 12 Touch sensing slider related solder bridges Solder bridge Description When 588 is open PD15 is connected to the sampling capacitor This is the default setting 588 When 588 is closed PD15 is connected to the extension connector 14 In this case C7 must be removed to avoid disturbance due to the capacitor When 589 is open PD14 is connected to the touch slider This is the default setting SB9 When 589 is closed PD14 is connected to the extension connector CN14 In this case R11 must be removed to avoid disturbance due to the touch slider When SB10 is open PD13 is connected to the touch slider This is the default setting SB10 When 5810 is closed PD13 is connected to the extension connector CN14 In this case R12 must be removed to avoid disturbance due to the touch slider When SB11 is open PD12 is connected to the touch slider This is the default setting SB11 When SB11 is closed PD12 is connected to the extension connector CN14 In this case R13 must be removed to avoid disturbance due to the touch slider When R93 is un mounted PE4 is connected to the touch slider This is the default setting R93 When R93 is mounted 4 is connected to the extension connector CN13 In this case R31 must be removed to avoid disturb
31. 1 and the resistors R1 to R5 form a differential amplifier with a differential gain G44 Due to the resistor values chosen Ga is equal to 1 This is known because the resistor bridge R1 and R2 connected to VDD is equivalent to the VDD 2 generator where R1 2 R internal resistor The voltage on Rref is given in Equation 2to Equation 5 Doc ID 023566 Rev 1 23 66 Hardware layout and configuration UM1564 24 66 Equation 2 Voutat Vner 2 Since Gp 1 Equation 3 VourA2 100 Equation 4 Vngr VouTA1 100 Equation 5 Vpret 2 ref The voltage on the ADC input is given in Equation 6 Equation 6 VnretX 100 Rret VDD 2x The measured PT100 value given by the ADC is shown in Equation 7 Equation 7 16 Retioo Viet anc X 2 1 x 2x VDD Where Nis value returned by the ADC corresponding to the voltage measured Apc is the ADC reference voltage SD VREF4 in Figure 26 If Vret Apc VDD the 1 value becomes as shown in Equation 8 Equation 8 NZ 2 1 x 2x Conclusion When the JP17 jumper is closed and the external reference voltage selected Viet Apc equals VDD the temperature measurement becomes VDD independent Table 16 shows the voltage range corresponding to different temperatures for the ADC IN of the STM32F373VCT6 where gain
32. 16 Table 16 Temperature sensor voltage range VDD 3 3 V Temperature C Resistance Q Voltage mV Vin ADC V 0 100 100 1 6 Rref 1 8 KQ 20 107 7 107 7 1 7 50 119 2 119 2 1 9 Doc ID 023566 Rev 1 ky UM1564 Hardware layout and configuration Note 100 Q 0 1 resistor R121 is used to calibrate PT100 by setting JP18 Table 17 100 jumper Jumper Description and jumper setting The 100 ohm 0 1 resistor is connected for calibration when 123 JP18 is set as shown to the right JP18 PT100 resistor is connected to measure temperature when JP18 is set as shown to the right 123 This is the default setting ee Note The temperature result measured from PT100 is slightly higher than ambient temperature due to board heat ky Doc ID 023566 Rev 1 25 66 Hardware layout and configuration UM1564 2 19 26 66 Pressure sensor An absolute pressure sensor with 1000 HP full scale MPX2102 and an analog front end is implemented on the STM32373C EVAL board The output differential pair is connected to the sigma delta ADC in the STM32F373VCT6 P and 9 N The principle of the pressure measurement is given in Figure 5 Figure 5 Pressure measurement schematic diagram VDD R3 VDD _ Vout R2 e 1
33. 2 Aur 27022 ss Z id 6 8703 959 zT b Kat Szn S WZVOELA9SON3Z dL 9zn r e L Doc ID 023566 Rev 1 48 66 Schematics UM1564 STM32373C EVAL ST LINK JTAG only Figure 27 r L SL yo geeus 2102 6 2 9120 6 NET LIVAI OELEZENLS n L gadArgsn 7 BHS S9IUOJI29 90JO A S LOSS E rod f DA NO Sa E YNI 1 ASN ANTIS ANTIS nmoqsrizoAtuNS auri 2 Z fon won Deo as 8 L WLS 4001 4001 IHA eelo yy a NI NS L 92 9580 o an SES E zs 80 TEAM 894 NILS 0 J wa eri WS Hed dd ari TS ee NSSWIr WIS pe s I est 00 4027 SWSH 9190601 ZENLS Zen uoo 1001 aoo 690 0925 9205 199 v z D 49 66 Doc ID 023566 Rev 1 Schematics UM1564 Figure 28 STM32373C EVAL JTAG and Trace
34. 373C EVAL audio 808 ol solo e 810947903 8 902 005 v6XOSseippe 921 9ro 21022 80 TL c us pa an A 81 1 as 82 ES 8r 2 asl n 120001 T 007 VA ON any EN 0 lt Wd amp NN ios eeo VINIV 3907 T 390r 06 MAN Med BED HP LO 8A aA nu A _ AzOZZAS ALNO asa 2 8100 Mus 091 LOO MIS Nas MHS MOS HIS ov _ DS vas 0LOL00L Ssaippv Schematics Figure 24 Doc ID 023566 Rev 1 46 66 Schematics UM1564 STM32373C EVAL peripherals Figure 25 v S 28 6gWi qunN S9IU0J 29 90JOIIN 5 1 51 58487 umop ind SHS DA L ged amp asn 4 TE JesN 09 lt eM 85 L 8919 14204651 bu veen ES
35. 405 geieudued 000425 205 059 5591 003 Josuegeinsser 3953 n 200108 239 HI ZEZSN VOI 2625 194018 021 25254 n Oz Schematic diagram of STM32373C EVAL Eae 200495 091 200495 ov 00425 oipny aoin n Doc ID 023566 Rev 1 Schematics Figure 22 44 66 Schematics UM1564 STM32373C EVAL MCU Figure 23 v 5 10 49945 68gWi qunN NOW WAROELEZEMLS S 21U0J 29 90J9I A S I jo IS Hz _ IN IN DIL uedo 504 WIND uolsu x3 sl 929 20 14 9 uedo _910 ZENLS aoog exoos uuw 5zq0a00000 8vs3 ex 2001 Z 750 1 Lg 2002 Hi 615 3102 810 45 66 Doc ID 023566 Rev 1 UM1564 v 4 5 10 geeus OlanNvA 3 9 7 ceWls Sum LS STM32
36. 7 33 PB5 IR IN Remove R113 35 PB7 I2C1 SDA Remove R148 37 PB9 IR Out LED Remove R249 39 GND 41 PE3 TRACEDO uSDcard Detect Remove R60 R64 43 PE5 TRACED2 SHIELD CT Remove R83 mount R95 45 PF9 JOYSTICK RIGHT Remove R91 47 PF10 JOYSTICK UP Remove R69 49 D5V 36 66 Doc ID 023566 Rev 1 UM1564 Connectors Table 29 Daughterboard extension connector CN13 continued Pin Description Alternative function How to disconnect mom function block on STM32373C EVAL board 2 PC6 125 WS 4 PC8 125 6 2 2 SMB Remove R215 8 PA9 2 2 SCL Keep JP4 on open 10 GND 12 PA12 USB DP Remove H75 14 PF6 16 PA14 SWCLK JTCK Disconnect CN15 CN17 18 PC10 SPI3 SCK 20 PC11 SPI3 MISO Remove R24 22 PC12 SPI3 MOSI x 24 PD1 CAN TX Remove R248 26 USART2 CTS Remove R210 28 PD5 USART2 TX IRDA Remove R47 30 GND 32 4 JNTRST Disconnect CN15 CN17 34 PB6 2 1 SCL Remove 139 36 PB8 CEC Remove R159 38 PEO HDMI HPD SINK Remove R176 40 PE1 42 PE2 TRACECLK SPI3 CS uSDcard Remove R35 disconnect CN15 44 4 TRACED1 SHIELD Remove R72 mount R93 46 TRACED3 WKUP JOYSTICK SEL Remove R85 R89 48 3V3 50 GND Doc ID 023566 Rev 1 37 66 Connectors UM1564
37. 73C EVAL HDMI CEC Figure 30 v 4 10 69945 2102 6 292 0 5 S AS gt gt beeqsqNl gt gt 7591 1712 ALS E T laa wor 4 ZOOLNZ 190019117 0 JUSTAS IWOH YUIS PLES esop 080 Jojeaday VIN o1nosajesedas VIN eje1edos g9 Doc ID 023566 Rev 1 52 66 v 9130 2102 6 912 Schematics PLEIGS SACO IWAS OELECENLS IL LS STM32373C EVAL LCD and SD card Jojeuuoo 87 071451 ASON 515 10 3905 15 000 amp 800 UM1564 Figure 31 53 66 ad uleip A MO WS 265 8 Doc ID 023566 Rev 1 UM1564 Schematics STM32373C EVAL
38. ED2 17 PC2 LED3 18 PC3 LED4 19 PF2 JOYSTICK DOWN 20 VSSA SAR VSS SAR VREF 21 VDDA SAR VDD 22 SAR VREF 23 PAO WKUP1 WKUP BUTTON IDD 24 1 LDR OUT 25 PA2 KEY BUTTON 26 PA3 COM 27 4 JOYSTICK LEFT 28 VDD 2 Doc ID 023566 Rev 1 UM1564 STM32373C EVAL pinout Table 35 STM32373C EVAL pinout continued d Pin name Description 29 4 DAC SAR1 30 PA5 ADC DAC SAR2 31 PA6 DAC2 OUT1 AUDIO ECG DAC 32 PA7 COMP2 OUT LED 33 34 5 USB DISCONNECT 35 PBO MIC IN 36 PB1 ADC POT IN 37 PB2 1 8V POR RFU 38 7 RTD IN 39 PE8 PRESSURE P 40 PE9 PRESSURE N 41 PE10 42 PE11 ADC SD 43 PE12 ECG 44 PE13 45 PE14 PRESSURE TEMPERATURE 46 15 47 10 48 180 VREF 49 1 SDADC2 SDADC3 VSS 50 SDADC1 SDADC2 51 SDADC3 52 180 VREF4 53 14 54 15 55 PD8 56 PD9 57 PD10 58 PD11 AUDIO RST 59 PD12 SLIDER 1 60 PD13 SLIDER 2 Doc ID 023566 Rev 1 61 66 STM32373C EVAL pinout UM1564 62 66 Table 35 STM32373C EVAL pinout continued Pin Pin name Description no 61 PD14 SLIDER_3 62 PD15 SLIDER_CT 63 PC6 128 WS 64 PC7 125 CK 65 8 128 MCK 66 9 125 DIN 67 2 2
39. K V2 is embedded on the board This tool allows onboard program loading and debugging of the STM32F373VCT6 using the JTAG or SWD interface Third party debug tools are also supported using the JTAG SWD connector CN17 or the ETM trace connector CN15 A specific driver needs to be installed on your PC for communication with the embedded ST LINK V2 The install shield called ST LINK V2 USBdriver exe is available from the ST website To download and install this driver please refer to the software and development tools page of the STM32F family on www st com Third party toolchains Atollic TrueSTUDIO KEIL ARM MDK IAR EWARM and Tasking VX Toolset support ST LINK V2 according to Table 2 Table 2 Third party toolchain support Toolchain Version Atollic TrueSTUDIO 2 1 Keil MDK ARM 4 20 EWARM 6 20 Altium TASKING VX Toolset 4 0 1 Connect the embedded ST LINK V2 to the PC via a standard USB cable from connector CN22 The bi color LED LD7 COM in Figure 3 indicates the status of the communication as follows e Slow blinking red off at power on before USB initialization e Fastblinking red off after the first correct communication between the PC and STLink V2 enumeration Red LED on when initialization between the PC and ST LINK V2 is successfully finished Green LED on after successful target communication initialization Blinking red green during communication with target Red on communication fin
40. Option Bytes bit12 BOOT1 in the small information block SIF BOOTO can also be configured via the RS 232 connector CN12 Table 8 Boot related switches Bit12 in User Switch Boot source Option Bytes configuration STM32373C EVAL boot from User Flash when SW1 and bit12 in the User Option Bytes are set as shown to the right X LA This is the default setting STM32373C EVAL boot from Embedded SRAM when SW1 and bit12 0 0 lt gt 1 in the User Option Bytes are set as shown to the right e sw STM32373C EVAL boot from System Memory when SW1 and bit12 in 1 0 lt gt 1 the User Option Bytes are set as shown to the right ej 16 66 Doc ID 023566 Rev 1 ky UM1564 Hardware layout and configuration Table 9 Boot0 related jumper Jumper Description When is closed the Bootloader BOOTO is managed by pin 6 of connector CN12 RS 232 DSR signal This configuration is used for boot loader application only This is the default setting it is not fitted JP9 2 7 Audio The STM32373C EVAL evaluation board supports stereo audio playback by an audio DAC 5431 22 connected to 125 port and one channel of the STM32F373VCT6 DAC The microphone is connected to the ADC input of STM32F373VCT6 through a microphone amplifier 122 communication depends on the settings of jumpers JP4 and JP5 Table 10 Audio related jumpers Jumper Description Jumper setting
41. Rev 1 65 66 UM1564 Please Read Carefully Information in this document is provided solely in connection with ST products STMicroelectronics NV and its subsidiaries ST reserve the right to make changes corrections modifications or improvements to this document and the products and services described herein at any time without notice All ST products are sold pursuant to ST s terms and conditions of sale Purchasers are solely responsible for the choice selection and use of the ST products and services described herein and ST assumes no liability whatsoever relating to the choice selection or use of the ST products and services described herein No license express or implied by estoppel or otherwise to any intellectual property rights is granted under this document If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein UNLESS OTHERWISE SET FORTH IN ST S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE AND THEIR EQUIVALENTS UNDER
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43. abled by PC5 The USB operates correctly when VDD gt 3 V RS 232 and IrDA RS 232 with hardware flow control clear to send CTS and request to send RTS and IrDA communication are supported by e D type 9 pin RS 232 connector CN12 e transceiver 012 They are connected to USART2 of the STM32F373VCT6 on the STM32373C EVAL evaluation board The Bootloader RESET signal which is shared with the CTS signal and the Bootloader BOOTO signal which is shared with the demand signal repository DSR signal are added on the RS 232 connector CN12 for ISP support Table 11 gt RS 232 and IrDA related jumpers Jumper Description Jumper setting USART2 RX is connected to the RS 232 transceiver and RS 232 communication is enabled when JP6 is set as shown to the 123 right eee JP6 This is the default setting USART2 RX is connected to the IrDA transceiver and IrDA communication is enabled when JP6 is set as shown to the 1 3 right USART2 CTS is connected to RS 232 transceiver when JP7 is set as shown to the right 123 This is the default setting JP7 9 Bootloader RESET is connected to the RS 232 transceiver 123 when JP7 is set as shown to the right e Doc ID 023566 Rev 1 ky UM1564 Hardware layout and configuration 2 10 Note 4 Touch sensing slider STM32373C EVAL evaluation board supports a touch sensing slider based on
44. ance due to the shield When R95 is un mounted PE5 is connected to the slider This is the default setting R95 When R95 is mounted PE5 is connected to the extension connector CN13 In this case R82 must be removed to avoid disturbance due to the capacitor The touch slider is only fully functional when the STM32373C EVAL is powered on Power mode 1 both VDD and VDDA are connected to a fixed 3 3 V power supply When the STM32373C EVAL is powered on Power mode 2 it may be necessary to adjust the capacitor value of C123 and the firmware so they are adapted to a voltage range of 2 0 V to 3 6 V of VDD The touch slider is not functional when the STM32373C EVAL is powered Power mode 3 because some 108 are also powered by the VDDA domain Doc ID 023566 Rev 1 19 66 Hardware layout and configuration UM1564 2 11 2 12 2 13 20 66 MicroSD card The 2 Gbyte or more MicroSD card connected to the SPI3 port which is shared with the color LCD of the STM32F373VCT6 is available on the evaluation board It can be enabled by the chip select signal PE2 This signal should be set as an open drain output pin in the STM32F373VCT6 MicroSD card detection is managed by the standard IO port PES The MicroSD card operates correctly when VDD 2 7 V RF EEPROM The RF EEPROM daughterboard ANT7 M24LR A is mounted on CN3 of the STM32F373VCT6 the I2C2 bus which is shared with the temperature sensor 014 audio
45. ed by removing R14 and soldering 0 the R183 footprint Caution is needed for ECG detection and heartbeat measurement The recommendations are Humid air and fingers Large area in contact with the electrodes Relaxed body with no movement Digital and or analog filtering to improve 50 Hz or 60 Hz noise rejection Third electrode usage connected to GND Evaluation board preferably powered by USB Body must be electrically isolated from earth N Doc ID 023566 Rev 1 ky UM1564 Hardware layout and configuration 2 18 PT100 temperature sensor There is a current source circuit on the STM32373C EVAL evaluation board to provide a fixed 1 mA current when VDD 3 3 V to the platinum probe PT100 R30 The R30 voltage level is directly applied to the sigma delta ADC of the STM32F373VCT6 through PE7 to measure the temperature value on PT100 For temperatures lower than 100 the resistor value is given by Equation 1 Equation 1 00 100 0 385 x T T is temperature in degrees Celsius The principle of the PT100 temperature sensor measurement is given in Figure 4 Figure 4 Temperature measurement schematic diagram VDD R1 2R R VDD 2 ref ADC IN R2 2R VDD VDD 2 i R1 2R VRref R2 2R S MS30569V1 The operational amplifier A
46. eden Switzerland United Kingdom United States of America www st com 66 66 Doc ID 023566 Rev 1 ky
47. equently the digital gain can be increased to improve sensitivity Vremp may be used to compensate the temperature sensor drift by measuring the sensor current change with temperature Doc ID 023566 Rev 1 27 66 Hardware layout and configuration UM1564 2 20 Analog input Three 2 pin connectors CN9 CN10 and CN11 are connected to STM32F373VCT6 as external analog inputs or DAC outputs connected to Sigma Delta ADC through PE11 low pass filter can be implemented for the 2 pin connector by replacing R212 and C118 for ADC input with the right values of the resistor and capacitor as required by end user s application CN10 connected to ADC SAR input and DAC output through PAS a low pass filter can be implemented for the 2 pin connector by replacing R42 and C21 for ADC input or replacing 840 and C21 for DAC output with the right values of the resistor and capacitor as required by end user s application CN11 connected to ADC SAR input and DAC output through PA4 a low pass filter can be implemented for the 2 pin connector by replacing R45 and C26 for ADC input or replacing R43 and C26 for DAC output with the right values of the resistor and capacitor as required by end user s application 2 21 Potentiometer A 10K ohm potentiometer RV3 is connected to comparator 2 through PA3 and ADC through PB1 default connection as shown in Figure 6 Figure 6 STM32373C EVAL potentiometer ADC SAR AIN9 ADC 501 AIN3P
48. is replaced by an incorrect one Make sure to dispose of used batteries according to the instructions Doc ID 023566 Rev 1 7 66 Hardware layout and configuration UM1564 2 8 66 Hardware layout and configuration The STM32373C EVAL evaluation board is designed around the STM32F373VCT6 100 pin LQFP package The hardware block diagram Figure 2 illustrates the connection between the STM32F373VCT6 and the peripherals color LCD touch slider USB FS connector temperature sensor USART IrDA audio EEPROM RF EEPROM MicroSD card and embedded ST LINK Figure 3 illustrates how to locate these features on the actual evaluation board Features described in Section 2 1to Section 2 24 below are shown in Figure 3 Doc ID 023566 Rev 1 UM1564 Hardware layout and configuration Figure 2 Hardware block diagram Joystick RS232 USART2 transceiver connector LEDs Voltage translator IrDA Wakeup transceiver tamper STM32F373VCT6 button Embedded USB type B Photo R Comparator ST LINK V2 connector JTAG and Touch slider TS controller ids connector 2 pin connector DAC ADC E Voltage translator USB matrix connector CAN driver and connec
49. ished and OK Orange on communication failure It is possible to power the board via CN22 embedded ST LINK V2 USB connector even if an external tool is connected to CN15 ETM trace connector or CN17 external JTAG and SWD connector Remove R29 R73 and R89 when using the ETM 4 bit function In this situation the touch slider and joystick do not work Doc ID 023566 Rev 1 11 66 Hardware layout and configuration UM1564 2 2 12 66 Power supply STM32373C EVAL evaluation board is designed to be powered by a 5 V DC power supply and is protected by PolyZen U26 from damage caused by overvoltage and overcurrent fault conditions It is possible to configure the evaluation board to use any of following four power supply sources e 5 V DC power adapter connected to CN18 the power jack on the board see Power Supply Unit PSU in Figure 3 The external power supply is not provided with the board e 5 DC power with 500 mA limitation from CN22 the type B USB connector of ST LINK V2 see STIk 5 V power source in Figure 3 e 5 V DC power with 500 mA limitation from CN16 the type B USB connector see U5V 5 V power source in Figure 3 e 5 DC power from CN13 and CN14 the extension connector for the daughterboard see D5V for daughterboard in Figure 3 The power supply is configured by setting the related jumpers JP10 JP11 JP12 and JP13 as described in Table 3 below Table 3 Power related jumpers
50. n number Description 1 VBUS power 4 GND 2 DM 5 6 Shield 3 DP 42 66 Doc ID 023566 Rev 1 UM1564 Schematics 4 Schematics The following schematics are listed Figure 22 Schematic diagram of STM32373C EVAL on page 44 Figure 23 STM32373C EVAL MCU on page 45 Figure 24 STM32373C EVAL audio on page 46 Figure 25 STM32373C EVAL peripherals page 47 Figure 26 STM32373C EVAL power on page 48 Figure 27 STM32373C EVAL 5 JTAG only on page 49 Figure 28 STM32373C EVAL JTAG and Trace on page 50 Figure 29 STM32373C EVAL RS 232 and IrDA on page 51 Figure 30 STM32373C EVAL HDMI CEC on page 52 Figure 31 STM32373C EVAL LCD and SD card on page 53 Figure 32 STM32373C EVAL CAN and IR on page 54 Figure 33 STM32373C EVAL Touch slider on page 55 Figure 34 STM32373C EVAL I2C peripherals on page 56 Figure 35 STM32373C EVAL PT100 temperature sensor and connectors on page 57 Figure 36 STM32373C EVAL ECG and pressure sensor page 58 Figure 37 MB989 LCD daughter on page 59 Doc ID 023566 Rev 1 43 66 UM1564 8 4 9 5 3p 1945 ziozijrewa 6gWuequnN TNAGOOEZECEWLS 15 20025 emod mod n YNT 15 ANT LSN 200495 NODBOSUSSWEL NOOJosues n 20495 gov n 200105 3 I9NVO YINYIN 200
51. nal connectors and one sigma delta ADC input signal connector Potentiometer Demonstration software Demonstration software is preloaded on the board s Flash memory for easy demonstration of the device peripherals in standalone mode For more information and to download the latest version available please refer to the STM32373C EVAL demonstration software available on www st com Doc ID 023566 Rev 1 ky UM1564 Overview 1 3 1 4 Caution Order code To order the STM32F373VCT6 evaluation board use the order code STM32373C EVAL Delivery recommendations Some verification of the board is needed before using it for the first time to make sure that nothing was damaged during shipment and that no components are unplugged or lost When the board is extracted from its plastic bag please check that no component remains in the bag The main components to verify are 1 The 8 MHz crystal X2 which may have been removed by a shock from its socket 2 The MicroSD card which may have been ejected from the connector CN7 right side of the board 3 The dual interface EEPROM board ANT7 M24LR A which may have been unplugged from the connector top left corner of the board For all information concerning the version of the MCU used on the board its specification and possible related limitations please visit www st com to download the relevant data sheet and erratasheet There is an explosion risk if the battery
52. nk 14 NC 19 HPD PEO through transistor 3 2 HDMI source connector CN2 Figure 9 HDMI source connector CN2 front view MS19138V1 Doc ID 023566 Rev 1 31 66 UM1564 Connectors Table 24 HDMI source connector CN2 Pin number Description Pin number Description 1 3 4 6 7 9 TMDS differential signal pair 10 12 connected to CN1 18 SEL PA 2 5 8 11 17 GND 16 I2C2 SDA 10 13 PB8 through NMOS 18 SV Source from power switch U1 14 NC 19 HPD PD7 3 3 RF EEPROM daughterboard connector CN3 Figure 10 RF EEPROM daughterboard connector CN3 front view 01 04 Table 22 RF EEPROM daughterboard connector CN3 Pin number Description Pin number Description 1 SDA PA10 3 5 V 2 SCL PA9 GND 3 4 CAN D type 9 pin male connector CN5 Figure 11 CAN D type 9 pin male connector CN5 12345 6789 Front view MS19140V2 Table 23 D type 9 pin male connector CN5 Pin number Description Pin number Description 1 4 8 9 NC 7 CANH 2 CANL 3 5 6 GND 32 66 Doc ID 023566 Rev 1 UM1564 Connectors 3 5 MicroSD connector CN7 Figure 12 MicroSD connector CN7 41 Table 24 0 connector CN7 Pin number Description Pin number Description 1 NC 6 Vss GND 2 MicroSDcard CS PE2 7 MicroSDcard DOUT PC11 3 MicroSDcard
53. or CN1 IR transmitter and IR receiver IR receiver TSOP34836 is connected to PB5 of the STM32F373VCT6 and the IR transmitter is driven by PB9 through transistors and T7 on the evaluation board The IR transmitter may be driven directly by PB9 when SB28 is closed and R240 is removed Electrocardiogram demonstration The electrocardiogram ECG demonstration is implemented on the STM32373C EVAL evaluation board There are two ECG electrodes TS1 and TS2 on the board for fingers from the right and left hands of the human body The first stage of the ECG amplifier circuit is an instrument amplifier INA333 U2 The gain is set to 5 The gain of the second amplifier stage is set to 10 or 40 The total gain of the circuit outside the microcontroller is set to 50 or 200 The output of the amplifier is connected to the sigma delta ADC in the STM32F373VCT6 through PE12 Jumper JP1 can change the second stage amplifier gain see Table 15 Table 15 Jumpers of the ECG amplifier Jumper Description When JP1 is closed the second amplifier gain is changed from 10 to 40 P1 1 Default setting fitted A low pass filter is available on the evaluation board but by default it is not used This filter is made of a second order Sallen Key Low pass Filter U3C having unitary gain and 9 Hz cut off frequency It can be used in noisy environments to improve 50 Hz or 60 Hz noise rejection This filter is enabl
54. the 8 Mhz quartz Table 7 32 KHz crystal X1 related solder bridge Solder bridge Description When SB25 is open PC14 is connected to the 32 KHz crystal oscillator This is the default setting SB25 When 5825 is closed PC14 is connected to the extension connector CN13 In this case R36 must be removed to avoid disturbance due to the 32 Khz quartz When SB26 is open PC15 is connected to 32 KHz crystal This is the default setting SB26 When 5826 is closed PC15 is connected to the extension connector CN13 In this case R37 must be removed to avoid disturbance due to the 32 Khz quartz Doc ID 023566 Rev 1 15 66 Hardware layout and configuration UM1564 2 5 Reset source The reset signal of the STM32373C EVAL evaluation board is low active and the reset sources see Figure 3 include e Reset button B1 e Debugging tools from JTAG SWD connector CN17 and ETM trace connector CN15 e daughterboard from CN14 e Embedded ST LINK V2 RS 232 connector 12 for ISP in situ programming Note See Section 2 9 RS 232 and IrDA to change jumper JP7 when performing a reset This is handled by pin 8 of the RS 232 connector CN12 clear to send CTS signal 2 6 Boot option The STM32373C EVAL evaluation board is able to boot from e Embedded user Flash e System memory with boot loader for ISP e Embedded SRAM for debugging The boot option is configured by setting switch SW1 BOOTO and the User
55. the default setting The CAN transceiver operates in Slope control mode when JP3 is open When JP2 is fitted the CAN terminal resistor is enabled JP2 Default setting not fitted CAN operates correctly when VDD 3 V 2 15 HDMI CEC Two HDMI connectors CN1 and CN2 are available on the STM32373C EVAL evaluation board e Connector CN1 is a HDMI sink connector with DDC connected to I2C1 of the STM32F373VCT6 HPD controlled by IO PEO through transistor T1 CEC connected to PB8 through transistor T2 e Connector CN2 is an HDMI source connector with DDC connected to 12 2 and shared with the temperature sensor RF EEPROM and audio codec of the STM32F373VCT6 by setting jumper JP4 and JP5 as shown in Table 10 Audio related jumpers HPD controlled by IO PD7 CEC connected to PB8 through transistor T2 HDMI 5 V powered by power switch U1 The signals TDMS 0 2 CLK TDMS D 0 2 and TDMS are connected together on these two HDMI connectors CEC injector mode can be enabled for debugging purposes only as follows e Remove resistors R120 R172 R173 R174 R175 R213 and R221 Close solder bridges SB1 SB2 SB3 and SB4 ky Doc ID 023566 Rev 1 21 66 Hardware layout and configuration UM1564 Note 2 16 2 17 22 66 The must be set open drain output mode by firmware when working as an HPD signal control on the HDMI sink connect
56. tor HDMI connector IR IRTIM PWM EEPROM IR receiver GpAMP2 RF EEPROM connector Potentiometer 3 Temperature adjustable sensor regulator Speaker 3 3 V regulator PT100 amplifier temp sensor passes xtension connector for Pressure GPIOS sensor and amplifier ECG sensor m and amplifier Amplifier MS30560V1 Doc ID 023566 Rev 1 9 66 Hardware layout and configuration UM1564 Figure 3 STM32373C EVAL evaluation board layout CN3 denne ped me ni SO 1 connector HDMI SINK PUT Touch Slider 1 1752 Extension ECG Probe header HDMI Sink CN5 TM32373C EV CAN U5 Pressure U9 Sensor STM32F373VCT6 CN7 CN12 MicroSD card USART2 R63 LDR U12 IrDA CN16 USB FS TRACE 17 JTAG SWD U22 IR transmitter LD10 CN18 IR LED Power Jack U28 Microphone CN22 ST LINK V2 USB CN21 Audio jack LD7 H ST LINK V e COMLED 2 as 5 888 az PP x ADJ ADC Key RV2 B3 VDD_Adjustment B2 Key VDD range Tamper Joystick Button Potentiometer B1 Button Reset Key 4 colors LEDS MS30561V1 10 66 Doc ID 023566 Rev 1 UM1564 Hardware layout and configuration 2 1 Note Development and debug support Version 2 of the ST LINK ST LIN
57. ugging connector CN15 top 40 User USB type B connector CN16 front 40 JTAG SWD debugging connector CN17 top view 41 Power supply connector CN18 front view 41 USB type B connector CN22 front 42 Schematic diagram of 32373 44 STM32373C EVAL 45 STM32373C EVAL 46 STM32373C EVAL peripherals 47 STM32373C EVAL power 48 STM32373C EVAL ST LINK JTAG only 49 STM32373C EVAL JTAG and 50 STM32373C EVAL RS 232 and 51 STM32373C EVAL 52 STM32373C EVAL LCD and SD card 53 STM32373C EVAL CAN 54 STM32373C EVAL Touch 55 STM32373C EVAL 12 peripherals 56 STM32373C EVAL PT100 temperature sensor and connectors

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