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ÉlanSC310 Microcontroller Evaluation Board User`s Manual

1. Pl P3 RASO 1 RAS1 BL1f Q1 2p BL2 CASIL C CASTH BL3 5 4 D BLA CASOL 5 CASOH TPULLUP 95 6 p TPULLUP MWE 7 CDI 7 907 spb d RDYIE GND PULLUP PULLUP GND 9 WP S 4 d9 10b M v BVDIZ 1 SAIS BVDII PULLUE d 1112b EMEN WAITH GND SA23 SA22 7 PULLUP 7 PULLUP E CD2F M d 13145 4 2 RDY2 SA21 SA20 PULLUP E PULLUP x4 3 WP2 7 G Q1i1516fp T T BVD22 SA19 SA18 PULLUP RSVD BVD21 7 7 ye TB ER 7 7 ICDIR SA17 SA16 PUE RSVD RSVD HSE an z 1 MCE22 gt i d 19 20 p i MCE2 SA15 SA14 RSVD Kat RSVD
2. o SD 0 151 SD 0 15 N R92 Y 10K VCCLCRDS VCCLCRDS o e eg v NBCDI gt GND 1 35 GND D6 SD3 END SND p55 NBCD1 34 2 D3 CD1 PCDI gt SD4 D4 Dil SD11 N SD5 SD12 RB400D SD6 DS D12 SD13 MCEI2 SD7 D6 D13 SD14 E a DI D14 5 MCEIZT 7 SDi5 d CEL D15 E SAID gd CE MCELY PMEMRE sg ALO icd OE RFSH MCEL SAIL 104 DE IOR A A11 NIOR TORE SAS E NioWib45 IOWE eg SAS 120 52 aaa ba BSALT BSAI3 139 413 SET BSAI8 BSA14 121414 218 Das BSAI9 PMEMWI 159 Al BSAZO RDY1 ie LE Lo BSAZI lt RDYi i99 RDY TREG A21 Ld vec vec ICVPPi SE 18j vppi VPP2 5 BSAIG 190 VER RS BSA22 BSALS 20 Ris 233 654 BSA23 BSA12 GK 55 ISAZ4 d A12 A24 2 ISAZ4
3. FD ILINK LFZ VCCELI LFI LF3 P 2 ES che see 32KOUT RESINE E a lmise ach 32KINR TXIOUTIBAUD OUT 7 TAGEN p 5 330pt sch TAMOUT ACIN JP19 Kee SMI p 6 dram sch Y XI RESETT IORESET SUS RES RESUME P S sram sch S 2 SPKER LPH P keybid sg JPA VCCMEM53 PMEU pg bufrom sch HEADER 2 VCC1 JP3 vccs JP6 VCCSY253 p 10 biosdos sch 9 ip VCCELS PMCT p 11 pembufct sch a 2 1 L VCcELSYS PMC2 Dead jpenbconvach 2 HEADER 2 2p INS p 13 pemnbcon sch HEADER 2 JP5 VCCSYS5 HEADER 2 POPE p 14 cgavideo sch VCCELSY2 GEE p 15 serpar sch 5 VCCELMEM POPE p 16 isabus sch VCCELSYS PGPD p 17 vlbus sch L3 HEADER 2 VCCELS 78042CS XIDAT SOA2CSE p 18 power sch VCCELA Er p 19 upower sch VCCEL3 p 20 powersw sch c229 47uH A20GATE p 21 lflopide sch 7 d XR 88 fe 8 6 e laan 33188 BAS da es 33uF AN R379 28378 31418 Q Z Ul p 23 sparesl sch F 10 SHBOLE SYSCLK XTCLK 3 81217 8 3 5 8 925 8 5 2 o 0 i2 4 Se dt EL 773a FPS 15189 GND ELPCLK RT 33 45 130 RSVD z g55 OVCOS PCLK i928 SYSCLK VVVVVAVVVVVVVV S X L1 XX L LL R J AERL PPPPP PPPP 8RA MCEH A Di25 rRSvD7 HE L WOCHE ETROI TROL ecccevcccccccce P T F4 33 F FF E T
4. JP24 VECSYS5s 1 BIOS ROM Alternate BIOS ROM 2p R250 U20 u59 HEADER 2 1M vccsvss SA0 T pgoli3 spo SAO 12 10 pooli3 spo SAT 11 Al Doi 14 SDI SAI 11 Al Dol 14 SDL SA2 10 Ai pos i15 SD2 SAZ 10 23 pos 15 SD2 ROMCS ROMCS E R301 SA3 9 A3 DO3 17 SD3 SA3 9 A3 DO3 17 S3 3 BDOSCS SAA 8 93 i18 SD4 SAA 8 Q3 18 SD4 A4 DO4 A4 DO4 SA5 Y 19 SD5 SAS T 19 SD5 DOSCS AS DOS C A5 DOS 0 SA6 6 A6 DO6 20 SD6 SAG 6 A6 DOG 20 SD6 U5ZA SA7 S DOS SE SAT 5 A poo 2i SD7 74ACTOS8 SAB 27 A8 SA8 AT A8 JP25 SA9 6 A9 SA9 2 A9 VCCSYS5 ai SA10 SA10 23 A d 34 A10 A10 i sali 25 279 Sall 25 A10 BSA12 4 A12 VCCROM 4 A12 VCCROM R249 HEADER 2 BSA13 8 A13 o BSA13 28 A13 1M BSA14 9 Al4 vec a2 BSAI4 29 Al4 vec 32 BRONCSE gt BSA15 3 A15 BSA15 3 A15 BSA16 2 Ale c59 BSAI6 2 rie C216 BSA17 30 A17 BSA17 30 A17 Ce JP32 O 1UF O 1UF VCCSYS5 BROMCS1 MEMW 31 16 31d xz 16 o BROMCS ROMVPP 79 vik GND I LEE END BROMCSZT MEMRE 24 LE Y 224 GE R300 224 CE GND 224 CE GND 1M HEADER 3 Z8F020A SYS5 Z8F020A SYS5 32 DIP Socket 32 DIP Socket 28F010 28F010 BROMCS2 ROMVPP MEMR MEMW BSA O 23 A BSATO 23 d en lt SD 0 15 SD 0 15 V SA 0 12 SA 0 12 SE IR
5. Note Pin 1 indicator on Local Bus connector is really Pin 2 in our design VGA Connector V P24 GND GND darab VLCPUCLK y E VLA23 d 3 ab GND GND 2001 VLAZI do eb VLAZ2 4 O O 3 VLAIS Ana ans VLA2O d o o ls VLAIT 44 A05 VLAIS 8 00 7 VLAIS d T VLAIG 101 O O 9 VLA13 d13146 VLA14 i2 o o iii SVCCMEM53 VCCMEMS 3 15 16 D VLCPURST SVCCMEMS3 H 14 0 0 13 VCCMEMS 3 d 17 18 p VCCMEM53 a 16 O j15 VIM IOR d 19 20 b VLADS a 18 o o 17 VLBHEF d 21 22 p VLW RE 4 20 0 0 19 VGARDYF d 53 24 b VLBLEF o 22 O 21 E VLLDEVi 2 41 O 23 Bee VEE 9 25 26 Pp RESDRV 26 O 0 25 VCCS BD VCCS RESDRY B 28 o o 27 vecs VLAI SEA VLAZ vccs a 30 o o 29 VLA3 d 33 346 VLAJ 9 2 32 0 EIS VLAS d 35 36 VLAG 4 34 0 O 33 VLAT Ste VLAS 36 o o 35 VLAJ d 33405 VLAIO 38 0 037 VLAII 11 42b VLAIZ 40 0 0 39 33D14 dd 33D15 42 O O 41 33D12 d as Ad 33D13 44 O O 143 33D10 dar ae E 33D11 46 O O 45 33D8 d 49 50 D 33D9 48 O O 47 33D6 Kee 33D7 50 O O 49 33D4 Q 53 84 33D5 52 O O 51 33D2 d 555b 33D3 54 O O 53 33D0 SE 33D1 56l o O 55 GND d 39 60 GND 58 0 0 57 60 O O 59 GND VGA CONN 30X2 GND EE HIROSE FX660P0 8SV2 D O 15 Component side 33DIO 15 of board veci AN NVLA 1 1
6. Micro Power Mode Switch U62A U62B 74ACT14 74ACT14 ON OFF Indicator 1 2 3 4 OP 5VOLT 9 OP5VOLT R284 7 i 100K 4 4 PSVOLT OPSVOLT OPSVOLT OPSVOLT sw5 o D24 1 U54A 1 1 U54B 1 U55A LED i de i lo i la e SW PBNO 5 d S 3 z E D p Q D P oO D P o R R R R390 3 11 3 amp c o esse CLK CLK PCLK E a cx ome luF E sl sg KE ees E e R304 74HC74 E 74HC74 74HC74 1 3 GND ON OFF switch V GND RASOF OPIZVOLT gt _ R288 4 7K OPSVOLT OPSVOLT OP5VOLT R285 4 4 eg 1 R287 3 100K or C208 3 1 2 2 Q29 luF 2 PMBT3904 1K 1 GND DES U57A 74HC32 74HCO4 GND US6A 74HC08 2 3 1 1 d OPSVOLT R286 10K GND OP5VOLT OP5VOLT o o 5678 516 7 8 La BU 930 Ep o31 40 5 st9410py 4 SEE SI9410DY 25 213 OPSVOLT o HEADER 2 R290 7 C210 JP26 1M o Lut PSVOLT i U62D U62C 74ACT14 74ACT14 V TT c245 GND GND R289 10uF 10V 2 E S gt ESVOIT gt qx P5VOLT EN OPSVOLT 1M 1 1 OPSVOLT 4 4 JP27 c209 Remove JP26 to enable micropower circuitry E 12 HEADER 2 i luF Install JP26 to disable micropower 4 GND 4 R392 M XIORESET gt 33 U56B Remove JP27 if using ElanSC300 rev B or ElanSC310 without uPower mode 74HC08 C Advanced Micro Devices Inc 5204 E Ben White Blvd Austin Te
7. lISAl 1ISA2 lISA3 VCCSYSS 1ISA4 9 1ISA5 l1ISA6 1 alal salo da 9 9 9 9 9 SA O 12 SA 0 12 al310 7 31316 0181715 41211 IISA 0 25 aech BSART0 23 BSAI O 23 MVVVVVV ceccccc CA A7 99 Hsi vccsvss occcccc AAAAAAA CA A8 7i 11SA9 ROC T AAAAAARA C GS 118A10 i 4 0123456 CA A10 76 TISAI 4 B ca_aii 70 IISAIL MCE2 1 MCE2 SL CA A12 88 lIISAI2 MCEI1f L CA A13 75 lISA13 6 MCE22 2 Ant pil wrisAl4 MCE22 4 CA A15 85 TISA TS MCE12 5 U45A Ca als 82 118A16 U47A 74HCTO8 SYS5 CA A17 72 lISA17 74HC20 CAT L74 i1SA18 VCCSYS5 CA A19 76 IISAIS VCCSYS5 CA A20 78 11ISA20 H 4 ca a21 79 118A21 l MCE14 4 81 1185A22 CA ADA rax 1 CA A23 84 1ISA23 3 MEMR MCE12 5 Tet 86 1ISA24 MEMR gt CA A24 aaa EMEMRf 2 89 1ISA25 TRS BSA19 36 SA18 ElanSC300 only BRAG U48A 74HCTO8 SYS5 BSA20 8 SA20 CB_AO 68 21SAO0 74HC32 ENA ESAZI 9 KAN l67 2ISAI m L BSA22 10 EE CB A1 F e 218a2 R238 L BSA23 11 8522 cB A2 65 218A3 sas4 12 5527 CB_A3 64 218A4 JP34 2222 ISA25 13 5242 CBA 62 218A5 0 ISA25 SA25 CB A5 61 2ISA6 3p BENA 26 C8 A F55 218A7 2 ENAA CH ATI Se en Tb BENB 29 ENAB CB A8 44 21SA8 VCCSYS5 VCCSYS5 CB A9 42 21SA9 c X HEADER 3 E OR IN1 CB A10 39 21SA10 ElanSC300 only ENB 38 CS 41 21SAI1I ERE ILI OR IN2 CB A11 5T6215 4 R62
8. voor o E A12 BALE LVDD BALE LVDD A12 BALE 33SA 12 JE3T HEADER 3 123 Note FE using Elansc300 rev A on pins 2 amp 3 If using ElanSC300 rev B or ElanSC310 install JP31 on pins 1 amp 2 to install JP31 on pins 2 amp 3 to for Local Bus mode only always install JP31 then select A12 or select SA12 OKVOW HO man SA O 121 33SA12 SA 0 12 N EN MAI1 SAI2 Ui2 18 3 R349 BSAO iol SEULS 3 R350 BSAL A12 or SA12 VCCSYS5 P 14 R351 BSA2 TAS i 3 R352 BSAS D oa ES 3 R353 BSA vecsys5 u14 SVCCMEM53 VLA 1 12 SIXTY C178 PE er 3 R354 BSA5 OS 2A ss VER i E O 1UF 2A3 2Y3 e S B355 BSA6 SA1 BO AO 3 VLA1 254 2Y4 a 3 R356 BSAT VCCSYSS SA2 Bl Al 4 VLA2 SVCCMEM53 GND SA3 B2 A2 5 VLA3 20 1 SA4 6 VLAJ LOS SE c180 SAS O VEAS c184 O 1UF SA6 B5 A5 8 VLA6 O 1UF GND 74ACT244 V SAT B6 A6 9 VLAT GND GND SAS B7 A7 10 VLAS GND SA9 Xi VLA9 Mos B8 A8 7 18 3 R357 Rans 2 12 vccsvss TAT o ELT 3 R358 BSA9 23 A PRA GND TIS dag es e 3 R359 BSALO Ge 1A3 1v3 E 1A4 1y4 K d R360 BSAIT GND GND c183 15 ee aS 3 R361 BSAI2 HDI51015 0 1UF Bey CS 3 R362 BSA2T 24 8OIC 2A3 2Y3 5 T R363 BSA
9. enne 1 3 Board Installation s otto tene eC ge eni dee HEN Que 1 4 Connecting an IDE Hard Drive nemen 1 7 For More Information eren eterne eret der aero eere Fen teen eene ns 1 9 Chapter 2 Board Functional Description Board I3yoUt ec err estet tee ten eie oet Sn de PER bes 2 2 Evaluation Board Restrictions 2 4 BIOS ERR 2 5 System Soft BIOS eebe n be IEEE AE EE 2 6 Phoenix PICO BIOS rer tr ied delle e ec e een eler eres 2 10 Bus Modes iis D RHET HERRERA ER DE 2 16 KR 2 17 Local Bus Mode ass eee e Renee EEN 2 18 lanSC310 Microcontroller Evaluation Board User s Manual iii DRAM Main M moEfy sco tai ere UR een UR es entre 2 19 Memory Voltage Setting sessi 2 19 WO RURSUS et ee 2 20 PS 2 MOUSE iet is dere ARE AERE EE EEUU nite a 2 20 Serial e MED R 2 21 Parallel Port a d eR RD HERE 2 21 IDE Hard Drive epe teer eer eere eee einer pen 2 21 ROMS etnia Pei ceti tet ei d icai Prat Poetam Pete eset ice vens 2 22 Power Measurement eerte et e HX CHER OV ee A En 2 23 BLR Egeter EELER 2 24 Breadboard Area eee ENEE 2 24 Power Management oie detre Mendes menus 2 24 e Ela E 2 25 Power Management Simulation sese 2 25 MicroPower Off Mode 2 26 Chapter 3 Using the Software SystemSoft Evaluation Diskette eese 3 1 Phoenix PICO Evaluation Diskette ss 3 1 Datalight
10. This chapter provides information that helps you quickly set up and start using the lanSC310 microcontroller evaluation board The lanSC310 microcontroller evaluation board is shipped with evaluation BIOS from Phoenix and SystemSoft which have been configured specifically for this board A jumper JP32 selects which BIOS is used at power up The BIOS contains the code which allows the lanSC310 microcontroller evaluation board to function just like a standard AT compatible PC The lanSC310 microcontroller evaluation board can boot from standard AT compatible diskettes and can use AT compatible displays display adapters and keyboards This chapter describes how to set up the lanSC310 microcontroller evaluation board in Full ISA Bus mode and boot DOS from a diskette In this mode the Trident ISA bus VGA card is used to drive a common video monitor The end of the chapter explains how to connect an IDE hard drive to configure your lanSC310 microcontroller evaluation board to operate like a standard 386 desktop computer lanSC310 Microcontroller Evaluation Board User s Manual 1 1 Booting DOS From a Diskette 1 2 CAUTION As with all computer equipment the lanSC310 microcontroller evaluation board may be damaged by electrostatic discharge ESD Please take proper ESD precautions when handling any board Warning Read before using this evaluation board Before applying power the following precautions should
11. This menu selection brings up a matrix of options that can be set for each PMU mode The value of the highlighted matrix item can be changed by pressing the or keys on the keyboard The arrow keys control which item is highlighted Matrix items with a after them are fixed in the lanSC310 microcontroller and cannot be highlighted or changed Matrix items with a after them are fixed at the current state due to a requirement of the evaluation board These items cannot be highlighted or changed Changes made to this screen do not take effect until either the S key is pressed Program Elan or the X key is pressed Program Elan amp Return to Main Menu To exit this screen without programming the lanSC310 microcontroller with any changes press the Q key To restore the values to those currently programmed in the lanSC310 microcontroller press the L key While in this screen the CPU is running in High Speed PLL mode When any changes to the High Speed PLL mode column are saved the results are immediately noticeable e g the effect CPU Speed has on core current Changes to other columns on the screen are not noticeable until those PMU modes are entered lanSC310 Microcontroller Evaluation Board User s Manual 3 5 The state of the PMC pins can be set for each PMU mode While the particular state the PMC pin is in does not significantly affect the lanSC310 microcontroller s power consumption this matrix allow
12. When set for 256Kx8 parts even addresses from 0 7FFFEh access socket U16 odd addresses from 1 7FFFFh access socket U17 even addresses from 80000h FFFFEh access socket U18 and odd addresses from 80001h FFFFFh access socket U19 When set for 512Kx8 parts even addresses from 0 FFFFEh access socket U16 odd addresses from 1 FFFFFh access socket U17 even addresses from 100000h 1FFFFEh access socket U18 and odd addresses from 100001h 1FFFFFh access socket U19 The application address space is accessed by using an MMS page or by enabling the linear decode for the application ROM Using an MMS page is recommended because it can be accessed using real mode addressing Evaluation Board Jumper Settings There are three jumpers which affect Flash programming on the lanSC310 microcontroller evaluation board JP32 This jumper controls whether BIOS socket U20 JP32 2 3 or socket U59 JP32 1 2 is used JP12 This jumper must be set to 1 2 when Flash parts are used JP12 2 3 indicates EPROM parts lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT JP13 This jumper must be set to 1 2 to indicate 256Kx8 parts are in the application sockets JP13 2 3 indicates 512Kx8 parts and 512Kx8 Flash is only supported after a minor board rework Contact your local AMD or distributor Field Application Engineer for details Initialization Example for Flash Programming 1 Set up PGPO for I O address 100h Elan Index 91
13. memory board on x extended in PhoenixPICO 2 13 map 4 7 4 9 shadow memory regions in PhoenixPICO 2 12 supported 2 18 system in PhoenixPICO 2 13 voltage 2 19 See also DRAM and SRAM Memory Management System Viewer utility See mmsview exe MicroPower Off mode 2 26 MMS MMSA and MMSB windows 3 3 resources accessible 3 12 viewing system resources through 3 12 mmsinfo exe 3 3 mmsinfo zip 3 3 mmsview exe commands for 3 14 3 17 syntax for 3 13 using 3 12 3 18 mmsview zip 3 4 mouse PS 2 See PS 2 mouse N NumLock setting in SystemSoft 2 7 O Off mode power management in 2 24 setting in elanpmu 3 7 OS supported xi oscillator 32 kHz layout suggestions C 1 lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT P P19 2 21 P20 2 21 P28 2 21 P45 2 21 parallel port setting 2 21 setting base address 3 11 setting for EPP and Bidirectional 3 11 setting in SystemSoft 2 7 peripherals needed 1 3 verified to work on board B 1 PGP pins 4 2 4 3 PGPO pin 4 2 PGPI pin 4 3 PGP2 pin 4 3 PGP3 pin 4 3 PGPA pin 4 2 PGPB pin 4 3 PGPC pin 4 3 PGPD pin 4 3 PhoenixPICO See BIOS PIRQI 2 25 PLLs layout suggestions C 2 PMC pins 4 3 4 4 PMCO pin 4 4 PMC pin 4 4 PMC2 pin 4 4 PMC3 pin 4 4 PMCA pin 4 4 PMU modes changing to current 3 9 forcing 3 8 3 9 restoring 3 9 setting options 3 5 3 7 power management lanSC310 Microcontroller Evaluation B
14. simulating battery back up conditions 2 25 Application ROM booting from in PhoenixPICO 2 12 displaying region 3 12 interface using 8 or 16 bit 3 12 memory mapping 4 9 restrictions 2 5 size selecting 2 22 supported xi writes enabling 4 5 B battery backup simulation 2 25 level related to PMU 3 9 BIOS options for PhoenixPICO 2 11 2 15 options for SystemSoft 2 6 2 9 overview 2 5 PhoenixPICO BIOS 2 10 2 15 PhoenixPICO diskette 3 1 restrictions 2 4 shadowing in SystemSoft 2 8 supported xi SystemSoft BIOS 2 6 2 9 SystemSoft diskette 3 1 BIOS ROM displaying region 3 12 memory mapping 4 9 selecting 2 22 writes enabling 4 5 BIOSCS 4 9 BLI BI4 2 24 booting boot sector writes in SystemSoft 2 7 diskette from 1 2 1 7 fast boot in SystemSoft 2 7 first boot in SystemSoft 2 7 order in PhoenixPICO 2 12 setting password in SystemSoft 2 8 breadboard area 2 24 bus modes jumper settings to select A 2 overview 2 16 restrictions 2 4 selecting 2 17 supported xi See also local bus ISA bus and video bus ElanSC310 Microcontroller Evaluation Board User s Manual Index 1 Index 2 C CLK setting in PhoenixPICO 2 13 COM ports internal setting in SystemSoft 2 7 configuration jumpers A 2 connectors external x CPURDY 2 18 CST 4 3 D Datalight diskette 3 1 debugging supported xi disk drive selecting type in PhoenixPICO 2 11 selecting type in SystemSoft 2 6
15. A4 1 04 3304 SB aa r oa L18 33D12 A5 I O5 33D5 7145 r os i2 33D13 SA18CS 33D6 22 20 33D14 33SA18 BE 1706 33D7 SIE 1 08 T 33015 A7 1 07 A7 1 07 A8 27 as HEADER 3 A9 26 A9 3 pin Jumper ATO 23 216 ElanSC300 only SC 38A1225 779 A12 VCCSRAM 33SA13 4 A12 VCCSRAM 335A1428 773 335A1428 773 33SA15 3 32 335A15 3 wc L32 NOTE se UN oc 33sA1631 13 VCC SSAT631 VS Switch for 128Kx68 33SA17 2 512 ca2 335A17 2 12 c43 or 512Kx8 SRAM s _ SAI8CS 30 A17 L SAI8CS 30 215 335A19 i 0 33UF 335A19 1 0 33UF A18 A18 GND 16 GND Z MWES 29 zE MWE 29 oe SRCSZT SRCS2 224 cs V SRCS3 22 24 OE GND 24 OE GND GND 512KX8SRAM MEM53 GND 512KX8SRAM MEM53 32 Dip Socket 32 Dip Socket ElanSC300 only ElanSC300 only UA us sal FREY 33D0 12 0 r o0113 33D8 SA2 33D1 1l 14 33D9 Al IZOL Al Troy SAS 33D2 10 15 33Dl10 A2 I O2 A2 I O2 SA4 33D3 2 17 33Dill A3 1 03 A3 I 03 SAS 33D4 3 18 33Di2 A4 1 04 A4 I 04 SA6 33D5 7 19 33D13 A5 I O5 A5 I O5 SAT 33D6 6 23 20 33D14 SAB A6 1400 33D7 STAR 1096 31 33515 SAS A7 1 07 A7 1 07 27 A8 A8 SA10 S 26 28 SAIT 23 x30 23 aio 7 338A1225 410 3S8A1225 A19 VCCSRAM 3SA13 4 VCCSRAM A12 A12 o 33SA1428 9 ATA vcc 32 33SA15 3 Ala vcc 32 33SA1631 A15 3SAT631 A15 33S8A17 2 A16 C44 33SA17 AIE C45 SAI8CS 30 A17 SR SAI8CS 30 A17 Se 335A19 i 0 33UF 335A19 i 0 33UF A18 A18 GND i6 GND 16 en 20 MWER 29 zE SRCSOF 22 WE v SL WE SRCSOF 228 s GND 24 GND GND 512KX8SRAM MEM53 GND 512KX8S
16. OT Chapter 2 e Board Functional Description The lanSC310 microcontroller evaluation board provides a development platform for lanSC310 microcontroller based designs Read the following sections to learn more about the board Board Layout on page 2 2 Evaluation Board Restrictions on page 2 4 BIOS on page 2 5 Bus Modes on page 2 16 Memory on page 2 18 I O on page 2 20 ROMs on page 2 22 Power Measurement on page 2 23 Power Management on page 2 24 MicroPower Off Mode on page 2 26 See Evaluation Board Setup Summary on page A 1 for a summary of the board settings See Board Layout Suggestions on page C 1 for board layout strategy for the 32 kHz oscillator the PLLs and the power supplies lanSC310 Microcontroller Evaluation Board User s Manual 2 1 Board Layout 2 2 ISA SLOTS SW3 JP16 SW2 SW1 Reset E49 pi P10 16C550 UART Keyboard Super I O Eos PS 2 Mouse KBD Mouse Power Controller Connector National Want Super UO Flop c3
17. Off 5 seconds 10 seconds 20 seconds 30 seconds 40 seconds 50 seconds 60 seconds 2 8 lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT Option Suspend Description Amount of time the lanSC310 remains in Doze mode with no activ ity prior to transitioning to Sleep Suspend mode Parameters Off 2 minutes 4 minutes 6 minutes 8 minutes 10 minutes 12 minutes 14 minutes Defaults Sets all setup screen set tings to default values N A Exit Prompts the user to save the setup and reboot N A lanSC310 Microcontroller Evaluation Board User s Manual 2 9 PhoenixPICO BIOS 2 10 On system power up the PhoenixPICO BIOS tests the system and determines if there are any problems with the setup configuration Since the evaluation board does not have CMOS back up power it uses the default BIOS settings on initial power up The user therefore needs to run setup each time the system is powered off and then on again BIOS prompts the user to press F2 to enter Setup mode and display the setup screen BIOS uses the following keys for navigating the setup screens and editing or selecting options Four menus are available through the menu bar at the top of the window MAIN Use this menu for basic system configuration ADVANCED Use this menu to set the advanced features available on your system s chipset POWER Use this menu to specify your settings f
18. S74 OPSVOLT Grid of 10th Center Holes for Board Updates 2 U33P13 13 12 t SHORT 4 GND SHORT S101 2p LU35Pl i G1 U33F 3 VCCS 1 74HCTO4 MEM53 S100 2 41U35P2 2 Li VCCS GND CON1 SHORT U35A 8 U27B GND Point Berg Header 74HCT32 G2 VCCSY253 OPSVOLT 5 1 N 2 ig 7 U27P7 4 4 6 GND CON1 S79 1 42 SHORT U26P9 9 S S83 1 42 SHORT U35P9 9 3 LF353 V5 GND Point Berg Header S80 12 42 SHORT U26P10 10 J S84 1 42 SHORT U35P10 10 E Fa VCCSYS5 2 y T U26C NUDO S109 GND CON1 74HCT32 SYS253 74HCT32 SE GND GND Point Berg Header VECSY253 OP5VOLT si _G4 i i le 42 SHORT 1 1 S81 1 42 SHORT U26P12 12 S89 1p 42 SHORT U35P12 12 SHORT 9 GND CON1 ii ii i0 GND Point Berg Header S82 1 42 SHORT U26P13 13 S90 1 42 SHORT U35P13 13 8 G5 gt lt Da iS Ss GND U265 GND vccsvss U35D 13 74HCT32 SYS253 TAHCT32 S111 U47B GND CON1 1 1 P 74HC20 GND Point Berg Header 6 sir G6 591 1 2 SHORT U21P14 14 Le 1 25HORT 98 IBS SHORT U21P13 13 ZU PI lt I 1 C y2 10 SHORT GND CON1 GND S99 1 2 SHORT U21P15 LS G v3 D 9 GND Point Berg Header VOCSYSS U21B 74ACT139 o GND Spare Gates Ground Posts for Debug Serial Connector g VCCSYS5 d 5 g ol 2 R205 R204 R203 R202 R201 4 3 1M 1M 1M 1M 1M n 8 f u44 P45 TB SIOIDCDY 22 R03 R12 S psRoRP RAI 300 EEI ele pd vU Ree RI2 To SIN2R R211 300 SINZ SH 1 a SIOISIN RO4 RI4 L d 7 RTS2RF R210 300 RTS2 Fi EN To 212 DO2 Mi SOUIZR R209 300 SOUTZ 3 59 gt SIOISOUT DIS DO3 EE 24013 D93 LE CTSZR R208 300 CTS2F 8
19. Sw4 JP3 JP30 JP28 JP18 JP17 JP36L 1 P27 P28 a P26 BIOS ROMs Applicatioun ROMs JP10 JP26 U59 U20 U18 U19 U16 U17 ahrs pra RPS High ROMs Low ROMs P25 JPb4 Even Odd Even Odd MicroPower Off Mode DESS JPSZ PID d BWs P19 JPT1 160450 UART ElanSC310 System Power JP31 On Light SSI P2 JP27 Parallel E Port CCE m AVCQ 1 EiDRAM VCC JP3 VOC Kr JP7 VSYS JP5 JP4 VMEM DRAM avrete id SIMM Sockets o 2 o 2 83 318 SI 5 5 e Z 2 Z Breadboard Hollis rea PS P1 S EIES E r3 Le z gi ol el alo ol cal ca cal el ug 50 P5 P6 P7 pal Z x S iigpume P24 Local Bus Card Connector Figure 2 1 lanSC310 Microcontroller Evaluation Board lanSC310 Microcontroller Evaluation Board User s Manual 1 0 Table 2 1 Board Layout lanSC310 Microcontroller Evaluation Board User s Manual 2 3 Evaluation Board Restrictions 2 4 The evaluation board ISA bus can only run at 5 V In normal designs this is not a restriction The DRAM SIMM modules must have a 70 ns or less RAS access time for 33 MHZ operation The DRAM on the SIMM modules must be x4 x8 or x16 The lanSC310 microcontroller cannot drive x1 DRAM due to the large capacitance associated with 32 loads System DRAM population of both the 30 pin SIMM sockets and the 72 pin SIMM socket is not supported simultaneously On the 72 pin SIMM socket only 16 bit SIMM modules are fully supported 32 bit SIMMs can be used in the 72 pin SIM
20. VPP2 UU d 21 22 p REVET REGZ ZICRST 7 d 23 24 p 7 7 MCEIZT BTS D14 RSVD e RSVD C MCE1 7 Q 25 26 D 7 7 VPP1 D13 DIZ RSVD RSVD REGIE M 2728p S d IICRST Dil D10 RSVD RSVD ISA24 eee 29 30 D ISA25 D7 De XIORESET Qd 3132 D SACER D5 D4 PMCO Q 33 34 D PMC1 D3 D2 SPKER Q 35 36 p Ba au RE uum pet DSCET T DACKI d 41426 CPURDY LMEG IS SOE poscsi FT SYSCLK XTCLK T DROZ TDO DSMDO LpEvs amp RSVD X 9 FEE D X A23 LA23 DSMA14 AEN 7 AEN TDI 7 TC TMS TC x 43 48 D A21 LA21 DSMA12 SDRDL fENDIRL ENDIRH SDRDH DSMA13 A22 LA22 d 49506 7 A19 LA19 DSMA10 ENDIRH gt DSMA11 7 A20 LA20 7 g 51 52 b 7 A17 LA17 DSMAS8 DSMAS9 Al8 LA18 d 5354 o Sed 55 56 bx MESS x q 57 58 bx d 59 606 GND 10th Center 30x2 GND 10th Center 30x2 Berg GND AMP 3 102977 0 R225 AMP 3 102977 0 D 0 15 1M gt DSMA 0 14 gt DSMATO 14 SA 13 23 DSMD O 7 Usual 5 DSMD O0 7 TORE IOWT DSMA7 A16 DACKO A15 DACK34 7 DSMA6 MCCL EMEMRE EMEMNY DSMAS 7 A14 DACK7 7 A13 DACKG6 DSMA4 ERESDRV SDENY DSMA3 CPUCLK PULLUP T CPURST RSVD DSMA2 GND GND DSMAT 7 PULLUP IRQ7 7 7 RSVD PULLUP 7 DSMAO E SA12 SA11 GND R224 SA10 SA9 DSMD1 7 LRDY T DRO6 7 BLEs IRO11 DSMD2 1M SAB SAT DSMD3 TBHE IRO9 7 W R DRO7 DSMD4 SA6 SAS DSMD5 7 M IOsS DRO3 7 D Cf DROO DSMD6 SA4 SA3 DSMD7 7 ADS OWST x DSMAO SA2 SA1 SAO DEET IRQ4 DROl MEM
21. for a boot disk C then A C only A then C Embedded Features ROM DOS Support Enables booting from the ROM DOS image Enabled Disabled ROM RAM Disk 0 Non magnetic boot device None Serial ROM XMS ROM RAM Disk 1 Non magnetic boot device None Serial ROM XMS lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT System Memory Description Amount of conventional memory detected during boot up Parameters Extended Memory Amount of extended memory installed on the system It is detected automatically so it should not require any manipulation f user type 48 is chosen the following parameters must be set they are usually found on the drive label Type Number designation for the drive user type 48 Cyl Number of cylinders on specified drive see drive label or documentation Hd Number of heads on specified drive see drive label or documentation Pre Designates the starting cylinder of the read delay circuitry set to 0 LZ Designates cylinder location where heads normally park when system is down set to 0 Sec Number of sectors per track see drive label or documentation Table 2 4 PhoenixPICO BIOS AdvancedMenu Setup Screen Options CPU Speed Advanced Chipset Control Description Sets processor speed Sets the divisor for the AT CLK Parameters Large Disk Access Mode Select DOS if
22. lanSC310 Microcontroller Evaluation Board User s Manual lanSC310 Microcontroller Evaluation Board Revision 1 0 1996 by Advanced Micro Devices Inc All rights reserved No part of this publication may be reproduced stored in a retrieval system or transmitted in any form or by any means electronic mechanical photocopying recording or otherwise without the prior written permission of Advanced Micro Devices Inc Use duplication or disclosure by the Government is subject to restrictions as set forth in subdivision b 3 ii of the Rights in Technical Data and Computer Software clause at 252 227 7013 Advanced Micro Devices Inc 5204 E Ben White Blvd Austin TX 78741 AMD is a registered trademark and lan is a trademark of Advanced Micro Devices Inc Other product or brand names are used solely for identification and may be the trademarks or registered trademarks of their respective companies gx The text pages of this document have been printed on recycled paper consisting of 50 recycled fiber and 50 a Lo virgin fiber the post consumer waste content is 10 These pages are recyclable Advanced Micro Devices Inc 5204 E Ben White Blvd Austin TX 78741 7399 1 0 i Contents About the lanSC310 Microcontroller Evaluation Board B at res err t ERU PW REEF RUE V eee FREU Ee X Chapter 1 Quick Start Booting DOS From a Diskette ss 1 2 Installation Requirements
23. 1 5 6 S gt lt a 5 Sie 4 SHORT Tec 22 4 U57C s12704 6 74HCO4 1 2 SHORT 5 OP5VOLT gt lt 2 o SHORT U58B 4 74HC32 S134 EEN 9 8 OPSVOLT Ga SHORT S128 4 U57D SE 74HCO4 sizsP d 8 T 2 SHORT 10 OP5VOLT gt lt E SHORT U58C 4 74HC32 s135 KEDE 11 10 dch SHORT OPSVOLT U57E 74HCO4 S130 4 1 2 12 OP5VOLT sisi es 11 N In 42 SHORT 13 4 gt lt SHORT U58D 13 l2 OPS5VOLT V 74HC32 Qi GND v 4 GND U57F gt 74HCO4 S151 2 SHORT 11 10 74ACT14 U62E OPSVOLT OPS5VOLT Le 1 4 C240 VCCSYS5 VCCSYS5 VCCSYS5 VCCSYS5 VCCSYS5 vccs Ge o 2XSHORT 3 12 0 1UF C217 c218 c219 c220v c221 c222 RUE GND GND U62F GND SVCCMEMS 3 O 1UF O 1UF OLUF 0 1UF OSTUR 0 1UF nl Decoupling caps for components that I added on the REV 2 2 design 4 v v v v v Place caps close to device that it belongs to GND GND GND GND GND GND U33P3 3 4 GND SHORT ER DESVORE SS GRSVOLT PRE TORE UI du C Advanced Micro Devices Inc 74HCTO4 MEM53 5204 E Ben White Blvd C223 c224 C225 C226 C227 Austin Texas 78741 0 1UF o Log O 1UF O 1UF 0 1UF 800 222 9323 AMD Proprietary All Rights Reserved v v Title GND GND END END GND SPARES continued Decoupling caps for components that I added on the REV 2 design Size Document Number REV Place caps close to device that it belongs to 3 id andGa00 ad Oo EvaludtioneBoard pes Date March 29 1996 Sheet 23 of 23 OT i Index Numerics 8042 keyboard controller 2 20 4 14 A ACIN pin related to PMU 3 9
24. 12 12 12 413 413 13 13 13 13 13 13 13 13 13 13 13 13 apia ra 14 14 14 14 14 14 14 14 14 14 14 14 Keren is is 15 15 15 15 15 15 15 15 15 15 15 15 i tie Jie 16 16 16 16 16 16 16 16 16 16 16 16 a 417 417 17 17 17 17 17 17 17 17 17 17 17 17 ee t S is is 18 18 18 18 18 18 18 18 18 18 18 18 19 19 19 19 19 19 19 19 19 19 19 19 19 19 EE 20 4 20 20 20 20 20 20 20 20 20 20 20 20 20 Ga 421 421 21 21 21 21 21 21 21 21 21 21 21 21 S agan 22 4 22 22 22 22 22 22 22 22 22 22 22 22 22 E ER ER ER ER ER 23 23 23 23 23 23 23 23 23 2 24 4 24 24 24 24 24 24 24 24 24 24 24 24 24 i 425 425 25 25 25 25 25 25 25 25 25 25 25 25 853 26 26 26 26 26 26 26 26 26 26 26 26 26 26 Z ana 29 lt 427 427 27 27 27 27 25 27 27 27 27 27 27 27 28 28 28 28 28 28 28 28 28 28 28 28 28 28 SHORT 29 429 29 29 29 29 29 29 29 29 29 29 29 29 Cdp 30 4 30 30 30 30 30 30 30 30 30 30 30 30 30 OF Ra MEI 431 4 31 31 31 31 31 31 31 31 31 31 31 31 31 SUGEMUMES 32 4 32 32 32 32 32 32 32 32 32 32 32 32 32 Wags 33 433 33 33 33 33 33 33 33 33 33 33 33 33 1 34 4 34 34 34 34 34 34 ER ER ER 34 34 34 34 s73 3e 43 3e 3e d3e 3e 3e 436 136 138 136 136 4 e 36 EE LE 19 ER Re d 37 4 37 37 37 37 37 37 37 37 37 37 37 37 37 SHORT lt 38 4 38 38 38 38 38 38 38 38 38 38 38 38 38 SC er seet 39 39 39 39 39 39 39 39 39 39 39 39 39 39 D RDTOX MEMS3 Sec 40 440 20 20 20 20 20 20 20 40 40 40 40 40 SVCCMEMS 3 74HCTO4 V5 10TH CTR HOLE GRID 4
25. 18 SWA 3 9 SWA 1 2 19 SW4 1 SW4 8 A 3 SW4 2 2 25 SW4 3 2 25 SW4 4 SW4 7 2 24 SW4 8 2 25 SWS 2 26 switches list of A 3 settings A 1 system date and time setting in PhoenixPICO 2 11 setting in SystemSoft 2 6 system memory See memory system system RAM filling with selected byte 3 12 SystemSoft See BIOS T timeouts setting in PhoenixPICO 2 14 2 15 typematic rate in SystemSoft 2 8 U UARTs connections to serial ports 2 21 internal 3 10 Super I O 3 10 utilities 3 2 3 4 ElanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT V VGARDY 2 18 video display setting in PhoenixPICO 2 11 display setting in SystemSoft 2 7 shadowing BIOS ROM in PhoenixPICO 2 12 shadowing in SystemSoft 2 8 view of data appending to log file 3 12 voltage controlling 4 5 VPP 4 5 VRT bit 2 6 lanSC310 Microcontroller Evaluation Board User s Manual Index 7 Index 8 lanSC310 Microcontroller Evaluation Board User s Manual 1 0
26. 39 ORNE CEA 57 218212 6 MEMYH em JP35 100K SC SE TEN 26 215410 EMEMW 3 oo BBBBBBBB CB A14 49 2ISAT4 E U21P37 DD Cees 55 218A15 BE ARARARAARA on 1 EEGGGGGGG AAAAAAAA CB_A16 D 21SAl16 74HC32 6 LLNNNNNNN 22222211 33 218A17 THEADER 3 7Q TEST ACDDDDDDD 54321098 CB A17 Elangecs00 only A 5 5 a esee 55s ssis44 C amp TE87000M2 SYS5 ZISA O abd R374 Ze yeesvs 2 71 5 010 0 7 3 8lea12 108 100 PorFP Eure 100K as ZISAIS Note ASS R260 ZISA20 Solder down U48 pins 3 and 6 and depop R238 amp R239 if using 100K GND ZISAZ2I ElanSC300 rev A or ElanSC300 rev B with parallel port ZISAZZ ZISAZ3 Lift disconnect U48 pins 3 and 6 and populate R238 amp R239 ZISAZA vccsvss if using ElanSC300 rev B without parallel port or ElanSC310 VCCSYS5 ZISAZS o If using ElanSC310 do not populate U22 U24 U49 JP34 JP35 R220 Also see note on page 15 34dao 10K SD 0 15 BEE U23 EMEMR SE SDO MMVVVVVV CCCCCCCCC LISDIO 4131 IrSD O0 15 EMEMW SD1 OOCCCCCC AAAAAAAAA 82 1 o P4 PMC1 SD Se RIWCC CA DO ES TISDT 3253 27 18 PMCI aS sp EP wee CA D1 3 728 EE ere SJ ial 1v1 H IMCEZT PMC3 SD4 BC EO CA D2 70 ISD3 1 2 S MCEIZf 6 1A2 1v2 TA l1MCE1f SDS T CA D3 72 I8D4 PM REGI 8 1A3 1v3 i2 TICREG soe CA Di T4 sk EESDS 1 2 3 Tsay Bea 9 SD7 CA DS Ia AISD 1 EN 3 MCE2 i13 2A1 NE 7 2MCE2 lVCCSYS5 VCCSYS5 VCCSYS5 VCCSYS5 VCCSYS5 SD8 CA D6 Tg ITSDT 1 2 3 MCE22 I5 RA 2Y2 5 2MCET SD9 CA DT
27. 67K 7 U37E IG2AY DIS 74HCTO4 V5 40pF 5 M 6 cv eS rss GND 200pF C236 8 555 TIMER 0luF GND vccsvss5 GND C237 luF GND Note ElanSC300 only The 555 Timer is configured to function as a one shot ElanSC300 revs Bl amp B2 deliver a short RESDRV pulse when exiting uPower OFF mode which could cause some issues That is the reason for this one shot The ElanSC300 rev B3 device will address this issue amp the one shot is not needed ElanSC300 only NOTE NOTE Place these componments close to the Place these componments close to the ELAN Socket pins to minimize trace length ELAN pins to minimize trace length Erri SE mri SLFZ LFZ SLE2 LEZ SLES LF3 SLE3 LES SLFA LEA R18 c30 R20 c27 R19 c32 R21 c28 R14 E 022 R16 c18 R15 C24 R17 LO 0 0 47uF 0 0 47uF 0 0 47uF 0 0 47uF 0 0 47uF 0 0 47uF 0 0 47uF 0 0 47uF c29 c26 c31 c33 c21 c17 c23 C25 0 47UF 5 0 47UF 5 0 47UF 5 0 47UF 5 0 47uF 5 0 47uF 5 0 47uF 5 0 47uF 5 y Video Low Speed Intermediate High Speed v Video Low Speed Intermediate High Speed GND PLL PLL PLL PLL GND PLL PLL PLL PLL ElanSC300 PGA Socket Loop Filters ElanSC300 310 QFP Chip Loop Filters OVCC3 vecs R383 9 lt PSDKINE 232KINR P32KIN c233 2 27PH Di R10 33 X3j43 R13 AX RLS4148 100 32 768KHz 390K R11 SPKER SPRER Reo Lt 1 RESRC RESUME lt SPKER 16M TD RESIN RESTNER 33 L EE P32KOUT c234 R382 AS C20 0 1UF GND 0 2 2uF R381 Bz1 o C14 RESUME gt 32KHz Crystal PGA 0 1UF sw2
28. 7 MA2 HE MAZ PER MA2 33 Bass A3 8 MA3 A3 8 MA3 A3 8 MA3 A3 MA3 CASOL 40 CASO A4 MA4 AA il MA4 AA TL MA 4 AA MA4 CASOH 43 CAST A5 MAS A5 Xx MAS A5 12 MAS A5 MAS CASIL 41 CAS2 ao MAG AS 14 MAG Ae 14 MAG AS 4 MAG CASIH 42 CAS2 A7 MA7 A7 15 MA7 A7 15 MAT A7 15 MAT MWE T br pes MAS ALERT MAS al E17 MAS AT EET MAS MAO A9 MAS A9 18 MA9 A9 18 MAJ A9 18 MAJ MAI A10 MA10 A10 19 MAIO A10 19 MAIO A10 19 MA10 MA2 24 MAIL 24 MATT 10 21 MAIL MA3 Ali All Ali Ali C Ma EE 3 D8 h DO 7 3 D8 MA4 D1 D1 D1 D1 4 D2 D2 6 D9 D2 6 DI D2 6 D9 MAS pe ees DIO 22 10 DZ D2 10 DIO Mae T5 ES Po 13 Dii Be ria D3 Rena DII MAT Se lee DIZ les D4 D4 1s DIZ MAS De pe L29 Dis pe L29 D5 De re Di3 MAS 23 D14 23 D6 23 D14 MA10 D7 D7 H E D7 D7 MAID 19 25 DIS 25 D7 5 DIS MAII D8 pe H D8 D8 MAIL 251 ALL 29 29 29 DO 2 D9 Do 22 Do 22 Do 22 2 po ps 2 o9 LR o9 E 09 S B3 1 GND GND 22 GND 22 GND 22 7 b3 F D2 GND GND GND GND DA ZO D3 30PINSIMM GND 30PINSIMM GND 30PINSIMM GND 30PINSIMM GND D5 22 SS Molex 15 46 3043 Molex 15 46 3043 Molex 15 46 3043 Molex 15 46 3043 DS 24 PS D7 26 DE 49 Di Green D 0 15 DS Le DIO 53 bid 531 510 Dit 55 D19 AN MA O 11 JR J D12 57 512 DIS GT Lbi3 61 513 DIZ 63 i5 g5 214 DIS 65 ERR DO 3 D16 Di 5 P 21 pi7 D2 7 El DIS DE 2 p19 R248 D4 21 Bis SA12 MA11 D5 23 D21 D6 25 pal x0 D7 27 27 p23 DE 50 233 SA13 R31 o MA10 DS Stee SA23
29. 72 pin SIMM socket located next to main memory bank 1 on the evaluation board see Figure 2 1 on page 2 2 On the 72 pin SIMM socket only 16 bit SIMM modules are fully supported 32 bit SIMMs can be used in the 72 pin SIMM socket but only half of the memory will be visible BIOS automatically detects the amount of DRAM installed Memory Voltage Setting The lanSC310 microcontroller evaluation board allows system memory to operate at either 5 V or 3 3 V When operating in Local Bus mode 3 3 V memory must be used In order to operate memory at 3 3 V ensure that the memory is rated for 3 3 V operation SW4 1 controls the voltage for the system memory lanSC310 Microcontroller Evaluation Board User s Manual 2 19 UO The lanSC310 microcontroller integrates several standard I O interfaces A 16C450 compatible UART bidirectional parallel port is controlled by the lanSC310 microcontroller In addition the lanSC310 microcontroller evaluation board contains a Super I O which contains a 16C550 UART a floppy disk controller and IDE hard drive interface A standard 9 pin connector is provided for an extended PC keyboard A PS 2 port is provided for use with a PS 2 style mouse Both the keyboard and PS 2 mouse are driven by the 8042 PS 2 Mouse 2 20 A PS 2 port has been provided on the evaluation board for a PS 2 style mouse This device is driven by the 8042 keyboard controller While in ISA or Local Bus mode the lanSC
30. 8 X1 OSC NNNNS EIDORI PE WDATA 84 25 GND _WGATE p965 Z IDE HDD R149 x2 DDDDA R7 06 BUSY WAIT MTRI 229 GND TRACKO 10K 274 GND wp 528 Connector T PC87322VF SYS5 290 usa 630 JP17 29 93 ases Nat 1s 1 0 319 END RDAIA 037 ure 23101 8 7 0 6 5 been uper 54 GND SIDE DST i oo 2 p q GND DCHNG PIROO Eh RE NSIROIZ 5 FDD 10th Cntr 17x2 Berg 5 oo 6 GND R222 GND AMP 1 102977 7 7 oo 8 Ee HEADER 3 T 9 00 10 E NOTE L_ ton 11 oo 12 d Choose Mouse or FLP24X2 C146 13 oo 14 g Uart for Interrupt R200 27PF 15 06 Ze e IM 17 00 18 5 JP18 x2 GND 19 oo 20 f 1 24MHz gy 21 OO 22 a FLP24X1 i c 23 OO 24 FERMI S 27PF VW 25 oo 126 a HEADER 2 GND 27 OO 28 r Note Tore bep PAN 29 OO 30 a Populate to use 31 oo 132 Mouse in Full ISA 33 OO 34 vcci Mode Pai d 35 00 36 37 oo 38 39 oo 40 RESDRV RESET GND a 39 Ee DATA7 DATA8 DATA6 DATA9 DATAS DATA10 DATA4 DATA11 Component qe DATA3 DATA12 CES DATA2 DATA13 DATA1 DATA14 DATAO DATA15 5 GND VCC GND EN END R217 END SHORT U46 Low 74HCT32 SYS5 TOR SS IOCRDYALE o GND 5 TROTT E EE VCCSYS5 vccsys5 ADDR1 PDIAG SAD ADDRO ADDR2 SAS ry E cso cst BI29 vecsys5 ae END 10K Super I O Floppy amp IDE Hard Drive 2 VCCLGC VCCMTR GND TYPE C Advanced Micro Devices Inc Pope ii GND IDE 10th Cntr 22x2 Berg 8204 EiHan White Bid S107 SHORT U46P13 13 AMP 2 102977 2 Y A MD veasves ustin Texas 78741 END U46D 800 222 9323 74HCT32 SYS5
31. 8i 1ISD8 wr Za REG2 I7 2A3 2Y3 3 2ICREGf S CDS 84 118D9 vccsYss 2A4 2Y4 lt SD11 CA D9 84 227 R251 R252 R253 R254 R214 SD12 CA Dio 86 1ISDI10 Q 20 vec iG b PMCI 100K 100K 100K 100K 100K 7i 118Dll 10 15 PMCS SD13 CA D11 ENER SCHEER GND 2G GE CA D12 75 ITSDIS 74HCT244 5YS5 CA p14 77 1ISD14 GND 20 SOIC 12d ton En Dis p29 ITSDIS ElanSC300 only iid IOR E zISDIO l12l gt 21SD 0 15 QEO WEO ElanSC300 only CBP 69 21502 ENA 4 D2 2 S18B3 S 34g IOIS16 CB D3 82 27803 ULTRI U42P12 vecs Bd WAIT CB D4 2 518p5 S8 i g NOGET CB D5 2 2192D2 vccsvss sd MECEL SE 21816 U46B 12 d THEN MECE CR p5 L61 218D7 74HCT32 SYS5 11 WAITR 4 BENB 1 4 ENAB CB D 64 2ISD8 VCCSYSS 13 d prE 9 8 SE ER 8 2ISDIU 4 GERS VCCSYS5 PMCI 16 53 21SD11l ENB E 74HCTO8 V5 vecsyss PMC3 179 CARDAON GB Dil 55 2rspi2 9 U42P13 USD c CB D13 57 21SD13 WAIT2 FA OA OR_IN2D CB_D15 lt lt 100K MEGSYSS 29 oR out ES GGGGGG T 74HCT32 SYS5 S 6 TEST ADDDDDDD W E PCMCIA Buffers ElanSC300 only R63 aleae C amp TF87000M3 SYS5 9 See note above left for ElanSC300 310 rework gt ee P 100K 2lil481818 512 100 POFP PMEMRF Fjiat ivi S TIMEMRF GE Cer GEG Ces AER C Advanced Micro Devices Inc PMEMW 1A2 1v2 1IMEMW 5 TORF TETA 14 IIXIOR RA VCCSYS5 VCCSYS5 O 1UF 0 1UF Td rd 5204 Et B n WATTS Blvd TOW ii 1A4 1Y4 9 IIXIOWi GND GND GND GND Aus
32. 95 ER 25 BOL RIT DS DTRX2RP R207 300 DTRX2F 4 Component Sere ra pos DOl I2 RI2ZRF R206 30 RIZ SZ side view PMCZ 3 ON OFF 55 5 lo Super I O Serial Interface lUF 16V cit c2 FEER SSC o c163 A geleet ass osa eres eus z leves SH EE C Advanced Micro Devices Inc 015 Lei c CLs STS c c CLS lvccsvss 7 H c c2 28 TORTEN 220PH220PH220PH220PH220PE220PH220PH220PF 5204 Ear Ban white Blvd 5 iive v 2E cock Austin Texas 78741 vw SNO ML 1UF 16V GND GND GND GND GND GND GND GND 800 222 9323 LT1337A SYS5 AMD Proprietary All Rights Reserved 0159 28 WSOIC Title AOR GND GND Spare Gates amp Super I O Serial Port GND Size Document Number REV B ElanSC300 310 Evaluation Board 2o Date March 29 i996 Sheet 22 of 23 OP5VOLT 2 S118 SHORT VCCSYSS d OPSVOLT VCCS 1 oi U55B 4 137 4 9 i2 al 4 9 8 S138 8 6 10 15 42 SHORT 10 5 V U56C SHORT Uodc SHORT U52B GND SHORT gl 74HCO8 74HC32 74ACTO8 74HC74 OPSVOLT VCCSYSS 3 o vecs o o 1 d 4 139 4 1 12 1 12 4 OP5VOLT S119 ii siao P 9 ii 9 SHORT 13 1 2 SHORT 13 8 2 e 9 SHORT 10 U56D SHORT U53D 74HCO8 V 74HC32 SHORT U5S2C GND GND 74ACTO8 VCCSYS5 4 12 Si46 11 1 SHORT 13 gt lt SHORT U52D 74ACTO8 V GND OP5VOLT oi 4 133 OPSVOLT
33. Blvd Austin Texas 78741 800 222 9323 AMD Proprietary All Rights Reserved Title Serial amp Parallel Port Circuits amp Conns Size Document Number REV B ElanSC300 310 Evaluation Board Od Date March 29 1996 Sheet ES er 23 IOCHCHK vecsys5 VCCSYS5 wA GND Ego y P22 RESDRV 50 cup IOCHCK b szpSECBER GND 20 GND IOCHCK i SD RESDRV D7 L 3 s56 RESDRV 52 RESDRV D7 3 SDE IROS 53 Se Do 1 SDS IRO9 53 1859 pe 2 ses MSVOLT 54 e 5 SD4 MSVOLT 54 e S gt SD4 EST s D3 L SD3 T DEOS 55 DREQ2 D3 L6 SD3 MI2VOLT 56 7 SD2 MI2VOLT 56 p 7 SD2 ONST EE D2 5 spi MIZVOLT OST 57 ey D2 5 SDI Storr 558 880 PIZVOLT 38 12v Do L Se apy PI2VOLT PI2VOLT 28 12V DO gr SMEMWET GND IOCHRDY GND IOCHRDY IOCHRDY y 60 KEN 60 ii runa OSMEMW AEN SMEMW AEN AEN GND SMEMR EMEN AS BSAIS EE Zeg ais i2 BSAIS TOWF E BSA18 629 Z 13 BSA18 TORE SE 218 BSAI7 TORE 63d TON A18 14 B8A17 DACK3 e
34. D s 2ICRST SA 550 AS RESET 059 WAIT2 2ICRST 2543 229 A4 WAIT p22 WALT2 SAZ SE INPACK Der REG2 d A2 REG 2 REGZT SAI 28 62 BVD22 d AL BVD2 SPK 21 BVD22 SAO 29 2 63 BVD21 sar 224 a0 BVD1 STS p83 BVD21 SDI 319 DO D8 Des SDS SD2 320 21 D 066 SD10 t ees 33d WP IOIS CD2 pet PCDZ22 GND END Be GND IC Card GND AMP 175649 2 ElanSC300 onl CWPZ ESATO ZZ BSA O 23 R J PCMCIA Non Buffered Connectors ElanSC300 only If using ElanSC310 do not populate P15 and P16 C Advanced Micro Devices Inc 5204 E Ben White Blvd Austin Texas 78741 800 222 9323 AMD Proprietary All Rights Reserved Title Non Buffered PCMCIA Connectors SizelDocument Number REV B ElanSC300 310 Evaluation Board 2 2 Date March 29 1996 Sheet 13 of 23 VCCS5 VCC8 VCC5 o vecs Vvccs vccs vecs vccs o VCC5 o o o R115 R114 R113 Y 9 21 5K 21 5K 21 5K R112 R108 R107 al D9 D8 21 5K g U27A 21 5K 21 5KM IR DETECTOR U28 vccs IR LED C82 BPV22F BAUDOUT Al cen vec 24 9 BEL 00080094 2 13 CLK2 K SIRI 1 i
35. HEADER 3 3 pin Jumper NOTE JP13 R307 Jumper 1 amp 2 for 256Kx8 parts i BSA19 VCCSYS5 33 Jumper 2 amp 3 for 512Kx8 parts ig rosaH i BSA20 1 P 6 HEADER 3 2 4 DOSOCS R308 3 pin Jumper EXE MESA 5 DOSICS 6 y2 p BDOSCS ch G Y3 6 7 a3 V U21A BIOS amp DOS ROMs GND 74ACT139 C Advanced Micro Devices Inc NOTE 5204 E Ben White Blvd Use switch for 512Kx8 ROMs A ti T 78741 vccsvs5 VCCROM or 256Kx8 Flash chips EE o 800 222 9323 AMD Proprietary All Rights Reserved Title C193 C194 HEADER 2 prm Se BIOS amp DOS ROM Flash or EPROM Power Measurement Point 10UF 10 10UF 10 Size Document Number REV ENS Be B ElanSC300 310 Evaluation Board 2 2 Date March 29 1996 Sheet 10 of 23 1ISAO
36. However due to bus loading High Speed operation is not possible without depopulating several components The ElanSC310 microcontroller evaluation board comes with SystemSoft BIOS programmed into the ROM in socket U20 and PhoenixPICO BIOS programmed into the ROM in socket U59 Jumper JP32 selects which ROM socket is used when the system boots JP32 1 2 selects socket U59 JP32 2 3 selects socket U20 Each BIOS is an evaluation version specific to the evaluation board An evaluation diskette for each BIOS is shipped with your kit The BIOS ROM images are located on their respective diskettes NOTE These are evaluation BIOS only Each BIOS has been tested on the evaluation board and a list of know errata is available on the AMD Utilities diskette For the most recent errata listing contact your local AMD representative ElanSC310 Microcontroller Evaluation Board User s Manual 2 5 SystemSoft BIOS On system power up the SystemSoft BIOS tests the system and determines if there are any problems with the setup configuration Since there is no CMOS backup power on the evaluation board it uses the default BIOS settings upon initial power up NOTE You need to run setup each time the system is powered off and on again SystemSoft BIOS also monitors the Valid RAM and Time VRT bit in the RTC This bit gets reset every time a hardware reset occurs Therefore every time the system is reset using the red Reset button SystemSoft BIO
37. R243 2 o 33 SW PBNO Swi BUZZER V5 C Ad d Mi D I 5 KOERN GUB ENN HERE C vanced Micro Devices Inc lt S2KINR 2KINR 32KIN cie 5204 E Ben White Blvd SW PBNO GND i SIRF Austin Texas 78741 SUS RESUME 33 K CE E e R12 32 768KHz 2 AMD Proprietary All Rights Reserved 16M i Title Sec GABUN Gn XTAL SWITCHES LOOP FILTER COMPONENTS SPEAKER ER Size bocument Number REV GND Reset Switch Suspend Resume Switch System Speaker 32KHz Crystal QFP G Elenso3004210 Evaluation Baard Sem Date March 29 1996 Sheet 4 of 23 D 0 15 sa t13 SATO 23 T2 CASOL CASOH CASIL CASIHf SSS 33D 0 15 D15 O0 R311 33D15 TT DIA 0 R310 33D14 MCS164 Decode Di3 O0 R312 33D13 SA 13 23 Di12 6 R313 33D12 Dil 0 R314 33DII DIO 0 R315 33D10 DS 9 R316 33D9 DS D R317 33D8 VOCSYSS 2 2 R296 VCCSYS5 SA16 1 19 MCS16 JP22 SA17 2 di 0 Pie Mesie gt HEADER 2 SA18 3 17 0 SALSA 12 03 Pre D7 o R318 33D7 SA20 ST es PIS AEN D6 9 R319 33D6 12 R245 SA21 6 Te oe bl D5 0 R320 33D5 100K SA22 1100 OS Pag
38. R32 o MAS DIO SA 525 SA22 R30 oO MAS Dii 56 p3s SA21 R28 o MAT DIZ 58 oa SA20 R29 0 MAG DIS 607 D28 SA19 R27 D MAS D14 62 D30 SAIS R26 O MAZ DIS 64 239 SAIT R25 0 MAS eT Beni SAI6 R24 7 MAZ ERA SAI5 R23 o MAL BEDS SA14 R22 o MAO PRDA NC NC NC NC NC NC NC NC NC GND GND GND V GND 72PINSIMM Molex 15 82 0762 VCCMEM53 JP7 VCCDRAM d Q 2 HEADER 2 C34 cas C37 C38 C36 C39 C40 Power Measurement Point A A 10UF 10V 10UF 10 dE EE Main System Memory DRAM SIMMs GND GND GND GND GND GND GND E C Advanced Micro Devices Inc 5204 E Ben White Blvd Austin Texas 78741 800 222 9323 AMD Proprietary All Rights Reserved Title DRAM Main Memory SIMMS Size Document Number REV B ElanSC300 310 Evaluation Board uer Date March 29 1996 Sheet 6 of 23 33SA112 23 33SA 12 23 SRT V SA O 121 3351015 V VCCMEM53 o u2 u3 33D0 12 13 33D8 E Al riot 33D1 11 7 1500 i4 33D9 25 A2 I 02 33D2 TO 42 1 02 LES 33D10 A S 33D3 o 2S 370 17 33D11
39. R373 D4 D R321 33D4 SA23 8 I8 o8 12 D3 0 R322 33D3 128K764K 9 1 P AN D2 9 R323 33D2 Brit o DT D R324 33D1 GND VCCSYS5 DO 0 R325 33D0 JP23 USO HEADER 2 16L18 5 20 DIP Socket Te R246 100K ENA DIS GND Place PAL close to ELAN to minimize trace length on address lines Install JP22 amp Remove JP23 to enable MCS16 to addr FFOOOO FFFFFE 64K Remove JP22 amp JP23 to enable MCS16 to addr FFEO00 FFFFFE 128K Install JP23 to disable PAL Indicates component removed from Bill of Material 338A 12 23 SA23 0 R326 33SA23 SA22 10 R327 335A22 SA21 0 R328 33SA21 SA20 0 R329 33SA20 SA19 0 R330 33SA19 SA18__ 0 R331 338A18 SALT 0 R332 335A17 SAl6 0 R309 33SA16 R236 SA15 0 R333 33SA15 MEE EE SA14 ZO R334 33SAIA4 0 SAIS 70 R335 335A13 CASOL XU R336 SRCS2 R237 CASOH O R337 SRCS3f SERERE TXHOUT CASILf 0 R338 SRCSO SRCSO CASTH 0 R339 SRCSI SRCS1 0 SAIZ 0 R340 33SA12 Note ElanSC300 Only if using Elansc310 do not populate R309 and R326 R339 Place Resistors R309 R340 as close as possible to ELAN Depop Resistors R309 R340 when running internal CGA mode at 33 MHZ to minimize capacitive loading on DRAM signals Removing Resistors will disable local bus video connector and SRAM sockets Note If using ElanSC300 rev B or install R236 and depop R237 If using ElanSC300 rev B or install R237 and depop R236 If using ElanSC300 rev A only one resistor can be popu
40. Se 13 SDO 13 SD8 13 SDO SA1 12 13 SD8 A9 00 Era spi ESS 99 Has SAZ 11 A9 O2 ss A2 o2 TS SH o2 15 SD1O o2 15 SDZ2 SA3 10 A2 ER 15 SDIO A3 03 17 SD3 03 17 SDII 03 17 SD3 SA4 9 A3 03 l7 SDIT AA oA 18 SD4 oA 18 SDi12 oA 18 SD4 SAS 8 A4 04 18 SD12 24 Qa 19 SDS S 19 sD13 93 SDE SAG 7135 Os 19 SDi3 A6 06 20 SD6 06 20 SD14 06 20 SD6 SA7 6 A6 06 20 SD14 A7 07 ZI GUT 07 21 SDI15 07 213 SDT7 ene E A7 07 21 SDIS DOS ROMs A8 SA10 26 A8 Eod saii 23 2 BSA12 25 A19 BSA12 25 19 BSA12 25 A19 BSA12 25 19 BSA13 4 A12 VCCROM BSA13 4 A12 VCCROM BSA13 4 A12 VCCROM BSA13 4 A12 VCCROM BSA14 28 473 o BSA14 28 413 o BSA14 28 433 o BSA14 28 A13 BSAI5 29 jz 32 BSAI5 29 3 Era BSA15 29 t 42 BSAI5 29 32 BSAl6 3 ALavcc BSA16 3 Ee BSAIG6 3 Aiavec BSAl6 3 Ai18V C BSA17 2 A16 CSS BSA17 2 A16 C56 BSA17 EJ A16 EST BSA17 72 A16 C58 BSAIS8 30 417 BSAIS8 30 417 BSAIS8 30 417 BSA18 30 437 ROMFLS19 SE O 1UF ROME LS19 31 3 O 1UF ROMFLS19 SE O 1UF ROMFLS19 31 O 1UF A18 A18 A18 A18 GND 16 GND 16 GND 16 GND 16 ROMVPP 1 VPP ROMVPP as VPP ROMVPP 1 VPP ROMVPP I VPP DOSOCS 22 CE DOSOCS 22 CE DOSICS 22 CE V DOSICS 22 CE MEMR 24 OE GND MEMR 24 OE GND MEMR 24 OE GND MEMR 24 OE GND 27C040 svs5 27C040 svs5 27C040 SYS5 27C040 SYS5 32 DIP Socket 32 DIP Socket 32 DIP Socket 32 DIP Socket nA 28F020A 28F020A ROMVPP MEMR T JP12 NOTE ib MEMW Jumper 1 amp 2 for Flash parts 2 ROMFLS19 Jumper 2 amp 3 for ROM parts 36 BSA19
41. UART Special Notes 3F0h 3F7h IDE drive CS1 Super I O floppy drive controller IDE CSI selected using PGP2 Only addresses 3F6 and 3F7 bit 7 are used for IDE accesses 3BOh 3DFh Trident VGA card 3BCh 3BFh should be excluded from this range They are used for parallel port accesses Note this is a general ad dress range Not all I O locations in this range are used 3BCh 3BFh ElanSC310 parallel port enabled as LPTI Other I O ranges for the ElanSC310 parallel port are 378h 37Fh and 278h 27Fh 398h 399h Super I O index and data ports Used to enable Super I O functions 2F8h 2FFh Super I O serial port enabled as COM2 1FOh 1F7h IDE drive CSO IDE CSO selected using PGP1 10Ch 10Fh Reserved 108h 10Bh Reserved 100h 107h PGPO decode for Vpp control Set up using ElanSC310 Index 89h Refer to Programmable General Pur pose PGP Pins on page 4 2 Reserved Reserved DMA controller channels 4 7 internal to the lanSC310 See 8237A Spec 4 10 Programmable IRQ slave controller internal to the lanSC310 See 8259 Spec lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT I O Address Device Accessed ElanSC310 internal gate A20 and reset control internal to the lanSC3 10 Special Notes Refer to the ElanSC310 Microcontrol ler Programmer s Reference Manual DMA page registers Ch
42. Voc planes for power budget analysis The following table summarizes the connections to the Vcc jumpers Be sure to turn off system power before removing JP1 JP11 Replace JP1 JP11 before power up or the system will not work A DOS application program has been provided to aid in placing the system in the various power management modes for power measurement ELANPMU EXE is on the AMD utilities diskette included with your kit See Elan PMU Evaluation Utility on page 3 4 for more information on ELANPMU EXE lanSC310 Microcontroller Evaluation Board User s Manual 2 23 BL1 BL4A Pins These signals are used to indicate the current status of the battery to the lanSC310 microcontroller A high signal indicates normal operating conditions while a low indicates a warning condition Access to these signals has been provided on the evaluation board to allow designers to test their functionality Switches 4 7 on SWA allow the BLI BL4 signals to be toggles between GND warning and 5 V normal Breadboard Area A breadboard area has been provided on the lanSC310 microcontroller evaluation board This area can be used as a convenient place to build custom circuits to interface to the evaluation board The pins in this breadboard are all isolated from other pins and the rest of the board Power Management The lanSC310 microcontroller offers unparalleled power managementin its class In addition to low operating current six power m
43. aH 42200000 3815 18 ElanSC300 Chip schematic signal name CBIT 7 PULLDN IRQ5 HIAL 3014 PULLUP IROIO DEED ElanSC310 Chip signal name CP21 MESSER NUE MI DROIT LDO 7 7 C Advanced Micro Devices Inc EDT DACKS IDZ 5204 E Ben White Blvd ube 7DACKIF RE EEREEEEEEEEREEEEEEEE Austins Texas gua pscEt 7CPURDYF LMEGH 7 M M E 800 222 9323 DSWE PULLUP 443334323383442441 GK AMD Proprietary All Rights Reserved 1434 Title ST EE ElanSC300 310 208 Pin QFP Chip Size bocument Number REV DSMD O 7 DSMD 0 7 B ElanSC300 310 Evaluation Board 2 2 Date March 29 1996 Sheet 1 of 23 SLFZ SLFI SLF3 P32KOUT R
44. amp 1 5M 1 as 5 l glate NYRER R160 SL ci28 vecsys5 2 2N2955 14 GND 550 L_4 110K 1 L2 2 2UF 30V U8A R158 1 330 v MAX722 GND RESDRV 1 2 RESDRVE gt GND 47UH 0 25A 74HCT04 SYS5 zer GND VCCMEMS5 3 0 22UF Q28 Q27 R281 1 GND OP12VOLT_ 3 2 g 0 8 4 d R282 P12VOLT oe c20 1M 5 P5VOLT L 0 uF 6 db 1 vcci 3 vccs GND FMCZ y 519956DY R233 vccs GND 10K Q SVCCMEM53 4 df u39a o SD2 SD2 2 5 ro G P12VOLT aT PGPA 3 vecsys5 FK C244 RB400D EGER coe R153 10ur i0V vccs Cz e iM 4 23 2 R 1 Lo WS KS D12 GND r S vccs PD RB400D 3 74HCT74 V5 Oi rete ws sq ElanSC300 only 4 4 U38A R152 3 c 2 ROMVPP gt SD1 0 ols 2 Q4 LC K PMBT3904 S T 23 PGPA FE ore 1 5K 1 VCC5 vccs E l e ICVPPZ YES SS Ke eee ICVPPI Z mE lt PI2VOLT Afen vpp i44 C117 cii8 Power Supply 0 1 B goe ah o m VERZ gw21 vcc2 5 Jam Re C Advanced Micro Devices Inc D P Q 9 3 GND GND 2 i R EN20 veci 5204 E Ben White Blvd PGPA 11 d PCLK VE Austin Texas 78741 11 7 sppo 15 Qr 8 ENUCIIVEROZ 800 222 9323 SD O0 15 L Q i2 anio rerai LE AMD Proprietary All Rights Reserved 74HCT74 V5 Jy Title Elansc300 X 13 2 an only 3 RESDRV LOW1 NC DC DC Power SEED rol ows cnn Size Document Number REV VPPl y TMICZS581V GMD B ElanSC300 310 Evaluation Board 2 2 If using ElanSC310 depopulate U36 and U38 GND 14 SOIC ElanSC300 onl Date June 6 1996 Sheet 18 of 23
45. either 3f8h or 2f8h The IRQ level can be set to either 3 or 4 If you enter a base address of 0 the internal UART is disabled If you enter a valid base address but an IRQ of 0 then the UART is enabled but it is not attached to an interrupt line Examples evalset serl 0x3f8 4 Sets the internal UART to be COMI evalset serl 0x2f8 3 Sets the internal UART to be COM2 evalset serl 0 0 Disables the internal UART NOTE Once the base address is set the UART is programmed to 9600 baud no parity 8 data 1 stop Serial Port 2 3 10 Serial Port 2 is connected to the 16C550 UARTI of the Super I O chip UART2 is not connected Its base address can be set according to the table below Note that if you want serial port 2 to generate an interrupt only IRQ3 can be used This is because IRQ4 from the Super I O is not connected However the base addresses that are associated with an IRQ4 configuration can still be set as long as the port is used in polled mode IRQ Base addresses 3 2f8 2e8 238 2e0 228 4 polled only 3f8 3e8 338 2e8 220 lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT Examples evalset ser2 0x2f8 3 Sets the Super I O UART to be COM2 evalset ser2 0 0 Disables the Super I O UART NOTE Once the base address is set the UART is programmed to 9600 baud no parity 8 data 1 stop Parallel Port 1 Usage This is the internal parallel port on the lanSC310 microcontroller The paralle
46. in the ISA slot of the evaluation board and selecting pages 0 or 1 of MMSA causes system conflicts since VGA BIOS decodes at CO000h for 32 Kbyte and MMSA pages 0 and 1 also use that address space lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT Register Dump Utility This register dump utility has been provided for use on the lanSC310 microcontroller evaluation board It is intended to provide an easy to use register manipulation program This program displays the index registers in the lanSC310 microcontroller grouped by functionality e lanSC310 PMU Registers Screen 1 e ElanSC310 PMU Registers Screen 2 e ElanSC310 MMU ISA Registers These registers can be read or written by simply entering a new value and pressing Return Some registers do not allow full read write access Read only registers display the contents of the register but do not allow the user to write a new value Write only registers allow a user to write a new value to the register When a value is read from the register it displays meaningless values The following is a list of commands available in REGDUMP EXE Arrow Keys Move the cursor from register to register within the screen S Toggles between the register screens V Allows user to enter a new value for the selected register b Switches the display to a bit by bit definition of the selected register m Switches the display to an options menu screen D Dumps all four register scre
47. issued to the 8042 to re enable the keyboard See PMCO on page 4 4 and PMC4 on page 4 4 for more information National Super UO PC87322VF The Super I O is set up to decode address 398h and 399h for its index and data registers When configuring the serial port on the Super I O it is important to note that IRQ3 from the chip is connected to PIRQO on the lanSC310 microcontroller Note PIRQO on the lanSC310 is internally set to IRQ3 when in Full ISA Bus mode it is programmable in all other bus modes IRQ4 from the Super I O is not connected Therefore when configuring the serial port in the Super I O only configure it to use IRQ3 Also PMC2 must be set to 1 in order to enable the RS232 drivers for the serial port lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT The Super I O parallel port is not connected and therefore should not be enabled The floppy drive interface on the Super I O is enabled DMA channel 2 is used and the floppy IRQ is connected to PIRQI on the ElanSC310 microcontroller Note PIRQI on the lanSC310 is internally set to IRQ6 when in Full ISA Bus mode it is programmable in all other bus modes IDE Interface An IDE drive can be directly connected to the lanSC310 microcontroller On the evaluation board data bit 7 is routed through the Super I O in order to properly handle bit 7 for I O addresses 3F6 and 3F7 which are jointly used by the Floppy and the IDE interface The IRQ li
48. located in the BIOS sockets U20 or U59 and the application sockets U16 U17 U18 U19 The following items need to be addressed Controlling the programming voltage for 12 V parts such as the AMD 28F020A Enabling writes to the BIOS and application ROM sockets Address mapping of the Flash sockets Evaluation board jumper settings Controlling Vpp There is one control for the V line for all BIOS and application ROM sockets i e there is no way to individually control the Ver line for each socket As described in the section Programmable General Purpose PGP Pins on page 4 2 PGPO is used to clock the flip flop that controls the programming voltage to the ROM sockets When Data Bit 2 is set to 1 Vpp is set to 12 V for all ROM sockets See Initialization Example for Flash Programming on page 4 7 Enabling Writes to the BIOS and Application ROM Sockets Writes to the BIOS sockets and application sockets need to be specifically enabled they are disabled by default This is accomplished by setting to a 1 bits 6 and 5 of the ElanSC310 Index 62h NOTE Accesses to the BIOS socket or application socket are ISA cycles plus the additional ROMCS or DOSCS signal going active No special logic has been added to the evaluation board to stop a ROMCS or DOSCS cycle from going to the ISA bus Because of this if the lanSC310 microcontroller is in Full ISA mode an ISA card such as a VGA card set up to respond to a memory range int
49. nothing on the VGA monitor Check that the monitor has AC power Check that the monitor is correctly connected to the VGA display adapter Check that the display adapter is correctly seated in the ISA slot I get the startup message on the monitor but it says there s a CMOS checksum error and doesn t finish booting This is the normal condition after power up The lanSC310 microcontroller evaluation board s CMOS RAM does not have battery backup Follow the BIOS instructions to run the Setup utility to configure the CMOS RAM Once configured the CMOS RAM can be saved by leaving the power supply on but using the MicroPower Off button SW5 to power down the board I ve configured the CMOS RAM but I don t hear any sound from the disk drive and the system does not boot from the diskette Check that the 34 wire cable to the disk drive is properly connected at both the disk drive end and the board end board connector P27 Check that the CMOS setup indicates that drive A is a 3 5 1 44 Mbyte drive I hear the diskette being accessed but get an error message Non System disk Check that the diskette in the drive is indeed bootable just as you would on a standard PC lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT Problem Solution I get a Missing Keyboard error Check that keyboard is properly message on the monitor during connected boot up There is a problem you ca
50. them high this creates the appearance of additional power drain These signals can be easily disconnected while in Suspend mode using switches 2 and 3 on SW4 Before exiting from Suspend mode IRQ1 and PIRQ1 must be reconnected for the system to function properly lanSC310 Microcontroller Evaluation Board User s Manual 2 25 MicroPower Off Mode 2 26 This mode is the lowest power mode for the lanSC310 microcontroller When the system is initially powered by turning on the power supply and then pressing the MicroPower Off button SW5 the system enters High Speed mode The red power light indicates that the system is fully powered on Pressing the MicroPower Off button SW5 again causes the lanSC310 microcontroller to enter MicroPower Off mode During MicroPower Off mode only AVcc Vcc and the 32 KHz crystal remain active The system is essentially off but the RTC remains in operation Please refer to the ElanSC310 Microcontroller Data Sheet for a more detailed explanation of this feature lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT Chapter 3 e Using the Software The ElanSC310 microcontroller evaluation board kit currently ships with four diskettes the SystemSoft Evaluation diskette the PhoneixPICO Evaluation diskette the Datalight Software Evaluation Kit diskette and the AMD Utilities diskette SystemSoft Evaluation Diskette This diskette contains the evaluation version of SystemSoft s
51. you have DOS select Other if you use another operating system such as UNIX lanSC310 Microcontroller Evaluation Board User s Manual 2 13 2 14 Table 2 5 PhoenixPICO BIOS Power Menu Setup Screen Options Power Management Mode Description Turning this feature On enables power management Parameters On Off Power Savings Selects power management mode Max Battery Life and Max Performance set power management options with predefined values Customize enables you to make your own selections Disabled turns off all power management Disabled Customize Max Battery Life Max Performance Standby Timeout Sets inactivity period required to put the system in Standby partial power shutdown Disabled 1 sec 4 sec 8 sec 1 min 2 min 4 min 6 min 8 min 12 min 16 min Suspend Timeout Sets inactivity period required after Standby to Suspend maximum power shutdown Disabled 1 min 2 min 4 min 6 min 8 min 12 min 15 min 16 min lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT Fixed Disk Timeout Sets inactivity period of fixed disk required before Standby motor off Disabled 10 sec 15 sec 30 sec 45 sec 1 min 2 min 4 min 8 min 12 min 16 min Video Timeout Length of time either the keyboard or mouse remains inactive before the screen is turned off Disabled 10 sec 15 sec 30 sec 45 sec
52. 0 Mhz or 9 2 Mhz If the High Speed CPU speed is set to 33 Mhz or 25 Mhz and the CPU Idle Speed is then set to LOW the CPU speed changes to 20 Mhz Similarly if the CPU Idle Speed is set to LOW and the High Speed CPU speed is changed to 33 Mhz or 25 Mhz the CPU Idle speed is changed to HIGH 3 6 lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT Low Speed PLL Mode Column The CPU speed can be set to 4 61 Mhz 2 30 Mhz 1 15 Mhz or 0 58 Mhz The High Speed PLL can be enabled or disabled in this mode The Low Speed PLL is always enabled for this mode The state of the PMC pins for this mode mirror the setting in High Speed PLL mode Changing the state in this mode also changes the state for High Speed PLL mode Doze Mode Column e The CPU for this mode can be turned OFF or it can be enabled to run at 9 2 Mhz in response to IRQO being generated IRQ0 9 2Mhz appears as the matrix item For this mode the CPU only runs at 9 2 Mhz during the time IRQO is being processed Setting this matrix item to IRQ0 64 R enables the CPU to run at 9 2 Mhz while processing IRQO and the CPU remains running for 64 refresh cycles after IRQO processing is completed The High Speed PLL is always disabled for this mode TheLow Speed PLL and Video PLL controlled by the same bit can be enabled or disabled for this mode Sleep Mode Column The CPU is always off in this mode The High Speed PLL is always off in
53. 00 56 AMP 1 104118 4 220028 C Advanced Micro Devices Inc 5204 E Ben White Blvd Austin Texas 78741 SE 800 222 9323 of oar 7 NOTE AMD Proprietary All Rights Reserved ROM Daughter card does full decoding Depopulate ROMs on this board when using Connector P12 boards and is only populated when is not standard on all needed Title Address Buffering amp ROM Connector Size Document Number REV B ElanSC300 310 Evaluation Board uer Date March 29 1996 Sheet SE 23 Install JP24 and remove JP25 to enable BDOSCS as the chip select for ROM BIOS Remove JP24 and Install JP25 to enable BROMCS during ROM BIOS accesses accesses NOTE Can place 128Kx8 Flash in these sockets 28F010 A17 will not be used
54. 1 Index vi lanSC310 Microcontroller Evaluation Board User s Manual 1 0 1 0 List of Figures lanSC310 Microcontroller Evaluation Board 2 2 List of Tables Installation Troubleshooting A 1 6 Board ST eege edere redet eod iid ee tene ee 2 3 SystemSoft BIOS Set Up Screen Options ses sese eee 2 6 Phoenix PICO BIOS Main Menu Setup Screen Options 2 11 Phoenix PICO BIOS Advanced Menu Setup Screen Options sss sese sees ee ee eee 2 13 Phoenix PICO BIOS Power Menu Setup Screen Options sse 2 14 Phoenix PICO BIOS Exit Menu Setup Screen Options 2 15 Bus Mode Selection and Affected Jumpers 2 17 1 0 Address 100 107 iere geret e VESE ECESE ROEMERS Rhet 4 2 Typical Full ISA Memory Map 4 8 Typical Full IS A S O Map 3 tere del eie eb RE eec eret 4 10 Typical Pull ISA TRO M e secet enti anteire e p e toro 4 12 Typical Full ISA DMA Mapping rennen nennen treten enne treten 4 13 Bus Mode Selection and Affected Jumpers essere A 2 Configuration tee A 2 B te ehe a a bentes A 3 KE UE A 3 Power Measurement Jumpers ss A 4 lanSC310 Microcontroller Evaluation Board User s Manual vii viii lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT i About the lanSC310 Microcontroller Evaluation Board Congratulations on your decision to design with the lanSC310 microcontroller This sophisticated integrated device is uniquely suited to meet
55. 1 min 2 min 4 min 8 min 12 min 16 min Table 2 6 PhoenixPICO BIOS Exit Menu Setup Screen Options Save changes amp exit Description Exit after writing all changed setup values to CMOS Exit without saving changes Exit without writing changed setup values to CMOS Get default values Load default values for all setup items Load previous values Read previous values from CMOS for all setup items Save changes Write all setup item values to CMOS lanSC310 Microcontroller Evaluation Board User s Manual 2 15 Bus Modes 2 16 The ElanSC310 microcontroller allows designs to utilize two different bus options ISA or Local Bus While in ISA mode all of the device s ISA bus signals are available refer to the ElanSC310 Microcontroller Data Sheet for a detailed description of the ISA bus Local Bus mode provides a 386 local bus in addition to a subset of ISA bus signals Refer to the ElanSC310 Microcontroller Data Sheet for a description of the signals available in each of these modes The lanSC310 microcontroller evaluation board allows testing in each of the two bus modes available from the ElanSC310 microcontroller Bus mode selection must be made before applying power to the board and cannot be changed while the board is in operation Selection of the bus mode is determined by the resistor packs labeled RP1 RP2 RP5 and RP6 see Table 2 7 When adjusting the Bus mode jumpers be sure t
56. 120 R119R118 R117 R116 Connector 1M 1M 1M 1M 1M E SR U30 pio 5 S 21 9 DCDIR R128 300 DCD1 1 9 22 Eos a 8 DSRIR R127 300 DSRIF 3 En 4 6 TN 20 Roa Ria 10 SINIR R126 300 SINI 2 8 FORTI 23 5752 Do2 LLZ RISIRK R125 300 RTSIF TIS 3 E SE LOTS bos Lii SOUTIR R124 300 SOUTI 315 7 B cred 24 R51 RII amp CTSIR R122 300 GTST BL 2 amp STR 25 597 Bor S DTRXIRF R123 300 DIRX1 4 el RIF 18 ROS nis 12 RITR RI21 30 RIT BITS ie d 13 S 5 MES SRPCIp 3 ON OFF 2 27 smecaP Le z VCC5 D23 ciie 1UF 16V CI15 GND SERIAL 2 3 _1ur 16v C113 E AMP 747840 4 Component L i SRPCIM 4 2 26 SRPC2M 1UF 16V c90 C91 C89 C88 C87 C86 C85 C84 side view RB400D S SRPVPLS 1 17 C2 28 SREVM 220PH220PH220PH220PH220PH220PH220PH220PF c ase 2 v cup LZ C114 V LUE gt 1UF 16V GND GND GND GND GND GND GND GND LT1337A V5 GND 28 WSOIC d GND GND Serial Port Interface MCL P20 R143 2R144 QR145 QR146 PPSTRB LES 4 7K 4 7K 4 7K 4 7K PPAFDT 14 o PDO o PPERR 15 o R132 47 PDI 3 suet R131 a7 PPINITR 16 9 7 PDZ az INTTI RS 4 5 ITIS SLCTING R PRSDGINS 5 0 s gt o ie EE C104 c103 c102 cioi Se Ig e EMEMR PMEMR EMEMW T PMEMW 220PF 220PF 220PF 220PF i9 oe PD5 7 lo GND GND GND GND 20 SLCTIN R243 INIT R25 PD6 8 a 25 X5 RER SE SBD 3 DO 00 2 PDO PDO PD7 9 o Populate R242 amp R240 and depop R243 amp R241 if using ElanSC300 rev A or SDI 4121 6115 EP PDI EI RM ElanSC300 rev B with parallel port SD2 7 6 PD2 PD
57. 1UF 0 1UF SAIO 62 3x10 AFDT p82 X140UT AFDTF 10UF 10V ASH sail Elansc 1 be pee EE SA12 60 83 GND GND GND SA12 STRB O85 1SIRBf XIORESET AM poe SLCT SLCT ad PO E Busy 82 BUSY X Di Y 86 VCCELMEM D2 a0 EE NN c19T C7 ce 2 BE D2 SLCTIN pss SLCIINf m HEADER 2 RESIN D4 D2 ACK Pgo ACK jour 10V O 1UF O 1UF 55 37 P4 INIT Dan 7TPPDSCFT E D2 321 ps PPDWE PPDCS 5 PPDWEF H Install JP29 if using ElanSC300 rev B or D6 DE PPOEN D21 PPOEN GND GND GND pot ElanSC310 without uPower mode D7 D D8 Ds DTR b22 DIR CFEGl DIRF Remove JP29 if using ElanSC300 rev B or DS DS RIS b i RTIS CFGO RISE VCCELSY2 ElanSC310 with uPower mode DIO DO sour L94 mE cise cio DII DIT SCHEMATICS PROVIDED AS IS cTs b26 TS DIZ D AMD MAKES NO WARRANTY DSR PL DSR 10UF 10V 0 1UF D13 1 EXPRESSED OR IMPLIED Pos D13 DCD b DCD DI4 99 GND GND DIS DLA For Reference Onl SIN 100 SIN 24 pis Y RIN p RIF SDENF mM DpEUFOER 229 DBUFOE ROMCS EE SDRDH SDROL VENDI So SDWRTH DOSCS4 p 5 diD9scs s SDRDL SDWRTL d 166 MWE PS MWEF BLIF 1070 BL1 RASO D RASO BL2 T069 BL2 RAS14 ba Ga RAS1 BL3 zez BL34 CASOH SRCS3 DZ RI 33 CAS0H BLAF d BL4 CASOL SRCS2 b 2 SC 33 CASOLi ie ECC LL D D DDDDDDDDDDD DDDDDDDD CAS1H SRCS1 PZ RS 35 CAS1Hf TOCS16 d TOCS16 LCDDLO RPP G E S SSSSSSSSSSS SSSSSSSS CAS1L4 SRCS04 6 CASIL MO
58. 2 YLA I i12 1 RP5 10K SVCCMEM53 U33A Socket AMP 643646 2 14 i VLCPURST 2 AME 74HCTO4 MEM53 38 7ERRE VLNAF VLLDEV DEI VLRDYI RTS VLBUSY VLPREQ NOTE DTR pulled up amp RTS pulled down 1 forces Local Bus mode in Elan 4 NOTE RP6 In Local Bus Mode CPU clock Ix 10K SOUT pulled down not supported Socket AMP 643646 2 1 In Local Bus Mode CPU clock 2x JP16 VCC5 SOUT pulled up 1 R151 GND 20 100K SOUT 3 HEADER 3 GND 3 pin Jumper DSMAL 36 1 42 SHORT VLNA DSMA2 37 19792 SHORT VLCPURST DSMA3 338 12 2 SHORT VLCPUCLK DSMA4 S39 IRA SHORT VLAI3 DSMAS S40 16 32 SHORT VLAI4 DSMA6 S41 16 32 SHORT VLAIS DSMA7 S42 1092 SHORT VLAIS DSMAS 543 1002 SHORT VLAIT DSMA9 544 18 42 SHORT VLAIS DSMAIO S45 16 42 SHORT VLAIS DSMAll 546 bd SHORT VLA20 DSMA12 347 16 32 SHORT VLAZI DSMA13 S48 EE SHORT VLA22 DSMA14 549 16 42 SHORT VLA23 gt lt S50 le 42 SHORT VLRDYO DSOES S51 EE SHORT VLPREO CP21 S52 Je as SHORT VLBUSY DSWET S53 19792 SHORT 387ERRf LDO S54 16 92 SHORT DROL TD2 S55 1992 SHORT DROS IDS S56 16 392 SHORT IOCHCHK MI S57 lE 22 SHORT IRO4 GER S58 1522 SHORT IROI2 LVEEF S59 I 42 SHORT TROTS Sw3 i 8 _VLRDYI Local Bus Interface VGARDY 2e ET MDRDYOR i 2 C Advanced Micro Devices Inc DSMDO S60 lj 42 SHORT VLLDEV 5204 E Ben White Blvd DSMD1 S61 Letz SHORT VLRDYI SW DIP 4 k DSMDZ Sea SS SHORT VLBLEF Austin Texas 78741 DSMD3 S63 IRA SHORT VLBHE 800 222 9323 DSMD4 S64 12 92 SHORT VLW R AMD P
59. 2 PPACK 10 DZ Q2 o SD3 8 D3 03 9 PD3 PD3 23 o Populate R243 amp R241 and depop R242 amp R240 if using ElanSC300 rev B SD413 Db4 094 Li2 PD4 PDA PPBUSY KEE without parallel port SD5 14 p5 5 15 PDS PD5 24 B SD617 D6 Se 16 PD6 PD6 PPPE 12 o If using ElanSC310 depopulate all 4 resistors R240 R243 SD718 p 25 19 PD7 PD7 25 VCCS PPSLOT 13 o Also see notes on 1 20 9 pages 5 and 11 PPOENE iid EE RD 10 c93 c94 Can c96 c97 c98 c99 c100 PRINTER vccs GND AMP 747846 4 74HC373 v5 c110 220PF 220PF 220PF 220PF 220PF 220PF 220PF 220PF 0 105 GND GND GND GND GND GND GND GND 13 PPCLKR v GND U41D VCCSYSS U31 vccs IPD O 7 74HCTO2 V5 L 24 9 vecsys5 sp6 3 Ze VPB 22 epo SD1 4 47 Bi L2i PDL Parallel C112 SD2 SA B2 20 PD2 Connector K SD3 6 23 B3 L19 PD3 d ee 0 1UF SD4 T KA pa Li8 PD4 SD5 8 25 Bs I7 PDS 1 GND SD6 9 A6 B6 16 PD6 14 SD7 10 15 PD7 2 A7 B7 E sua pe 14 15 1 SDIO 15 vccs 3 SD 0 15 i2 Gwp DIR 2 16 13 Cup G DEERD Y ciii 4 d END 17 9 vcecsys5 V 0 1UF 5 e 1 GND HDI51015 187 5 4 24 SOIC GND 6 f 4 VCCB gt VCCA 19 B 6 PPRD VCCS 7 o 5 20 TOR 8 rf U32B 21 d 74HCT32 SYS5 s R138 R13 R14Q R141 R142 22 4 78 4 78 4 78 4 78 4 7K 10 23 11 R137 47 24 RI36 a7 12 DERE RI35 47 25 zz RI34 47 13 R133 47 EG C109 cio8 ci07 c106 c105 Component FE SIR ES AP Es side view GND GND GND GND GND Parallel Port Interface C Advanced Micro Devices Inc 5204 E Ben White
60. 22 VCCB gt VCCA GND 3 3 R364 BSA23 VCCSYSS U15 SVCCMEM53 2A4 2YA E 4 20 1 SA10 22 YDB VPA 3 vraio 10 cc 16 Pig SATT 21 BO A0 A VLAIT g enn 2c 612 4 B1 Al L L ERIS GND TAACT244 v 19 B2 A2 6 GND 8 s4 aat BS A5 L vccsvs5 U11 16 lt 9 3 S 18 3 R365 BSA13 SDRDL T5 BS Ap 10 BSDRDL 1A1 AT SDRDH B7 A7 E BSDRDH 1a2 1v2 i E R366 BSALI SDEN 14 Bs as ii BSDEN c179 i22 1X5 ud 3 R367 BSAI5 0 1UF 1A4 1yY4 12 R508 Beare 2 DIR GND 12 l 2A1 2y1 2 R BSA 234 G ann 43 GND Sad OONA 3 R370 BSA18 SVCCMEMS53 2A3 EIS 5 3 R371 BSA19 GND GND S dm 3 R372 BSA20 vccsvss HDI51015 T 24 8OIC C182 SAI I3 23 SA 13 23 CH vec 1G Org elei VCCB gt VCCA J IUE GNP 209 0 1UF GND GND TAACT244 v GND GND System Address Bus Buffers Local Bus Address Translating Buffers 5510 15 SDIO l1s BASAIO 23 d BSA 0 23 VCCSYS5 VCCSYS5 o o SD1 Connector SDO SD3 SD2 SD5 Ft SD4 SD7 1 oo C SD6 3 oo 4 SD9 5 OO 6 SD8 SDIT 7 oo 8 SDIO SDI3 9 OO 110 SDIZ SDI5 11 00 12 SDI4 13 00 14 BSAI MES OO 116 BSAO BSA3 TT oo 18 BSA2 BSA5 19 oo 20 BSA4 BSAT 2L GO 2122 BSA6 BSA9 SCH OO 24 BSAB8 BSA11 25 oo 26 BSALO 27 oo 28 BSAIS 29 oo 30 BSAIZ BSAIS 31 oo 32 BSAl4 BSAL7 33 00 34 BSAL6 BSAIS 35 oo 36 BSALS BSAZI 37 oo 138 BSAZO BSA23 39 00 40 BSA22 41 OO 42 SBHE MEMW 43 OO 44 MEMR BROMCS ta 45 OO 46 ROMVPP BDOSCS ROMVPP BDOSCS 47 OO 48 OCT aol OO 150 51 00 52 53 OO 54 GND ROM Brd Male HDR GND ROM Card Connector 55
61. 3 VCCMEMS3 vccs vccsvss5 EM H AINT s i3 C251 C252 C253 C254 C255 GND FMCZA GND SIS 0 01uF TANT O0 01uF TANT O0 01uF TANT O 01uF TANT 0 01uF TANT ORIGIN OF Q33 VCCl PLANE GND GND GND GND GND 032 9 L7 vcci 3 7 5 R292 s G7 S MIE 1 2uH 4 C214 R293 D PSVOLT uu O0 lUE O 1M DR 2 c246 5 Fan As Als NT 33uF TANT OPSVOLT s i3 1 FMCZA GND GND 4 S19956DY 4 ENLOCAL e SW MEM35 Q35 VCC3 SW MEMS53 R189 47K 5 Q34 19 OPSVOLT 3 2 R305 2 5 ORIGIN OF EIROl erer C145 U35B x s 7 VCCSY253 PLANE VCCS O 1UF Ze 74HCT32 o EYE VCCSY253 EPIROl TROT R179 4 C215 R306 D EPIROT 100K 0 10ET S 1m nl sw4 R178 R184 R185 R186 R187 GND L 6 1 16 SW MEM53 10K 510K 510K 510K 510K Jk 1 L8 2 15 PrROi y 3 DE fa trot ET GND FMCZA GND 4 13 Sw BLIF R180 100 S19956DY 1 2uH 5 Z i2 SW BL2 R181 100 AUTRE G 11 SW BL3f R182 100 P5VOLT 7 7 10 SW BLAf R183 100 Q7 33uF TANT 8 9 SW ACIN R188 33 Q19 1 cr P12VOLT 3 2 Rl170 2 GND SW DIP 8 C144 C140 CLI C142 C143 0 a 17 GND 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 8 PSVOLT 4 gisa R169 D O lUET Dim o S GND GND GND GND GND Alle 5 1 Ae siis vecs FMCZA GND Qi S19956DY 4 ENFLISAF ENFLISA 9 o9 ias R172 ENCGR ENCGA 10 SL E Install JP28 on pins 1 amp 2 if using micropower to keep DRAM powered up GES 9 YE ORIGIN OF while in uPower OFF mode 74HCTO8 V5 SW MEM35 A C134 R167 D VCCMEM53 PLANE JP28 0 1UE Dim n IS VCCMEMS53 Install JP28 on pins 2 amp 3 if not using micropower
62. 310 microcontroller IRQ12 signal is connected to the IRQ12 signal on the 8042 to control the PS 2 mouse See the settings for JP17 and JP18 in the table below lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT Serial Ports The evaluation board has two serial ports Connector P19 is connected to the lanSC310 internal 16C450 compatible UART Connector P45 is connected to the Super I O 16C550 UART The BIOS determines how the UART is set up e g SystemSoft BIOS allows the lanSC310 to be set up as COMI COM or disabled and the Super I O UART as COMI COM2 COM3 COMA or Disabled Note that when the Super I O UART is configured as COMI or COM3 the IRQ4 line from the Super I O is not connected therefore polling must be used After DOS is booted the DOS utility EVALSET EXE provided on the AMD Utilities diskette included in your kit can be used to reinitialize either UART to the desired configuration Refer to the documentation on the diskette for how to do this Parallel Port Connector P20 is connected to the lanSC310 parallel port Most BIOS let you configure the parallel port base address in the set up screen IDE Hard Drive The ElanSC310 microcontroller evaluation board contains a standard 40 pin connection for an IDE drive at location P28 see the figure on page 2 2 Pin 1 is at the end near the ROM sockets See Connecting an IDE Hard Drive on page 1 7 for a step by step guide lanSC310 Mi
63. 4 Taig 38 LAIS DACKO 88 d 39 LA1T7 DACKO 88 39 LA17 DROO 899 DACKO DAI FAO MEMRIT DROO B94 DACKO TALI CS DREQO MEMR y o DREQO gt MEMR Dr DACKS 90 41 MEMW DACKS 90 ER DROS ui LACKS CMEMW EES DROS uq PACKS MEU Du ane DREQS SDB Te T ee ee e an DRSOS SD8 DACK6 92 43 SD9 DACK6 92 43 SD9 DROS 93 RACKE SD 44 SDIO DROS 934 DACKG SD 44 SDIO DACK7 94 PREO6 SD10 45 SDIT DACK7 94 PREO6 SD10 45 SDil BbRR67 s5d DACK7 SD11 22 Z5p515 i DACK7 SD11 2 DRO7 359 46 SDi12 DRO7 95 46 SDIZ RM a L e 1 25 e T 9 aLla Le Rs e C P ae SD12 96 DRE SD12 47 SD13 96 DRE SD12 47 SDi3 97 48 SDl4 97 48 SDI4 amp a0 MASTER SD14 Sooo S 20 MASTER SD14 VCCSYSS 98 GND SD15 49 SDIS VCCSYS5 98 GND SD15 49 SD15 J ISA AT CONN J ISA AT CONN GND AMP 645169 3 GND AMP 645169 3 U32C MCCL 74HCT32 SYS5 10 MEMR SMEMR 8 MEMR 9 ELMEG VCCSYS5 JP33 R232 A LMEG i E U32D 74HCT32 SYS5 Vv i3 GND HEADER 3 OWS SMEMW 11 12 MEMW vecsys5 MEMW Qt 4 VCCl o 1 DSMA1 S30 1 42 SHORT IROT7 RP3 DSMA4 S31 AE 32 SHORT DACK6 10K DSMA5 s32 12 22 SHORT DACK7 Socket AMP 643646 2 DSMAS s1 12 92 SHORT DACK3 RP1 2fsfafsfefrfefofififififs ELansc300 only DSMA7 s2 1522 SHORT DACKO 10K 01234 DSMAS8 s3 lg 22 SHORT LA17 Socket AMP 643646 2 DSMAS s4_1 52 SHORT LAIS DSMA1I0 S5 iP 2 SHORT LA19 ENFLISA DSMAli se 12 42 SHORT LAZO ENLOCAL DSMAIZ 87 1 92 SHORT TASI
64. 42CSF S Ee 10K vccs 5 B SDO 12 po EDO p20 21 KRC 3 a HEADER 2 SDI 13 pi G bo 22 AZ0GATE cepa m SD2 14 55 poo 23 MSDATAO 1 2 c47 c53 a XT Keyboard SDS 15 73 525 24 MSCLKO VCCSYS 0 iuF 2 2UF 6 3V Component SD4 16 Dj eeayon 22 TROT d RLS4148 side view SD5 17 p5 25 52 36 MSIROIZ 4 SD6 18 52 TS 1 KBDCLKI VCCKBDS GND SD7 19 E 37 KBDCLKO 5 6 KBCLEN Q 1 vccs Dy P26 DRO 35 KBDDATO 4 o P27 DAK x SA O 12 ii x 27 KBDDATI USC 1 2 ii KBCL c52 SN cs4 SA O 12 SA2 9 Ee mno 28 MSDATAL 74HCTO4 SYS5 O 1UF 2 2UF 6 3V pio 29 vccsvss GND amp 30 d U7D Y ad SZ P a Ree 4 KBDDATO 74HCT125 KBD5 GND IOWF TOY WR pis L32 VCCKBD5 VCCKBDS Vcc5 S p16 H3 ir 1B e A H vccs Gl REBT PaT R37 R35 R36 n 3 rare USE 10K 9 8 KBDA 1K Six 4 v Ti 39 MSCLKI 74HCTO4 SYS5 D3 V 4 SE 1 2 P10 RESET SA GND PUDE 5 6 U7C KBCL ES vccsvss RLS4148 74HCT125 KBD5 KBDA l 07 E 1 U37C 40 078 4 MSDATAO 3 74HCTO4 V5 VCCRED5 C49 C48 y E i3 i2 VCCKBD5 Sek 47PF 47PF GND 4 VCC5 S PIN DIN GND GND GND Keyboard uer R41 5 6 MSDA 74HCTO4 SYS5 10K vccs GND 9 VCCSYS5 vccs VCCSYS5 D4 U7B 1 MSDATAI 1 2 74HCT125 KBD5 R38 R39 4 4 4 1K Six 1 RLS4148 vccs LEES 8 3 9 8 KRESDRV 3 4 MSCLKO Le P11 2 VCCKBD5 MSDA i VCCKBD5 9 31 S U3ZK U37D U8B 4 5 74HCT32 SYS5 74HCTO4 V5 74HCTO4 SYS5 R40 2 3 MSCL MSCL E 10K y 6 GND Leer D5 U7A c51 c50 GND 6 PIN MINI DIN MSCLKI i M 2 74HCT125 KBD
65. 5 47PF 47PF MOUSE I RLS4148 GND GND Keyboard amp Mouse Processor_ amp Connectors SVCCMEM53 U9 VCCSYS5 I sa ve 24 9 vecsys5 DO ERAS Bo 22 SDO DI ae Bi L21 SDL D2 dee 22 20 SD2 C175 D3 cabe Bs 19 SD3 0 1UF D4 7 18 SD4 SVCCMEMS53 D5 8 e Be 17__SD5 GND SDIO 15 SBTO 158 gt 748797 11 13 14 16 18 9 D6 9 se Be Li6 SD6 D7 ERS nj Lis SD7 ci74 USPI1 11 34 Bg 14 U9P14 0 1UF 2 BSDRDL vecsys5 GND END PIR 523 BSDENT R59 o 10K SDO R49 1M SDi R48 MM 1M HD151015 SD2 R47 NMM 24 SOIC SD3 1M GND VCCB gt VCCA GND SD4 R45 V V 1M SD5 R 1M EEDENE SERUUM SD7 R 1M SVCCMEM53 U10 VCCSYS5 SD8 E IM SVCCMEM53 d 24 SD9 R 1M o 3 XD pe 22 eng SD10 R52 NNTIM ue Bi 21 SD9 SDIL R53 NNT iM C176 5 2D B2 20 SD10 SD12 R54 1M 0 1UF capes B3 19 SDll SDI3 E 1M 7 Ra Ba 18 SD1Z SDI4 R 1M GND 8 45 17 SD13 SD15 R 1M AS B5 9 R6 Be i16 SD14 D15 io 35 By 15 SD15 UTOPIY I3 25 ma 14 Ui0P14 BI5 15 DIO 15 ISA Data Bus Level Translating Buffers GND Bin 2 BSDRPM GND G p23 BSDEN EE C Advanced Micro Devices Inc HDIS1O15 Poo gis 5204 E Ben White Blvd 5 5 3 SE SEN Austin Texas 78741 VCCBS VCCA 800 222 9323 GND GND AMD Proprietary All Rights Reserved BSDHDH GND Title SCP Keyboard Mouse amp SD Buffers Size Document Number REV B ElanSC300 310 Evaluation Board 2 2 Date March 29 1996 Sheet 8 of 23 ElanSC300 rev A ElanSC300 rev B Elansc310
66. 5 disk drive A standard 34 wire AT disk drive cable A VGA monitor A cable to connect the VGA monitor to the VGA display adapter An AT compatible keyboard A standard PC power supply at least 230 watts A bootable 3 5 DOS diskette lanSC310 Microcontroller Evaluation Board User s Manual 1 3 Board Installation 1 4 NOTE See lanSC310 Microcontroller Evaluation Board on page 2 2 for a layout diagram of the board DANGER Make sure the power supply and the VGA monitor are not plugged into an electrical outlet during the following steps Remove the board from the shipping carton Visually inspect the board to verify that it was not damaged during shipment The board contains several jumpers The following steps assume all jumpers are in the factory default configuration 2 Inspect the 34 wire disk drive cable that you are providing The red wire along one edge of the ribbon cable indicates wire 1 Connect one end of the 34 wire disk drive cable to the disk drive just as you would for a standard PC installation The disk drive documentation should indicate where to put wire 1 Connect the other end of the 34 wire disk drive cable to the 34 pin connector P27 on the lanSC310 microcontroller evaluation board with wire 1 toward the ROM sockets 3 Insert the VGA adapter into either of the ISA slots on the ElanSC310 microcontroller evaluation board The ISA slots are labeled P21 and P22 4 Connect the VGA monitor cable f
67. 715 LCDD2 3 S m R95 15 I LCDD3 To g 2 rer R106 SIS LCDD10 19 a R105 15 LCDDIL 2 MCS16 P Sse 12 B d IRO14 R104 a2 13 P R103 15 LCDD13 1j ka CONTRAST 15 VEE i5 VCCLCDS E Component Tre side view REVI 2 CHANGE LDO LDI LDZ LD3 TO LDI LD2 LD3 LDO T 20 LCD CONN 10th Cntr 20x1 Berg AMP 2 102976 0 ElanSC300 only 3 Internal Video LCD amp CRT Connectors Bourns 3590 VR1 2 GONTRAST C Advanced Micro Devices Inc 5204 E Ben White Blvd csi Austin Texas 78741 0 1UF 800 222 9323 TEE AMD Proprietary All Rights Reserved Title Display SRAM amp CRT amp LCD Connectors Size Document Number REV B ElanSC300 310 Evaluation Board uer Date March 29 1996 Sheet 14 of 23 side view VECS Serial R
68. BIOS ROM image programmed into the ROM on the evaluation board Please refer to the documentation on the diskette for further information about these files PhoenixPICO Evaluation Diskette This diskette contains the evaluation version of the PhoenixPICO BIOS ROM image programmed into the ROM on the evaluation board Please refer to the documentation on the diskette for further information about these files Datalight Software Evaluation Kit Diskette This diskette contains software for evaluating Datalight s ROM DOS and WinLight software on the evaluation board Please refer to the documentation on the diskette for further information about these files lanSC310 Microcontroller Evaluation Board User s Manual 3 1 AMD Utilities Diskette This diskette contains several utilities developed specifically for the evaluation board to assist the user in their evaluation and design with the lanSC310 microcontroller Some of these utilities may work on other lanSC310 microcontroller based platforms but their functionality outside of the evaluation board cannot be guaranteed and therefore is not supported The following utilities are included on the AMD Utilities diskette ELANINIT ZIP Initialization example for the lanSC310 ELANPMU ZIP Utility for demonstrating the lanSC310 power management features EVALSET ZIP Utility to configure the two serial ports on the evaluation board Source code is provided FLASH ZIP Utility for Flashing A
69. BSA16 DACK3 64 15 BSA16 DQACKS AIS BSAI5 DROS 654 PACES Ate 16 BSAI5 pREQS ara BSA14 DACKIF 66 DREO3 AlS 17 BSAi4 Eet DACK1 A14 O DACK1 Al4 SS VECSYSS5 BSA13 VCCSYS5 DROI 67 18 BSA13 eS DREOI AI 7 DREQL AI Q 68d REPSH 212 19 BSAIZ o BB er A12 L19 BSAIZ FOLIK 69 svsSCLK ali 29 BSAIT PCLE 69 svscLK Ali Z0 BSAIT TROU ato 21 BSAI0 IRQ7 70 289 Ato L21 BSA10 Q 22 BSAS Ti Q 22 BSA9 IRQ6 RBS PIROI IRO6 AO m 2 BSA8 IRQS T2 235 BSA8 TROF AS 24 BSA7 TROS 731 FRO A8 24 BSA7 IROA A LX Ss IROA A SS SSS 2 BSAG 74 e 25 BSAG IRQ3 A6 mO PIROO IRO3 AGE sane d 26 BSAS TS e F26 BSA5 DACK2 AS SE DACK2 DACK2 AS SES PERA Y TC AA 2T BSA4 TC 76 TC AA 24 BSA4 VCCSYS5 2E BSA3 BALE riri 28 BSA3 ae A3 29 BSA2 78 SEE A3 29 BSA2 i5HOUT l4 3MHZ EN l4MOUT Tl EA Ai L30 BSAT GND AO SL BSAO VCCSYS5 80 GND AO GE BSAO Li 9 ei MCS16j 81 32 SBHE SH 32 SEN EH roc8ies 824 MEMCS16 SBHE DS MCS16 82 MEMCS16 SBHE D 3 TADS SBHE cor EE 6 SA23 ss TOCS LEH 230 100816 SEE X taa rao TROIO 83 34 LA22 TROIO 83 34 LA22 IROIi 84 IRO10 LA22 35 LA21 IRQli 84 IRO10 LA22 35 LA21 IRO11 LAA 1 E uvm mu PROLE LAS ee IRO12 85 36 LA20 IRO12 85 36 LA20 IRO12 LA20 sC RS IRO12 LA20 s IROIS 86 TROIS LA19 37 LA19 TROIS 86 IRO15 LA19 37 LA19 IROI4 87 rRO14 Taig 38 LAIS8 TROT 87 TRO1
70. BVD2 B NIY 555 VCCELSYS VCCPEL3 SAT P7 H16 C169 C170 ER ET saz CA24 HER ISA24 SABRE Sag CA25 HIS ISA25 1 2uH elv SA9 U3 SA O 1UF 0 1UF FK C232 SAlIU0PS R9 SAIOS bR I 33uF TANT salira SA10 ARDT E OTIO AFDTH GND GND SAIZR5 SA PE STO PE ET S41 RO SA12 an STRB Pp 5 STREF DO M3 SLOT ULT SLT VCCELMEM DT Pi PO BUSY Tli BUSY C171 C172 H2 D1 ERROR DATT ERR S53 22 SLCTIN DLST NT 0 1UF 0 1UF i D3 ACK D ACK Da MZ L INIT Bi INITE ee De PPDWE PPDCS 775 LEE T END SND b3 12 DS PPOEN p PPOENf S545 4 D7 DE K3 pg rue VCCELSY2 D9 KI C173 gt De RTS FC BIO K2 Dio SOUT Fa DII Ji E 0 1UF 35 in CTS DI2 J3 1 rees D12 DSR DIS J2 1 GND erbei D13 DCD D14 H2 1 Pie fe D14 SIN DIS K4 555 RIN VCCEL1 SDENF SDEN He d DBUFOE ROMCS PE3 ROMCS c204 _ c205 SDRDH SDWRTH DOSCS b DOSCS 6 1 6 1 SDRDL N4 1UF EG SDRDL SDWRTL MWE OEZ MWET BLIT Mid BL1 RASO PE4 RASOF GND GND BL2 ez BL24 RAS1 PE gt RAS1 BL3 Ried EL3 CASOH SRCS3 peg ELCSOHF BLAF d BL4 CASOL SRCS2 D55 ELCSOLF S FCC LL D D DDDDDDDDDDD DDDDDDDD CAS1H SRCS1 D5 ELCS1Hf TOCS16 d IOCS164 LCDDLO RPP G E S__SSSSSSSSSSS SSSSSSSS CASIL SRCSO pP2 _ ELCS1 LF MCSIG A4 MCGIGR LCDDLI M12 LDLD DOD MDDMMMMMMMMMMM MMMMMMMM B5 lt A AA CDCD SES ASSAAAAAAAAAAA DDDDDDDD IROI14 Ei7 IRO14 LCDDL1 LV VHV DID3 C W 1MM45678911111 01234567 SB
71. CGA 6 5 H 1 G hA e Title LVDD A s R YCCLCDS c250 d NS Power Switching U26B ElanSC300 only SI9956DY 33uF TANT 3 __J2 Size Document Number REV TANG TBS SY S223 Rlanscopo entry mum dors B ElanSC300 310 Evaluation Board VIA If using ElanSC310 remove Q11 013 and 920 922 Date March 29 1996 Sheet 20 of 23 SIOIRIF SIOIDCD E SIOIDSR VER ID SIOICTS SIOIDTR R150 SIOIRTS 10K SIO1SOUT ST FDD BERG BEEN Connector VCCSYSS MS 9 1 oo 2 vecsys5 3 oo 4 5 oo 6 7 OO 8 150 fc149 cias R19Q R19 R192 R192 R192 R19 R196 9 oo 10 E 1K 1K 1K 5 1K 1K 1K 1K il oo 112 d 0 1UF O 1UF O 1UF 13 OO 14 g 359 1717771777 eesdeesee 1399 16 FA GND GND GND 3o 53A2le 40 A yas Se 2 shi 29 9 vyv SS
72. CXEP MMMMM GGGG 0C2 MCEL A 7 7 MCE12 SS 2 PIROO 194 prRoo rRo3 CCCCCCCCCCCCCC K O 4M 22 1 23 S A ITSH CCCCC PPPP AFO vPP A L131 RSVD S RT Cil 193 1 C55MMMSSS R R O IO I G NSUf 01234 0123 2 G 132 7RSVD7 4 ET EPIROI TDACKZ TCK 467 PIROI TRO6 EEEYYY E U NU N E MM C A REG A DT3 rusyp7 REGIT 0 0luF TANT DACK2 7 Q DACK24 TCLK MMMSSS Ss HE ZE N IE S m RST A Las 7 liicRsT HEADER 2 DRO2 TDO 76 110 PULLUP DRO2 N DRQ2 TDO 2 E dd E CD A p CDI AEN TDI 47 T B Tit PULLUP GND AEN 7 AEN TD i OR RDY A p RDY1 TC TMS 49 TC TMS 8 we A ite FULLUE WPI Sera JER D TORE 24q TORI D BVD1 A 4 TPULL PT BVDI1 e 2 IOW LI IOW 8 BVD2 A 775 CBULL PT BVD12 LUE 1 ade EMEMRE 259 MEMR Ed WAIT ABS bie WAITE 0 0luF TANT HEADERS EMEMW 580 MEMW j ICDIR I1 RSVD7 ICDIR c230 ERESDRV i92 RSTDRV MCEH B DT 25 Revo MCE2 f edis evees IOCHRDY IOCHRDY MCEL B pi25 T RAYDF MCE22 SECHE SA 0 12 VPP B 7 7 VPP2 2 33uF TANT 5 SAO 74 w 126 RSVD C189 c3 ca D 0 15 SAO REG B 7 REG2 SAT 731 sal RST B 427 RER 2ICRST e GND SA2 72 116 7 PULLUP 10UF 10V O 1UF O 1UF S55 SA2 CD B4 Bac 7 7 CD2 LORS 71 943 RDY B DILA PULLUP RDY2 H SA4 70 118 PULLUP GND GND GND SA4 WP B 7 WPZ SA5 69 1 120 PULLUP S42 02 SA5 BVD1 B H 7 7 BVD21 B8A6 67 sae Bvp2 p Lii PULLUP BVD22 SAT 66 134 7RSVD VCCELSYS SAS 64 557 CA24 136 RSVD7 Ee c190 C c6 SA95 63 SA8 CA25 ISA25 d SA9 H 1 0
73. DMA mapping 4 13 DOS booting from a diskette 1 2 1 7 DOS ROM See Application ROM Doze mode changing from in SystemSoft 2 9 forcing 3 8 power management in 2 24 setting in elanpmu 3 7 DRAM installing 2 19 restrictions 2 4 E Elan PMU evaluation utility See elanpmu elaninit zip 3 2 elanpmu 3 4 3 9 elanpmu zip 3 3 lanSC310 Evaluation Board See evaluation board EPROM address mapping 4 6 programming 4 5 4 7 restrictions 2 4 selecting 2 22 errata 1 2 EvalSet Serial and Parallel Port Setup utility See evalset exe evalset exe examples 3 11 using 3 10 3 11 evalset zip 3 3 evaluation board avoiding damage to 1 2 components of 4 14 4 15 features x xi installation requirements 1 3 installing 1 4 1 5 jumpers and switches listing of 2 3 layout diagram 2 2 layout suggestions C 1 C 2 overview ix quick start 1 1 restrictions 2 4 2 5 setup summary A 1 A 4 troubleshooting 1 6 1 7 exiting PhoenixPICO setup screen 2 15 SystemSoft setup screen 2 9 extended memory See memory extended lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT F Flash address mapping 4 6 initialization example 4 7 jumper settings 4 6 programming 3 3 4 5 4 7 restrictions 2 4 selecting 2 22 flash exe 3 3 flash zip 3 3 H hard drive IDE See IDE hard drive setting parameters in SystemSoft 2 6 2 11 High Speed mode changing from in SystemSoft 2 8 power mana
74. Disabled LPT Port Address Sets parallel port base ad dress 3BC 378 278 Disabled Video Display Sets video display type EGA VGA CGA80 CGA40 Monochrome CPU Speed Sets processor speed Low 20MHz 25MHz 33MHz Preferences NumLock on Turns on NumLock On Off Fast Boot When On does not per form memory check On Off Virus Alter When On alerts user of On boot sector writes Off First Boot Selects which drive is Drive A booted from first Drive C ElanSC310 Microcontroller Evaluation Board User s Manual 2 7 Typematic Rate Description Selects keyboard type matic rate Parameters 10CPS with 500ms delay Boot Password Sets power on password None SCU Password Sets password to enter setup screen None Video amp BIOS shadow When On shadows video and BIOS code to DRAM On Off Enable PowerMgmt When On sets up the lanSC310 timers to tran sition into Low Doze and Suspend Power modes When Off the lanSC310 always runs at the CPU SPEED set in the Stan dard Menu On Off Amount of time the lanSC310 remains in High Speed mode with no activity prior to transi tioning to Low Speed mode Off 0 5 seconds 1 seconds 2 seconds 4 seconds 8 seconds 12 seconds 16 seconds Amount of time the lanSC310 remains in Low Speed mode with no activity prior to transi tioning to Doze mode
75. ENCGA DSMAI3 s8 i17 52 SHORT LA22 DTR DSMAI4 s9 IDIS SHORT LAZ3 RTS gt lt DSWE S10 1p 2 SHORT LMEG iiiiai Sii SEH SHORT DACKIf TOCHCERE 2134 5 6 7 8 9 0 1 2 3 4 LDO S12 Je 22 SHORT DRO1 RP4 LVDD S13 IS 2 SHORT BALE DROO 10K CDI S14 16 22 SHORT DACKS DROI Socket AMP 643646 2 IDZ S15 1622 SHORT DROS DRO3 1 ElanSC300 only PS S16 1892 SHORT TOCHCHRF DROS If using Elansc310 y MI S17 16 32 SHORT IRO4 DRO6 depopulate RP3 and RP4 GND cit Sis 1622 SHORT TROS DROT aj aja S19 1742 SHORT TROIO 219419 07690232 Re2 ISA Bus Interface CP21 gt lt FRMI S20 SHORT a Socket AMP 643646 2 LVEEF S21 16 92 SHORT TROTS SESS C Advanced Micro Devices Inc 1 a i DSMDIO E d m 5204 E Ben White Blvd ElanSC310 chip signal name 2 EE TETAI DSMDO LDEV RSVD 800 222 9323 DSMDI 323 15 42 SHORT DROS AMD Proprietary All Rights Reserved DSMD2 S24 1E 22 SHORT IROII Title DSMD3 S25 Las SHORT TROY DSMD4 S26 1 SHORT DRO7 NOT TSA run COnnectore DSMD5 S27 lg 22 SHORT DROZ Layout ISA amp VL Bus connector Size Document Number REV DSMD6 S28 1 52 SHORT DROO according to spec in line EE ZE SHORT ONSE dcs push epee ina l B ElanSC300 310 Evaluation Board 2 2 Date March 29 1996 Sheet 16 of 23
76. ERERBE DEER EES ail so Ba 5 sas eSlas SCC NUSRSRD1 NUSBSRDA Din Ee 27 oo 28 SA4 26 1 4 2 4 STEP D39 FLPWRDfF 29 oo 30 a SAS 25 23 Zee ZEN WDAIA D38 _FLPWE 31 00 32 SAS 24 22 OGG OGD TREO 537 ELPTRRO 33 OO 34 SA7 23 25 T42 T11 WP p36 FLPWPE SA8 22 ag J 4 RDATA 632 EE RE Component side SDIUTTUSQ SD O 15 SAS 21 79 amp A BDAIA O34 FLPHDSE of board E E 44 FLPDSO SDO 17 po G G BRO D25 FLPDS1 SDI 16 pi 3 0 UTRO p46 _ELPMEO SD2 15 43 FLPMEL Sosa P2 MTRI O35 SD4 13 D DRV2 ENE Pas FLPDENSR R198 1K FLPDENSL SDS 17 DS DRATEO MSENO 22 FLPDRTOR R197 IK FLPDRTO SIT Io PS DRATE1 MSEN1 gt D7 RESDRV RESDRY Zur PDO INDEX 34 ip TEE AEN TORE 5 AEN PD1 TRKO 95 IOR TONY 780 RD PD2 WP f TOWE 530 WR PD3 RDATA 35 uas IOCHRDY LOCHRDY MFM PD4 DSKCHG 83 i A EE Ee SIOTRO3 39 ZWS CSOUT PWDN PD5 MSENO 55 9 GND DENSEL DZ dS iue 160 IRO3 PD6 86 E zuo rs og IRO4 PD7 MSEN1 0 7 d GND DRATEO 8 35 EROS E e A0 GND INDEX Pig CPIROI e IRQS ID SLIN SIEP ASTRE P55 e GND MOTOR DS ed Zi IRO7 sos IDE STB WRITE DZS 59 GND bag TC DROZ Z IC HH BL AFD DSTRB DENSE DZS i 729 GND DRVSEL pre DROZ DECKT 5H PRO SS 19 INIT DIR D s 59 GND MOTOR P73 DACKZ T 520 DACK 01 BI ACK DR1 Dis 709d GND DIR pp VccsYsB 0 IDEACK IDENT 11VAO ERR HDSEL D 220 GND STEP pjr 3 cacos dose SLCT WGATE 85 559 GND WDATA pS
77. ESIN P32KINR JTAGEN TAMOUT ACIN SLE4 SMI XIORESET RESUME SPKER LPH PMCO PMCI PMC2 PMCS PMC4 VCCELI PGPA VCCELSYZ PGPB VCCELSYS PGPC e VCCELMEM PGPD A VCCELS 8042CS VCCPELA EC 47uH EN Z2OGATE VCCPELA R380 c231 H Uc le e do ac c ac B ummc clotialc asas Ye ci2 10 332F TANT H 4i li 1 135 3e 5 24 i fa dis i aas B881 U 5 4 4 DN alas je 0 H 6 OISE TANT ovcc3 Kaes ELPOLR BDPEDE SYSCLK v V S X L1 XX L LL R J AERL PPPPP PPPP 8RA MCEH A os 1 MCE1 m EIROI IROl c C P I F4 33 F FF E T CXEP MMMMM GGGG 0C2 MCEL A po MCEI2f PIROU CT P1RQO TRO3 Go uuo AM 22 A2 OS eer ER vpp a H14 VPPI EPIROI AS PIROl IROS EcrBOd ol TS NES IAM 34 0123 Z REG Af pie RECIF DACK2 Ra Q DACK2 TCLK 5 Se MV N IE ST RST A 515 LICRST UOCE DROZ ES DRO2 TDO 2 E TT E CD A PHIS CbDif YCCPELS AEN R AEN TD i amp RDY A PTE RDYl C166 TC DG C TMS U WP A RIG WPI OVOLGE TANT TORT oi IOR D BVD1 A pIe BVDII IOW pa d LO o BVD2 A ETS BVD12 cun EMEMR T3 Q MEMR D WAIT AB OMIS WAITE EMEMW Ra d MEMW Y ICDIR FTS ICDIR ERESDRV Ey RSTDRV MCEH B Dii MCE2 VcOELS IOCHRDY IOCHRDY MCEL B DI MCE22 gt GEE C167 C168 SA O 12 Sabor VPP B ETS VPPZ Se B pE 1 D O 15 SALUT SAO REG B PRIS REG2 0 1UF 0 1UF 355 44 sal RST B HG ZICRST SRE RT SA2 Cb B4 pELS CDZf SAZ4r amp SA3 RDY B pr RDY2 GND GND SA4 T6 L14 ERE TO sa4 WP B DEZ ovec3 SAS P9 1 N16 A2 B9 sas BVD1 B Hii BVD21 L6 SA6 U5 Sag
78. General Purpose PGP Pins on page 4 2 Power Management Control PMC Pins on page 4 3 Programming BIOS Flash EPROM or Application Flash EPROM on page 4 2 Evaluation Board s Memory Map on page 4 7 Evaluation Board s I O Map on page 4 10 Evaluation Board s IRQ Mapping on page 4 11 Evaluation Board s DMA Mapping on page 4 13 Evaluation Board s Components on page 4 14 e Enabling the lanSC310 Internal Serial Port on page 4 15 For more information on the lanSC310 microcontroller see the lanSC310 Microcontroller Data Sheet and the lan C310 Microcontroller Programmer s Reference Manual lanSC310 Microcontroller Evaluation Board User s Manual 4 1 Programmable General Purpose PGP Pins 4 2 The ElanSC310 microcontroller has four Programmable General Purpose PGP pins which can be set up as inputs outputs address decodes and address decodes that are gated with the I O read or I O write pulse Index registers for the PGP pins are write only Keep this in mind when writing to Index 91h which controls all PGP pins Remember this particular implementation of the PGP pins is specific to the lanSC310 microcontroller evaluation board only Other system designs may implement these pins differently The lanSC310 microcontroller evaluation board makes use of the PGP pins as follows PGPO This pin in used to clock data from the data bus into a flip flop that is used to control the pro
79. H 3Eh sets up PGPO to be gated with I O write keep settings for PGP1 and 2 Elan Index 89H 20h Set up PGPO to respond to addresses 100 107 Elan Index 70H 40h set up PGPO as an output Do a read modify write setting bit 6 2 Enable writes to BIOS and application ROM Elan Index 62H 70 Set bits 6 5 1 Note bit 4 1 assuming 33Mhz operation 3 Enable 16 bit interface to application ROM Elan Index 51H 02h bit 1 1 indicates 16 bit application ROM size Evaluation Board s Memory Map Because the ElanSC310 microcontroller and the evaluation board are so configurable there is not one single memory map that covers all cases What is illustrated here is a typical memory map for the evaluation board configured in Full ISA mode with a Trident VGA ISA card ROM DOS kernel and 2 Mbyte DRAM lanSC310 Microcontroller Evaluation Board User s Manual 4 7 Table 4 2 Typical Full ISA Memory Map Memory Type Accessed Special Notes 1FFFFFh 100000h DRAM FFFFFh E0000h BIOS ROM ROMCS 64K BIOS image ROM DOS kernel ROMCS is set up for lin ear decode May be shad owed to DRAM DFFFFh Unused Application ROM DOSCS Used by ROM DOS MMSA page 3 DRAM at offset C8000h CBFFFh Used for SMM save state area MMSA page 2 ISA bus VGA card 32K BIOS ROM MMSA pages 0 amp 1 Dis abled to allow accesses to pass through to ISA bus ISA
80. HEf SBHE LCDDL1 VE DDD D D E E AA 01234 CCCCCCCC DE RRO OR2B C N23AAAAAA LLBBWMDA MMMMMMMMMMM Di VV Z YZL BC AC ITTTITAAAAA DRLH___D AAAAAAAAAAA BM IDGI DUP 4CC34567812222 EDEERICS 01234567891 I IBU A O ARU _ PP 90123 VY ONE 0 BR RRSI DCDC CDL DIUUDDDDLL 7 11111111111 AQ QEYR RKRH KYL SRRCAAAAAALLLLL IIDDDO SSSSSSSSSSS GGGGGGGGGGGGGG Li i949 99S LID MOSECCCCIIAAAAA RDRRRRRW AAAAARAARAA NNNNNNNNNNNNNN ES 27 4 7 5H P ATTKKKKK7812222 EROQOOQOS 11111122221 DDDDDDDDDDDDDD JO TETE FURR OE OF 72 87303 90123 FOLLETT SOF 456798901233 000 ELANPGA BE GLI TTPT DD DB DBaD BrAaA EDA Bcapspanpcrszcrc Dolalcalcoe adrien 213131142151 11111164 ii 7ia e iai iiia uiaiiiiieiiiiiii jiiiiiiii 131124214114 E 4 6 4 2 6l 7 i 6312 1680 446455 1547151657 30 5 34213 Se goggggoggggoodD joggoqdogD SA22 2299229992992299 33383335 SA21 M M SA20 AAAAAAANANAAAAAA Y odo yoo D GND HEEEEERKEEREEKR 1434947 LVDD 1234 SP SIS SAIS ElanSC300 PGA Socket d SATA ERMI FETI ElanSC300 only CP21 MI C Advanced Micro Devices Inc LDO IDI 5204 E Ben White Blvd LD2 Austin Texas 78741 LD3 E 800 222 9323 m AMD Proprietary All Rights Reserved DSOE Title BET SEET ElanSC300 Socket 208 PIN PGA SOCKET DSMD 0 7 DSMDIO 7 Size bocument Number REV B ElanSC300 310 Evaluation Board 2 2 Date March 29 1996 Sheet 2 of 23
81. I C195 AMD Proprietary All Rights Reserved Title zone Floppy amp IDE Interface lt IOCSICH GND Size Document Number REV B ElanSC300 310 Evaluation Board 2 2 Date March 29 1996 Sheet 21 of 23 o S87 ue U39P10 e VCCS P42 P31 P32 P33 P34 P35 P36 P37 P38 P39 P40 P41 P43 P44 PE His SHI SET Eds SEES SF S Tee S85 1 42 SHORT U39P12 12 5 p 5 2 3 3 3 3 3 3 3 3 3 3 3 3 3 3 R da ja a a 4 a a 4 4 4 4 a a a VECS TSS S86 1 492 SHORT U39P11 LR crk 45 45 5 5 5 5 5 5 5 5 5 5 5 5 EUR c 8 de e 6 6 6 6 6 6 6 6 6 6 6 6 Lo 47 17 7 7 7 7 7 7 7 7 S 7 7 7 vecs 7AHCT74 V5 4 8 4 8 8 8 8 8 s 8 8 8 8 8 8 8 s88 if 8 Sdot 3 10 10 10 10 10 10 10 10 10 10 10 10 10 10 WARE ii di 11 11 11 11 11 11 11 11 11 11 11 11 D DDR EORR 12 12 12 12 12 12 12 12 12 12 12
82. M socket but only half of the memory will be visible Software cannot be used to switch between ISA and local bus configurations One of the configurations must be set up before power up The BIOS ROM sockets U20 and U59 can only be populated with the following the AMD recommended part is also listed 128Kx8 ROM EPROM AMD 27C010 256Kx8 ROM EPROM AMD 27C020 128Kx8 Flash AMD 12 V 28F010 or 5 V 29F010 256Kx8 Flash AMD 12 V 28F020 or 28F020A lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT BIOS Application DOS ROM space is 16 bits wide two or four devices must be used e The DOS ROM sockets U16 U19 can only be populated with the following the AMD recommended part is also listed 256Kx8 ROM EPROM AMD 27C020 512Kx8 ROM EPROM AMD 27C040 256Kx8 Flash AMD 12 V 28F020 or 28F020A NOTE 512Kx8 Flash can be supported after a minor board rework Contact your AMD FAE for more information Some ISA signals are not available when using Local Bus mode Refer to the lanSC310 Microcontroller Data Sheet and Programmer s Reference Manual for detailed information on the ElanSC310 functionality The RTC RAM integrated in the lanSC310 microcontroller which is used to maintain time date and system configuration data is cleared lost when power is removed from the Voc amp AV cc power planes Connectors are available to test local bus operation and modes
83. MCEZ2i 36 ZISAII TO E RESH Paa 2IXIOR e 2ISA9 115 1l Non AS ZIRION me fl R67 2ISAB 120 23 10 Rae ZISAI7 uM ae EL EX 10K 21SA13 134 A13 A18 47 21SA18 21SA14 144 A14 A19 48 21SA19 VCC2CRD5 Component ZIMEMWIT 759 Al 49 ZISA20 side view RDY2 ie WE __ A20 DEG ZISA2I RDYZ2 i99 RDY TIREO A21 029 2IMEMW 30 VCC VCC bz5 D EE ZISAIG 199 vpPi VPPZ bes 21SA22 TOK LOK p c71 2ISAIS 200 Rie A22 Psa 21SA23 10UF 16V 21SA12 219 A12 A24 DSS 21SA24 GND ZISAS Zag AC NC P58 2ICRST 2ISA4 259 AS RESET D59 WAIT2 ZICRST 3 2ISA3 E AA WAIT 60 WAIT2 2ISA2 574 A3 INPACK Dei 2ICREG 2ICREG ZISAL 289 2 REG Pez BVD22 BVD22 Z2ISAO 259 Al BVD2 SPK 63 BVD21 BVD21 ZISDO 309 A0 BVD1 STS De ZISDB ZISDI 319 DO D8 Des ZISDS ZISDZ 320 21 D P e ZISDIO R272 VCC2CRDS WP2 339 22 210 067 1M LI 349 WP IOIS CD2 68 PCD224 VINE GND GND EE GND IC Card GND V R65 AMP 175649 2 GND 10K ElanSC300 onl WP2 21SA 0 25 PCMCIA Buffered Connectors 21SA 0 25 ElanSC300 only If using ElanSC310 do not populate P13 and P14 C Advanced Micro Devices Inc 5204 E Ben White Blvd Austin Texas 78741 VCClCRD5 VCC2CRD5 800 222 9323 AMD Proprietary All Rights Reserved c69 c68 Title 10UF 10 10UF 10 Buffered PCMCIA Connectors Size Document Number REV ds UAE B ElanSC300 310 Evaluation Board 2 Date March 29 i996 Sheet 12 of 23
84. MD s 12 V 28F010 5 V 29F010 12 V 28F020 or 12 V 28F020A Flash parts on the evaluation board Source code is provided MMSINFO ZIP Utility for displaying MMS window configuration information Source code is provided MMSVIEW ZIP Utility for viewing data through the MMSA pages REGDUMP EXE Utility for displaying the ElanSC310 registers SDB ZIP Simple debug utility for command line accesses to lanSC310 registers ELANINIT ZIP This zipfile contains assembly language routines that give an example of how to initialize the lanSC310 microcontroller registers enable DRAM handle SMI events and report status through the serial port The unzipped files compile to form a binary image that can be programmed into a ROM and placed in the BIOS ROM socket Refer to the README and TXT files in this zipfile for more information 3 2 lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT ELANPMU ZIP This zipfile contains ELANPMU EXE which can be used to place the lanSC310 microcontroller into various PMU modes It allows the user to modify certain settings for each PMU mode The user can then measure current consumption of the lanSC310 microcontroller cores and see how the current changes depending on the current settings and PMU mode Refer to Elan PMU Evaluation Utility on page 3 4 for more information EVALSET ZIP This zipfile contains EVALSET EXE which has been provided to allow easy activation of the seri
85. OM2 configurable One Super I O 16C550 compatible port COM 1 through COMA configurable One parallel port connection from the lanSC310 microcontroller Two 16 bit ISA slots for evaluation of ISA based devices only One IDE connector connected to the lanSC310 ISA bus One floppy drive connector connected to the Super I O floppy drive controller One AT style keyboard connector connected to the 8042 keyboard controller One PS 2 style mouse connector connected to the 8042 keyboard controller Main Memory Configurations DRAM 512 Kbyte 1 Mbyte 2 Mbyte 4 Mbyte 8 Mbyte and 16 Mbyte DRAM configurations supported 3 V or 5 V DRAM support Four standard 30 pin DRAM SIMM sockets One standard 72 pin DRAM 16 bit SIMM socket can be used instead of the 30 pin sockets Power Management Power planes are isolated and jumpers are provided to measure current consumption The CPU voltage sources are Vec Vecmem Vecsys gt Vecsys V ccs Veci Avcc Suspend Resume button provided note that BIOS enable the suspend resume function MicroPower Off button provided for testing DIP switch for transitioning battery low and ACIN pins for testing X lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT Bus Modes Full ISA mode full 16 bit ISA bus support Local Bus mode 16 bit bus support for high speed video BIOS ROM Two 32 pin DIP sockets are provided to allow for BIOS ROMs whi
86. OPSVOLT 9 OP12VOLT R388 R389 PC POWER CONN C122 C127 C121 NOTE 100K 100K Burndy GIC6R 1 e E L ci26 VEE is controlled by LVEE in internal CGA mode R276 0 1UF 10UF 10V O 1UFT 10UF 10V VEE is controlled by VGALVEE in Local bus mode 10K 4 1213 VEE is off in ISA bus mode DA 5 023 GND GND GND GND GND GND D S19430DY 5161718 vccs R277 3 Vvcc5 vecs 2 Q24 4 BSVOLT PMBT3904 2 4 4 1 5K 1 E 9 1 8 R228 R387 ENCGAF 3 E 10 3 4 100K UTIA 50K PI2VOLT vccs 74HCTO2 V5 UZIC U37B C242 vccs 74HCTO2 V5 74HCTO4 V5 10uF 20V S A GND ovec3 4 ql GND 226 9 EE 1 2 5d Rework Instructions Lie Oia Sm Q25 R279 mH 4 To correct 3 3 Volt VCC3 output Add wire OP12VOLT 3 2 2 s 6 regulation when in Suspend mode ws c EL 17 U37A 1 Remove components L1 and D18 D18 o Sg 74HCTO4 VS U41B 2 Cut short shape S108 A 3 6V 1W 4 d R280 D vccs 74HCTO2 V5 3 Add wire to connect U40 pin 9 S C20 1M nl to OPSVOLT cathode side of D18 PSVOLT 0 nF Als 5 1 H R159 BAT DE 100K R283 OVCC3 T did GND FMC2 100K dl Gd 22UH 1A SIS956DY CX130 C130 E UL el GND VGALVERH R154 75UF 6 3V 75UF 6 3V S108 ROGER 100K GND GND E GND u40 Ii AS de D10 ovcc3 id supw 1x3 i5 2 D ENVEE 2 NEGON R155 Les 161 3 3 5 cs 2 TNSDIU m 24 us z T C129 10uF 10V ovec3 Geo ET 100UF 6 3V R376 SC 4 2 3 1M 2 Dri JAS 06 ND D13 13 tin P D SI9400DY RLR4001 i2 RI56 sie78 D11 E 470 15 2 4i VEE EE 1 ci23 16 8 RIST S GND 3 23 v FBN i p nem i 9105
87. R TIXLON 1IXIOR R69 TIERS iig A9 NIOW TT 1IXIOW K 10K IISAI3 13928 ATT IISAIB8 VCCICRDS TISA14 1249 13 Al8 Dis TISA19 o TIMEMWE 159 Al4 AT TISA20 RDY1F ie LE Lo IISAZ1 T lt RDYIF 369 RDY IREO A21 sS Her Res LIMEMWT ICVPP1 Taq VCC MOS 10K 10K 10K ICVPP1 3 i89 VPP1 VPP2 IISAT6 19 1ISA22 c70 IISAI5 209 18 A22 TISA23 10uF 16v TISA12 214 Ee SE TISA24 TISA7 22 E 56 1ISA25 TISA6 230 AT Ee IC Card GND l1ISAS5 24 1ICRST Connector ad a5 RESET E TICRST is d LES 22d A4 WAIT WAITIF WAITI AMP 1756492 VCCICRDS5 5 d AB INPACK t ees 5 VCC2CRD5 11ISA2 27 S 1ICREG TISAT 280 2 REC BVD12 arenes 347__ 68 TISAO 29d Al BVD2 SEK Pea BVDII BVDIZ 33 R302 R303 TISDO 309 Ae BVDI SIS Pea TISDS BVDIT P oe WU Pw SEIS ES ea WPI 339 D2 BLO P67 R269 25 r 329 WP IOIS E PCDI12 gt 1M Kee 621 GND GND VCCICRDS e 4 SND GND m 62 GND IC Card GND 60 AMP 175649 2 Y 25 E R83 ElanSC300 only GND 58 10K z 56 zi 7 CHE L gt a vccs 19 S s 9 IISA 0 25 lISA 0 25 N Si 52 q ZISD O 15 Ee V A265 15 50 H d 10K 28 E VCC2CRD5 VCC2CRD5 PCD2 gt R77 vecs 13 e E 10K x qe d y P13 Y 4 IT a GND 1 35 GND 4 44 I 59 GND GND x TE Lans 21SD3 2 SND 036 PCD2 6 E 215D4 39 23 CD P357 ZISDII PCD224 5 CD23 gt Az 2ISD5 ad Di pis 0 2ISDIZ 2 9 KS moni ZISD6 Sd be pis p39 2ISD13 U53B 20 21SD7 6 40 21SDl4 74HC32 LG ZIMEMR ZMCELIT 79 Di DITE ES ZISD15 ms 38 ZISAIO gg SEL 215 075 ZMCEZT 3 x VCC2CRDS ZIMEMRF og A10 CE2 075 2
88. RAM MEM53 32 Dip Socket 32 Dip Socket ElanSC300 only ElanSC300 only SRCS3 MWE SRCST Note If using ElanSC310 do not populate U2 U5 JP8 JP9 Main System Memory SRAM VCCMEM53 JP8 ElanSC300 only 1 VCCSRAM 2 C Advanced Micro Devices Inc HEADER 2 cal 5204 E Ben White Blvd Elansc300 SH any LO I Austin Texas 78741 800 222 9323 GND AMD Proprietary All Rights Reserved Power Measurement Point Title SRAM Main Memory Size bocument Number REV B ElanSC300 310 Evaluation Board 2 2 Date March 29 1996 Sheet TAGE 23 VCCSYS5 VCCSYS5 JP10 VCCKBD5 je 9 4 3 KRC 9 8 SEEBHR S BZOCATE eg RCE Power Measurement Point c192 MSIRGIZ VCCKBD5 U48C 10UF 10 c46 74HC32 Keyboard E 0 105 Connector d GND PMC4 g JJ GNP VCCKBD5 ERC KE E G U6 T o JP30 eS 4 g PCLK De R34 2 SO
89. S flags a setup error If this occurs press F1 to continue booting with the previous setup information If a setup error occurs the BIOS prompts the user to press the CNTL ALT S keys to enter the setup screen The setup screen can also be entered while in DOS by pressing the CNTL ALT S keys SystemSoft has a familiar menu driven setup screen The options are listed in the table below The default options are indicated in bold Table 2 2 SystemSoft BIOS Set Up Screen Options Description Parameters Set Date Sets system date User enters Set Time Sets system time User enters Diskette Disk Selects disk drive type 2 88MB 1 44MB default for drive A 1 7MB 720KB 360KB none default for drive B Hard Disk 1 Sets parameters for Hard Standard select from list Drive 1 Custom enter your own Auto auto detects drive pa rameters works for most drives 2 6 lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT Option HDI Translate Parameters Description Leave this unchecked Parameters Hard Disk 2 Sets parameters for Hard Drive 2 Standard select from list Custom enter your own Auto auto detects drive pa rameters works for most drives HD2 Translate Parameters Leave this unchecked Internal COM Port Sets the ElanSC310 inter nal COM port COMI COM2 Disabled Super I O COM Port Sets the Super I O port COMI COM2 COM3 COMA
90. SAT 22 56 ISA25 d AT A25 ISA25 SAG 23d RZ lt 2 IC Card SAS 24 1ICRST Connector 49 A5 RESET TICRST Eo SA4 25 na WAIT 022 WAITIli WAITI _ AMP 175649 2 SA3 26 SA d A3 INPACK 3 ES ee SA2 27 REGL d A2 REG REG1 34T 68 SAI 28 BVD12 33 68 235 S80 Al BVD2 SPK pe Zo BVD12 33 S d AO BVD1 STS BVDIT 22 m SDO 30 SD8 66 SATZ SA O 12 SDI 314 BO DS SD9 31 Pe E SD2 328 SDIO Ee WPI 339 D2 Dio 25 has 34d WP IOIS CD2 PCDIZ gt as os GND GND gt 82 PMEMR z GND IC Card GND 60 PMEMW AMP 175649 2 25 Gf ElanSC300 only 58 z3 WPI 22 ane 26 H 21 E 4 vccs 19 S 9 pm 52 d 17 m E R93 50 10K 15 2 E L 28 a VCC2CRD5 VCC2CRD5 NECDZ i3 E E P15 Y D7 ii m GND aana GND b32 GND 3 lei 2 FO EM aa SD3 2 epi 536 NBCD2 N 9 SD4 39 23 CD P37 SDi RB400D az SDS aq D4 Dil pas SDI KS e SD6 Bq PS D12 p39 SDi3 zu Ee MCEZ22 557 z9 D6 D13 P25 SDi4 ES SS eege DI D14 py 38 MCE22 7 at SD15 Ee d CEL D15 oS L 38 SA10 8 a 42 MCE2 S 3 dQ ALO CE2 MCEZ PMEMR D 43 36 icd OF RESH D ze SAIL 10 44 IOR 10 A11 NIOR SAS ii 45 TON tig A9 NIOW Ons Ef eo SAS 1248 ALY Rae BSALT ue MEI Ee BSAI3 13d ALS Als bar BSAIS BSAl4 145514 218 bas BSAIS Component PMEMWET is AL ES BSAZO side view RDY2 ie WE __ A20 DEG BSAZL lt RDY2 59 RDY IREQ A21 pe LE vec vcc be EOVEEA BSAIS 199 VPET VPE B53 Bsa22 BSAIS 20 ee 222 C54 BSAZ3 BSAIZ 214 512 Ac p55 ISA24 SAT 220 4 P56 ISA25 SAG 23927 25 DT SAS Zag AC NC
91. SOUT 2 11 1 08 HS SIRO 2 ROO LUE PMC2 12 1 09 LF353 V5 I3 r o010 GND TS um I4 1 011 Z 4 SS A SIN 1 01 1 012 A R109 A o 1 02 1 013 5 1 03 IZOLA S GND DYR MERODIO T s 1 012 FTO R111 TR c83 6 81K 1 1UF 10V GND 1 06 1 07 END a ay PALCE610 VS GND V 24 DIP Socket GND Not populated Serial Infra Red Circuit DSMD O 7 U25 DSMD O 7 iTi oolii _SDSMDO 33 R341 DSMDO STi 9 Li2 SDSMDI 33 R343 DSMDI 8 A2 O2 Li3 SDSMD2 733 R344 DSMDZ SEH 63 15 SDSMD3 35 R342 DSMD3 Cd Ga Li6 SDSMD4 733 R345 DSMD Bs 95 L17 SDSMD5 33 R346 DSMDS5 A xe oe L18 SDSMDE 33j R347 DSMD6 3 19 SDSMD7 33 R348 DSMD7 se A7 07 24 58 Place R341 R348 close to U25 337 10 VCCSY253 2j All A12 29 A13 vec 8 DSMAIO 14 H ala DSMA O 14 SRAMCS 20 E Se ER DSOE OE d 80 05 DSWE WE GND VCCSY253 62256 10 SYS253 h 28 DIP GND 4 32Kx8 SRAM DSCET H 3 Toshiba NOCAT ENCGA 2 If using ElanSC310 do not populate U25 R341 R348 P17 P18 C72 81 R95 R106 VR1 U26 Internal Video RAM 74HCT32 SYS253 ElanSC300 only GND P17 1 LDO eT AMP 747844 4 2 cP21 CARE LDL 3 CPII SI LD2 Als FRMI ESCH LD3 Ba CGA CRT VCCLCDS GND GND P18 c73 c74 c75 c76 c77 c78 c80 c79 B CGA CRT 330PF 330PH 330PH 330PH 330PH 330PH 330PH 330PH d Connector R102 15 LCDFRM _ E S RIOI 15 LCDCPi 7 d R100 15 LCDCP2 1 3 MI R99 15 LCDM 6 6 e R98 15 LCDDO S 2 o e R97 15 LCDDl N 7 f DES R96
92. STER 197 MCS164 LCDDL1 M12 LDLD DOD MDDMMMMMMMMMMM MMMMMMMM 3 198 lt A AA CDCD SES ASSAAAAAAAAAAA DDDDDDDD IROIA 143 IRO14 LCDDL1 LV VHV DID3 C W 1MM45678911111 01234567 ELCSOH TTCSO I SBHE SBHE LCDDL1 VE DDD D D E E AA 01234 CCCCCCC ELCSOL ELCSOH DE RRO OR2B C N2SAAAAAA LLBBWMDA MMMMMMMMMMM ELCSOL MCCL DE VV Y GAZ CPC A 111111AAAAA DRLH D AAAAAAAAAAA ELCSIH ELCSIHE BM IDGI DUP 4CC34567812222 EDEERICS 01234567891 ELCSIL 1 IPU A O ARU 4 PP 90123 VYtt44Oodss 0 ELCSIL BR RRSI DCDC CDL DIUUDDDDLL dd R9 R6 R7 R8 AQ QEYR RKRH KYL SRRCAAAAAALLLLL IIDDDO SSSSSSSSSSS 10K D1K 1K 1K GGGGGGGGGGGGGG Li 199 90S THU MOSECCCCIIAAAAA RDRRRRRW AAAAARAARAA NNNNNNNNNNNNNN ES 27 4 I 5H P ATTKKKKK7812222 EROQOOQOS 11111122221 DDDDDDDDDDDDDD PEER K VL 0 6730 90123 FO19730 45678901233 SA 13 23 VAY SA EE 23 FORTS i23asseiin1iiii2 ii ai iii jin uiaiiiiiiiiiiiaiai jiaiaiiiiai j22iiaiiiiiii _TOCHRD HEES 3 8 0 0 2 5 5 9 48 87177 74 77 44 8 eeeee es5555 5555 4 16444777 141987654310 4 5 4 6 7 1 8 52 11181913 44s v 673 54 3 2 1 0 9 8 5 213 2 1109 s e 78 9 ojij2 SA13 CCELI 2 PE llel c201 C202 1c203 PEEEBEEEPEEEEL EEE eER TD Patz q 42442 109001 1 1 d 0003229991999195 190999405 REE Dodd ddd NERE LEE GND EE EE EE DIT H GND GND GND A12 BALE EHIHAAAAAAAAAAA iii po LVDD 7 TROIS oi dgdddiii4442 189999099 Note LVEER BEEREEEEAEEREEREERKEEGKEE HER GER IRO12 ygu
93. Software Evaluation Kit Diskette AAA 3 1 AMD Utilities Diskette ss 3 2 Elan PMU Evaluation Utility ss 3 4 A Setup PMU Mode Characteristics PMCx Pins CPU Speed 3 5 B Force PMU State Transitions eeeeesseeeeeeee eene ener 3 8 C Test Battery Level amp ACIN Pins 3 9 X Restore PMU State and Exit to DOS 3 9 Z Leave Current PMU Values and Exit to DOS esses 3 9 iv lanSC310 Microcontroller Evaluation Board User s Manual 1 0 1 0 EvalSet Serial and Parallel Port Setup Utility sss Ser al POLE RE serial Port sees ERR ER Rute YER repr DES Parallel Port oer Sees Chapter 4 Developing Code Programmable General Purpose PGP Pins sess Power Management Control PMC Pins Programming BIOS Flash EPROM or Application Flash EPROM eene Evaluation Board s Memory Map Evaluation Board s I O Man Evaluation Board s IRQ Mapping Evaluation Board s DMA Mapping eee eee eee eee eee Evaluation Board s Components Enabling the ElanSC310 Internal Serial Port lanSC310 Microcontroller Evaluation Board User s Manual Appendix A Evaluation Board Setup Summary Setup Summaty oe ee eee o ee eee ie e eat RUE A 1 Appendix B Verified Peripherals Verified Penpherals iere iere e e eee int ge B 1 Appendix C Board Layout Suggestions Board Layout Suggestions C 1 Appendix D Schematics EREM EE ee D
94. WF DEST MIS 7DROS 7TOICHCHRE EDO 7 DACK2 TCK 7 78042CS XTDAT 7 7 PULLDN IRQ5 7 7 PULLUP IRO10 DACK2 B042CS4 CPI ROTE CP21 RC PMC2 FRM1 TPULLUP LVEE ha A AZOGATE DSWE x AFDT AFDT X140UT STREF PE PMCZ x 5 a PMCS BUSY SLCTING PGPD ERES BESCH PGPC SLCT ERR PGPB PGPA INIT TPPDWESIPPDSCE ACK LPH IOCHRDY PPOEN PPDWE e syr DH H PIR1 IRO6 PIRQO IRQ3 DTR CFGl EPIROI TIROI PIROO DIRF Bisk GFGO EIROi IOCSI64 SOUT RTS MCS16 IRO14 DSR CTS JTAGEN x SIN DCD PI ACIN 7 7 RESUME ff SUS RES SMI Y GND 10th Center 30x2 Berg GND GND 10th Center 30x2 Berg GND AMP 3 102977 0 AMP 3 102977 0 ELAN Signal Headers Note ElanSC300 Chip schematic signal name ElanSC310 Chip signal name C Advanced Micro Devices Inc 5204 E Ben White Blvd Austin Texas 78741 800 222 9323 AMD Proprietary All Rights Reserved Title Debug Headers Size Document Number REV B ElanSC300 310 Evaluation Board 2 2 Date March 29 1996 Sheet Blot 23 Install this resistor amp remove the 555 Timer when using ELAN rev B3 R386 vccsvss5 ERESDRV M 0 vecs 1 5 ven 4 R385 R391 67K LE 10 an el RESDRV RESERV gt
95. al and parallel ports on the lanSC310 microcontroller evaluation board The BIOS on this board was designed to be generic therefore these functions are not enabled by the BIOS on the evaluation board This utility can be used to set up the base addresses for serial port 1 serial port 2 and parallel port 1 on the evaluation board For complete operating instructions on EVALSET EXE refer to EvalSet Serial and Parallel Port Setup Utility on page 3 10 FLASH ZIP This zipfile contains FLASH EXE which can be used to program 28F010 29F010 28F020 and 28F020A Flash parts on the lanSC310 microcontroller evaluation board Source code is provided for this utility to be able to modify it for other platforms and other AMD Flash devices Refer to the README and TXT files in this zipfile for more information MMSINFO ZIP This zipfile contains MMSINFO EXE a utility for displaying the current status of the MMSA and MMSB windows If an MMS window is enabled then information for each page within the window is displayed If an MMS window is disabled then the information on each page within the window is not displayed Source code for this utility is also provided The source code contains routines that show how to manipulate the lanSC310 microcontroller s MMS window registers Refer to the README and TXT files in this zipfile for more information lanSC310 Microcontroller Evaluation Board User s Manual 3 3 MMSVIEW ZIP This zipfile contai
96. anagement modes are available High Speed Low Speed Doze Sleep Suspend and Off Refer to the lanSC310 Microcontroller Data Sheet and Programmer s Reference Manual for an in depth discussion of these modes 2 24 lanSC310 Microcontroller Evaluation Board User s Manual Suspend Resume The lanSC310 microcontroller evaluation board provides a hardware option to allow the user to toggle between the High Speed and Suspend modes By pressing the Suspend Resume button after the system has powered up the system enters the Suspend mode assuming the ACIN signal is low By pressing the Suspend Resume button again the system returns to High Speed mode The behavior of the system in Suspend mode depends on the BIOS Power Management Simulation Battery backup conditions can be simulated on the evaluation board by controlling the ACIN signal to the lanSC310 microcontroller When ACIN is low power management functions on the ElanSC310 microcontroller are enabled When ACIN is high power management functions on the lanSC310 microcontroller are disabled Switch 8 on SW4 controls the ACIN pin on the lanSC310 allowing power management functions to take effect if they are enabled In order to get true power measurements while in Suspend mode IRQ1 and PIRQ1 must be disconnected from the lanSC310 microcontroller The lanSC310 microcontroller drives these signals low during Suspend mode Since the peripherals connected to these lines drive
97. annels 0 7 internal to the lanSC310 RTC index and data registers internal to the lanSC310 NMI enable disable Bit 7 of Port 70 MMSB is disabled which allows ac cesses to propagate to ISA bus 8042 keyboard control and data regis ter See 8042 Spec Port B control internal to the lanSC310 Programmable timer registers internal to the lanSC310 See 8254 Spec Programmable IRQ master controller internal to lanSC310 See 8259 Spec DMA controller channels 0 3 inter nal to the lanSC310 See 8237A Spec NOTE All I O addresses are at AT compatible locations Evaluation Board s IRQ Mapping Because the lanSC310 microcontroller and the evaluation board are so configurable there is not one single IRQ map that covers all cases What is illustrated here is a typical memory map for the evaluation board configured in Full ISA mode with the lanSC310 microcontroller internal serial port enabled as COMI the Super I O floppy drive controller enabled an IDE hard drive and the Super I O serial port enabled as COM2 lanSC310 Microcontroller Evaluation Board User s Manual 4 11 Table 4 4 Typical Full ISA IRQ Mapping Device Assigned Special Notes Available for ISA bus Connected to IDE interface Reserved Available for ISA bus Available for ISA bus Available for ISA bus Available for ISA bus ElanSC310 internal RTC interrupt Ela
98. as PGPB on the evaluation board schematics beginning in Schematics on page D 1 PGP2 This pin is used as an address decode for the IDE CST It should be programmed as an address decode for I O addresses 3F0h 3F7h Setting the lanSC310 Index 91h to xx11xxxxb programs PGP2 as an address decode Setting the lanSC310 Index 94h to 7Eh sets the address range to 3F0h 3F7h NOTE This pin is referenced as PGPC on the evaluation board schematics beginning in Schematics on page D 1 PGP3 This pin has no specific function on the lanSC310 microcontroller evaluation board NOTE This pin is referenced as PGPD on the evaluation board schematics beginning in Schematics on page D 1 Power Management Control PMC Pins The lanSC310 microcontroller has five Power Management Control PMC pins that can be programmed high or low based on the current power management mode The ElanSC310 microcontroller evaluation board makes use of the PMC pins as follows lanSC310 Microcontroller Evaluation Board User s Manual 4 3 4 4 PMCO This pin is logically ORed with the system Reset pin from the lanSC310 microcontroller RSTDRV and fed to the reset pin of the 8042 keyboard controller It is used to perform a software reset to the 8042 A value of 1 drives the reset pin of the 8042 active A value of 0 allows for normal operation The lanSC310 microcontroller Index ACh bits 3 0 control PMCO and are set to 0 on power up If you ar
99. be taken to avoid damage or misuse of the board Make sure power supply connectors from a standard AT system power supply are plugged onto the board correctly The grounds usually black wires should meet at the center of the two power supply connectors on the board See Board Layout on page 2 3 for important information e See appendix B for a list of peripherals that have been used to test the evaluation board prior to shipping The following documents are updated on an ongoing basis and contain important errata information regarding the evaluation board The Evaluation Board Errata document discusses hardware issues pertaining to the evaluation board The current version is shipped with the kit contact your local AMD representative for any updates The BIOS Errata document discusses software issues pertaining to the Phoenix and SystemSoft BIOS that are shipped with your evaluation board This document is available through your local AMD representative lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT Installation Requirements First you need the following from the lanSC310 microcontroller evaluation board kit lanSC310 microcontroller evaluation board VGA display adapter You need to provide the following items see the appendix Verified Peripherals on page B 1 for a list of peripherals that are known to work with the lanSC310 microcontroller evaluation board An AT compatible 3
100. bus VGA card display buffers MMSB is disabled which allows accesses to propa gate to ISA bus NOTE DRAM 1 In the above configuration MMSB is disabled and MMSA is defined to start at base address C0000h Oe lanSC310 Index 6Dh 00 2 MMSA pages 0 and 1 are disabled allowing accesses to the address range at C0000h C7FFFFh to propagate to the ISA bus where the VGA BIOS is located 3 Addresses E0000h FFFFFh are set up as linear decodes to the BIOS ROM Index 65h bit 0 0 bit 1 1 bit 220 bit 320 During BIOS initialization if shadowing is enabled lanSC310 Index 65h bit 4 1 lanSC310 Index 69h FFh then accesses to this address range go to DRAM 4 Refer to the ElanSC310 Microcontroller Programmer s Reference Manual for information on ROM BIOS and ROM DOS accesses using the MMS pages 4 8 lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT DOS ROM Application ROM Mapping The application ROM space also known as DOS ROM space is selected by the DOSCS chip select Only 256Kx8 Flash parts are supported 256Kx8 and 512Kx8 EPROMsS are supported JP12 selects between Flash EPROM 1 2 Flash 2 3 EPROM JP13 selects between 256Kx8 and 512Kx8 parts 1 2 256K 2 3 512K NOTE 512Kx8 Flash can be supported after a minor board rework Contact your local AMD or distributor Field Application Engineer for more information Access to the application ROM begins at offset Oh and extend
101. capacitor values increases start up time and power consumption but it does reduce noise coupling into XTALI1 and XTAL2 lanSC310 Microcontroller Evaluation Board User s Manual C 1 C 2 Phase Locked Loops Board layout considerations for the four PLLs suggest the following precautions Keep the output traces for the four PLLs as short as possible and keep them as far away from each other and other clocking signals as possible Do not exceed the specified AC loading for the four PLL outputs Certainly no DC loading is allowed since they are all CMOS logic outputs If the PLLs have to drive more load than they are designed for in the actual application make sure they are properly buffered on the board Power Supplies Board layout considerations for the power supplies suggest the following precautions Bring the analog Vcc and digital Vcc on separate traces from the output of the voltage regulator to the lanSC310 microcontroller making sure the traces are thick and wide Filter the analog Vcc with an RLC second order low pass filter e g R 10 Q L 47 uH C233 uF Since the digital Voc carries much more current than the analog Vcc a second order LC low pass filter should be used instead 1 e the series resistor should be removed A small capacitor in the order of a few nanofarads can be added in parallel to the large filter capacitor to suppress high frequency noise Isolate the analog ground plane from the digital ground pla
102. ch socket is enabled is selected via JP32 e Either a 128Kx8 or 256Kx8 EPROM Flash is supported AMD s 27C010 or 27C020 EPROM and AMD s 12 V 28F010 5 V 29F010 12 V 28F020 or 12 V 28F020A Flash are recommended 2 V programming voltage is available Evaluation copies of PhoenixPICO BIOS and SystemSoft BIOS are provided in the sockets of the evaluation board EE ROM DOS ROM Four 32 pin DIP sockets are provided for application ROM space e 256Kx8 or 512Kx8 EPROM ROM devices are supported AMD s 27C020 or 27C040 are recommended e 256Kx8 Flash devices are supported AMD s 12 V 28F020 or 12 V 28F020A Flash are recommended NOTE 512Kx8 Flash can be supported after a minor board rework Contact your local AMD or distributor Field Application Engineer for more information Application ROM space is 16 bits wide two or four devices must be used e 2 V programming voltage is available e Datalight ROM DOS mini SDK software developer s kit is provided with the evaluation kit Debugging Headers for all 208 signals on the lanSC310 microcontroller Supports DOS Soft ICE tools and ROM ICE tools e Support for standard x86 application debugging tools OS Support Compatible with standard 32 bit operating systems DOS WinLight Windows 3 1 GEOS QNX lanSC310 Microcontroller Evaluation Board User s Manual xi xii lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT Chapter 1 Quick Start
103. crocontroller Evaluation Board User s Manual 2 21 ROMs 2 22 The lanSC310 microcontroller evaluation board provides two BIOS ROM sockets and four application ROM sockets capable of handling up to 256 Kbyte of BIOS ROM and up to 2 Mbyte of application ROM The evaluation board supports BIOS and application ROMs as either Flash or EPROM devices JP12 must be set to select either Flash or EPROM devices Two BIOS ROM sockets U59 and U20 are available on the evaluation board Each BIOS ROM socket is capable of supporting 128 Kbyte or 256 Kbyte Flash or EPROM BIOS ROMS The active BIOS ROM is selectable by JP32 Four 8 bit application ROM sockets U16 U19 are provided on the evaluation board for ROM based applications such as ROM DOS U16 Even andU17 Odd make up one logical 16 bit ROM Low beginning at offset 0 in application ROM space U18 Even and U19 Odd make up a second logical 16 bit ROM High beginning where U16 and U17 end in application ROM space These sockets can be populated with either 256 Kbyte 8 bit Flash or 256 Kbyte or 512 Kbyte 8 bit EPROM devices JP13 selects the size of application ROMS that can be used NOTE 512Kx8 Flash can be supported after a minor board rework Contact yourlocal AMD or distributor Field Application Engineer for more information lanSC310 Microcontroller Evaluation Board User s Manual 1 0 Power Measurement The evaluation board allows for measurement of current flow in separate
104. d controller What this means to the programmer is that if SysCLK stops being driven to the 8042 for any period of time the controller must be reset once SysCLK starts being driven again in order for the 8042 to function properly The lanSC310 microcontroller stops driving SysCLK any time the Low Speed PLL is disabled or when in Sleep Suspend and Off PMU modes even if the Low Speed PLL is enabled for these modes One side effect of not driving SysCLK to the 8042 is the RC pin from the 8042 will go active for a short period of time This active state is latched by the lanSC310 microcontroller Therefore when the lanSC3 10 microcontroller goes back to High Speed PLL mode from Sleep Suspend or Off mode the CPU is reset Note that the above conditions only apply to a non static 8042 If a static 8042 is used then these conditions don t apply To work around these situations the evaluation board has been wired to use two pins on the ElanSC310 microcontroller to gate RC from the 8042 PMC4 and to reset the 8042 PMCO PMC4 should be programmed to mask off the RC pin from the 8042 while in Sleep Suspend and Off modes to prevent the CPU from being reset due to SysCLK not being driven out of the ElanSC310 If the Low Speed PLL is to be disabled in Doze mode then PMC4 should be driven for this mode as well When the system goes back to High Speed PLL mode the 8042 needs to be reset by pulsing PMCO high for 1 millisecond Commands should also be
105. data are compared to the buffer Miscompares cause the offending byte location to Flash and the result of an Exclusive OR between the buffer snapshot and the current device datais displayed This allows bit errors to be picked out easily Upon leaving Continuous Read Compare mode the blink attribute is removed from the characters for easier reading of the resulting data The bytes which have the bit miscompares are left highlighted in white versus light gray for the normal data Any new command which causes the data to be read from the device again removes the highlight attribute from the displayed data completely If the highlight attribute needs to be removed without losing the bit error data which may have been captured the r command may be used see below lanSC310 Microcontroller Evaluation Board User s Manual 3 15 3 16 d The d key selects which device the current MMS page points to Pressing the d key causes the system to prompt for the new device Enter a 0 1 or 3 0 DOS ROM 1 system RAM 3 BIOS ROM and press enter Invalid input is not accepted Once a new device has been entered the main data display returns showing the data read from the selected device at the current offset For example if you are looking at the DOS ROM at offset 4000h and you use the d command to select the BIOS ROM the data displayed is from offset 4000h of the BIOS ROM f The f command allows a range of memory to be filled with a user
106. debug of certain problems MMSVIEW uses MMSA only To retain compatibility with systems using VGA video MMSB was left outside the scope of this tool It was designed on tested on and meant for use on the lanSC310 microcontroller evaluation board revision 2 2 or later The fact that it may run on other customer platforms is purely coincidental NOTE No support of any kind is provided for porting this utility to any platform other than the lanSC310 microcontroller evaluation board revision 2 2 or later except by special agreement between AMD and the customer Operating Instructions Command Line Parameters MMSVIEW assumes that MMS page 4 resides at DO000h when MMS page 0 is set up to reside at CO000h is available for use This default may be overridden using a command line parameter as shown below Syntax MMSVIEW page where page is a number from 0 7 to indicate the initial MMS page to view the system resources through If an invalid command line parameter is detected not a number out of range etc the default MMS page 4 is used This option is provided to allow resolution of system address space conflicts that may occur when using this program while some other driver is loaded EMM3806 etc There are no other command line parameters available lanSC310 Microcontroller Evaluation Board User s Manual 3 13 3 14 Initial State After MMSVIEW has been invoked from the DOS command line data is displayed in a fa
107. e not using PMU states that turn off the Low Speed PLL i e Doze Sleep or Suspend modes then you do not need to change the settings for this pin Refer to 8042 Keyboard Controller on page 4 14 for a further explanation of when you need to do a software reset PMC1 This pin is not used on this board PMC2 This pin is used to select whether the internal lanSC310 microcontroller serial port 1 and the Super I O serial port 2 are enabled for RS232 serial data PMC2 1 or whether the IR Transmitter Receiver pair is used to send and receive serial data on serial port 1 and serial port 2 transmission is disabled PMC2 0 The lanSC310 Indexes 80h and 81h control the state of PMC2 PMC3 This pin is not used on this board PMCA This pin is used to mask the system reset pin from the 8042 keyboard controller that is fed to the Reset CPU pin RC of the lanSC310 microcontroller A value of 1 holds the CPU s RC input High and prevents the 8042 keyboard controller s reset output from reaching the CPU A value of 0 allows for normal operation The lanSC310 Index ACh bits 3 0 control this pin and are set to 0 on power up If you are not using PMU states Doze Sleep Suspend or Off then you do not need to change the settings for this pin lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT Programming BIOS Flash EPROM or Application Flash EPROM This section describes how to program a Flash or EPROM device
108. ect the use of a new MMS page 0 7 This can be useful in avoiding system conflicts The default page can be changed before entering the program using the command line capability to set this option as described on page 3 13 p The p command is essentially a g command that accepts its input in terms of 16K pages In other words you can randomly access data on specific 16 Kbyte boundaries using this command For example if you want to view the start of the first 16 Kbyte boundary of a device select the p command and input 0 when prompted to specify page 0 This can be done just as easily using the g command and supplying an address that s a multiple of 4000h r The r command resets the miscompare indicators as explained earlier in the section that explains the c command See the c command on page 3 15 for more detail S This key is only useful on boards with PCMCIA Restrictions on Use Although designed for the ElanSC310 microcontroller evaluation board this utility may work on other vendor s platforms However its functionality outside of the lanSC310 microcontroller evaluation board cannot be guaranteed and therefore is not supported There are two key elements for compatibility 1 MMSVIEW assumes that MMSA is programmed to begin page 0 at CO000h The starting location of MMSA is not reset by the utility in an attempt to maintain software compatibility with customer platforms as this would probably cause the customer s platfor
109. ed RESET button SW2 You should see the BIOS boot message on the monitor When booting after being powered off the CMOS ROM is not configured and you need to use the BIOS setup utility to configure the system Follow the instructions shown on the screen to enter the Setup utility Once you are in the Setup utility you can set the system s processor speed date time and other options see SystemSoft BIOS Set Up Screen Options on page 2 6 or PhoenixPICO BIOS Main Menu Setup Screen Options on page 2 11 1 12 Save and exit the setup utility NOTE The evaluation board does not have a battery backup You need to run the setup utility each time the system is powered off 13 The system should now boot from the DOS diskette just like a standard PC lanSC310 Microcontroller Evaluation Board User s Manual 1 5 Table 1 1 Installation Troubleshooting Problem The board s power LED does not light when the power supply is turned on Solution The black MicroPower Off button SW5 needs to be pressed after power up The board s power LED does not lighteven afterthe MicroPower Off button SWS is pressed Check power supply connections at P25 and P26 The red power LED is on but I see nothing on the VGA monitor and do not hear any beeps from the speaker nor hear the head synchronization on the disk drive Ensure processor reset by pressing the red Reset button SW2 Ihearabeep on the speaker but see
110. ens to an ASCII text file called REGDUMP LOG q Exits from REGDUMP EXE The register value display is read from the registers each time the screen is toggled Since the display is not updated with each write it is possible that a register could appear to be written to but if itis a read only register it remains unchanged Please refer to the lanSC310 Microcontroller Programmer s Reference Manual to determine if the register being manipulated has any read write restrictions NOTE This regdump utility is used for both the lanSC300 and lanSC310 microcontrollers However some registers or some bits within registers are used only on the lanSC300 These registers or bits are marked with an ElanSC300 only indicator on the regdump screens lanSC310 Microcontroller Evaluation Board User s Manual 3 19 3 20 lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT Chapter 4 Developing Code This document is meant to aid the programmer who is developing BIOS code Power Management code etc using the lanSC310 microcontroller evaluation board This evaluation board was designed to support a number of different system configurations e g Full ISA Bus mode Application ROM support IDE drives Floppy drive etc This document explains how to configure the lanSC310 microcontroller on the evaluation board in order to support these configurations See the following sections for more information Programmable
111. ent local bus implementations require different signal connections the local bus signal VLRDYT can be connected to either VGARDY from the local bus device or to VLRDYO from the lanSC310 using switches 2 and 3 on SW3 switches 1 and 4 are no connects Note that VERDYI corresponds to LRDY on the lanSC310 microcontroller and VLRDYO corresponds to CPURDY NOTE Due toloading High Speed operation is not possible without depopulating several components Memory The lanSC310 microcontroller evaluation board supports up to 16 Mbyte of memory in two different formats 72 pin 16 bit SIMM or 30 pin 8 bit SIMMs Only one of these options can be used at a time That is if the 30 pin DRAM sockets are used the 72 pin DRAM socket must be empty If the 72 pin DRAM socket is used the 30 pin DRAM sockets must be empty 2 18 lanSC310 Microcontroller Evaluation Board User s Manual 1 0 DRAM Main Memory The ElanSC310 microcontroller evaluation board comes standard with 2 Mbyte of standard 30 pin 70 ns DRAM SIMMs installed on the board The evaluation board requires DRAMs with access times of 70 ns or less for 33 MHz operation The DRAM memory can be upgraded using 30 pin SIMMs with 4 or 8 bit DRAMs SIMMs with 1 bit DRAMs cannot be used on the evaluation board due to loading restrictions associated with 32 loads 16 Mbyte of main DRAM memory can also be installed using a 72 pin 16 bit SIMM module This can be installed in the
112. erferes with cycles going to the application or BIOS sockets For example a VGA card with on board BIOS responds to the address range from A0000h through C7FFFh An access to the application ROM socket through the MMS page to an offset in this range causes both the VGA card and the application ROM to respond The only way to avoid this is by either not accessing this range or reworking the evaluation board lanSC310 Microcontroller Evaluation Board User s Manual 4 5 4 6 Address Mapping of the Flash EPROM Sockets The BIOS sockets have an 8 bit interface Only one socket U20 or U59 can be enabled depending on the setting of jumper JP32 Address lines AO A17 256K addressing are connected to the socket The BIOS ROM can be accessed for programming by either using an MMS page or setting up a linear decode region see the lanSC310 Microcontroller Programmer s Reference Manual Typically an MMS page is used The application sockets have a 16 bit interface If BIOS does not already enable the 16 bit interface this needs to be done after boot up by setting to a 1 bit 1 of the ElanSC310 Index 51h Even addresses access sockets U16 and U18 Odd addresses access sockets U17 and U19 Support for both 256Kx8 Flash or EPROM and 512Kx8 EPROM parts exists Jumper JP13 controls which is selected NOTE 512Kx8 Flash can be supported after a minor board rework Contact your local AMD or distributor Field Application Engineer for more information
113. fresh cycles then the spinning activity cursor spins e Pressing any key or toggling the ACIN pin brings the system back to High Speed PLL mode C Force PMU to Sleep Mode The keyboard is disabled in this mode Pressing the Suspend Resume key or toggling the ACIN pin returns the system to High Speed PLL mode lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT D Force PMU to Suspend Mode The keyboard is disabled in this mode Pressing the Suspend Resume key or toggling the ACIN pin returns the system to High Speed PLL mode C Test Battery Level amp ACIN Pins This menu item shows how the battery level and ACIN pins are tied to the PMU Pin BLT can be used to force the CPU to run at 9 2 Mhz Pin BL2 can be used to transition the PMU into Sleep mode Pin BL4 can be used to transition the PMU into Suspend mode Each of the above transitions can be enabled or disabled by selecting item A Change BL Transition Masks highlighting the appropriate field and using the and keys to enable or disable the transitions There is also an option to enable disable a transition message If enabled a Transition message is displayed as the lanSC310 microcontroller transitions from Low Speed to Doze mode prompting the user to press a key before the system transitions to Sleep or Suspend mode The box on the top right of the screen displays the current state of the BL and ACIN pins Status for the BLA pin is not d
114. gement in 2 24 restrictions 2 5 toggling between it and Suspend 2 25 High Speed PLL Mode 3 6 I O interfaces integrated 2 20 2 21 map 4 10 4 11 overview 2 20 ports accessing from command line 3 4 IDE hard drive connecting 1 7 1 8 connection location 2 21 interface 4 15 Index 48h 4 15 lanSC310 Microcontroller Evaluation Board User s Manual Index 51h 4 6 Index 62H 4 5 Index 62h 4 5 Index 65h 4 8 4 9 Index 69h 4 8 Index 6Dh 4 8 Index 70h 4 2 Index 74h 4 3 Index 77h 4 15 Index 80h 4 4 Index 81h 4 4 Index 89h 4 2 4 10 Index 91h 4 2 4 3 Index 92h 4 15 Index 94h 4 3 Index 9Ch 4 3 Index ACh 4 4 Index B8h 4 9 index registers accessing from command line 3 4 initialization example 3 2 installing board 1 4 1 5 requirements 1 3 troubleshooting 1 6 1 7 IRQ mapping 4 11 IRQI 2 25 IRQ12 2 20 IRQA 2 21 ISA bus mode overview 2 17 restrictions 2 4 J JP10 A 4 JP11 A 4 JP12 2 22 A 2 JP13 2 22 A 2 JP16 A 2 Index 3 Index 4 JP16 JP18 2 17 JP17 2 20 A 2 JP18 2 20 A 2 A 3 JP19 2 23 A 4 JP1 JP11 2 23 JP1 JP7 A 4 JP32 2 5 2 22 A 2 jumpers configuration A 2 power measurement A 4 settings A 1 L layout of board 2 2 local bus card using 2 18 Local Bus mode 2 18 Low Speed mode changing from in SystemSoft 2 8 power management in 2 24 Low Speed PLL mode forcing 3 8 setting in elanpmu 3 7 LRDY 2 18
115. gramming voltage to the ROM sockets PGPO must be set up to gate with the I O Write Command This is done by setting the lanSC310 Index 91h to xxxxxx 10b Index 89h is used to set up the I O address for PGPO Setting Index 89h to a 20h programs PGPO to respond to writes to I O addresses 100h 107h PGPO must also be enabled as an output This is done by writing bit 6 of the lanSC310 Index 70h to a 1 By programming this pin as just described the lanSC310 microcontroller is now able to write to the 1 bit register at I O port 100h When set up as described the write only register at I O address 100 is as shown in the table below NOTE This pin is referenced as PGPA on the evaluation board schematics beginning in Schematics on page D 1 Table 4 1 1 0 Address 100 107 Description Reserved 1 Vpp line to ROM sockets set to 12 V 0 Vpp line to ROM sockets set to 5 V Not used Not used lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT PGP1 This pin is used as an address decode for the IDE CSG It should be programmed as an address decode for I O addresses IFOH 1F7H Setting the lanSC310 microcontroller s Index 91h to xxxx11xxb programs PGPI as an address decode Setting lanSC310 Index 9Ch to 3Eh sets the address range to IFOh 1F7h PGP1 must also be enabled as an output for the evaluation board This is done by setting Bit 2 of the lanSC310 Index 74h NOTE This pin is referenced
116. h in the way of software development or chip register learning time Description MMSVIEW is a DOS application that may be used to inspect various resources that are accessible by the lanSC310 MMS subsystem These resources include SYSTEM RAM the BIOS ROM or resources accessed by the ROMCS signal or the DOS ROM or resources accessed by the DOSCS signal With this utility the following operations may be performed Directly display any region ofthe system RAM 0 16 Mbyterange BIOS ROM 0 16 Mbyte range and DOS ROM 0 16 Mbyte range Step forward or backward through the data in 256 byte steps or 16 Kbyte steps e Select any lanSC310 MMS page from MMSA to view system resources through Fill areas of system RAM memory with a selected byte Append the currently displayed page of data to a log file in either ASCII or binary formats View DOS ROM using an 8 or 16 bit interface Perform continuous read compare operations from a selected resource and indicate miscompares on the display 3 12 lanSC310 Microcontroller Evaluation Board User s Manual 1 0 Scope MMSVIEW is provided to enable discovery and understanding of the capabilities of the ElanSC310 microcontroller MMS system It has other uses such as looking at DOS ROM disks to ensure that the odd even parts are placed in the sockets correctly It is not designed to be a comprehensive or automated diagnostic program although its use may help in the
117. ing of C If the directory listing of C works you can try removing the diskette from A and booting from C Ctrl Alt Delete Note that not all BIOS have the same mapping of logical to physical sectors on a hard drive so if your hard drive was written by the BIOS on some other computer it may not be readable by the BIOS on the lanSC310 microcontroller evaluation board If you are unable to boot from C you should reformat the hard drive for use on the lanSC310 microcontroller evaluation board see your DOS documentation for how to reformat your hard drive lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT For More Information If you need more information about How to setup and use the serial ports or parallel port including a serial mouse see Serial Ports on page 2 21 How to setup and use the parallel port see Parallel Port on page 2 21 How to add a PS 2 mouse see PS 2 Mouse on page 2 20 How to change the processor speed see SystemSoft BIOS on page 2 6 or PhoenixPICO BIOS on page 2 10 How to change the amount of DRAM see DRAM Main Memory on page 2 19 How to use a local bus card see Local Bus Mode on page 2 18 How to enable Power Management functions see SystemSoft BIOS on page 2 6 or PhoenixPICO BIOS on page 2 10 lanSC310 Microcontroller Evaluation Board User s Manual 1 9 1 10 lanSC310 Microcontroller Evaluation Board User s Manual 1 0
118. irectly readable by the ElanSC310 On the lanSC310 microcontroller evaluation board the state of the BL pins and ACIN pins are controlled by the Red 8 bank DIP switch SW4 Switches 4 7 BL1 BL4 Switch 8 ACIN ACIN must be set to 0 in order for any of the BL pins to cause a PMU state change Once a BL pin is used to cause a PMU state change setting ACIN to 1 active wakes up the system and returns the PMU to High Speed PLL mode X Restore PMU State and Exit to DOS This option restores the lanSC310 microcontroller s index registers to the value they were set to when the program was entered and returns the user to the DOS prompt Leave Current PMU Values and Exit to DOS This option leaves the lanSC310 microcontroller s index registers set at their current value and returns the user to the DOS prompt lanSC310 Microcontroller Evaluation Board User s Manual 3 9 EvalSet Serial and Parallel Port Setup Utility EVALSET EXE has been provided to allow easy activation of the serial and parallel ports on the lanSC310 microcontroller evaluation board The BIOS on this board was designed to be generic therefore these functions are not enabled by the BIOS on the evaluation board This utility can be used to set up the base addresses for serial port 1 serial port 2 and parallel port 1 on the evaluation board Serial Port 1 Serial Port 1 is the 16C450 UART internal to the lanSC310 microcontroller Its base address can be set to
119. l port base address is controlled through the Bus Configuration Registers see the lanSC310 Microcontroller Programmer s Reference Manual These bus configuration registers can only be programmed before ISA or Local Bus accesses are made so setting the parallel port base address or disabling the parallel port can only be done at boot time Thus the EvalSet utility merely allows control of the EPP and bidirectional modes on the parallel port Any base address that is specified is ignored by the EvalSet utility Examples evalset parl 0x3b8 epp on bi on Turns on EPP and Bidirectional modes evalset parl 0x3b8 epp off bi off Turns off EPP and Bidirectional modes EVALSET EXE can be called from the DOS prompt autoexec bat file or config sys file with the proper parameters config sys Example install evalset exe serl 0x3f8 4 install evalset exe ser2 0x2f8 3 install evalset exe parl 0x3b8 epp_off bi_on ElanSC310 Microcontroller Evaluation Board User s Manual 3 11 Memory Management System MMS Viewer Utility This utility is part of the collateral for the ElanSC310 microcontroller The lanSC310 microcontroller is a highly integrated device with many subsystems Many of these subsystems are unique to the lanSC310 The purpose of the MMSVIEW utility is to provide the new lanSC310 microcontroller user with the ability to explore the capabilities of the lanSC310 MMS subsystem without having to invest muc
120. lated ElanSC310 with the parallel port always install R237 and Depop R236 ElanSC310 without the parallel port C Advanced Micro Devices I 5204 E Ben White Blvd Austin Texas 78741 800 222 9323 AMD Proprietary All Rights Re nc served Title 33 MHz RPAK option MCS16 decode BAUDOUT opt Size Document Number REV B ElanSC300 310 Evaluation Board uie Date March 29 1996 Sheet 2 of 23 MWE T RASO RAST CASOL CASOH CAS1L CASTH VCCDRAM VCCDRAM VCCDRAM VCCDRAM BS P7 P8 VCC i L VCC YOC 2 VCC 30 o VCC 30 VCC 30 RAS 27 RASO 7 RASO RAS 27 RAS1 RAS 27 RAS1 vei 2 CASOLE 2 CASOH Seed ei 2 CASTL RE 2 CASTH CAS 38 28 CAS Pas gt CAS 28 CASS 21 MWE 1 MWEK CAS 21 Mwe CAS2 21 wees BO 4 MAO 4 MAO AO 4 MAO AO 4 MAO RASI Al 5 MAT 5 MAI Al Li MAT Al 5 MAT RAS1 34 RAS2 al MA2
121. m to crash Use this utility on a customer platform only if customer platform initialization programs MMSA page 0 to start at CO000h lanSC310 Microcontroller Evaluation Board User s Manual 3 17 3 18 2 The second element of compatibility is the use of the MMS windows on the customer platform MMSVIEW assumes that MMS page 4 resides at DO000h when MMS page 0 is set up to reside at CO000h is available for use This may conflict with drivers loaded on the evaluation board platform that require the use of MMS ROMDOS EMM3386 etc It may also conflict with customer resources located on customer platforms See Operating Instructions on page 3 13 for details on how to change MMS windows It is recommended that the test platform evaluation system be cold booted using reset button after MMSVIEW exits so that the lanSC310 microcontroller setup registers are restored to the proper values before doing further work on the platform This is required not only on customer platforms but on any lanSC310 microcontroller evaluation board that has any ROMDOS EMM386 or other drivers installed that require use of the MMS or memory regions that are controlled by the MMS Again MMSVIEW makes no attempt to restore the system to its initial state reset the system when finished Use caution when selecting the MMS page to use Selecting a page that causes conflicts with other system resources can lock the system For example using a VGA card
122. nSC310 internal parallel port Super I O floppy drive controller Available for ISA bus Internal serial port COMI Connected to Super I O for COM2 Connects to IRQ3 pin on Super I O Used to cascade to Slave PIC 8259 Keyboard buffer full driven by 8042 Timer 0 output internal to ElanSC310 Typically used for DOS Clock NOTE 1 IRQ lines 3 4 5 6 7 9 10 11 12 14 and 15 are available on the ISA bus Care must be taken so that cards on the ISA bus do not use interrupts that conflict with internal lanSC310 devices or each other 4 12 lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT Evaluation Board s DMA Mapping The following table is the DMA mapping for the lanSC310 microcontroller evaluation board Table 4 5 Typical Full ISA DMA Mapping Device Assigned Special Notes ISA bus 16 bit I O accesses ISA bus 16 bit I O accesses ISA bus 16 bit I O accesses Reserved Used to cascade DMA channels 0 3 ISA bus 8 bit I O accesses Super I O floppy drive controller 8 bit I O accesses ISA bus Also used for memory to memory transfers with DMA channel 0 ISA bus Also used for memory to memory transfers with DMA channel 1 ElanSC310 Microcontroller Evaluation Board User s Manual 4 13 Evaluation Board s Components 4 14 8042 Keyboard Controller The evaluation board uses a non static 8042 keyboar
123. ne from the IDE connector is connected to IRQ14 on the lanSC310 microcontroller PGP1 is used for the IDE chip select 1 I O address 1f0 1F7h PGP2 is used for IDE chip select 2 I O address 3f6 3f7 See Connecting an IDE Hard Drive on page 1 7 for the steps to connect the drive Enabling the ElanSC310 Internal Serial Port The ElanSC310 microcontroller internal serial port is typically configured as COMI The following ElanSC310 index registers need to be set for this configuration Elan Index 77h 2 90h Enable internal UART to base address 3F8 and IRQ 4 COMI s Elan Index 92h 2 01h Enable clock to UART e Elan Index 48h 02h Set for 16C450 compatibility Set pin PMC2 active for all PMU modes refer to Power Management Control PMC Pins on page 4 3 The UART s I O registers 3F8h 3FFh can now be accessed to perform serial transfers lanSC310 Microcontroller Evaluation Board User s Manual 4 15 4 16 lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT Appendix u Evaluation Board Setup Summary This appendix summarizes the jumper and switch settings of the lanSC310 microcontroller evaluation board For the location of these parts on the board see Figure 2 1 on page 2 2 lanSC310 Microcontroller Evaluation Board User s Manual A 1 Table A 1 Bus Mode Selection and Affected Jumpers Table A 2 Configuration Jumpers 512Kx8 Flash can only be supported after a min
124. ne on the board and connect them after decoupling lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT Appendix D Schematics The schematics beginning on page D 2 are the actual Orcad schematics used to build the lanSC310 microcontroller evaluation board These schematics are useful for understanding and modifying the evaluation board Since the evaluation board incorporates many different possible configurations for the lanSC310 microcontroller these schematics are not a good place to start for actual lanSC310 microcontroller based designs lanSC310 Microcontroller Evaluation Board User s Manual D 1 VCCELI
125. nnot Contact the AMD Technical Support resolve Hotline at 1 800 222 9323 Connecting an IDE Hard Drive This section describes how to connect an IDE hard drive to the lanSC310 microcontroller evaluation board You need to provide the following additional items An IDE compatible hard drive of size not more than 512 Mbyte See the appendix Verified Peripherals on page B 1 for a list of hard drives that are known to work Note that Connor and Fujitsu hard drives do not work with the lanSC310 microcontroller evaluation board A standard 40 wire AT IDE cable Assuming you have successfully booted to DOS from a disk drive as described in Booting DOS From a Diskette on page 1 2 do the following 1 Disconnect power by unplugging the PC power supply from the AC outlet WARNING If the PC power supply is on but the board has been put in a standby mode using the MicroPower Off button there is still some power onthe board Completely unplug the power supply before continuing 2 Inspect the 40 wire IDE cable that you are providing The red wire along one edge of the ribbon cable indicates wire 1 Connect one end of the 40 wire IDE cable to the hard drive just as you would for a standard PC installation The hard drive documentation should indicate where to put wire 1 Connect the other end of the 40 wire IDE cable to the 40 pin connector P28 on the lanSC310 microcontroller evaluation board with wire 1 toward the ROM socket
126. ns MMSVIEW EXE which is a DOS application that may be used to inspect various resources that are accessible by the lanSC310 microcontroller MMS subsystem These resources include SYSTEM RAM the BIOS ROM or resources accessed by the ROMCS signal or the DOS ROM or resources accessed by the DOSCS signal For complete operating instructions on MMSVIEW EXE refer to Memory Management System MMS Viewer Utility on page 3 12 REGDUMP EXE This register dump utility has been provided for use on the lanSC310 microcontroller evaluation board It is intended to provide a user with an easy to use register manipulation program This program displays the index register in the lanSC310 microcontroller grouped by functionality For complete operating instructions on REGDUMP EXE refer to Register Dump Utility on page 3 19 SDB ZIP This zipfile contains SDB EXE a simple debug utility useful when working with the lanSC310 microcontroller It allows the user to easily access the lanSC310 microcontroller s index registers and I O ports from the command line This way the user can place several SDB command lines in a batch file and just execute the batch file Source code is provided Refer to the README and TXT files in this zipfile for more information Elan PMU Evaluation Utility 3 4 The Elan PMU Evaluation Utility is a DOS utility designed to demonstrate the power management capabilities of the lanSC310 microcontroller Thi
127. o follow pin designations Pin 1 on the resistor packs must correspond to pin 1 on the evaluation board JP16 JP18 must be set based on what bus mode is selected see Table 2 7 lanSC310 Microcontroller Evaluation Board User s Manual 1 0 Table 2 7 Bus Mode Selection and Affected Jumpers ISA Mode Provided on the lanSC310 microcontroller evaluation board are two physical 16 bit ISA bus connectors These slots are available for use when the board is configured for ISA mode The lanSC310 microcontroller ISA bus is a subset of a full ISA bus Some signals are not available therefore some ISA cards may not function properly on the evaluation board referto the ElanSC310 Microcontroller Data Sheet for a detailed description of the ISA bus The ISA bus is wait state programmable refer to the lan C310 Microcontroller Programmer s Reference Manual for details on programming ISA bus timings lanSC310 Microcontroller Evaluation Board User s Manual 2 17 Local Bus Mode The ElanSC310 microcontroller evaluation board provides a proprietary local bus connector for testing of local bus designs Since this connector is not standard a custom interface is required to test the local bus functionality of the lanSC310 microcontroller on the evaluation board In Local Bus mode some of the ISA bus signals are lost Refer to the ElanSC310 Microcontroller Data Sheet for more details on what signals are available in this mode Since differ
128. oard User s Manual enabling in PhoenixPICO 2 14 enabling in SystemSoft 2 8 features x layout suggestions C 2 lowest mode 2 26 power consumption affecting 3 4 simulation 2 25 using 2 24 2 25 Power Management Control pins See PMC pins power measurement jumpers A 4 using 2 23 2 24 processor speed setting in PhoenixPICO 2 13 setting in SystemSoft 2 7 Progammable General Purpose pins See PGP pins PS 2 mouse adding 2 20 R RAM system displaying region 3 12 read compares continuous performing 3 12 regdump exe 3 4 3 19 Register Dump utility See regdump exe registers manipulating 3 19 Reset pin 4 4 ROM sockets 2 22 See also BIOS ROM DOS ROM and Application ROM RPI RP2 RP3 RP4 2 17 RSTDRV pin 4 4 RTC RAM restrictions 2 5 Index 5 Index 6 S sdb exe 3 4 sdb zip 3 4 serial ports internal enabling 4 15 serial port 1 3 10 serial port 2 3 10 setting addresses 3 10 3 11 setting up 2 21 setup screen setting in PhoenixPICO 2 15 setting password in SystemSoft 2 8 setting to defaults in SystemSoft 2 9 SIMM restrictions 2 4 Sleep mode forcing 3 8 power management in 2 24 setting in elanpmu 3 7 Super I O setting port in SystemSoft 2 7 using 4 14 Suspend mode forcing 3 9 power management in 2 24 setting in elanpmu 3 7 toggling between it and High Speed 2 25 Suspend Resume button 2 25 SW3 1 2 18 SW3 1 SW3 4 A 3 SW3 2 2 18 SW3 3 2 18 SW3 4 2
129. or Power Management EXIT Exits the current menu The PhoenixPICO BIOS setup screen options for each menu are shown in the tables on the following pages Option defaults are indicated in bold lanSC310 Microcontroller Evaluation Board User s Manual OT Table 2 3 PhoenixPICO BIOS Main Menu Setup Screen Options System Time Description Hour Minute and Second Parameters User enters System Date Month Date and Year User enters Diskette A Diskette B Selects the type of floppy disk drive s installedin yoursystem Not Installed for B 2 88MB 3 5 1 44MB 3 5 for A 720KB 5 25 1 2MB 5 25 360K B 5 25 IDE Adapter Master IDE Adapter Slave IDE adapters control the hard disk drive s The IDE adapter supports one master drive and one optional slave drive A separate sub menu is used to configure each hard drive Not Installed Types 1 49 Video System Selects video type EGA VGA CGA 80x25 Monochrome lanSC310 Microcontroller Evaluation Board User s Manual 2 11 Shadow Options Video Shadow Memory Shadow Description Shadows Video BIOS ROM Shadows memory in the region specified Parameters Enabled Disabled Enabled Disabled If enabled options are C800 CBFF CC00 CFFF D000 D3FF D400 D7FF D800 DBFF DC00 DFFF E000 E3FF E400 E7FF E800 EBFF ECO0 EFFF Boot Sequence Order in which the system searches drives
130. or board rework Contact your local AMD or distributor Field Application Engineer for more information 2 Cannot be set in Full ISA or Local Bus mode A 2 lanSC310 Microcontroller Evaluation Board User s Manual Table A 3 JP18 Table A 4 Switches lanSC310 Microcontroller Evaluation Board User s Manual A 3 A 4 Table A 5 Power Measurement Jumpers NOTE Be sure to turn off system power before removing JP1 JP11 Replace JP1 11 before power up or the system will not work lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT Appendix B e Verified Peripherals This a list of peripherals that have been verified to work on the lanSC310 microcontroller evaluation board Manufacturer Model ff Mitsumi D359T3 TEAC FD 235HF Quantum ProDrive LPS series Western Digital Caviar series DTK Computer Inc PIP 151 TransWorld TW 1800R Jabert WE D250 Keytronic KT2000 series Mitsumi KPQ E99YC VGA Monitor CTX 6439 NEC MultiSync 5FGE Video Card AVED AV540 Trident TVGA 9000I Note that Connor and Fujitsu hard drives do not work with this board lanSC310 Microcontroller Evaluation Board User s Manual B 1 B 2 lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT Appendix C Board Layout Suggestions The following suggestions concern the lanSC310 microcontroller evaluation board layout strategy for the 32 kHz oscillator
131. or if HEADER 3 Alle Q DRAM is not required to be powered up in uPower OFF mode 5 E i AG NT L9 s i3 GND FMC2A GND SIS956DY 1 2uH OPIZVOLT FOTO s OP SVOET c248 Q16 1 A 278173 2 s B3uF TANT 6 QI 17 OPSVOLT S VIE GND c135 R166 D 0 1UF Dim D JB G SW MEM35 5 EH 1 HA s i3 FMCZA GND EE SI9956DY Q11 VCC5 Q22 dens 19 Q8 P12VOLT 3 a ZR 2 5 gis mU 1 PSVOLT vA 4 TK ki KI P12VOLT 3 2 s vccs vccs 4 Ye Se EL ORIGIN OF a C137 R164 D ORIGIN OF MIE VCCS PLANE 4 o Los 1M p 15 VCCICRDS PLANE PSVOLT 4 c133 R168 D vecs 4 6 0 1UE o_ 5 PMC1 gt ENS JR h d VCC1CRDS5 1m i 5 7 s 3 5 1 T L10 NBCD1 gt FMC2A GND V SIS U42B ElanSC300 only SI9956DY ElanSC300 only GND FMCZA GND 74HCTO8 V5 519956DY 1 2uH Qi2 VCC5 921 19 O14 P12VOLT 3 ES ERU 25 s Q15 iy Hen M 4 7K slbi 7 P12VOLT 3 B 2 5 33uF TANT vccs vccs S Yie SL n 4 c138 R162 D ORIGIN OF Yi GND 4 0 1UF 1M o IS VCC2CRD5 PLANE PSVOLT 4 C136 R165 D 1 L Z 0 1UE Sim nl Puc gt 2 s EN h ag Kas VCC2CRDS puli NEC 9 2 sL13 dk i als Ka Power Switching FMC2A GND ERST ME V 5 3 U42A ElanSC300 only SI9956DY ElanSC300 only GND FMCZA GND 74HCTO8 V5 ORIGIN OF SI9956DY Qi3 voes VCCSYS5 PLANE DV RH 2 R177 2 m Keng C Advanced Micro Devices Inc 4 ISS 17 5204 E B White Blvd VCCSY253 VCCSY253 2 9 Ye L11 ROHM EE iE 4 c139 R163 D FMC2A m 4 0 1UET Dim p 5 800 222 9323 m lt 4 L 6 1 2uH 5 1 AMD Proprietary All Rights Reserve EN
132. p is done as the program exits so it is recommended that the user COLD BOOT before performing any other important operations especially if ROMDOS or EMM366 drivers were loaded on the system when MMSVIEW was invoked lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT Page Up The Page Up key displays data on the previous 16 Kbyte boundary For example if the current device data starting at offset 4100h is being displayed and Page Up is pressed the data from device offset 0100h is displayed Page Down The Page Down key does the inverse of the Page Up key it displays data from the next 16 Kbyte boundary Space Bar The Space Bar or any key besides the other command keys listed in this section simply rereads the data from the selected resource and refreshes the main data display screen The main data screen does not constantly update normally Press the Space Bar or any other non command key as specified in this list to refresh the screen with the new data For a continuous read mode see the c command below a This key is only useful on boards with PCMCIA C The c key is useful for detecting changes in reading the data from a given resource An example application for this feature is in the detection of timing problems incorrect wait state setup etc When you press the c key a snapshot of the current device data is taken and stored into a local buffer After this continuous reads of the current device
133. rom the monitor to the D connector at the end of the VGA display adapter just as you would for a standard PC 5 Connect the keyboard to the keyboard connector at P10 6 Connect the connectors marked P8 and P9 from the standard PC power supply into the board s power connectors at P25 and P26 P8 connects to P25 the six pins closest to the corner of the board P9 to the other six pins See Figure 2 1 on page 2 2 for the connector locations Make sure the black ground wires from P8 and P9 meet in the middle of the board s P25 and P26 connectors DANGER Failure to verify and check the power supply connections may result in total destruction of the ElanSC310 microcontroller evaluation board lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT 7 Find one of the 4 wire power connectors from the PC power supply and attach it to the 4 pin connector on the disk drive just as you would for a standard PC installation The disk drive documentation should indicate the proper orientation of the power cable 8 Insert the bootable DOS diskette not included in the disk drive 9 Plug the VGA monitor into an electrical outlet 10 Apply power to the lanSC310 microcontroller evaluation board by connecting the PC power supply to an electrical outlet If equipped turn on the power supply switch The power supply fan should be operating Press the black MicroPower Off button SW5 The red LED should now be lit Press the r
134. roprietary All Rights Reserved DSMD5 S65 1022 SHORT VLM IO Title DSMD6 S66 12 52 SHORT VLD C NOTE DSMD7 S67 wee SHORT VLADS BS in VLBRDYI to us the VL Bus VBGBHSVR Docal BUs YCA Connectors Switch in VGARDY to use the VGA Connector Size Document Number REV Switch in VLRDYO if the VGA card needs it B et SE and rr ee owes Sei Date March 29 1996 Sheet 17 of 23 P25 R147 1 RESING gt 2L 3 F oz2vorr 330 OPIZVOLT 4 MIZVOLT gt 2 ci20 cii9 C125 JP36 SL ci24 HEADER 2 PC POWER CONN GND O 1UF 1Our 160 1UF 1OUF 16V 75 Burndy GTC6R 1 FS P26 GND GND GND GND i JP37 i HEADER 2 ne HSVOLT gt S L OP5VOLT 6
135. s lanSC310 Microcontroller Evaluation Board User s Manual 1 7 1 8 Find one of the 4 wire power connectors from the PC power supply and attach it to the 4 pin connector on the hard drive just as you would for a standard PC installation The hard drive documentation should indicate the proper orientation of the power cable Apply powerto the lanSC310 microcontroller evaluation board by connecting the PC power supply to an electrical outlet Then press the black MicroPower Off button SW5 The red LED should now be lit Press the red Reset button SW2 You should see the BIOS boot message on the monitor When booting after a power up the CMOS ROM is not configured and you need to use the BIOS setup utility Follow the instructions shown on the monitor to enter the Setup utility Inthe BIOS setup utility you need to configure Drive C for the proper number of heads cylinders and sectors Some BIOS products have an AutoDetect feature that automatically detects this information some require you enter this information manually You should be able to get these numbers from your hard drive documentation Follow the prompts to save this configuration and exit the BIOS setup utility Whether or not your hard drive contains an already installed bootable disk image written from some other PC you should still keep your bootable diskette in the A drive and boot from that After you boot properly from A try to do a directory list
136. s the user to see what control the user has for external control of the PMC pins for each PMU mode Note that the PMC pin setting for the Low and High Speed PLL modes mirror each other Changing the value in one column causes the value in the other column to change also High Speed PLL Mode Column The CPU speed can be set to 33 Mhz 25 Mhz 20 Mhz or 9 2 Mhz Both the High Speed and Low Speed PLLs for this mode are enabled The state of the PMC pins for this mode mirror the settings in Low Speed PLL mode Changing the state in this mode also changes the state for Low Speed PLL mode Auto Low Speed mode when enabled switches the CPU clock speed to operate at 9 2 Mhz for the duration of time listed in ALS Duration matrix item 0 25 0 50 1 0 2 0 seconds This switch is triggered at a rate determined by the ALS Trigger matrix item which can be set to 4 8 16 or 32 seconds The ALS trigger period and ALS Duration time are stored in write only registers Therefore it is not possible to read the current lanSC310 programed value when this utility is started The default values of 4 seconds for the ALS Trigger and 0 25 seconds for the ALS Duration are programmed at start up time e The CPU Idle Speed can be set to HIGH or LOW HIGH means that during idle cycles the CPU runs at the current High Speed CPU speed 33 25 20 or 9 2 Mhz LOW means 9 2 Mhz The CPU Idle Speed can only be set LOW if the High Speed CPU is set to 2
137. s up to 1FFFFFh depending on the size and number of parts installed Application ROM is accessed through the MMS windows Itis also possible to access linear decoded application ROM This requires setting up ElanSC310 Index B8h However the processor must be set up to access memory above the 1 Mbyte boundary BIOS ROM Mapping BIOS ROM mapping is similar to application ROM mapping BIOS ROM is selected by the BIOSCS chip select 128Kx8 and 256Kx8 Flash and EPROM devices are supported Accessto the BIOS ROM begins at offset Oh and extends up to 3FFFFh depending on the size of the device Typically the BIOS ROM is accessed through a linear decode set up for the address range E0000h through FFFFFh This is set up using lanSC310 Index register 65h It is also possible to access the BIOS ROM using pages in the MMS windows lanSC310 Microcontroller Evaluation Board User s Manual 4 9 Evaluation Board s I O Map Because the lanSC310 microcontroller and the evaluation board are so configurable there is not one single I O map that covers all cases Whatis illustrated here is atypical memory map for the evaluation board configured in Full ISA mode with the lanSC310 microcontroller internal serial port enabled as COMI the Super I O floppy drive controller enabled an IDE hard drive and the Super I O serial port enabled as COM2 Table 4 3 I O Address 3F8h 3FFh Typical Full ISA 1 0 Map Device Accessed lanSC310 internal 16C450
138. s utility only runs on Rev 2 2 or later of the ElanSC310 microcontroller evaluation board the revision number is silkscreened on the board next to the AMD logo and name By using a current meter attached to the lanSC310 microcontroller s various voltage plains the user can see how different PMU setups affect power consumption It is recommended that the user read through the lan C310 Microcontroller Programmer s Reference Manual to gain an understanding of the lanSC310 microcontroller s power management functions To bring up the main menu type the following at the DOS prompt elanpmu lanSC310 Microcontroller Evaluation Board User s Manual 1 0 The following main menu appears ELAN PMU Evaluation Utility Version 1 0 A Setup PMU Mode Characteristics PMCx Pins CPU Speed B Force PMU State Transitions C Test Battery Level amp ACIN Pins X Restore PMU State and Exit to DOS Z Leave current PMU values and Exit to DOS Enter Selection The spinning cursor is used to emulate typical CPU activity This activity gives a lower current reading for core ElanSC310 microcontroller current than if the processor was sitting idle waiting for keyboard input This is because cycles to the ISA devices which occur as a result of this activity are run at 9 2 Mhz CPU idle cycles occur at the High Speed PLL mode frequency 33 25 20 9 2 Mhz A Setup PMU Mode Characteristics PMCx Pins CPU Speed
139. selectable byte Pressing the f command brings up prompts for the start and stop fill addresses and requests the fill byte Fill operations are available only when RAM is the selected device This command does not know how to write to Flash devices ina DOS ROM socket g The g command allows you to go to any place in the memory map desired It is the random access equivalent to the plus and minus keys It provides one additional benefit in that the data byte which resides at the address specified by the user to go to is highlighted for easy recognition I The i key allows the DOS ROM interface to be toggled between the 8 and 16 bit interfaces supported on the lanSC310 microcontroller This is useful if running the utility on a hardware platform that has an 8 bit DOS ROM interface as opposed to the 16 bit DOS ROM interface on the lanSC310 Microcontroller Evaluation Board l The I command allows one screen s worth of data to be appended to a log Successive screens can be captured to the same file in this manner Pressing the I command prompts the user as to whether the output file should be a binary image of the data or whether a DOS debug like ASCII representation should be saved If the binary option is chosen data is logged to a file named MMSVIEW BIN If the ASCII option is selected the output fileis MMSVIEW ASC lanSC310 Microcontroller Evaluation Board User s Manual 1 0 OT n The n command allows the user to sel
140. shion similar to DOS debug MMSA page 4 at DO000h is selected and the device that is accessed is system RAM The first 256 bytes of the selected device are displayed starting at offset 0 1 e the start of the interrupt vector table at 0 0 in RAM Keystroke Commands Keystroke commands are invoked by simply pressing the keys noted below Whenever a keystroke command requires user input prompts request the required data If a command that requires user input is to be aborted without invoking the command press the Escape key and the main data display returns A command summary follows Pressing the question mark key from the main data display screen displays a quick help list of the keystroke commands available to the utility Press the Space Bar from the quick help screen to return to the normal main display screen The plus key moves forward through the data 256 bytes at a time The plus key thus makes it simple to view the next 100h bytes of data on the selected device The minus key performs the inverse operation of the plus key and causes the previous 256 bytes of device data to be displayed The program disallows negative addresses and gives a warning click from the speaker if you press the minus key when the first address displayed on the screen is 0 Home Key The Home key displays the data at offset 0 on the current device Escape The Escape key causes the utility to return control to the DOS prompt Note that no cleanu
141. the PLLs and the power supplies The goalis to minimize noise and noise coupling associated with the way the board is laid out Special care is needed to minimize board leakages which can be fatal to pins that are sensitive to leakage currents such as the two crystal oscillator pins XTAII and XTAL2 32 kHz Oscillator Prudent board layout for the 32 kHz oscillator suggests the following precautions Keep the two traces XTAL1 and XTAL2 as short as possible especially the input trace XTALI XTALI is extremely sensitive to leakage Total leakage from to XTALI to from all the pins on the board must be kept under 300 nA XTAL2 can tolerate a leakage as high as 900 nA Keep all noisy signals e g PLL outputs and other clocking signals as far away from XTAL1 and XTAL2 as possible Again XTALI is much more sensitive to noise coupling than XTAL2 Minimize parasitic capacitance between XTALI and XTAL2 even a few picofarads can potentially cause the oscillation frequency to be off target Do not use a feedback resistor larger than 20 MQ it may fail to start up if the leakage at XTALI is equivalent to 5MQ or less The feedback resistor value can be lowered to counter leakage at XTAL I but that increases start up time The lower bound for the feedback resistor should be about 10 MO The capacitors connected between XTALI XTAL2 and analog ground should be between 15 pF and 30 pF and they should be about equal in value Increasing the two
142. the needs of the next generation of embedded solutions From its high integration to PC AT compatibility to remarkable power management the ElanSC310 microcontroller is the ideal device to enable compact fully functional low power designs with a quick time to market The lanSC310 microcontroller evaluation board has been provided as a test and development platform for lanSC310 microcontroller based designs Most of the possible options and features of the lanSC310 microcontroller can be exercised on this board Since there are numerous options available this board is a much larger form factor than could be achieved with a dedicated set of features This evaluation board is provided as a reference only and should only be used to experiment with the design trade offs of the lanSC310 microcontroller make power measurements and develop operating and application software NOTE Advanced Micro Devices does not assume any responsibility for the maintenance of this evaluation tool Changes to the schematics will only be made if the board is required to go back through a CAD layout Refer to the ElanSC310 Microcontroller Data Sheet and the ElanSC310 Microcontroller Programmer s Reference Manual for detailed information on the lanSC310 microcontroller lanSC310 Microcontroller Evaluation Board User s Manual ix Features External Connectors Two serial port connections One internal ElanSC310 16C450 compatible port COMI or C
143. this mode TheLow Speed PLL and Video PLL controlled by the same bit can be enabled or disabled for this mode SUSpene amp Off Mode Column The CPU is always off in these modes The High Speed PLL is always off in these modes TheLow Speed PLL and Video PLL controlled by the same bit can be enabled or disabled for these modes lanSC310 Microcontroller Evaluation Board User s Manual 3 7 B Force PMU State Transitions 3 8 ELAN PMU Evaluation Utility Force PMU Modes Force PMU to Low Speed PLL Mode xxxMhz Force PMU to Doze Mode Force PMU to Sleep Mode Force PMU to Suspend Mode Dom PD X Return to Main Menu Enter Selection gt Below this menu the current PMU mode that the lanSC310 microcontroller is in is displayed along with any options set using option A from the main menu For modes where the CPU clock is running the spinning activity cursor helps show the speed of the CPU A Force PMU to Low Speed PLL Mode xxxMhz The CPU Clock slows to the speed shown If set up to do so the High Speed PLL is shut off Pressing any key or toggling the ACIN pin brings the system back to High Speed PLL mode B Force PMU to Doze Mode fthe CPU clock speed is off no spinning activity cursor is displayed Ifthe CPU clock is enabled for IRQO processing only then the spinning activity cursor transitions about once every 10 seconds fthe CPU clock is enabled for IRQ0 64 Re
144. tin Texas 78741 rai 2A1 2Y1 7 21MEMRf R255 R256 vccsvss 800 222 9323 vccsvss 15 255 YS ls IMEEM 100K 100K AMD Proprietary All Rights Reserved 17 3 Title 2A4 2Y4 ZIXIOW 5 su c63 C62 cet C60 C amp T F87000 PCMCIA Buffers XO MEE 38 Pro PMCS 0 1UF iuF 0 1uF 0 1UF size Document Number REV REV1 2 PINS 8 amp 9 OF U23 CHANGE FROM EL SC300 310 E 1 ti B i 2 2 74HCT244 SYS5 MCE1 amp MCE2 TO MCE124 amp MCE22 GND GND GND GND gu eT UE Mr TT y GND 20 SOIC ElanSC300 onl Date March 29 1996 Sheet 11 of 23 VCCS 11SD 0 151 1ISD O 15 N w VCCICRDS VCCICRDS R265 R79 9 10K 10K VCC5 y P14 y PCD1 gt ES SND SND Kos Sin Be TISDA 37 TISDIT 3 TISD5 DE Pilipas FEIER PCD124 2 EDIF gt 1ISD6 39 lISD13 TISD7 g LE E 1ISDi4 U53A IMCEIT 79 Bi pis IISDIS 74HC32 OCICRDS 11ISA10 89 A10 CE2 IMCE2 o Al St OF RESH 1IXTOR IMCEZE TISAS 119 A11 NIO
145. xas 78741 800 222 9323 AMD Proprietary All Rights Reserved Title XIORESET P5VOLT generation Size bocument Number REV B ElanSC300 310 Evaluation Board 2 2 Date March 29 1996 Sheet 19 of 23 vccs VCCSY253 vcecs 037 vcc3 o o 036 1 9 R377 3 2 s M GTS r7 P i Ye RB400D 4 c228 R378 D 0 1UET 21M p 5 L AT vcci VCCSY25

ÉlanSC310 Microcontroller Evaluation Board User`s Manual

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ÉlanSC310 Microcontroller Evaluation Board User`s Manual