MSI-P415 USER MANUAL - Microcomputer Systems, Inc.
Contents
1. Table 2a Connector J1 Pin assignments for MSI P415 8 Input Pin Input Pin Ch 0 J1 16 Ch4 J1 8 ChoO J1 15 Ch4 J1 7 Ch 1 J1 14 Ch5 J1 6 Ch 1 J1 13 Ch5 J1 5 Ch2 J1 12 Ch6 J1 4 Ch 2 J1 11 Ch5 J1 3 Ch 3 J1 10 Ch7 J1 2 Ch 3 J1 9 Ch7 J1 1 Table 2b Connector J1 Pin assignments for MSI P415 16 Input Pin Input Pin Input Pin Input Pin ChO J1 16 Ch4 J1 8 Ch8 J1 32 Ch12 J1 24 Ch0 J1 15 Ch4 J1 7 Ch8 J1 31 Ch 12 J1 23 Ch1 J1 14 Ch5 J1 6 Ch9 J1 30 Ch 13 J1 22 Ch 1 J1 13 Ch5 J1 5 Ch9 J1 29 Ch 13 J1 21 Ch2 J1 12 Ch6 J1 4 Ch10 J1 28 Ch 14 J1 20 Ch2 J1 11 Ch6 J1 3 Ch10 J1 27 Ch 14 J1 19 Ch 3 J1 10 Ch7 J1 2 Ch11 J1 26 Ch15 J1 18 Ch3 J1 9 Ch7 J1 1 Ch 11 J1 25 Ch 15 J1 17 Note Pin P1 33 is card common and P1 34 is connected to 5V using Jumper A Page 8 MSI P415 User Manual lll PROGRAMMING Performing data conversions involves a write operation to the control register of the appropriate MAX197 which selects the mux channel and configures the input mode The data is then read lo byte and hi byte when the conversion has been completed A Control Register Format The control register is an 8 bit write only register that selects the mux channel and mode of the converter The format is D7 MSB D6 D5 D4 D3 D2 D1 DO LSB PD1 PDO ACQMOD RNG BIP A2 A1 AO where PD1 PDO select the cl2. all 1 s respectively for the unipolar and bipolar modes E Power Down Modes To save power the converters can be placed into a low power shutdown mode between conversions Two pro grammable power down modes are available Select STDBYPD or FULLPD by programming PDO and PD1 in the control register When software power down is asserted it becomes effective only after the end of conversion In both power down modes the interface remains active and conversion results may be read Input overvoltage protec tion is active The converter returns to normal operation on the first write to the control register In STDBYPD each device typically consumes 700uA and in FULLPD 120 uA maximum The converter voltage reference remains active in STDBYPD This is a DC power state that does not degrade after power down of any duration and any sampling rate can be used without regard to start up delays In FULLPD however start up delays will effect the conversion It is recom mended when using this mode that a STDBYPD power down cycle be performed prior to starting conversions to allow the reference voltage to stabilize Selecting STDBYPD on every conversion automatically shuts the MAX197 down after each conversion without requiring any start up time on the next conversion Page 11 MSI P415 User Manual F Example BASIC Program A simple BASIC program that inputs continually inputs channels O thru 7 for the 5V unipolar mode and lists the r
3. 415 User Manual Memory assignments int A_D_value CH 3 INPUT CH 9 INPUT Routine to input A D channel CHAN 0 15 for control byte C BYTE and returns 0 on a converter time out error Stores converted value in A D value int input A D int CHAN int C BYTE int converter_error a i ch_group if 0 lt CHAN amp amp CHAN lt 8 ch group 0 else if 7 lt CHAN amp amp CHAN lt 16 ch_group 2 CHAN CHAN 8 outp base address ch group C_BYTE CHAN write control byte if ch_group lt 1 a 1 Ch 0 7 else a 2 Ch 8 15 i 0 do i while inp base_address 8 amp a amp amp i lt delay_count if i delay_count converter_error 1 converter time out error else converter_error 0 A_D_value inp base address ch group get converter value A D value A D value inp base_address ch group 1 amp Oxf lt lt 8 return converter error void main void Input channel 3 for 5V range and store if no time_out error if linput_A_D 3 control byte 5 CH_3_INPUT A_D_value Input channel 9 for 10V range and store if no time out error if tinput_A_D 9 control byte 10B CH 9 INPUT A_D_value Page 13 MSI P415 User Manual The function input_A_D int CHAN int C_BYTE above is written in general terms to permit calls from the main routine or from other user defined functions by simply using the appropr
4. MSI P415 ANALOG INPUT CARD USER MANUAL PC 104 Embedded Industrial Analog I O Series Microcomputer Systems Inc 1814 Ryder Drive Baton Rouge LA 70808 Ph 225 769 2154 gt Fax 225 769 2155 Email staff microcomputersystems com http www microcomputersystems com CONTENTS I INTRODUCTION II HARDWARE DESCRIPTION A B C D III QO Ww pP IV Card Configuration Card Addressing Interrupt Connections Connecting Inputs to J1 PROGRAMMING Control Register Format Performing a Conversion Reading the Data Register Input Data Formats Power Down Modes Example BASIC Program Example C Program Sequence SPECIFICATIONS APPENDIX Circuit Diagrams MSI P415 15 15 15 I INTRODUCTION The MSI P415 is a low cost high performance 12 bit differential input analog card designed for use with all PC 104 embedded systems Two models provide input capacities of 8 or 16 channels which operate from a single 5V supply Software programmable input ranges are 0 5V 0 10V 5V and 10V with a linearity of 1 2 LSB and input impedance of 1MQ In addition a fault condition on any channel will not effect the conversion result on the selected channel A block diagram of the card is shown below The card employs up to two MAX197 eight channel A D converters that incorporate a precision 2 5V reference source with buffer amp an internal 1 56 MHz clock and successive approximation and int
5. e signals are directed to the input terminals of A D converters U6 Channels 0 7 and U7 Channels 8 15 Jumper block JP1 is used for address selection Pins 1 thru 24 and interrupt configuration Pins 25 thru 34 as described below U1L 7 c9 PS1 DE Lm clan i ci7 BECEIcs Oe pppn FAR cig meg cia r EBEE DEB EH E ane v10 a p car co E p T 3 EDER LETE US BER II II OM TE 5 cman cman U9 2 co PANIMI ERER pn PE x es ERER DETE BB Ax fee an pm c2 RE poe c13 LETE EIEE c20 el Et Aers 5 5 EN Ug 6 m mm Dn mun EE v ra on GI gt S CEOS pp O O vr EDEN PETE MS SS sat a bigs teh ak A E tet dt tt te tt dt dnnanam my e n n ERE REEEEREREEEEE ERE ERE ER Fil toy as a ie eter ewe eevee See en ae oa Cc gt ae a c3 m Ee N mm 80000000 S ATTY o a sf SM U U h cl e en allin 4 n F B K S mi es n s sn ssn suununmNnE ENEE ee ee d me en e nnn enenu EREERERERREEEE RE a MICROCOMPUTER SYSTEMS INC MSI P415 1814 RYDER DR BATON ROUGE LA 504 769 2154 Figure 2 MSI P415 card outline Page 5 MSI P415 User Manual B Card Addressing The card address is set by installing appropriate jumpers on JP1 pins 1 thru 24 as shown in Fig 3 An uninstalled jumper for a given address bi
6. ernal input track hold circuitry to convert the analog signal of each channel into a 12 bit digital signal Low span and offset errors result in no adjustments being required for these functions Typical total conversion times of 12 us gives a sample rate of 83 ksps for each group of eight channels yielding rates up to 166 ksps for 16 input channels A4 A15 DIFFERENTIAL JUMPERS INPUT AMPLIFIERS PC 104 BUS INTERFACE MASIST NETWORK CH 0 7 34 PIN CONNECTOR CH 0 15 CONNECTOR PC 104 MAX197 BUS CH 8 15 INTERRUPT NETWORK PC 104 8 BIT STACKTHROUGH DIFFERENTIAL INPUT aiu AMPLIFIERS MSI P415 16 Figure 1 Block Diagram of the MSI P415 16 Page 3 MSI P415 User Manual The card is I O mapped using 16 bit addressing to select the input channels and device status Option jumpers are provided by JP1 for specifying the card address A4 A15 and interrupt processing is provided for IRQ4 thru IRQ7 and IRQ9 using options jumpers as described in the next section Page 4 MSI P415 User Manual ll HARDWARE DESCRIPTION A Card Configuration The MSI C415 card is a CMOS design using through hole and surface mounted devices The card configuration is shown in Figure 2 and a circuit diagram of the network is given in the Appendix The input signals for channels 0 thru 15 are applied to connector J1 Thes
7. esults to the console is given below 10 BASEADDR 8 amp H300 insert jumpers A4 thru A7 A10 thru A15 20 CBYTE amp H40 Control Byte for 5V Unipolar Mode 30 FOR I 0TO7 40 OUT BASEADDR CBYTE I Write Control Byte 50 WHILE INP BASEADDR 8 AND 1 1 WEND Test Status 60 X INP BASEADDR Read LO Byte 70 Y INP BASEADDR 1 Read HI Byte 80 X X 256 Y AND amp HF Mask off 4 MSB s of HI Byte 90 Print CHO CH4 Linefeed CH4 CH7 100 IF 1 3 OR I 7 THEN PRINT HEX X ELSE PRINT HEX X 110 NEXT 120 PRINT 130 GOTO 30 Go Again G Example C Program Sequence For a simple C program illustration using software polling of the device status consider a case with the following parameters and events 1 A base address for the card of 7FFOH insert jumper A15 2 Read A D channel 3 input to U5 in the 5V unipolar mode and store the result in CH_3_INPUT 3 Read A D channel 9 input to U4 in the 10V bipolar mode and store the result in CH_9_INPUT A simple program sequence for this operation is Constant declarations define base_address 0x7ff0 card base address define control_byte_5 0x40 control byte for 5V range define control_byte_5B 0x48 control byte for 5V range define control_byte_10 0x50 control byte for 10V range define control byte 10B 0x58 control byte for 10V range define delay_count 1000 delay count for converter time out Page 12 MSI P
8. iate CHAN and C_BYTE values for the input channel desired and the desired input range Page 14 MSI P415 User Manual PC 104 Analog Inputs Channels Converter Differential Input Ranges Resolution Conversion Rate Non linearity Offset Error Gain Error Signal to Noise Input Resistance Internal Reference Ref Out Voltage Temp Coeff Connectors MSI P414 8 MSI P414 16 Interrupts Channels Option Jumpers IV SPECIFICATIONS 8 bit stackthrough 8 to 16 in groups of 8 MAXIM MAX197 0 5V 0 10V 5V 10V 12 bits 82 ksps per 8 channels 1 2 LSB lt 0 5 of Span lt 0 5 of Span 70 dB min 1 MQ 4 096 V 1 5 max 40 ppm C One 1 3M 30316 5002 or eq 16 pin One 1 3M 30334 5002 or eq 34 pin One sharing with tri state buffer for IRQ4 7 9 025 square posts 0 1 grid Electrical amp Environmental 5V 70 mA typical 40 to 85 C Circuit Diagrams Page 15 APPENDIX MSI P415 MSI P415 User Manual
9. ock and power down mode Table 3 ACQMOD 0 internally controlled acquisition 1 externally controlled acquisition RNG selects the full scale voltage range Table 4 BIP selects unipolar or bipolar conversion mode Table 4 A2 A1 AO select the desired input channel 0 7 of the MAX197 Table 3 Clock and Power Down Selection PD1 PDO DEVICE MODE 0 0 Normal Operation External Clock Mode 0 1 Normal Operation Internal Clock Mode 1 0 Standby Power down STBYPD clock unaffected 1 1 Full Power down FULLPD clock unaffected Table 4 Range and Polarity Selection BIP RNG INPUT RANGE V 0 0 0to5 0 1 0 to 10 1 0 5 1 1 10 Page 9 MSI P415 User Manual The card is designed to operate using the internal clock with PD1 0 and PDO 1 in normal operation The internally controlled acquisition ACQMOD 0 is nor mally used B Performing a Conversion Conversions are initiated with a write operation to the control register Table 1 which selects the mux channel of the desired MAX197 U5 Channel 0 7 or U4 Channel 8 15 and configures the device mode Selecting ACQMOD 0 in the control register selects the internal acquisition mode This causes the write to the control register to initiate the acquisition interval whose duration is inter nally timed Conversion starts when this six clock cycle acquisition interval ends Writing a new control byte during the conversion cycle will abort the conversion and sta
10. rt a new acquisition interval C Reading the Data Register Conversions are complete when the appropriate status bit Table 1 becomes 0 following a write to the control register Channels 0 7 U5 for example are ready when bit 0 at address base 8 is 0 The data can now be read at the appropriate lo and hi byte addresses for the lo and hi bytes of the channel selected A2 A1 AO of the control register In the case of channels 0 7 addresses base 0O and base 1 respectively are read D Input Data Format Unipolar Mode the output data format is binary In this case O volts input yields OOOH where H denotes a hexadecimal number The value increases linearly from OOOH to FFFH with increasing input voltage A FS input full scale 5V or 10V ranges gives FFFH inary In this case a FS input 5V or 10V ranges yields 800H The value increases linearly from 800H toward FFFH as the input voltage changes from FS toward 0 volts binary Mode the output data format is twos complement Page 10 MSI P415 User Manual At 0 volts input in the ideal case the value is OOOH Again the value increases linearly from OOOH toward 7FFH as the input voltage changes from O toward FS volts The lo byte read bits DO thru D7 of the input data is the low byte BO thru B7 of the conversion result The hi byte read of the input data contains bits B8 thru B11 of the conversion result in bits DO thru D3 Bits D4 thru D7 contain all O s and
11. t sets the bit to 1 true and an installed jumper sets the bit equal to O false Addresses A4 thru A15 are jumper selectable for defining the base address of the card from OOOOH to FFFOH on integral 10H boundaries where H denotes a hexadecimal number To assign a base address of 3040H for example install jumpers JP1 A4 JP1 A5 JP1 A7 thru JP1 A11 JP1 A14 and JP1 A15 Pins 25 thru 34 are used to configure the interrupt connections if interrupts are used as described in the Section II C The MAX197 converters each have two registers for performing data conversions a control output register C and a input data register I A third register implemented on the card for denoting interrupt status is called the status register The addresses of the control input data C I and status for each channel is given in Table 1 The functions of the control the input data hi and lo bytes and status registers are described in the Section III me g ZRB g mn df mM ana OO KAO eo ac ofl poll 1 F Z P E eee n O A T O o O AOA TO DWT a TFT N tb oOo CO Dp eee NINN ANAN MN NM oOo O O O 0 0 0 O O O O O O O O 0 Oo 5 oO O amp SE SER SE LZY i ee Figure 3 Jumper block JP1 configuration Page 6 MSI P415 User Manual Table 1 Analog Converter Control Register Addresses Channels Control Output C Data Input I Sta
12. tus Bit 0 7 base 0 base 0 lo base 8 0 base 1 hi 8 15 base 2 base 2 lo base 8 1 base 3 hi C Interrupt Connections Interrupt connections are implemented by pins 25 thru 34 of JP1 The steps in the procedure are as follows 1 Pin 30 INT OUT is the composite interrupt signal from the analog converters see circuit diagram in Appendix This is jumpered to a single desired interrupt IRQ4 thru IRQQY of JP1 shown in Fig 3 This connection causes the interrupt selected to be activated when a conversion is performed 2 If no other cards in the system are using the interrupt line chosen in step 1 proceed to step 3 Pin 26 of JP1 INT IN is used to control the tri state buffer of INT OUT when other cards are using the same interrupt line chosen in step 1 In this case connect pins 26 and 28 of JP1 This results in the tri state buffer of INT OUT being enabled only when an interrupt request is active The status is then checked to determine which interrupt is active as described in Section III 3 Pin 32 of JP1 1 KOhm pull down resistor is used to properly terminate the interrupt line selected in step 1 This pin should be jumpered to the interrupt line on only one card in the system D Connecting Inputs to J1 Inputs are interconnected to the card via J1 using 16 pin or 34 pin flat cable connectors for 8 channel and Page 7 MSI P415 User Manual 16 channel models respectively Pin assignments are
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