AN-1521 POEPHYTEREV-I / -E User Guide
Contents
1. www ti com Schematics of the Evaluation Board JZ ra 3U3 VOUT So R26 1 1 U2 _LM3964 3 3 220 c c8 C5 C20 C18 C11 C18 R28 MDIO 1 uF 0 4 uF i uF Tao uF Jad ur foi ur fotu 528 DS1 4 gt gt gt gt gt LTM673 J1 C12 ri 33 uF Xi 25MH2 Oo 1 ad ees 3ST UCC 2 i GND OUT Yi le 25MHZ E t 3 IE gt noc PFBOUT R27 NU JB 4 WU t t oe c3 c4 c14 c15 Rz R10 Oo C17 20k SDK 99 SX 33 pF 33 pF 33 pF a3 Ee uF oH AL EL du 22h R9 R8 E al 2 2k S 2 2k et gt LED LINK 2 2k gt LED SPEED R12 33 LED ACT COL w J18 R18 4 33 NU R19 I gaz2285 Ree PFBIN2 PESSZU pes R21 RX_CLK Q20S2 praour RX DU MII MODE 4 aoi amp UDD33 R22 CRS CRS_DU LED_CFG a 2 REsERUEDL WW RX ER MDIX EN 4 8 5 RESERVED2 R23 COL PHYAD c W RXD_ PHYAD1 u g RXD_1 PHYAD2 9g M t R24 AM a8 RXD_2 PHYAD3 zE RXD_3 PHYAD4 8 z I0GND2 x Sg R12 R13 R14 3V3 IOUDD33 E amp p a a a 2 2k 2 2k 2 2k eh Rea ol edes E DP83848I J11 loo ls 2 ofe J13 ISOLATION BOUNDARY TD RE32 NU RD RD i 4 3U3 R39 R41 R37 220 220 220 ZW D53 ZW 052 ZW 054 838 1X1T W6 GND LED LINK LED SPEED LED ACT COL Figure 2 Evaluation Board Schematic Part 2 RJ45 connectors and Ethernet Magentics SNOA476C October 2006 Revised April 2013 AN 1521 POEPHY2. be responsible for any failure to meet ISO TS16949 Products Applications Audio www ti com audio Automotive and Transportation www ti com automotive Amplifiers amplifier ti com Communications and Telecom www ti com communications Data Converters DLP Products DSP Clocks and Timers Interface Logic Power Mgmt Microcontrollers RFID OMAP Applications Processors Wireless Connectivity dataconverter ti com www dlp com www ti com clocks interface ti com logic ti com microcontroller ti com www ti rfid com www ti com omap Computers and Peripherals Consumer Electronics Energy and Lighting Industrial Medical Security Space Avionics and Defense Video and Imaging TI E2E Community www ti com wirelessconnectivity www ti com computers www ti com consumer apps www ti com energy www ti com industrial www ti com medical www ti com security www ti com space avionics defense www ti com video Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2013 Texas Instruments Incorporated
3. information for all options above may be found in the DP83848 data sheet Status indicators LEDs The POEPHYTEREV board supplies numerous status indicators via LEDs Status provided include Link DS3 Media Speed DS2 Activity Collision DS4 Ethernet Device Power DS1 PoE Power LED1 Other status can be indicated by these LEDs The alternate status is set by adding jumper J5 Refer to PHYTER Extreme Temperature Single Port 10 100 Mb s Ethernet Physical Layer Data Sheet SLLSEC6 for additional information AN 1521 POEPHYTEREV E Evaluation Board 3 Submit Documentation Feedback Copyright 2006 2013 Texas Instruments Incorporated I TEXAS INSTRUMENTS An Important Note About the Maximum Power Capability and Cable Usage www ti com 4 Ethernet Performance The DP83848 PHYTER supports line speed Ethernet network communications Signal quality which affects IEEE compliance can vary depending on board layout power supplies and components used esp isolation magnetics Software No device specific software is required for this board An Important Note About the Maximum Power Capability and Cable Usage The maximum output power is 24W The user must make sure that the Power Sourcing Equipment PSE in use can provide at least 30W Important Please note that the CAT 5 cable may not support the said power over two pairs of twisted wires under strict safety considerations Users will select the proper cabl
4. the following descriptions apply to both versions of the circuit boards unless specifically indicated Tl is a trademark of Texas Instruments All other trademarks are the property of their respective owners SNOA476C October 2006 Revised April 2013 AN 1521 POEPHYTEREV E Evaluation Board 1 Submit Documentation Feedback Copyright 2006 2013 Texas Instruments Incorporated I TEXAS INSTRUMENTS Features of the Evaluation Board www ti com 4 Features of the Evaluation Board Seamless design solution incorporating DP83848 PHYTER single port 10 100 Mb s Ethernet physical layer transceiver and LM5072 High Power PoE PD and PWM controller Ethernet Integrated or External magnetics and RJ45 Minimum configuration requirements 2 PHY Addresses 01h default or O3h Status LEDs board power others dependant on LED mode selected Limited Strap Options MDIX EN LED CFG PWR DWN INT MII RMII Sel RESET_N jumper PWR DWN INT jumper Connections for the following interfaces MII RMII Interface IEEE 802 3 standard RJ 45 Cat V Ethernet cable connector JTAG header 25MHz_OUT header Header for ribbon cable connection to MII RMII On board clock Crystal Oscillator Dual Footprint Power Over Ethernet Isolated output voltage 3 3V Maximum output current 7 3A Maximum output power 24W Input voltage ranges PoE input voltage range 39 to 57V AUX input voltage rang
5. E and AUX inputs respectively They are not connected to the same circuit node and they should not be interchanged For the output connection the load can be either a passive resistor or active electronic load Attention should be paid to the output polarity when connecting an electronic load It is not recommended to use additional filter capacitors greater than 20 uF total across the output port as the extra capacitance will alter the feedback loop properties and may cause instability If it is necessary to add extra capacitance in a particular application the feedback loop compensation must be adjusted accordingly Sufficiently large wire such as AWG 18 or thicker is required when connecting the source supply and load Also monitor the current into and out of the circuit board Monitor the voltages directly at the board terminals as resistive voltage drops along the connecting wires may decrease measurement accuracy Never rely on the bench supply s voltmeter or ammeter if accurate efficiency measurements are desired When measuring the dc dc converter efficiency the converter input voltage should be measured across CE4 When measuring the evaluation board overall efficiency which is more relevant both input and output voltages should be read from the terminals of the evaluation board Remember to count the power dissipation by the PHY circuit in the efficiency measurement When the PHY circuit is in the idle mode it will draw 55 mA from th
6. ER DESCRIPTION VALUE CE13 NU CE14 NU CE15 C3216X5R0J226M CAPACITOR CER CC1206 TDK 22 uF 6 3V CE16 EMVY6R3ADA331MF80G CAPACITOR AL ELEC CHEMI ON 330 UF 6 3V CE19 C2012X5R1C105K CAPACITOR CER CC0805 TDK 1 0 uF 16V CE20 C2012X7R1E474K CAPACITOR CER CC0805 TDK 0 4 uF 25V CE21 C0805C473K5RAC CAPACITOR CER CC0805 KEMET 0 047 uF 50V CE22 NU CE23 C0805C102K5RAC CAPACITOR CER CC0805 KEMET 1000 pF 50V CE25 C0805C104K5RAC CAPACITOR CER CC0805 KEMET 0 1 uF 50V CE26 C0805C473K5RAC CAPACITOR CER CC0805 KEMET 0 047 uF 50V CE27 NU CE28 C4532X7R3D222K CAPACITOR CER CC1812 TDK 2200 pF 2 kV CE29 C3216X7R2A104K CAPACITOR CER CC1206 TDK 0 1 uF 100V CE31 C0805C473K5RAC CAPACITOR CER CC0805 KEMET 0 047 uF 50V CE30 NU DE1 S3BB 13 DIODE SMB DIODE INC 3A 100V DE2 NU DE3 BAT54S DUAL SCHOTTKY SOT 23 DIODE INC DE4 CMHD4448 DIODE SOD123 CENTRAL 125 mA 75V DE5 NU DE6 CMR1U 01M DIODE SMA CENTRAL 1A 100V DE7 NU P1 PJ 102A POWER JACK JE4 NU JE5 3104 2 00 01 00 00 080 POST MILL MAX JE6 3104 2 00 01 00 00 080 POST MILL MAX JE7 NU LE1 DO3308P 682MLD SM INDUCTOR COILCRAFT 6 8 uH LE3 DO3316T 331MLD SM INDUCTOR COILCRAFT 0 33 uH LED1 SSL LXA228GC TR11 LED GREEN LUMEX TP1 NU TP2 NU TP3 5012K ND TEST POINT KEYSTONE TP4 5012K ND TEST POINT KEYSTONE TP7 5012K ND TEST POINT KEYSTONE TP8 5012K ND TEST POINT KEYSTONE TP12 NU Q1A SI7898DP MOSFET N CH PowerPAK VISHAY 150V 4 8A Q1B NU Q2 BSC022N03
7. F RESISTOR 220 Ohm R39 CRCW06032200F RESISTOR 220 Ohm R41 CRCW06032200F RESISTOR 220 Ohm R42 CRCW12060R0J RESISTOR 0 Ohm R43 CRCW12060R0J RESISTOR 0 Ohm R44 CRCW12060R0J RESISTOR 0 Ohm R45 CRCW12060R0J RESISTOR 0 Ohm R50 CRCW12060R0J RESISTOR 0 Ohm R51 CRCW12060R0J RESISTOR 0 Ohm R52 CRCW12060R0J RESISTOR 0 Ohm R53 CRCW12060R0J RESISTOR 0 Ohm R54 CRCW12060R0J RESISTOR 0 Ohm R55 CRCW12060R0J RESISTOR 0 Ohm R56 CRCW12060R0J RESISTOR 0 Ohm R57 CRCW12060R0J RESISTOR 0 Ohm U1 DP83848 IVV PHY TRANSCEIVER NATIONAL 20 AN 1521 POEPHYTEREV E Evaluation Board SNOA476C October 2006 Revised April 2013 Submit Documentation Feedback Copyright 2006 2013 Texas Instruments Incorporated 1 TEXAS INSTRUMENTS www ti com Bill of Materials Table 3 Part 2 PHYTER BOM continued ITEM PART NUMBER DESCRIPTION VALUE U4 ETH1 230LD TRANSFORMER ETHERNET COILCRAFT E BOARD ONLY U8 NU U9 NU U10 NU UE13 0838 1X1T W6 CONNECTOR INTEGRATED WITH ETHERNET TRANSFORMER BEL STEWARD I BOARD ONLY Y1 FOXSLF 250F 20 CRYSTAL HC49 US 25 MHz SNOA476C October 2006 Revised April 2013 AN 1521 POEPHYTEREV I E Evaluation Board 21 Submit Documentation Feedback Copyright 2006 2013 Texas Instruments Incorporated IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries Tl reserve the right to make corrections enhancements improvements and other changes to its semiconduc
8. Feedback Copyright 2006 2013 Texas Instruments Incorporated I TEXAS INSTRUMENTS PoE Performance Characteristics www ti com Horizontal Resolution 5 ms div Trace 1 The voltage of the RTN pin referenced to the VEE pin 0 5V div Trace 2 The PoE input current 0 5A div Figure 9 Retry Mode under 38V PoE Input and Output Over Current Condition 22 4 Step Response Figure 10 shows the step load response at Vin equal to 48V The load current changes in step between 1A and 7A Horizontal Resolution 0 5 ms div Trace 1 Load current step changes between 1A and 7A 2A div Trace 2 The 3 3V output voltage response AC coupled 0 5V div Figure 10 Output Voltage Step Load Response 14 AN 1521 POEPHYTEREV I E Evaluation Board SNOA476C October 2006 Revised April 2013 Submit Documentation Feedback Copyright 2006 2013 Texas Instruments Incorporated 1 TEXAS INSTRUMENTS www ti com PoE Performance Characteristics 22 5 Ripple Current and Voltage Figure 11 and Figure 12 show the PoE and AUX input ripple current respectively under full load In both cases the input ripple current is attenuated to less than 10 mA pk pk by the input filter Horizontal Resolution 50 us div Trace 1 The PoE input current ripples AC coupled 20 mAV div Trace 2 The FFT of Trace 1 Horizontal 500 kHz div Vertical 5 mA div Figure 11 PoE Input Current Rip
9. MET 0 1 pF 50V C12 CAPACITOR TAN CC3528 33 uF 6V C13 CAPACITOR CER CC0603 KEMET 0 1 pF 50V C14 CAPACITOR CER CC0603 KEMET 0 1 pF 50V C15 CAPACITOR CER CC0603 KEMET 0 1 pF 50V C16 CAPACITOR CER CC0603 KEMET 0 1 pF 50V C17 CAPACITOR TAN CC7343 10 F 35V C18 CAPACITOR CER CC0603 KEMET 0 1 pF 50V C20 CAPACITOR TAN CC7343 10 uF 35V C21 CAPACITOR CER CC0603 KEMET 0 1 pF 50V C22 CAPACITOR CER CC0603 KEMET 0 1 pF 50V C23 CAPACITOR CER CC0603 KEMET 0 1 pF 50V C49 CAPACITOR CER CC0603 KEMET E Board 8 pF 50V ONLY C50 CAPACITOR CER CC0603 KEMET E Board 8 pF 50V ONLY C53 CAPACITOR CER CC0603 KEMET E Board 8 pF 50V ONLY C54 CAPACITOR CER CC0603 KEMET E Board 8 pF 50V ONLY DS1 LTM673 R1S2 35 LED GREEN OSRAM DS2 LTM673 R1S2 35 LED GREEN OSRAM DS3 LTM673 R1S2 35 LED GREEN OSRAM DS4 LTM673 R1S2 35 LED GREEN OSRAM J1 CN MII MALE CONNECTOR MII J2 TEST POINT KEYSTONE J3 TEST POINT KEYSTONE J4 TEST POINT KEYSTONE J5 TEST POINT KEYSTONE J6 TEST POINT KEYSTONE J7 TEST POINT KEYSTONE J8 TEST POINT KEYSTONE J9 TEST POINT KEYSTONE J10 NU J11 NU J13 CN PHONE8P8C RA SHLD CONNECTOR RJ45 E BOARD ONLY J15 TEST POINT KEYSTONE J16 TEST POINT KEYSTONE J18 NU R1 CRCWO060333R0J RESISTOR 33 Ohm R2 CRCWO060333R0J RESISTOR 33 Ohm R3 CRCWO060333R0J RESISTOR 33 Ohm R4 CRCW060333R0J RESISTOR 33 Ohm SNOA476C 0October 2006 Revised April 2013 Submit Documentation Feedbac
10. O RE22 NU RE23 CRCWO08051582F RESISTOR 15 8 KQ RE25 CRCW12060R47F RESISTOR 0 47 Ohm RE26 NU RE28 CRCWO08050R0J RESISTOR 332 Ohm RE29 CRCW12062492F RESISTOR 24 9 KQ RE34 CRCWO08050R0J RESISTOR 0 Ohm U5 LM5072 80 POE PI AND PWM CTRL NATIONAL U6 SHORT LEADS U7 FA2677 AL XFMR FLYBACK EFD20 COILCRAFT U11 FA2659 AL PULSE XFMR 1 1 COILCRAFT UE2 PS2811 1 M OPTO COUPLER NEC UE3 LMV431A REFERENCE SOT23 3 NATIONAL ZE1 CMZ5944B ZENER 62V SMA CENTRAL ZE2 SMAJ58A TVS 58V SMA DIODE INC ZES CMPZ4619 ZENER 3 0V SOT23 3 CENTRAL Table 3 Part 2 PHYTER BOM ITEM PART NUMBER DESCRIPTION VALUE C1 CAPACITOR TAN CC7343 33 UF 35V C2 CAPACITOR TAN CC7343 33 UF 35V C3 CAPACITOR CER C0805 KEMET 33 pF 50V C4 CAPACITOR CER C0805 KEMET 33 pF 50V Note NU stands for Not Used namely not populated Submit Documentation Feedback Copyright 2006 2013 Texas Instruments Incorporated 1 TEXAS INSTRUMENTS www ti com Bill of Materials Table 3 Part 2 PHYTER BOM continued ITEM PART NUMBER DESCRIPTION VALUE C5 CAPACITOR TAN CC7343 10 uF 35V C6 CAPACITOR CER CC0603 KEMET 0 1 uF 50V C7 CAPACITOR CER CC0603 KEMET 0 1 pF 50V C8 CAPACITOR CER CC0603 KEMET 0 1 uF 50V C9 CAPACITOR TAN CC3528 68 uF 6V C10 CAPACITOR CER CC0603 KEMET 0 1 pF 50V C11 CAPACITOR CER CC0603 KE
11. PWM Cntrl w Aux Support Data Sheet SNVS437 Auxiliary Power Option In this evaluation board the AUX power is configured into the AUX dominant mode Please refer to LM5072 Integrated 100V Pwr Over Ethernet PD Interface amp PWM OCntrl w Aux Support Data Sheet SNVS437 for details During AUX dominance the AUX power source will always supply the current to the PD regardless whether the PoE power is present or not Note that auxiliary non dominance does not imply PoE dominance To achieve PoE dominance additional circuitry must be employed Because the AUX input bypasses the LM5072 s input hot swap circuit the evaluation board uses eight 8 060 resistors RE1A through RE1D and RE2A through RE2D in parallel to achieve a low cost AUX inrush limiter and transient protection Otherwise the unlimited inrush currents can wear on board traces connector contacts and various board components as well as create damaging transient voltages Nevertheless these eight resistors will cause power loss in the AUX power mode and they also reduce the effective AUX input voltage level sensed by the VIN pin of the LM5072 A more efficient and generally better performing AUX inrush limiter can be achieved with additional circuitry employing a bipolar transistor or MOSFET If the AUX power option is not used in a new design delete CE3 DE1 the eight resistors RE1A through RE1D and RE2A through RE2D RE13 RE29 and P1 to lower the BOM cost AUX Input O
12. R ing Diode Selection This diode does not need to be a high speed type since there is no switching action during operation however it should be a low reverse leakage current device RE29 a 24 9 kQ resistor is employed on the evaluation board providing a sinking path for the leakage current of DE1 It is meant to sink all of the leakage current of DE1 and prevent a false logic state at the RAUX pin Please see the LM5072 Integrated 100V Pwr Over Ethernet PD Interface amp PWM Cntrl w Aux Support Data Sheet SNVS437 for more details about the selection of DE1 and RE29 Flyback Converter Topology The dc dc converter stage of the evaluation board features the flyback topology which employs the minimum number of power components to implement an isolated power supply at the lowest possible cost Generally the flyback topology is best suited for applications of power levels lower than 50W When the power level is higher the forward push pull and bridge topologies will be appropriate candidates SNOA476C October 2006 Revised April 2013 AN 1521 POEPHYTEREV E Evaluation Board 9 Submit Documentation Feedback Copyright 2006 2013 Texas Instruments Incorporated I TEXAS INSTRUMENTS Factors Limiting the Minimum Operating Input Voltage www ti com 21 22 22 1 A unique characteristic of the flyback topology is its power transformer Unlike an ordinary power transformer that simultaneously transfers the power from the primary to t
13. SG MOSFET N CH PowerPAK INFINEON 30V 50A QE5 SI2301 MOSFET P CH SOT 23 VISHAY QE6 SI2301 MOSFET P CH SOT 23 VISHAY RE1A CRCW12068R20J RESISTOR 8 20 Ohm RE1B CRCW12068R20J RESISTOR 8 20 Ohm RE1C CRCW12068R20J RESISTOR 8 20 Ohm RE1D CRCW12068R20J RESISTOR 8 20 Ohm SNOA476C October 2006 Revised April 2013 Submit Documentation Feedback Copyright 2006 2013 AN 1521 POEPHYTEREV E Evaluation Board 17 Texas Instruments Incorporated I TEXAS INSTRUMENTS Bill of Materials www ti com Table 2 Part 1 PoE Circuit BOM continued ITEM PART NUMBER DESCRIPTION VALUE RE2A CRCW12068R20J RESISTOR 8 20 Ohm RE2B CRCW12068R20J RESISTOR 8 20 Ohm RE2C CRCW12068R20J RESISTOR 8 20 Ohm RE2D CRCW12068R20J RESISTOR 8 20 Ohm RE3 CRCW080520ROF RESISTOR 20 Ohm RE4 NU RE5 CRCW08053321F RESISTOR 3 32 KQ RE6 CRCWO080524R9J RESISTOR 24 9 Ohm RE7 CRCW080510ROF RESISTOR 10 Ohm RE8 NU REQ CRCWO08051000F RESISTOR 100 Ohm RE10 NU RE11 NU RE12 CRCWO08052432F RESISTOR 24 3 KQ RE13 CRCWO08054991F RESISTOR 4 99 KQ RE14 CRCW12060R47F RESISTOR 0 47 Ohm RE15 CRCW12060R47F RESISTOR 0 47 Ohm RE16 NU RE17 CRCWO08055900F RESISTOR 1 kQ RE18 CRCWO08051472F RESISTOR 14 7 KQ RE19 NU RE20 CRCWO08051001F RESISTOR 1 kQ RE21 CRCWO08052102F RESISTOR 21 0 k
14. TEREV E Evaluation Board 5 Submit Documentation Feedback Copyright 2006 2013 Texas Instruments Incorporated Connection and Proper Test Methods TP PoE GND TXOCT RXOCT BRL CBR1 D02 5 RJ45 4 5 RJ45_7 8 TP8 PoE 48U 6 BR2 CBR1 D0205 ry c 3 2 DE1 1 TEXAS INSTRUMENTS www ti com x TP3 RELA RE1B 8 06 RE1C 8 06 RE1D 8 06 RE2A 8 06 RE2B 8 06 RE2C 8 06 S3BB m RAUX t RE2D 8 06 CE3 NU Pi AUX 24U input AUX PLR2 TP E Connection and Proper Test Methods Figure 4 shows a photo of the evaluation board with the connection ports indicated The PoE circuit occupies the lower part of the board within the rectangular outline The RJ45 connectors Ethernet magnetics and PHY circuit are placed in the upper area of the board The following are the seven connections J1 a 42 pin MII Connector for the Ethernet media independent interface JE4 through JE7 double pairs of connection pins for the 3 3V output JE4 and JE5 of are the high potential pins J13 a regular RJ45 connector on the E version board for PoE input and data link UE13 Bel Stewart Integrated RJ45 connector on the I version board for PoE input and data link TP7 and TP8 a pair of pins for quick PoE input
15. ads The LM5072 s built in slope compensation helps stabilize the feedback loop when the duty cycle exceeds 50 in 24V AUX power operation A additional transformer winding is used to provide the bias voltage VCC to the LM5072 IC Although the LM5072 controller includes an internal startup regulator which can support the bias requirement indefinitely the transformer winding produces an output about 2V higher than the startup regulator output thus shutting off the startup regulator and reducing the power dissipation inside the IC Given the low current limit value 15 mA nominal of the high voltage startup regulator the VCC line is not meant to source external loads greater than 3 mA in total The external load of the VCC line is the PoE Power LED indicating the PoE operation mode Factors Limiting the Minimum Operating Input Voltage The LM5072 supports operation with as low as 9V AUX power source However limited by the flyback power transformer design the minimum AUX voltage of the evaluation board is 22V voltage drops caused by RE1A and alike and DE1 reduce the VIN pin potential to about 20V The installed EFD20 type power transformer FA2267 AL is a low cost area efficient solution to operate with a wide auxiliary input voltage range from 24V to 57V However it does not support 24W power operation with the lower input voltage Under these conditions the excessive magnetic flux may saturate the transformer core It is possible to o
16. connection to a bench power supply TP7 is the high potential pin P1 a PJ102A power jack for Auxiliary AUX power input The center pin of P1 is the high potential pin TP3 and TP4 a pair of pins for quick AUX power input connection to a bench power supply TP3 is the high potential pin AN 1521 POEPHYTEREV E Evaluation Board Let crm uz AD 8 uH T i ZEA LE3 fcre CE4 F CE5 cnz59448 DES 0 33 uH Je4 22 uF 4 7 uF 4 7 uF CHR1U 01M e t aN RES 28 T CE16 Vout 3 3U OW peat Gates 5587 gE 336 ut IDA 235 cers X p Cr 446 Lees Leer 1 0 uF tA ats Y 22 uF 22 uF LEDI py my FAz677 AL oa TOND mE Ga oe con a ain 1 S17832 ido IGND GND IGND B ha S17898 RE14 1 3E6 IND RS 47 gt i 3 3U RTN amp FE 4 W z z 9 a047 uF 100 REIS vi JE RAUX rM a h Tiaoa Lee B ci 0 RE RE22 1800 pl i Te i N Pm E EI Np o5 pe Ol 5 1 e CE27 con ISOLATION gne28 NU 1 00k Tp2 l BOUNDARY NO a Bz2 X con UE2 SMAJ58A eese 1 REA re penz NU 9 1 uF T 1 00k 7 E291 PS2801 1 L 91 ur As COM d PF Gate3 RE18 com IGND atk Gate2 Gatet Es si2301 DES Bats4s 1OND A CEL u11 20 10 47 uFw2 f CELL ID 9 47 Cil ES XL FA2659 AL prpese Si2301 con IGND Figure 3 Evaluation Board Schematic Part 3 the PoE Circuit SNOA476C October 2006 Revised April 2013 Copyright 2006 2013 Texas Instruments Incorporated Sub
17. e 22 to 57V Measured maximum efficiency DC to DC converter efficiency 90 at 6A Overall efficiency including the input diode bridge 86 at 6A Overall Board Size 5 50 x 3 96 x 0 70 Switching frequency 250 kHz Optional input common mode filter PCB Layout Considerations AN 1521 POEPHYTEREV E Evaluation Board FR4 material Trace symmetry within differential pair 0 5 Differential impedance 100 ohms 5 Adjacent differential pairs spacing gt 2X distance within a differential pair to minimize cross talk and EMI Trace length matching between differential pairs not required Uniform supply amp ground plane Void planes under magnetics except for Chassis GND at RJ 45 edge only Combination of through hole and surface mount technology Trace space will be 0 007 0 008 minimum System interface will be via the MII connector and MII header RJ 45 for network connection JTAG access via 2x5 header SNOA476C October 2006 Revised April 2013 Submit Documentation Feedback Copyright 2006 2013 Texas Instruments Incorporated l TEXAS INSTRUMENTS www ti com Usage setup and Configuration 5 SNOA476C October 2006 Revised April 2013 Usage setup and Configuration This section contains information about the setup and configuration of the POEPHYTEREV I E evaluation board including descriptions of the card s interfaces connectors jumpers and LEDs Power for the POEPHYTEREV board can be
18. e 3 3V rail most of which is consumed by the on board LED indicators Refer to the appropriate user manual or instruction for the use of the MII connector SNOA476C October 2006 Revised April 2013 AN 1521 POEPHYTEREV E Evaluation Board 7 Submit Documentation Feedback Copyright 2006 2013 Texas Instruments Incorporated I TEXAS INSTRUMENTS Source Power www ti com 10 11 12 13 14 Source Power To fully test the evaluation board either a high power PSE able to supply 30W or a lab bench DC power supply capable of at least 60V and 1A is required for the PoE input For the AUX source power use a 24V AC adapter or a DC power supply capable of 30V and 3A Use the output over voltage and over current limit features of the bench power supplies to protect the board against damage by errant connections Loading Current Limiting Behavior A resistive load is optimal but an appropriate electronic load specified for operation down to 2 0V is acceptable The maximum load current is 7 3A Exceeding this current at low input voltage may cause oscillatory behavior as the circuit will go into current limit mode Exceeding this current at high input voltage may force the DC DC converter to run into cycle by cycle peak current limit Current limit mode is triggered whenever the average current through the PoE connector exceeds 800 mA setting is determined by RE23 see LM5072 Integrated 100V Pwr Over Ethernet PD Interface amp PWM Cn
19. e wires to support the design power level without compromising the applicable safety standards Using an improper cable at such power levels may violate safety regulations and may cause damage A Note about PoE Input Potentials PoE applications are typically 48V systems in which the notations GND and 48V normally refer to the high and low input potentials respectively However for easy readability the LM5072 datasheet was written in the positive voltage convention with positive input potentials referenced to the VEE pin of the LM5072 Therefore when testing the evaluation board with a bench power supply the negative terminal of the power supply is equivalent to the PoE system s 8V potential and the positive terminal is equivalent to the PoE system ground To prevent confusion between the data sheet and this application note the same positive voltage convention is used herein Schematics of the Evaluation Board Figure 1 Figure 2 and Figure 3 shows the schematic of the evaluation board AN 1521 POEPHYTEREV E Evaluation Board SNOA476C October 2006 Revised April 2013 Submit Documentation Feedback Copyright 2006 2013 Texas Instruments Incorporated 1 TEXAS
20. ering diode bridges BR1 and BR2 to be reverse biased during detection mode This prevents the PSE from applying power so the evaluation board will only draw current from the AUX source AN 1521 POEPHYTEREV E Evaluation Board SNOA476C October 2006 Revised April 2013 Submit Documentation Feedback Copyright 2006 2013 Texas Instruments Incorporated l TEXAS INSTRUMENTS www ti com Classification 15 16 17 18 19 20 Classification PD classification is implemented with RE22 The evaluation board is preset to Class 4 by installing a resistor of 31 60 at RE22 indicating that the power consumption of the evaluation board exceeds the 12 95W limit per IEEE 802 3af Input UVLO and UVLO Hysteresis The input Under Voltage Lock Out UVLO is an integrated function of the LM5072 The UVLO release threshold is set to approximately 38 5V at the pins of the IC and the UVLO hysteresis is approximately 7V Inrush and DC Current Limit Programming The LM5072 allows the user to independently program the inrush and DC current limits of the internal hot swap MOSFET The evaluation board sets the inrush limit to the default 150 mA by leaving RE19 unpopulated and the DC current limit to 800 mA by installing a 15 8 kQ resistor at RE23 To adjust the inrush and DC current limits use proper resistors for RE19 and RE23 respectively according to the recommendations in LM5072 Integrated 100V Pwr Over Ethernet PD Interface amp
21. he secondary the flyback transformer first stores the energy inside the transformer while the main switch is turned on and then releases the stored energy to the load during the rest of the cycle When the stored energy is not completely released before the main switch is turned on again it is said that the flyback converter operates in continuous conduction mode CCM Otherwise it is in discontinuous conduction mode DCM Major advantages of CCM over DCM include i lower ripple current and ripple voltage resulting in smaller input and output filter capacitors and ii lower RMS current thus reducing the conduction losses To keep the flyback converter in CCM at light load the transformer s primary inductance should be designed as large as is practical Major drawbacks of CCM as compared to DCM are i the presence of the right half plane zero which may limit the achievable bandwidth of the feedback loop and ii the need for slope compensation to stabilize the feedback loop at duty cycles greater than 50 The flyback topology can have multiple secondary windings for several isolated outputs One or more of these secondary channels are normally utilized internally by the converter itself to provide the necessary bias voltages for the controller The transformer uses an EFD20 type core with a primary inductance of 45 uH The converter runs in CCM at full load over the entire input voltage range but it will operate in DCM under light lo
22. ilures monitor failures and their consequences lessen the likelihood of failures that might cause harm and take appropriate remedial actions Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety critical applications In some cases TI components may be promoted specifically to facilitate safety related applications With such components TI s goal is to help enable customers to design and create their own end product solutions that meet applicable functional safety standards and requirements Nonetheless such components are subject to these terms No TI components are authorized for use in FDA Class III or similar life critical medical equipment unless authorized officers of the parties have executed a special agreement specifically governing such use Only those TI components which TI has specifically designated as military grade or enhanced plastic are designed and intended for use in military aerospace applications or environments Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer s risk and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use TI has specifically designated certain components as meeting ISO TS16949 requirements mainly for automotive use In any case of use of non designated products TI will not
23. is not observed within a few seconds turn off the power supply and review connections A final check of efficiency is the best way to confirm that the circuit is operating properly Efficiency being significantly lower than 80 at full load indicates a problem After proper PoE operation is verified the user may apply AUX power It is recommended that the application of AUX power follow the same precautions as those for PoE power application If no output voltage is observed it is likely that the AUX power feed polarity is reversed After successful operation is observed full AUX power testing can begin PD Interface Operating Modes When connecting into the PoE system the evaluation board will go through the following operating modes in sequence PD signature detection power level classification optional and application of full power See LM5072 Integrated 100V Pwr Over Ethernet PD Interface amp PWM Cntrl w Aux Support Data Sheet SNVS437 for details Signature Detection The 25 kQ PD signature resistor is integrated into the LM5072 IC The PD signature capacitor is realized by CE29 a 100 nF capacitor During AUX power operation CE29 also improves the noise immunity of the IC substrate interconnected to the VEE pin by providing a low impedance path to the COM node It should be noted that when AUX power is applied first it will not allow the PSE to identify the PD as a valid device because the AUX voltage will cause the current ste
24. j User s Guide TEXAS SNOAA76C October 2006 Revised April 2013 INSTRUMENTS AN 1521 POEPHYTEREV I E Evaluation Board 1 Introduction The POEPHYTEREV I E evaluation board is a seamless design demonstrating Texas Instruments LM5072 PoE product capable of up to 24W and DP83848I single port 10 100Mb s Ethernet PHYTER product While both the LM5072 and the DP83848 Ethernet PHY device have many advanced and enticing features this specific board is designed to demonstrate a subset of those features specifically Power over Ethernet Two versions of this board are available The I version has an RJ 45 connector that with integrated Ethernet magnetics The E version has discrete RJ 45 connector and Ethernet magnetics The schematics of the board are available with this kit for duplication into an end application product For additional features of the PoE and PHY devices individual device evaluation boards are separately available For detailed information about the complete functions and features of the LM5072 or DP83848 devices refer to the relevant data sheets For applications where IEEE 802 3af must be complied with and the power level is below 12 95W refer to AN 1455 LM5072 Evaluation Board SNVA154 For detailed information about the Ethernet PHYTER circuit refer to AN 1469 PHYTER Design amp Layout Guide SNLAO79 This evaluation kit contains e POEPHYTEREV or E Evaluation board Printed copy of this User s G
25. k AN 1521 POEPHYTEREV E Evaluation Board 19 Copyright 2006 2013 Texas Instruments Incorporated I TEXAS INSTRUMENTS Bill of Materials www ti com Table 3 Part 2 PHYTER BOM continued ITEM PART NUMBER DESCRIPTION VALUE R5 CRCWO060333R0J RESISTOR 33 Ohm R6 CRCWO060333R0J RESISTOR 33 Ohm R7 CRCW06032201F RESISTOR 2 2 kQ R8 CRCW06032201F RESISTOR 2 2 kQ R9 CRCW06032201F RESISTOR 2 2 kQ R10 CRCW06032201F RESISTOR 2 2 kQ R11 CRCW06032201F RESISTOR 2 2 kQ R12 CRCW06032201F RESISTOR 2 2 kQ R13 CRCW06032201F RESISTOR 2 2 kQ R14 CRCW06032201F RESISTOR 2 2 kQ R15 CRCWO8050R0J RESISTOR 0 Ohm R16 CRCW06031002F RESISTOR 10 ka R17 CRCW060333R0J RESISTOR 33 Ohm R18 CRCWO060333R0J RESISTOR 33 Ohm R19 CRCWO060333R0J RESISTOR 33 Ohm R20 CRCWO060333R0J RESISTOR 33 Ohm R21 CRCW060333R0J RESISTOR 33 Ohm R22 CRCWO060333R0J RESISTOR 33 Ohm R23 CRCW060333R0J RESISTOR 33 Ohm R24 CRCW060333R0J RESISTOR 33 Ohm R25 CRCW060333R0J RESISTOR 33 Ohm R26 CRCW06032200F RESISTOR 220 Ohm R28 CRCW08051501F RESISTOR 1 5 kQ R29 CRCW06032201F RESISTOR 2 2 kQ R30 CRCW060324871F RESISTOR 4 87 kQ R31 CRCW06032201F RESISTOR 2 2 kQ R32 CRCW06032201F RESISTOR 2 2 KQ R33 CRCWO060349R9J RESISTOR 49 9 Ohm R34 CRCWO060349R9J RESISTOR 49 9 Ohm R35 CRCWO060349R9J RESISTOR 49 9 Ohm R36 CRCWO060349R9J RESISTOR 49 9 Ohm R37 CRCW06032200
26. mit Documentation Feedback 13 TEXAS INSTRUMENTS www ti com Connection and Proper Test Methods Regular RJ45 Jack E Board ETH1 230L CI 0615 C MII Connector oo z s Bel Stewart m B he Integrated RJ45 o 5 w wo Be Jack I Board Wo me on A EI w wu au Do Mia La 24V AUX Input Jack gt g cc a 3 48V Quick Input Pins AUX Quick Input Pins 0290 1909 W 229 V4 lavHo loo 3 3V Output Pins Figure 4 The Connection Ports of the Evaluation Board The E version evaluation board employs a regular RJ45 connector J13 which is to be used with the external Ethernet magnetics assembly U4 The I version evaluation board uses an integrated RJ45 connector UE13 which has the Ethernet magnetics enclosed in the case For the PoE input through either RJ45 connector the diode bridge BR1 or BR2 is used to steer the current to the positive and negative supply pins of the LM5072 namely the VIN and VEE pins When using TP7 and TP8 for the quick PoE input connection to a bench power supply make sure TP7 is the high potential terminal For the AUX power input the higher potential should feed into the center pin of P1 When using TP3 and TP4 for the quick AUX input connection to a bench power supply be aware that TP3 is the high potential pin The diode DE1 provides the reverse protection of the AUX input Please note that TP4 and TP8 are two different return pins for the Po
27. perate with a lower voltage AUX source if the output power level is reduced If full power is required under low AUX input voltage the power transformer will need to be redesigned PoE Performance Characteristics PoE Input Power up Sequence The PoE power up sequence is as follows Note that the RTN pin IC pin 8 is isolated from the 3 3V RTN output pin of the evaluation board 1 The circuit first enters detection mode 2 Depending on the PSE in use the circuit may or may not go through classification mode 3 The PSE enters full power application mode Before the PoE input voltage reaches the UVLO threshold the hot swap MOSFET is in the OFF state Thus all nodes in the non isolated section of the power supply remain at high potential The voltage across the hot swap MOSFET namely the voltage across the RTN and VEE pins will be approximately equal to the PoE input voltage seen across the VIN and VEE pins 4 When the UVLO is released during the PoE input power up the drain of the internal hot swap MOSFET is pulled down to VEE IC pin 7 gradually as the input current charges up the input capacitors AN 1521 POEPHYTEREV E Evaluation Board SNOA476C October 2006 Revised April 2013 Submit Documentation Feedback Copyright 2006 2013 Texas Instruments Incorporated 1 TEXAS INSTRUMENTS www ti com PoE Performance Characteristics 5 The VCC regulator powers up during the inrush sequence During VCC regulator star
28. ples under Full Load ty h D W uu T k b EM ae 2 Horizontal Resolution 5 us div Trace 1 The AUX input current ripples AC coupled 10 mA div Trace 2 The FFT of Trace 1 showing the peak value of the harmonics Horizontal 500 kHz div Vertical 2 5 mA div Figure 12 AUX Input Current Ripple Under Full Load Figure 13 shows the output ripple voltage The FFT of the output ripple voltage indicates that the ripple harmonics are below 15 mV pk pk SNOA476C October 2006 Revised April 2013 AN 1521 POEPHYTEREV E Evaluation Board 15 Submit Documentation Feedback Copyright 2006 2013 Texas Instruments Incorporated J TEXAS INSTRUMENTS A Note on the Use of Common Mode Choke www ti com Horizontal Resolution 50 us div Trace 1 The 3 3V output voltage ripples AC coupled 0 2V div Trace 2 The FFT of Trace 1 showing the peak value of the harmonics Horizontal 500 kHz div Vertical 5 mV div Figure 13 Output Ripple Voltage under Full Load 23 A Note on the Use of Common Mode Choke A location is reserved on the evaluation board for an optional input common mode filter For some special applications that have very strict EMI requirements the common mode filter consisting of the choke U6 and two Y capacitors CE12 and CE13 can be used On the original evaluation board these three components are not populated and U6 s pads are shorted with bus wires When a common mode fil
29. supplied by a number of means Mil connector J1 PoE over unused pairs e PoE over data pairs External supply to P1 e If 5V is supplied from the MII connector the on board voltage regulator U2 will convert 5V to 3 3V for the PHYTER J7 should be removed If 3 3V is supplied from the MII connector J7 needs to be ON see Section 8 for details Only applies to the circuit board version with PCB serial number 551013040 001 Rev A J7 should be shorted if the PoE main output is set at 3 3V which is the default factory setting To modify the output to other higher voltages a 3 3V LDO should be installed onto U2 and J7 must be open Address Settings The PMD address for the DP83848 Physical Layer device is set by jumper J3 Default board setting for the PHY Address is 01h The board may be set to PHY Address 03h by adding jumper J3 Table 1 Table of Jumpers Jumper Name Function J1 MII Male Connector MII interface J2 MII Header Alternative connection for MII signals J3 PHYAD1 PHY Address strap pin J4 MDIX_EN Enable Disable MDIX mode Default is Auto MDIX Enable J5 LED_CFG Set LED configuration See data sheet J6 Not populated J7 MII 3V3 option Use 3V3 MII supply J8 PWR_DWN INT Set Power Down and Interrupt Mode See data sheet J9 RESET_N Reset the device J10 Not populated J11 Not populated J12 Pulse Jack Integrated Magnetic RJ 45 connector Additional
30. t capacitors The AUX input inrush limit resistors limit the inrush current and prevent any overshoot of the voltage across the VIN and RTN pins When the VCC regulator starts up the PWM controller begins soft start After soft start the switching regulator achieves output regulation and the converter enters steady state operation The auxiliary winding will raise the VCC voltage to about 10 5V thus shutting down the internal regulator and increasing efficiency Figure 6 shows key waveforms during a normal AUX power up sequence SNOA476C October 2006 Revised April 2013 AN 1521 POEPHYTEREV E Evaluation Board 11 Submit Documentation Feedback Copyright 2006 2013 Texas Instruments Incorporated I TEXAS INSTRUMENTS PoE Performance Characteristics www ti com Horizontal Resolution 5 ms div Trace 1 AUX input voltage VIN to RTN pins 10V div Trace 2 The 3 3V output voltage 2V div Trace 3 The input current 1A div Figure 6 AUX Power Up Sequence 22 3 Output Dead Short Fault Response and Over Current Protection The evaluation board survives the output dead short condition by running into re try mode hiccup or cycle by cycle peak current limit mode depending on the input voltage condition when the fault occurs Applying a dead short to the 3 3V line causes a number of protection mechanisms to take place sequentially They are 1 The feedback signal increases the duty cycle in an at
31. tempt to maintain the output voltage This initiates cycle by cycle over current limiting which turns off the main switch when the current sense CS pin exceeds the current limit threshold 2 The current in the internal hot swap MOSFET increases until it is current limited around 800 mA Some overshoot in the current will be observed as it takes time for the current limit amplifier to react and change the operating mode of the MOSFET 3 Because linear current limiting is accomplished by driving the MOSET into the saturation region the drain voltage RTN pin rises When it reaches 2 5V with respect to VEE power good is de asserted and the nPGOOD pin voltage rises 4 The de assertion of power good causes the discharge of the soft start capacitor which disables all switching action in the dc dc converter 5 Once the switching stops the current in the internal MOSFET will decrease and the drain voltage will fall back below 1 5V with respect to VEE When power good is re asserted the dc dc converter will automatically restart with a new soft start sequence Figure 7 and Figure 8 show cycle by cycle peak current limit in response to an output dead short with a 24V AUX input and 48V PoE input respectively The short circuit condition results in a peak current of about 3 2A in the primary circuit This peak current produces about 0 5V peak at the CS pin initiating cycle by cycle peak current limit mode The duty cycle is thus greatly reduced
32. ter is required a Coilcraft D1882 AL or equivalent can be used for U6 along with a Syfer 1808JA250102MCTPY2 or equivalent for CE12 and CE13 24 Bill of Materials Table 2 Part 1 PoE Circuit BOM ITEM PART NUMBER DESCRIPTION VALUE BR1 CBR1 D020S DIODE BRIDGE SMDIP CENTRAL 1A 200V BR2 CBR1 D020S DIODE BRIDGE SMDIP CENTRAL 1A 200V CE1 C2012X7R1E474K CAPACITOR CER CC0805 TDK 0 47 UF 25V CE2 NU CE3 NU CE4 C5750X7R2A475M CAPACITOR CER CC2220 TDK 4 7 uF 100V CE6 C5750X7R2A475M CAPACITOR CER CC2220 TDK 4 7 uF 100V CE6 EEV HA2A220P CAPACITOR AL ELEC PANASONIC 22 UF 100V CE7 C3216X5R0J226M CAPACITOR CER CC1206 TDK 22 UF 6 3V CE8 C3216X5R0J226M CAPACITOR CER CC1206 TDK 22 UF 6 3V CE9 C3216X5R0J226M CAPACITOR CER CC1206 TDK 22 UF 6 3V CE10 C3216X5R0J226M CAPACITOR CER CC1206 TDK 22 UF 6 3V CE11 C2012X7R1E474K CAPACITOR CER CC0805 TDK 0 47 UF 25V CE12 NU Note NU stands for Not Used namely not populated 16 AN 1521 POEPHYTEREV E Evaluation Board SNOA476C October 2006 Revised April 2013 Submit Documentation Feedback Copyright 2006 2013 Texas Instruments Incorporated 1 TEXAS INSTRUMENTS www ti com Bill of Materials Table 2 Part 1 PoE Circuit BOM continued ITEM PART NUMB
33. tor products and services per JESD46 latest issue and to discontinue any product or service per JESD48 latest issue Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete All semiconductor products also referred to herein as components are sold subject to Tl s terms and conditions of sale supplied at the time of order acknowledgment TI warrants performance of its components to the specifications applicable at the time of sale in accordance with the warranty in Tl s terms and conditions of sale of semiconductor products Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty Except where mandated by applicable law testing of all parameters of each component is not necessarily performed Tl assumes no liability for applications assistance or the design of Buyers products Buyers are responsible for their products and applications using Tl components To minimize the risks associated with Buyers products and applications Buyers should provide adequate design and operating safeguards TI does not warrant or represent that any license either express or implied is granted under any patent right copyright mask work right or other intellectual property right relating to any combination machine or process in which TI components or services are used Information published by TI regarding third part
34. trl w Aux Support Data Sheet SNVS437 for details The circuit then runs into a retry mode hiccups Cycle by cycle peak current limit mode narrows the duty cycle and hence the output voltage loses regulation and enters an under voltage condition In both current limit modes the circuit will not be latched off and normal operation will be automatically restored after the removal of the fault condition Power Up For the first time power up it is recommended to apply PoE power first The load should be kept reasonably low under 25 of full load Check the supply current during signature detection and classification modes before applying full power During detection mode the module should have the l V characteristics of a 25 kO resistor in series with two diodes During classification mode the current draw should be about 40 mA at 16V which is determined by RE22 of 31 60 This sets the evaluation board to Class 4 which is reserved for future use per IEEE 802 3af namely the high power application If the proper response is not observed during both detection and classification modes check the connections closely If no current is flowing it is likely that the set of conductors feeding PoE power have been incorrectly installed Once the proper setup has been established full power can be applied A voltmeter across the output terminals JE5 3 3V and JE6 3 3V RTN will allow direct measurement of the 3 3V output line If the 3 3V output voltage
35. tup it draws current on the order of 20mA but this will likely not be noticed by the user Once the RTN pin of the IC drops below 1 5V referenced to VEE and the gate of the hot swap MOSFET rises power good is asserted by pulling the nPGOOD pin low Once power good has been asserted the SS Soft Start pin is released The SS pin will rise at a rate equal to the SS current source typically 10 uA divided by the SS pin capacitance CE26 After the soft start is complete the switching regulator achieves output regulation and the converter enters steady state operation The auxiliary winding will raise the VCC voltage to about 10 5V thus shutting down the internal regulator and increasing efficiency Figure 5 shows key waveforms during a normal PoE power up sequence Please note that the PSE used in the test goes through detection mode but opts out of classification mode and directly enters full power application mode 1 Horizontal Resolution 50 ms div Trace 1 PoE input voltage across the VIN and VEE pins 20V div Trace 2 Voltage across the RTN and VEE pins namely the voltage across the Hot Swap MOSFET 20V div Trace 3 The input current 0 2A div Trace 4 The 3 3V output voltage 2V div Figure 5 PoE Power Up Sequence with a Midspan PSE 22 2 Auxiliary Input Power up Sequence The AUX input power up sequence is simpler 1 2 3 AUX power application quickly charges the inpu
36. uide Board schematic End User Licensing Agreement EULA 2 Scope of Applications The POEPHYTEREV I E evaluation kit EK is designed for high power PD PoE terminology Powered Device applications in which the maximum power exceeds the IEEE 802 3af s 12 95W limit The evaluation board features TI s DP83848 10 100 Mb s PHYTER Ethernet Physical Layer Transceiver so any equipment that provides a standard IEEE 802 3 Clause 22 MII DTE interface e g SmartBits Netcom box is required as a data source for the Ethernet device The LM5072 is a 100V high power PoE PD and PWM controller The evaluation board is capable of operating with both PoE and auxiliary AUX power sources The dc dc converter stage of the power supply is implemented in the versatile flyback converter topology 3 Important Note on Circuit Board Versions There are two versions of PCBs being built which can be identified by the PCB serial number printed along the left edge of the top side the circuit board One version is labelled 551012916 001 Rev A the other 551013040 001 Rev A The first version cannot modify the 3 3V output to higher voltages because it is directly connected to the PHY through inner layers It is modified on the second version such that higher output voltage can be produced without damaging the PHY circuit The factory default output setting for both versions is 3 3V Contact TI on support to modify the latter version to other output voltage In
37. which in turn limits the AUX input dc current to about 0 39A and the PoE input dc current to about 0 16A respectively AN 1521 POEPHYTEREV E Evaluation Board SNOA476C October 2006 Revised April 2013 Submit Documentation Feedback Copyright 2006 2013 Texas Instruments Incorporated 1 TEXAS INSTRUMENTS www ti com PoE Performance Characteristics Horizontal Resolution 1 ps div Trace 1 Current sense voltage across RE15 0 5V div Trace 2 The input current from the AUX power source 200 mA div Figure 7 Cycle by cycle Peak Current Limit under AUX Input and Output Dead Short Condition Horizontal Resolution 1 ps div Trace 1 Current sense voltage across RE15 0 5V div Trace 2 The input current from the AUX power source 100 mA div Figure 8 Cycle by cycle Peak Current Limit under 48V PoE Input and Output Dead Short Condition Figure 9 shows key waveforms of over current protection by the hot swap MOSFET s dc current limit The PoE input voltage is at 38V The input current exceeds the 800 mA current limit of the hot swap MOSFET and causes the voltage at the RTN pin to rise rapidly It also discharges the soft start capacitor CE26 connected to the SS pin and the circuit enters the automatic retry mode as long as the over current condition is present SNOA476C October 2006 Revised April 2013 AN 1521 POEPHYTEREV E Evaluation Board 13 Submit Documentation
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