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SN65DSI86/SN65DSI96 EVM User`s Manual

1. INSTRUMENTS www ti com Hardware Description Table 6 J6 Pin out continued Pin Name Pin Name 7 GND 8 GND 9 ML2N 10 LCD VCC 11 ML2P 12 LCD VCC 13 GND 14 EDP SELF TEST 15 GND 16 HPD 17 ML1N 18 NC 19 ML1P 20 NC 21 GND 22 BL ENABLE 23 GND 24 PWM DIM 25 MLON 26 NC 27 MLOP 28 NC 29 GND 30 GND 31 GND 32 GND 33 AUXP 34 BL PWR 35 AUXN 36 BL PWR 37 GND 38 BL PWR 39 GND 40 BL PWR 2 2 2 1 J6 Daughterboards There are two daughterboards for connecting to eDP panels DSI86 EDP_30PIN and DSI86 EDP_40PIN These boards are not provided with the SN65DS186 96 EVM board but are available upon request 2 2 2 1 1 DSI86 EDP 30PIN The DSI86 EDP_30PIN daughterboard supports up to 2 eDP lanes This board is intended to mate to an eDP panel that has a pin out that matches Table 6 3 in the VESA Embedded DisplayPort Standard Version 1 3 This board has a Samtec QTH 020 01 H D DP A for mating to J6 on the SN65DSI86 96 EVM board and an IPEX receptacle part 20455 030E 02 for interfacing to an eDP panel The ribbon cable for connecting the eDP panel to this daughterboard should use a IPEX plug part 20453 030T 11S or equivalent Figure 4 DSI86 EDP_30PIN SLLU204 June 2014 SN65DSI86 SN65DSI96 EVM User s Manual 9 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated IA TEXAS INSTRUMENTS Hardware Description www ti com 2 2 2 1 2 DS186 EDP_40PIN
2. 13 8 EVM Bil Of Matera saab unus sl i i a i Cure aa i i dae 12 2 SN65DSI86 SN65DSI96 EVM User s Manual SLLU204 June 2014 Submit Documentation Feedback Copyright O 2014 Texas Instruments Incorporated l TEXAS INSTRUMENTS www ti com Overview 1 1 1 1 2 1 3 Overview What are SN65DS186 and SN65DSI96 The SN65DS186 and SN65DS196 devices are referred to as SN65DSIX6 in this document SN65DSIX6 is a MIPI DSI to eDP bridge device that supports video modes in forward direction The SN65DSIX6 targets portable applications such as tablets and smart phones that utilize the MIPI DSI video format The SN65DSIX6 can be used between a GPU with DSI output and a video panel with DisplayPort inputs Both devices share the same pin out and package Table 1 is a summary of the feature sets on these devices Table 1 SN65DSIX6 Features Summary Part Name Description SN65DS186 Dual channel DSI to 4 eDP lanes Dual channel DSI to 4 eDP lane with adaptive display SN65DSI96 technology What is the SN65DSIX6 EVM The SN65DSIX6 EVM is a PCB created to help customers evaluate the SN65DSIX6 device for video applications with the DSI and DisplayPort interface This EVM can also be used as a hardware reference design for any implementation of the SN65DSIX6 The SN65DSIX6 EVM is designed for both the SN65DSI86 and SN65DSI96 DSI bridge devices NOTE Note Some portions and components in the EVM or in this d
3. IA TEXAS INSTRUMENTS Hardware Description www ti com 2 Hardware Description DSI Input SN65DS186 96 EVM eDP Output Berger 2x16 DSI_CHA_CLK DSI CHA DATAP N 3 0 B DSI CHB CLK DSI86 96 DSI CHB DATAP N 3 0 Page 2 AUXP N ML 3 0 P N SMA Samtec Samtec 5v 12V Ref CLK IN CDC RefCLK 17V E Generation 1 8V Page 6 Page4 Page4 Figure 3 SN65DSIX6 EVM Block Diagram 2 1 Connectors for DSIX6 Input Ports The EVM has two input options for DSI video If designing a custom breakout board using these options a schematic and an allegro PCB symbol for either connector can be provided by TI upon request 2 1 1 J4 Samtec QSH Type Connector P N QSH 020 01 H D DP A J4 is a Samtec QSH type connector that can be mated with a matching QTH type connector on the top The J4 provides DSI input connections to both DSI Ch A and Ch B signals and access to I2C and other miscellaneous signals such as IRQ XC connections are open vias if a connection to other signals is required The mating connector part number is QTH 020 01 H D DP A For an SMA type connection a HDR 128291 XX breakout board from Samtec can be used The HDR 128291 XX is a breakout board with a mating connector to J4 and standard SMA male connectors via cables More info on this breakout board can be provided upon request Note Resistors R6 thru R15 should be unpopulated when using this connector
4. 23 1 J9 ector Molex 47272 0001 Header 5x2 0 1 24 1 J10 thru hole 25 1 J13 2 1mm x 5 5mm CUI STACK PJ 202AH 26 4 J14 J17 J20 J21 HDR2X1 M 1 27 1 J16 HEADER 1x10 28 2 J18 J19 HDR3X1 M 1 LP1 LP2 LP3 29 8 LP4 LP5 LP6 LP KOBIKONN 151 103 RC LP7 LP9 30 1 L1 2 2uH Vishay aiba aninag 31 R1 R53 1K 32 R1 R53 350 R3 R4 R54 R55 R56 R57 R58 33 16 R59 R60 R61 4 7K R77 R78 R79 R87 R188 R191 SLLU204 June 2014 Submit Documentation Feedback SN65DSI86 SN65DSI96 EVM User s Manual 13 Copyright 2014 Texas Instruments Incorporated IA TEXAS INSTRUMENTS EVM Bill of Materials www ti com Table 8 EVM Bill of Materials continued Item Quantity Reference Part Manuf Manuf PN 34 1 R5 10nF R6 R7 R8 R9 35 11 R10 R11 R12 0 R13 R14 R15 R70 R16 R51 R66 36 7 R112 R116 R117 DNI R189 a LAN R29 R52 R75 R76 R80 R88 38 14 R104 R108 R109 0 R110 R111 R118 R186 R187 39 2 R33 R36 1M 40 1 R67 18 41 5 PE d 4 10K 42 1 R81 500 43 1 R82 2 49K 44 1 R84 4 99K 45 1 R89 3 57K 46 1 R90 2 87K 47 1 R105 DNI 48 1 R192 4k 49 1 SW1 PB SWITCH OMRON B3SN 3012P 50 1 sw2 8 POS 50 MIL SMT SON TDAO8HOSK1R 51 1 SW6 TS01CQE C amp amp K Div TS01CQE 52 3 TP1 TP5 TP6 T POINT S 53 1 U1 SN65DSI86 TI SN65DSI86ZQER 54 1 U2 SN74LVC1G07DCK TI SN74LVC1G07DCK 55 1 U3 TPS3808 T
5. Failure to remove these resistors will result in signal integrity issues These resistors are located on the bottom of PCB underneath Table 2 J4 Pin out Pin Name Pin Name 1 DSI A3P 2 DSI B3P 3 DSI A3N 4 DSI B3N 5 GND 6 GND 7 GND 8 GND 9 DSI A2P 10 DSI B2P 11 DSI A2N 12 DSI B2N 13 GND 14 GND 15 GND 16 GND 17 DSI ACLKP 18 DSI BCLKP 19 DSI ACLKN 20 DSI BCLKN 21 GND 22 GND Submit Documentation Feedback Copyright O 2014 Texas Instruments Incorporated IA TEXAS INSTRUMENTS www ti com Hardware Description Table 2 J4 Pin out continued Pin Name Pin Name 23 GND 24 GND 25 DSI A1P 26 DSI B1P 27 DSI AIN 28 DSI B1N 29 GND 30 GND 31 GND 32 GND 33 DSI A0P 34 DSI BOP 35 DSI_AON 36 DSI BON 37 RESETN 38 IRQ 39 I2C SDA 40 I2C SCL 2 1 2 J1 Hirose FX Type Connector P N FX6A 40S 0 8SV2 J1 is a Hirose FX type connector that can be mated with a matching FX plug on the top The part number for the mating connector is FX6A 40P 0 8SV2 J1 provides a DSI input connection only to the DSI Ch A signals J1 also provides access to I2C and other miscellaneous signals such as IRQ This connector is only available in Revision 1 and 2 of the EVM Table 3 J1 Pin out Pin Name Pin Name 1 NC 2 NC 3 NC 4 NC 5 NC 6 NC 7 NC 8 NC 9 GND 10 NC 11 DSI ACLKP 12 GND 13 DSI ACLKN
6. lessen the likelihood of failures that might cause harm and take appropriate remedial actions Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety critical applications In some cases TI components may be promoted specifically to facilitate safety related applications With such components TI s goal is to help enable customers to design and create their own end product solutions that meet applicable functional safety standards and requirements Nonetheless such components are subject to these terms No TI components are authorized for use in FDA Class Ill or similar life critical medical equipment unless authorized officers of the parties have executed a special agreement specifically governing such use Only those TI components which TI has specifically designated as military grade or enhanced plastic are designed and intended for use in military aerospace applications or environments Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer s risk and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use Tl has specifically designated certain components as meeting ISO TS16949 requirements mainly for automotive use In any case of use of non designated products TI will not be responsible for any failure to meet ISO TS1
7. 14 NC 15 GND 16 NC 17 DSI AOP 18 l2C SCL 19 DSI AON 20 I2C SDA 21 GND 22 GND 23 DSI A1P 24 IRQ 25 DSI AIN 26 NC 27 GND 28 NC 29 DSI A2P 30 NC 31 DSI_A2N 32 GND 33 GND 34 NC 35 DSI_A3P 36 NC 37 DSI_A3N 38 NC 39 GND 40 GND 2 1 3 J1 100 mil Male Header J1 is a 2x16 100 mil male header J1 provides DSI input connection only to the DSI Ch A signals J1 also provides access to I2C and other miscellaneous signals such as IRQ This connector is only available in Revision 3 of the EVM SLLU204 June 2014 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated SN65DSI86 SN65DSI96 EVM User s Manual 7 2 2 2 2 1 2 2 2 IA TEXAS INSTRUMENTS Hardware Description www ti com Table 4 J1 Pin out Pin Name Pin Name GND 2 GND 3 DSI AON 4 I2C SCL 5 DSI AOP 6 I2C SDA 7 GND 8 GND 9 DSI A1N 10 IRG 11 DSI A1P 12 NC 13 GND 14 GND 15 DSI A2N 16 NC 17 DSI A2P 18 NC 19 GND 20 GND 21 DSI A3N 22 NC 23 DSI A3P 24 NC 25 GND 26 GND 27 DSI ACLKN 28 NC 29 DSI ACLKP 30 NC 31 GND 32 GND Connectors for DSIX6 Output Ports There are two output port options available on the EVM for the DisplayPort output signals By default the DisplayPort interface signals from the SN65DSIX6 are connected to the J9 connector To use the J6 follow these capacitor select options Table 5 J6 and J9 Selection Options Component Install Reguire
8. 50ohm impedance Keep away from other high speed signals especially all MIN signals Keep lengths within 5mil of each other Keep traces on layers adjacent to the ground plane Keep the number of VIAS to minimum if VIAS used make it symetrical through all signals Keep diff pairs separated atleast byx3 of the trace width NO STUBS on the signal path components should be placed such that the signals can routed in pass thru manner IRQ m TPONTS IRQ uz SNTANCIGOTDCK RO QUT Di IRG LED py LED Orange SN65DSI86 96 BOARD iPSV BOARD 1PaV 7 4 Slave Addr 0x2D 0101101 ADDR 0 Slave Addr 0x2C 0101100 pasooo 292929598 i DsieoN i Dsicectke i DSICECLKN DSI INPUT Mc Map mon Mop Ae AUXN HPD gros Gpios Gpio2 GPIot Ne SNasDSI85 Rs do Place as near as possible to terminal on Ut IMPORTANT If REFCLK is to be have a shared used the CLK trace length between the REFCLK terminal and the source of the REF m CLK OSC or Xtal 7 should be kept as short pe as possble R104 and R105 KREFCLK quc scL RI2C SDA lt ma EDP MSN EDP MLIP EDP MzN ME EDP ML2P MCN EDP MLIN TTP mon EDP MP EDP MLON COP EDP Moe HB ae EDP AUX Hs UY Rp gu 2 wo PI x GPlo4 GPlo3 Re oz GPIO1 a7 AMUX aem ca ES1 Device R111 populate with 0
9. and against any and all claims damages losses expenses costs and liabilities collectively Claims arising out of or in connection with any handling and or use of EVMs User s indemnity shall apply whether Claims arise under law of tort or contract or any other legal theory and even if EVMs fail to perform as described or expected Safety Critical or Life Critical Applications If user intends to use EVMs in evaluations of safety critical applications such as life support and a failure of a TI product considered for purchase by user for use in user s product would reasonably be expected to cause severe personal injury or death such as devices which are classified as FDA Class III or similar classification then user must specifically notify TI of such intent and enter into a separate Assurance and Indemnity Agreement A RADIO FREQUENCY REGULATORY COMPLIANCE INFORMATION FOR EVALUATION MODULES Texas Instruments Incorporated TI evaluation boards kits and or modules EVMs and or accompanying hardware that is marketed sold or loaned to users may or may not be subject to radio frequency regulations in specific countries General Statement for EVMs Not Including a Radio For EVMs not including a radio and not subject to the U S Federal Communications Commission FCC or Industry Canada IC regulations TI intends EVMs to be used only for engineering development demonstration or evaluation purposes EVMs are not finished products typ
10. any applicable federal state or local laws and regulatory requirements including but not limited to U S Food and Drug Administration regulations if applicable related to its handling and use of EVMs and if applicable compliance in all respects with such laws and regulations 10 User has sole responsibility to ensure the safety of any activities to be conducted by it and its employees affiliates contractors or designees with respect to handling and using EVMs Further user is responsible to ensure that any interfaces electronic and or mechanical between EVMs and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard 11 User shall employ reasonable safeguards to ensure that user s use of EVMs will not result in any property damage injury or death even if EVMs should fail to perform as described or expected 12 User shall be solely responsible for proper disposal and recycling of EVMs consistent with all applicable federal state and local requirements Certain Instructions User shall operate EVMs within TI s recommended specifications and environmental considerations per the user s guide accompanying documentation and any other applicable requirements Exceeding the specified ratings including but not limited to input and output voltage current power and environmental ranges for EVMs may cause property damage personal injury or de
11. default the sensor is located at the I2C slave address of 0x29 R188 installed and R189 uninstalled The I2C slave address can be changed to 0x49 uninstall R188 and install R189 or 0x39 by uninstall R188 and uninstall R189 Reference CLK Programmability The SN65DSIX6 EVM incorporates programmable CLK circuitry using Tl programmable device CDCEL913 The output of the CDCEL913 is connected to the reference CLK of the SN65DSIX6 The CLK can be programmed via I2C signals brought out to on board connectors J9 J12 or J10 When J10 is used jumpers should be placed on J9 and J12 The default frequency of the REFCLK is set to 27MHz DIP Switch Configuration The DIP switch lets the user operate the device and EVM in different configurations When the switch is in an open position the corresponding signal is tied high When the switch is in ON closed position the corresponding signal is tied to GND Table 7 DIP Switch Settings DEFAULT CONFIG DIP SW No Signal Name Description Open Off HIGH Closed On LOW General Purpose I O Defaults to Input Also X used to select REFCLK freguency General Purpose I O Defaults to Input Also X used to select REFCLK freguency General Purpose I O Defaults to Input Also X used to select REFCLK freguency General Purpose I O Defaults to Input Also X used to select REFCLK freguency SW2 1 GPIO1 SW2 2 GPIO2 SW2 3 GPIO3 SW2 4 GPIO4 Sets the I2C sl
12. for DSIA and DSIB NOTE Add mounting holes as instructed in the layout notes Ja OSH 02001 40 noso tac SDA PG234 IRG aoa R ANNE BOARD RESETN PG24 DSI BON Sa lt lt DSI AON PG23 DsiBoP SS X DS AP PG23 osien COSI AIN Poza DSI_B1P lt DSL ATP PG23 DSI BCLKN KS CDSI ACLKN PG23 DSI_BCLKP KC CDSI_ACLKP PG23 DSI B2N lt E DSI_AZN PG23 ps RDS AP PG23 mmo g lt DSI AN Poza DSLBS lt QDSLASP PG23 y i d NOTE This connector is to interface DSI interface with any source with SMA connectors via Samtec to SMA cable BOARD apay BOARD Pay cas NENA baa T 0 tuF m NG un 1 5 E veca voce EDP BL ENABLE sour EDPBLENABLER 3j alt Gros PG24 5 2 DR eno SNTAAVGTTASDCKR DIRL BtoA DIRH AtoB BOARD 3P3V BOARD_1PaV A 7 4 0 1uF ow Ni 0 tur ole T vw c 1 B RD og veca vece 3 4 EDP pwm oim ua EDP pwu piu A Pi E Spas E DIR GND a la SNTAAVETTASDCKR DIRL BtoA DIRH AtoB Figure 8 SN65D5186 96 EVM BOARD sv BOARD sPSV A om Hon EDP pi PWR 2 E HDRIXI Ma AA AA LED Aum Pa e Ay EE Ec even inoe T EDPIXINUN CEDP_MLOP PG2 eve pano 9 5 xum S BOARD 3P3V BL E A og Hr a EDP ML1P PG2 RIAA teo e E cem Siete P
13. lt i2c_write addr 0x2D count 1 radix 16 gt 95 00 lt i2c_write gt lt sleep ms 10 gt Semi Auto TRAIN lt i2c_write addr 0x2D count 1 radix 16 gt 96 OA lt i2c_write gt lt sleep ms 20 gt lt i2c_write addr 0x2D count 0 radix 16 gt 96 lt i2c_write gt lt sleep ms 20 gt lt i2c_read addr 0x2D count 1 radix 16 gt 00 lt i2c_read gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 2 radix 16 gt 20 80 07 lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 2 radix 16 gt 24 38 04 lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 2 radix 16 gt 2C 10 80 lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 2 radix 16 gt 30 OE 80 lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 1 radix 16 gt 34 98 lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 1 radix 16 gt 36 13 lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 1 radix 16 gt 38 10 lt i2c_write gt SN65DSI86 SN65DSI96 EVM User s Manual Copyright O 2014 Texas Instruments Incorporated IA TEXAS INSTRUMENTS www ti com SLLU204 June 2014 Submit Documentation Feedback IA TEXAS INSTRUMENTS www ti com Sample Total Phase Aardvark I2C Host Adapter Scripts lt sleep ms 10 gt lt i2c_write addr 0x2D count 1 radix 16 gt 3A 03
14. sole responsibility and risk with respect to the following 1 User agrees and acknowledges that EVMs are intended to be handled and used for feasibility evaluation only in laboratory and or development environments Notwithstanding the foregoing in certain instances TI makes certain EVMs available to users that do not handle and use EVMs solely for feasibility evaluation only in laboratory and or development environments but may use EVMs ina hobbyist environment All EVMs made available to hobbyist users are FCC certified as applicable Hobbyist users acknowledge agree and shall comply with all applicable terms conditions warnings and restrictions in this document and are subject to the disclaimer and indemnity provisions included in this document 2 Unless otherwise indicated EVMs are not finished products and not intended for consumer use EVMs are intended solely for use by technically qualified electronics experts who are familiar with the dangers and application risks associated with handling electrical mechanical components systems and subsystems 3 User agrees that EVMs shall not be used as or incorporated into all or any part of a finished product User agrees and acknowledges that certain EVMs may not be designed or manufactured by TI 5 User must read the user s guide and all other documentation accompanying EVMS including without limitation any warning or restriction notices prior to handling and or using EVMs Such notices
15. 15 7 Sample Total Phase Aardvark I2C Host Adapter Scripts ccceeeeee seen eee eres aaa aaa aaa m 19 7 1 1920x1080 60Hz 24bpp DSI A Channel Only and 2 DP at HBR ss 19 7 2 2560x1440 60Hz 24bpp Dual DSI Channels and 2 DP at HBR2 esee 21 7 3 Enabling ASSRIN PM GINA ANN AA 23 List of Figures 1 SN65DSIX6EVM Revi OF REV2 Ks m 4 2 SN65DSIBXEVM Rev Banana nn ue a aa Aa 5 3 SN65DSIX6 EVM Block Diagram adan Dinner mr temen nr rn la NES 6 4 DS 86 EDP 30RIN e 9 5 DS GG DAO RUIN lacas 10 6 DSI86 96 Rev1 EVM Example Setup sis 280458888 nana anna anna anna aa nan nnn nnn nnn nnn nnn 12 7 SN65DS186 96 EVM PAA 15 8 SN65DS186 96 EMM eset DL 16 9 SN65DSIBO 96 EVM zou asis as aaa AA tia 17 10 SN65DSIBO 96 EVIM esses a eua cen eene E NGA aii 18 11 SN65DSIBO 96 E VIVIS smod eese aisiais asa iai ai aaa a ass E SOS 19 List of Tables 1 SN65DSIX6 Features Summary uaap da NGABA ANA 3 2 J4 PINOUT ins ij aj ii ii manana i i ii i i i aaa 6 SLLU204 June 2014 SN65DSI86 SN65DSI96 EVM User s Manual 1 Submit Documentation Feedback Copyright O 2014 Texas Instruments Incorporated I TEXAS INSTRUMENTS www ti com 3 X dl AA i ei asa AA AA 7 4 A NGA vases a NANANA Dn Gi is NAGA AN La AG ANNA 8 5 J6sand JO Selection OPTIONS avecina ces ceeds Do SR ox 8 6 J PMO UT sein EU I T E 8 7 DIP Witch Settings L
16. 15 of the FCC Rules Operation is subject to the following two conditions 1 This device may not cause harmful interference and 2 this device must accept any interference received including interference that may cause undesired operation Changes or modifications could void the user s authority to operate the equipment FCC Interference Statement for Class A EVM devices This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at its own expense FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device pursuant to part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instructio
17. 2 3 2 4 2 5 The DSI86 EDP_40PIN daughterboard supports up to 4 eDP lanes This board is intended to mate to an eDP panel that has a pin out that matches Table 6 4 in the VESA Embedded DisplayPort Standard Version 1 3 This board has a Samtec QTH 020 01 H D DP A for mating to J6 on the SN65DS186 96 EVM board and an IPEX receptacle part 20455 040E 02 for interfacing to an eDP panel The ribbon cable for connecting the eDP panel to this daughterboard should use a IPEX plug part 20453 040T 11S or equivalent Figure 5 DSI86 EDP 40PIN 12C Access to I2C signals are provided via DSI input connectors J1 J4 J10 or J16 I2C signal levels should be at 1 8 V when the 12C interface is accessed through connectors J1 J4 or J16 3 3 V to 1 8 V voltage translation is provided when an 12C host is connected through J10 A standalone external I2C host can connect via J10 for debug purposes An example of an external I2C host controller is the Total Phase Aardvark I2C SPI host adapter Total Phase Part TP240141 Sample scripts for this I2C Host controller are provided in Section 7 Enable and Reset There are three device enable and reset options for the EVM Supervisor circuitry option This is the default configuration The enable EN signal is held low until the power good PG from the 1 8V voltage regulator reaches a stable high voltage level then the EN is released high RC timing option The C10 external capacitor and intern
18. 3 issued by Ministry of Internal Affairs and Communications on March 28 2006 based on Sub section 1 1 of Article 6 of the Ministry s Rule for Enforcement of Radio Law of Japan 2 Use EVMs only after user obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to EVMs or 3 Use of EVMs only after user obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect to EVMs Also do not transfer EVMs unless user gives the same notice above to the transferee Please note that if user does not follow the instructions above user will be subject to penalties of Radio Law of Japan http www tij co jp BRERA ORM NARF RESEULSORD S SE FAREY NEURONA SAMO ZEACBLTE BRABTOLO ALFOUTHAOBBEM TUE UEFE ESO CCE ELE EN 1 ENCARAR B 11858 15 CO lt E PLI 4E3 H28 H GE E m 881739 COE I0 5 m TE EORR ES SEO ARRE C C JR U TIE IE e 2 READ RF EREKTA 3 NBA AA EREKTA o 38 ARE 1520 CERCO TOA CREA BRALBALCURY BE BECE BUENELES ELRe TEUSUER SXXEOBIRIZ3SRIe Nna TEEST TEATAR EE ARTHEDA TYAYIDXYVYRAASE oA EHBIXPEMHOIH244515 AMEHEN http www tij co jp Texas Instruments Japan Limited address 24 1 Nishi Shinjuku 6 chome Shinjuku ku Tokyo Japan IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections enhancements improvements and other changes to its semiconductor products and services per JESD46 latest is
19. 6949 Products Applications Audio www ti com audio Automotive and Transportation www ti com automotive Amplifiers amplifier ti com Communications and Telecom www ti com communications Data Converters DLP Products DSP Clocks and Timers Interface Logic Power Mgmt Microcontrollers RFID OMAP Applications Processors Wireless Connectivity dataconverter ti com www dlp com www ti com clocks interface ti com logic ti com microcontroller ti com www ti rfid com www ti com omap Computers and Peripherals Consumer Electronics Energy and Lighting Industrial Medical Security Space Avionics and Defense Video and Imaging TI E2E Community www ti com wirelessconnectivity www ti com computers www ti com consumer apps www ti com energy www ti com industrial www ti com medical www ti com security www ti com space avionics defense www ti com video Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2014 Texas Instruments Incorporated
20. I TPS3808g18DBVT 56 1 U4 SN74LVC1G08DCK TI SN74LVC1G08DCK 57 1 U5 CDCEL913PW TI CDCEL913PW 58 1 U6 TXS0102DCUT TI TXS0102DCUT 59 2 U8 U9 TPS74201RGWT TI TPS74401RGWT 60 a Utt U12 PATI T45DCK Ti 22 T45DCK 61 1 U13 TSL2561T TAOS TSL2561T 62 1 U14 TPS62142RGTR TI TPS62142RGTR 63 1 Y1 27MHZ crystal ABRACON kai 14 SN65DSI86 SN65DSI96 EVM User s Manual SLLU204 June 2014 Submit Documentation Feedback Copyright O 2014 Texas Instruments Incorporated IA TEXAS INSTRUMENTS www ti com EVM Schematics 6 EVM Schematics The following pages contain schematics for the SN65DSI86 96 EVM Note Bypass cay should be placed near Ut SNGSDSIBS e nu Eur a e T WG os Our en cs ou 0 uF Reset Implementation Reset EN can be implemented with passive components as shown or active circuitry In case of using passive components the i values of the RC circuitry need to be i adjusted to make sure the low to high transition occurs after the Vcc supply has reached the minimum recommende i operating voltage For this reason it is recommended to USE ACTIVE CIRCUITRY for better control of the RESET EN timing ETE i Ex erc 1 Ra Li Layout Notes For all differential pairs DSI and DisplayPort in this design follow the guidelines decribed elow Route together with controlled differential 1000hm impedance and controlled single ended
21. IA TEXAS INSTRUMENTS SN65DSI86 SN65DSI96 EVM User s Manual User s Guide SLLU204 June 2014 This guide describes how to use and configure the SN65DSI86 or SN65DSI96 EVM with recommendations for system hardware implementation These recommendations are only guidelines the designer is responsible for all system characteristics and requirements Refer to the datasheet for technical details such as device operation and terminal description Contents 1 OVEVIW qe d 1 1 What are SN65DSI86 and SN65DSI96 cu euna nanana asana nana ANAN NANANA NANANA anna nnns nnn nnn nnn 3 1 2 What is the SN65DSIX6 EVM ocio a eren E n sore I MEA ii a ERN EDS ii MEET EE EE EE 3 1 3 What is Included in the SN65DSIX6 EVM esse heme hn ennemi nnne 3 1 4 What does the EVM look liKe caius ND iais kiai i i ij 4 2 Hardware Description n 6 2 1 Gonnectors for DSIX6 Input POrtS 22 2 iia i i i da 6 2 2 Connectors for DSIX6 Output Ports iren ener ad 8 2 3 poc 10 2 4 Enable and Reset nanas i GA AA PAN 10 2 5 POWER E E EEEE 10 2 6 Ambient LIGHTS SMS OM a 11 2 7 Reference CLK Programmability oocooccccccccoccnoncncnncnancnonnncancnancncnnnnancnnnnnnnnnnancnannnnnanos 11 2 8 DIP Switch Configurations RE a i i i Ai i eras M mene RE DU ce VERE E 14 3 Quick Start Guide qe 12 4 REfSTENCES AA ias ro i i i AA AA i PA 12 5 EVM Bill Of ENIM i ii i ii i i ii i i ii 12 6 EVM SGhHEMalICS Um
22. a of a type and maximum or lesser gain approved for the transmitter by Industry Canada To reduce potential radio interference to other users the antenna type and its gain should be so chosen that the equivalent isotropically radiated power e i r p is not more than that necessary for successful communication This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated Antenna types not included in this list having a gain greater than the maximum gain indicated for that type are strictly prohibited for use with this device Canada Industry Canada Compliance French Cet appareil num rique de la classe A ou B est conforme a la norme NMB 003 du Canada Les changements ou les modifications pas express ment approuv s par la partie responsable de la conformit ont pu vider l autorit de l utilisateur pour actionner l quipement Concernant les EVMs avec appareils radio Le pr sent appareil est conforme aux CNR d Industrie Canada applicables aux appareils radio exempts de licence L exploitation est autoris e aux deux conditions suivantes 1 l appareil ne doit pas produire de brouillage et 2 l utilisateur de l appareil doit accepter tout brouillage radio lectrique subi m me si le brouillage est susceptible d en compromettre le fonctionnement Concernant les EVMs avec antennes d t
23. achables Conform ment la r glementation d Industrie Canada le pr sent metteur radio peut fonctionner avec une antenne d un type et d un gain maximal ou inf rieur approuv pour l metteur par Industrie Canada Dans le but de r duire les risques de brouillage radio lectrique l intention des autres utilisateurs il faut choisir le type d antenne et son gain de sorte que la puissance isotrope rayonn e quivalente p i r e ne d passe pas l intensit n cessaire l tablissement d une communication satisfaisante Le pr sent metteur radio a t approuv par Industrie Canada pour fonctionner avec les types d antenne num r s dans le manuel d usage et ayant un gain admissible maximal et l imp dance requise pour chaque type d antenne Les types d antenne non inclus dans cette liste ou dont le gain est sup rieur au gain maximal indiqu sont strictement interdits pour l exploitation de l metteur Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright O 2014 Texas Instruments Incorporated Important Notice for Users of EVMs Considered Radio Frequency Products in Japan EVMs entering Japan are NOT certified by Tl as conforming to Technical Regulations of Radio Law of Japan If user uses EVMs in Japan user is required by Radio Law of Japan to follow the instructions below with respect to EVMs 1 Use EVMs in a shielded room or any other test facility as defined in the notification 17
24. al resistor control the EN ramp time after the device is powered on C10 is a DNI Do Not Install option by default C10 must be installed and R52 must be uninstalled to enable this option External control option A push button SW1 or a J16 pin 9 is available for the manual control of the EN signal Power The 5 V 17 V power supply can be used to operate the SN65DSIX6 EVM A plug to accept a 5 V to 17 V wall power adapter is provided on the EVM J13 The EVM is designed to accommodate a maximum current of 1 5 A The current consumption of the board without the back light driver enabled is about 75 mA SN65DSIX6 device power The SN65DSIX6 consumes about 23 mW at power on and up to 320 mW depending on the system configurations The total power consumption of the board could vary depending on the LCD panels when the on board back light driver is used When an LCD panel consumes more current than 1 5 A minus 75 mA SN65DSIX6 device power the external back light source should be used SN65DSI86 SN65DSI96 EVM User s Manual SLLU204 June 2014 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated l TEXAS INSTRUMENTS www ti com Hardware Description 2 6 2 7 2 8 Important Do not plug in any power source higher than the configured voltage 17 V Ambient Light Sensor The SN65DSIX6 EVM incorporates a TAOS TSL2561T ambient light sensor An external GPU can use this sensor with the SN65DSI96 By
25. ample Total Phase Aardvark I2C Host Adapter Scripts 22 lt i2c_write addr 0x2D count 0 radix 16 gt 96 lt i2c_write gt lt sleep ms 20 gt lt i2c_read addr 0x2D count 1 radix 16 gt 00 lt i2c_read gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 2 radix 16 gt 20 00 05 lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 2 radix 16 gt 22 00 05 lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 2 radix 16 gt 24 AO 05 lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 2 radix 16 gt 2C 20 00 lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 2 radix 16 gt 30 05 80 lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 1 radix 16 gt 34 50 lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 1 radix 16 gt 36 21 lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 1 radix 16 gt 3A 03 lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 1 radix 16 gt 5B 00 lt i2c_write gt lt sleep ms 10 gt COLOR BAR lt i2c_write addr 0x2D count 1 radix 16 gt 3C 00 lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 1 radix 16 gt 5A OC lt i2c_write gt lt sleep ms 10 gt SN65DSI86 SN65DSI96 EVM User s Manual Copyright 2014 Texas Instru
26. ath If there are questions concerning these ratings user should contact a TI field representative prior to connecting interface electronics including input power and intended loads Any loads applied outside of the specified output range may result in unintended and or inaccurate operation and or possible permanent damage to the EVM and or interface electronics Please consult the applicable EVM user s guide prior to connecting any load to the EVM output If there is uncertainty as to the load specification please contact a TI field representative During normal operation some circuit components may have case temperatures greater than 60 C as long as the input and output are maintained at a normal ambient operating temperature These components include but are not limited to linear regulators switching transistors pass transistors and current sense resistors which can be identified using EVMs schematics located in the applicable EVM user s guide When placing measurement probes near EVMs during normal operation please be aware that EVMs may become very warm As with all electronic evaluation tools only qualified personnel knowledgeable in electronic measurement and diagnostics normally found in development environments should use EVMs Agreement to Defend Indemnify and Hold Harmless User agrees to defend indemnify and hold TI its directors officers employees agents representatives affiliates licensors and their representatives harmless from
27. ave address of the SN65DSIX6 by SW2 5 ADDR controlling the ADDR X pin High 0x2D default Low 0x2C SW2 6 TEST Reserved Texas X Instruments use only Reserved Texas Instruments use only SW2 7 TEST2 For DP compliance X testing make dip switch position to OFF high Enables 3 3V voltage SW2 8 I2C 3V3EN translator for the I2C X signals SLLU204 June 2014 SN65DSI86 SN65DSI96 EVM User s Manual 11 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated IA TEXAS INSTRUMENTS Quick Start Guide www ti com 3 Quick Start Guide 1 Plug in a DSI source to J1 or J4 Refer to Section 2 1 for details on these connectors All used DSI inputs should be held at LP11 state during this step 2 Plug in a DisplayPort video sink device on J9 Standard DisplayPort connector or J6 eDP breakout connector Refer to Section 2 2 for details on these connectors 3 Plug in an I2C host on J10 if using an external I2C host Correctly configure the DIP switch setting 5 Apply power to the EVM The following LEDS should light up D3 and D6 D1 may light up depending on the configuration 6 Configure the device for the desired mode of operation via I2C Example Aardvark scripts are provided in Section 7 gt 7 Start video streaming on the DSI input 8 Video output should be observed after the configuration is complete Figure 6 DSI86 96 Rev1 EVM Example Setup 4 Refere
28. cense to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from TI under the patents or other intellectual property of TI Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties conditions limitations and notices TI is not responsible or liable for such altered documentation Information of third parties may be subject to additional restrictions Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice Tl is not responsible or liable for any such statements Buyer acknowledges and agrees that it is solely responsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related information or support that may be provided by TI Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures monitor failures and their consequences
29. contain important safety information related to for example temperatures and voltages For additional information on TI s environmental and or safety programs please visit www ti com esh or contact TI 6 User assumes all responsibility obligation and any corresponding liability for proper and safe handling and use of EVMs 7 Should any EVM not meet the specifications indicated in the user s guide or other documentation accompanying such EVM the EVM may be returned to TI within 30 days from the date of delivery for a full refund THE FOREGOING LIMITED WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY TI TO USER AND IS IN LIEU OF ALL OTHER WARRANTIES EXPRESSED IMPLIED OR STATUTORY INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE TI SHALL NOT BE LIABLE TO USER FOR ANY INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES RELATED TO THE HANDLING OR USE OF ANY EVM 8 No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine process or combination in which EVMs might be or are used TI currently deals with a variety of customers and therefore TI s arrangement with the user is not exclusive Tl assumes no liability for applications assistance customer product design software performance or infringement of patents or services with respect to the handling or use of EVMs 9 User assumes sole responsibility to determine whether EVMs may be subject to
30. d SLLU204 June 2014 Submit Documentation Feedback IA TEXAS INSTRUMENTS www ti com Sample Total Phase Aardvark I2C Host Adapter Scripts 2 M S 5V to 17V 3 3V REGULATOR 1 8V REGULATOR TO BE PLACED ACROSS PCB AS CONVENIENT FOR OSCILLOSCOPE PROBE GROUNDS Mi Texas INSTRUMENTS Figure 11 SN65DSI86 96 EVM 7 Sample Total Phase Aardvark I2C Host Adapter Scripts 7 1 1920x1080 60Hz 24bpp DSI A Channel Only and 2 DP at HBR lt aardvark gt lt configure i2c 1 spi 1 gpio 0 tpower 1 pullups 0 gt lt i2c_bitrate khz 100 gt lt i2c_write addr 0x2D count 1 radix 16 gt 10 26 lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 1 radix 16 gt 5A 04 lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 1 radix 16 gt 93 20 lt i2c_write gt SLLU204 June 2014 SN65DSI86 SN65DSI96 EVM User s Manual 19 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated Sample Total Phase Aardvark I2C Host Adapter Scripts 20 sleep ms 10 gt lt i2c_write addr 0x2D count 1 radix 16 gt 94 80 lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 1 radix 16 gt 0D 01 lt i2c_write gt lt sleep ms 10 gt POST2 0dB
31. ee J21 aa HT r EDP MP Paz HE mpicovec 1 BE kappa pe ADR ma PST ue soa ray G RUB Geen LNG germe Per Bo ERA nare uam E Rus om BOARD sPSV A na m ok We a2 us s DP AUXP PG2 nos Uds OPT CAD ML 3n A DP ML3N PG2 bs o ML 3p Pg DP ML3P PG2 ML 2n amp lt DP_ML2N PG2 eis Pd ML 2p g DP ML2P PG2 ML 1n CDP MLIN PG2 KA mm L GND10 ML p Fy DP MLIP PG2 GND9 ML On DP MLON PG2 e ue Ka Ed PM Pee 83 Dip Pot Connector Source asa LSP Sei or cam MOT ne RIS Es ras A M E oa FF 16 SN65DSI86 SN65DSI96 EVM User s Manual Copyright 2014 Texas Instruments Incorporated SLLU204 June 2014 Submit Documentation Feedback IA TEXAS INSTRUMENTS www ti com EVM Schematics BOARD 1Pav BOARD 1PEV Bi HEADER 1x10 a BOARD_RESETN RESETE VDD mr uu Ue emm polu uU DIPSW TPS380841BDBVT all i BOARD apay BOARD iPEV BOARD iPtV i Note Place caps i near the part rene Reo AK voz se Rot ak voin2 5 sw2 POS SAL SMT CAK ITT CANNON TDAC2HOSKIR sw si PB SWITCH ES SikScreen TEST1 and TEST2 for Texas Instruments internal use only TESTI shall be left unconnected or tied to GND TEST2 shall be left unconnected or tied to GND For DP compliance testing TEST2 needs to be pulled up to 1 8V EDC XN Note o Place caps BOARD 1PBV BOARD 3P3V Y CS 242 esta nare A Note Place ca
32. ically fit for general consumer use EVMs may nonetheless generate use or radiate radio frequency energy but have not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC or the ICES 003 rules Operation of such EVMs may cause interference with radio communications in which case the user at his own expense will be required to take whatever measures may be required to correct this interference General Statement for EVMs including a radio User Power Frequency Use Obligations For EVMs including a radio the radio included in such EVMs is intended for development and or professional use only in legally allocated frequency and power limits Any use of radio frequencies and or power availability in such EVMs and their development application s must comply with local laws governing radio spectrum allocation and power limits for such EVMs It is the user s sole responsibility to only operate this radio in legally acceptable frequency space and within legally mandated power limitations Any exceptions to this are strictly prohibited and unauthorized by TI unless user has obtained appropriate experimental and or development licenses from local regulatory authorities which is the sole responsibility of the user including its acceptable authorization U S Federal Communications Commission Compliance For EVMs Annotated as FCC FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant Caution This device complies with part
33. lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 1 radix 16 gt 5B 00 lt i2c write gt lt sleep ms 10 gt COLOR BAR lt i2c_write addr 0x2D count 1 radix 16 gt 3C 00 lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 1 radix 16 gt 5A OC lt i2c_write gt lt sleep ms 10 gt lt aardvark gt 7 2 2560x1440 60Hz 24bpp Dual DSI Channels and 2 DP at HBR2 lt aardvark gt configure i2c 1 spi 1 gpio 0 tpowerz 1 pullups 0 gt i2c bitrate khz 100 gt lt i2c_write addr 0x2D count 1 radix 16 gt 10 00 lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 1 radix 16 gt 5A 04 lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 1 radix 16 gt 93 20 lt i2c_write gt lt sleep ms 10 gt lt i2c_write addr 0x2D count 1 radix 16 gt 94 E0 lt i2c writes lt sleep ms 10 gt lt i2c_write addr 0x2D count 1 radix 16 gt 0D 01 lt i2c_write gt lt sleep ms 10 gt POST2 0dB i2c write addr 0x2D count 1 radix 16 gt 95 00 lt i2c writes lt sleep ms 10 gt Semi Auto TRAIN lt i2c write addr 0x2D count 1 radix 16 gt 96 OA lt i2c_write gt lt sleep ms 20 gt SLLU204 June 2014 SN65DSI86 SN65DSI96 EVM User s Manual 21 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated S
34. ment J6 C63 C64 C65 C66 C67 C68 C69 C70 C71 C72 J9 Default C73 C74 C75 C76 C77 C78 C79 C80 C81 C82 J9 Standard DisplayPort Male Connectors Molex P N 47272 0001 J9 is a standard DisplayPort male connector widely used in notebooks and desktops for interfacing to external DisplayPort capable monitors DisplayPort cables for connecting to this connector and a external monitor can be obtained from a third party source J6 Samtec QSH type Connector P N QSH 020 01 H D DP A J6 is a Samtec QSH type connector that can be mated with a matching QTH type connector on the top The J6 provides DSI input connections to DisplayPort signals and accesses the back light power and its related signals XC connections are open vias if a connection to other signals is required The mating connector part number is QTH 020 01 H D DP A For an SMA type connection a HDR 128291 XX breakout board from Samtec can be used The HDR 128291 XX is a breakout board with a mating connector to J6 and standard SMA male connectors via cables More info on this breakout board can be obtained from the Samtec website Table 6 J6 Pin out Pin Name Pin Name 12C_SDL LVCMOS 3 3V Level I2C SDA LVCMOS 3 3V Level 5 GND 6 GND 1 ML3N 2 3 ML3P 4 8 SN65DS186 SN65DS196 EVM User s Manual SLLU204 June 2014 Submit Documentation Feedback Copyright O 2014 Texas Instruments Incorporated IA TEXAS
35. ments Incorporated IA TEXAS INSTRUMENTS www ti com SLLU204 June 2014 Submit Documentation Feedback IA TEXAS INSTRUMENTS www ti com Sample Total Phase Aardvark I2C Host Adapter Scripts lt aardvark gt 7 3 Enabling ASSR in Panel ASSR must be enabled in the panel before link training is performed lt aardvark gt lt configure i2c 1 spi 1 gpio 0 tpower 1 pullups 0 gt lt i2c bitrate khz 100 gt lt i2c write addr 0x2D count 1 radix 16 gt 64 01 lt i2c writes gt lt i2c write addr 0x2D count 1 radix 16 gt 74 00 lt i2c writes gt lt i2c write addr 0x2D count 1 radix 16 gt 75 01 lt i2c writes gt lt i2c write addr 0x2D count 1 radix 16 gt 76 OA i2c write gt lt i2c write addr 0x2D count 1 radix 16 gt 77 01 lt i2c writes gt lt i2c write addr 0x2D count 1 radix 16 gt 78 81 lt i2c write gt lt sleep ms 10 gt lt i2c write addr 0x2D count 1 radix 16 gt 5A 05 lt i2c writes lt sleep ms 10 gt lt aardvark gt SLLU204 June 2014 SN65DSI86 SN65DSI96 EVM User s Manual 23 Submit Documentation Feedback Copyright O 2014 Texas Instruments Incorporated ADDITIONAL TERMS AND CONDITIONS WARNINGS RESTRICTIONS AND DISCLAIMERS FOR EVALUATION MODULES Texas Instruments Incorporated TI markets sells and loans all evaluation boards kits and or modules EVMs pursuant to and user expressly acknowledges represents and agrees and takes
36. nces SN65DSIX6 Datasheet 5 EVM Bill of Materials Table 8 EVM Bill of Materials Item Quantity Reference Part Manuf Manuf PN C1 C38 C39 C42 1 7 C45 C46 C57 er C2 C11 C28 C83 2 5 C91 1 0uF 12 SN65DS186 SN65DS196 EVM User s Manual SLLU204 June 2014 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated IA TEXAS INSTRUMENTS www ti com EVM Bill of Materials Table 8 EVM Bill of Materials continued Item Quantity Reference Part Manuf Manuf PN C3 C4 C6 C7 C9 C56 C59 C61 C62 C73 C74 8 al C75 C76 C77 oup C78 C79 C80 C81 C82 C89 C90 4 4 C5 C8 C58 C60 0 01uF C10 C63 C64 C65 C66 C67 3 12 C68 C69 C70 DNI C71 C72 C84 6 1 C22 220pF C23 C29 C30 7 10 C31 C32 C33 0 1uF C85 C86 C87 C88 8 1 C24 18pF C25 C26 C44 9 3 C48 C55 EN 10 2 C27 C37 22uF GRM21BR61E106K 11 1 C35 10uF Murata A73L 12 1 C36 22uF Murata GRM31CR61E226K E15L 13 1 C40 3 3nF 14 2 C43 C47 0 01uF 15 1 D1 LED Orange 0805 Rohm SML 211DTT86 670 1006 16 1 D3 LED Green 0805 Arrow Lumex SML_LX0805GC 17 1 D6 LED RED 0805 Rohm SML 211UT 18 1 D8 20V 1A Comchip CDBA120SL G 19 1 FB4 220 100MHZ Murata BLM18EG221SN1D 20 1 J1 2x16 Male Header Sullins PBC16DAAN 21 2 J4 J6 QSH 020 01 Samtec Ban OLD DP A 22 3 J7 J8 J11 HDR2X1 M 1 AMP 103321 2 Display Port Conn
37. ns may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation If this equipment does cause harmful interference to radio or television reception which can be determined by turning the equipment off and on the user is encouraged to try to correct the interference by one or more of the following measures Reorient or relocate the receiving antenna Increase the separation between the equipment and receiver Connect the equipment into an outlet on a circuit different from that to which the receiver is connected Consult the dealer or an experienced radio TV technician for help Industry Canada Compliance English For EVMs Annotated as IC INDUSTRY CANADA Compliant This Class A or B digital apparatus complies with Canadian ICES 003 Changes or modifications not expressly approved by the party responsible for compliance could void the user s authority to operate the equipment Concerning EVMs Including Radio Transmitters This device complies with Industry Canada licence exempt RSS standard s Operation is subject to the following two conditions 1 this device may not cause interference and 2 this device must accept any interference including interference that may cause undesired operation of the device Concerning EVMs Including Detachable Antennas Under Industry Canada regulations this radio transmitter may only operate using an antenn
38. ocument may include the references to SN65DSI86 instead of addressing both part numbers For the purposes of this document the SN65DSI86 is interchangeable with the SN65DSI96 PCB design and layout files are provided upon request to aid the PCB design with a SN65DSIX6 component The layout files are a guideline for implementing the SN65DSIX6 with illustrations of the routing and placement rules The EVM design includes test components to evaluate the SN65DSIX6 which may not applicable for production What is Included in the SN65DSIX6 EVM The major components of the EVM are SN65DSI86ZQE or SN65DSI96ZQE Samtec QSH type connectors on DSI and eDP interfaces Standard DisplayPort connector Hirose type connector on DSI Ch A interface 12C programming interface for an external I2C host connection SLLU204 June 2014 SN65DSI86 SN65DSI96 EVM User s Manual 3 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated IA TEXAS INSTRUMENTS Overview www ti com 1 4 What does the EVM look like TEXAS INSTRUMENTS Figure 1 SN65DSIX6EVM Rev1 or Rev2 4 SN65DSI86 SN65DSI96 EVM User s Manual SLLU204 June 2014 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated IA TEXAS INSTRUMENTS www ti com Overview Figure 2 SN65DSI8X EVM Rev 3 SLLU204 June 2014 SN65DSI86 SN65DSI96 EVM User s Manual 5 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated
39. ohm resistor R5 populate with 10nF capacitor Production Device R111 populate with 51K 1 resistor R5 should be a DNI RED AUXN OP MAN OF Mae DP man OP MIP OP MAN ROP MP Dr MON OP Moe DP AWP DF AUXN Mi Texas INSTRUMENTS SN65DSI86 96 Size c Figure 7 SN65DSI86 96 EVM SLLU204 June 2014 Submit Documentation Feedback SN65DSI86 SN65DSI96 EVM User s Manual Copyright 2014 Texas Instruments Incorporated 15 EVM Schematics IA TEXAS INSTRUMENTS www ti com PG23 PG23 PG23 PG23 PG23 PG23 PG23 PG23 PG23 PG23 DSL AN DSL ADP DSL AN DSMP DSLAZN DSILA2P DSI ASN DSILA3P DSL ACLKN DSLACLKP PG234 PG23 PG2 PG2 PG2 PG2 PG2 PG2 DSI ChA Display Expansion Connector 1 2 3h 2h SAA FPO 3 i wesc PORO Ke 20T s 6f5 lac SDA PGZ34 RH enm Sio BD ae LT Rio Di FXPT mjo a BY Vang ina Poza KE 207 aji pm kis re jis Mie SIA FXPZ m5 me lt a 20T Wo fe Ris mens tania 2 x SH FPS 312 IE mi so 1201 3 AS RT EX CLKN 25 B amp T 9727 28 30 KI fa mar He E E 32 2x16 Header Malo NOTE Remove R6 R15 for DSI source connected to J4 Populate R6 R15 when a source connected through J1 RB R15 to be placed as near as J4 to avoid stub when J1 is not in use Samtec to SMA Connector
40. ps near the part veca vor 12c spa er pa i PLACE CLOSE B2 2 22c SCL SLSDA i TOUS 120 3VSEN sasa i cup oE i i Em CDCELSISPW oND 1 x Bo SDA apv go coc st spa 1 Mc scLaesv cast Header 5x2 0 1 thrhole 126 SDA NOTE COC SDA ON SHUNT on CDC SDAand CDC SCL pint and 2 if external I2C host via J10 for I2C programming of CDC device coc s2 LA 3 TEXAS INSTRUMENTS HORIX MA RESET AND CDC ZE c DWGNO sene oe ree fn Figure 9 SN65DSI86 96 EVM SLLU204 June 2014 SN65DSI86 SN65DSI96 EVM User s Manual 17 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated IA TEXAS INSTRUMENTS EVM Schematics www ti com BOARD_3P3V BOARD_3P3V A A R189 R191 DNI 4 7K 10402 70402 5 4 a 1 x I2C SDA SESV I2C SDA 3P3V PG3 4 O SCL RN 12C_SCL_3P3V PG3 4 C89 TSL INT 0 1uF us vais Isao 4 I2C SLAVE ADDRESS 0x29 or 0101001 ASEL 0 j TSL2561T ET 0x39 or 0111001 ASEL float 875 9x49 or 1000101 ASEL 1 10402 5 Mia TEXAS INSTRUMENTS AMBIENT LIGHT SENSOR SIZE A DWG NO SCALE NONE TENET Figure 10 SN65DSI86 96 EVM 18 SN65DSI86 SN65DSI96 EVM User s Manual Copyright O 2014 Texas Instruments Incorporate
41. sue and to discontinue any product or service per JESD48 latest issue Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete All semiconductor products also referred to herein as components are sold subject to TI s terms and conditions of sale supplied at the time of order acknowledgment TI warrants performance of its components to the specifications applicable at the time of sale in accordance with the warranty in TI s terms and conditions of sale of semiconductor products Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty Except where mandated by applicable law testing of all parameters of each component is not necessarily performed Tl assumes no liability for applications assistance or the design of Buyers products Buyers are responsible for their products and applications using TI components To minimize the risks associated with Buyers products and applications Buyers should provide adequate design and operating safeguards TI does not warrant or represent that any license either express or implied is granted under any patent right copyright mask work right or other intellectual property right relating to any combination machine or process in which TI components or services are used Information published by TI regarding third party products or services does not constitute a li

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