User`s Manual
Contents
1. 33 APPENDIX C REGISTER STRUCTURE AND FORMA T 35 APPENDIX D 82C54 COUNTER FUNC TION 65 APPENDIX E WAVEFORM OF EACH MODI 73 Contents iii This page is left blank for hard printing iv This page is left blank for hard printing vi 1 Introduction 1 1 Thank you for buying the Advantech PCE 1755 PCI 1755 is a Ultra Speed 32 ch Digital I O card for the PCI bus Its digital I O channels are TTL compatible and use 741 S244 driver buffer circuits to provide high output driving capacity These buffered circuits also require lower input loading current than regular TTL circuits The ultra speed data transfer functions fulfill your industrial or laboratory application needs The following sections of this chapter will provide further information about features of the multifunction cards a Quick Start for installation together with some brief information on software and accessories for the PCI 1755 card Features B Bus mastering DMA data transfer with Scatter Gather technology W 32 16 8 bit Pattern I O with start and stop trigger function 2 mode Handshaking I O Interrupt handling capability On board active terminators for high speed and long2. fmm RE DO control register STP1 STPO STR1 STRO SC2 SC1 SCO M1 MO DO status register LI I T Teepesewpesp Tsspss se T paume DO control register KT ACKT REO D TITT TT Te sis DO status register CLK ACK REQ STP STR Sel R a er Pattern match register es ee em 2 e Ge s Te e a Pattern match register eo ee er SD e T2 T Te Pattern match register Je e cer ae cs cs sn se em ew e ev e Pattern match register w res eo Tes Tes es Tes es Tes Tes en Tenes JasJer av Interrupt control register D DI6 D 014 D D D DIO 07 De 98 02 on oo Interrupt status register DI6 DIS DI4 DI2 DII DIO FFF TRE TRE e e woe eT e gt a Interrupt control register EXE EE Interrupt status register DET PERS Te TT gt T Ten 36 Table C 1 PCL1755 register format Part 2 HX 15 14 13 12 1 0 9 8 7 6 5 4 3 2 1 9 DO FIFO direct pepa ors ore ov ovo p ve o7 6 65 54 63 22 vv DI FIFO direct ois pa ors o oo gt ps 58 ps os v 22 DO FIFO direct oat p gt p gt vas pz ss bs 02s ps om ai 3o po oss o
3. 0 Stop on terminal count 1 Programmable one shot Rate generator 0 10 Software triggered strobe 5 O Hardware triggered strobe BCD Select binary or BCD countering BCD Type 0 Binary counting 16 bits 1 Binary coded decimal BCD counting If you set the module for binary counting the count can be any number from 0 up to 65535 If you set it for BCD Binary Coded Decimal counting the count can be any number from 0 to 9999 If you set both SC1 and SCO bits to 1 the counter control register is in read back command mode The control register data format thenbecomes BASE 2CH 82C54 control bit read back mode Bit D7 D6 D5 D4 D3 D2 DI DO Value 1 1 STA C2 X CNT 0 Latch count of selected counter s STA 0 Latch status of selected counter s C2 C1 amp C0 Select counter for a read back operation C2 1 select Counter 2 C1 1 select Counter 1 1 select Counter 0 If you set both SC1 and SCO to 1 and STA to O the register selected by C2 to CO contains a byte which shows the status of the counter The data format of the counter read write register then becomes 67 BASE 20 24 28H 82C54 Standard read back mode Bit D7 D6 D5 D3 D2 DI DO Vale NC RWI RWO M2 MI MO BCD Current state of counter output 68 D3 Counter Operating Modes MODEO Stop on Terminal Count The output will initially be low after you set this mode of operation After you load the count into the
4. Pattern match register CS Pattern match register 1 C31 C0 Compare data C 6 Interrupt Control Register BASE 0CH Table C 5 PCI 1755 Register for Interrupt Control Base ep Interrupt control register kn NE 017 06 05 Dis 012 DIO l TETETETETETETE Te Te e T Ts e Interrupt control register WwW EC ES E S RN UR E 1 Din Interrupt by digital input enable 1 DInRF DI triggering control 0 Rising edge trigger 1 Falling edge trigger 3 CH4 CHO Channel of change detection 4 CD Interrupt by DI change detection enable 5 PM Interrupt by pattern match enable 6 TM Interrupt by 8254 timer2 enable 7 OV DI FIFO overflow enable 8 UN DO FIFO underflow enable 9 DI STP Interrupt by DI STP enable 10 DO STP Interrupt by DO STP enable 11 IE Interrupt enable ONo occurred 1Occurred n 0 to 7 45 DO FIFO Direct BASE 10H Table C 6 PCI 1755 Register for DO FIFO Direct Base E GZEREXEIECERGEXREXENSESESEIERETNESERES DO FIFO direct Me DO FIFO direct 1 031 00 DO FIFO direct data 46 C 8 DI O CLK STR and STP BASE 14H Table C 7 PCI 1755 Register for DI O CLK STR and STP Base ECSEXEGESESESEGEZZLHNESEZEXEZEXENESES DI O CLK STR and STP w DO DL CLK CLK DI O CLK STR and STP w DO DI DW1 DWO ia TERM 1 DI CLK DI CLK command 0 DI stop triggering 1
5. os v pr 59 Pa or em w or s m se TESTE IEEE ED as os EEB ss 30 DI Control Register BASE 0 Table C 2 PCI 1755 Register for DI Control Register 0 DI Control Register whe BDGomrolRegister PI SPST DI Control Register W HSO CLK ACK REQ STP STR 1 M1 MO Digital input mode 00 Disable 01 Normal mode 10 Handshaking mode 2 5 2 5 0 Sampling clock select 000 Disable 001 30 MHz sampling clock 010 15 MHz sampling clock 011 10 MHz sampling clock 100 TimerO output of 8254 101 External clock input by EXT CLKIN 3 STR1 STRO Start mode of normal DI 00 Disable 01 Software command 10 Trigger signal occurred from DI STR 11 Pattern DI 4 STP1 STPO Stop mode of normal DI 00 Disable 01 Software command 10 Trigger signal occurred from DI STP 11 Pattern DI 5 STRRF DI STR triggering control 0 Rising edge trigger 1 Falling edge trigger 6 STPRF DI STP triggering control 0 High level active 1 Low level active 40 7 DI triggering control 0 High level active 1 Low level active 8 ACKRF DI triggering control 0 High level active 1 Low level active 9 CLKRF Sampling clock triggering control 0 Rising edge trigger 1 Falling edge trigger 10 HS0 Handshaking mode 0 Bur
6. 64 GND PB06 15 65 GND 7 66 GND DI ACK 67 GND DI REQ 68 GND EXT 69 GND DI STR 70 GND DI STP 71 GND DIO0 22 72 GND DIO1 2 73 GND DIO2 24 74 GND DIO3 25 75 GND DIO4 26 76 GND DIO5 27 7 GND DIO6 28 78 GND DIO7 29 79 GND DO ACK 30 80 GND DO REQ 3l 8l GND EXT CLKOUT 32 82 GND DO STR 33 83 GND DO STP 34 84 GND 35 s GND PC01 36 86 GND PCO2 37 87 GND 38 88 GND PCO4 89 GND PCO5 90 GND 91 GND 7 92 GND PDOO 93 GND PDOL 94 GND PDO2 95 GND PD03 96 GND PD04 97 GND 98 GND PD06 99 GND PD07 100 GND Fig 3 2 I O connector pin assignments for the PCI 1755 25 Connector Signal Description Table 3 2 I O connector signal descriptions Signal Name Reference Direction Description 7 GND Port A bi directional DIO channels PB00 PB07 GND Port B bi directional DIO channels PC00 PC07 GND Port C bi directional DIO channels PD00 P D07 GND Port D bi directional DIO channels DI ACK GND Output Acknowledge line for digital input channels DI REQ GND Input Request line for digital input channels EXT CLKIN GND Input Clock input channel DI STR GND Input Start trigger line for digital input channels DI STP GND Input Stop trigger line for digital input channels DO ACK GND Input Acknowledge line for digital output channels DO REQ GND Output Request line for digital output channels EXT CLKOUT GND Output Clock output channel DO STR GND Input Start trigger line for digit
7. DI start triggering 2 DO CLK DO command ODO stop triggering 1 DO start triggering 3 DI TERM DI Terminator OFF ON OTerminator ON 1Terminator OFF 4 DO TERM DO Terminator OFF ON OTerminator ON 1Terminator OFF 5 DW1 DWO Double word wide 00 DI port is Double word 32 bit wide 01 DO port is Double word 32 bit wide 10 Both of DI and DO ports are Word 16 bit wide 11 Both of DI and DO ports are Byte 8 bit wide 47 C 9 Clear Interrupt BASE 18H Table C 8 PCI 1755 Register for Clear Interrupt eV JJ Write this address clear interrupt Clear Interrupt w Write this address clear interrupt Write this address clear interrupt 48 C 10 Clear BASE 1C H Table C 9 PCI 1755 Register for Clear FIFO Base Pro isis Clear FIFO 1CH W fr s Fr NG L 1 1 DI Clear DI FIFO command ON A 1Clear DI FIFO 2 DO Clear DO FIFO command 0 N A 1Clear DO FIFO 3 OV Clear DI FIFO overflow flag 0 N A 1 Clear DI FIFO overflow flag 4 UN Clear DO FIFO underflow flag 0 N A 1 Clear DO FIFO underflow flag 49 C 11 Auxiliary DO BASE 30 H Table C 10 PCI 1755 Register for Auxiliary DO Base e ys k uspa Auxiliary DO p AMD I p b D PER La I sS s s Auxiliary DO w 1 DOn Digital output data n 0 to 7 50 C 12 DO Value Pres
8. STP triggering control 0 High level active 1 Low level active 53 7 DI REQ triggering control 0 High level active 1 Low level active 8 ACKRF DI ACK triggering control 0 High level active 1 Low level active 9 CLKRF Sampling clock triggering control 0 Rising edge trigger 1 Falling edge trigger 10 HS0 Handshaking mode 0 Burst Handshaking 1 8255 Emulation 11 FE FIFO empty 0 No occurred 1 Occurred 12 FH FIFO half full 0 No occurred 1 Occurred 13 FF FIFO full 0 No occurred 1 Occurred 14 0V FIFO overflow flag 0 No occurred 1 Occurred 54 15 DO Status Register BASE 4 H Table C 14 PCI 1755 Register for DO Status Base ECSEGESEJESENEGERESEZETEXKEZ DO status register DO status register CLK ACK REQ STP STR Pel 1 M1 MO Digital output mode 00 Disable 01 Normal mode 10 Handshaking mode 2 SC1 SC0 Sampling clock select 000 Disable 001 30 MHz sampling clock 010 15 MHz sampling clock 011 10 MHz sampling clock 100 Timer1 output of 8254 101 External clock input by EXT CLKIN 3 STR1 STRO Start mode of normal mode 00 Disable 01 Software command 10 Trigger signal occurred from DO STR 4 STP1 STPO Stop mode of normal mode 00 Disable 01 Software command 10 Trigger signal occurred from DO STP 5 STRRF DO STR triggering control 0 Rising edge trigger 1 Falling edge trigger 6 STPRF DO STP triggering
9. count register during counting the new count will be loaded on the next CLK pulse The count will be inhibited while the GATE input is low MODE 5 Hardware Triggered Strobe The counter will start counting after the rising edge of the trigger input and will go low for one clock period when the terminal count is reached The counter is retriggerable 70 D4 Counter Operations Read Write Operation Before you write the initial count to each counter you must first specify the read write operation type operating mode and counter type in the control byte and write the control byte to the controlregister BASE 2CH Since the control byte register and all three counter read write registers have separate addresses and each control byte specifies the counter it applies to by SC1 and SCO no instructions on the operating sequence are required Any programming sequence following the 82C54 convention is acceptable There are three types of counter operation Read load LSB read load MSB and read load LSB followed by MSB It is important that youmake your read write operations in pairs and keep track of the byte order Counter Read back Command The 82C54 counter read back command lets you check the count value programmed mode and current states of the OUT pin and Null Count flag of the selected counter s You write this command to the control word register Format is as shown at the beginning of this section The read back com
10. signal to PCI 1755 and then one unit of data will be transmitting from PCI 1755 to the external device DO REQ DO ACK Data court 2 y gt V Na Handshaking Mode of Ultra speed Digital Output 8255 Emulation NOTE The DO_REQand DO_ACK signal are shown as active low ONLY in handshaking mode of 8255 Emulation 79
11. 1 DI Value Preview BASE 34 H Table C 20 1755 Register for DI Value Preview Base ECGEREXESEESESEZESESEREIESERNESERES DI Value Preview s sI rer E MER DRE s DI Value Preview D31 D0 DI port value preview 62 C 22 DI FIFO in BASE 38 H Table C 21 1755 Register for DI FIFO in Base eV NJ Read this address DI port value into DI FIFO ZH Read this address DI port value into DI FIFO Read this address DI port value into DI FIFO 63 This page is left blank for hard printing 64 Appendix D 82C54 Counter Function D 1 Overview The PCI 1755 uses one Intel 82C54 compatible programmable interval timer counter chip The popular 82C54 offers three independent 16 bit counters counter 0 counter 1 and counter 2 Each counter has a clock input control gate and an output You can program each counter for maximum count values from 2 to 65535 The 82C54 has a maximum input clock frequency of 10 MHz The PCI 1755 provides 10 MHz input frequencies to the counter chip from an onboard crystal oscillator Counter 0 On 1755 counter 0 can be a 16 bit timer or an event counter selectable by users When the clock source is set as an internal source counter 0 15 16 bit timer when set as an external source then counter 0 is an event counter and the clock source comes from 0 The counter is controlled by CNTO GATE When CNTO GATE input is high counter 0 will begin to co
12. Copyright The documentation and the software included with this product are copyrighted 2003 by Advantech Co Ltd rights are reserved Advantech Co Ltd reserves the right to make improvements in the products described in this manual at any time without notice No part of this manual may be reproduced copied translated or transmitted in any form or by any means without the prior written permission of Advantech Co Ltd Information provided in this manual is intended to be accurate and reliable However Advantech Co Ltd assumes no responsibility for its use nor for any infringements of the rights of third parties which may result from its use Acknowledgments PC LabCard is a trademark of Advantech Co Ltd IBM and PC are trademarks of International Business Machines Corporation MS DOS Windows Microsoft Visual C and Visual BASIC are trademarks of Microsoft Corporation Intel and Pentium are trademarks of Intel Corporation Delphi and C Builder are trademarks of Borland Corporation CE notification The 1755 developed by ADVANTECH CO LTD has passed the CE test for environmental specifications when shielded cables are used for external wiring We recommend the use of shielded cables This kind of cable is available from Advantech Please contact your local supplier for ordering information On line Technical Support For technical support and service please visit our support website at http www advantech com supp
13. TTL compatible 010 7 and Timer 2 Pattern match and Change detection DI FIFO overflow and DO Interrupt Source JF underflow DI STP and DO STP Power Available at 5 45 25 Voc 1 connector I SE 30 Pacer Timer 0 Timer 1 and Timer 2 Timer pacer for digital input Timer pacer for digital output Interrupt source Base Clock 10MHz Cable 1 0 Connector Type 100 100 pin SCSI II male male Length im Twisted pair cable Each signal conductor is twisted with a ground conductor that establishes a low inductance uniform transmission line Using the Schottky Diode Termination Scheme to prevent from overshooting undershooting and reflection phenomenon Resistive termination scheme is not recommended because of the current drawn by the termination resistors Type Termination scheme General 1 0 Connector Type 100 pin SCSI II female 175 mm x 100 mm 6 9 x 3 9 Terminator OFF 5 V 1 07 A Terminator ON 45V Q 11 Power Consumption Terminator OFF 45 V 132 Terminator ON 45V Q 1 36A 0 460 32 140 F refer to IEC 68 2 1 2 Temperature 20 485 Q 4 185 F 059 Relative Humidity Certification CE certified Typical Operation 3l This page is left blank for hard printing 32 Appendix B Block Diagram 33 This page is left blank for hard printing 34 Appendix C Register Structure and F
14. al output channels DO STP GND Input Stop trigger line for digital output channels 0100 0107 GND General purpose digital input output channels GND Ground reference for all other signals 26 This page is left blank for hard printing 28 Appendix A Specifications Digital Input Output Part 1 32 TTL compatible Number of ports Port A Port B Port C and Port 8 bits port m 32DI P A P D default 32DO PA PD 16DI PA PB amp 1600 PC PD 8DI PA amp 8DO PC Programmable On board FIFO 16KB for DI amp 16KB DO channels Bus Mastering DMA with Scatter Gather Data Transfer Bus Width 8 16 32 bits programmable Transfer DI 80MBytes sec 32 bit 20MHz Characteristis 120MBytes sec 32 bit 30 MHz external pacer when data Max Transfer length is less than FIF0 size Rate DO 80MBytes sec 32 bit 20MHz 120MBytes sec 32 bit 30 MHz external pacer when data length is less than FIFO size Handshaking Mode Clock source for Burst Handshaking Fini D Pattern Generation predetermined rate by internal external Clock Source for Internal 30MHz 15MHz 10MHz Timer 0 Normal Mode Clock Source for Internal 30MHz 15MHz 10M Hz Timer 1 Software command Trigger signal occurred from DI STR StartMode o STR Patter DI Stop Mode Software command Trigger signal occurred from DI STP for DI orDO STR for DO Pattern DI Finite transfers Monitor the selected input ch
15. annel and capture data whenever there is a transition on one of the channels and then issue a IRQ Clock Source for Internal 30MHz 15MHz 10M Hz Timer 0 Change Detection DI External EXT CLKIN DI only Start Mode Software command Trigger signal occurred from DI STR Pattern DI Software command Trigger signal occurred from DI STP Pattern DI Finite transfers Internal 30MHz 15MHz 10MHz Timers for DI amp Timer 1 for DO External EXT CLKIN for DI amp EXT CLKOUT for DO 29 Digital Input Output 2 Di trigger signa DO trigger signal DO STR DO STP High Trigger Capabity Trigger Type 10 ns min edge triggers Pattern trigger detection Detect pattern match on user selected data lines capabilities The messages can be generated when M in 1 Specified number of bytes have been transferred essaging 2 When a specified input pattern is matched 3 When a measurement operation completes On board Schottky diode termination Input Voltage Lo OV min 0 8 V max 2 0 V min 5V max Terminator OFF TTL compatible Low 40 5V8 High 2 1V AmA max Terminator ON Input Load Terminator 110 Resistor Termination Voltage Low 40 5V 02 4 42 740 mA max 0 5V max 2 IN min Output Voltage m 0 5 V max 448 sink Driving Capacity 2 4 V min 15 mA source 500 mV DI Channels 10 DI7 TTL compatible Generat purpose DI O o Channels 200 DOT
16. ce If the external device is ready to get the data it will also enable the DO ACK signal to PCI 1755 and then the data will be transmitting from PCI 1755 to the external device according to EXT CLKOUT Clock Source EXT CLKOUT DO REQ DO ACK Data court Handshaking Mode of Ultra speed Digital Output Burst NOTE 1 Inthis instance DO REQ and DO signal are shown as active high 2 There are two types of DO clock source listed below 30MHz 15MHz 10MHz timer 1 Etema JEXT_CLKIN 77 Handshaking mode of 8255 Emulation Ultra Speed Digital Input For the 8255 Emulation Ultra Speed Digital Input if the external device would like to transmit the data to 1755 it will send a DI REQ signal to PCI 1755 If PCI 1755 is ready to get the data it will also response a DI ACK signalto external device and then one unit of data will be transmitting from external device to the PCI 1755 DI REQ DI ACK Data court 2 SS Handshaking Mode of Ultra speed Digital Input 8255 Emulation NOTE The DI REQ and DI ACK signal are shown as active low ONLY in handshaking mode of 8255 Emulation 78 Handshaking mode of 8255 Emulation Ultra Speed Digital Output For the 8255 Emulation Ultra Speed Digital Output the PCI 1755 would like to transmit the data to the external device it will send REQ signal to external device If the external device is ready to get the data it will also response a DO ACK
17. control 0 High level active 1 Low level active 7 DO triggering control 0 High level active 55 1 Low level active 8 ACKRF DO triggering control 0 High level active 1 Low level active 9 CLKRF Sampling clock triggering control 0 Rising edge trigger 1 Falling edge trigger 10 HS0 Handshaking mode 0 Burst Handshaking 1 8255 Emulation 11 FE FIFO empty 0 No occurred 1 Occurred 12 FH FIFO half full 0 No occurred 1 Occurred 13 FF FIFO full 0 No occurred 1 Occurred 14 UN FIFO underflow flag 0 No occurred 1 Occurred 56 C 16 Pattern Match Register BASE 8 H Table C 15 PCI 1755 Register for Pattern Match Base ECHEXESESESENEZESESESEZEXKZ E Pattern match register sss pn rene em Pattern match register 1 C31 C0 Compare data 57 C 17 Interrupt Status Register BASE 0C H Table C 16 PCI 1755 Register for Interrupt Status Base Interrupt status register OCH Payaman DI7 DI6 DIS DI3 DP DII DIO Interrupt status register T PEDE 1 Interrupt by digital input 2 DInRF DI triggering control 0 Rising edge trigger 1 Falling edge trigger 3 4 Channel of change detection 4 CD Interrupt by DI change detection flag 5 PM Interrupt by pattern match flag 6 Inte
18. cover of your computer Remove the slot cover on the back panel of your computer Touch the metal part on the surface of your computer to neutralize the static electricity that might be on your body Insert the PCI 1755 card into a PCI slot Hold the card only by its edges and carefully align it with the slot Insert the card firmly into place Use of excessive force must be avoided otherwise the card might be damaged Fasten the bracket of the PCI card on the back panel rail of the computer with screws Connect appropriate accessories 100 pin cable wiring terminals etc if necessary to the PCI card Replace the cover of your computer chassis Re connect the cables you removed in Step 2 Plug in the power cord and turn on the computer In case you installed the card without installing the DLL driver first Windows 95 98 ME will recognize your card as an unknown device after rebooting and will prompt you to provide the necessary driver You should ignore the prompting messages just click the Cancel button and set up the driver according to the steps described in 2 2 Driver Installation After the PCI 1755 card is installed you can verify whether it is properly installed on your system in the Device Manager 1 Access the Device Manager through Start Control Panel System Device Manage r 2 The device name of the PCI 1755 should be listed on the Device Manager tab the System Property Page 18154 Act
19. de of 1755 you can start to transmit the data from external device to the 1755 by start signal or stop it by stop signal You can generate start or stop signal by software command external trigger via DI STR DI STP and pattern DI When PCI 1755 gets the start signal it will start to receive data from external device at next clock Point A When PCI 1755 gets the stop signal it will stop to receive the data at next clock Point B A B Softwale commarld Trigger signal DI STR Pattern DI Stop Signal lt Clock Source Start Signal ftware command Trigger Sol signal DI STP Pattern DI S Normal Mode of Ultra speed Digital Input 73 NOTE 1 In this instance start stop signal are shown as active high 2 Note that you can t generate start and stop signal by pattern DI at the same time 3 There are two types of DI clock source listed below Internal _____ 30MHz 15MHz 10MHz timer 0 Exiemal EXT CLKIN 74 Normal Mode of Ultra Speed Digital Output In Normal mode of 1755 you can start to transmit the data from PCI 1755 to the external device by start signal or stop it by stop signal You can generate start or stop signal by software command external trigger via DO STR DO STP When PCI 1755 gets the start signal it will start to send data to external device at next clock Point A When PCI 1755 gets the stop signal from external device it will
20. de you through the board selection device setup and operation of your device 2 4 Device Setup amp Configuration The Device Manager program is a utility that allows you to setup configure and test your device and later store your settings on the system registry These settings will be used when you call the APIs of Advantech Device Drivers Setting Up and Configuring the Device Step 1 To install the I O device for your card you must first run the Device Manager program by accessing Start Programs Advantech Automation Device Manager Advantech Device Manager Step 2 You can then view the device s already installed on your system if any in the nstalled Devices list box Since you haven t installed any device yet you might see a blank list such as the one below Fig 2 4 Manager Advantech Device Your ePlatform Partner DS Installed Devices EN Supported Devices Advantech PCI 1751 add Advantech PCI 1752 Advantech PCI 1753 1753E About Advantech PCI 1754 m Advantech 1755 Advantech PCI 1755 Advantech PCI 1756 Advantech PCI 1757UP Advantech PCI 1760 Advantech PCI 1761 lt Fig 2 4 The Device Manager dialog box Step 3 Scroll down the Supported Devices box to find the device that you want to install then click the Add button to evoke the Device s Found dialog box It lists all t
21. distance transfers Pattern match and Change state detection interrupt function General purposed 8 ch The Advantech PCI 1755 offers the following main features Mastering Data Transfer The PCI 1755 supports PCI Bus mastering DMA for high speed data transfer By setting aside a block of memory in the PC the 1755 performs bus mastering data transfers without CPU intervention freeing the CPU to perform other more urgent tasks such as data analysis and graphic manipulation The function allows users to run all I O functions simultaneously at full speed without losing data Special Shielded Cable for Noise Reduction The PCL 101100 shielded cable is specially designed for the PCI 1755 for reducing noise Its wires are all twisted pairs with input signals and output signals separately shielded providing minimal cross talk between signals and offering the best protection against EMI EMC problems Keeping the Output Values after System Reset When the system is hot reset power is not shut off the 1755 can either retain the last digital output values or return to its default configuration depending on the jumper setting This practical function eliminates dangers and problems caused by an unexpected system reset On board FIFO Memory The 1755 provides an on board FIFO Fist In First Out memory buffer storing up to 16K samples for digital input and 16K for digital output conversion Patter
22. dual Drivers option Step 4 Select the specific device then just follow the installation instructions step by step to complete your device driver setup AD ANT ECH Device Driver V2 1 In po 2A 1773 PCH 720 1750 PCL1751 POM PCLITI2L PONIRE POLL PCLATWHGLPCLATII PCI 1711 1712 Full Installation Fig 2 2 Different options for Driver Setup For further information on driver related issues an online version of Device Drivers Manual is available by accessing Start Programs Advantech Automation Device Manager Device Driver s Manual 14 2 3 Hardware Installation After the DLL driver installation is completed you can now go on to install the 1755 card in any PCI slot on your computer But it is suggested that you should refer to the computer user manual or related documentation if you have any doubt Please follow the steps below to install the card on your system Note lt sure you have installed the driver first before you install the card please refer to 2 2 Driver Installation Step 1 Step 2 Step 3 Step 4 Step 5 Step 6 Step 7 Step 8 Step 9 Note Turn off your computer and unplug the power cord and cables TURN OFF your computer before installing or removing any components on the computer Remove the
23. et BASE434 Table C 11 PCI 1755 Register for DO Value Preset Base DO value preset rbk aeea DO value preset 1 D31 D0 DO port value preset 51 C 13 DO FIFO Out BASE 38 H Table C 12 PCI 1755 Register for DO FIFO Out Base EXER ERECTA See tem RI DO Out Write this address DO FIFO out to DO port DO FIFO Out Write this address DO FIFO out to DO port Write this address DO FIFO out to DO port 52 14 DI Status Register BASE 0 H Table C 13 PCI 1755 Register for DI Status Base DI Status Register DI Status Register CLK ACK REQ STP STR TT DOCIETETETETT 1 1 Digital input mode 00 Disable 01 Normal mode 10 Handshaking mode 2 5 2 5 0 Sampling clock select 000 Disable 001 30 MHz sampling clock 010 15 MHz sampling clock 011 10 MHz sampling clock 100 TimerO output of 8254 101 External clock input by EXT CLKIN 3 STR1 STRO0 Start mode of normal mode 00 Disable 01 Software command 10 Trigger signal occurred from DI STR 11 Pattern DI 4 STP1 STPO Stop mode of normal mode 00 Disable 01 Software command 10 Trigger signal occurred from DI STP 11 Pattern DI 5 STRRF DI STR triggering control 0 Rising edge trigger 1 Falling edge trigger 6 STPRF DI
24. he installed devices on your system Select the device you want to configure from the list box and press the OK button Step 4 After you have finished configuring the device click OK and the device name will appear in the Installed Devices box as the following Fig 2 5 Device Manager V2 0 Your ePlatform Partner bine me Davies Manager e My Computer 000 PCI 1755 BoardID 1 400 gt Supported Devices 2 Advantech DEMO Board Advantech PCI 1710 Advantech PCI 1710L 6 Advantech PCI 1710HG Advantech PCI 1710HGL Advantech PCI 1711 amp Advantech PCI 1711L PCI 1731 amp Advantech PCI 1712 gt Advantech PCI 1713 Fig 2 5 The Device Manager dialog box Note lt we have noted the device name 000 lt PCI 1755 BoardID 1 400 gt begins with a device number 000 which is specifically assigned to each card The device number is passed to the driver to specify which device you wish to control After your card is properly installed and configured you can click the Test button to test your hardware For more detailed information please refer to Chapter 2 of the Device Drivers Manual You can also find the rich examples on the CD ROM to speed up your programming 20 This page is left blank for hard printing 22 3 Signal Connections 3 1 Overview Maintaining signal connections is one of the
25. ion 5 585 51 888 Advantech DA amp C cards Advantech PCI17555 Device 9 48 Computer H Disk drives 6 88 Display adapters H A DVD CD ROM drives 8 52 Floppy disk controllers ED Floppy disk drives amp IDE ATA ATAPI controllers Keyboards A Mice and other pointing devices 2 Monitors 91 8 Network adapters 2 Other devices 8 7 Ports COM amp LPT 4 Sound video and controllers Mil System devices vi 9 8 8 DRE 1 89 B E E Ed EH Fig 2 3 The device name listed in the Device Manager Note lt D your card is properly installed you should see the device name of your card listed on the Device Manager tab If you do see your device name listed on it but marked with an exclamation sign it means your card has not been correctly installed In this case remove the card device from the Device Manager by selecting its device name and press the Remove button Then go through the driver installation process again After your card is properly installed on your system you can now configure your device using the Device Manager program that has itself already been installed on your system during driver setup A complete device installation procedure should include board selection and device setup After that you can operate this card through the operation The following sections will gui
26. m DI FIFO direct ar Jo p gt os o vss s oo pa Tn om s s or pie DI O CLK STR and STP Board ID R Jupe cp Ek DI O CLK STR and STP w DOT p DWO TER ERM M 1CH 1EH DO D CLK Board ID 11 ma Clear Interrupt Write this address clear interrupt Clear Interrupt Write this address clear interrupt Clear FIFO EE usps w Clear FIFO WwW FERIENE 37 HEX Table C 1 PCI 1755 register format Part 3 PCI 1755 Register Format i i 8254 Counter 0 Register 8254 Counter 0 Register 8254 Counter 0 Register 8254 Counter 0 Register 8254 Counter 1 Register 8254 Counter 1 Register 8254 Counter 1 Register W E 8254 Counter 1 Register 8254 Counter 2 Register w E gr xa 8254 Counter 2 Register 8254 Counter 2 Register 8254 Counter 2 Register I 8254 Control Register dresses 8254 Control Register 38 Base A A ddress PCI 1755 Register Format 15 14 13 12 10 8 7 6 5 4 3 2 1 o Auxiliary DO passos Auxiliary DI O HLR Auxiliary DO Auxiliary DI O ssp pese pss
27. mand can latch multiple counter output latches Simply set the CNT bit to 0 and select the desired counter s This single command is functionally equivalent to multiple counter latch commands one for each counter latched The read back command can also latch status information for selected counter s by setting STA bit 0 The status must be latched to be read the status of a counter is accessed by a read from that counter The counter status format appears at the beginning of the chapter Counter Latch Operation Users often want to read the value of a counter without disturbing the count in progress You do this by latching the count value for the specific counter then reading the value The 82C54 supports the counter latch operation in two ways The first way is to set bits 71 and RWO to 0 This latches the count of the selected counter in a 16 bit hold register The second way is to performa latch operation under the read back command Set bits SC1 and SCO to 1 and CNT 0 The second method has the advantage of operating several counters at the same time A subsequent read operation on the selected counter will retrieve the latched value 72 Appendix E Waveform of each mode 1755 provides two types of transmit modes for sample input data from external device to the PCI 1755 or output data from PCI 1755 to external device Normal Mode m Handshaking Mode Normal Mode of Ultra Speed Digital Input In Normal mo
28. most important factors in ensuring that your application system is sending and receiving data correctly A good signal connection can avoid unnecessary and costly damage to your PC and other hardware devices This chapter provides useful information about how to connect input and output signals to the 1755 via the I O connector 3 2 Switch and Jumper Settings The 1755 card has one function switch and five jumper settings iib Fig 3 1 Card connector jumper and switch locations 23 Table 1 1 Summary jumper settings Names of Jumpers Function Description g Keep last status after hot reset JP2 LJ Default configuration Board ID setting SW1 You can configure the Auxiliary DIO0 DIO7 Pin23 Pin29 randomly by SW2 For instance if you configure SW2 as A3 H it means DIO2 DIO3 DIO4 DIO6 were configured as digital output and DIOO DIO1 DIO5 DIO7 were configured as digital input Auxiliary DI O Setting SW2 1 Dio 5105 DIOS DIO0 Digital Output 0 0 o o 0 0 0 Digital Input 24 3 3 Signal Connections Pin Assignment Fig 3 2 shows the pin assignments for the 100 pin I O connector on the PCI 1755 1 51 GND PAOL 2 52 GND PAQ2 3 53 GND 4 54 GND 5 55 GND PAG 6 56 GND PA06 7 57 GND PAO7 8 58 GND 9 59 GND PBOL 10 60 GND PBO2 61 GND PBO3 12 62 GND PBO4 B 63 GND PBO5 14
29. n Match Function The 1755 provides Pattern Match interrupt function for digital input channels The card monitors the state of digital inputs and compares them with a pre set pattern When the received state matches the pre set pattern the PCI 1755 generates an interrupt signal to system Change of State Function Change of State interrupt function is provided at digital input channels When any signal line changes its state the card generates an interrupt to the system to handle this event Note lt For detailed specifications of the PCI 1755 please refer to Appendix Specifications 1 2 Applications 1 3 W High speed IC function test Parallel data transfer TTL DTL and CMOS logic signal sensing m Relay and switch monitoring and controlling Indicator LED driving nstallation Guide Before you install your PCI 1755 card please make sure you have the following necessary components 1 1755 DA amp C card 1755 User s Manual river software Advantech DLL drivers included in the companion CD ROM Wiring cable PCL 101100 option Wiring board ADAM 39100 option Computer Personal computer or workstation with a PCI bus slot running Windows 2000 9 5 98 ME NT XP Some other optional components are also available for enhanced operation plication software ActiveDAQ or other third party software packages After you get the necessary components and ma
30. ng 2 Installation 2 1 This chapter gives users a package item checklist proper instructions about unpacking and step by step procedures for both driver and card installation Unpacking After receiving your PCI 1755 package please inspect its contents first The package should contain the following items M PCI 1755 card Companion CD ROM DLL driver included User s Manual The PCI 1755 card harbors certain electronic components vulnerable to electrostatic discharge ESD ESD could easily damage the integrated circuits and certain components if preventive measures are not carefully paid attention to Before removing the card from the antistatic plastic bag you should take following precautions to ward off possible ESD damage Touch the metal part of your computer chassis with your hand to discharge static electricity accumulated on your body Or use a grounding strap Touch the antistatic bag to a metal part of your computer chassis before opening the bag Take hold of the card only by the metal bracket when removing it from the bag After taking out the card first you should Inspectthe card for any possible signs of external damage loose or damaged components etc If the card is visibly damaged please notify our service department or the local sales representative immediately Avoid installing a damaged card into your system Also pay extra caution to the following aspects to ensu
31. opment tools such as Visual C Visual Basic Borland C Builder and Borland Delphi Register level Programming Register level programming is reserved for experienced programmers who find it necessary to write code directly at the level of device registers Since register level programming requires much effort and time we recommend that you use the Advantech Device Drivers instead However if register level programming is necessary you should refer to the relevant information in Appendix C Register Structure and Format or to the example codes included on the companion CD ROM 1 5 Device Drivers Programming Roadmap This section will provide you a roadmap to demonstrate how to build an application from scratch using Advantech Device Drivers with your favorite development tools such as Visual C Visual Basic Delphi and C Builder The step by step instructions on how to build your own applications using each development tool will be given in the Device Drivers Manual Moreover a rich set of example source code is also given for your reference Programming Tools Programmers can develop application programs with their favorite development tools Visual C Gisual Basic Delphi Builder For instructions on how to begin programming works in each development tool Advantech offers a Tutorial Chapter in the Device Drivers Manual for your reference Please refer to the corresponding sections in this chapter of the Device D
32. ormat C 1 Overview The PCI 1755 is delivered with an easy to use 32 bit DLL driver for user programming under the Windows 2000 95 98 NT ME XP operating system We advise users to program the PCI 1755 using the 32 bit DLL driver provided by Advantech to avoid the complexity of low level programming by register The most important consideration in programming the 1755 at register level is to understand the function of the card s registers The information in the following sections is provided only for users who would like to do their own low level programming C 2 Port Address The PCI 1755 requires 32 consecutive addresses in the PC s I O space The address of each register is specified as an offset from the card s base address For example BASE 0 is the card s base address and BASE 6 is the base address plus six bytes Table C 1 shows the function of each register of the PCI 1755 or driver and its address relative to the card s base address 35 Base Address HEX w w w R w w w Table C 1 PCI 1755 register format Part 1 PCI 1755 Register Format FE BON DER ROI DI Control Register LI I Tsspss se T paume DI Status Register I qepeqgeepwee sss ww DI Control Register HSO CLK ACK REQ STP STR RF RF RF RF DI Status Register CLK ACK REQ STP STR
33. ort Part No 2003175500 Ist Edition Printed in Taiwan Jul 2003 This page is left blank for hard printing 1 INTRODUCTION 1 FEATURES 1 1 27 APPLICATIONS as S e ee e ed eme er eerte beer e 3 1 3 INSTALEATION GUIDE ettet et m e ee pre a eee E pu 3 1 4 SOFTWARE rte te oret retient erede rte rera e 5 1 5 DEVICE DRIVERS PROGRAMMING ROADMAP nennen tenente tnter ten 6 1 6 AGGESSORIES yu een e a UR 8 2 INSTALCA Un M 11 2 1 JUNPACKTNG 3 idR EE AUR UE A e ERO He neste 11 2 2 DRIVER INSTALLATION d e E e e RR AE RR HERES ERR 13 2 3 HARDWARE INSTALLATION rrsorerererereerererenenenensesenenenenensnsesenenesenenenssssrsnenenenessssssenenensssesesesensnsenees 15 2 4 DEVICE SETUP amp CONFIGURATION 18 3 SIGNAL CONNECTION S 23 E 23 3 2 SWITCH AND JUMPER SETTINGS 23 3 3 SIGNAL eerte eec metere 25 APPENDIX A SPECIFICATION S 29 APPENDIX B BLOCK DIA G RAMA
34. r in the Device Drivers Manual Troubleshooting Device Drivers Error Driver functions will return a status code when they are called to perform a certain task for the application When a function returns a code that is not zero it means the function has failed to perform its designated function To troubleshoot the Device Drivers error you can pass the error code to DRV_GetErrorMessage function and it will return the error message You can refer to the Device Drivers Error Codes Appendix in the Device Drivers Manual for a detailed listing of the Error Code Error ID and the Error Message 1 6 Accessories Advantech offers a complete set of accessory products to support the PCI 1755 card These accessories include Wiring Cable 9CL 101100 The PCL 101100 shielded cable is specially designed for PCI 1755 cards to provide high resistance to noise To achieve better signal quality the signal wires are twisted in such a way as to form a twisted pair cable reducing cross talk and noise from other signal sources Furthermore its analog and digital lines are separately sheathed and shielded to neutralize EMI EMC problems Wiring Board ORDAM 39100 The ADAM 39100 is 100 pin SCSLII wiring terminal module for DIN rail mounting This terminal module can be readily connected to the Advantech PC Lab cards and allow easy yet reliable access to individual pin connections for the PCI 1755 card This page is left blank for hard printi
35. re proper installation AM Avoid physical contact with materials that could hold static electricity such as plastic vinyl and Styrofoam Whenever you handle the card grasp it only by its edges DO NOT TOUCH 11 the exposed metal pins of the connector or the electronic components Note D Keep the antistatic bag for future use You might need the original bag to store the card if you have to remove the card from the PC or transport it elsewhere 12 2 2 Driver Installation We recommend you to install the driver before you install the PCI 1755 card into your system since this will guarantee a smooth installation process The Advantech Device Drivers setup program for the PCI 1755 card is included on the companion CD ROM that is shipped with your DA amp C card package Please follow the steps below to install the driver software Step 1 Insert the companion CD ROM into your CD ROM drive Step 2 The Setup program will be launched automatically if you have the AUTORUN function enabled on your system When the Setup program is launched you see the following Setup Screen Note D AUTORUN function is not enable on your computer use Windows Explorer or the Windows Run command to execute SETUP EXE on the companion CD ROM AD ANTECH _ one t Device Manager ActiveDAQ Individual Drivers Examples amp Utilities Fig 2 1 The Setup Screen of Advantech Automation Software Step 3 Select the Indivi
36. rivers Manual to begin your programming efforts You can also look at the example source code provided for each programming tool since they can get you very well oriented The Device Drivers Manual can be found on the companion CD ROM Or if you have already installed the Device Drivers on your system the Device Drivers Manual can be readily accessed through the Start button Start Programs Advantech Automation Device Manager Device Driver s Manual The example source codes could be found under the corresponding installation folder such as the default installation path Program Files Advantech ADSAPI Examples For information about using other function groups or other development tools please refer to the Creating Windows 95 NT 2000 Application with Device Drivers chapter and the Function Overview chapter on the Device Drivers Manual Programming with Device Drivers Function Library Advantech Device Drivers offers a rich function library to be utilized in various application programs This function library consists of numerous APIs that support many development tools such as Visual C Visual Basic Delphi and C Builder According to their specific functions or services those APIs can be categorized into several function groups Higital Input Output Function Group ort Function Group direct I O vent Function Group For the usage and parameters of each function please refer to the Function Overv iew chapte
37. rrupt by 8254 timer2 flag 7 OV DI FIFO overflow flag 8 UN DO FIFO underflow flag 9 DI STP Interrupt by DI STP flag 10 DO STP Interrupt by DO STP flag 11 IF Interrupt flag ONo occurred 1Occurred n 0 to 7 58 C 18 DI FIFO Direct BASE 10 H Table C 17 PCI 1755 Register for DI FIFO Direct Base ee PN DI FIFO direct DI FIFO direct 1 D31 D0 DI FIFO direct data 50 C 19 Board ID BASE 14 H Table C 18 PCI 1755 Register for Board ID Base E CGESESEZESESEZJEZESESESEIEZEBNESEXES Board ID Board ID pwipwo 1 BD3 BD0 Board ID 2 DI TERM DI Terminator OFF ON 0 Terminator ON 1 Terminator OFF 3 DO TERM DO Terminator OFF ON 0 Terminator ON 1 Terminator OFF 4 DW1 DWO Double word wide 00 DI port is Double word 32 bit wide 01 DO port is Double word 32 bit wide 10 Both of DI and DO ports are Word 16 bit wide 11 Both of DI and DO ports are Byte 8 bit wide 60 C 20 Auxiliary DI O BASE 30 H Table C 19 PCI 1755 Register for Auxiliary DI O Base Auxiliary DI O DIPS DiPa DiP DIOS DIOS Dios Doe Dior Auxiliary DI O 1 DIOn Digital input output data 2 DIPn Dip switch DI O value O Digital output 1 Digital input n 0 to 7 61 C 2
38. selected count register the output will remain low and the counter will count When the counter reaches the terminal count its output will go high and remain high until youreload it with the mode or a new count value The counter continues to decrement after it reaches the terminal count Rewriting a counter register during counting has the following results 1 Writing to the first byte stops the current counting 2 Writing to the second byte starts the new count MODE I Programmable One shot Pulse The output is initially high The output will go low on the count following the rising edge of the gate input It will then go high on the terminal count If you load a new count value while the output is low the new value will not affect the duration of the one shot pulse until the succeeding trigger You can read the current count at any time without affecting the one shot pulse The one shot is retriggerable thus the output will remain low for the full count after any rising edge at the gate input MODE2 Rate Generator The output will be low for one period of the input clock The period from one output pulse to the next equals the number of input counts in the counter register If you reload the counter register between output pulses the present period will not be affected but the subsequent period will reflect the value 69 The gate input when low will force the output high When the gate input goes high the counter will s
39. st Handshaking 1 8255 Emulation 41 C 4 DO Control Register BASE 4H Table C 3 PCI 1755 Register for DO Control Register Base DO control register ci CE DO control register w 50 LK ACK REQ STP STR RE RF 1 M1 MO Digital output mode 00 Disable 01 Normal mode 10 Handshaking mode 2 SC2 8C0 Sampling clock select 000 Disable 001 30 MHz sampling clock 010 15 MHz sampling clock 011 10 MHz sampling clock 100 Timer1 output of 8254 101 External clock input by EXT CLKIN 3 STR1 STRO Start mode of normal mode 00 Disable 01 Software command 10 Trigger signal occurred from DO STR 4 STP1 STPO Stop mode of normal mode 00 Disable 01 Software command 10 Trigger signa occurred from DO STP 5 STRRF DO STR triggering control 0 Rising edge trigger 1 Falling edge trigger 6 STPRF DO STP triggering control 0 High level active 1 Low level active 7 REQRF DO REQ triggering control 0 High level active 42 1 Low level active 8 ACKRF DO triggering control 0 High level active 1 Low level active 9 CLKRF Sampling clock triggering control 0 Rising edge trigger 1 Falling edge trigger 10 HS0 Handshaking mode 0 Burst Handshaking 1 8255 Emulation 43 C 5 DO Pattern Match Register BASE 8H Table C 4 PCL1755 Register for DO Pattern Match Register Base E GESEJESEJENEXESESESESEZESZENESERES
40. stop to send the data at next clock Point B Clock Source Softwal Start Signal signal Stop Signal Software command Trigger signal frpm DO STP Normal Mode of Ultra speed Digital Output Data count NOTE 1 In this instance start stop signal are shown as active high 2 There are two types of DO clock source listed below Internal 30MHz 15MHz 10MHz timer 1 EXT CLKIN 75 Handshaking mode There are two different transmit modes for handshaking B Burst m 8255 Emulation Handshaking mode of Burst Ultra Speed Digital Input For the Burst Ultra Speed Digital Input if the external device would like to transmit the data to PCI 1755 it will enable the DI REQ signal to PCI 1755 If PCI 1755 is ready to get the data it will also enable the DI ACK signal to external device and then the data will be transmitting from external device to the PCI 1755 according to EXT CLKIN Clock Source EXT CLKIN DI REQ DI Handshaking Mode of Ultra speed Digital Input Burst NOTE 1 Inthis instance DI REQ and DI signal are shown as active high 2 There are two types of DI clock source listed below Internal 30MHz 15MHz 10MHz timer 0 Exiemal EXT_CLKIN 76 Handshaking mode of Burst Ultra Speed Digital Output For the Burst Ultra Speed Digital Output if the PCI 1755 would like to transmit the data to the external device it will enable the DO REQ signal to external devi
41. tart from the initial count You canthus use the gate input to synchronize the counter With this mode the output will remain high until you load the count register You can also synchronize the output by software MODE 3 Square Wave Generator This mode is similar to Mode 2 except that the output will remain high until one half of the count has been completed for even numbers and will go low for the other half of the count This is accomplished by decreasing the counter by two on the falling edge of each clock pulse When the counter reaches the terminal count the state of the output is changed the counter is reloaded with the full count and the whole process is repeated If the count is odd and the output is high the first clock pulse after the count is loaded decrements the count by 1 Subsequent clock pulses decrement the count by 2 After time out the output goes low and the full count is reloaded The first clock pulse following the reload decrements the counter by 3 Subsequent clock pulses decrement the count by two until time out then the whole process is repeated In this way if the count is odd the output will be high for N 1 2 counts and low for N 1 2 counts MODE 4 Software Triggered Strobe After the mode is set the output will be high When the count is loaded the counter will begin counting On terminal count the output will go low for one input clock period then go high again If you reload the
42. unt Counter 1 amp 2 Counter 1 and counter 2 of the counter chip are cascaded to create a 32 bit timer for the pacer trigger A low to high edge of counter 2 output PACER OUT will trigger an A D conversion At the same time you can use this signal as a synchronous signal for other applications 65 D 2 Counter Read Write and Control Registers The 82C54 programmable interval timer uses four registers at addresses BASE 20H BASE 24H BASE 28H and BASE 2CH for read write and control of counter functions Register functions appear below Register BASE 20H BASE 24H BASE 28H BASE 2CH Function Counter read write Counter read write Counter 2 read write Control register Since the 82C54 counter uses a 16 bit structure each section of read write data is split into a least significant byte LSB and most significant byte MSB To avoid errors it is important that you make read write operations in pairs and keep track of the byte order The data format for the control register is as below BASE 2CH 82C54 control bit standard mode Bit D7 D6 D5 D4 D3 D2 DI Value SCI SCO RWI RWO M2 MI MO BCD Description 5 amp SCO Select number Counter SCI SCO 0 0 0 1 0 1 2 1 0 Read back command 1 1 amp RWO Select read write operation Operation RWI RWO Counter latch 0 0 Read Write LSB 0 1 Read Write MSB 1 0 Read Write LSB first 1 1 then MSB 66 2 and MO Select operation mode
43. ybe some of the accessories for enhanced operation of your Multifunction card you can then begin the Installation procedures Fig 1 1 on the next page provides a concise flow chart to give users a broad picture of the software and hardware installation procedures Install Driver from CD ROM then power off Install Hardware and power on PC Use driver utility to configure hardware Use test utility to test hardware Read examples amp driver manual Start to write your own application Fig 1 1 Installation Flow Chart 1 4 Software Overview Advantech offers a rich set of DLL drivers third party driver support and application software to help fully utilize the functions of your 1755 card 9 Pevice Drivers on the companion CD ROM Advantech ActiveDAQ Advantech GeniDAQ Programming choices for DA amp C cards You may use Advantech application software such as Advantech Device Drivers On the other hand advanced users can use another option for register level programming although it is not recommended due to its laborious and time consuming nature Device Drivers The Advantech Device Drivers software is included on the companion CD ROM at no extra charge It also comes with all Advantech DA amp C cards Advantech s device drivers feature a complete I O function library to help boost your application performance The Advantech Device Drivers for Windows 2000 95 98 ME NT XP works seamlessly with devel
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