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CLC012 Adaptive Cable Equalizer for ITU-T G

1. 2013 Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Links CLC012 OBSOLETE I TEXAS CLC012 INSTRUMENTS SNLSO32bE AUGUST 1998 REVISED APRIL 2013 www ti com MINIMUM DATA TRANSITIONS The CLC012 specifies a minimum transition rate For the CLCO12 this sets the minimum data rate for transmitting data through any cable medium The CLCO12 minimum average transition density is found in the Electrical Characteristics section of the datasheet POWER SUPPLY OPERATION AND THERMAL CONSIDERATIONS The CLCO12 operates from either 5V or 5 2V single supplies Refer to Figure 20 when operating the part from 5V When operating with a 5 2V supply the Veg pins should be bypassed to ground The evaluation board and associated literature provide for operation from either supply Maximum power dissipation occurs at minimum cable length Under that condition Icc 58 mA Total power dissipated P 58 mA 5V 290 mW 2 Power in the load P 0 7V 11 mA 37 5 11 mA 12 mW 3 Maximum power dissipated on the die Pomax P1 P 2 8 mW 4 Junction Temperature 68 4 278 mW Tu T 4 26 C 5 Layout and Measurement The printed circuit board layout for the CLC012 requires proper high speed layout to achieve the performance specifications found in the datasheet The following list contains a few rules to follow 1 Use a ground plane Decouple power pins with 0 1 uF capacitors placed
2. 5 2V or ground Operation The CLC012 Adaptive Cable Equalizer provides a complete solution for equalizing high bit rate digital data transmitted over long transmission lines The following sections furnish design and application information to assist in completing a successful design e Block diagram explanation of the CLC012 e Recommended standard input and output interface connections e Common applications for the CLCO12 Measurement PC layout and cable emulation boxes For applications assistance in the U S go to the WEBENCH Design Center Team s website at www ti com ww en analog webench Voc 1N4148 Y 0 1 BF 790 75Q y Output Outputs Eye Monitor DO O Optional i oO A 5 ome ie 0 1uF m AUF 100pF 1000 CLCO012 1 0 uF 1 0 UF 75Q 37 4Q Input Figure 20 CLC012 Equalizer Application Circuit Copyright 1998 2013 Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links CLCO12 OBSOLETE I TEXAS CLC012 INSTRUMENTS SNLSO32bE AUGUST 1998 REVISED APRIL 2013 www ti com BLOCK DESCRIPTION The CLCO012 is an adaptive equalizer that reconstructs serial digital data received from transmission lines such as coaxial cable or twisted pair Its transfer function approximates the reciprocal of the cable loss characteristic The block diagram in Figure 21 depicts the main signal conditioning blocks for equalizing digital data at the receiving end of
3. TEXAS CLC012 INSTRUMENTS SNLSO32bE AUGUST 1998 REVISED APRIL 2013 www ti com Electrical Characteristics Voc 5V Veg OV signal source swing 0 8 Vap Caec 100 pF Parameter Conditions RA Wubi 40 C to Units 85 C DYNAMIC PERFORMANCE Residual Jitter 10 meters Belden 8281 311 Mbps PRN 150 250 400 PSpp 300 meters Belden 8281 311 Mbps PRN 4 350 500 750 PSpp Equalization Time Constant 100 meters Belden 8281 Caec 100 pF 9 1 5 E H us 200 meters Belden 8281 Caec 100 pF 2 0 E 7 us 300 meters Belden 8281 Caec 100 pF 32 H B us output rise and fall time 20 80 Reoliector 750 750 _ _ ps output duty cycle distortion 30 _ _ ps minimum average transition density 1 50 _ _ trans ns maximum average data rate 150m Belden 8281 9 650 2 7 Mbps Vcc Jitter Sensitivity 27 MHz 0 85 E u ns V 270 MHz 1 90 _ u ns V Vee Jitter Sensitivity 27 MHz 0 55 _ ns V 270 MHz 1 45 u u ns V STATIC PERFORMANCE Supply Current Includes Output Current Vaec OV See 4 68 48 75 40 80 mA Varc 0 4V See 53 43 64 37 70 mA Input and Output Parameters DO DO output current 10 8 7 11 3 8 0 12 mA DO DO output voltage swing Reotlector 7507 750 650 850 600 900 mV DI DI common mode voltage 3 4 B B V AEC differential voltage Belden 8281 125 _ _ mV meter AEC AEC common mode 3 6 _ _ V output eye monitor O
4. lt 0 1 3mm from the power pins Design transmission strip lines from the CLCO12 s input and output pins to the board connectors Route outputs away from inputs Keep ground plane 2 0 025 0 06mm away from the input and output pads Figure 27 shows a block level measurement diagram while Figure 34 on depicts a detailed schematic A pseudo random pattern generator with low output jitter was used to provide a NRZI pattern to create the eye diagrams shown in the Typical Performance Characteristics section Since most pattern generators have a 500 output impedance a translation can be accomplished using a CLCO005 Cable Driver as an impedance transformer A wide bandwidth oscilloscope is needed to observe the high data rate eye pattern When monitoring a single output that is terminated at both the equalizer output and the oscilloscope the effective output load is 37 40 Consequently the signal swing is half that observed for a single ended 75Q termination ota ee High Bandwidth Oscilloscope ECL level Desired cable length for equalizing 90 92 PRBS 43 2Q l Generator Eye Pattern 50 75Q 5 7qB Minimum loss Pad Figure 27 Typical Measurement Block 14 Submit Documentation Feedback Copyright 1998 2013 Texas Instruments Incorporated Product Folder Links CLC012 OBSOLETE IB TEXAS INSTRUMENTS CLC012 www ti com SNLS032bE AUGUST 1998 REVISED APRIL 2013 Troubleshooting with scope probes c
5. meters of Belden 8281 cable When properly implemented the CLCO012 will equalize data rates up to 625 Mbps over Category 5 UTP The maximum data rate depends upon the cable length A plot of Maximum Data Rate vs Cable Length is found in the Typical Performance Characteristics section for Belden 8281 and can be scaled as stated above to estimate maximum cable lengths and data rates for UTP Category 5 UTP has a characteristic impedance of approximately 100Q The CLCO05 in Figure 32 is used to drive the twisted pair AC coupled with a series 0 1 uF capacitor and a 500 resistor in each differential output The CLC012 Adaptive Equalizer requires 800 mV from the transmit side of the cable A voltage divider is necessary to scale the voltage to the required level at the input of the CLC012 This resistor network also provides the correct impedance match for twisted pair For Category 5 UTP the approximate AEC voltage per length is 3 75 mV m see BLOCK DESCHIPTION The CLCOO05 provides a trim adjust for fine tuning the output signal with the resistor R Refer to the CLCO05 datasheet for tuning directions 10pF 60 40 11 80 1 0uF 1000 Figure 32 Twisted Pair Equalization Figure 33 Before and After Equalization at 622 Mbps Through 50 Meters of Category 5 UTP 18 Submit Documentation Feedback Copyright 1998 2013 Texas Instruments Incorporated Product Folder Links CLC012 OBSOLETE I TEXAS INSTRUMENTS CLC012 www ti com SNL
6. 150 1000 1000 ns carrier removed See 9 150 1000 1000 ns MUTE response time See 2 0 B B ns MISCELLANEOUS PERFORMANCE input resistance single ended 7 9 i i kQ input capacitance single ended 9 1 0 B B pF input return loss 270 MHz Z 750 19 B dB maximum cable attenuation 200 MHz 40 B E dB 7 Time from application of a valid signal to when the LOS output asserts high 8 Time from the removal of a valid signal to when the LOS output asserts low 9 Time from assertion of MUTE to when the output responds 10 Device only Does not include typical pc board parasitics 11 Includes typical pc board parasitics 12 This sets the maximum cable length for the equalizer Copyright 1998 2013 Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links CLC012 OBSOLETE i CLC012 MENTS SNLS032E AUGUST 1998 REVISED APRIL 2013 www ti com Typical Performance Characteristics Before Equalization 155Mbps After Equalization 155Mbps 50m of Belden 8281 Coaxial Cable 50m of Belden 8281 Coaxial Cable 200mV ins Figure 2 Figure 3 Before Equalization 155Mbps After Equalization 155Mbps 100m of Belden 8281 Coaxial Cable 100m of Belden 8281 Coaxial Cable Figure 4 Figure 5 Before Equalization 155Mbps After Equalization 155Mbps 200m of Belden 8281 Coaxial Cable 200m of Belden 8281 Coaxial Cable a m TUR x RR x 1 ig gt Mu un MM
7. CLC012 and the CLC016 The design functions supported by each chip are CLCO005 Cable connection chip Boosts drive for transmission to next repeater or final destinations CLC012 Receive serialized digital data from incoming transmission lines Equalizes the incoming data CLC016 Retimes the equalized data improving jitter The CLCO016 is a multi rate data retiming PLL The circuit Figure 30 will work at up to 4 different data rates with no additional components or manual tuning 16 Submit Documentation Feedback Copyright 1998 2013 Texas Instruments Incorporated Product Folder Links CLC012 OBSOLETE I TEXAS INSTRUMENTS CLC012 www ti com SNLS032E AUGUST 1998 REVISED APRIL 2013 Vcc Vcc ITU G 703 ARE VA L F l F Input Level H da Adaptive Cable 0 1uF Coaxial 1 0 uF Equalizer 79 750 75Q 75Q 75Q 2750 1OUF gg iq Cable 15 02 10uF 1009 pa ae sa s I LL n si B6 on CNN sca 10pF Cien SP ss Channels 3403 19 1kO 1 D a A 750 MUTE AEC M g 75Q Attenuator em CAEC 1 0 uF 0 WET CLC016 14 061900 196 r3 2 1g 984000 196 O0 1uF 17 30100 196 Ee ACQ WR Bp Led NC VTL auto Rpo 22 NC Vee Vee Vee Vee Vc FD 0 1uF 5000 SB oF Figure 30 Typical Repeater Design DIGITAL VIDEO SDV ROUTERS The CLC012 provides performance that complies with the ITU T G 703 standard for serial digital data transmission over coaxial cable One common application is in routers which provide a switching matrix for co
8. lengths A full schematic of a recommended driver and receiver circuit for 1000 Category 5 UTP is provided in the Typical Applications section with further explanation Input Interface of CLCO12 Figure 23 Twisted Pair Input Interface Copyright 1998 2013 Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links CLC012 OBSOLETE i CLC012 Te RUMENTS SNLS032bE AUGUST 1998 REVISED APRIL 2013 www ti com Output Interfacing The outputs DO and DO produce ECL logic levels when the recommended output termination networks are used The DO and DO pins are not complementary emitter coupled logic outputs Instead the outputs are taken off of the collectors of the transistors Therefore care must be taken to meet the interface threshold levels required by ECL families Recommended interfaces for standard ECL families are shown in the following circuits DIFFERENTIAL LOAD TERMINATED OUTPUT INTERFACE Figure 24 shows a recommended circuit for implementing a differential output that is terminated at the load A diode or 75Q resistor provides a voltage drop from the positive supply 5V for PECL or Ground for ECL operation to establish proper ECL levels The resistors terminate the cable to the characteristic impedance The output voltage swing is determined by the CLC012 output current 10 mA times the termination resistor For the circuit in Figure 24 the nominal output voltage swing is 750 mV Output Int
9. single ended input voltage specified in Static Performance section of the Electrical Characteristics table The following sections show several suggestions for interfaces for the inputs and outputs of the CLCO12 SINGLE ENDED INPUT INTERFACE 750 Coaxial Cable The input is connected single ended to either DI or DI as shown in Figure 22 Balancing unused inputs helps to lessen the effects of noise Use the equivalent termination of 37 40 to balance the input impedance seen by each pin It also helps to terminate grounds at a common point Resistors R and Ry are recommended for optimum performance The equalizer inputs are self biasing Signals should be AC coupled to the inputs as shown in Figure 22 Input Interface of CLCO12 Vg 75Q Figure 22 Single Ended 750 Cable Input Interface DIFFERENTIAL INPUT INTERFACE Twisted Pair A recommended differential input interface is shown in Figure 23 Proper voltage levels must be furnished to the input pins and the proper cable terminating impedance must be provided For Category 5 UTP this is approximately 100Q Figure 23 shows a generalized network which may be used to receive data over a twisted pair Resistors R and R provide the proper terminating impedance and signal level adjustment The blocking capacitors provide AC coupling of the attenuated signal levels The plots in the Typical Performance Characteristics section demonstrate various equalized data rates using Category 5 UTP at 100 meter
10. store mui DEA far a raky bt dU Tad R Ts at Ma pom a AT i it ee ee a Figure 6 Figure 7 6 Submit Documentation Feedback Copyright 1998 2013 Texas Instruments Incorporated Product Folder Links CLC012 OBSOLETE IB TEXAS INSTRUMENTS CLC012 www ti com SNLS032bE AUGUST 1998 REVISED APRIL 2013 Typical Performance Characteristics continued After Equalization 155Mbps 300m of Belden 8281 Coaxial Cable Before Equalization 155Mbps 300m of Belden 8281 Coaxial Cable Figure 8 Figure 9 Before Equalization 622Mbps After Equalization 622Mbps 50m of Belden 8281 Coaxial Cable 50m of Belden 8281 Coaxial Cable we Sr eminus Ties lid n Aaa FP Ts petal as waT ER EPI t e EUR TEE OP MEZ EFI Pu Mal dann ii A er fe ri bhi 5 Hb ni L ri pi P z i m Tw is EE E a c Av ERU Ds r h Ars Y ur J Figure 10 Figure 11 Before Equalization 622Mbps After Equalization 622Mbps 100m of Belden 8281 Coaxial Cable 100m of Belden 8281 Coaxial Cable Figure 12 Figure 13 Copyright 1998 2013 Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links CLCO12 OBSOLETE J TEXAS CLC012 INSTRUMENTS SNLSO32bE AUGUST 1998 REVISED APRIL 2013 www ti com Typical Performance Characteristics continued Before Equalization 622Mbps After Equalization 622Mbps 200m of Belden 8281
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12. Coaxial Cable 200m of Belden 8281 Coaxial Cable Figure 14 Figure 15 Maximum Data Rate vs Jitter vs Cable Length Cable Length Typical El 2 a lt D e o9 x D c as point where BER 1 x 10 9 0 50 100 150 200 250 300 100 200 300 400 900 Belden 8281 Cable Length m Belden 8281 Cable Length m Figure 16 Figure 17 Return Loss 2 E Oo ta 3 3 3 D 0 9 c N t O oO 0 50 100 150 200 250 300 350 400 Belden 8281 Cable Length meters 0 100M 200M 300M 400M 500M Frequency Hz Figure 18 Figure 19 8 Submit Documentation Feedback Copyright 1998 2013 Texas Instruments Incorporated Product Folder Links CLCO12 I TEXAS INSTRUMENTS www ti com OBSOLETE SNLS032E PIN DEFINITIONS CLC012 AUGUST 1998 REVISED APRIL 2013 Name Pin Description DI DI 8 9 Differential data inputs DO DO 13 14 Differential collector data outputs ECL compatible AEC AEC 6 7 AEC loop filter pins A capacitor connected between these pins governs the loop response for the adaptive equalization loop OEM 3 Eye monitor output The output of the equalization filter LOS 5 Loss of Signal Low when no signal is present MUTE 12 Output MUTE Active low Loss of Signal LOS may be tied to this pin to inhibit the output when no signal is present Vcc 1 2 4 Positive supply pins ground or 5V VEE 10 11 Negative supply pins
13. EM bias potential 3 2 _ _ V Loss of Signal LOS current output HIGH LOS Voy 4 5V 400 _ _ UA Loss of Signal LOS current output LOW LOS Vo 0 5V 600 _ B UA MUTE voltage input HIGH See 1 8 2 0 2 0 V MUTE voltage input LOW See 1 2 0 8 0 8 V MUTE current input HIGH Vip 5V 9 5 0 100 500 nA MUTE current input LOW Vi 0v 0 2 100 500 nA 1 These specifications assume an 800 mV signal at the cable input Levels above and below 800 mV are allowable but performance may vary The cable will attenuate the signal prior to entering the equalizer 2 Min max ratings are based on product characterization and simulation Individual parameters are tested as noted Outgoing quality levels are determined from tested parameters 3 Peak to peak jitter is defined as 6 times the rms jitter 4 J level spec is 100 tested at 25 C 5 For more information see Operation and Design Guidelines 6 50 eye opening 4 Submit Documentation Feedback Copyright 1998 2013 Texas Instruments Incorporated Product Folder Links CLCO12 OBSOLETE IB TEXAS INSTRUMENTS CLC012 www ti com SNLS032bE AUGUST 1998 REVISED APRIL 2013 Electrical Characteristics continued Voc 5V Vee OV signal source swing 0 8 Vap Caec 100 pF Min Max Parameter Conditions Typ M 1o 40 C to Units 25 C 25 C or 2 85 C TIMING PERFORMANCE LOS Response Time carrier applied See
14. LOS block monitors the signal power out of the equalizing filter and compares it to an internal reference to determine if a valid signal is present A CMOS high output indicates that data is present The output of LOS can be connected to the MUTE input to automatically latch the outputs DO and DO preventing random transitions when no data is present The Output Eye Monitor OEM provides a single ended buffered output for observing the equalized eye pattern The OEM output is a low impedance high speed voltage driver capable of driving an AC coupled 1000 load OEM OEM Buffer MUTE Equalizer Block Quantized FB Comparators High Pass a Absolute Value WZ Adaptive Servo Control Signal Detect Block loc AEC AEC Figure 21 CLC012 Block Diagram 10 Submit Documentation Feedback Copyright 1998 2013 Texas Instruments Incorporated Product Folder Links CLC012 OBSOLETE IB TEXAS INSTRUMENTS CLC012 www ti com SNLS032bE AUGUST 1998 REVISED APRIL 2013 DEVICE TESTING Performance or compliancy testing of the CLCO12 with Cable Clones is not allowed Use of these devices is contrary to the product s specifications and test procedures Testing for product specifications or performance using cable clones is invalid since cable clones have a different frequency response than the actual cable Testing with full length cable samples is recommended Input Interfacing The CLC012 accepts either differential or
15. OBSOLETE l TEXAS INSTRUMENTS www ti com CLC012 SNLS032bE AUGUST 1998 REVISED APRIL 2013 CLC012 Adaptive Cable Equalizer for ITU T G 703 Data Recovery Check for Samples CLC012 FEATURES e Automatic Equalization of Coaxial and Twisted Pair Cables e Loss of Signal Detect and Output Mute Output Eye Monitor e Single Supply Operation 5V or 5 2V e Single Ended or Differential Input e Low Cost APPLICATIONS e ITU T G 703 Serial Data Recovery e Serial Digital Data Routing and Distribution e Serial Digital Data Equalization and Reception e Data Recovery Equalization ATM CAD Networks Medical Set Top Terminals Industrial Video Networks KEY SPECIFICATIONS Low Jitter 180ps 270 Mbps Through 200 Meters of Belden 8281 Coaxial Cable e High Data Rates lt 50 Mbps to gt 650 Mbps e Excellent Input Return Loss 19 dB 270 MHz e Low Supply Current 68 mA e Equalizes up to 300 Meters of Belden 8281 or 120 Meters of Cat 5 UTP Cable DESCRIPTION TI s CLC0O12 adaptive cable equalizer is a low cost monolithic solution for equalizing data transmitted over cable or any media with similar dispersive loss characteristics The CLC012 simplifies the task of high speed data recovery with a one chip solution and a minimal number of external components The equalizer automatically adapts to equalize any cable length from zero meters to lengths that attenuate the signal by 40 dB at 200 MHz This corresponds t
16. S032E AUGUST 1998 REVISED APRIL 2013 End of cable before Tektronix equalization Can substitute a CSA907T 75 resistor Output Pattern POET D4 CLK Data 1 55 Vpp eee ee Vertical scale 200mV div 800mVpp 1ns div Adaptive Cable Equalizer T 0 1uF End of cable after equalization 1 0 UF 1000 CLC012 LOS eer a MUTE 50 75Q 57dB Y J minimum loss pad 270Mbps data through 300m 0 1uF of Belden 8281 coax cable d 1ns div Figure 34 Typical Measurement Setup Evaluation Board Evaluation boards are available for a nominal charge that demonstrate the basic operation of the SDI SDV SDH devices The evaluation boards can be ordered through TI s Distributors Supplies are limited please check for current availability The SD012EbVK evaluation kit for the CLCO012 Adaptive Cable Equalizer for ITU T G 703 Data Recovery provides an operating environment in which the cable equalizer can be evaluated by system hardware designers The evaluation board has all the needed circuitry and connectors for easy connection and checkout of the device circuit options as discussed in the CLC012 datasheet A schematic parts list and pictorial drawing are provided with the board From the WWW the following information may be viewed downloaded for most evaluation boards www ti com Device Datasheet and or EVK User Manual View a picture of the EVK e View the EVK Sch
17. a cable The CLC012 receives baseband differential or single ended digital signals at its inputs DI and DI The Equalizer block is a two stage adaptive filter This filter is capable of equalizing cable lengths from zero meters to lengths that require 40 dB of boost at 200 MHz The Quantized Feedback Comparator block receives the differential signals from the equalizer filter block This block includes two comparators The first comparator incorporates a self biasing DC restore circuit This is followed by a second high speed comparator with output mute capability The second comparator receives and slices the DC restored data Its outputs DO and DO are taken from the collectors of the output transistors MUTE latches DO and DO when a TTL logic low level is applied The Adaptive Servo Control block produces the signal for controlling the filter block and outputs a voltage proportional to cable length It receives differential signals from the output of the filter block and from the quantized feedback comparator QFBC to develop the control signal The servo loop response is controlled by an external capacitor placed across the AEC and AEC pins Its output voltage as measured differentially across AEC and AEC is roughly proportional to the length of the transmission line For Belden 8281 coaxial cable this differential voltage is about 1 5 mV meter Once this voltage exceeds 500 mV no additional equalization is provided The Loss of Signal
18. al applications In some cases Tl components may be promoted specifically to facilitate safety related applications With such components Tl s goal is to help enable customers to design and create their own end product solutions that meet applicable functional safety standards and requirements Nonetheless such components are subject to these terms No Tl components are authorized for use in FDA Class III or similar life critical medical equipment unless authorized officers of the parties have executed a special agreement specifically governing such use Only those TI components which TI has specifically designated as military grade or enhanced plastic are designed and intended for use in military aerospace applications or environments Buyer acknowledges and agrees that any military or aerospace use of Tl components which have not been so designated is solely at the Buyer s risk and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use TI has specifically designated certain components as meeting ISO TS16949 requirements mainly for automotive use In any case of use of non designated products TI will not be responsible for any failure to meet ISO TS16949 Products Audio Amplifiers Data Converters DLP Products DSP Clocks and Timers Interface Logic Power Mgmt Microcontrollers RFID OMAP Applications Processors Wireless Connectivity www ti com audio ampli
19. an affect the equalization For high data rates use a low capacitance probe with less than 2 pF probe capacitance Evaluation boards and literature are available for quick prototyping and evaluation of the CLC012 Adaptive Cable Equalizer The CLC012 contains CMOS devices and operators should use grounding straps when handling the parts Figure 28 shows the CLC012 s internal power supply routing Bypass Voc pin 4 by e Monolithic capacitor of about 0 1 uF placed less than 0 1 8mm from the pin e Tantalum capacitor of about 6 8 pF for large current signal swings placed as close as convenient to the CLCO012 CLCO12AJE Quantized Feedback Comparator Figure 28 Power Package Routing Fixture To minimize ringing at the CLCO12 s inputs place a 1000 resistor in series with the input This resistor reduces inductance effects Several layout techniques can improve high speed performance Keep input output and AEC traces well separated Use balanced input termination s Avoid routing traces close to the CLCO12 s input trace e Maintain common return points for components Use guard traces The input lines of the CLCO12 use a 1000 series resistors at the input pins This decreases the inductive effects internal to the part to reduce ringing on fast rise and fall times Refer to the Evaluation Board layout for further suggestions on layout for the CLCO12 Adaptive Equalizer Copyright 1998 2013 Texas Instruments Incorpora
20. ant T R OCjagc 10 9 1 H is a conversion factor that is set by internal equalizer parameters and cable length For Belden 8281 coaxial cable the R values are T us Caec in pF Cable Length R Value Ohms 100 meters 15000 200 meters 20000 300 meters 32000 For example a Caec value of 100 pF results in an adaptive loop time constant of 2 us at 200 meters of cable CONNECTION AND OPERATION OF LOS AND MUTE Loss of Signal LOS is a CMOS output that indicates the presence of equalized data from the filter This LOS output can be connected to MUTE to suspend changes in the data outputs DO and DO if no valid signal exists This simple configuration prevents random output transitions due to noise For sparse transition patterns it is recommended that a capacitor be connected to LOS as shown in Figure 20 Add a capacitor to pin 5 to slow the response time of Loss of Signal when LOS is connected to MUTE The capacitor reduces sensitivity to pathological patterns Pathological patterns are defined as sparse data sequences with few transitions OUTPUT EYE MONITOR OEM CONNECTIONS The OEM is a high speed buffered output for monitoring the equalized eye pattern prior to the output comparator Its output is designed to drive an AC coupled 50O coaxial cable with a series 500 backmatch resistor The cable should be terminated with 50Q at the oscilloscope Figure 20 shows a schematic with a typical connection Copyright 1998
21. d trademark of Texas Instruments All other trademarks are the property of their respective owners PRODUCTION DATA information is current as of publication date Products conform to specifications per the terms of the Texas Instruments standard warranty Production processing does not necessarily include testing of all parameters Copyright 1998 2013 Texas Instruments Incorporated OBSOLETE i CLC012 Te RUMENTS SNLS032bE AUGUST 1998 REVISED APRIL 2013 www ti com Typical Application ITU G 703 level 2dB 75Q ECL level Attenuator Adaptive Cable 1 0 WF 68 10 Coaxial Cable 1509 1 0uF 1002 Equalizer T ECL i Outputs Levels i CLC012 1 0 uF Before Equalization 622Mbps After Equalization 622Mbps 200m of Belden 8281 Coaxial Cable 200m of Belden 8281 Coaxial Cable Connection Diagram Vcc Vcc OEM Vcc LOS AEC AEC Figure 1 Pinout 14 Pin SOIC D 2 Submit Documentation Feedback Copyright 1998 2013 Texas Instruments Incorporated Product Folder Links CLC012 OBSOLETE I TEXAS INSTRUMENTS CLC012 A These devices have limited built in ESD protection The leads should be shorted together or the device placed in conductive foam dy aA during storage or handling to prevent electrostatic damage to the MOS gates Absolute Maximum Ratings Supply Voltage Vcc Vgg 0 3V 6 5V Maximum Junction Temperature 150 C Storage Temperature Range 65 C to 150 C Lead T
22. ematic e View the top assembly drawing and BOM e View the bottom assembly drawing and BOM PCB LAYOUT The CLCO012 requires proper high speed layout techniques to obtain best results A few recommended layout rules to follow for best results when using the CLCO12 Adaptive Cable Equalizer are 1 Use a ground plane 2 Decouple power pins with 0 01 pF capacitors placed lt 0 1 8mm from the power pins 3 Design transmission lines to the inputs and outputs 4 Route outputs away from inputs 5 Remove ground plane 2 0 025 0 06mm from the input and output pads Copyright O 1998 2013 Texas Instruments Incorporated Submit Documentation Feedback 19 Product Folder Links CLCO12 OBSOLETE CLCO12 INSTRUMENTS SNLS032E AUGUST 1998 REVISED APRIL 2013 www ti com REVISION HISTORY Changes from Revision D April 2013 to Revision E Page e Changed layout of National Data Sheet to TI format sss nennen enne nnne nnn nennen nnns nn snas 19 Product Folder Links CLCO12 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections enhancements improvements and other changes to its semiconductor products and services per JESD46 latest issue and to discontinue any product or service per JESD48 latest issue Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete All semiconductor pr
23. emperature Soldering 4 sec 260 C ESD Rating gt 500V 0jA 14 Pin SOIC AJE 95 C W MTTF based on limited life test data 4 8 x 10 hours 1 Absolute Maximum Ratings are those values beyond which the safety of the device cannot be ensured They are not meant to imply that the devices should be operated at these limits The table of Electrical Characteristics specifies conditions of device operation 2 If Military Aerospace specified devices are required please contact the Texas Instruments Sales Office Distributors for availability and specifications 3 Human body model 1 5 KQ in series with 100 pF based on limited test data Recommended Operating Conditions Supply Voltage Vcc Vgg 4 5V to 5 5V Operating Temperature Range 40 to 85 C Series Input Resistance In Series w DI amp DI 1000 Input Coupling Capacitance 1 0 uF AEC Capacitor Connected between AEC amp AEC 50 pF to 1 uF Cable Input Voltage Swing 720 to 880 MVpp DO DO Minimum Voltage Vcc 1 6V 1 These specifications assume an 800 mV signal at the cable input Levels above and below 800 mV are allowable but performance may vary The cable will attenuate the signal prior to entering the equalizer 2 To maintain specified performance do not reduce DO DO below this level Copyright 1998 2013 Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links CLC012 OBSOLETE I
24. erface of CLCO12 79 Zo 75Q Figure 24 Differential Load Terminated Output Interface DIFFERENTIAL SOURCE TERMINATED OUTPUT INTERFACE Figure 25 is similar to Figure 24 except that the termination is provided at the source This configuration may also be used for single ended applications However the unused output must still be terminated as shown Voc 1N4148 0 01uF Output Interface of CLC012 75Q 75Q DO Zo 75Q 7 o J 9 Zo 75Q e V V D 10mA Figure 25 Differential Source Terminated Output Interface 12 Submit Documentation Feedback Copyright 1998 2013 Texas Instruments Incorporated Product Folder Links CLC012 OBSOLETE IB TEXAS INSTRUMENTS CLC012 www ti com SNLS032bE AUGUST 1998 REVISED APRIL 2013 TERMINATING PHYSICALLY SEPARATED OUTPUTS When the two outputs must be routed to physically separate locations the circuit in Figure 25 may be applied Alternatively if load termination is desired the circuit in Figure 26 may be used The resistive divider network provides 75Q termination and establishes proper ECL levels This circuit consumes slightly more power than the previous circuits Output Interface of CLC012 90 9Q O Figure 26 Alternative Load Terminated Output Interface Design Guidelines SELECTING THE AUTOMATIC EQUALIZER CAPACITOR The AEC capacitor sets the loop time constant r for the equalizer s adaptive loop response time The following formula is used to set the loop time const
25. fier ti com dataconverter ti com www dlp com www ti com clocks interface ti com logic ti com power ti com microcontroller ti com www ti rfid com www ti com omap Applications Automotive and Transportation Communications and Telecom Computers and Peripherals Consumer Electronics Energy and Lighting Industrial Medical Security Space Avionics and Defense Video and Imaging TI E2E Community www ti com wirelessconnectivity www ti com automotive www ti com communications www ti com computers www ti com consumer apps www ti com energy www ti com industrial www ti com medical www ti com security www ti com space avionics defense www ti com video Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2013 Texas Instruments Incorporated
26. nnecting source equipment to destination equipment Figure 31 shows a typical configuration for a router including equalizers a crosspoint switch data retimers and cable drivers The CLCO12 is used in its standard configuration in this application and automatically equalizes cable lengths from zero meters to greater than 300 meters at 360 MHz see plots in Typical Performance Characteristics section The equalized outputs are connected to the differential inputs of the crosspoint switch The CLCO016 Data Retimer receives the data from the crosspoint and performs the clock and data recovery functions further reducing jitter Finally the retimed data is driven into the coaxial cable by a CLC005 ITU T G 703 Cable Driver with two amplitude adjustable outputs CLC012 CLC018 CLC016 CLCO005 Coaxial Cable Coaxial Cable Digital Cross point Switch CLC012 CLC016 LC005 Coaxial Cable Coaxial Cable Equalizer Controller Figure 31 Data Routing Block Diagram Copyright 1998 2013 Texas Instruments Incorporated Submit Documentation Feedback 17 Product Folder Links CLC012 OBSOLETE f CLC012 Te RUMENTS SNLS032bE AUGUST 1998 REVISED APRIL 2013 www ti com TWISTED PAIR DRIVER A low cost medium for transmitting data is twisted pair Category 5 UTP has an attenuation characteristic similar to Belden 8281 coaxial cable but scaled in length 120 meters of Category 5 UTP is roughly equivalent to 300
27. o 300 meters of Belden 8281 or 120 meters of Category 5 UTP unshielded twisted pair The CLCO12 provides superior jitter performance 180psy for 270 Mbps data that has passed through 200 meters of Belden 8281 cable This exceptional performance provides wide error margin in digital data links The equalizer operates on a single supply with a power consumption of only 290 mW The small 14 pin SOIC package allows for high density placement of components for multi channel applications such as routers The equalizer operates over a wide range of data rates from less than 50 Mbps to rates in excess of 650 Mbps The equalizer is flexible in allowing either single ended or differential input drive Its high common mode rejection provides excellent immunity to interference from noise sources On chip quantized feedback eliminates baseline wander Additional features include a Loss of Signal output and an output mute pin which when tied together mute the output when no signal is present A buffered eye monitor output is provided for viewing the equalized signal prior to the comparator Differential AEC pins allow the user to set the internal adaptive loop time constant with one external capacitor Please be aware that an important notice concerning availability standard warranty and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet WEBENCH is a registere
28. oducts also referred to herein as components are sold subject to Tl s terms and conditions of sale supplied at the time of order acknowledgment TI warrants performance of its components to the specifications applicable at the time of sale in accordance with the warranty in Tl s terms and conditions of sale of semiconductor products Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty Except where mandated by applicable law testing of all parameters of each component is not necessarily performed Tl assumes no liability for applications assistance or the design of Buyers products Buyers are responsible for their products and applications using Tl components To minimize the risks associated with Buyers products and applications Buyers should provide adequate design and operating safeguards TI does not warrant or represent that any license either express or implied is granted under any patent right copyright mask work right or other intellectual property right relating to any combination machine or process in which TI components or services are used Information published by TI regarding third party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from TI
29. ted Submit Documentation Feedback 15 Product Folder Links CLC012 OBSOLETE CLC012 Te RUMENTS SNLS032bE AUGUST 1998 REVISED APRIL 2013 www ti com EQUALIZATION CURVE The CLC012 Adaptive Cable Equalizer has a maximum equalization response as shown in Figure 29 This response may be obtained by forcing gt 0 5V differentially at the AEC pins Magnitude 5dB div A 1 1 1 1 1 1 i O T a A E S E i E E E E D ee ee La ES ES SS LL 1L 1 1 ee ee ee oh L 1L 20D 20 2 1 1 1D 1X 1 10k 100k 1M 10M 100M 1G Frequency Hz Figure 29 Maximum Equalization Response CABLE EMULATION BOXES Some cable emulation boxes will not mimic cables correctly When evaluating the CLCO12 it is strongly recommended that actual cable be used to determine the various performance parameters Typical Applications COAXIAL CABLE RECEIVER The CLC012 equalizer application shown in Typical Application will equalize a variety of coaxial cables up to lengths that attenuate the signal by 40 dB at 200 MHz The application shows the proper connection for a single cable driven with a CLCOO05 driver Loss of Signal LOS is connected to MUTE to latch outputs DO and DO in the absence of an input signal to the equalizer Refer to the CLC012 s Evaluation Board layout for additional suggestions TI can supply most of the major components required to design a transmission line repeater Figure 30 shows a typical repeater design using the CLCO005

CLC012 Adaptive Cable Equalizer for ITU-T G

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