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ADP-3GHD User manual
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1. Connections The ADP 3GHD has two backplane options DA 3GHD 2x4 C3 and DA 3GHD 2x4 C4 The connector placement of the two are equal but the C4 backplanes features passive byass between IN1 and O1A and IN2 and O2A This module is mounted at the rear of the sub rack Backplane Redundant names mode IN1 OUT1 DROP ADD IN2 OUT2 DROP Not in use Figure 6 Backplane connection view and signal mapping table Unused inputs and outputs should be terminated with 75 ohm to meet the specifications nevion com 8 ADP 3GHD 5 Operation The status of the module can be easily monitored visually by the LEDs at the front of the module The LEDs are visible through the front panel as shown in 11 below Figure 7 indicator overview Text not printed on the front panel Status Rev A LOL amp LOS 1 LOL amp LOS 2 Main Bypass The functions of the different LEDs are described in table below Diode state Red LED Yellow LED Green LED No light Status Module is faulty Module is OK Module has power Module has no power LOL amp LOS 1 Input 1 No Reclocker Lock amp Loss Of Signal No Reclocker lock amp Signal present Reclocker in lock amp Signal present LOL amp LOS 2 No Reclocker No Reclocker lock amp Reclocker in lock Input 2 Lock amp Loss Of Signal present Signal present Signal Main Bypass No stable input By
2. analyzers can be used to control the decision of which signal to use on the DROP output Thus the trigger is a link from the analyzer to the change over ADP 3GHD has four video analyzers v Error mask APV FFV NO_EDH VS FF CRC AP CRC LOCK CCS YCS CCRC YCRC LNUM SAV EAV hannel Count alo olo lololol oi eo ooo Ignore O ojo jojo o jojojo v Error mask APV FFV NO_EDH VS FF CRC AP CRC LOCK CCS YCS CCRC YCRC LNUM SAV EAV Channel 1 2nd stream level B PTE olololo o lolo Ignore ojojo o O o jojo h Error mask APV FFV NO EDH VS FF CRC AP CRC LOCK CCS YCS CCRC YCRC LNUM SAV EAV Chaniel z Count 01000100 0000 06 Ignore joj O CEC CA E E ojojo bd Error mask APV FFV NO_EDH VS FF CRC AP CRC LOCK CCS YCS CCRC YCRC LNUM SAV EAV Channel 2 2nd stream level B C o lololo O Ignore jojojo o o jojo Figure 11 Video analyzer settings Figure 9 shows the controls for these The two inputs each have their analyzers plus an extra Stream 2 analyzer that is used when SMPTE 425M Level B mapping is used These errors can be counted or ignored based on the settings in the configuration view EDH No EDH packets SD only VSTD SMPTE 352 packets do not correspond to detected video standard SD HD only Not supported for 3G FFCRC Full Field CRC SD only APCRC Active Picture CRC SD only LOCK Analyzer chip is not locked to a bit stream or stream 2 not present for Str
3. lt 10 All outputs non inverting SD lt 0 2 Ul HD lt 1 Ul 3G HD lt 1Ul SD lt 0 15 Ul HD lt 0 15 Ul 3G HD lt 0 2UI 75 Ohm BNC gt 300m w Belden 1694A with BER lt 10E 12 gt 100m w Belden 1694A with BER lt 10E 12 gt 70m w Belden 1694A with BER lt 10E 12 lt 15dB 5MHz 1 5GHz lt 10dB 1 5GHz 3GHz SD limit 10Hz 1kHz gt 1 Ul 10kHz 5MHz gt 0 2 Ul HD limit 10Hz 100kHz gt 1 Ul 100kHz 10MHz gt 0 2 Ul 3G HD limit 10Hz 100kHz gt 2 Ul 100kHz 10MHz gt 0 3 Ul Automatic SD HD detection Automatic output slew rate adjustment according to SMPTE 259M and SMPTE 292M SMPTE 424M 270 1483 5 1485 2967 2970Mbps Eq bypass for non video formats or low bit rates SMPTE 424M SMPTE 292M SMPTE 259M SMPTE 305M SMPTE 310M EN50083 9 on non inverting outputs 5V lt 4 5W nevion com 5 ADP 3GHD Rev A 3 Configuration The ADP 3GHD supports a number of different formats The correct configuration can either be set with a DIP switch or with the GYDA system controller The layout of ADP 3GHD is shown in the drawing below DIP switches nevion doo ena 3 ai He 2 lt E O i STATUS h Go ona I of O c T LOL amp LOS 4 4 i LOL amp LOS 2 83 DL p a el fa mor f l Em A 4 T T Main Bypass Figure 2 ADP 3GHD module layout DIP switch configuration must be set according to the table below Sw
4. A norma FF O go O das LOCK CCS YCS CCRC YCRC LNUM SAV EAV O Enable Disable Hold time 4000 ms v Channel 2 B trigger ire LOCK CCS YCS CCRC YCRC LNUM SAV EAV O ia r Channel 1 v Channel 1 2nd stream level B v Channel 2 v Channel 2 2nd stream level B v Figure 12 Video error trigger settings There is one trigger for each analyzer Since there are triggers for both the main and standby input an error condition on main input doesn t necessarily mean the change over will switch but for simplicity the following description assumes that the standby channel is always good Each trigger has an adjustable time control called hold time This is used for three situations a a Multiple bursts of error within timer duration triggers a switching to standby b b Single continuous error condition whose duration exceeds timer triggers a switching to standby c c Error free periods whose duration exceeds timer triggers a switching back to main The trigger also has a setting for bit operator It is possible to do a logical AND on the bits after applying the mask Set to AND all the individual error types that have been enabled must be occurring to count as an error condition Set to OR any enabled error type will suffice nevion com 14 ADP 3GHD Rev A General environmental requirements for Nevion equipment 1 The equipment will meet the guaranteed performance specification under the following environmental con
5. PASS DROP Best of IN1 and IN2 Best of IN1 and INZ IN1 IN2 Table 4 Redundant ring modes nevion com 11 ADP 3GHD 7 Independent ring setup ADD1 ADD2 Rev A IN1 gt Signal integrity 8 Reclocker Switch Reclocker PASS ADD Switch DROP MUTE OUT1 DROP1 gt Signal integrity bE amp Reclocker Switch gt Reclocker PASS ADD Switch DROP MUTE OUT2 DROP2 Figure 10 Independent block diagram When the card is set up for dual rings without redundancy the basic functionality is as follows Ring 1 Mode DROP1 OUT1 ADD Muted ADD1 ADD DROP IN1 ADD1 PASS Muted IN1 PASS DROP IN1 IN1 Table 5 Ring 1 operating modes Ring 2 Mode DROP2 OUT2 ADD Muted ADD2 ADD DROP IN2 ADD2 PASS Muted IN2 PASS DROP IN2 IN2 Table 6 Ring 2 operating modes nevion com 12 ADP 3GHD Rev A 8 Change over functionality The change over functionality is only used when the card is set up for a redundant ring The card has a number of signal integrity analyzers and something called triggers A trigger is another way of controlling the change over functionality The regular change over configuration is used for setting latch on off EQ or RCL control etc In addition the signal integrity
6. ackets All of the outputs are non inverting and suitable for DVB ASI In redundant operation the included intelligent change over feature gives the ability to change between inputs based on input signal loss loss of lock EDH errors or a combination of the above There is also included a passive bypass function from both inputs to non inverted outputs with less than 15 m loss of cable length enables full redundancy in case of mains failure The ADP 3GHD is designed for all distribution purposes in studio duplication and broadcast applications Please observe that ADP 3GHD can not be used with N Box Flashlink one module desktop box due to mechanical issues nevion com 4 ADP 3GHD 2 Specifications Electrical Outputs Connectors Output Return loss Output signal level Output signal rise fall time 20 80 Amplitude overshoot Polarity Output timing jitter Output alignment jitter Electrical Inputs Connectors Input Cable Eq 270Mbps Input Cable Eq 1485Mbps Input Cable Eq 2970Mbps Input Return loss Jitter tolerance Features Reclocking Supported clock rates Input equalizers Supported standards SMPTE DVB ASI General DC power consumption Rev A 75 Ohm BNC lt 15dB 5MHz 1 5GHz lt 10dB 1 5GHz 3GHz 800mV 10 SD limit 0 4ns 1 5ns lt 0 5ns rise fall var HD limit lt 270ps lt 100ps rise fall var 3G HD limit lt 135ps lt 50ps rise fall var
7. ce contained in at least one of the homogeneous materials used for this part is above the limit requirement in SJ T 11363 2006 This is indicated by the product marking A 2 Recycling information Nevion provides assistance to customers and recyclers through our web site http www nevion com Please contact Nevion s Customer Support for assistance with recycling if this site does not show the information you require Where it is not possible to return the product to Nevion or its agents for recycling the following general information may be of assistance Before attempting disassembly ensure the product is completely disconnected from power and signal connections All major parts are marked or labeled to show their material content Depending on the date of manufacture this product may contain lead in solder Some circuit boards may contain battery backed memory devices nevion com 17
8. conannnann cnn 17 A F Materials EEA ANNAT 17 A 2 Recy ling IO ON did dan 17 nevion com 3 ADP 3GHD Rev A 1 Product overview p gt Signal integrity amp Reclocker Switch 3 Reclocker OUT1 PASS ADD DROP1 Change fr Over DROP2 DROP MUTE NETT Switch Signal integrity me 2 amp Reclocker Reclocker OUT2 A PASS ADD Figure 1 ADP 3G block diagram The Flashlink ADP 3GHD is a multi bit rate ADD DROP PASS module providing high performance media distribution for various signal formats from 19 4Mbps up to 2970Mbps The unit can be operated as a redundant or dual ADP amplifier configured to do cable equalizing and reclocking of SMPTE 424M SMPTE 292M and SMPTE 259M signal formats The four inputs typically provide automatic cable equalizing for up to 70 meters of cable Belden 1694A at 2970Mbps with reclockers on all outputs The ADP 3GHD will detect 3GHD HD and SD rates and automatically switch to the correct output slew rate The reclockers support the bit rates 270Mbps 1483 5Mbps 1485Mbps 2967Mbps and 2970Mbps For other rates the reclockers automatically switch to bypass mode and the ADP 3GHD will work as a non reclocking distribution amplifier with cable equalizers The ADP 3GHD also supports reclocking of DVB ASI at 270Mbps enabling all possible rates including empty transport streams with only K28 5 padding p
9. ditions Operating room temperature range 0 C to 45 Operating relative humidity range lt 90 non condensing 2 The equipment will operate without damage under the following environmental conditions Temperature range 10 C to 55 C Relative humidity range lt 95 non condensing nevion com 15 ADP 3GHD Rev A Product Warranty The warranty terms and conditions for the product s covered by this manual follow the General Sales Conditions by Nevion which are available on the company web site www nevion com nevion com 16 ADP 3GHD Rev A Appendix A Materials declaration and recycling information A 1 Materials declaration For product sold into China after 1st March 2007 we comply with the Administrative Measure on the Control of Pollution by Electronic Information Products In the first stage of this legislation content of six hazardous materials has to be declared The table below shows the required information Toxic or hazardous substances and elements MRE fk R ACME SRK ZR ER Part Name Lead Mercury Cadmium Hexavalent Polybrominated Polybrominated Pb Hg Cd Chromium biphenyls diphenyl ethers Cr VI PBB PBDE ADP 3GHD O O O O O O O Indicates that this toxic or hazardous substance contained in all of the homogeneous materials for this part is below the limit requirement in SJ T11363 2006 X Indicates that this toxic or hazardous substan
10. eam 2 analyzer CCS Chroma channel ancillary data check sum error YCS Luma channel ancillary data check sum error CCRC Chroma channel video data check sum error YCRC Luma channel video data check sum error LNUM Line number error SAV Start of active video flags missing or misplaced EAV End of active video flags missing or misplaced Errors are checked once per video field LOCK errors are counted every 20ms when no video is present If an error occurs it is checked against the bit mask and if selected for counting increments the error counter An SNMP tool is recommended for tracking error counts over time with selectable limits on error rate and max count before generating a warning The triggers are using the same information and therefore have the same bit names as the analyzers but have separate bit masks This means that it is possible to count one set of error types while using a different error type to control the change over nevion com 13 ADP 3GHD Rev A Reclocker 1 Enable Bypass Autobypass OOn Off Reclocker 2 Enable Bypass Autobypass On Off Enable Disable Hold time 4000 ms v ES i er EDH VSTD FFCRC APCRC annel 1 A trigger Es O O O Oor LOCK CCS YCS CCRC YCRC LNUM SAV EAV OEnable Disable Hold time 4000 ms v Channel 1 B trigger Pee LOCK CCS YCS CCRC YCRC LNUM SAV EAV O da r Enable Disable Hold time 4000 ms v EDH VSTD FFCRC APCRC Channel 2 A trigger
11. itch Label Function DIP OFF Function DIP ON Comment 1 RED Independent rings Redundant ring Card can work on either two independent rings or one ring with redundant paths directions Redundant mode implies CHO function on DROP outputs goes to the OUT port of the primary ring rin for the primary ring switch 1 set OFF secondary ring switch 1 set OFF 6 Reclocker mode 7 EQ Cable equalizer Bypass Cable Equalizer ON Equalizer mode Loss of signal will not work on this mode 8 OVR Module controlled by Module controlled by Select GYDA config Gyda system controller DIP switches Mode Table 1 ADP 3GHD DIP switches All DIP switches are off when pointing towards the release handle nevion com 6 ADP 3GHD Rev A 3 1 Configuration Examples Typical configurations for ADP 3GHD RED 1 R1 ON R2 RCL EQ OVR 8 CE Atti Figure 3 Independent mode Add to ring 1 Pass and drop ring 2 ADD1 to OUT 1 IN2 to OUT2 and DROP 2 With equalization without reclocking RED 1s T R2 RCL E EQ Zz OVR ea e JD Figure 4 Independent mode Add to ring 1 Pass and drop ring 2 ADD1 to OUT 1 IN2 to OUT2 and DROP 2 Transparent mode without equalization and reclocking RED Ri Jo Do nr R2 RCL EQ OVR 8 Figure 5 Independent mode pass ring 1 pass and drop ring 2 IN1 to OUT1 IN2 to OUT2 and DROP 2 DROP 1 muted nevion com 7 ADP 3GHD Rev A 4
12. nevicn ADP 3GHD Redundant ADD DROP PASS module for SD HD 3G SDI User manual Rev A nevion com ADP 3GHD Rev A Nevion Support Nevion Europe Nevion USA P O Box 1020 1600 Emerson Avenue 3204 Sandefjord Norway Oxnard CA 93033 USA Support phone 1 47 33 48 99 97 Toll free North America 866 515 0811 Support phone 2 47 90 60 99 99 Outside North America 1 805 247 8560 E mail supportOnevion com See http www nevion com support for service hours for customer support globally Revision history Current revision of this document is the uppermost in the table below Rev Repl Date Sign Change description pe Cover page update DoC removed no changes to A 0 2015 05 11 MB content 0 2011 10 19 AJM Initial revision nevion com 2 ADP 3GHD Rev A Contents Revision hs rt A dia 2 1 Produ t OVORVIGW cidad 4 2 SPA EAN eee dt ea tn atialints stun ide se 5 3 COMMQUPATION EE E EE E E EEE EEE EE 6 3 1 Configuration Exar ples vic cs ieceescientees ic e dec 7 FE 0MmS ia E 8 OOPS 9 6 Redundant ring A A A 11 7 Independent ring Sets ii eee 12 8 Change over TUnchonalilW tete near rada tadas tios 13 General environmental requirements for Nevion equipment rxrrrrnnnrrrrnnnnnnnrnnnnnvrrrnnnnnnnnnnr 15 Product WataYinsianic iden eminente melka RE daa skadestedet 16 Appendix A Materials declaration and recycling information oooooccccnn ncconicanancccnonc
13. pass selected by Main selected by Not in redundant CHO CHO mode Table 2 LED status description nevion com 9 ADP 3GHD Rev A GPI name Function Pin Mode Direction Electrical setup1 setup1 setup2 Maximums setup2 for GPI Status General error status for the Pin 1 Inverted Open Output outputs module Collector Max current open is alarm 100mA LOS Loss of signal or lock at Pin 2 Open Collector Output DROP1 Signal present on Drop 1 Open Collector 30V DROP2 Signal present on Drop 2 Pin 4 Open Collector Output Max power 200mW main active level standb acive level eve Ground 0 volt pin Pin 8 wo Table 3 Description of GPI interface L Fi Figure 8 GPI Interface Pair 3 nevion com 10 ADP 3GHD Rev A 6 Redundant ring setup INt LL Jysigral integrity amp Reclocker Switch Reclocker OUT1 PASS ADD DROP1 Change Over DROP2 DROP MUTE Switch E Reclocker PASS ADI OUT2 Signal integrity na T amp Reclocker D Figure 9 Redundant block diagram When the card is set up for a single ring with redundancy the basic functionality is as follows Mode DROP1 DROP2 OUT1 OUT2 ADD Muted Muted ADD1 ADD1 ADD DROP Best of IN1 and IN2 Best of IN1 and IN2 ADD1 ADD1 PASS Muted Muted IN1 IN2
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