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1 FM07I4A

1. appear PLUS LAP C 32128 Standard 3 10 CNO2 S N 12C alc Bus Signal Trigger Run Stop Data Tools Window Help i iml b bh HEET dh RMH aj ia Channels Setup RAU EN y xj BY Signal Filter Sett Clock Source Group into Bus Ungroup from Bi z 4 Frequency SMHz i Bus Signal Trigger RunjStop Data ES quency zj Hi Sampling Setup Pes Synchronous Clock x Format Row C External Clock iw Channels Setup i P Rename Rising Edge Frequency 100 igl Signal Filter Setup Falling Edge Min 0 001Hz Max 100MHz a ae Note The external clock voltage level is the same as the port 4 trigger level Group into Bus Ckri4 G Ungroup from Bus Ger Sampling RAM Size Compression Mode Signal Filter Expand RAM Size 128K Data Compression H T 5 s Signal Filter Setup Channel number will be Collapse limited to 32 Format Row k Apply Cancel Restore Defaults Help Rename om oce Restore Defauts owe Signal Filter Setup l x m Filter Condition PortA Filter Condition Por tB x m B x or Filter Condition PortC s Filter Condition B PortD Filter Condition Filter Delay Setup v Activate Filter Delay Select Filter Delay Mode Select Delay Start Point Delay Time According to Filter Condition Start Edge fi End Edge Min 1 Opposite of Filter Condition C Period Delay
2. Protocol Analyzer Property Write Bit Low Level Don t stop analyzing when NACK appears ACK v Low Level Add the Read Write Bit for Slave Address m Protocol Analyzer Color Start Data Slave Addr Read Write Reg Addr ACK A NACK D ACK D NACK Stop Cancel Default Help Fig 4 67 Protocol Analyzer I2C Configuration dialog box Step6 Set the I2C Configuration dialog box Pin Assignment SDA Channel It is the Data channel and the default is AO SCL Channel It is the Clock channel and the default is A1 Data Mode Set the Data Length used by the Slave Addr and the Data Protocol Analyzer Property Set the Write Bit or Read Bit to Low Level Set the ACK or NACK to Low Level Don t stop analyzing when NACK appears When the option is selected the data will be analyzed continuously when the NACK appears Add the Read Write Bit for Slave Address When the option is selected the decoding will be displayed by way of the added Read Write Bit for Slave Address Protocol Analyzer Color Users can vary the colors of the decoded packet Step7 Press OK to exit the dialog box of Protocol Analyzer I2C Steps Click Run to acquire I2C signal from the tested I2C circuit Refer to Fig 4 68 Tip Click BB icon to view all data and then select the waveform analysis tools to analyze the waveforms E le FRR NS LAD 037128 Stanelerd YLI OC 5 7 ON TFC ale iy De PDusisonal Tigger Run stop Data
3. Rising Edge Protocol Analyzer Setting Protocol Analyzer Parameters Config re ZEROPLUS LA CAN 2 08 MODULE v1 32 00 CNO1 ZEROPLUS LA I2C EEPROM 24LC561 24LC562 MODULE V1 00 00 CNO1 C ZEROPLUS L I2C MODULE 2 01 03 C ZEROPLUS LA LG4572 MODULE Vv1 00 00 CNO03 ZEROPLUS LA PECI MODULE V1 11 00 CNO01 C ZEROPLUS LA PT2262 PT2272 MODULE v1 00 00 CNO1 ZEROPLUS LA S2Cwire AS2Cwire MODULE v1 00 00 CNO1 C ZEROPLUS L SPI MODULE 1 11 03 ZEROPLUS LA UART MODULE V2 13 00 CN01 NAM A DA 4 BASADA 2 0 oR v Use the DsDp Find More Protocol Analyzer Fig4 34 Bus Property Every Logic Analyzer Module can provide some basic Protocol Analyzer plugs When users need to use the analysis which is not provided by the basic Protocol Analyzer plugs you can purchase from our company and then you can get this Protocol Analyzer plug and the register code 107 FMO7IAA Phe Te RBS DS PEZ a The Zeroplus Logic Analyzer a Zeroplus Technology Co Ltd User s Manual V3 10 STEP 1 Put the CAN2 0B Plug in the Plugins as the Fig4 35 L EIEIDSA Imi x Fie Ek Wen Fates ek Halo Bwt e ay eh Dune Ces AE GE il rh ORE s Sug WIRE FkgCaMBus PDA FugK di Pugstdi Fuga T di Fig4 35 PluginsA STEP 2 Select CAN2 0B in the Protocol Analyzer list Bus Property xj Bus Setting C Bus Color Contig e Sctivate the Latch Function AD
4. Fig 3 154 Workaround Color Interface Waveform Background The Logic Analyzer s Waveform Viewer Background Color List Background 1 The Logic Analyzer s First Listing Viewer Background Color List Background 2 The Logic Analyzer s Second Listing Viewer Background Color All optional items include the current color of Cursors Grid Unknow Line Default Bus Bus Text List Text and Time Text users can scroll the vertical wheel to view the selectable items Bus Error Users can configure the color of Bus Error Data from the Color Setting dialog box Bus Error Text Users can configure the color of Bus Error Text from the Color Setting dialog box Relating When users select one item to change the color of the item and users want to change other items into the same color they can select other items at the same time in the Relating column then the selected items will be changed into the same color So it is convenient for users to change many items into the same color once After the background is altered corresponding color automatically changes according to the contrast FM0714A i PHRSR E The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 ratio When users set the color for the workaround and select the option the system will switch other colors automatically to become the contrast color When being printed the background is white When being printed the background color is white Wavefor
5. Merge nene It can merge with the different export files See the Merge dialog box below x 1 2 3 Object file Ei MO Open File to merge Cry ALI txt OK Cancel Fig4 165 Merge Dialog Box Object File 1 It is the covered file that is to say it is a new file 2 It can display the path of the Object File and the file name 3 It can open the Object File by clicking the Open option File to merge 1 It can create the new file with the object file 2 It can display the path of the File to merge and the file name 3 It can open the File to merge by clicking the Open option Refresh Rees Pressing this button can refresh the data status of each Address data when there are some alterations in the Bus Data Reset oem The data status of each Address will be cleaned out and returned to the original status by pressing the button 180 FMO7IAA Phe eee ie BR eS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Display Alteration l l l l l l The Data in the List Window of the Memory Analyzer will be cleared by pressing this button and the List Window will display the alteration status of each cell If the same Address has been written or read repetitively the background of the cell will be gray and the list window will display the Data of the last packet If the Address doesn t have any alteration the Address Data will display the data of the Add
6. to i0 Host Bit 130 to o0 Device Bit 130 to 250 v Response 195 to 320 Remark 1000000 is infinite Protocol Analyzer Color Break Recovery Address Read Write Data Cancel Default Help Fig4 112 Protocol Analyzer HDQ Configuration dialog box Set the HDQ Configuration dialog box 150 Pin Assignment HDQ has only one signal channel therefore it only specifies the name of the channel and marks the selected channel Protocol Analyzer Name Display the name of the selected Bus Channel Preset as AO Timing Settings us Set the time for Break Address Read Write Data and Recovery Protocol Analyzer Color Users can vary the colors of the decoded packet FMO7IAA fo mag EH S RO BEER Z2 8l The Zeroplus Logic Analyzer gt eroplus Technology Co Ltd User s Manual V3 10 Operating Instructions Open the LA operation interface E ZEROPLUS LAP C 32128 Standard V3 10 CN02 S N 00000000001 LaDoci rr FrrrB rre r Fig4 113 Operation Interface Sample the HDQ signal or open the sampled waveform E ZEROPLUS LAP C 32128 Standard V3 10 CN02 S N 00000000001 LaDoc1 LEN HEN ed CD fd KD Fig4 114 HDQ Waveform 151 FMO7IAA PRE RSG DIES PR 4x 8l The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Arrange the signal channels into Bus P ZEROPLUS LAP C 32128 Standard 3 10 CNO2 S N 00
7. 5 o Lj l T e a M M M G O M U a a e e ee e ee eee e e ee ee eee mm M ka Ear 7 Fig 4 138 Before and After Compression Using 128K memory depth before Compression has been applied the total of the data was 2048 after the Compression had been applied the total of the data was 124415 therefore the compression rate is 60 750 Tip Click icon to view all data and then select the waveform analysis tools to analyze the waveforms Step5 Click the compression icon again or click off the compression function to stop compression Tip Compression cannot be applied with the signal filter function at the same time 166 FMO7IAA PREM RE UB PR 2 8l The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 4 7 Signal Filter and Filter Delay The function of the Signal Filter and Filter Delay allow the system to keep the required waveform and filter out the waveforms that aren t required 4 7 1 Basic Setup of Signal Filter and Filter Delay Software Basic Setup of Signal Filter and Filter Delay Step1 Set up RAM Size Frequency Trigger Level and Trigger Position as described in Section 4 1 Step2 Set up the trigger edge on the signal or the Bus to be triggered Step3 Click icon or click the Signal Filter Setup button on the Sampling Setup dialog box or select the item form the pull down menu of the Bus Signal and then the Signal Filter Setup dialog box will
8. Export Merge Refresh Reset Display Alteration Ba Bus1 12C Es ieee eee eee eee ee eee Write data Read data oO 1 2 3 4 5 6 7 8 9 A B C um qq J p jJ ppp 1 1 3 odo tT qq e p ee ox20 do o So oxa oo o IL T T T T T T TS com 1L E E E E E A E A A E Loo o o S S e S e S S ogg LT 1 1 1 a CRS ET FORT a AN eNO EON j Unused 0X30 0X3F v Compact Mode Complete Mode Fig 4 163 Compact Mode Memory Analyzer x lt lt IE gt gt option Import Export Merge Refresh Reset Display Alteration TN Bus1 12C Write data Read data Address Data Address Data Address Data Address Data Address Data Address Data j Address Data Ac oxo0 oxo X ox oxoa oxo4 oxos oxo C oao ar ox oxig oadas v Jc oco ox21 0x22 CempatMoe ox24 25s ox c iw ames Mode ox oa xa oms g oxa oas ox c w losi sess os loss o C oxeo oxen oxs2 oxes oxs4 xs oxss c oco a jo2 o3 o4 lvs c SO Fig 4 164 Complete Mode Buttons lt lt It is used to find the first packet ES It is used to find the previous packet E i It is used to find the next packet m E 4 ES It is used to find the last packet Option It is used t
9. Fig 4 31 Trigger Column 2 Set Binary Hexadecimal Decimal Decimal signed or ASCII as the Data Format of the Bus to represent the value see Fig 4 30 3 Set and Don t Care and type the value of the Bus into Value column to set the trigger condition 105 FMO7IAA 106 Phe Te RBS DS PEZ a The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 of the Bus 4 Click OK to confirm the settings Step4 Click Run and activate the signal from the tested board to the system to get the result as shown in Fig 4 32 Tip Click icon to view all data and then select the waveform analysis tools to analyze the waveforms Set Value is 2 as Hexadecimal and set Operator equals to then click OK Click Run and activate the signal from the tested board to the system to get the result as the trigger happens on 0X2 f File Bus Signal Trigger e Data Tools Window Help X sz Ax Be Te ty AN Rc Bar Bar Bar Bar Scale 27 5301532 Display Pos 343 APos 64527 v A T 64527 v A B 30 7 Total 131072 Display Range 345 1034 BPos B4497 B T 64487 v Compr Rate No 207 465 69815 57836 205487 343138 480788 618439 755 08 893741 1031 38 x LLL xos oxi Bus Trigger Protocol Analyzer Trigger L Bus Name Operator Bust v E Data Format C Binary C Decimal C Decimal signed Hexadecimal ASCII Cancel
10. Fig4 81 Packet Length If the STOP falls short of condition it isn t noted down in UART Packet Length From START Starts TimeStamp to STOP Unknow End Flag TimeStamp Packet Idling Length Unknow End Flag TimeStamp to START TimeStamp 132 FMO7IAA C O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 4 5 4 SPI Analysis SPI Introduction SPI Synchronous Peripheral Interface is a parallel synchronous full duplex protocol with a Bus like physical interface This protocol was first developed by Motorola and was generally used for EEPROM ADC FRAM and display device drivers which are equipped with low data transmission speed The SPI data transmission is synchronous in both receiving and transmitting directions Although Motorola initially did not define the clocking impulse it is commonly seen that the clocking impulse is according to the master processor In practice there are two clocking impulses CPOL Clock Polarity and CPHA Clock Phase The configuration of both CPOL and CPHA decides the sampling rate When the SPI must transmit serial data it initiates the highest bit Since SPI is a synchronous communication protocol and data transmission may not be in bytes a complete SPI signal Packet must consist of SCK MOSI MISO and SS segments with CPHA and CPOL They are as following SCK Serial Clock Line SCL MOSI Master data output Slave data input MOSI stands for Master Out Slav
11. Min 1 Max 1BTTB131 J Fig 6 2 Delay Time and Clock 191 FMO7IAA SREB a The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 SWO9 How do I know the version number of my software interface program A Click Help from the menu See Fig 6 3 and then select About ZEROPLUS Logic Analyzer See Figs 6 3 and 6 4 Logic Analyzer Help Fi keyboard Map Problem Feedback 8 About ZEROPLLS Logic Analyzer About zZEROPLLIS More Protocol 4nalyzer Fig 6 3 About ZEROPLUS Logic Analyzer About 7EROPLUS Logic Analyzer LAP C Series Version Standard V3 100 C NOZ SIM ZP RE RAS 3 A RSE Zeroplus Technelogy Co Ltd The Information of Ehe Version ZEROPLUS LAP C Series Standard V3 10 Welcome to use ZEROPLUSS Logic Analvzer The document includes the version Detailed description invites reference company website Copyright C 1997 2010 ZEROPLUS TECHNOLOGY CO LTD Website http www zeroplus com kw Fig 6 4 The circled information is the version number SW10 How may I upgrade my software interface program A Visit our website at http www zeroplus com tw and follow the instructions for the English version You may also use the following address for English updates http www zeroplus com tw logic analyzer en technical support php SW11 Can I save my signal data to a separate pure text file txt A This feature is availab
12. SRERHEGBRAA The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 High Quality Professional Instruments Q ZEROPLUS FA H User Manual PC BASED LOGIC ANALYZER LAP C SERIES FMO7IAA C O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 Features or Zeropius Logic AnlalV2G6L uicccaseodcacui vue Soci eco ep saecu eus eo epa uet n EcB enu nIE oux ecu UuN E RE UI E Ceu SUC Us ERE E EUES 5 Ll Package dicc NR 6 e ITN O RR RE T E I E 8 1 3 Hardware Specifications PORE ETTTU m 10 1 44 System Requirements coe cserdcssseccegertcessiecnes beet eterscensdecdenenantecnetecouddcGarsueresesdeee onnxbecesdeecaecuxedeacexestexeeeneees 12 1 4 1 Operating System Requirements cccccsscccccseeecceeseecceeeeeceeececsueeesseseeecsuueesseueeessegeeessgesessansnesenas 12 1 4 2 Hardware System Requirements cccccccccsseccecseeeeeseeeeeeseeeeeeseeeeeeeeeeeseeeeesseeeeeseeeeeeseeeeesaaeeeesesaeees 12 1 5 Device Maintenance and Safety cccccccccsssecccceseecceeececceuececseueeeceusceeseueeessegeeessuueeesegecessansueeesseseessaass 13 Dri Me 15 zx SOM Wee lst NOMA NOE Eom m 16 Ml iac ciel TL E Um 18 PS MEN apros RI E 20 i dhili me 21 21 Menu
13. X AF Di ke FMO7IAA O PRARRRARE The Zeroplus Logic Analyzer Zeroplus Technology Co in User s Manual V3 10 4 12 Multi stacked Logic Analyzer Settings The function of the Multi stacked Logic Analyzer Settings is mainly for connecting the hardware of many Logic Analyzers which are the same type and then use the software to stack the Logic Analyzers which are working independently It can improve the functions of the Logic Analyzer which are mainly manifested in two aspects expanding the RAM Size and adding the number of the test channels Tip 1 The max number of the Multi stacked Logic Analyzers is four The RAM Size of the four Logic Analyzers can reach to 128K 4 and the test channels of the four Logic Analyzers can reach to 32 4 2 The function of the Multi stacked Logic Analyzer Settings is available for the LAP C 32128 LAP C 321000 and LAP C 322000 Modules and it is not available for the LAP C 16032 LAP C 16064 LAP C 16128 and LAP C 162000 Modules 4 12 1 Basic Software Setup of Multi stacked Logic Analyzer Settings STEP 1 Click Tools on the Menu Bar then select amp to activate the function of Multi stacked Logic Analyzer Settings Customize Color Setting EUS Bus Property id Refresh Protocol Analyzer E Multi stacked Logic Analyzer Settings Analog Waveform Fig4 168 Multi stacked Logic Analyzer Settings Interface STEP 2 Click amp to open Multi stacked Logic Anal
14. ranner seno T amaa ss oen ee t Conese e a ae beh i ad ats SOUS n Channel setup 7206 15 4 312 1 0 72 615 4 3 2 1101718 53 413 2 110 21 6151413 1 ra SiSidi 3 2 1101 716 413 2191 01710 14 93121 017 5 4 3 2 0 2 1 5 4 3 2 1 01 71 6 4 3 1101218581413 2 1101 278 814 3 110 721 6 5 4 3 2 1 0 7 6 5 4 3 2 110 7 68 5 413 2 1 0 7 6 5 4 MED 2 110 7216 514 312 11 0 7 615 4 3 12 110 718 5 413 21110 716 5 312 110 9 91413 2 7 9017 9151 41312 71017180191 413 10 6H 4 32 10 7 654322101 6543 18101718615 413 101 785 4 32 10 21 6 5148 312 3 917 6 15 4 3 2 1101718 51 413 MI RN Tip a fey I pe 1 heart uS FR d fe We b un o a F Reserve navelo date and show Uem if Channels Setup Fig 3 25 Channels Setup See details in Section 4 2 FMO7IAA O PRERHRGERA Zeroplus Technology Ca H The Zeroplus Logic Analyzer User s Manual V3 10 Tip Add Bus Signal Delete Bus Signal Delete All Restore Defaults Reserve waveform data and show them Croup mto Bus trlt ts Ungroup from Bus Ctrl U Expand Collapse Format Row 34 Click the Add Bus Signal button to add a channel This will appear as New0 Click the Bus or channel you want to delete and press the Delete Bus Signal button Press the Delete All button to delete all the Buses and channels Press Restore Defaults to return all channels and Buses to the system defaults
15. A At this stage the driver CD is not auto executable The primary issue here is a chipset problem Though these six Logic Analyzer models seem only different in model number they are quite different in firmware and chipsets Due to installation procedures see Chapter 2 we are unable to compile a driver program that auto detects the chipset at the beginning of the installation Q2 Why does the installation software keep giving an error message saying that don t have enough memory A This kind of problem happens in many hardware installations Turn off multimedia programs such as Media Player media decoders media encoders and so on If there are any multimedia icons in the system tray see the far right end of the START menu taskbar remove them The Logic Analyzer software will run better in memory locations from 64 to 512 MB Q3 What should do if want to share this software interface with all users of my computer after installing it A The shortcut is removing the software interface and then reinstalling it By default the program is available for all users Q4 My HDD is modest which software components are absolutely necessary A Choose Custom as your setup type Next unselect items such as examples and tutorials You must install at least the Main App application Q5 My MS Windows system will not accept the driver what should do A Double check that you run the correct Setup exe from the folder that corresp
16. C Select Region EB Select Line Color V Opposite of Color EB Color of the Note Capture Cancel Fig 3 13 Capture Window This feature is equivalent to Alt Print Screen or Print Screen Capture to File Save the captured image as either a jpeg or bmp Clipboard Copy the captured image to the clipboard for use in other applications MsPaint Directly start MSPaint to view the captured image Capture Region Full Screen Capture everything on the screen Select Region After pressing the capture button a cross hair will appear on the screen Left click the mouse button to drag an area to capture Select Line Color Click the color box to change the color Opposite of Color Click this check box to ensure that the note text will be the opposite of the line color Color of the Note Choose the color of the note text Note Type in a note to attach to the captured image FMO7IAA PRE ESAS i BPR Zeroplus Technology Co Ltd Language amp ninos 00 Ce Tip This function has been enhanced now users can select the pages which they want to print or only the Current Page Print Preview Recent File Exit 29 The Zeroplus Logic Analyzer User s Manual V3 10 Capture Click the button to capture the image Cancel Click Cancel to end the capture Chinese Si Chinese Tr jw English Fig 3 14 Choose among Chinese Simplified Si Chinese Traditional
17. Step4 Click Run and then activate the signal from the tested circuit to acquire the result on the waveform display area Fig 4 138 shows the result before and after compression has been applied We ZEROPLUS LAP C 32128 Standard 3 10 CNO2 S N 00000000001 LaDoc2 fw E UR ne Ax Be Te LI ME gt I Bar Bar Bar Bar Bar Display Pos 0 APos 15 v A T 15 7 A Display Range 1023 1025 BPos 15 v B T 15 v ompr BER n 901 12 575 84 450 56 225 28 225 28 450 56 575 84 301 12 1126 4 1 je pes seq 526 pet err es Reti JN Ec E jet eer iss jeep en Dati sd Ee eet quos Don ppp l pamali ee DENOS vr En End Connected LA 165 FMO7IAA PRE BRA a The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Y ZEROPLUS LAP C 32128 Standard 3 10 CNO2 S N 00000000001 LaDoc2 loj xj o File Bus Signal Trigger Run Stop Data Tools Window Help 81 x Demata s A w xk z o poomi vjes om 50 w e s Page fl Count l FEARTA ii E Rw 2 2194602 7 R oe Ae B Te be BB le 910 0 7 Height v Trigger Delay 1 Display Pos 0 APos 15 v A T 15 v Ao ou Display Range 1023 1129 BPos 15 v B T 15 v Compr Rate 60 750 450 56 675 84 901 12 1126 4 red gs p pee ea e pes Tm uem peer 5 L5 5 5 L5 5 5 L5 p p p p p p p p p p p p p p 5 5 L5 5 5 L5 5 5 5 2 Lj o o
18. Zeroplus Technology Co Ltd User s Manual V3 10 Select the decoding function of the protocol analyzer CAN 2 0B and select OK to confirm Ee ZEROPLUS LAP C 32128 Standard 3 10 CNO2 a aDoc2 loj x a Fie Bus Signal Trigger Run Stop Data Tools Window Help x j BDcm amp wee ner ER 128k z sie f100MHz m om me 50 m Xe 4 Page fi e Count fl gt S A EB 8 N E v iid n 18995 19 vl P 2 ae Be Te e B 848 so Haight 30 7 Trigger Delay 1 Scale 526 4514918 Display Fidis a4 xi A B 30 v Total 16826353 Display F Bus Setting Compr Rate 128 375 Bus Signal Trigger File C Bus DD 81 521 9562513 779 95651 46 036 3567778 294 t We sg Q lv Activate the Latch Function 40 v Y oxo Y Yoxoy Y ox e PLL Q Protocol Analyzer Setting 9 Protocol Analyzer Parameters Config e Q ZEROPLUS LA CAN 2 08 MODULE V1 32 00 CN01 amp ZEROPLUS LA HDQ MODULE V2 07 00 CNO01 ZEROPLUS LA I2C EEPROM 24LC561 24LCS62 MODULE V1 00 00 CM01 amp ZEROPLUS LA I2C MODULE v2 02 00 CNO1 c ZEROPLUS L LG4572 MODULE V1 00 00 CN03 amp ZEROPLUS LA Low Pin Count MODULE V1 09 00 CN01 ZEROPLUS LA MIL STD 1553 MODULE V1 00 00 CN01 e C ZEROPLUS LA PECI MODULE V1 11 00 CN01 E amp IV Use the DsDp Find e More Protocol Analyzer e OK Cancel H
19. 19 DACKE Data D ACK Fig 4 53 Waveform and Packet Synchronization Interface FMO7IAA O PREM RE LB PR 2 8l The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 4 5 Bus Analysis The setup is correlated to the Bus which needs to be made up for example Bus Protocol Analyzer Open the dialog box BUS STEP 1 Click Tools on the Menu Bar and then select Bus Property or select to set up Bus Property E Customize Color Setting BUS Bus Property ty Refresh Protocol 4nalyzer gu Multi stacked Logic Analyzer Settings Analog Waveform k Fig4 54 Bus Property on Menu Bar Fig4 55 Bus Property on Tool Bar STEP 2 Click the Right Key on the Bus Signal column and then select Bus Property Tip The signals must be grouped into Bus or the Bus Property can not have effect Trigger Filter ii Sampling Setup ie Channels Setup zu Bus Property Bus Signal Analog Waveform E Fe Reverse n Ag Group inte Bus Cres LIngroup Fram Bus Ctrl U Add Channel F A5 Copy Ghannel Delete Channel Delete All Channels m SAT Restore Default Channels E y B Format Row k Rename Fig4 56 Right Key to Set Bus Property 117 FMO7IAA 5 gt RERERGBESLA The Zeroplus Logic Analyzer eroplus Technology Co Ltd User s Manual V3 10 4 5 1 Bus Analysis The Bus Analysis function enables the system to analyze the Bus Basic Software
20. Rising Edge z Protocol Analyzer Setting f Protocol Analyzer Parameters Config vss et SUIS ECA eta ZEROPLUS LA I2C EEPROM 24LCS61 24LCS62 MODULE 1 00 00 CN01 ZEROPLUS LA I2C MODULE 2 01 03 ZEROPLUS LA LG4572 MODULE V1 00 00 CNO3 ZEROPLUS LA PECI MODULE v1 11 00 CN01 ZEROPLUS LA PT2262 PT2272 MODULE v1 00 DO CNO1 ZEROPLUS LA S2Cwire 452Cwire MODULE v1 00 00 CNO1 i ZEROPLUS LA SPI MODULE V1 11 03 ZEROPLUS LA UART MODULE V2 13 D0 CND1 zi gm ICS dE dugc og dnd 4 RAATI ae EI v Use the DsDp More Protocol Analvzer cout omes Fig4 36 Bus Property STEP 3 Click Parameters Configuration button select Register and enter the Serial Key 108 FMO7IAA 4 5 BEER OD SERT S The Zeroplus Logic Analyzer eroplus Technology Co Ltd User s Manual V3 10 PROTOCOL ANALYZER CAN 2 06 eraut Fig4 37 Protocol Analyzer CAN 2 0B Register dialog box 109 FMO7IAA PREP eh in Blea The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 4 4 Bus Packet List Bus Packet List is a graphics list which is used for doing Statistics and showing Bus Packet List It is visual and direct especially for I2C USB 1 1 and CAN 2 0B When there is a packet list it gets twice the result with half the effort to check the data Packet List has its startup button in Toolbar After starting it it will show a small window under
21. Transmission LSB gt MSB Data Reverse Decoding Direction Protocol Analyzer Color Cancel Default Help Fig 4 74 Protocol Analyzer UART Configuration dialog box Step4 Set the UART Configuration dialog box Pin Assignment UART only needs one channel to decode the signals the default is AO Protocol Analyzer Property Parity Check There are three options on the dropdown menu None Parity Odd Parity and Even Parity and the default is None Parity Data Length Set the Data Length in the range from 1 to 56 Stop Bit Select the Stop Bit from the three options 1 1 5 and 2 and it is stopped in the High Level Percentage Sample Users can select the Percentage from the options 5096 60 70 80 and 90 on the dropdown menu and the default is 70 Transmission Direction Set the Transmission Direction to MSB gt LSB or LSB gt MSB 2 71 T ERG Sie Lung z dici l FO amp un E om STOP UNKNOW z DATA 11000001 STOP UNKNOW AL B amp Fig 4 75 Data Waveforms MSB gt LSB and LSB gt MSB Baud Rate The dropdown menu has options as below 110 300 600 1200 2400 4800 9600 19200 38400 57600 115200 230400 460800 and 921600 Users can select the desired value from the menu At the same time The Auto can be selected to calculate the Baud Rate automatically If the Auto is selected the Baud Rate will be calculated and display
22. bz bin Em ros uz rs Pes bs bs n s d ic Xn Ep sn en tren fg ed un n pr pn a b oir n lbs Pls Des PE Ds Fb Is es sn bm bx Mes nis dose n ades ost or bar UR dn be be oes Op bn rs ex b Pn Ue E i Eben Mes s es eps Mer NS s s iban ln EL EDO SES Bb ERO ERO ERA 515 GL SE SEL 93 BP EDU Spo SC EO Eos b Og epu STO ET id Port P Fig 3 133 Channel Selection Allow the choice of pins in which port will be included in the statistical analysis of a test run Column Selection Column Selection x E v Full Period Positive Period IY Negative Period v Conditional Full Period Jv Conditional Positive Period I Conditional Negative Period fw Start Pos Jw End Pos Selected Data c Fig 3 134 Column Selection Allow the choice of items which will be considered in the statistical results Condition Parameter Condition Parameter X Conditional Full Period iyus lt Time Conditional Positive Period 10us lt Time lt Conditional Negative Period 10us lt Time cancel Fig 3 135 Condition Parameter Allow the setting of time intervals for Conditional Full Period Conditional Positive Period and Conditional Negative Period 10us 76 FMO7IAA hie PS AG tt 5 P 23 8 The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 xj Channel Selection Selection Column Condition ee Warning zm Refresh statistics Filter CHANNEL Full Per
23. s Manual V3 10 LAP C Standard InstallShield Wizard InstallShield Wizard Complete Setup has finished installing LAP C_Standard on your computer Yes want to restart my computer now Remove any disks from their drives and then click Finish to complete setup LAP C Standard InstallShield Wizard Ready to Install the Program The wizard is ready to begin installation Installshield 17 LAP C Standard InstallShield Wizard Customer Information Please enter your information Installshield LAP C Standard InstallShield Wizard Setup Type Select the setup type to install installshield FMO7IAA A RARER ARZE Zeroplus Technology Co Ltd 2 2 Hardware Installation The Zeroplus Logic Analyzer User s Manual V3 10 Hardware installation simply involves in connecting the Logic Analyzer to your computer with the included USB Cable as shown in Figures 2 4 and 2 5 Fig 2 2 18 1 Plug the fixed end of the cables into the LA Fig 2 1 2 Plug the loose ends into the connectors on the circuit board to be analyzed Fig 2 2 Note The following sequence must be observed when connecting the connectors into the circuit board AO Brown A1 Red A2 Orange A3 Yellow A4 Green A5 Blue A6 Purple and A7 Gray 3 The circuit board must be grounded to the Logic Analyzer with the black Ground Cable Fig 2 3 4 Plug the square end of t
24. C O PREP i Bee The Zeroplus Logic Analyzer aeroplus Technology Co E User s Manual V3 10 Protocol Analyzer 1 WIRE Format Description Two speed types of 1 WIRE Standard 1MHz 1us High 5MHz 0 2us Four types of 1 WIRE Signals 1 Reset Every communications period starts with Reset signal Master will send a Reset Pulse so that all the Slave devices on the 1 WIRE Protocol Analyzer enter into recognition status When one or many Slaves receive Reset Pulse a Presence Pulse signal will be sent back from Slave indicating receipt of the signal 2 Write 0 Send a 0 bit to Slave Write 1 time slot Write 1 Send a 1 bit to Slave Write 1 time slot 4 Read Data Read data sequences resembles Write time slot However when Master releases BUS and reads data from Slave devices Master creates samples from BUS status In this way Master can read any 0 or 1 bit from Slave devices e Four signal types are described respectively in the following 1 Reset 1 When Master starts communicating with Slave Master first sends a low count Reset Pulse TX t of STL Standard speed 480us High Speed 48us for a period of time MASTER TX RESET PULSE MASTER RX PRESENCE PULSE i V PULLUP Vu LLUF MIN Vin MIN V L MAX OV RESISTOR mmm VAS TER DS2432 Fig4 94 Master TX Reset Pulse and Master RX Presence Pulse 2 Then Master releases Protocol Analyzer and enters the RX mode Through high p
25. Click on the Activate Filter Delay as shown in Fig 4 141 2 Click on the According to Filter Condition or the Opposite of Filter Condition to select the waveforms to be kept 3 Click on the Start Edge End Edge or Period Delay to set the Start Point of Filter Delay 4 Type the value of the Delay Time into the column of the Delay Time 5 Click OK then click Run to activate the signal from the tested circuit to the Logic Analyzer 6 The result will be displayed in the waveform display area as shown in Fig 4 140 Stop Signal Filter Filter Delay Click Stop then click Signal Filter Setup and select Cancel from the Signal Filter Setup dialog box to stop the Signal Filter or the Filter Delay Setup Click Stop to check the conditions of the Signal Filter or the Filter Delay Setup if there aren t any results Click icon to view all the data and then select the waveform analysis tools to analyze the waveforms Filter Delay Setup Select Filter Delay Mode Select Delay Start Point Start Edge Delav Time 5ns Min 5ns Max 327 675us According to Filter Condition C EndEdge C Period Delay Opposite of Filter Condition Fig 4 141 Filter Delay Setup FMO7IAA The Zeroplus Logic Analyzer O IPBERHERO E S IR ZY User s Manual V3 10 ZeroplusTechnaolegy Co i Tip Definitions of the Start Edge and the End Edge and the Period Delay are listed as Figs 4 142 4 143 4 144 and 4 145 ENS Condition
26. Connect Speed Standard t us Transmission MSB LSB Direction Data Length E hit Hir 1 bit ax 32 bit Data Min 1M ax 120 Cancel Default Help Fig4 100 Protocol Analyzer 1 WIRE Configuration dialog box Set the 1 WIRE Configuration dialog box Pin Assignment 1 WIRE only needs one channel to decode the signals and the default is AO Connect Speed The Connect Speed can be set to Standard 1 us or High 0 2 us Transmission Direction The Transmission Direction can be set to MSB gt LSB or LSB gt MSB MSB gt LSB From High Level to Low Level LSB gt MSB From Low Level to High Level Data Length The Data Length can be set in the range from 1 to 32 bit and the default is 8 bit Sampling Position The Sampling Position can be set in the range from 1 to 120us and the default is 30us Protocol Analyzer Color Users can vary the colors of the decoded packet 143 FM0714A l i SRRHRPABRLA The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 User Interface Instructions Set up the Protocol Analyzer 1 WIRE dialog box which is set as the steps of I2C x Fin Assignment Protocol amp nalyzer Color Owl Reset Pulse Presence Pulse Protocol Analyzer Property Connect Speed Standardi us Transmission MSB LSB Direction Data Length 8 bit hie 1 bit Mas 32 bit Data Fig4 101 Protocol Analyzer 1 WIRE Con
27. ILS ULL ILL SSS G Fig 4 85 SPI Signal FMO7IAA 135 i SRR SIR The Zeroplus Logic Analyzer i Zeroplus Technology Co Ltd User s Manual V3 10 4 5 4 2 Protocol Analyzer SPI Packet Analysis PROTOCOL ANALYZER SPI E x Configuration Packet Data Format Register Cancel Default Help Fig4 86 Protocol Analyzer SPI Packet dialog box DATA List Data field captured by Bus in the packet display BUS Packet List BUS Packet List x Setting Refresh Export Synch Parameter Packet Name Timestamp Data Data Data Data Data Data Data Data 1 Busi 67 Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Bus SPI 12 23 34 45 56 67 78 89 9A Packet Name Timestamp Data Data Data Data Data Data Bus SPD Ed Fig4 87 Protocol Analyzer SPI Packet List Packet Length and Packet Idling Length 1 SS channel is activated SS Rising Edge iz the start of the packet Unknow End Falg 55 Falling Edea iz start of the packel Unknow Start reu SPI SCK oS DATA DATA OE Packet Lensth Fig4 88 Packet Length Packet Length From Unknow Start Flag TimeStamp to Unknow End Flag TimeStamp Packet Idling Length From Unknow End Flag TimeStamp to Unknow Start Flag TimeStamp 2 SS channel is not activated 136 FMO7IAA Phe Te RBS DS PEZ a The Zeroplus Logic An
28. Max 65535 Display Bar Setup v Show Bar Bar Style Original Y Bar Width fi OK Cancel Restore Defaults e Fig 4 139 Signal Filter Setup Set the high level as Filter Condition on the signal A1 Step4 Signal Filter Setup 1 Setup the Filter Condition as or onthe signal to be analyzed 2 Click OK then click Run to activate the signal from the tested circuit to the Logic Analyzer 3 The system will display only the waveforms of the signals which are qualified by the Filter Condition 167 FMO7IAA AP REI fe BO i ARAE Zeroplus Technology Co Ltd The Zeroplus Logic Analyzer User s Manual V3 10 10 5 E 5 15 88 30 525us 20 4us LILUIL TL TEIL TL 655 36us 655 36us 655 36us 655 36us 655 36us 655 36us Filter Bus Signal Trigger 10 15 20 311 Yous 309 055us Filter 15 5 10 estes Lone sme necne Eme ne nes red Lean een IRE 33us 33us 33us 33us 33us 33us 33us T 388 388 388 388 388 388 388 Fig 4 140 Without With Signal Filter Setup The first picture shows the result without any signal filter setup The second picture shows the result which has set the high level on the Filter Condition of the signal A1 Only the waveform with the high status of A1 is displayed Step5 Step6 Tip Tip 168 Filter Delay Setup 1
29. Name Timestamp Data Data Data Data Data Data Data Data Data Data Length LO 1 1 o 1 1 Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length 1 1 1 1 1 Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length LO j 1 1 1 Packet Name TimeStamp jata Er jata Jata jata Jata jata ata jata Jata Length 1 1 1 1 1 Packet Name TimeStamp ata Jata Jata Jata Jata jata jata Jata Jata Jata Length 6 Busius 973 1 1 Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length 0 1 90 1 90 1 90 1 O0 1 gl Fig 4 50 Synch Parameter on the BUS Packet List At the same time a Synch Parameter Setting dialog box is added 114 FMO7IAA PREIS PR 2 8l The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Syuoch Parameter Setting i X Synch Point of Packet List Synch Point of waveform Area f Top M C Middle Middle Fig 4 51 Synch Parameter Setting Dialog Box Activate Packet and Waveform Synch The default is not activated Top When the Packet and Waveform Synch is activated the synch point in Packet List is the top packet segment which is displayed by list Middle When the Packet and Waveform Synch is activated the synch point in Packet List is the middle packet segment which is displayed by list Left When the Packet and Waveform Synch is activated the synch point in the waveform
30. One is the Basic File and the other is the Contrast File It can line out the different waveform segments of the basic file in the contrast file Meanwhile it can count the number of the difference 4 9 4 Basic Software Setup of Data Contrast STEP 1 Click Data on the Menu Bar then select xi to open the Data Contrast Settings dialog box 173 Data Contrast Settings d x Active Data Contrast Contrast Files Basic File 2 ale Contrast File 1 alc Error Tolerance None C Beginning of Data Contrast Result Error Stat gt Contrast Beginning Point 7 Bar Tata Tools Window Help 2 V 77777 Pii Select an Analytic Range ASAS ee DT Noise Filter a E Bus Width Filter v Poll the contrast waveforms synchronization Pin Assignment Y lata Contrast v Display Files the contrast differences P Sau Data wWelwe Ctrl F W Display Files horizontal Perform Contrast EJ Find Pulse Width v Da contrast automatically when being run l To the Previous Edge Fil Apply Close Help Fig4 153 Data Contrast Interface Activate Data Contrast Click the checkbox to activate the function of Data Contrast Basic File It is the standard contrast file Contrast File It is used to compare with the Basic File Contrast Beginning Point It can set the beginning point of the contrast at Trigger Bar or Beginning of Data Error Tolerance It is the allowable time error when
31. Right Key Menu on the Waveform Area fi Find Data Value CtrltF fo Find Pulse Width ro To d Tip Place Add Bar The functions of the right key menu on the E n Zoom E waveform area are similar to those of the ey Hand H ty Normal ESCAPE Data menu Show all Data Fid The menu adds the functions such as kj Previous Zoom CtritZ Place Ds and Dp Add Bar in the waveform Jews Meni 4 Wave Mode d display area Color Bus Data Color Bus Single Data Color Fig3 115 Right Key Menu on the Waveform Area Place Bar Flace B Bar Flace Is Bar Place Ip Bar Flace More Tip The right key menu on the waveform FMO7IAA AP BET BRE I TS PR 2x 8l The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 area adds the function of Place Ds and Place Dp However the functions are only used after the Ds and Dp bars are activated otherwise they will be disable These functions are the same as that of A Bar When the mouse is stopped at a special position click the right key on the mouse select the Place Ds or Place Dp the Ds or Dp bar will move to the special position For example Open Select an Analytic Range select the special position is 10 and then select Place Ds See the figure in z eR y CHE LILI UUU the right column EC x ar Que Gud Shinde WAN FE A TE a ome amp fines fe slo e Tip W
32. User s Manual V3 10 Menu Bar Hel Menu Item Detail Menu amp Dialog Box Logic Analyzer Help Fi Features Tnetallation Fig 3 104 Open Logic Analyzer Help file E Hot Key View Keyboard Map i Fig 3 105 The Table of Keyboard Map Report a problem to the service e mail at service 2 zeroplus com tw About ZEROPLUS Logic Analyzer LAP C Series O PRARIOAPRAS version Standard v3 10 CN02 a Zeroplus Technology Co Ltd SIN The Information of the Version Prablem Feedback ZEROPLUS LAP C Series Standard V3 10 About ZEROPLUS Logic Analyzer 2 Welcome to use ZEROPLUS Logic Analyzer The document includes the version information of the software New Functions x Detailed description invites reference company website Copyright C 1997 2010 ZEROPLUS TECHNOLOGY CO LTD Website http www zeroplus com tw Fig 3 106 Copyright About ZEROPLUS Logic Analyzer Open the website of Zeroplus Technology to know more About ZEROPLUS More Protocol Analyzer modules 66 FMO7IAA PREAMP Bike Bl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Tip ZEROPLUS Logic Analyzer The function of Software Version Information Display for ZEROPLUS LAP C Series Standard V3 10 ZEROPLUS LA means that the software will open a small window Welcome to use ZEROPLUS Logic Analyzer The document includes the version SndON3Z Oo
33. called the Analog Waveform The Analog Waveform can be divided into two kinds namely Single Analog Display and Mixed Analog Display see the figures as below E ARORA AP 027 Bard CR ah CRI aa fm De eee e Bare Gie Dem mde im mg amp A OB UN te ji FER EE B B rigayea m orem Dee Bra kc Ewupise For iim AP A TaT1EETEHMS OF A mepi c Darg Fake din Tms Ele Couple Hruega iru b Dima B Paci Ll 6 Te hint Fig 3 82 Single Analog Display FMO7IAA J PRARRHARAA Zeroplus Technology Co Ltd The Zeroplus Logic Analyzer User s Manual V3 10 59 Fig 3 83 Mixed Analog Display FM0714A 2 RARER GARSS Zeroplus Technology Co Ltd 7 Window Menu Bar Windows Menu Item Waveform Display 60 waveform Display Listing Display Hot Mews Window m Navigator m Memory Analvzer 34 Bus Packet List Statistics Window Cascade Horizontal vertical Screen Display w lLabocl Fig 3 84 Window Menu Fel Gel 73 The Zeroplus Logic Analyzer User s Manual V3 10 F Fig 3 85 Window Tool Box Detail Menu amp Dialog Box File Bus Signal Trigger Run Stop Data Tools window Help g E amp l r ale 25KHz ital 81 92ms Display Pos ns Display Range 1r au e PT mu FS Waveform Display w Listing Display Hot News Window ia ZZ Navigator mm Memory Analyzer OF Bus Packet List Fil
34. figure 22 Y ZEROPLUS LAP C 32128 Standard V3 10 CN02 S N LaDoc11 File Bus Signal Tri ber Run Stop Data Tools Window Help Dl qm mem r i FEIN zx ll e S Al Bar Bar Bar Bar Bar qqer Dela Display Pos ns APos 600us Y A T 1 667KHz v A B 833 333Hz Y at Display ange 1ms 1 04ms BPos B Dus v B T 1 667KHz 7 Compr Rate No Menu Bar All operations are performed directly from the menu bar including configure label rename execute and stop Pull down menus allow easy navigation through the measurement panel Tool Bar The tool bar is the graphical user interface which can make you work with some of the more common applications From these icons you can change settings and operate the Logic Analyzer easily Note The prompting information of the shortcut keys has been added in the tooltips of the Tool Bar that is to say when users place the cursor on the icons the corresponding shortcut key information will appear For example the prompting information of the New button is New Ctrl N Ctrl N is the Shortcut Key of the function of New Information Bar The Information Bar displays information about the grids in the waveform such as Address Time Frequency Trigger Bar A Bar B Bar and other Bar Details of the labels are below Scale Define the acquisition clock that cont
35. users can use icons on the tool bar box or menu For the dialog box go to File menu to click Auto Save or go to Tools menu to select Customize and select Auto Save See Fig 3 151 ustomire x Common Setup Toolbars Shortcut Key Auto Save O Hew CtrltN File Name LA Open Ctrlt Close CtrltF4 Save Path EU c uy Documents LA Data ave tr ela Los Repetitive Run Auto Save Time Interval Data Display Menu Renewal Mode ime Interval pa Export Waveform CtrltShi t E Every Renewal E Export rea List C pen the first file after Tail Capture Window CtrltC stopping the Run Language gt amp Print CtrltP Print Preview Recent File ea em Fig 3 151 1 Auto Save on File Menu Fig 3 151 2 Auto Save Item of Customize Fig 3 151 Auto Save Auto Save The default is not activated after activating it keeps working and users also can choose Cancel to close it Activate The default is not activated after activating it keeps active and users also can choose Cancel to close it File Name Before users name the file the file name is defaulted as LA In fact the saved file name can add a serial number for the file automatically Save Path Name Users can enter the path directly or choose the path from the selected path button m Time Interval When the auto save function is activated the time interval from one finished sampling to the next activated sampling c
36. which means asking far data to come back Arbitration Field Identifier is 11bits its function is the sequence when transmitting signal numerical value is lower the priority is higher and the array is from ID 10 to ID 0 and the numerical value is not all from ID 10 to ID 4 finally RTR Remote Transmit Request is the judgment bit of transmission or Remote Transmit Request When RTR 0 it denotes that the data goes out when RTR 1 it means asking far data to come back Control Field Control Field consists of 6 bytes including Data Length Code and two Reserved Bits as Peli frame for future expansion The transmission reserved bit must be 0 Receiver receives all bits combining 1 with O As the below figure IDE and RBO of Control Field are Reserved Bits which must be 0 and the latter 4bits are only 0 8 which denotes the data behind will transmit several bytes data Fig4 121 Control Field Data Field The Data Field consists of the data to be transferred within a Data Frame It can contain from O to 8 bytes and each contains 8 bits which are transferred MSB first CRC Field 16bits CRC the last is a delimiter and the default is 1 156 FMO7IAA 2RARRGARLA The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Fig4 122 CRC Field Ack Field That is the return signal of Receiver which has 2 bits and the final is a delimiter whose default is 1 If receiving success Ack will send b
37. 3 65 Result from Normal to Zoom Out T YT EY Peo p zx E d e I Paga Com mJ mH JT 2B LN Se ARS RM IERUAS xl Haga 9 Tiago Due Meo A D pi npg T Dmm a c Fig 3 66 Show all Data FMO7IAA APBEELERE LB PR ul The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 x Previous Zoom CtrltZ Return to the last zoom Binary Decimal Decimal signed Hexadecimal Data Format k ASCII Fig3 67 Data Format Show numerical information in Binary Decimal Decimal signed Hexadecimal or ASCII format Waveform Mode To the Next Edge F12 Go To t Add Bar Alt z Delete Bar Alt B Ri zoom E amp Hand H R Normal ESCAPE TR Zoom In F9 Zoom Out F8 Square Waveform SERERE j t Sawtooth Waveform v Previous Zoom Ctrez Data Format List Data Made Fig 3 68 Square Waveform f To the Next Edge Fiz ao To Add Bar A A ee 7 aaa i Delete Bar Alt B an 4 3 ia zoom E em Hand H k Mormal ESCAPE a Zoom In Fa U zoom Qut F8 s Show all Data F10 w Previous zoom Cchrl 2 Data Format Waveform Mode Square Waveform List Data Mode Sawtooth Waveform Fig 3 69 Sawtooth Waveform FMO7IAA 52 PRR AG ARRE ZeroplusTechnaology Co Ltd List Data Mode k Tip The data for list mode are so many to be convenient for users that there is adding a List Data Mode function The for
38. Data Format Register Color Item Iv ID v Control W Data EI IY NACE Describe Cancel Default Help Fig4 135 Protocol Analyzer CAN 2 0B Packet dialog box Packet color can be varied by users The Packet displays with the waveform as below P ZEROPLUS LAP C 32128 Standard v3 10 CN02 S N 00000000001 LaDoc2 lol x o File Bus Signal Trigger Run Stop Data Tools Window Help 18 x Dc mss R E bb 128K vie 100MHz nar mu 50 9 Page 1 Count i gt z SEN R RE i 0 084382 7 amp R lay Oe E Te 6 PN 5 Height 30 TriggerDelay 1 Scale 1185 0867894 Display Pos 9576076 A Pos 64527 7 A T 64527 v A B 30 v Total 16826353 Display Range 9546448 9B B Pos 64497 v B T 84497 v Compr Rate 128 375 Bus Signal Trigger 9552373 7833558299 217 9564224 651 9570150 085 9576075 519 9582000 953 9587926 387 9593851 821 9599777 255 9605702 689 m MICE L TT WU LAUU LAU UUU LLL ULJU LUU AAI g A242 iem A3 43 be 4 BABA Det g A55 be g AB AS 4 J x setting Refresh J Export r Synch Parameter gl 31 IX RE OV IR Packet Name TimeStamp Basic ID A ID Data CRC AC Busl CAN 2 0B 9528479 DESCRIBE Unsatisfied Format BE ENCI GECTNIU3TIC RNC 67 03 94 2327 bes Ace End Connected Fig4 136 CAN 2 0B Packet List Display
39. Default Help Fig 4 32 Bus Trigger Setup FM0714A ZBEEL FERRE BER Z8 The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 4 3 Plug Analysis Plug Introduction Protocol Analyzer operates in the form of Plug every Protocol Analyzer has a plug per plug is independence modularization One Protocol Analyzer plug can analyze many Buses at the same time however because the independence of every plug the Protocol Analyzer plug only supports I2C UART SPI HDQ 1 WIRE CAN 2 0B at present In the future it will support more Buses and when the Protocol Analyzer renews it only needs to download the new Protocol Analyzer plug to cover the old Protocol Analyzer plug the speed is very fast Operating Instructions There are Plugins data file in the position of installing LA software All Protocol Analyzer plugs which are used at present are put in the data file the DLL file can be added or deleted in the content and in the Bus property all Protocol Analyzer plugs that can be used at present can be seen as the figure below Citi EET IE i FPrf Vey Paves mde Hea demic mb i dme Leder demo da Ul oX 3 IR kem HL o sS 9 4 C Ne PITRE Co Phe Pug gd RT Plugins Select an feat ven is descficthon me a He Cenerents Pih rk Pees Be mulis Fig4 33 PluglnsA Bus Property x r Bus Setting j Golor Config s C Bus Activate the Latch Function AQ
40. DialogBox 0 i Sampling Setup iij Sampling Setup x m Clock Source Asynchronous Clock Frequency 200KHz E Synchronous Clock C External Clock Rising Edge C Falling Edge Frequency 100KHz Min 0 001Hz Max 100MHz Note The external clock voltage level is the same as the port A trigger level Sampling RAM Size Compression Mode r Signal Filter RAM Size 2k Data Compression Signal Filter Setup Channel number will be limited to 32 Cancel Restore Defaults Help Fig 3 20 Sampling Setup See Section 4 1 for detailed instructions Tip i ooo Icon Description ek en MHz Md sieut ha Decrease l4 RAM Size Fig3 21 RAM Size ha Increase Choose the RAM Size and the internal clock frequency ah RAM Size from the pull down menus Decrease ae Internal Clock Frequency Increase Internal Clock Frequency RAM Size The amount of the acquired data that can be stored by the Logic Analyzer depends on the amount of the allocated RAM The total depth of the memory for the LAP C is 128K Bits in each probe If the Logic Analyzer starts gathering data with a 128K memory range it will take a long time to find the required information In order to avoid spending a lot of time gathering data select a smaller RAM size The RAM size options are 2K 16K 32K 64K 128K and 256K So if gathering data with 128K takes a long time
41. Home Professional Editions 32 Bit version Name e Windows VISTA 32 Bit and 64 Bit version e Windows 7 32 Bit and 64 Bit version 1 4 2 Hardware System Requirements Hardware Name Lowest Configuration Recommended Configuration CPU 166 MHz 900 MHz VGA Display Capability with VGA Display Capability with 1024x768 resolution or higher 1024x768 resolution or higher Display Device At least 100MB available space At least 100MB available space USB USB1 1 supported USB2 0 recommended 12 FMO7IAA gt FERRARS RAE The Zeroplus Logic Analyzer ee Zeroplus Technology Co Ltd User s Manual V3 10 1 5 Device Maintenance and Safety Follow these instructions for proper operation and storage of the Logic Analyzer 13 Table 1 7 General Advice Do not place heavy objects on the Zeroplus Logic Analyzer Avoid hard impacts and rough handling Protect the Logic Analyzer from static discharge Do not disassemble the Zeroplus Logic Analyzer this will void the warranty and could affect its operation Use a soft damp cloth with a mild detergent to clean Do not spray any liquid on the Zeroplus Logic Analyzer or immerse it in any liquid Do not use harsh chemicals or cleaners containing substances such as benzene toluene xylene or acetone Table 1 8 Electrical Specifications Minimum Typical Maximum Working Voltage DC 4 5 V DC 5 0 V DC 5 5 V Current at Rest re CurentatWok PoweratRe
42. How do update software The software will automatically check for and download updates This function deletes old software first and then downloads and installs the latest version FMO7IAA C O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 6 5 Others OTO01 How was the Logic Analyzer developed A It took us more than two years to develop this product We envision Everyone carrying the Logic Analyzer and we would like to make some contributions to the electronics industry in return We also wish to transform the stereotypical OEM factory into a world class R amp D center OT02 Why is there a rich information database for game chips rather than the Logic Analyzer A First of all we apologize for any inconvenience caused by the lack of information pertaining to Logic Analyzers We are currently working very hard on multilingual information and documentations pertaining to the Logic Analyzer Visit our website for the latest drivers software and manuals http www zeroplus com tw logic analyzer en technical support php In the meantime we will have updates ready when verified error free OT03 What was the original intention of developing this item A Originally the Logic Analyzer was just for use by our engineering department Later on we saw the greater need for this kind of device We made numerous enhancements and made it available to the public Conclusion This chapte
43. LAP 032198 Standard VA 100CAD2 5 0 Lab 1 am Ele Bpa Tipe gop Gata Took Window Heb jo amp us uu lar mir Im imm Ri oodd DIEGOREN S D LM ES Height 30 Tigger Det Scale B8 1387842 Totakt 31072 Display Range 1390 2030 BP s 54487 H Tzs64487 F CGompr Rate Mo Display P 318 APos 4527 F A Tebasa F A B 30 F 6559 10529 1949 22 frzmc z s i frons ze mem meer coum Poo A ILILILILILT J Fig4 64 The Latch Function Displayed on the Waveform Area Illustration The selected channel is AO the analysis mode is Rising Edge it indicates that the data of the AO is read at the Rising Edge See the T Bar in the above figure the data of Bus1 is 0011 120 FMO7IAA C O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 4 5 2 12C Analysis I2C Introduction The I2C which stands for Inter Integrated Circuits is a serial synchronous half duplex communication protocol The I2C was first proposed by Philips Semiconductor Netherlands This I2C protocol consists of a very simple physical interface which has only two signal channels SDA Serial Data and SCL Serial Clock Most I2C devices consist of an independently sealed I2C chip and this I2C chip has direct connection to both SDA and SCL The data transmission is a byte base 8 bit base for every segment Since many oscilloscopes do not a
44. Ltd S Export Packet List The Zeroplus Logic Analyzer User s Manual V3 10 21x Save in Desktop gm ex EB My Recent Documents Desktop ProtocolInfo txt My Documents My Computer E My Network gt Places Save as type Text Files txt Cancel mBus Output cm m Data Format Export Format Yes C No Hexadecimal m Report Form m Option r Output Range From Fist Packet To Final Packet o E IV Pop up an export file automatically Fig 3 9 Export Packet List Dialog Box Users can use paperwork register and analyze packet list data Pop up an export file automatically The function of popping up an export file automatically in the Export Packet List dialog box is the same with that of the Export Waveform dialog box Export Format The Export Format is convenient for users to use the captured data in the following process There are two formats for selecting Report Form and Pure Data Form See the following picture mBus Output Parameter m Data Format Export Format Yes C No Hexadecimal Pure Data Form Y Option Output Range Pure Data Form From Fist Packet To Fina Packet 0 0 IV Pop up an export file automatically Fig 3 10 Export Format Pull down Menu In the part of the Export Format when the users select the Report Form the Option button can t be us
45. MSB The following is the Host to BQ HDQ analysis 148 FMO7IAA C O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co User s Manual V3 10 Send Host to BO HDQ Send Host to BO HDQ or Receive fr rom BQ HDQ i Da je tnn Ld Lum TEL TUTUT LETLETLETLETLETLETLETLEH TH up nd Address Rw LSB MSB Break Bito Bit7 es gy ee ge EE oe es D LA F tRsPS Address Bit De Start bit Data Bit Stop Bit j p Fig4 109 Host to BQ HDQ Analysis Protocol Analyzer Format Break This is the initial bit for the Protocol Analyzer HDQ after Low signal lasting a period of t B it is then converted to a High signal lasting a period of t BR The length of Low signal is no less than 190us whereas the High signal is no less than 40us kea _ tem Fig4 110 Pulse from Low to High Address The Address comprises 7 bits The initial Low signal lasts a period of t HW1 and if the write O status continues through the end of the t HWO period the signal will convert to High and last throughout the period of t CYCH as shown by the dotted line in the following figure Conversely if it is the write 1 status after t HW1 period of time the signal will convert to High and last throughout the period of t CYCH which is of 1 bit and no less than 190 us The t HW1 range is from 0 5us to 17us and no more than 50us The t HWO range is from 86us to 100us and no more than 145us Read
46. My Recent Documents Desktop ZEROPLUS CAN 2 0B Protocol Analyzer Specification 1 31_EN doc 091121 E ProtocolInfo txt 2 My Documents s My Computer K E Y acini ae File name txt X Places Save as type Text Files t t Cancel r Bus Output Parameter Data Information Yes No Data Style uu sj Data Model All Data Vertical Data Format Hexadecimal v Horizontal Hexadecimal r Output Range From Ja Bar To user Defined 600us 4ims IV Pop up an export File automatically mBus Item m Perform Model Fig 3 7 Export Waveform Dialog Box Export Waveform Export a file into text txt or CSV csv formats Bus Output Parameter Decide whether or not to display the parameters of the file to be exported Perform Model Choose whether to export the data either vertical or horizontal Data Style Include ALL ALL BUS PROTOCOL HAS CHANNELS PROTOCOL NO CHANNELS Data Model Export data changed function the selected items include ALL Data Sampling Changed Dot Compression Data Changed Dot Compression Some of the data value for the signal channels of sampling position are the same for example view the data changed and decrease export capacity this function will be good for users Output Range Choose the range of the data to export from the pull down menus Pop up an export file automatically The export file
47. Packet 1 Packet 2 Packet 3 Packet 4 Packet 5 BUS Packet List xi Setting Refresh Export Synch Parameter Packet Name TimeStamp Data 4 1 Busi 1 WIRE 4032363 33 96 30 96 03 90 02 48 B7 FF FF FF FF FF FF 04 00 Packet Name TimeStamp Data 2 Busi 1 WIRE 8065053 33 96 30 96 07 90 00 48 F7 FF FF FF FF FF FF 04 00 Packet Name TimeStamp Busi 1 WIRE 12096936 Packet Name TimeStamp Busi 1 WIRE 16129232 Packet Name TimeStamp Busl 1 WIRE 20161527 Data 33 96 30 96 03 90 02 48 SF FF FF FF FF FF FF 04 00 Data 33 96 30 96 03 90 02 48 SF FF FF FF FF FF FF 04 00 Data 33 96 30 96 07 90 01 48 2F FF FF FF FF FF FF 04 00 Fig4 108 Protocol Analyzer 1 WIRE Packet List It is commonly normal Data which includes 1 Data It is commonly normal Data which includes 1 Data It is commonly normal Data which includes 1 Data It is commonly normal Data which includes 1 Data It is commonly normal Data which includes 1 Data Packet and Idling Length Packet s TimeStamp is Reset FMO7IAA O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 4 5 6 HDQ Analysis Preface Increase the Protocol Analyzer feature to analyze the Protocol Analyzer HDQ transmission protocol data Using LA analysis function the required serial data can be converted and presented in the form of Protocol Analyzer Therefor
48. Pee Sd Fe y ive Sd amp Channel Trigger Setup ac fiterconation X OX X X OM XD M Fiter Condition X X X X X X X R D Trigger Condition XS oS oS oS eS PS 2S 2S Fig 3 32 The trigger action tells the Logic Analyzer when to send data to the PC The trigger conditions determine when the trigger point starts to record the information j Trigger Mark Open the Trigger Mark function See Section 4 1 for detailed instructions 4 Pulse Width Trigger Module Option Tip Pulse Width Trigger Module Set a trigger condition for a single channel and the signal in this channel can be triggered in the predetermined range However this function is required to use with the hardware of the Pulse Width Trigger Module If you want to learn the detail please refer to the Specification of the Pulse Width Trigger It is an optional function That is to say this function can be used in the Modules LAP C 16032 LAP C 16064 LAP C 16128 LAP C 162000 LAP C 32128 and LAP C 321000 after registering And for the LAP C 322000 it is not name necessary to register as it can be used for free DECIES Set the trigger condition as Don t Care See Section 4 1 for detailed instructions High Set the trigger condition as High See Section 4 1 for detailed instructions TUM Set the trigger condition as Low See Section 4 1 for detailed instruction
49. SS Fi EE a e pea pom hangs r Dd am SN P1306 3 ns ERR oiim a jm mms Se aa JENES CS Hase Insert TEA ren Teu rm T perd ma Le heres a n Ip LEE K ini aas Pm Rees mm Rees Das Roe dem D PLI LA ERAT Poo amp rue ee tre m mms xw ome RGCXEMIHINYOUN mega m Tage De Eras jiu METER T Ans sme E Tah Zen peo Ama Limi Brumas rt in ir Cru hate Fig3 109 Reverse Function Displayed in the Waveform Window Add Channel xj Channel fan Cancel Fig 3 110 Add the required channel in the Bus Signal column ZEROPLUS Logic Analyzer Xj A Do you want to copy Ehe channel Cancel Fig 3 111 Copy the selected channel in Bus Signal column FMO7IAA 69 i PHRSR E The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 ZEROPLUS Logic Analyzer X AN Do vau want to delete Ehe channel Delete Channel Cancel Fig3 112 Delete the selected channel in Bus Signal column ZEROPLUS Logic Analyzer x A All the Buses and channels will be deleted Do you want ko continue Delete All Channels Cancel Fig 3 113 Delete all Buses and channels in Bus Signal column ZEROPLUS Logic Analyzer x A All the Buses and channels will restore to the default Do you want to continue Cancel Restore Default Channels Fig3 114 Restore the deleted Buses and channels in Bus Signal Column
50. Select this function when adding and deleting channels the software reserves the original waveform not select this function the waveforms in channel are cleaned up Signals can be grouped into Buses by pressing Ctrl G Signals can be added deleted copied and grouped into Bus using the mouse or the keyboard or right click and select the desired operations from the pull down menu The movement of a signal channel are Auto Size not available in waveform display Move Left Up Move Right Down Hide Show All and Color Ungroup signals from Buses by pressing Ctrl U A Bus contains at least 1 channel In order to see these channels click the symbol before the name of the Bus Bus Signal Trigg Filter OD 4M 4 M2 P S 4 M 735 4 M Fig 3 26 Expand If the Bus has been expanded click the symbol before the Bus name to Collapse the Bus Fig 3 27 Collapse Aube Size Move Left LIp Move Right Dawn Hide Shaw All Color Fig 3 28 Click to change the Bus or signal display FMO7IAA 35 O BEER IRA Zeroplus Technology Co H Tip Format Row Auto Size it is not available in Waveform Display mode Move Left Up change to Move Left in Listing Display Move Right Down change to Move Right in Listing Display Hide Show All Color Eename The Zeropl
51. Setup for the Bus STEP 1 Click Bus Property the following dialog box will appear v Use the stp Fig4 57 Bus Setting STEP 2 Click Color Configuration to set Bus Data Color Parameters Coni v Use the Bstip Fig4 58 Color Configuration 118 FMO7IAA i PHRSR E The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Kus Data Color X Bus Mame Busi Data Condition Data Min Data Max lo F Cancel Default Help Fig4 59 Bus Data Color Bus Name Display the selected Bus name Data Condition Select the Data Condition to change the Bus data color There are four options which are In Range and Not In Range Data Min Enter the min data that is required by users Data Max Enter the max data that is required by users The max data can be used only when the set is In Range or Not In Range Select Color Select the changed color according to the Bus condition set by users the default is Green STEP 3 Click Color Configuration to open the Bus Data Color dialog box and set the Data Condition 0 and Select Color is Orange Kus Data Color x Bus Mame Busi Data Condition Data Min Data Max hs lo F Cancel Default Help Bus Signal Trigger Fig4 62 After the Bus Data Color Setting Tip Reserve the original state by the above steps STEP4 Activate the Latch Function Activate the Latch Function The default is not activ
52. Tr and English EROPLUS Logic Analyzer The program needs to restart Bo vou want to save Ehe current document Fig 3 15 When changing languages the above screen will be displayed and the program will need to be restarted Print Ei x Printer Name Microsoft Office Document Image Writer Properties Status Ready Type Microsoft Office Document Image Writer Driver Where Microsoft Document Imaging Writer Port Comment Copies Number of copies f H C Pages from 1 f to n C Current Page pi p Bu Ej ess Cancel Fig 3 16 Click to enter the Print dialog box Fig 3 17 Click to show a Preview of the Print Show the recently saved file Exit the program FMO7IAA PRETI BE 0 T3 PR x 8l The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 2 Bus Signal Sampling Setup ingroup from Bus Goi Frequency 200KHz Expand Collapse pomes Clock Ce moa LE Auto Size Move Right Down Add Hide Show All ail xI 2 2 Fig 3 18 Bus Signal Menu Dialog boxes of the Sampling Setup and Channels Setup are shown and indicated by arrows 30 Fig 3 19 Trigger Tool Box FM0714A The Zeroplus Logic Analyzer PREM RAh BRAE User s Manual V3 10 ZeroplusTechnaology Co Ltd Menu Bar Bus Signal 31 Menu Item Menuillm V 9 79 DetalMMenu amp
53. UART 81164 Packet Name TimeStamp Busl UART 184247 Packet Name TimeStamp Busl UART 307617 Data Parity B6 Even Parity Data Parity DESCRIBE Data Par ity D9 Even Parity Data Par ity Fig4 79 UART Packet List Packet1 It is commonly normal Data which includes 1 Data and 1 Parity its parity is Even Parity Packet2 It is the state of Parity Error the DESCRIBE is Parity Error should Low Note Because the Even Parity and the Odd are impossible to present to the same Bus so we only take the Even Parity for an example here Packet3 It is commonly normal Data which includes 1 Data and 1 Parity its parity is Even Parity 131 FMO7IAA i PHRSR E The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Packet4 It is commonly normal Data which includes 1 Data and 1 Parity its parity is Even Parity Packet Length When judging to the start of UART it is the packet TimeStamp State 1 Having Stop The Unknow Register is Unknow_End Flag The data start is regarded az Packet Timestamp DATA 131 Packet Lenath Fig4 80 Packet Length State 2 No Stop This Unknow Register is general Bus Unknow The data start is regarded as Timest amp Packet l his Unknow Register Unknow End Flag Packet Length fStop s Data Length 1 1 5 2b1t
54. Write Read Write is 1 bit O and 1 are displayed in the same way as the above description T RSPS The High signal lasts a period of 190us 320us The following 8 bit data is Send Host to BQ HDQ or Receive from BQ HDQ Data Data Made up by 8 bits and it is Send Host to BQ HDQ or Receive from BQ HDQ Data It operates in the same way as in 2 2 and the data is from LSB to MSB BQ HDQ To Host If the data transmission is read by BQ HDQ To Host the initial Low signal lasts a period of t DW1 and if the write O status continues through to the end of the t DW1 period the signal will convert to high and last throughout the period of t CYCD as shown by the dotted line in the following figure Conversely if it is the write 1 status after t DW1 period of time the signal will rise and last throughout the period of t CYCD which is of 1 bit and ranges from 190us to 260us The t DW1 ranges from 32us to 50us and no more than 50us The t DWO ranges from 80us to 145us ii Cowen a Tacr Fig4 111 Signal from BQ HDQ to Host 149 FMO7IAA ZPBEELHBE RE LB PR 2S 8l The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 4 5 6 1 Software Basic Setup of Protocol Analyzer HDQ x Pin Assignment Channel AD m Time Settings us Break 130 to 1000000 Recovery 0 to 1000000 Host 1 D to o0 Device 1 p to po Host 0 0 to hsa Device 0 o
55. and LAP C 162000 and thirty two channels in LAP C 32128 LAP C 321000 and LAP C 322000 Listing Display This interface shows the digital signals as 1 and 0 Logic 1 is displayed as 1 and logic O is displayed as 0 Status Area Display Logic Analyzer status The function name is also indicated here FMO7IAA C O PREP eh in Blea The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 3 1 Menu amp Tool Bars Section 3 1 presents detailed information on the eight menu and thirteen tool items shown in the menu bar The eight menu items are File Bus Signal Trigger Run Stop Data Tools Window and Help The thirteen tool items are Standard Trigger Run Stop Sampling Trigger Content Set Display Mode Windows Mouse Pattern Zoom Data Show Time Height Trigger Delay and Font Size 1 File 3 Hew CtrltH gt Open Ctrlt0 Close Close the file being worked on Close Ctrl F4 Auto Save Save the required file automatically See Section 3 5 for me a detailed instructions E Export Waveform Export files into Text Auo an txt and CSV Files csv an Export Waveform Ctrltihifttk Export Packet List Export the active I7 Export Packet List packet list Ec Ctre Language Allow users to change the language interface of menus tool boxes Language k etc PORT crisp Print Preview Show three options Pruniprenuem Bus Signal amp Trigger amp Filter Po
56. area When selecting the Zoom function and users are pressing and dragging the left key the information on the right corner of the bottom will be changed and updated with the width of the selected area And the information is displayed on the right corner of the bottom in the way of Tooltip When users loosen the mouse the information will disappear Tooltip Time Frequency Sample xxx time ns unit Address xxx There is no unit with the address i Hand H AR Wormal ESCAPE 49 The Zeroplus Logic Analyzer User s Manual V3 10 bd 896 7195 5894 4194 269 32973 28175 23378 18 58 UUUUU UU LILILI LI d Fig 3 60 To Zoom Out left click and drag the mouse point from right to left MERRIA LR E CET ETIO STET ame Pied F e ede Dea Jub EE m m j zB st Du d AA NP Eapro ja ae mme zo MX y ruga exe S H E sung s eli 3 sek bt w ats Meu m ee 5 1 Hi z qa A BsH urs Se Domin eos ini dni Parai E prr m ps VEENEERENRER DOM Ed Sins m omi mm ml SINAI AN CAN Cr ELSE SV SERM NR d A S Y l a Yi LI esL shalt shal J ai ie Die Fig 3 61 To display the Tooltip left click and drag the mouse point from right to left or from left to right Fig 3 62 Click Hand and then depress and hold the left mouse button to drag Reset the mouse function to the system default FMO7I
57. area is the left packet segment which is displayed by waveform Middle When the Packet and Waveform Synch is activated the synch point in the waveform area is the middle packet segment which is displayed by waveform Activate Packet and Waveform Synch select Top and Left Syoch Parameter Setting X v Activate Packet and Waveform Synch Synch Point of Packet List Synch Point of waveform Area Middle C Middle Fig 4 52 Synch Parameter Setting Dialog Box Display the corresponding waveform and packet as below image 115 FMO7IAA 116 Phe eee ih BR eS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 ZEROPLUS LAP C 32128 Standard 3 10 CNO2 S N 12C alc o File Bus Signal Trigger Run Stop Data Tools Window Help DB m A e a BB bb 128K z vie Bi SMHz aw ow 50 ee 9 Page fi e ate Fg al Gl 59 e fd Gl 10 478751 af Be Be Ie ie Mie o Scale 9 5431221 Display Pos 4330 A Pos 64527 v A T 64527 7 Total 131072 Display Range 4091 4571 B Pos 64497 B T 64497 v ILLIJL IL JL TL TL L1 LTL Packet 3 Name TimeStam Address Write A ACI Dat D ACK Data DACK Data DACK Data D ACK ate i D ACK 58 D ACK 6C D ACK 7D D AcK 8E D ACK Data D ACK Packet Name TimeStamp Address Write A ACK Data DACK Data DACK Data L0 Data 5750 Data 12 Write A ACK DS D ACK es D ACK F7 D ACK os D ACK
58. click START Run Browse in sequence select Setup exe file in the appropriate model folder and then click OK It is recommended that all other programs are closed while the installation proceeds Step 3 Choose the Application Setup Step 4 Click Next to proceed with the Install Wizard Step 5 Select I accept the terms of the license agreement and click Next Step 6 Enter User and Company names Step 7 Choose the setup type We recommend Complete for most users Step 8 Click Install to confirm settings and begin the actual installation Step 9 Click Finish to complete the installation 16 FMO7IAA 3PRBERHSBR TIERS e Zeroplus Technology Co Ltd Logice Cuse Q Application Setup Driver Setup LAP C_Standard InstallShield Wizard Welcome to the InstallShield Wizard for LAP C_Standard The InstallShield Wizard will install LAP C_Standard on your computer To continue click Next LAP C Standard InstallShield Wizard License Agreement Please read the following license agreement carefully LICENSE AGREEMENT IMPORTANT READ CAREFULLY This LICENSE AGREEMENT _ is entered into effect between ZEROPLUS Technology Co Ltd hereinafter ZEROPLUS and Customer Individual or Registered Company Whereas ZEROPLUS owns a software product including computer software as a package product for certain computer products relevant fo Installshield The Zeroplus Logic Analyzer User
59. dialog box and activate the packet and waveform synch function 2 Display Protocol Analyzer Packet in Order Tip The below view are Protocol Analyzer I2C the packet is determined by the position of the TimeStamp BUS Packet List x Setting Refresh Export Synch Parameter Packet Name TimeStamp Address Read A NACK DESCRIBE 1 uceusazc 477 7F Read A NACK ADDR NACK Packet Name TimeStamp Address Read A WACK DESCRIBE 2 ncBUsQ2C 5231 7F Read A NACK ADDR NACK Packet Name TimeStamp Address Read A NACK DESCRIBE 3 ncBUsQ2C 9165 7F_ Read A NACK ADDR NACK Packet Name TimeStamp Address Read A NACK DESCRIBE 4 j HUcBUSQ2C 16367 7F Read A NACK ADDR NACK Packet Name TimeStamp Address Read A NACK DESCRIBE smc eusdec V 20290 LJ 7F_ Read A NACK ADDR NACK E Fig4 43 TimeStamp Tip When the Display Bar of Signal Filter is activated the Bar should be displayed in the Bus Packet List and also the TimeStamp ADDRESS and length of the Bar will be displayed 3 Packet Idle and Packet Length Packet Idle Packet interval time Packet Length Packet time length When those above two items are to be displayed it only chooses one of them to display which is controlled by Plug Because it is impossible that every Protocol Analyzer packet has registered timestamp and end we add two special Unknow Flag to judge the ti
60. m SAE m SA m SAA m AA a A m A ma SAA m SA m AE m AA a GA a AA ma A m G mn G m GA mr mm JA m SA m SA m A m AA a A a A m SAA m SA m AE m AA a GA a AA m A man A m AE m GA a ooo ooo oo oo on m G E am G Ea G ooo oo oo on e e e e e e e o e iN Fig 3 131 STAT VIEW Y ZEROPLUS LAP C 32128 Standard V3 10 CN02 S N LaDoc1 Bl x a Fie Bus Signal Trigger Run Stop Data Tools Window Help 8 x De ll 5 i gy BY 8 o eS Pai gt DD e 2k MM 25KHz ML nnn 50 J Page fi Count x A RE olal BB 1009 SAEI LI Scale Display Pos 20 APos 15 v A T 15 Total 2048 1035 Display Range 5 47 B Pos 15 7 B T 15 Compr Rate No Trigger Filter 40 POCO COCO COC UU PU UU U EU UU ULT PL ek at EP ae ee Fig 3 132 Logic Analyzer with Statistics Enabled There are four options for adjusting how statistical information may be presented These four options are Channel Selection Column Selection Condition Parameter and Warning Parameter 19 FMO7IAA SRARBRPAIRA A The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Channel Selection xj I X qa Xo J o qI n a Xo Port Port B xI xI I I I x I I Port C I xI I I kal xl xI xI Port D I xI I xI xI x xI I Port E Port F Port G Port H Port I Port J Port K Port L Port M Port N Port O
61. setting data contrast Contrast Result It displays the same contrasted result and the different contrasted result with PASS and FAIL respectively Error Stat It displays the number of discrepant parts Pin Assignment Users can select the contrastive channel Perform Contrast It can activate the Contrast at once Display files horizontal The waveform window of the two contrast files are displayed in horizontal Users can select it as their requirements and the default is non activated Roll the contrast waveforms synchronization The two contrast files roll synchronously Users can select it FMO7IAA O PRARRRARE The Zeroplus Logic Analyzer Zeroplus Technology Co in User s Manual V3 10 as their requirements and the default is non activated Display files the contrast differences It can line out the difference in the contrast waveform Users can select it as their requirements and the default is non activated Do Contrast automatically when being run The two files will be contrasted automatically when being run Tip For this function Data Contrast we provide the SDK Development Tool for users Users can customize the Data Contrast Interface according to their requirements We has packed the Data Contrast UI as the GUI DLL and designed an interface which is used for the communication between the GUI DLL and Main Program The GUI adopts the Non modal Interface design which can make the GUI Interface and Main Program Interface
62. than one trigger pages are selected the trigger bar disappears from t B4B4 the view p 4 BSB5 Cancel Default Help Fig 4 11 Trigger Page and Screen 2 2 Delay Time and Clock Click the Delay Time and Clock then type the numbers into the column of the Trigger Delay Time or type numbers into the Trigger Delay Clock at the Trigger Delay page of the Trigger Property dialog box as shown in Fig 4 11 Or type the numbers into the column of Trigger Delay Tisser Delay 5 on the Tool Bar The system will display the Start of the waveform The formula of Delay Time and Clock is Trigger Delay Time Trigger Delay Clock 1 Frequency To use the compression mode the Delay Time and Clock gt will be unavailable FMO7IAA PRE BRA a The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Step5 Trigger Position Setup Type the percentages or select the percentages from the pull down menu of the 20 on the Tool Bar or click the pull down menu of the Trigger Position on the Trigger Delay page of the Trigger Property dialog box as shown in Figs 4 12 4 13 4 14 and 4 15 The selected Trigger Position percentages will be displayed on the right side of the screen of the system Trigger Property Trigger Content Trigger Delay tri Trigger Page Trigger Page fi x Min 1 Max 128 Trigger Position Pos 26213 han one trigger
63. the Stop during the running Keep the Present Data Read the Captured Data Restore Defaults Cancel Help Fig 3 147 Correlated Setting If Check for Update Bus Signal Trigger Filter 88725 Er 985 369 0xos oxo4 Bus Signal 987 2 986 309 985 Bus1 Auto Close With the cursor in the channel when users try to drag a Bar the Bar will stop at the approaching edge of the channel Rising Edge or Falling Edge Tip In the above example when dragging the A Bar the A Bar will stop at the Falling Edge of A1 82 FMO7IAA PREAMP Bike Bl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Fig 3 149 Gridlines Show Gridline The gridlines will be displayed on the waveform area Fig 3 150 Tooltips Show Tooltip Leave the mouse over a waveform and the description will be shown Show the T Bar in the middle area Show the T Bar in the middle of the Waveform Display Area after triggering Check for Update The Logic Analyzer software will automatically check for updates when being started Restore Defaults The Waveform Display Mode Ruler Mode Waveform Setting Correlated Setting and Data Process will return to the default setting 83 FMO7IAA PRA RA Bike Bl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 3 5 Auto Save To save the captured data for a long time
64. the waveform window Users can alter its size to find more data Notice If you want to learn more about the Bus Packet List please refer to the Specification of the Protocol Analyzer Y ZEROPLUS LAP C 16128 Standard 3 10 CNO2 S N LaDoci i 0 x So File Bus Signal Trigger RunjStop Data Tools Window Help 8 x Os BS AY oe epp p x z o Bi f100KHz Joe v Be Count 1 gt we Be Be Ln Me 2 Height Trigger Delay 1 Display Pos 0 APos 15 meala F A B 30 v Display Range 25 28 BPos 15 B T 15 Compr Rate No EE PCCCCOCOO COO OODCCDODOOODCCO CODO CODO T UU LULD E LIU ULILIU E uL 1 U So Fie Bus Signal Trigger Run Stop Data Tools Window Help F x Demam 4S e T EIE bbb e 2k amp frooknz zem 50 J Page fi Count fi E 7 sa E ES GER 59 x RD Oo Gi Bd fr 00 Scale Display Pos 0 APos T EA A T 15 7 Total 2048 Display Range 25 28 B Pos 15 7 B T 15 7 Packet Name Timestamp Data Data Data Data Data Data Data Data Data Data 0 Packet Name TimeStamp Data Data Data Data Data Data Data 2 jBusi Bus 1013 2 3 4 5 6 _ Name TimeStamp ata Jata Data Data Data Data Data 3 jBusi Bu 1003 4 5 6 Packet Name TimeStamp Data Data Data Data Data Data Data Pe 7 o 2 3 4 Fig4 39 Bus Packet List Packet List has a setup window users can se
65. to be analyzed When the Logic Analyzer is about to upload data from the Read Out memory to the PC the R_O will send a Rising Edge signal of DC3 3V When the upload is finished a Falling Edge signal is sent When a trigger condition is established the T O will send a T O Trigger Out Rising Edge signal of DC3 3V When the memory is full a Falling Edge signal is sent When a user initiates a sampling task by clicking the RUN icon in the window or clicking the START button on the Start Out device the S O will send a Rising Edge signal of DC3 3V When the Logic Analyzer finishes uploading a Falling Edge signal is sent Table 1 5 Definitions and Functions of Pins for Advanced Models 2 VDD Voltage Drain Provide 3 3 V for external modules by draining Semiconductor voltage from the Logic Analyzer Ext l O Module A Lean signals between an external model or device and the Logic Analyzer Ext I O Module B Same as IOA Ext I O Module C Same as IOA GND Grond J Ground external devices in sequence FMO7IAA O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 1 3 Hardware Specifications Table 1 6 Hardware Specifications of LAP C Series LAP C LAP C iapc LAP C LAP C LAP C LAP C meme 0 00000 MAR 00000000 Internal Clock Rate 100Hz 100MHz 100Hz 200MHz asynchronous Sampling Rate Max dim Max 75MHz Max 100MHz p Bandwidth TM TM Mem
66. 000000001 LaDoc1 pur E ge Bus Property Group into Bus Bnaraup from Bus aaa EE Bs eB Fig4 115 Group into Bus Select Bus Property Ge ZEROPLUS LAP C 32128 Standard 3 10 CNO2 S N 00000000001 LaDoc1 Bus Property Group inta Bus Gopy Ghannel Delete Channel mum A wil Fig4 116 Bus Property 152 FMO7IAA raa mag EH RO BEER Z2 8l The Zeroplus Logic Analyzer ik Zeroplus Technology Co Ltd User s Manual V3 10 Select the decoding function of the protocol analyzer HDQ and select OK to confirm Bus Property Activate the Latch Function fe ZEROPLUS LA 1 WIRE MODULE V1 10 00 CNO01 Q ZEROPLUS L HDQ MODULE v2 07 O0 CNO1 ZEROPLUS L I2C EEPROM 24LC561 24LC562 MODULE v1 00 00 CNO1 ZEROPLUS LA I2C MODULE V2 02 00 CNO1 ZEROPLUS L LG4572 MODULE V1 00 00 CN03 ZEROPLUS L Low Pin Count MODULE V1 09 00 CNO01 ZEROPLUS LA MIL STD 1553 MODULE V 1 00 00 CM01 ZEROPLUS L PECI MODULE V1 11 00 CN01 PEDANDA MTAALAM ipe ET e BG E n S ke Fig4 117 Protocol Analyzer HDQ Setup Complete the protocol analyzer HDQ decoding gt ZEROPLUS LAP C 32128 Standard 3 10 CNO2 S N 00000000001 LaDoc1 Fig4 118 Protocol Analyzer HDQ Decoding 153 FMO7IAA 5 ZBEREHEERR OD BIRZ S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 4 5 6 2 Protocol Anal
67. 1 4 5 3 UART Analysis RE ome 128 Aod OPIANIA E E EEEE E 133 FM0714A C O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co iu User s Manual V3 10 499 WEN VII Ee AIAN CIT me 138 4560 HDOANANYSIS aes a ng E kee Sinn wie ea ec tte de eee nec 148 25 7200 Gora zii gt RR TT 155 A SOMA S SION e E R A 165 4 6 1 Software Basic Setup of COMPIeSSION ccccecccceeccceeeeeaeececeececeeceeeueeeseeceseueesseesseeeeseeesseeessaeees 165 4 7 Signal Filter and Filter Delay cc ceccccssscccceseecceececceececceueeecescecseeeecsuseeessuesessegeesesseceetsuseesseneessages 167 4 7 1 Basic Setup of Signal Filter and Filter Delay ssseeseseeeeeenreeeennnnm 167 ZO NOISE FUON consita sett niam eere ura Up EE evatu tavta artum up intus vsu uM cau turista x EM UUM E 171 4 8 1 Basic Software Setup of Noise Filter ccc ceccccecccseeeeceececeeceseeeeeseeceseceseaeesaeeeeseeeeseusessuseesaaees 171 SECOND CEP CIS mE mo mmm 173 4 9 1 Basic Software Setup of Data Contrast esssesssssssssssssssssseeeenee nennen nnne nnne nns 173 4 10 Refresh Protocol Analy Ze RMR t 176 4 10 1 Basic Software Setup of Refresh Protocol AnalyZer cccccccseeececeeeeeeeeeeeeeeeeeeesaeeeeesaeeesaeeeeesaees 176 4 11 Jis atem PANY A ERE m mu m 178 4 11 1 Basic Software Setup of Memory Analyzer ssssssssssssssseee nennen enn
68. 1 24LC562 MODULE V1 00 00 CNO1 C ZEROPLUS LA I2C MODULE V2 01 03 v Use the DsDp More Protocol Analyzer Cancel Help Fig 3 80 Find Result Refresh Protocol Analyzer data See Section 4 10 for detailed instructions FMO7IAA O PEREROSR2A Zeroplus Technology Co Ltd Multi stacked Logic Analyzer Settings Analog waveform k bl Single Analog Display Mixed Analog Display Tip When the function of Analog Waveform is activated the Analog Waveform will be displayed in the waveform area of the Bus s sub channel and take the space of four channels And four sub channels won t draw the waveform It notes that the sub channel of the Bus must be more than four channels The Zeroplus Logic Analyzer User s Manual V3 10 Multi stacked Logic Analyzer Settings X f Memory Stack C Channel Stack Please select the Logic Analyzer for stacking OMI S N 000000 0000 M2 54N 000000 0000 M3 S N 00000 0000 M4 S N 000000 0000 Synchronous Channel AQ Synchronous Trigger Condition Rising Edge Cancel Help Fig 3 81 Multi stacked Logic Analyzer Settings Dialog Box See Section 4 12 for detailed instructions Analog Waveform The function of Analog Waveform means that the Display Mode of Bus Data is not the Pure Data Mode while it displays data change with the curve which looks like a waveform which in fact is a curve to describe the data change So it is
69. 16423 v Compr Rate 1 28 039 Bus Signal Trigger ilte Bg mBm 9i 2 e e amp e e e e e e px e X ri 4 ria gt 11 gt Ready End Connected Fig 4 77 Waveform Analysis 130 FM0714A PREIS AG OLEI PR 2 8l The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 4 5 3 2 Protocol Analyzer UART Packet Analysis PROTOCOL ANALYZER UART x Configuration Packet Data Format Register Iter Color Item Color W Data W Describe DEM Min Uns Max 10s uL a ieee EE Cancel Default Help Fig4 78 Protocol Analyzer UART Packet dialog box Data List Data field captured by Bus in the packet display Parity Display parity check in packet Describe Error description to any field format or data bit Packet Idle Time When the check box is selected the default value is 5ms Specifically when the Packet Idle Time is activated the packet will be divided again according to the Packet Idle Time If the Time Length between the previous packet and the next packet is more than 5ms the two packets will still be divided or the two packets will be merged into one packet It is a Bus Packet List view which includes 4 formats which UART happens below PARITY clews whether users start PARITY or not BUS Packet List xj Setting Refresh Export Synch Parameter Packet Name TimeStamp Busl UART 21927 Packet Name TimeStamp Busl
70. 1e coena sequence Fig4 99 A Typical 1 WIRE Conversion 1 Master keeps Protocol Analyzer at low signal standard speed 480us high speed 48us as the Reset Pulse 2 Then Master releases Protocol Analyzer and locates a Presence Pulse responded by any online Slave 3 The above two points are Reset Pulse and Presence Pulse which can be put together as a Reset Sequence 4 If Presence Pulse is detected the slave location will enable Master to access Slave using the Write O or Write 1 Sequence 141 FMO7IAA C O Phe eho in S PR The Zeroplus Logic Analyzer 142 5 Zeroplus Technology Co RI User s Manual V3 10 1 WIRE Serial Number 1 Every 1 WIRE Slave has a unique laser memory 2 The serial number is 64bits 3 The serial numbers are 8bytes in total located in three individual which are illustrated as below 64 bit Registration ROM number 8 bit CRC 48 bit Serial Number 8 bit Family Code M SB LSB ME NIST LSB 4 Starting from LSB the first byte is for family code which is used to identify product categories 5 Next the 48bits is the only address for storage 6 The last byte MSB is used to store CRC FMO7IAA REA AG D TS PR 2x 8l The Zeroplus Logic Analyzer Zereoplius Technology Co Ltd User s Manual V3 10 4 5 5 1 Software Basic Setup of Protocol Analyzer 1 WIRE x Pin Assignment Protocol 4nalyzer Color Owl Reset Pulse Presence Pulse Protocol Analyzer Property
71. 4 45 Bus Packet List Packet Length and Packet Idle Length Packet s TimeStamp is the start of Bus Data the default length is controlled by the setting dialog box If the input packet length isn t the end of data The software will prolong the length of Packet to end the data automatically as the figure below ES Ex E TUN Bus 1 Fig4 46 Auto Prolong Packet The Fig4 46 is a Bus its first data is 0x00 and its length is 1023 If users input 20 as the Bus length But 20xaddress is not the end of this data so the software will prolong the length of the Packet to 1023 automatically Fig4 47 Packet End The Fig4 47 is a Bus If the Start of the packet is T bar and the set Bus length is 20 but the data 0x02 isn t the end at that time the Packet will be prolonged to the end dot automatically that is to say the Address 27 B bar is the End of the packet The above two data are made consecutively as the figure below 113 FM0714A Phe eee DS PEZ a The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 A Pos 1023 A T 1023 BPos27 B T 27 T 1023 B T 27 Fig4 48 Auto Prolong Packet The Packet List is displayed as the figure below BUS Packet List xj settino Refresh Export Synch Parameter Packet Name TimeStamp Data Data D
72. 974376 Fig 4 7 Trigger Count Screen Shot 1 Y ZEROPLUS LAP C 32128 Standard V3 10 CN02 S N 00000000001 LaDoc1 1 o File Bus Signal Trigger Run Stop Data Tools Window Help ja zm S wy os et EN bob 128K site amp 100MHz mw 1096 4 amp s Page fi WT EZ Fg RE ER R e did BB 0 152428 Rz Be Be Te i PA e o o Height 80 Trigger Delay Scale 656 046702 Display Pos 2273 A Pos 12098 7 A T 12098 v B 30 v i B T 12068 7 eine RM No 3 10847726 Mm 432 4287253 pA 2263 TI Th 442 8833 675 12113303 15334142 185674376 LULU U iL D Total 131072 Display Range 13106 18677 BPos 12058 v Bus Signal Trigger Fig 4 8 Trigger Count Screen Shot 2 Step4 Trigger Page Delay Time and Clock The Trigger Page and the Delay Time and Clock can t be applied at the same time 1 Trigger Page Click Trigger Page then type the numbers or select the numbers from the pull down menu of the Page Page fi lon the Tool Bar or click the pull down menu of the Trigger Page on the Trigger Delay page of the Trigger Property dialog box as shown in Figs 4 9 4 10 and 4 11 The selected page numbers will be displayed on the screen Tip The Trigger Bar T Bar will not be displayed when the setup of the Trigger Page is more than 1 95 FMO7IAA PEELE i BR eB The Zerop
73. A password may be required for further customer services and other inquiries What should I do if online registration fails Do a screen grab of the window including the error message and email our customer service dept A customer service representative will be glad to assist you as soon as possible once the email is correctly received How may register if the purchasing date was more than one month ago In this case fill in the registration card and send it via post fax or email to our customer service dept and a representative will process the registration for you What is the warranty length for my product A two year FACTORY WARRANTY is offered in which you will have to send the defective product to the closest branch an authorized service site or our headquarters The in store warranty may vary and many require extra charges for various extended warranty policies The company is not being responsible for an in store warranty that exceeds our factory warranty Why should I register this product If you do not register this product the warranty will be counted from the manufacturing date indicated by the serial number of your product Thus we strongly recommend registering your product for your own benefit What should I do if the hardware serial number is previously registered In this case take a picture of the decal on the rear side of the product and fill in the registration form Call us and mail both picture and reg
74. AA AP RE ESAS i ARAE Zeroplus Technology Co Ltd irs Zoom In FY E Zoom Out FS Tip Zoom In and Out can be switched by changing the percentage value in the pull down list 1 The system can set the value of Zoom In and Out The default unit is wus When zooming in it will be automatically changed to ns When zooming out it will be changed to ms s or ks 2 Pull down Menu There are thirty scales The maximum zoom in and out is the cycle of each grid 0 0001piece The minimum zoom in and out is the cycle of each grid 1 000 000 000 Zoom in and out the proportion with each grid being the cycle the zoom in and out 96 is 100 The time of Zoom In and Out counts by the clock of each grid sample frequency For example 1 Each grid is being a cycle the zoom in and out is 100 The time of Zoom In and Out wil be presented by the clock of each grid X 1 sample frequency 2 Each grid stands for the clock of 100 pieces the zoom in and out is 1 and the time of Zoom In and Out will be displayed by the cycle of each grid X 1 sample frequency l Show all Data F10 The Zeroplus Logic Analyzer User s Manual V3 10 1096 ae UR A Pos 396 B Fos 399 TANE QUAD Fig 3 63 Normal Status 10096 ELK A Pos 41 B Pos 25 Tt nni UTU LI JLU L Fig 3 64 Result from Normal to Zoom In 196 AE R A Pos 1025 B Pos 1015 i 4T5 1 Jaa Fig
75. Address and Data in the operating process of the Protocol Analyzer Users will know the operation when they use this function It improves the efficiency of knowing the conditions 4 11 1 Basic Software Setup of Memory Analyzer STEP 1 Click Tools on the Menu Bar then select am to activate the Memory Analyzer function Waveform Display Listing Display Hat News Window m Navigator m Memory Analvzer Bus Packet List Statistics Window Cascade Harizantal Vertical Screen Display k 1 1 alc 2 zalc w 3Iz2C alc Fig4 161 Memory Analyzer Interface STEP 2 Open the Memory Analyzer dialog box ax lt gt gt gt optio Import Export Merge Refresh Reset amp i Ba Bus1 12C Address write data Read data 1 j a a T E 0x20 i Complete Mode od TT vq b dq p pP S S LL Loo T 701 qp dp T pL LT L 65 I d oo 0 bf dq p pP p Jg oco d 0 gp 0r d 1 pP o o d d 1 5 l afl Fig4 162 Memory Analyzer Dialog Box 1 Compact Mode and Complete Mode Click the Right Key in the memory analyzer dialog box there are two modes for selecting which are the Compact Mode and the Complete Mode See the two different figures 178 FMO7IAA 179 Phe Tee DS PEZ a The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Memory Analyzer xj lt Ex optio Import
76. Bus Analysis B Sns EE IC Bus Analysis Fig 3 159 Software Flow Diagram Conclusion Information demonstrated in this chapter is only for entrance level There are more advanced approaches which may require fewer steps than those shown in this chapter This chapter is meant to equip users with sufficient grounding of the Logic Analyzer s software interface 90 FMO7IAA O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 4 Introduction to Logic Analysis 91 4 1 4 2 4 3 4 4 4 5 4 6 4 4 8 4 9 Logic Analysis Bus Logic Analysis Plug Analysis Bus Packet List Bus Analysis Compression Signal Filter and Filter Delay Noise Filter Data Contrast 4 10 Refresh Protocol Analyzer 4 11 Memory Analyzer 4 12 Multi stacked Logic Analyzer Settings FMO7IAA PREAMP Bike Bl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Objective Chapter 4 gives detailed instructions on performing two basic analysis operations and other advanced analysis applications with the Logic Analyzer These two basic analysis operations are the Logic Analysis and the Bus Logic Analysis which are fundamental to all further applications The other advanced analysis applications are the I2C Inter Integrated Circuit Analysis and the UART Universal Asynchronous Receiver Transmitter Analysis the SPI Synchronous Peripheral Interface Analysis Compression Signal Fil
77. C 32128 Standard 3 10 CNO2 S N LaDoc2 E o File Bus Signal Trigger Run Stop Data Tools Window Help 8 x DSHS at BB rb x wj kz o Joe o ie 5 Page fi gt Count LJ EX hi iid A T Height 30 Trigger Dele Scale Display Pos 0 APos 15 v A T 15 v A B 30 v Total 2048 Display Range 25 27 BPos 15 v B T 15 7 Compr Rate No Bus Signal J am End DEMO A Fig 3 139 The Interface Layout Shown in Default Settings 78 FMO7IAA PREP eh DS PR The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 3 4 1 Modify Waveform Display Mode To modify the display mode users can use icons on the tool bar box or menu For the menu go to Tools and click Customize See Fig 3 140 a Customize Color Setting BUS Bus Property ee Refresh Protocol Analyzer gg Multi stacked Logic Analyzer Settings Analog Waveform gt Waveform Display Mode C Sampling Site Display C Frequency Display C Time Display C Regular Ruler Waveform Height 30 Time Sampling Site Ruler Font Size 12 Correlated Setting v Auto Close v Open Close Compression Warning Show Gridline v Show the T Bar in the middle area v Show Tooltip v Open Close Double Warning Data Process What do you want to show when you press the Stop during the running C Keep the Pr
78. Dui Epa Poe tI bima Fag HJ iims v a Ta ooh T Me i r Couples Asaga dD WTH D Pab to Pe j Apu TRI ne aieo rone dile AD ICTU A Me AT Te 1 2 7 EP Y I cea T oY rfl i i 1 mea Y cock eren TUM Bb asrpkh g p AERE CU NER Fig3 56 Add a Bar with the number between 0 and 9 FMO7IAA AP RE ESAS i ARAE Zeroplus Technology Co Ltd Delete Bar ALtt E Bar Delete a user defined bar 1 Click the above menu item from Data menu or click Delete Bar icon from Tool Bar 2 Select a user defined bar and click on Delete 3 Delete the selected Bar with the Delete key on the Keyboard Use the mouse to select the added bar and press the Delete key on the keyboard to delete the bar fs Zoom E hi Tip A Zoom In or a Zoom Out view will be centered in the Waveform Display Area and the new zoomed view will be sized according to the available space on the display 48 The Zeroplus Logic Analyzer User s Manual V3 10 mmu x Close Fig3 57 Delete Bar Dialog Box Fig 3 58 Delete a selected Bar 40 35 30 25 20 RETOUR TEP E k Fig 3 59 To Zoom In left click and drag the mouse point from left to right FMO7IAA AP RE ESAS i ARAE Zeroplus Technology Co Ltd When users activate the Zoom to zoom in zoom out the selected area the Tooltip on the right corner of the bottom will display the Time Clock or Address of the selected
79. Found UNKNOW when Found po Taveform Find Taveform Find i x E Activate the function of Chain Data Find ignal Name Next Previous Close Activate the Function of Chain Data Find gnal Name sce Mext Previous Close Min Value Max Value ind Min Value Max Value FFFFFFFF FFFFFFFF Statistics icti When Found LINKNOW At When Found pun Statistic o I h z Statistics v aa las DATA A2 MISO SCK AD Taveforme Find x Tavefore Find xj Activate the Function of Chain Data Find E ME the Function of Chain Data Find Next Previous Close Previous Close Min Value Max Value Max Value FFFFFFFF FFFFFFFF When Found aS Statistics o ll s DATA A2 MISO SCK AD Tavefora Find xj Activate the function of Chain Data Find Next Previous Close Taveform Find X Activate the Function of Chain Data Find Bus Signal Name rr Mext Previous Close Bus Item Find Min Value Max Value Bus Item Min Value Max Value foo Wee Fer When Fand Statistics Statistics In Range Statistics Not In Range Statistics o Address 600 Fig 3 127 Waveform Find Dialog Box of the Bus Item of the SPI Signal FMO7IAA PRE eee D BR eS The Zeroplus Logic Analyzer Zeroplus Technol
80. LAP C Series share the same external features as illustrated in the following figures Sel LEI Ne RUN READ TRIGGER POWER p m Fig 1 9 A View of the Zeroplus Logic Analyzer LAP C Series See Fig 1 11 for detailed information on the Signal Connectors Fig 1 10 Side View of the Zeroplus Logic Analyzer the power of the Logic Analyzer is drawn from the USB connection PortA A0 A7 gt Port B BO B7 Port C CO C7 Port D DO D7 lt or external modules or devices not designated to be analyzed For transmitting signals ta_ activate other instruments For connecting the Ean eee For grounding test circuits External Clock EN Fig 1 11 Side View of the Zeroplus Logic Analyzer LAP C Series FMO7IAA FRARROARAA The Zeroplus Logic Analyzer m Zeroplus Technology Co Ltd User s Manual V3 10 Table 1 2 List of Functional Pins in Each Model LAP C LAP C LAP C LAP C LAP C LAP C LAP C 16032 16064 16128 162000 32128 321000 322000 Ll A0 A7 Port B E X Y Y X Y M y S0 N y ocoy CK o y N y GND 4 N N IA 0v v v j IB j 5v 9 w Jj IOC y y y L GND NJ ooNoo oo ov coy Table 1 3 Definitions and Functions of Pins for All Models Connect a given external module to be analyzed Two pins used for grounding the Logic Analyzer with a given external module
81. MASTER Fig4 96 Write zero Time Slot B Write 1 If the sampling is high 1 is generated Note Read 1 is of a similar waveform pattern as in Fig4 99 Write one Time Slot Vuur V PULLUP MIN IH MIN Vie MAX 0V meee RESISTOR ASTER Fig4 97 Wrote one Time Slot 140 FMO7IAA PREAMP Bike Bl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 3 Read Data 1 When Slave reads data Master will generate a Read time slot 2 To initialize Read Data Master has to convert Data line from the high logic to the low 3 Data line must be kept as low as us 4 The Output Data of Slave must be 14us at most 5 To read from 15us where Read slot starts Master must stop driving I O Read data Time Slot VPULLUP VPULLUP MIN VHMN MASTER SAMPLING WINDOW m RDV RESISTOR ASTER DS2432 Fig4 98 Read data Time Slot 6 When Read Time Slot ends I O Pin will be pulled back to the high count through the external resistor 7 During a write cycle all Write time slots must have duration of at least 60us and a recovery period of 1us 4 Typical 1 WIRE Conversation model can be summarized as below A typical 1 Wire conversation Roel Puk Presence Puks Nut Meit Pulsa JT TO SCALE RE EH Fi Reset Sequence LET ROS PUR VOR B Elis o MEMORY Comm Code Unique FUNCTKON device ix selected Command Code Diagram 1 trpical
82. MSB LSB RALE CHON Data Sampling Position coco a ka Min 1 bit Mas 32bit Min 1 Mas 120 Cancel Default Help Fig4 104 Protocol Analyzer 1 WIRE Transmission Direction Setup STEP 4 Set the Sampling Position Users can slightly adjust the sampling position of 1 WIRE This feature is applicable when the signal cannot be decoded The default value is 30us 145 FM0714A D gt SPRABRGARAS The Zeroplus Logic Analyzer eroplus Technology Co Ltd User s Manual V3 10 PROTOCOL ANALYZER 1 WIRE Standard 1 us MSB gt LSB ha Fig4 105 Protocol Analyzer 1 WIRE Sampling Position Setup STEP 5 Set the Data Length This function decides how many bits of data can be combined as one set of figures The default is 8 bits and the maximum is 32bits PROTOCOL ANALYZER 1 WIRE Standardi us T us Standardi us T passe e Fig4 106 Protocol Analyzer 1 WIRE Data Length Setup 146 FM0714A 5 gt RERRGBRELA The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 4 5 5 2 Protocol Analyzer 1 WIRE Packet Analysis x Configuration Facket Data Format Register Item Color W Describe o B Cancel Default Help Fig4 107 Protocol Analyzer 1 WIRE Packet dialog box That is the new View the below View includes several formats that 1 WIRE can happen it describes Data number and their positions 147
83. P T1 dq d xS e start sl L Fig 4 142 Start Edge Filter Condition delay time end edge j Filter Condition end edge delay time Fig 4 143 End Edge Filter Condition period delay time Filter Condition delay time rem period Ld L Fig 4 144 Period Delay 169 FMO7IAA CD FRR EA i PRS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 30 52us I20 395us 58 46us 20 355u EN P r Filter Condition r Select Filter Delay Mode Select Delay Start Point Delay Time According to Filter Condition Start Edge is C EndEdge Min 5ns Opposite of Filter Condition C Period Delay Max 327 675us m Display Bar Setup Show Bar Bar Style origina hd Bar Width ns OK Cancel Restore Defaults IL oe Fig 4 145 Filter Delay Setup The delay time of signal AO is 1 us which is the condition of the Filter Delay Setup Step 7 Signal Filter Time Interval 1 Click Show Bar to know the length of the tested and deleted signal as shown in Fig4 146 below Display bar Setup Bar Style Original M Bar Width ans OK Cancel Restore Defaults Fig4 146 Display Bar Setup 2 The bar has two styles which are Original and Bar the default is Original style which denotes the bar function cannot be used When selecting Bar style the bar function can be activated 3 B
84. Refresh Protocol 4nalyzer ee Multi stacked Logic Analyzer Settings Analog Waveform Fig4 156 Refresh Protocol Analyzer STEP 2 Transmit the tested Protocol Analyzer signal to the Logic Analyzer for example Protocol Analyzer SPI Fig4 157 Waveform before Refreshing STEP 3 Choose Select an Analytic Range to select the analysis range and drag Ds Bar to B Bar v 0 T T On Nn Fig4 158 Drag Ds Bar to B Bar STEP 4 ZET the dai ial will sia the data between Ds and Dp Fig4 159 Analyze the Data Between Ds and Dp STEP 5 Click Sl again the waveform return the original state 176 FMO7IAA l PRERA ARAE The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Fig4 160 Restore the Original State Tip The Refresh Protocol Analyzer function can come into effect while the Ds and Dp are activated 177 FMO7IAA PREM RE UB PR 2 8l The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 4 11 Memory Analyzer Memory Analyzer enables the system to divide the packet format in the Protocol Analyzer and display the Address and Data in an independent list It is better for understanding the relative relationship and status of the
85. Se Thus Us E ww Jue Fig 3 144 Scales in Time Sampling Site Ruler Ruler Mode There are two styles of Ruler Regular Ruler Time Sampling Site Ruler Regular Ruler Presented in increments of 5 Time Sampling Site Ruler default Presented in increments of 50us 80 FMO7IAA 81 i SRRHRPARLA The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 3 4 3 Modify Waveform Height amp Correlated Setting To modify Waveform Height click Tools gt Customize Waveform Height Set the height of waveform 18 100 in chosen items at toolbar that will show the amplitude of the waveform x Common Setup Toolbars Shortcut Key Auto Save W avefarm Display Mode C Sampling Site Display Frequency Display C Time Display Huler Mode C Regular Ruler W aveform Setting Waveform Height 3L Time 5ampling Site Ruler Font Size le Fig 3 145 Waveform Height Waveform Height 18 Waveform Height 40 Fig 3 146 2 Fig 3 146 1 Fig 3 146 Examples of Waveform Height FMO7IAA 0 FRARAGhARe EI The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Correlated Setting Select Auto Close in the following figure Correlated Setting v Auto Close Show Gridline M Show Tooltip I Open Close Compression Warning IY Show the T Bar in the middle area I Open Close Double warning What do you want ta show when you press
86. T signal Packet must consist of START DATA PARITY STOP Baud and TXD segments They are as following START When TXD is changing from HIGH to LOW voltage 1 bit DATA Users must decide the size of signal Packet segment from 4 to 8bits PARITY This performs three types of parity checks odd parity even parity and none parity STOP This occurs when TXD is at high voltage This is adjustable this is commonly set to 1 or 2 Baud This is the data transmission speed according to the initial condition of START TXD This is the transmission direction It is MSB LSB by default 128 FMO7IAA PRA RA ih Bike Bl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 4 5 3 1 Software Basic Setup of Protocol Analyzer UART Step1 Set up RAM Size Frequency Trigger Level and Trigger Position as described in Section 4 1 Tip The Setup of the Frequency should be higher but not too far away from the Baud Rate of the test board Step2 Set up Either Edge as the trigger condition on the signals which are connected to the Tx pin or the Rx pin of the tested UART board Step3 Set up the Protocol Analyzer UART dialog box The Protocol Analyzer UART dialog box is set as the steps of I2C PROTOCOL ANALYZER UART Pin Assignment Channel DDA Protocol 4nalyzer Property Parity Check Mone Parity Data E Baud Rate 5 vj IT Auto Length Stop Bit Ries vos Min Tbps Max 1 OMbps ample
87. Technology Co Ltd User s Manual V3 10 Select Channel xX Destes n Eu Fig3 95 Select Channel dialog box In the Select Channel dialog box users can select the channel which users want to display users can select four channels at most the defaulted channels are AO A1 A2 and A3 there are four channels in total SS E H zm Memory Analyzer Fig 3 96 Memory Analyzer Interface See Section 4 11 for detailed instructions ii Facket List Tip DIELEN er Setting Set up the packet list uu SA 5 8 4 Faw bia Bx d Redeem don m m mm ETE 2m LE GNE te n m ime De z tigate Refresh Click it the content in the E LES M duris e packet list will be refreshed Export Users can use the fragment to work record and analyze the packet list data As Export according to the packet list arrangement it exports the text file Fig3 97 Display Packet List and csv file Synch Parameter Open the Synch Parameter Setting dialog box FMO7IAA PREM A in Bree 8l The Zeroplus Logic Analyzer User s Manual V3 10 Zeroplus Technology Co Ltd aeesesseccsepmELM duumuugEN E i Bua cm d dob ue de P A dm a an R da E if PPT SBE KLEE SE Fig3 98 Statistics Window See Section 3 3 for detailed instructions Fig 3 99 Cascade Workspace s ee esl elsi es Aa o ajam MR Fig 3 100 Align Workspace s Horizontally Por pmm nde C
88. Tools window ie 18 x Dee SoS eee oe bh reis a vant mhz j poss i 45 Page fi Count m Ed 5 r k codd E peaasi ee ae Be BS 4 Haight 20 Tagger Dey 1 Total 131072 Display Range 4044 4459 HPos b44HT v B T 544897 F Compr Fiate Ha Bue Sigel a x L F SDA P ATAT 4 Bi ca RIE w Ba bo Ba a Reedy E Endl IConnected Fig 4 68 Waveform Analysis 123 FMO7IAA i PHRSR E The Zeroplus Logic Analyzer 124 Zeroplus Technology Co Ltd User s Manual V3 10 4 5 2 2 Protocol Analyzer I2C Timing Analysis PROTOCOL ANALYZER I2C x Configuration Timing Packet Data Format Register Waveform Image E M m m gt lt tsu oar tsusr0 ie bosma gt ie E i besar t 0 513 Time Format Settings C C A Cancel Default Help Fig 4 69 Protocol Analyzer I2C Timing dialog box Waveform Image Describe the position of the set time Time Format Settings When the Time Settings is activated the set time will become the condition of judging decoding For example when you want to decode START you should judge whether the conditions of START are satisfied firstly and then judge whether the set time of tHD STA is coincident with the factual waveform If the two conditions are satisfied the START can be decoded Other segments decoding of the packet is the same with that o
89. V Fort B Min l Max 65535 use Defi r ZEROFLUS Logic Analyzer 1 X Fort C TTL A Flease enter a mmber between 6 0 and 6 0 Fort I user Defi Ok Cancel Default Help Fig 4 5 Trigger Level Error Step3 Trigger Count Type the numbers or select the number from the pull down menu of the Count Count 1 on the Tool Bar or click the pull down menu of the Trigger Count on the Trigger Property dialog box as shown in Fig 4 6 The system will be triggered at the position where the Trigger Count is set as shown in Figs 4 6 4 7 and Fig 4 8 94 FMO7IAA P Re Tee D BR eS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 x Trigger Count Count il Tro j 5ns i j B 15004 ipr Rate H5 10 Fig 4 6 Trigger Count Pull down Menu 01 xl We ZEROPLUS LAP C 32128 Standard V3 10 CN02 S N 00000000001 LaDoc1 1 o File Bus Signal Trigger Run Stop Data Tools Window Help Deml EE v 9 7 IERI P bb O 12ek sie ih 100MHz m am sm 1096 e 9 Page fi cof F 2 a E m E ER 7 A Riv dd P 0 1524282 amp Oe E Te te PA le ot Trigger Delay v TIT Display Pos 2273 A Pos 12098 v A T 12098 7 A B 30 Total 131072 Display Range 13106 18677 B Pos 12068 B T 12068 Compr Rate No 10047726 7567499 4287258 jor 0 2273209 5553 442 8833 675 12113909 1539442 18
90. Y EIS IT n rr NN C NN Te HI omes al Fig 3 101 Align Workspace s Vertically 64 FMO7IAA FRR AG i ARAE Zeroplus Technology Co Ltd Screen Display E Double Screen Display Fa First Sereen Display E Second screen Iiizplar The Zeroplus Logic Analyzer User s Manual V3 10 Screen Display When there are two displayers connecting users can select a Double Screen Display to display waveforms on both two displayers it is convenient for displaying more waveforms First Screen Display or Second Screen Display can also be selected to display waveforms on the first displayer or the second displayer JE Waiting Normal A Stopwatch Function The function will show at right corner of the bottom of the screen while sampling data It times from users pressing the ensured key at the Bus Property dialog box to Bus insert sending back analyzed data Please look at the left figure It has five functions as following Fig3 102 Stopwatch Function Time of waiting for triggering Time of triggering success Time of sampling data Time transmitted to computer after sampling data finished and Time of Bus data overloading 8 Help Logic Analvzer Help F1 Keyboard Map Problem Feedback About ZEROPLUS Logic Analvzer About ZEROPLUS More Protocol 4nalyzer 65 Fig 3 103 Help Menu FMO7IAA Y SRAM OAIRAA The Zeroplus Logic Analyzer _ Zeroplus Technology Co Ltd
91. a for expansion combine Basic ID and ID If the option is selected the Basic ID and ID will be combined The Del is displayed in CRC Field If it is selected the Del will be displayed in the CRC Field Protocol Analyzer Color The protocol analyzer colors can be varied by users FMO7IAA Y ZPBEXifLBO 012 Rz The Zeroplus Logic Analyzer gt eroplus Technology Co Ltd User s Manual V3 10 Operating Instructions Turn on the user interface of the Logic Analyzer fe ZEROPLUS LAP C 322000 Standard V3 10 CN02 S N LaDoc1 ETE NEUEN ST Pe mr Fig4 128 User Interface Sample the CAN 2 0B signal or open the sampled waveform ZEROPLUS LAP C 32128 Standard V3 10 CN02 S N 00000000001 LaDoc2 ee FEET Fig4 129 CAN 2 0B Waveform 160 FMO7IAA PRR RBIS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Group the signal channels into Bus E ZEROPLUS LAP C 32128 Standard V3 10 CN02 S N 00000000001 LaDoc2 ge Bus Property Group into Bus Ctrl G Ungroup from Bus Gh esl oi Fig4 130 Group into Bus Select the Bus Property to set up the Bus Property dialog box Y ZEROPLUS LAP C 32128 Standard 3 10 CNO2 S N 00000000001 LaDoc2 l l WE of Y Yoxi Group inta BUS Copy Channel Delete Channel mM ees M Fig4 131 Bus Property 161 FMO7IAA Phe Te RBS DS PEZ a The Zeroplus Logic Analyzer
92. accuracy when performing any operation with the Zeroplus Logic Analyzer 1 1 Package Contents Verify the package contents before discarding packing materials The following components should be included in your product For assistance please contact our nearest distributor Table 1 1 Accessaries List LAP C LAP C LAP C LAP C LAP C LAP C LAP C 16032 16064 EN 6128 mE 62000 AN 28 mu 000 mE FARERNE Analyzer 16 Pin Testing Cable 8 Pin Testing Cable l Probe USB CADIE ENNNNNNENENNEM Cp 1 Pin Testing Cable White 2 Pin Testing Cable Black 1 1 1 1 1 1 1 This Driver CD consists of a multilingual software interface program as well as a multilingual User Manual 6 FM0714A 1 ZPBEELFERR BEER Sl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 p ET I i Ex 3 hi s 2 SG ZEROPLUS ns ta ey Ara i hae j i i i n J i i l iA L F i i y i ti p Lar l amp E 16 Pin x 1 8 Pin x 2 Fig 1 2 Testing Cable Fig 1 1 Logic Analyzer o oT ZEROPLUS ES Lil p ig Fig 1 3 Probe varied depending on models 7m TET ms Busy i I MEE C c N i us L i i Utar Fig 1 8 2 Pin Ground Cable Fig 1 7 1 Pin External Clock Cable Black White FM0714A PREAMP Bike Bl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 1 2 Introduction Zeroplus Logic Analyzer
93. ack 0 then the transmitter knows the Receiver has received the data End of Frame 1111111 denotes en Peli Data Frame In the Peli Data frame Data Frame as follows the frame of message is separated into Start of Frame SOB Arbitration Field Control Field Data Field CRC Field Ack Field End of Frame However the parts of Arbitration Field have much more than 18bits and the SRR and IDE are 1 Fig4 123 Peli Data Frame Remote Transmit Request Frame When RTR 1 it denotes Remote Transmit Request Frame at this time DLC3 DLCO are the Data bytes of return data And the frame doesn t have Data Field Fig4 124 Remote Transmit Request Frame 157 FMO7IAA LA BEEHSRE ESPERA Bl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Error Frame The Active Error Flag consists of six consecutive Data Field dominant bits Dominant bits violate the law of bit stuffing All bits can produce Error Frame after recognizing bit stuffing wrong the Error Frame called Error Corresponding Error Flag Field includes sequence bits from 6 to 12 which produces by 1 or more nodes Error Frame ends in Error Delimiter field After Error Flag sends out Bus actively to get the right state and the interrupted node tries its best to send abeyant message Error Delimiter Error Delimiter consists of eight recessive bits and allows Bus node to restart Bus transmission after Error happens Fig4 125 Error Frame Ov
94. alyzer Feroplus Technology Co Ltd User s Manual V3 10 Virtual SS is activated 1 Data needs 8 bit the Idling Time is set as 3us 2 355us is less than Unknow registers timest information after oad E EN is the packet Idling time so the Unknow End Flag 2 355us isn t data SPI SCK DATA X U Packet T eneth If the time length of SCK low Level is bigger than idling time Idling Time so it is it is the timestamp of data and data s timestamp the timestamp of next data 3 S7Sus is bisser than Fig4 89 Packet Length Packet Length Unknow Start Flag TimeStamp to Unknow_ End Flag TimeStamp Packet Idling Length Unknow End Flag TimeStamp to Unknow Start Flag TimeStamp Virtual SS is activated 2 Data needs 8 bit the Idling Time is set as 3us Don t care data bit is not activated Although 3 155us is bigger The Unknow than Idling ti data s A registers Unknow_End_F lag Tnmmi I A JU Lom Mpe Le rt lt DATA OX5D i Packet Length Because the low level f f only has 196ns OL ias Ans 19505 x than Idling tim T packet ends Shon the Low level ends Sus 2 525 Sie Fig4 90 Packet Length Packet Length From Unknow Start Flag TimeStamp to Unknow End Flag TimeStamp Packet Idling Length From Unknow End Flag TimeStamp to Unknow Start Flag TimeStamp Virtual SS is activated 3 Data needs 8 bit the Idling Time
95. ame TimeStamp Address Write 4 ACK Data O Data Data C Data coe Data DACK Data D ACK Fig4 71 Protocol Analyzer I2C Packet List Packet1 It is commonly normal data which includes 1 Address and 6 Data Packet2 It is commonly normal data which includes 1 Address and 6 Data Packet3 It is commonly normal data which includes 1 Address and 14 Data Packet4 It is commonly normal data which includes 1 Address and 6 Data Packet Length When judging the start of I2C it is the Packet TimeStamp FMO7IAA 5 ZXBEEHEEBRR ID BIRZ S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 This Data Start is regarded aS Packet Timestamp This Unknow register is Unknow End Flag Packet Length Fig4 72 Packet Length Packet Length From START Start s TimeStamp to STOP Unknow End Flag TimeStamp Packet Idling Length From Unknow End Flag TimeStamp to Start s TimeStamp This Unknow register is Unknow End Flag 126 FMO7IAA 5 gt RARERGBESA The Zeroplus Logic Analyzer m User s Manual V3 10 i Zeroplus Technology Co Ltd 4 5 2 4 Protocol Analyzer I2C Data Format Analysis PROTOCOL ANALYZER I2C Fig4 73 Protocol Analyzer I2C Data Format dialog box Users can set the Data Format of the Data Slave Addr and Reg Addr as their requirements When selecting the option Activate the data fo
96. an be set according to users requirements the default is 1s and the unit can be selected from s second m minute and hr hour Every Renewal When the repetitive run is activated the waveform image or the state image will renew again and again Open the first file after stopping the Run When the repetitive run function is activated the waveform only displays the first file and it isn t renewed when the repetitive run is stopped the waveform still displays the first file fOr eee 21x Fe bE we Peoia Ta Pe dtm u Qah ee z d IT om t d b D e LA Data LZ io Ll o i LA H1 d LSI i LAWI d TL ima Metia ety inc Fig3 152 Auto Save 84 FMO7IAA PREAH ih Bike Bl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 3 6 Color Setting To modify Color click Tools gt Color Setting LE j x Wor kar ound taveform aveform Background List Background 1 List Background 2 List Text ime Text Bus Error Bus Error Text m A LEED Mar H After the background 1s altered E corresponding color automatically changes according to the contrast ratio lw When being printed the background is white Fig 3 153 Workaround and Waveform Color Setting Workaround Set the workaround color of the Logic Analyzer and the text Work around Waveform Mame Relating aveform Background List Background 1 List Background 2 OO LELLE qma
97. anual V3 10 Bd Find Data value Ctrl F E Find Pulse width ian Ta Place T Add Bar be Zoom E em Hand H R Normal ESCAPE Show all Data F10 eo Previous saom atte Data Format k Waveform Made d Square waveform Sawtooth Waveform Color Bus Data Golor Bus Single Data Color Fig 6 8 Waveform Mode SW15 Can I change the Signal Display Mode into the Timing Mode A Yes you can SW16 Why does not Filter Delay work when the Double Mode is enabled A To optimize signal output quality and maximize memory efficiency the Signal Filter Setup function may work under the Double Mode However the Filter Delay function doesn t work under the Double Mode at this stage 194 FMO7IAA O Phe Tele in BR The Zeroplus Logic Analyzer RGO1 RGO2 RGO3 RGO04A RGO5 RGO6 RGO07 RGO8 195 Zeroplus Technology Co RI User s Manual V3 10 6 3 Registration What is the significance of the hardware serial number Every product is assigned and engraved with a unique serial number which allows us to trace the original manufacturing date of a specific product How dol register online Visit our homepage at http www zeroplus com tw Choose the Instrument Department and click on English Once you finish membership registration proceeding with product registration After finishing product registration you will receive an email consisting of your product registration information
98. anything that could be done better either in software or hardware We appreciate your feedback 202 FMO7IAA
99. ar Width when Bar style is selected the bar width can be set by users Tip The minimum bar width is 1 the maximum bar width is 65535 If the value exceeds the range or the font is not according to the requirement a tip window will appear Signal Filter Time Interval is denoted by Bar Fig4 147 Signal Filter Time Interval Tip The Signal Filter Time Interval is limited under the following situations A The Filter Delay and Display Bar of Signal Filter are not available under the compression mode B The Filter Delay and Display Bar of Signal Filter are not available under the double mode C The final two data are NULL D Logic Analyzer supports the Signal Filter Time Interval function on condition that the time interval between signal filter must be more than two clocks 170 FMO7IAA i PHRSR E The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 4 8 Noise Filter The Noise Filter function enables the system to filter the waveform that doesn t meet users requirements 4 8 1 Basic Software Setup of Noise Filter STEP1 Click Data on the Menu Bar then select Noise Filter to activate the noise filter function as the figure below Data Tools Window Help ee x ET Filter m Bus Width Filter lata Contrast Noise Filter None P Find Data Value CtrltF OK EA Find Pulse Width Fig4 148 Noise Filter STEP 2 Transmit the tested signal to the L
100. at there is no difference in the channels of the two files STEP 3 Display the contrast results in the waveform windows See the figure below Tip It contrasts the two data files in the waveform area The contrast waveform and the basic waveform are 174 FMO7IAA 5 SRAKBREGABRAA The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 displayed horizontally we can roll the mouse to contrast the waveform files the difference of the waveforms will be lined out with the red wave line in the contrast files UTE ETERNA Renn eres p E fe amp P Uy 7 im gt ig EIER S DN m mI E SE six De M CM A mm me be aosiy ndi Fig4 155 Display the Contrast Results in the Waveform Windows Tip The Data Contrast function is available for the LAP C 162000 LAP C 321000 and LAP C 322000 Modules and it is not available for the LAP C 16032 LAP C 16064 LAP C 16128 and LAP C 32128 Modules 175 FMO7IAA PREM HABE The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 4 10 Refresh Protocol Analyzer The Refresh Protocol Analyzer function enables the system to analyze the data between Ds and Dp again 4 10 1 Basic Software Setup of Refresh Protocol Analyzer STEP 1 Click Tools on the Menu Bar then select Aj or click Ed on the Tool Bar directly to refresh Protocol Analyzer Customize Color Setting BUS Bus Property E
101. ata Data Data Data Data Data Data Data Length 1 BusiBu 1023 J oO 1 o 1 O 1 j O 1 J O 1 Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length L2 _ busi us 1013 o 1 o 1 o 1 o Fr 1 o 1 Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length Busi Bus 1003 J o 1 o 1 NE L1 o 1 Packet Name Timestamp Data Data Data Data Data Data Data Data Data Data Length Lo o 1 o 1 o 1 o 1 Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length 1 1 1 1 1 Packet Name TimeStamp Data Data Data Data Jata Data Data Length TE Bus1 Bus Name TimeStamp Data Data Data Data Data Data Data Data Data HEXNETUCNEN NN o piperligerlrreprlsli Fig4 49 Bus Packet List Tip The Protocol Analyzer Packet will be explained in the following plug 5 Packet and Waveform Synchronization For the convenience of fast corresponding between packet data and waveform data and what is more in order to make it easier for users to look up data we add the Packet and Waveform Synchronization function In order to operate conveniently we add a Synch Parameter button on the BUS Packet List as the image below BUS Packet List xj Refresh Export Synch Parameter Packet Name Timestamp Data Data Data Data Data Data Data Data Data Data Length E o 1 o j 1 0 1 J o 1 o 1 Packet
102. ated When the Latch function is activated the default channel is AO and there are three conditions for selecting Rising Edge Falling Edge and Either Edge the default 119 FMO7IAA PRES BO in AIRA Zeroplus Technology Co Ltd is Rising Edge The Zeroplus Logic Analyzer User s Manual V3 10 Tip The Latch function is available for the LAP C 162000 LAP C 321000 and LAP C 322000 Modules and it is not available for the LAP C 16032 LAP C 16064 LAP C 16128 and LAP C 32128 Modules Set the Latch function for one Bus The setting of the Latch channel is A0 the analysis function adopts Rising Edge Bus Property x Bus Setting Bus Color Config A Rising Edge Protocol Analyzer Setting Protocol Analyzer Parameters Contig ZEROPLUS L 1 WIRE MODULE V1 10 006 NOT i ZEROPLUS LA CAM 2 05 MODULE v1 32 000 C NOT ZEROPLUS LA I2 C EEPR OM 24LC561 24LC562 MODULE v1 00 Dr CNOT ZEROPLUS L I2C MODULE v2 02 000 M01 ZEROPLUS LA LiG4572 MODULE Y1 00 DDCc ND i ZEROPLUS L Low Pin Count MODULE v1 09 000 C NO1 i ZEROPLUS LA MIL STD 1553 MODULE Vv1 D0 00 CNO01 ZEROPLUS LA FECI MODULE v1 11 000 CMO1 C ZEROPLUS LA PT2262 PT2272 MODULE 1 00 000CNO1 gt SICA Pio eee Pee RA ae ee Find cet oe w Use the spp More Protocol Analyzer Fig4 63 Activate the Latch Function The picture of the waveform analysis FEROPLUS
103. ated the Virtual SS will be activated The Idling Time of the Virtual SS should be set as an auxiliary condition to decode Type the idling time of the SCLK signal on the tested SPI circuit The idling time is defined as the idling time as shown in Fig 4 86 FMO7IAA Phe Te RBS DS PEZ a The Zeroplus Logic Analyzer User s Manual V3 10 TU NM pe o Me UUU UMOR W MU ATA n Mud iding lime Pu ommum SCE CPOLSI ll Ar Fig 4 84 Idling Time Protocol Analyzer Color Users can vary the colors of the decoded packet Step5 Click OK to exit the dialog box of Protocol Analyzer SPI Step6 Click Run to acquire the SPI signal from the tested SPI circuit Refer to the Fig 4 87 Tip Click icon to view all the data and then select the waveform analysis tools to analyze the waveforms Y amp zEROPLUS LAP C 32128 Standard V3 10 CN02 5 N 00000000001 SPI alc o File Bus Signal Trigger Run Stop Data Tools Window Help Dc E amp 3e Eb bb x vfa i 10MHz Ani xl 181 xl v au mw 50 v 9 Page Riz Oe Be Te de BB le 0 S Height 30 Trigger Delay 1 A T 15 7 A B 30 7 Scale 3 7632 Display Pos 188 APos 15 7 Compr Rate No Total 2048 Display Range 94 285 BPos 15 v B T 15 v 112 896 131 712 150 528 169 344 188 16 206 976 225 732 244 608 263 424 282 24 I pied 3 DAT pp esie TE NT ppp DS ae pup at E ST pepe ESES DET Ee LULU UL UU JUL UL JL
104. can be popped up automatically Users can decide whether to activate the function the default is selected See the export file below lolx Els uk Fans Yen pee yr Thanks far using TEROFLUS Logic analyze n yy vers Tons v Cet rt et ffFilenane LIL txt VOU le sizes KH Jf Filo ersated om 2010 11 26 wf Logic Analyzer setup information rA ineernal node standar f Imrarra rap ring Frequency 25000 nz FF RAM Sire 2KB y Hone us pata compression V The number af fue The number of charme 32 yr Trigger Properties Trigger pos atten UX Trigger 1e la Parr 1 50 v JG Parr 1 50 v lc Pore a 1 40 v Ifo Part ET 50 v Trigger cour nt 2i Trigger page 1 f l ff Signal Filter ef Filter Condition lengthens or shorten no E pe t me Disable VOW stands for js signal nf high pattern L presents the signal of low pattern and s means dari care if 1gnal trigger setup DX stands for don t care H presents high pattern and AOLA means dme pattern 1 SRA means Rising Edge F presents Falling Edge EX E andi for Uther Jf The misplay and rrignmer getup nf Dus According the character of the original fi AL t prezent ff The display of message Toral 1 92ms caledu se dli rhe settings is essential TD reproduce hannels nd busas channel name x n ai ad i c Oo cr Be o6 oF Sonal Fitter x x x x Fig 3 8 Export File FMO7IAA 2f O PREAH SIR Zeroplus Technology Co
105. d When you have closed the Waveform Find dialog box and you want to find the set conditions you can open the Waveform Find dialog box again for the system has saved the last set conditions 44 The Zeroplus Logic Analyzer User s Manual V3 10 Activating the Function of Chain Data Find Use the pull down menu to select the Bus Signal Name The list of Find depends on whether it is a Bus or Signal that is being searched in Bus Choose among In Range and Not In Range enter the value for Min Value and Max Value Signal Choose among Rising Edge Falling Edge Either Edge High and Low Start At Choose the position to start our search by selecting one of the following Ds T A B ect select from the pull down menu When Found Choose A B or other bars to mark the position where it is coincident with the set conditions Statistics Show the number of instances of the search results Note It is available only when searching through a Bus Taveform Find J x v Activate the function of Chain Data Find Bus Signal Name Bust Next Previous Close Please key in a chain of data with a comma to compart them for example 0x32 0X45 0x50 0x66 01 02 03 Start At End At When Found Statistics Statistics Ds r Dp v A v Statistics o Fig3 48 Waveform Find Dialog Box with Activating the Function of Chain Data Find Tip The function of Chain Data Find is mainly for find
106. d DotiCompression Fig 3 41 Data Menu Rh RE Ol Bl 100 ge Be Te ES DB le Fig 3 42 Data Tool Box 41 FMO7IAA PREM RE UB PR 2 8l The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Menu Bar Data Menu Item Detail Menu amp Dialog Box Check the box to enable the Analytic Range to be Select an Analytic Range changed by dragging the Ds and Dp bars with the left mouse button Noise Filter It can filter 0 10 Clock s positive pulse width or negative pulse width signal x D Hoise Filter Noise Filter None Fig3 43 Noise Filter See Section 4 8 for detailed instructions Bus PEU Filter l x mE Bus Width Filter ome Fig3 44 Bus Width Filter Select the check box to activate the function of the Bus Width Filter in the dialog box and then users can input the corresponding value of the width to be filtered in the right edit box Input the time value of the width when the display is in the Time Display or the Frequency Display and the unit is based on time such as s ms us etc if the inputted value is out of the range it will switch to the best time value in range Input the clock value of the width when the display is in the Sampling Site Display and the range of the input is from 1 to 65535 For example after activating this function and then input the value 5ns The Bus Data which is less than or equal to 5ns will be filtered as the fig
107. e inasra x ERI M Urai H A Company Por Jima APuy E ime 7 A TadiMNHS T ED E Tanah ire F Dampi Ranga iE TEA Las arsnnn e Camps Ruis Feia kar naian d UTI eism BA ee WC 7m a kir fis WT Fig3 50 Function of Chain Data Find Displayed on the Waveform Window ATT 0x Signal Name AD Next Previous Close Find Min Pulse Width Max Pulse Width fin Range i fess Start At End At When Found Ds m Dp m A Fig3 51 Pulse Width Find Dialog Box Signal Name It can select the single channel for Find Find It can select the Find conditions which are In Range Min Value gt lt and When users select the option of In Range they can input the value of the Min Pulse Width and Max Pulse Width between 1 and 65535 and find the Pulse Width in range When users select the Min Value they can find the Min Pulse Width for the present single channel When FMO7IAA 46 PRR AG ARRE ZeroplusTechnaology Co Ltd Tip This function is mainly used for finding the pulse width in a single channel and the single channel of a Bus It improves the efficiency of finding the Pulse Width for engineers and strengthens the Find function of the Logic Analyzer l To the Previous Edge Fil d amp To the Next Edge Fl tro To The Zeroplus Logic Analyzer User s Manual V3 10 users select the options gt lt and they can input th
108. e the software needs to add a dialog box so as to set up a Protocol Analyzer HDQ dialog box HDQ Introduction 1 Brief Introduction Features Protocol Analyzer HDQ is a non synchronic half duplex serial transmission which requires only one HDQ and uses a quasi PWM Pulse Width Modulation to verify the serial data Applications HDQ is commonly applied to the display interface for battery management 2 Protocol Analyzer Signal Specifications Parameter Value Name of Protocol Analyzer HDQ Signal Frequency Not fixed around 12MHz 13MHz and 19 2MHz Appropriate Sampling Rate 100MHz Same Data Time Per Bit Yes aNo Name of Syn Signals HDQ Data Verification Point dd 190us converts to High signals gt 3 Protocol Analyzer IO Description We The sole I O transmits Host and BQ HDQ status and data 4 Protocol Analyzer Electrical Specifications Parameter Min Type Max Unt Note V Logic Input High Logic Input Low Protocol Analyzer HDQ Format Description The format changes according to the pulse width so the display must refer to the defined pulse width Protocol Analyzer HDQ is made up of 16 bits signals Firstly after the period of status signals a device will be installed for the 7 bits address through the Host so that 1 bit signals can be read or written After a response time of high signals data will be exported in 8 bits format with the data and location content from LSB to
109. e In MISO Master data input Slave data output MISO stands for Master In Slave Out SS SS stands for Signal Selector of the master device which is to select signals for the Slave devices CPHA The clock phase CPHA control bit selects one of the two fundamentally different transfer formats CPOL The clock polarity is specified by the CPOL control bit which selects an active high or active low clock Bore sere aras el eee ra amas oe eg ema Tic oe i ia ctr ana nen 4 miis zi E Pie o dq dq ULT d es Ebo hk Pobarthy O where ring edges happen Gleck Foeiarit OG wheres ring sedges happen Clack Phase E vrl am pe wes yes be bert Gieck Frage whitia wave enden anid Hee dhia us num CH ic miden ci mue iara sem alrivrtmi umi segs i x e a ho ke Folcarihy 1 where rising ec en happen Cigek Palerity e were ahs Begga ri ae Clack Phase 0 where wowe cycle start Check Frese where wows yoke em Fig 4 82 Clock Polarity and Clock Phases 133 FMO7IAA 134 PREAH ih Bike Bl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 4 5 4 4 Software Basic Setup of Protocol Analyzer SPI Step1 Set up RAM Size Frequency Trigger Level and Trigger Position as described in Section 4 1 Step2 Set up the Falling Edge on the signal of SS which connected to the Signal Selector SS pin of the SPI tested board Step3 Set up the Protocol Analyzer SPI dialog box the Protocol Analyzer SPI dialog box is s
110. e Sample fi minute Cancel Default Help Fig 3 38 Set Trigger Range FM0714A PREAMP Bike Bl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 4 Run Stop single Run F5 bb Repetitive Run F6 B up E Fig 3 39 Run Stop Menu D gt b Fig 3 40 Run Stop Tool Box Menu Bar Run Stop Menu Item Detail Menu amp Dialog Box Click to run once b See ue is See Section 4 1 for detailed instructions Click to run continuously until the Stop button is bb Repetitive Run F pressed See Section 4 1 for detailed instructions Click to stop the repetitive run ct FT P See Section 4 1 for detailed instructions 40 FMO7IAA b PRR ABIESE The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 5 Data ad Select an Analytic Range nu Moise Filter Ed Bus Width Filter Data Contrast B Find Data value Ctrl F EA Find Pulse Width l Tio the Previous Edge Fll To the Next Edge Flt Jy Gore T i Add Bar Alt B Go To A Bar A z Delete Bar Alt B B GoToBBar E 3 Zoom E Go To More Hand H k Normal ESCAPE R Zoom In Fg Binary E Zoom Out F Decimal Show all Data F10 Decimalisigned x Previous Zoom cti42 Hexadecimal ASC TT Maka Format Data Format Square Waveform Waveform Mode Sawtooth Waveform List Data Mode All Data Sampling Changed Dott Compression Data Change
111. e T00 c E o oUm m 24 OS MEM 1008 3 i e 71 om DIAUISUCS E CaN NC e P 75 2A Customize NS ae E sssr aE EE E e 78 3 4 1 Modify Waveform Display MOdGe cccccceecceeeeeeeeeeeeeeeseeeeeeaeeeeeseeeeeeseeeeseeeeeeseaeeeeseeeeesseeeesesaeeeeeas 79 3 4 2 Modify Ruler Mode ccc 80 3 4 5 Modify Waveform Height amp Correlated Setting cccccccccseeeeeeeeeeeeeeeeeseeeeeeseeeeeseeeeeseeeeeeseeeeesaeeses 81 NO Eo P 84 Sr M oops 85 3 6 1 Modify Workaround Color ssssssssssssssessseee nenne enne nennen nenne nnne nnn nnne nnns nna n innen nnns nnns 87 SAP MB eni inieeM T T E 88 3 7 The Flow of Software Operation lssesssssssessseseseeene nennen nennen nnne nnna nnne nnne sns ene arse a sra a nn 90 Introduction to Eogic Analysis sissa prae Eau o adE uS oa ku e cimus Ova COR Ran Esa cM Ex PY NE Ea 91 dl Logic AnaS PREIS Erde p oT HC 92 2S MEE TAS OCC NAY Slo MER 104 Ao FUGAM RT 107 dk BUS PACKETS ere ce ccc es ae E E E E E A pete ce eas 110 Ao BSUS PNY SIS PEEL UTE 117 4 5 1 BU ARNAI I eia E E E 118 4 5 2 VG PINAY c M m 12
112. e signal cables to the activated pin on your test board and check the power supply of your test board The Logic Analyzer does not supply any electricity to a test board via signal lines Q3 I geta signal from only one Logic Analyzer when I have two connected what is wrong A Currently only the LAP C 32128 LAP C 321000 and LAP C 322000 support many Logic Analyzers working in series Also make sure that the signal lines power lines and ground line are properly connected Refer to Fig 1 11 Table 1 2 Table 1 3 Table 1 4 and Table 1 5 Q4 Why should bother grounding Where can ground A Grounding will protect the Logic Analyzer and the test board A proper ground may improve the quality and accuracy of your data Since it is impossible to avoid unwanted interference you may ground the Logic Analyzer with the test board to ensure that unwanted interference will equally disturb both the testing and tested devices ensuring a set of data that is still accurate Conclusion Every user of a product is a potential writer for Chapters 5 7 in this User Manual In fact this chapter is a composition of many unnamed electronic professionals especially experts 187 FMO7IAA 188 C O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 6 FAQ 6 1 6 2 6 3 6 4 6 5 Hardware ooftware Registration Technical Information Others FMO7IAA O PREP i Bee The Zeroplus Logic Analyzer Z
113. e size of the selection frame is in inverse proportion to the Zoom Rate the larger the Zoom Rate is the smaller the size of the selection frame is Users can also click the Right Key of the mouse to select the displayed channel The Zeroplus Logic Analyzer User s Manual V3 10 Fig 3 91 Navigator Window ARDAL LAP 0012980 Weed TC Ah Per D De Bete le Borie Das a ree is me E _ aM DgilmxSN IISHERMC mx 3 4m m m cs mmm j M uso EESTI DE ded he lie EM Pane Rag irma Len be I 2 Fig 3 92 Navigator Window under the waveform display area ARO 121 7 Baler Te te e ry ciem Ld ETE Um 7 agi xj i m m mms CE T MI SERGIERTE ETE DET ean Crepe For i Fun Sur wh T Elasta Raapa Tiara Brera E NE S NEQU NEQU ee GLOIU GAS G2 S NA Fig3 93 Blue Frame in the Navigator Window There is a blue frame in the above Navigator Window Users can click the Left Key of the mouse to select the waveform randomly nes XX oe iex Dena rS SAD gt moe fe menm e a sms jwogm e PERM AAS um ep Tegge Daie LI d sj Dergtay Pos 3 reme A Beste Total 81 Eres Dipa e mgt Time speres sectarian Carp Fate t n FURL LAPORTE S al tele Yor Fig3 94 Select Channel button After clicking the Right Key of the mouse the Select Channel dialog box will pop up as below FMO7IAA 63 PHHH SIRAS The Zeroplus Logic Analyzer Zeroplus
114. e value of the Pulse Width between 1 and 65535 and find the Pulse Width in range Start At Select the Start point of Find The selectable items are all Bars the default is the Ds Bar End At Select the End point of Find The selectable items are all Bars the default is the Dp Bar When Found Select a Bar to mark the found Pulse Width The selectable items are all Bars the default is A Bar Statistics It can count the number of Pulse Width in the present range Next It can find the next Pulse Width Previous It can find the previous Pulse Width For example Find in the A1 channel the Pulse Width is equal to 40us take the A Bar as the mark See the below figure n dun d Fig 3 52 Pulse Width Find on the Waveform Window Go to the previous edge sweep of the indicated signal Go to the next edge sweep of the indicated signal Go To T A B or Go To More Ged A Peace Display Binga 7192 Maa AI tee E Beale B Tz159ha Cipra Dal a Es Fig 3 53 Go To T Bar T Bar will be displayed in the center of the waveform area FMO7IAA 47 AP RE ES BO i BPR Zeroplus Technology Co Ltd Tip 1 Press T go to T Bar 2 Press A go to A Bar 3 Press B go to B Bar TO Add Bar AlttA Bar Add user defined bars 1 Click the above menu item from Data menu or click Add Bar icon from Tool Bar 2 Give a Bar Name define a Bar Color and set a Bar Position 3 Define the Bar Key with the n
115. ecimal C Decimal sianed Hexadecimal ASCII Cancel Default Help Fig 4 18 Bus Trigger Dialog Box Tip The Bus Name item can be selected from the pull down menu It only displays the Bus name and also the Decimal signed Mode is added 2 Protocol Analyzer Trigger Setup Tip This function can be used in the Modules LAP C 16032 LAP C 16064 LAP C 16128 LAP C 162000 LAP C 32128 and LAP C 321000 after registering And for the LAP C 322000 it is not necessary to register as it can be used for free Before registering the button OK in the Protocol Analyzer Trigger dialog box is the button Register when users press this button Register a Register dialog box will pop up Then users need to enter the correct Register Code so that they can use this function Protocol Analyzer Trigger Bus Trigger x geoeseseseseseessoecosososesceeeosessesoeeseozoseegoeseseseseses arr Allow Protocol Analyzer Trigger Protocol Analyzer Protocol Packet Value p r Data Format C Binary Decimal Decimal signed Hevadecimal ASCII Cancel Default Help Fig 4 19 1 Before Registering 99 FM0714A PREAH Bike Bl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Register Dialog Box x The Function is an optional purchased item Welcome to purchase its serial key to activate this Function for your necessary Enter seria
116. ed when users select the Pure Data Form the Option button can be used The Option pops up the Option dialog box as follows where users can customize the export data items in the dialog box which are Packet Name TimeStamp Length and DESCRIBE FMO7IAA 28 AP RE ESAS i ARAE Zeroplus Technology Co Ltd is Capture Window Ctrl C The Zeroplus Logic Analyzer User s Manual V3 10 Options vw Packet v Length Iv Mame M DESCRIBE v Timestamp Fig 3 11 Option Dialog Box For instance all the export options are selected entirely See the below picture T Bus1 IIC 3 1us BX6E RERD R RCK BX25 D RCH BX36 D RCK BX47 D ACK X58 D ACK 6X69 D ACK OX7A D ACK OX8B D ACK GX9C D ACK BXRD D RECK GXBE D ACK BXCF D ACK BXE B D RCK OXF 17D REK BX 82 D ACK BX13 D REK 7 2 Bus1 IIC 1 785ms BN5D RERD R RCK 8359 D nCK ONSA D ACK BX6B D RCK OA7C D ACK OX8D D ACK GA9E D ACK ONAF D ACK OXC 6 D ACK BAD1 D ACK ONE2 D ACK 3 Bus1 IIG 2 952ms 6818 WRITE A ACK 6818 D ACK 6829 D ACK GX3A D ACKS 4 Bus1 1IC 3 56ms 6447 READ A ACK BX7 8 D ACK 8X81 D ACK 8X92 D ACK BXA3 D REK BXBA7D RCK 7 BXC5 D RCK 7 BXD6 7D ACK BXE D ACK BXFS D ARECK OX B9 D ACK OX1A D ACK BX2B D RCK BX3C7D REK BX4D D ACK BX5E D REK Fig 3 12 Pure Data Form gt Capture Window xj Capture to Note File C Clipboard C MsPaint Capture Region Full Screen
117. ed on the Configuration dialog box automatically 129 FMO7IAA Phe eho DS PR The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Data Reverse Decoding When the option is selected the data will be decoded in reverse DATA 10110000 Without using the reverse data level to decode E z E UNKNOW START DATA 10000000 UT IIL Using the reverse data level to decode Fig 4 76 Without With the Reverse Data Level for Decoding D Protocol Analyzer Color Users can vary the colors of the decoded packet Step5 Press OK to exit the dialog box of Protocol Analyzer UART Step6 Click Run to acquire the UART signal from the tested UART circuit Refer to Fig 4 77 Tip Click icon to view all data and then select the waveform analysis tools to analyze the waveforms Y ZEROPLUS LAP C 32128 Standard V3 10 CN02 S N 00000000001 uart alc loj x a File Bus Signal Trigger SI Data Tools Window Help la xl ja zm es E c ST gf 2m b DD J 128K site 9 100MHz o nw 50 i J Page fi Count ji E Sra RR edd BH 0 1373535 mw R a Re E Te be Be o BS 4 Height 30 v Trigger Dey 1 _ Scale 728 048425 Display Pos 81783 A Pos 71164531 A T 116453 7 A B 30 7 Total 15782303 Display Range 63581 99987 B Pos 116423 B T 1
118. ed with the Waveform 164 FM0714A Phe eee DS PEZ a The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 4 6 Compression The compression function enables the system to compress the received signal and has more data stored in per channel 4 6 1 Software Basic Setup of Compression Step1 Set up RAM Size Frequency Trigger Level and Trigger Position as described in Section 4 1 Step2 Set up the trigger edge on the signal or the Bus to be triggered Step3 Click i icon or click the compression function from the Sampling Setup dialog box then click Apply and OK to run PLUS LAP C 32128 Standard 3 10 CNO2 S N 12C alc Bus Signal Trigger Run Stop Data Tools Window Help EA Sampling Setup E mI b bh llh ak m du VARI fea Hz p ia Channels Setup EEUU ar Ri ate x Wh Signal Filter Set Clock Source Group into Bus pss Ungroup From Bi fe Internal Clock Frequency SMHz Expand Colapse r Synchronous Clock Format Row External Clock Rename Rising Edge Frequency 100KHz Falling Edge Min 0 001Hz Max 100MHz Note The external clock voltage level is the same as the port 4 trigger level r Sampling RAM Size Compression Mode Signal Filter RAM Size 128K v Data Compression Signal Filter Setup Channel number will be limited to 32 Apply low Cancel Restore Defaults Help Fig 4 137 Compression Mode
119. eele Qindew Help xj Rea ss Ses 5 7 E bM 128K ie Hh eumanz sux 4 Page i Count 1 RS edm DE I RE Lio Me n Heieht 28 Trigger tery 1 Reale ATA 8539833 Display Fes IHO h Fax DR m Ta BA A gt Ez 0580 Total 131072 Display Baga H 13064 B Pos C4997 B Tt tan Conpr Bataz ie Bur Sigal TE4 He l n NT m ehm Im ETE m 11473 pTi idi ao Jer 54658 PU UU LIE LI LE LI L LL LI LI fan d e 56125 1960 1959 196 1987 1963 199 15 uu 120195 wm gt e 120095 fe AN x z 120195 Kass a 120195 fee e e 120195 AT T E ju 120195 oe pom a S 120195 JEEN a amp omm E mum amp n a ndis ola 183 FMO7IAA C O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 9 Troubleshooting 9 1 Installation Troubleshooting 5 2 Software Troubleshooting 5 3 Hardware Troubleshooting 184 FMO7IAA O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 Objective In this chapter troubleshooting is divided into installation software and hardware issues These troubleshooting questions and answers depend not only on our engineers but also on end users such as students engineers technical manual writers and others 5 1 Installation Troubleshooting Q1 Whyitis not prompt when l insert the driver CD into my CD ROM
120. elp e e d 4 gt End Connected Z Fig4 132 CAN 2 0B Bus Property Setup Double click the ZEROPLUS LA CAN 2 0B MODULE V1 32 00 CNO01 to set the Protocol Analyzer CAN 2 0B dialog box PROTOCOL ANALYZER CAN 2 0B EU Configuration Packet Data Format Register Pin Assignment Start Packet Format Protocol Analyzer Mame Bus 111Bil Start Ch AL xu D Bit Start Protocol Analyzer Property Data Reverse Decoding Percentage 5 ample BO After End Packet happens just begin to analyze Baud Rate 125000 Auto When CAN Data fer expansion combine Basic ID and ID Mins bps Mas 10Mb PRAE i i Min bps Max 10Mbps v The Delis displayd in the CAC Field Control Error Overload Default Help Fig4 133 Protocol Analyzer CAN 2 0B Setup Click OK in the Protocol Analyzer CAN2 0B dialog box to complete the CAN 2 0B Setting 162 FM0714A fo mag EH RO BEER Z2 8l The Zeroplus Logic Analyzer gt eroplus Technology Co Ltd User s Manual V3 10 gt ZEROPLUS LAP C 32128 Standard V3 10 CN02 5 N 00000000001 LaDoc2 Bi rosasozx UU LLL TLILIU LLL s Qa CV Fig4 134 CAN 2 0B Decoding 163 FMO7IAA Phe eee DS PR a The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 4 5 7 2 X Protocol Analyzer CAN 2 0B Packet Analysis PROTOCOL ANALTZER CAN 2 06 Configuration Packet
121. equency of the Oscillator on the DUT Or select the frequency zoownz from the pull down menu on Tool Bar as Fig 4 2 shows Tip Connect the output pin of the oscillator from the tested board to the signal connector of the Logic Analyzer to measure it by using the internal clock of the Logic Analyzer Clock Source 200MHz r Asynchronous Clock Internal Clock Frequency f P 500Hz Synchronous Cloc 1KHz 25KHz ce Rising Edi SOKHz Sampling MRAM Size RAM Size Jo Channel number wr 200MHz limited to 32 200MHiz Fig 4 2 Clock Source Pull down Menu External Clock Synchronous Clock 92 FMO7IAA 93 C O PREP eho DS PR The Zeroplus Logic Analyzer Zeroplus Technology Co E User s Manual V3 10 Click on External Clock and then select Rising Edge or Falling Edge as the trigger condition of the DUT In the Frequency column type the frequency of the oscillator on the DUT Tip The External Clock is applied when the frequency of the oscillator on the tested board is exceeds the range of the internal clock of the Logic Analyzer Connect the output pin of the oscillator on the tested board to the CLK pin of the Logic Analyzer Step 3 RAM Size Setup Click on the RAM Size 919 amp from the pull down menu on the Sampling Setup dialog box as shown in Fig 4 3 Rising Edge Information X C Falling Edge You have se
122. er if front panel USB ports are directly soldered to the main board you can use them 3 Make sure the Logic Analyzer is directly connected with the PC without a USB hub 4 Inconsistent data display may indicate voltage irregularities in the main board examine capacitors on your main board or power supply 189 FMO7IAA C O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 5 If the problem is the power supply we strongly recommend purchasing a power supply with a hardwired voltage transformer rather than a voltage regulator For power supplies with the same output power those built with hardwired voltage transformers are usually much heavier than those relying on voltage regulators H14 What are the time settings for Setup and Hold A Setup Time 0 05ns 0 25ns Hold Time 0 02ns 0 08ns Clock High requires a minimum of 0 31ns Clock Low requires at least 0 47ns 190 FMO7IAA S mask ROO B ER 2 Sl The Zeroplus Logic Analyzer O Zeroplus Technology Co Ltd User s Manual V3 10 6 2 Software SWO01 Why is the compression function not enabled by default A Mostly to avoid significant errors when testing signals with high variability or measuring a certain channel for a long time period SWO2 What is the purpose of the compression function A The compression function measures signals that vary slightly over a long period SWO3 Can I enable Trigger Page and Co
123. erload Frame There are two kinds of Overload conditions which both lead to the transmission of an Overload Flag The internal conditions of a node which require a delay of the next Data Frame start during the first bit of Intermission Overload Flag can send six 0 which may damage Intermission format so that it makes the other nodes know node sending Overload Flag at this time When Overload Flag is sent out Overload Delimiter can send eight 1 others send seven 1 after finishing either Fig4 126 Overload Frame Interframe Space Interframe Space is divided into Intermission and Bus Idle Intermission is three 1 It is impossible to send any message during this time except Overload Frame The Bus is recognized to be free the period of BUS IDLE may be of arbitrary length And any station having something to transmit can access the Bus When a node is at the state of error passive the node will send eight 0 after INTERMISSION and other node have the chance to retransmit themselves information 158 FMO7IAA PREAH ih Bike Bl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 4 5 7 1 Software Basic Setup of Protocol Analyzer CAN 2 0B PROTOCOL ANALYZER CAM 2 06 X Fin Assignment Start Packet Format Protocol Analyzer Mame Bust 1i11Bit Start Henne AD mE D Bit Start Protocol Analyzer Property Data Reverse Decoding Percentage Sample BOF E After End Packet ha
124. eroplus Technology Co RI User s Manual V3 10 Objective In this chapter common problems and questions are roughly classified into five categories Hardware Software Registration Technical Information and Others This is a backup resource for users especially those without Internet access Most references refer to English web links 6 1 Hardware H01 Is it ok to substitute stock items for bundled cables and connectors A Yes users may use any compatible connectors and cables However to ensure consistency and accuracy in measurements and data we strongly recommend using the bundled connectors and cables Each of the Logic Analyzer s is calibrated with the bundled cables and connectors before packing H02 Does Zeroplus manufacture grippers How may purchase grippers A Yes we have a production line dedicated to grippers Contact our sales department and a sales representative will be happy to assist you H03 Is the memory size fixed If I just use one of the ports can expand the memory size A The Logic Analyzer s memory is fixed at 4 megabits Due to current hardware limitations the memory size cannot be modified even as the number of ports used changes H04 Are different external sampling frequencies for different channels possible A No there is only one external sampling frequency available H05 Can I disable or set a certain port to don t care while during compression A No during compression D Port w
125. esent Data Read the Captured Data Iv Check for Update Restore Defaults Fig 3 140 Customize the Display Mode by Using the Tool Bar fut Sampling Site Display gt ZEROPLUS LAP C 32128 Standard 3 10 CNO2 S N LaDa oy File Bus Signal Trigger Run Stop Data Tools Window Help 6 6 48 OB gt D gt Cer ii E 1009 Display Pos 0 s Display Range 25 27 ify Frequency Display t Time Display 4 Time Display fay Sampling Site Display Frequency Display Hide time of waveform Filter Hide time of waveform Waveform Display Mode There are four display modes to determine the method of capturing data from sampling Sampling Site Display Time Display Frequency Display and Hide time of waveform 19 FMO7IAA PRE RR D TS PR 2x 8l The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 3 4 2 Modify Ruler Mode Use the menu to modify the Ruler Mode Go to Tools and click Customize See Fig 3 142 x Common Setup Toolbars Shortcut Key Auto Save Waveform Display Mode C Sampling Site Display Frequency Display C Time Display Huler Mode W aveform Setting C Regular Ruler Waveform Height 30 Time 5ampling Site Ruler Font Size 2 Fig 3 142 Ruler Mode Regular Ruler g 3 ij 10 3 Jj 5 10 cd A 25 2 Fig 3 143 Scales in Regular Ruler Time Sampling Site Ruler FX
126. et as the steps of I2C 55 Pin Assignment 55 Channel Pin Assignment SELLE sck DATA data Protocol Analyzer Property Made CPHA 0 CPOL 0 Dor en MSB LSB recton Data Length E bit FIIO at the LSB when the bit count is nat enough Protocal Analyzer Color Cancel Default Help Fig 4 83 Protocol Analyzer SPI Configuration dialog box 55 Channel 55 Setting C Virtual 55 Idling Time OOns Foie Mare boars I Don t care data bit Step4 Set the SPI Configuration dialog box Pin Assignment SCLK It is the Clock channel and the default is AO DATA It is the Data channel and the default is A2 Protocol Analyzer Property Mode There are six modes for selecting which are CPHA 0 CPOL 0 CPHA 1 CPOL 1 CPHA 1 CPOL 0 CPHA 0 CPOL 1 Rising and Falling Transmission Direction Set the Transmission Direction to MSB gt LSB or LSB gt MSB Data Length Set the Data Length in the range from 1 to 56 and the default is 8 Fill 0 at the LSB when the bit count is not enough For example the value of Data is 1001111 there is only 7 Bits When the value of Data is set to 8 Bits the displayed value should be 10011110 SS Pin Assignment SS Channel Select the channel for the SS the default is A1 SS Setting Set the Judgment Level of the SS Channel to Low or High Virtual SS When the SS Channel is not activ
127. f the START FMO7IAA 125 Phe eee DS PEZ a The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 4 5 2 3 Protocol Analyzer I2C Packet Analysis proTocoL analyzer NEN 00x Configuration Timing Packet Data Format Register tem v A NACE v Read Iv DACKE v write v D NACK v Data v Describe MAACK I Reg Addr Cancel Default Help Fig4 70 Protocol Analyzer I2C Packet dialog box In the Packet dialog box users can select the set item to be displayed and the color of item It is a Bus Packet List view which includes 4 formats which I2C happens as follows x Setting Refresh Export Synch Parameter Packet Name TimeStamp Address Write A ACK Data EDON Data Data BESOK Data DACK Data DACK Data D ACK 7D D ACK 8E D ACK 9F D ACK Packet Name TimeStamp Address Write 4 4CK Data c Data PDRACK Data DACK 12 write aack D5 D ack E6 D ACK F7 D ACK Data 5750 Data D ACK Data D ACK O8 D ACK 19 D ACK 2A D ACK Packet 3 Name TimeStamp Address Read A4 ACK Data co Data Io o Data D ACK 06 Read a ack 60 D ACK 71 D ACK 82 D ACK Data DACK Data DACK Data Uo Data DACK Data DACK Data DACK Data 93 D ACK A4 D ACK BS D AcK C6 D ACK D7 D ACK E8 D ACK F9 D ACK Data D ACK Data D ACK Data DCK Data D ACK Packet 3 N
128. figuration dialog box STEP 1 Select Channel 1 WIRE has only one OWIO Select the channel that it is to link the OWIO PROTOCOL ANALYZER 1 WIRE Xj Protocol Analyzer Color Reset Pulse Presence Pulse Protocol Analyzer Property Connect Speed Standardi us Transmission MSB LSB Direction Data Length E bit hie 1 bit Mas 32 bit Data hin 1 Mas 120 Cancel Default Help Fig4 102 Protocol Analyzer 1 WIRE Channel Setup STEP 2 Set the Connect Speed 1 WIRE has two modes Standard 1 us and High 0 2 us The speed setup according to the specifications of the object to be tested and the default mode is standard 144 FM0714A i Fhe EH RO 0 3 PR 23 8l The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 PROTOCOL ANALYZER 1 WIRE X Fin Assignment Protocol amp nalyzer Color Reset Pulse Presence Pulse Data Transmissi Durection Sampling Position Co BID ka ERE Fin 1 bit M ax 32 bit Min 1b as 120 Cancel Default Help Fig4 103 Protocol Analyzer 1 WIRE Connect Speed Setup STEP 3 Set the Transmission Direction Set the Transmission Direction as either MSB gt LSB or LSB gt MSB PROTOCOL ANALYZER 1 WIRE EE i Fin Assignment Protocol Analyzer Color Owl Reset Pulse Presence Pulse Protocol Analyzer Property Connect Speed Standard 1 us Transmission
129. g device Users must carefully read instructions and procedures pertaining to installation and operation Any instrument connected to the unit should be properly grounded A pair of anti static gloves is strongly recommended when performing a task with the device To ensure accuracy and consistency of output data use of the bundled components is strongly recommended Users opinions are very important to Zeroplus Please contact our engineering team by telephone fax or email with your questions or feedback Thank you for choosing the Zeroplus Logic Analyzer Notice We will not have additional notice for you when there is any modification of the User Manual If there is some unconformity caused by the software version upgrade users should take the software as the standard 4 FMO7IAA O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 1 Features of Zeroplus Logic Analyzer 1 1 1 2 1 3 1 4 1 5 Package Contents Introduction Hardware Specifications oystem Requirements Device Maintenance and Safety FMO7IAA O PHARD Bee The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 Objective In this chapter users will learn about the package contents description hardware specifications system requirements and safety issues of the Zeroplus Logic Analyzer Although this chapter is purely informative we highly recommend reading this carefully to ensure safety and
130. gger Level 6 0V to 6 0 V 50 aod 1 isi EST Count 3 Fig 3 34 Trigger Position Trigger Page Trigger Count 1 Represents the Trigger Position of a memory page 2 Represents the Trigger Page 3 Represents the Trigger Count Trigger Property Trigger Content Trigger Delay Trigger Range CE A e I IS Trigger Page 1 v Min 1 Max 8192 Trigger Position 50 C Delay Time and Clock Trigger Delay Time 20us Min 20us Max 335 524s Trigger Delay Clock 1 Min 1 Max 16776191 T Pos 0 Start Pos 1023 End Pos 1025 Note When more than one tr lgger pages are selected the trigger bar disappears from the view X Cancel Default Help Fig 3 35 Set Trigger Delay FMO7IAA 39 A RARER Ake 8l ZeroplusTechnaology Co Ltd Tip Trigger Range Icon Description N A Trigger Range The Zeroplus Logic Analyzer User s Manual V3 10 See Section 4 1 for detailed instructions Fig 3 36 Set up Trigger Delay clock under time display Trigger Delay 1000 Fig 3 37 Set up Trigger Delay clock under sampling site display The Trigger Delay setting in Tool Box equals to that in the above dialog box Trigger Property x Trigger Content Trigger Delay Trigger Range M M A o a pite e Range Setting rin
131. he USB cable into the Logic Analyzer Fig 2 4 5 Plug the thin end into the computer Fig 2 5 FMO7IAA FRARERGARAA The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 At this point the computer should be able to detect the Logic Analyzer and finalize the installation for hardware connection For further information refer to the Troubleshooting and Frequently Asked Questions FAQ chapters in the User Manual Fig 2 6 An Assembly of Laptop Logic Analyzer and Testing Board 19 FMO7IAA O PRARRRARE The Zeroplus Logic Analyzer Zeroplus Technology Co in User s Manual V3 10 2 3 Tips and Advice 1 When testing a circuit board make sure that the internal sampling frequency within the Logic Analyzer is at least four times higher than the external board frequency 2 Ifthe signal connector does not work well with the pins on the test board try to use the supplied probes ZEROPLUS ung 3 Usages of probes E y 3 1 Take the loose end of the cable and DL e A insert it into the clip Fig 2 8 go MN n eee ML _ h Jf 4 E E Fig 2 8 SX ANT a 3 2 Compress the probe as shown to e eye ul A reveal two metal prongs Fig 2 8 wy he m 3 3 Place the metal prongs on a metal ls Nm connector on the testing board and BEI h release the fingers so that the prongs i rio S can grip the metal connector Fig i 2 9 eas dd afinidad Fig 2 9 4 The Logic Ana
132. hen the mouse is located at a special position on the waveform area click the right key to select the Add Bar function a bar will be added automatically in the special position SS according to the sequence of the word and color See the C Bar in the position 5 in the right column F T ul xir Qi Menor QUUTUUUJ U Fig3 117 Add a Bar on the Waveform Area FM0714A 71 j ZeBEEHSRE GO SIS S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 3 2 Find Data Value Find Data Value is a very useful tool to help the user to find data on the received signals Step1 Click the find data value pi icon the dialog box of Waveform Find will appear Step2 Using the pull down menu select the Bus Signal Name The Bus Signals listed on the pull down menu represent the status of the Bus Signal column as shown in Fig 3 118 Psim Activate Ube function off hain B fe das c s KB r 2 d E x 7 tH B m m a Di D De nr 4 B BH e Fig 3 118 Step3 Choose the character for Find The list of characters depends on whether it is a Bus Signal or the protocol analyzer such as I2C UART SPI etc which is being searched See Figs 3 119 3 120 3 121 3 122 3 123 3 124 3 125 3 126 and 3 127 Bus Choose among In Range and Not In Range Enter the Min Value or Max Value Protocol Analyzer Choose the segments bit
133. hnology Co Ltd User s Manual V3 10 Task2 Trigger Property Step1 Click if icon or click Trigger Property from the Trigger on the Menu Bar The dialog box will appear as shown in Fig 4 4 Trigger Run Stop Data Tools 4E Bus Trigger Setup Fal Channel Trigger Setup 4H Trigger Property ie Trigger Mark Trigger Property j x Don t Care Trigger Content Trigger Delay Trigger Range e High Eur Low Trigger Count o a Trigger Level Fort Tr Rising Edge Hi Falling Edge TTL fi s v ste Either Edge Fort B Min l Max B5535 TTL TE w Reset I Bx ge Port D TTL 5 m Cancel Default Help Fig 4 4 Trigger Property Step2 Trigger Level Setup Click the pull down menu of Trigger Level on Port A B C and D to select the Trigger Level as the voltage level that a trigger source signal must reach before the trigger circuit initiates a sweep Tip There are four commonly used preset voltages for Trigger Level TTL CMOS 5V CMOS 3 3V and ECL Users also can define their own voltage from 6 0V to 6 0V to fit with their DUT Port A represents the pins from AO A7 on the signal connector of the Logic Analyzer and so do Port B C and D The voltage of each port can be configured independently Trigger Property a X Trigger Content Trigger Delay Trigger Range Trigger Level Trigger Count Fort i cios 6 5
134. ice Departments China Shenzhen China Shanghai ZEROPLUS TECHNOLOGY CO LTD 3F No 121 Jian Ba Rd Chung Ho City Taipei County R O C Tel 886 2 6620 2225 Fax 886 2 6620 2226 ZIP Code 23585 ZEROPLUS TECHNOLOGY CO LTD 2F No 242 1 Nanya St North Dist Hsinchu City 30052 Taiwan R O C Tel 886 3 542 6637 Fax 886 3 542 4917 ZIP Code 30052 E Mail hunter zeroplus com tw ZEROPLUS TECHNOLOGY CO LTD Address 2F NO 123 Jian Ba Rd Chung Ho City Taipei Hsian R O C Tel 886 2 6620 2225 Ext 200 Fax 886 2 6620 2226 ZEROPLUS TECHNOLOGY DONG GUAN CO LTD Room 2821 B2 Section Building 1 Hong Rong Square District 80 Bao an Shenzhen City Guangdong Province China Mainland Tel 86 755 2955 6305 6 Fax 86 755 2955 6306 808 ZIP Code 518102 ZEROPLUS TECHNOLOGY DONG GUAN CO LTD 101 No 172 Alley 377 Chen Hui Road Zhang Jiang Pudong New Area Shanghai City Tel 86 21 50278005 6 Fax 86 21 50278006 ZIP Code 201203 Users can download the newest Software and User Manual ZEROPLUS is the brand of ZEROPLUS TECHNOLOGY CO LTD The other brands and products are the brand or registered trade mark of the individual company or organization Conclusion The demonstrations in this User Manual will enhance users understanding of our products in future issues even though the manual ends here We thank you for choosing the Logic Analyzer Please contact us if you find
135. ighlight a designated signal and then set its required trigger condition 1 Left click to set the signal trigger condition as shown in Fig 4 22 2 Right click 4H to set the signal trigger condition as shown in Fig 4 23 3 Click Trigger on the Menu Bar and choose a trigger condition from the list of triggers as shown in Fig 4 24 Pus Signal Trigger 5 oy Channel Trigger Setup TK M An left click o 4 ADA 5 u Trigger Property DO Dont Care E KY Al Al 083 A3 High eo bia Low P Ad 54 Meum jets F RP AS D Rising Edge y 55 X Falling Edge jT ee o M38 B3 EC i x r Edge Color E y AA id A7 A5 Sa Fig 4 22 Left Click on Trigger Fig 4 23 Right Click on Trigger Trigger Run Stop Data Tools Window Help S Bus Trigger Setup v Channel Trigger Setup iE Trigger Property Trigger Mark 3 Pulse Width Trigger Module Option Either Edge Reset Fig 4 24 Trigger Menu 102 FMO7IAA AP BE ELS RH S PS 23 8 ZeroplusTechnaology Co Ltd Task 5 Run to Acquire Data 1 Single Run The Zeroplus Logic Analyzer User s Manual V3 10 Click the Single Run icon from the Tool Bar or press START button on the top of the Logic Analyzer or press F5 then activate the signal from the DUT to the Logic Analyzer to acquire the data shown in the waveform display area 2 Repetitive Run Click the Repetitive Run icon from the Tool Bar then activate continuou
136. ill be set to be disabled H06 Why does the Logic Analyzer feature negative voltage calibration A This allows users to analyze any given signal H07 How dol adjust the Trigger Level A The adjustment of the trigger level is done with a port which consists of 8 channels The trigger lever can only be adjusted for an entire port H08 Does the Logic Analyzer use hardware or software compression technology A For time efficiency the Logic Analyzer uses hardware compression H09 Is planning an Analyzer that can handle more channels A Yes we are working in this direction H10 Does the memory page vary when the depth of the memory changes A Yes the depth of memory changes the memory page H11 Is the Logic Analyzer expandable How may I expand it A Yes the Logic Analyzer is expandable At this stage you can expand it with external module devices H12 Why must reinstall the driver every time use a different Logic Analyzer A Since each Logic Analyzer has unique serial numbers you must reinstall the driver every time you change the Logic Analyzer H13 Whyis there no data Why does data sampling seem inconsistent A The reasons are varied but you may follow this checklist for troubleshooting 1 Always check the USB connection between the Logic Analyzer and your PC 2 We strongly recommend using USB ports in the rear panel of a PC these ports usually have better voltage stabilities than front panel ports Howev
137. ing the data in the packets of Bus and Protocol Analyzer which have some serial data For example it can start finding with the serial packet segments there are 0X01 0X02 and 0X03 in the Bus It improves the efficiency of Data Find See the following process Activate the Function of Chain Data Find Bus Signal Name Bust i Previous Close Bus Item Find Min Value Max Value Data o Start At End At When Found Statistics B SER Address 1003 FMO7IAA 45 AP RE fe BO in AIRA Zeroplus Technology Co Ltd fol Find Pulse Width The Zeroplus Logic Analyzer User s Manual V3 10 Tavefora Find x v Activate the function of Chain Data Find Bus Signal Name Bust Next Previous Close Please key in a chain of data with a comma to compart them For example 0x32 0x45 0x50 0X66 Start At End At When Found Statistics ps x Dp m A z Address 1006 us Taveform Find xj IV Activate the function of Chain Data Find Bus Signal Name Bus1 Previous Close Please key in a chain of data with a comma to compart them for example 0x32 0x45 0x50 0x66 01 02 03 Start At End At When Found Statistics Statistics b mi mb oa Address 990 Lx Fig 3 49 Process of Activating the Function of Chain Data Find Pr bm Sais Bea Dem merde qeu Demaj G Ro raD Hola ewe j TE TIT Dre B Baws Oe
138. iod Conditional Conditional Conditional Start Pos a 0 0 0 a n a 0 n cOcococdcocdc uococococococcocoococcoccssd cOcococdcocoococococcococococoococosccsscd coccococococ o um coccoccococos oo on e e e e e e e o e iN Fig 3 136 The Numbers of Data Qualified by Condition Parameter Warning Parameter x M Activate Warning Setting Min Max Iv ious Iv ibus ni Frequency ok ni fiookHe Fig 3 137 Warning Parameter Set the conditions which will be marked to call users attention STAT VIEW i xj Channel Selection Calumn LEE Condition en ron era Fan Warning Parameter Refresh Statistics Filter m SA m SA m SA oa SAE m SAE m AE m AA m SAE m GAE o SAA m AE m AA m A m AA m SAA ma AE m GE a 3 m SA m SA m SA oa SA m S m SAA m AA m SAA m SAE m SAA ma SAE m AE m A m AA m SAA m AA m AE a 3 cjomBme mijco jojii ijojiojojoajjiio o 5 n 0 n n 0 n cOopoooocccsctrn e e e e e e e e e rrr Fig 3 138 The numbers of data qualified by warning conditions are printed in black otherwise in red T FMO7IAA PEELE i BR eB The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 3 4 Customize Interface Section 3 4 presents detailed instructions pertaining to how to modify the Waveform Display Mode how to modify the Ruler Mode how to modify the Waveform Height and how to modify the Correlated Setting P ZEROPLUS LAP
139. ip This function is mainly for the range control for the saved files after triggering According to the procedures of the range control users can start the save of data according to the requirement of its time and times to get the standard of data statistic status Trigger Froperty f X Trigger Content Trigger Delay Trigger Range Range Setting Time Sample 1 minute r Cancel Default Help Fig 4 16 Trigger Range 1 Trigger Range The default is not activated 2 There are Time Sample and Frequency Sample in the part of Range Setting the default is Time Sample The units of Time Sample are second minute hour and day The unit of Frequency Sample is times Users can set the value by themselves in the editor box FMO7IAA A BE ELS RH S PS 23 8 The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Task 3 Bus Trigger and Trigger Mark Setup Step1 Click icon or click Bus Trigger Setup and Trigger Mark from the Trigger on the Menu Bar The menu is shown as Fig 4 17 P Bus Trigger Setup Pod Channel Trigger Setup e Trigger Property I Trigger Mark Jy Pulse Width Trigger Module Option S Don t Care Peet High dL TC Rising Edge A Falling Edge Erther Edge Reset Fig 4 17 Trigger Menu Step2 Bus Trigger Setup 1 BusTrigger Setup Bus Trigger X Bus Mame Bus Data Format Binary C D
140. irmation bit following every data transmission segment Data The actual signal data transmitted by byte Stop This appears when SCL High and SDA Low bit only 121 FMO7IAA E PHRSR E The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 4 5 2 1 Software Basic Setup of Protocol Analyzer I2C Step1 Set up RAM Size Frequency Trigger Level and Trigger Position as described in Section 4 1 Step2 Set up the Falling Edge as the trigger condition on the signal which connects to the tested I2C data pin SDA Step3 Group the analytic channels into Bus1 Buss Signal Trigger Filter T Ky An n xl PAP d LI Sampling Setup pee E wi Channels Setup E HUP Bus Prenierty Analog waveform k E F Reverse Bus Signal Trigger Filter Group into Bus Ungroup From Bus Chu Add channel KA Copy Channel Delete Channel Delete Al channels dem we Restore Default channels E ee Format Row k Rename Fig4 65 Group into Bus Step4 Select Bus 1 then press Right Key on the mouse to list the menu Next click Bus Property or click Tools and the select Bus Property or click to open Bus Property dialog box Trigger Filter EE Sampling Setup B Channels Setup Bus Signal Bus Property x Analog Waveform we 4 A Reverse Bus Setting ans a A Group into Bus Gtr G C Bus Ungr
141. is set as 3us Don t care data bit is activated 3 515us is bigger than 3 155us is bigger than Idling That is the Data s Timestamp is packet s Tinestaap idling time s0 the nest time however the data s end of the informat ion hr d utum to the packet sisth bit so the data is not E rising edge is the timestamp of data accord with the virtual condition ofSPI ss the packet end 2 maA gt K ji ULL s UU 1v il ATA s it ife Flu o os t Packet Length Fig4 91 Packet Length Packet Length From Packet s TimeStamp Data to next Packet s TimeStamp Data Packet Idling Length It is O The End dot is Unknown Unknow is registered ata s Timest aap is Packet s Unknow_End_Flag Timestamp DATA 56 m m aaa em Packet Length I Fig4 92 Packet Length Packet Length From Packet s TimeStamp Data to next Packet s TimeStamp Data Packet Idling Length It is 0 137 FMO7IAA gt FERRARS RAE The Zeroplus Logic Analyzer ee Zeroplus Technology Co Ltd User s Manual V3 10 4 5 5 1 WIRE Analysis Preface To increase the Protocol Analyzer feature in order to analyze the Protocol Analyzer 1 WIRE transmission protocol data Using LA analysis function the required serial data can be converted and presented in the form of Bus Therefore the software needs to add a dialog box so as to set up a Protocol Analyzer 1 WIRE dialog box 1 WIRE In
142. istration to us A customer representative will be happy to assist you How do register the protocol analyzer and buy protocols Every product is assigned and engraved with a unique serial number please print your S N number window as an example attachment and send it to our distributor or ZEROPLUS head office According to your S N we will provide passwords for your protocol registration FMO7IAA O PREP i Bee The Zeroplus Logic Analyzer TIO1 TIO2 TIO3 TIOA TIO5 TI06 TIO7 TIOS TIO9 TI10 TI11 196 Zeroplus Technology Co RI User s Manual V3 10 6 4 Technical Information What is the Logic Analyzer The Logic Analyzer is a tool that sieves out and shows the digital signal from test equipment by using a clock pulse The Logic Analyzer is like a digital oscilloscope However it only shows two voltage states the logic status 1 and O differing from many voltage levels of an oscilloscope The Analyzer has more channels than an oscilloscope to analyze the waveform Since the Logic Analyzers obtains only signals 1 and 0 its sampling frequency is slower than an oscilloscope which needs many voltage ranks Moreover the Logic Analyzer can receive many signals during a test How does the Logic Analyzer operate The Logic Analyzer reserves trigger requirement setting for users and uses them on the test equipment for the value of the sampling signals and puts them into the internal memory The s
143. ite Fig 3 77 Color Setting See Section 3 6 for detailed instructions Bus Property x mBus Setting C Bus Activate the Latch Function AQ Rising Edge Protocol Analyzer Setting See Section 4 5 for detailed instructions 56 Protocol Analyzer Parameters Config s ZEROPLUS LA CAN 2 08 MODULE V1 32 00 CNO1 ZEROPLUS LA I2C EEPROM 24LC561 24LC562 MODULE V1 00 00 CMO01 ZEROPLUS LA I2C MODULE 2 01 03 ZEROPLUS LA LG4572 MODULE V1 00 00 CN03 ZEROPLUS LA PECI MODULE V1 11 00 CMO1 ZEROPLUS LA PT2262 PT2272 MODULE V1 00 00 CNO1 ZEROPLUS LA S2CwireJAS2Cwire MODULE v1 00 00 CMO1 ZEROPLUS LA SPI MODULE V1 11 03 C ZEROPLUS LA UART MODULE V2 13 00 CNO01 gt SOIC A 1704 4 RASS IT d ZA eon v Use the DsDp Find More Protocol Analyzer Fig 3 78 Bus Property Bus Activate the function of analyzing the Bus Color Configuration Open the Color Configuration dialog box to set the conditions for the Bus Activate the Latch Function Activate the latch function Protocol Analyzer Activate the function of analyzing the Protocol Analyzer Use the DsDp Use the Ds and Dp to help analyze the Protocol Analyzer Find Find the desired Protocol Analyzer module Users can input the Protocol Analyzer name to quickly find the Protocol Analyzer module from many Protocol Analyzers After inputting the first character of the name in the Find b
144. ithin the Waveform Display Area especially when running the program in demo mode What s wrong with it Your machine may have a memory management problem with either your physical RAM onboard or the RAM on your video card Turn off any other multimedia of graphic programs and then re run the software If this does not work restart your system This should temporarily fix the problem However we highly recommend terminating all irrelevant programs while working with the Logic Analyzer Try not to burn DVDs not listen to music or watch movies while working with the Logic Analyzer The default color setting of the Waveform Display Area is very cool but don t see anything when print my work out with my black and white laser printer What can I do Refer to Section 3 6 it should have clear understandable instructions about changing the color of the user interface See Fig 3 153 this color setting should give a clear view of the Waveform Display Area even with an old black and white laser printer FMO7IAA C O PHARD Bee The Zeroplus Logic Analyzer aeroplus Technology Co E User s Manual V3 10 5 3 Hardware Troubleshooting Q1 Why are no lights on when I hook the USB cable to the Logic Analyzer A Double check whether the other end is properly connected to your PC There may also be a defect in your USB cable Try another cable Q2 Why can t I read any signals from my Logic Analyzer A Check whether you have correctly connected th
145. ition r Trigger Delay Clock eS 10 in 1 Max a Min 1 Max 15553251 B3 B3 D g B4 B4 x Hoe When more than one trigger pages are selected the trigger bar disappears from the view g B5 55 x s B5 EG 5 Cancel Default Help Fig 4 10 Trigger Page and Screen 1 C ZEROPLUS LAP C 32128 Standard V3 10 CN02 S N 00000000001 LaDoci 1 I loj x le Bus Signal Trigger Run Stop Data Tools Window Help 2 8 x Dc 8 ESSE b 2 v ie ih 00MH v ow ow 1096 v e 4 Page 5 Cout 5 gt eere RL RE 0 0346791 6 Rz Be B T BE Ie o o Height 38 miggerDeley 1 _ Scale 2883 584 Display Pos 568854 A Pos 512190 7 A T v A B 30 v Total 131072 Display Range 511182 640946 B Pos 512220 v B T v Compr Rate No H a Bus Signal Trigger Filter T 82 92553332 540017 84 554435 76 55885368 583271 6 597689 612107 44 526525 36 640943 28 EE UE Le arn Lo GAZ AB i Trigger Content Trigger Delay Trigger Range 3 A3 l MA iaae Pane Delay Time and Clock CUM Trigger Page p Delay Time i 5 Uris 1 2 g 6 AB Min 1 Max 128 Min 10ns Max 166 59251ms E AA ae rigger Position Trigger Delay Clock H g BOBO T i 10 Ru BT Bj Min 1 Max 16659251 a 5 T Pos 0 Start Pos 511182 End Pos 642254 ber 7 B3 83 i Note When more
146. l key IF vou ordered software or have questions about ordering software please Fallow the appropriate instructions below Our sales team will respond to your enquiry as soon as possible gt gt By phone B56 2 66202225 gt gt Applications through Email service 2 zeroplus com tw gt gt Website http iia 2eroplus con Ew Copyright C 1997 2010 ZEROPLUS TECHNOLOGY CO LTD cna Bus Trigger f X Bus Trigger Protocol Analyzer Trigger M Allow Protocol Analyzer Trigger Protocol Analyzer Protocol Packet Value Bus ELM Data Format t Binary C Decimal Decimal signed f Hexadecimal Cancel Default Help Fig 4 19 2 After Registering Allow Protocol Analyzer Trigger When it is selected the Protocol Analyzer Trigger function is activated And then users can set Protocol Analyzer Protocol Packet Value and Data Format Protocol Analyzer It only displays the name of Protocol Analyzer and only one name can be selected Protocol Packet It is displayed according to the packet in every protocol analyzer Value The value needs to be entered in the frame and the data mode can be selected by users according to their requirements the default is Hexadecimal When a value can be input in the selected protocol analyzer data the frame can be enabled Or the frame will be disabled For example Protocol Analyzer I2C when the protocol packet is DATA the frame can be used to the contrary when
147. lay Signals in Listing Window Help in Waveform Display Listing Display Hot Mews Window Navigator me Memory Analyzer ia Bus Packet List Statistics Window Cascade Horizontal Vertical Screen Display w 1 Laboci 1 2 Labacl 2 25KHz Turn Gn re Mews Activity w Production News 200us l Fig 3 88 Hot News Window and the Pull down Menu ald LES a nif 2 Ogg ee ee eS Ff kem B cw 3 musuomm je fee See be Aa foe Siten im A Ta TERTKHg Apo bee TOEN Deita Fikri Tra 1 dires Pre pea B Teliernee Chee Bats hin ee Fe ee A EF JUUULUUUUUUUUUULI JUL LI al ra j d umo m 5 i m r lu d F RR 1 f L F eal Fu ard FI E ET P c E E Ir af el afal s barh be eed Fig 3 89 Display Hot News Window on the Software Interface Fig 3 90 Running Text Ads Interface FMO7IAA 62 AP RE ESAS i ARAE Zeroplus Technology Co Ltd EHE Havi gator Tip The Navigator Window is displayed under the waveform display area when activating the Logic Analyzer The Navigator displays the waveform length of all the captured data it only can display the waveform of the data of four channels In the Navigator Window users can click the Left Key of the mouse to select the waveform randomly The selected waveform keeps pace with the waveform in the waveform display area Th
148. le in this version SW12 Why is the text display covered by other text or outside the display width A At this stage our software interface program has missing code for multilingual support You will have to ensure your system default encoding is one of the following languages 1 any English Encoding en en XX 2 Traditional Chinese zh zh XX 3 Simplified Chinese zh zh CN in HZ GB2312 GB18030 Double check the language configuration in Regional and Language Options Ea QuickTime EE Documents fe 64 tkt Outlook VisualBoy a Regional and Language Options 3 Control Panel gt Sox Customize settings for the display of languages Search CJ Windows Security CA Schedlnumbers times and dates Network Connections gt i Help and Support a aa 4 Sounds and Audio Devices LS Printers and Faxes SY Speech ET Bun mil Taskbar and Start Menu FA Stored User Names and Passwords 2 Symantec LiveUpdate 3 System ul Taskbar and Start Menu 43 Windows Firewall Log Off king Fig 6 5 Windows Regional and Language Options 192 FMO7IAA PREAH ih Bike Bl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 SW13 Is there a Reset that restores the default color settings for signal output waveforms in the Position Signal Display Area A Yes there is Click Tools from the menu bar and select Color Setting click Defaults However this rest
149. lected the Double Mode The Filter Delay Note The external Setup and the Display Bar Setup are not available under E Don t show me this warning again m Sampling OK RAM Size RAM Size 256k Channel number will be limited to 16 Apply OK Cancel Restore Defaults Help Fig 4 3 RAM Size Tips 1 The Double Mode is available for the LAP C 16128 LAP C 162000 LAP C 32128 LAP C 321000 LAP C 322000 Modules and it is not available for the LAP C 16032 LAP C 16064 Modules 2 The relationship between RAM Size Signal Filter Mode Compression Mode and Channels as shown in Table 4 1 and Fig 4 3 Table 4 1 RAM Size vs Signal Filter Mode and RAM Size vs Compression Mode and Channels Normal Mode Double Mode RAM Compression RAM Compression Model No ezel Channels Mode amp Size Channels Mode amp Channels Available Signal Filter Pane Available Signal Filter Mode Mode LAP C 16032 2K 32K _ 16 Available channels LAP C 16064 2K 64k 16 Available channels 2K 16 16 LAP C 16128 128K Tame Available 256K danek Disable LAP C 162000 2K 2M 16 Available AM 16 Disable channels channels 2K 32 16 LAP C 32128 128K aiek Available 256K T MOT Disable 32 16 LAP C 321000 2K 1M Available 2M Disable channels channels 32 16 LAP C 322000 2K 2M Available 4M Disable channels channels FMO7IAA ZPBEELHBERE B PR 2 8l The Zeroplus Logic Analyzer Zeroplus Tec
150. llow engineers to observe timing sequence information directly from the screens of oscilloscopes this Logic Analyzer was created to help engineers resolve timing sequence issues during their circuit development I2C has a multi control Bus as its physical and firmware interfaces This protocol analyzer is basically a signal network that may connect to one or several control units The intention of inventing this protocol was in the application of designing television sets which allowed the central processing unit to quicken data communications with peripheral chips and devices The I2C interface is initiated with a SDA triggered High and SCL triggered Falling Edge Following the initiation there will be a set of 7 bits or 10 bits address space Beyond this point there will be Read Write ACK Acknowledgement and STOP or HALT HLT The signal information packet is transmitted in bytes If there are two or more devices trying to access the I2C protocol whichever device has SCL at logic high will gain access priority Furthermore since I2C is a synchronous communication protocol and data transmission must be in bytes a complete I2C signal packet must consist of Start Address Read Write Data ACK NACK and Stop segments They are as following Start This is the initiation of SCL and SDA 1 bit only Address This identifies the device address 7 bits Read Write This is a data direction bit O Write 1 Read ACK NACK This is a conf
151. lus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Trigger Property B xj Trigger Content Trigger Delay tri Eger Range Trigger Page C Delay Time and Clock Trigger Delay Time 100ns Min 100ns Max 1 671s Trigger Delay Clock m Win 1 Max 16711679 T Pos 0 Start Pos 65535 End Pos 65537 Note When more than one trigger pages are selected the trigger bar disappears from the view Cancel Default Help Fig 4 9 Trigger Page Ee ZEROPLUS LAP C 32128 Standard 3 10 CNO2 S N 00000000001 LaDoci 1 E o xl o Fie Bus Signal Trigger Run Stop Data Tools Window Help 81 x D c amp itt wy Ws eT bb 128K gt sie 14i 100MHz v an Tn 10 J Page fi Count s E E EJ ER 2 RE Gd GE 0 0346791 X R ae Oe B Te E PA e i Height fso TriggerDelay _1 8cale 2883 584 Display Pos 44566 APos 12098 A T 12098 v A B 30 7 Total 131072 Display Range 13106 116658 BPos 12058 B T 12068 7 Compr Rate No ET Trigger Filter T Pos D Start Pos 13106 End Pos 117966 5d Trigger Content Trigger Delay Trigger Range ESI S Trager Pane C Delay Time and Clock 2s Trigger Page m Trigger Delay Time x 4 1 10ns Min 1 Maxc1 28 Min TOns Max 166 59251ms SZ Trigger Pos
152. lyzer will connect to the Zeroplus server for software updates if an internet connection is available 5 Unwanted signals can be filtered out using the Signal Filter or Filter Delay functions When measuring for a long period Compression makes memory more efficient 7 Trigger condition depends on the testing board If triggering does not work well try to narrow the trigger conditions and optimize them repeatedly 8 Ifa testing board has a lower frequency than Logic Analyzer sample signals according to the external clock 9 When sampling from an external clock filter extra signals with the Signal Filter function 10 Unused channels may be removed from the Bus Signal display using Bus Signal Menu gt Channels Setup 20 FMO7IAA C O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 3 User Interface 21 3 1 3 2 3 3 3 4 3 5 3 6 3 7 Menu amp Tool Bars Find Data Value otatistics Feature Customize Interface Auto Save Color Setting The Flow of Software Operation FMO7IAA O PRARRRARE The Zeroplus Logic Analyzer Zeroplus Technology Co in User s Manual V3 10 Objective Chapter 3 presents detailed information on the Logic Analyzer software interface in four sections Menu Bar Tool Bar Statistical Function and Interface Customization Basic Layout The layout of the Logic Analyzer software interface can be divided into nine sections as shown in the following
153. m Change the color of the Buses or signals on the waveform area Color Setting X Workaround Waveform Mame C Relating Linewidth i LLLLEEEELLLEEE Cancel Default Help Fig 3 155 Waveform Color Interface Waveform The channel color can be varied by users Linewidth The linewidth can be adjusted by the users requirements there are three options which are 1pixel 2 pixel and 3 pixel 86 FMO7IAA Phe eee DS PEZ a The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 3 6 1 Modify Workaround Color To modify the workaround color click the color block shown in Fig 3 154 A Color panel shown in Fig 3 156 will appear Select a color shown on the panel or click on Define Custom Colors to create the desired color CN 8x Basic colors NI INI eee EI CS See Define Custom Colors gt gt Hue jeo Red jo OF E nis Sak jo Green jo Define Gustom Colors gt gt Lum p Blue jo AmS E f pmi f E ie EEEa gl LK Cancel Add to Custom Colors Fig 3 156 Color Panel with Its Advanced View Custom colors LES 83 8 BN LES 8 ip 8 B B 87 FMO7IAA PREM RE UB PR 2 8l The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 3 6 2 Modify Waveform Color Foreground color refers to the color of the output signal lines in the Waveform Display Area Fig3 157 presents how to change colors of a signal or some signals Repeat the foll
154. marks a pod When searching for or obtaining data the A and B labels can be set in any location Using the order of these markings you can return quickly to the desired position to analyze data This can also be a point to measure the interval between A B A T or B T What is a Trigger Gripper A gripper is the gathering point to collect the Logic Analyzer channels When a cable connector is not suitable for the test device a trigger gripper may be an alternative for connection What is a Channel The channel is the collection line of the input signal Each channel is responsible for linking the pin of the measured device Every channel is used to collect signals from the test equipment How can I display acquisition in the waveform captured by external sampling signal Select Waveform Display from the Window list What is an External Trigger An external trigger is a signal outside the Logic Analyzer It is used for the simultaneous test of 2 test tools For example one Logic Analyzer can be started by one signal from another test tool Or when it is triggered it can output one signal to another test tool The Logic Analyzer is often used for triggering an oscilloscope Why does Double Mode not coincide with Filter Delay In order to set out the perfect waveform from the Logic Analyzer and achieve optimal memory efficiency you can use the Signal Filter when using Double Mode the system doesn t support the function of Filter Delay
155. mats for the List Data Mode are All Data Sampling Changed Dot Compression and Data Changed Dot Compression All Data It is the present display mode Sampling Changed Dot Compression Take the sampling changed dot as the compression data reference dot Data Changed Dot Compression Take the present data change dot as the compression data reference dot mop m ur ea c vU Luc j Tio the Next Edge Go To The Zeroplus Logic Analyzer pe User s Manual V3 10 AddBar Alt A J T T T I D T 1 D 1 s Delete Bar Alt B olololololoaoflolfloaloa 0o o0 0 0 0 0 0 0 0 a Zoom E D D D 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 y Hand H 0 0 0 0 0 0 0 0 0 R Normal EM 20 02 2 2 12 12 0 2 E 0 0 0 0 0 0 0 00 TR Zoom In F3 ololololololololo K zoom Out F8 0 0 0 0 0 0 0 0 0 d 0 0 0 0 0 0 0 0 0 EE Show all Data Fig 0 0 0 0 0 0 0 00 x Previous zoom Gritz 7 Data Format Waveform Mode id i d n i n n n n n n n n 0 List Data Mode v AllData 0 OMITITITITIUTUTU al 4 1 1 1 olola Sampling Changed Dot Compression i AET e a a e a E a Data Changed Dot Compression 0 0 01 1 1 0 00 0 ITDA 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1101 1 0 0 0 0 0 0 0 0 0 0 0 0 1101011 1 0 0 01 0 01 01 0 01 01 01 01 0 Fig 3 70 List Data Mode All Data Sampling Changed Dot Compression and Data Changed Dot Compression FMO7IAA cOoOocoocooocococococococcojbocooococococ
156. mestamp and end of the packet which are Unknow Start Flag and Unknow End Flag This Data Start is regarded as Packet Timestamp This Unknow register is Unknow_End Flag 12C a eec cem Kp SpA ALU UL ou SCL l Packet Length Fig4 44 Protocol Analyzer I2C Packet Length Tip Because I2C has started as the Packet TimeStamp it does not need to use Unknow Start Flag as the start 4 Bus 112 FMO7IAA i PHRSR E The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 BUS Packet List xj Refresh Export Synch Parameter Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Busi us 1023 o 1 o 1 o 0 Packet Name Timestamp Data Data Data Data Data Data Data Data Data Data Length 2 BusiBus 1013 Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data 3 3 _ Busi us 1003 J o 1 Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length o 1 o 1 o 1 o Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length 5 i o 1 O 1 Packet Name Timestamp Data Data Data Data Data Data Data Data Data Data Length 6__ Busi us 973 i o j 1 j o 1 j Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data 7 1 0 1 0 1 Fig
157. mpression Function simultaneously A Yes you can SW04 When should I use the Bar function A This function allows you to highlight a segment of a waveform so that you can have a closer view Depending on the configuration of Waveform Display Mode under Tools Customize a more accurate numeric value of sampling site time or frequency difference will be calculated and displayed as shown in Fig 6 7 4 Pos O7Ous 4 T 69 s46us hs 4 B 19 8460 BPos b us B T 50uz Compr Rate 1 000 Fig 6 1 Bar Function SW05 Can triggers be differentiated in Pre Trigger and Post Trigger A Yes they can SWO6 Are all setup parameters and configurations saved as save my work A Yes everything in your work space except signal graph will be saved SW07 If have the wheel feature with my mouse or other pointing devices may adjust the waveform display zoom in the Waveform Display Mode by scrolling A This feature has been enhanced since V1 03 If your program version is prior to this version visit our website for the latest update at http www zeroplus com tw logic analyzer en technical support php SWO8 What are the extremes for Delay Time and Clock amp Trigger Delay Clock A The interface will inform you of the interval you may use However it varies from case to case depending on your test devices See Fig 6 2 Trigger Delay Time ons Min Sns Max 83 881mszJ Trigger Delay Clock E
158. nlight precipitation and wind but neither temperature nor humidity is controlled Storage Relative Humidity 80 Environment Temperature 0 50 Degrees C Conclusion After reading this section users should have a basic grasp of the Logic Analyzer A complete understanding of the section Device Maintenance and Safety is a critical prerequisite of any further operation as presented in the User Manual 14 FMO7IAA C O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 2 Installation 2 1 Software Installation 2 2 Hardware Installation 2 3 Tips and Advice 15 FMO7IAA C O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co b User s Manual V3 10 Objective This chapter describes the installation of the Logic Analyzer hardware and software Software installation steps must be followed precisely to ensure successful installation 2 1 Software Installation In this section users will learn how to install the software interface and drivers As with proper installation of many USB devices the Logic Analyzer application and driver software must be installed prior to the connection of the hardware The following steps illustrate an installation of a Zeroplus LAP C Logic Analyzer The other six models mentioned in Chapter 1 would follow identical procedures Step 1 Insert the driver CD ROM in the PC CD drive Step 2 Execute the installation program Go to the START menu
159. nnne nnns 178 4 12 Multi stacked Logic Analyzer SettingS cccccccccssseeccesececceeseecseseecceececseueeesseuseeseeeesseueeesseseeessaeees 182 4 12 1 Basic Software Setup of Multi stacked Logic Analyzer SettingS c cccccccseeeeeseeeeeseeeeesseeeeesaees 182 TEOUDICSHOOQUING emt 184 5 1 Installation Troubleshooting MEET omm 185 52 SOMware MOuUDICSHOOUNG NER A EAE E EAEE TA EEEE AA 186 5 3 Hardware 1VOUDISSMOOUNG MR T 187 z om M 188 O FON E crcTTc M 189 OE ON e E E E E E E E E E E 191 255 Ror AOU NR m 195 64 Technical MTOR AOI sxe cee sit tate tener ae eg a Ste cer ae sn oS mE TTE 196 MS c 197 PISCE dee 198 eM POLN OY Seea a a a E E E 199 CONAC a E T ere errr 202 FM0714A C O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 Preface This Quick Start Guide is designed to help new and intermediate users navigate and perform common tasks with the Zeroplus Logic Analyzer Despite its simple packaging and interface the Logic Analyzer is a sophisticated measurement and analysis tool It is also a highly sensitive electrical current sensin
160. o confirm it 2 Go to the relative channels as shown in the example and go to numbers O 1 2 3 which are located on column A and row Bus1 Click them to become purple then set these segments of channels 3 Click OK to get the result as shown in area 1 104 FMO7IAA Phe eee DS PR a The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Trigger Filter Bus Signal Ok Cancel Help Fig 4 29 Channels Setup Window Tip Channels Setup In the dialog box of Channels Setup there isn t only Add Bus Signal but also Delete Bus Signal Delete All Restore Defaults provided 1 Delete Bus Signal Firstly highlight the Bus or channels on area 6 of Fig 4 29 then click Delete Bus Signal to delete them 2 Delete All Click Delete All to delete all Bus signals on area 6 of Fig 4 29 3 Restore Defaults Click Restore Defaults to restore the dialog box of Channels Setup as shown in Fig 4 27 Step3 Trigger Condition Setup 1 Highlight the Bus which will be triggered then click icon or select Bus Trigger Setup from the Trigger of the Menu Bar the dialog box as shown in Fig 4 30 will appear Bus Trigger x Bus Mame Bus Data Format C Binary C Decimal Decimal signed Hexadecimal C ASCII Cancel Default Help Fig 4 30 Bus Trigger Setup Tip Left click on Trigger column of the Bus as shown in Fig 4 31 Single Click on the Left Key
161. o set the relative parameters for the List Window of the Memory Analyzer see the following Option dialog box xi Bar Assignment Reaction Bar Ja Active Display Assignment Display Width A Datat A Alteration ab 1 Cancel Default Fig4 166 Option Dialog Box FMO7IAA PREAMP Bike Bl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Reaction Bar The default is the A Bar the added Bar can be displayed and selected in the pull down menu if users have added a new Bar The data position of the Reaction Bar will be displayed in the List Window of the Memory Analyzer Note The Ds Dp Bar and T Bar can t be displayed in the pull down menu Display Width It is used to set the display width of the List Window of the Memory Analyzer the default is 16 Users can select the 4 8 16 and 32 from the pull down menu and they also can input a value between 1 and 100 Color Users can vary the color of Addr Data R Data W and Alteration as their requirements The default color of the Addr is black the default color of the Data R is blue the default color of the Data W is red and the default color of the Alteration is gray Import Export and The Export function can select the TXT or EXCEL format to store the Data of the List Window of the Memory Analyzer the Import function also can select the TXT or EXCEL formats to analyze the former export data
162. ocococococccdoccocIr 53 SRAHIRRBRAA The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Tool Is Fig 3 71 Tools Menu ShowTime Height on Fig 3 72 Show Time Height Tool Box FMO7IAA D gt RARERHARAA The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Menu Bar Tools o4 Menu Item Detail Menu amp Dialog Box Customize Fig 3 73 Customize Dialog box See Section 3 4 for detailed instructions Customize MD ata Contrast Screen Display Fig 3 74 Toolbars Setting FMO7IAA 5 gt RERERGBESA The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Customize Capture Window Close Delete Bar Fig 3 75 Shortcut Key Setting Customize DWeduNADAs 00000 ous BW m e Fig 3 76 Auto Save Setting See Section 3 5 for detailed instructions 55 FM0714A _ TREES HO SIRZS Zeroplus Technology Co Ltd Color Setting BUS Hi Bus Property The Zeroplus Logic Analyzer User s Manual V3 10 Cotor Setting oo MU Workaround Waveform Name IT T eat aveform Background LI ist Background 1 LI 1st Background 2 E E E a LI E LI L L E Smari OTT s altered i fo fof of Vv corresponding color iautomatically changes iaccording to the Iv When being printed the background is wh
163. oftware of the Logic Analyzer will read out the value from the memory and switch it to the waveform or status shown for users analysis What is the asynchronous Timing Mode Since the sampling clock and tested objects are not directly related to each other and the former won t be controlled by the latter the sampling clock and the tested signals will not be done at the same time We call this Timing Mode which means that in the same time interval you can get sampling data from the test equipment at one time such as every 10 seconds The internal clock the Logic Analyzer s inner confirmed one is often for sampling in Timing Mode as is the logic waveform What is the synchronous State Mode Because the sampling clock and measured object can be directly related and are controlled by the latter signals of the former and the latter can proceed simultaneously We call this State Mode In this mode the measured object provides the sampling clock State Mode is when the Logic Analyzer can obtain sampling data from the test equipment synchronously In other words when the test equipment has a signal or signal group this is the time to get the signal For example while the test equipment is sending out one rising edge the Logic Analyzer can start to obtain one signal What are A bar B bar and T bar The T bar A bar and B bar are labels T is the trigger label which cannot be removed when the waveform or the state is displayed which
164. ogic Analyzer as the figure below REED FEPEFEREPEPEPEPE EEE EALEEP LILLE LP LEP Bus Signal Trigger Filter a Li 1 1 iD Wi 28 jji i I KU 2 n2 Fig4 149 Tested Signal STEP 3 Filter waveforms that are not bigger than 5 clocks x Moise Filter None ms Noise Filter 0X Noise Filter SETMEM 127 Ok Cancel Fig4 150 The condition of Noise Filter is 5clock 171 FMO7IAA PHRSR E The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 STEP 4 After filtering the waveforms that are not bigger than 5 clocks are deleted a E 7 10 5 gi 5 10 15 20 T Hn D fn 1 I 1 LU 1 1 Lu Lu Lu 1 1 1 1 Lu I I LU 1 1 Lu Lu 1 1 1 I I I 1 2048 Fig4 151 Waveforms after Filtering Bus Signal Trigger Filter STEP 5 Reserve the original waveform open the Noise Filter window and then select None the waveform will be restored x Moise Filter None TTTTTTTTITTITTTIITITTTITITIIIILIIIIILIIIIIIIIIIIIM Fig4 152 Restore the Waveform 172 FMO7IAA O PRARRRARE The Zeroplus Logic Analyzer Zeroplus Technology Co in User s Manual V3 10 4 9 Data Contrast In order to make users analyze the Data and contrast the difference of Data easily there are adding the function of Data Contrast The function of Data Contrast is used to compare the difference of two signal files of the same type
165. ogy Co Ltd User s Manual V3 10 Step4 Choose the position to start the search by selecting one of the following Start At Ds T A B C etc End At Dp A B C etc Then click Next or Previous to search it When Found Choose a Bar to mark the result A B C etc Step5 Click Statistics to show the number of instances of the search results Note It is available only when searching through a Bus Seale 0 25 Display Pos 823 A Pos 823 Ro Tess Total 2046 Display Range 8279 815 B Fos 15 id is is DEE s va TERI 824 s LEN RN 5 al Te x z P Core Y xs oxa ons ore Yoxr ard ore Y aa y or i B P avefore Find Activate the Function of Chain Data Find Bus Signal Mame Mex Previous Close Min Max Value zu FRFFFFFF Statistics Fig 3 128 The A bar is placed at the 0X08 of Bus1 where the condition of the Waveform Find is set The Statistic of Waveform Find shows a 128 Scale 0 25 Display Fos 662 A Pos 662 T 662 Total 2048 Display Range B88 654 B Fos 15 T B T 715 E JAETISZ Find IT Activate Ehe Function of Chain Data Find Busj5Signal Mame E_ usi Next Previous Close Start At End At When Found Arouet bs r Dp E Bus Item Min am Max Value Address 662 Fig 3 129 The A bar is placed at the OX6A of Bus1 where the condition of the Waveform Find is set FMO7IAA PRE eh DS PR The Zer
166. om the view eae Be Te to BB le gt Bar Bar Bar Bar Bar Display Pos 65535 APos 1008 v A T 1008 7 A B 30 v Display Range 0 131072 B Pos 1038 v B T 1038 7 Compr Rate No Scale 2883 584 Total 131072 a Page Page Start Page End Fig 4 13 Trigger Position O96 QM re Ar Be TW te Bar Bar Bar Bar Bar P le gt Display Pos 52429 APos 12098 A T 12098 v A B 30 v Display Range 13106 117966 BPos 12058 B T 12068 v 8cale 2883 584 Total 131072 p e Eu AO Fig 4 14 Trigger Position 10 FMO7IAA 98 3SPRETHSRBE SIR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 aDoci 1 o t File Bus Signal Trigger Runj Stop Data Tools Window Help lal Dc amp fai y BE qr e bb 128K v sie Du froomHz nw m 7096 Xe Page f Count s Amal ey 0 0346791 se fe Bo Te to Bb le of Height TriggerDelay 1 Scale 2883 584 Display Pos 26214 A Pos 90741 7 A T 90741 7 A B 30 7 Total 131072 Display Range 91749 39323 B Pos 90711 7 B T 90711 7 Compr Rate No TO 30 Fig 4 15 Trigger Position 70 Step6 Trigger Range Setup Click 48 icon or click Trigger Property from the Trigger on the Menu Bar Then Click the Trigger Range the dialog box will appear as shown in Fig4 16 T
167. on as described in Section 4 1 Step2 Group signals into a Bus Click Channels Setup on Bus Signal of the menu bar or click 4 icon The dialog box shown in Fig 4 27 will appear Bus Signal Trigger Run Stop Data diy Sampling Setup Channels Setup ey Signal Filt Channels Setup X Group int f 1 xd E 1 Delete Bus Signal Delete All Restore Defaults Unaroup Expand p BEBE SS DO DO DO DO Bo SESE DD D e e ES SESS SSS SESS ddr dd OA DE XC DE EC DE VE DE EC EC EE MC DE MC DE C DE AG AC AC DE DE DE Mu DE DE Format R Rename ADMD MM JJ LA 7 wp E ERES Su ES ER ma a a a na a ooo o o o o o Bs ma mal mala ma a ws cic c c c co c oc TO AGAR RA AA Jo 63 ww ew amp 3 eo mmrmmmmmm olelelelalelela Bassas nAraaaam d d b d d d f eru ers mogcgdgcdgccgccgc c v Reserve waveform data and show them Ok Cancel Help Fig 4 27 Channels Setup Rename the Bus and set up the channels of the Bus as shown in Fig 4 28 VS D mmm mus BB BEEG BE E im ME Ln c f l Fig 4 28 Rename Bus 1 Click the column with blue then type the given name of the Bus and then press Enter t
168. onds to your hardware and MS Windows version Visit our website for the latest updated or debugged software If you are running this program on a virtual machine the virtual machine may not support the amount of hardware addressing In this case try it with a machine that is physically running a Windows system 185 FMO7IAA C O PRE eh DS PRX The Zeroplus Logic Analyzer Q1 A Q2 Q3 QA 186 Zeroplus Technology Co RI User s Manual V3 10 5 2 Software Troubleshooting Can I run the program even if don t have the Logic Analyzer hardware Yes you can You can run the program under the demo mode See Fig5 1 ZEROPLUS Logic Analyrer X Hardware Searching Failed y Fig 5 1 Select Run Demo if you do not have the actual hardware am running a graphing program and software at the same time Whenever try to make a screenshot of my work it keeps telling me that have insufficient memory space what is wrong A few users have reported similar problems We are not certain what causes it or how to fix it However we have found that if there is a defective address within 128 MB to 512 MB in your physical memory your software might signal End of memory Thus the program will warn you about insufficient memory Test your memory with a varied memory testing program Or take a screenshot close the program paste it to the graphing program and re open the program A part of the background picture remains w
169. oplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Scale 5 6539625 Display Fos 0 A Pos 104 A T 104 Total 32768 Display Range 141 143 B Foz a jl 113 T3 84 509 56 54 nani LI I 56 54 a4 803 28 2T I 8 2T i8 RRR CUTIE ALIVE Tn T B Tavefors Find Activate the Function of Chain Data Find Bus 5ignal Mame T Next Previous Close W FFFFFFFF BUS tem Find Min Value Max Value Start At End At When Found Ds Dp V Address 0 Fig 3 130 The B Bar is placed at the 0X12 of Data of Protocol Analyzer SPI where the condition of the Waveform Find is set FMO7IAA PREIS AG OLEI PR 2 8l The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 3 3 Statistics Feature Section 3 3 presents detailed information on the Statistics feature in the software interface The Statistics feature presents user information pertaining to nine periodicities Full Period Positive Period Negative Period Conditional Full Period Conditional Positive Period Conditional Negative Period Start Pos End Pos and Selected Data Click on the Statistics icon fi and an interface like Fig 3 131 or Fig 3 132 will appear E Channel Selection Selection Column LEE Condition emen Warning scl Refresh Statistics Filter n 0 0 u n n 0 n n n 0 m JA
170. ores everything in this window You must make a further adjustment if the color setting is the only thing you want to restore See Fig 6 6 Totor Setting x Wor kar ound taveforn aveform Background List Background 1 List Background 2 Pus Text List Text ime Text Bus Error Bus Error Text a m a nm LEE LEE After the background 1s altered corresponding color automatically changes according to the contrast ratio I When being printed the background is white Fig 6 6 Restore Color Defaults SW14 Can I change the displayed waveform mode A Yes you can There are two ways to do this First go through Data gt Waveform Mode and choose a waveform See Fig 6 7 I Select an Analytic Range m Noise Filter Ber Bus Width Filter w Data Contrast B Find Data value Ctrl F EA Find Pulse Width l To the Previous Edge Fil f To the Next Edge Flz io To add Bar Alt A z Delete Bar Alt B Fe Zoom E h Hand H R Normal ESCAPE R Zoom In FS E Zoom Qut F8 Eal Show all Data F10 x Previous Zoom Ttr Data Format k dv Square waveform List Data Made b Sawtooth Waveform Fig 6 7 Waveform Mode The second alternative is to right click any place in the Waveform Display Area Then a menu will pop up Click Waveform Mode and choose a waveform See Fig 6 8 193 FM0714A PREM HABE The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s M
171. ory 512K Bits 1M Bits 4M Bits 64M Bits 4M Bits 32M Bits 64M Bits Bits Memory Memory Depth Per 32K Bits 64K Bits 128K Bits 2M Bits 128K Bits 1M Bits 2M Bits Channel Trigger 16 Channels 32 Channels Channel Trigger Pattern Edge Condition Trigger Pre Trigger Post posee Ls Leve Trigger Count Count 1 765535 Threshold _6V 6V Protocol Free T Free T LED Operating Interface Chinese Si Chinese Tr English Language Time Base 5ps 10M Vertical 1 5 5 Sizing am s Me e MM nae 10 FMO7IAA C REA RR D TS PR 2x 8l The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Width Yes Function Display Trigger Page 1 8192Page Trigger ZALEN No Yes No Yes Function me ode No Yes Analyzer Settings Protocol Trigger Safety Certification FCC CE WEEE RoHS 11 FMO7IAA O PREP hei Bee The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 1 4 System Requirements This section discusses basic operating system and hardware requirements for the Logic Analyzer Software and hardware capabilities may vary depending on PC configuration This manual assumes proper installation of a supported operating system as listed below 1 4 4 Operating System Requirements e Windows 2000 e Windows NT 4 0 Workstation amp Server Professional Server Family Service Pack 6 e Windows XP e Windows Server 2003 Operating System
172. oup From Bus Ctrl U Activate the Latch Function Al v cA Add Channel Rising Edge m r Gopy Ghannel A i Protocol Analyzer Setting Delete channel s Delete All Channels A Restore Default Channels Protocol Analyzer Parameters Config ZEROPLUS LA 1 WIRE MODULE 1 10 00 CNO1 C ZEROPLUS LA CAM 2 08 MODULE 1 32 00 CNO1 ZEROPLUS LA I2C EEPROM 24L0561 24LC562 MODULE v1 00 00 CNO1 ZEROPLUS LA I2C MODULE V2 02 00 CN01 ZEROPLUS LA LG4572 MODULE V1 00 00 CN03 C ZEROPLUS LA Low Pin Count MODULE V1 09 00 CNO01 ZEROPLUS LA MIL STD 1553 MODULE 1 00 00 CNO1 ZEROPLUS LA PECI MODULE V1 11 00 CNO1 ZEROPLUS LA PT2262 PT2272 MODULE 1 00 00 CNO1 gt PE I A CAT in IA OO eee BAADE 104 AO Os mR v Use the DsDp Find More Protocol Analyzer ats ae Format Row gt Rename m oe Fig4 66 Bus Property Step5 For Protocol Analyzer Setting select Protocol Analyzer Then choose ZEROPLUS LA I2C MODULE V2 02 00 CNO1 Next click Parameters Configuration The following image will appear 122 FMO7IAA i SRRHRPABRLA The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 x f Configuration Timing Packet Data Format Register Pin Assignment Data Mode Item Name Data Length Wecpo E Slave Add Address 7 bit scL A F Reg Addr Reg Addr E bit Data Das 8 bit
173. owing procedures if users need to change colors of many signals Step 2 Step 3 Step 1 Color Setting Workaround Waveform N M Name Tf Relatip Corf Linewidh AL 11 JAYTTTTTTTTTT Fig 3 157 Stepwise Illustration of Changing Waveform Colors Step 1 Select several Optional Items Step 2 Select the corresponding items in the relating Step 3 Choose a color by following the method shown in Fig 3 157 Step 4 Click OK to change their colors into the same for example A1 A2 A3 and A4 Here is a sample of an altered Logic Analyzer software interface which will be used for further demonstrations in subsequent chapters See Fig 3 158 88 FMO7IAA 89 Phe Aik BO D Es RAE Zeroplus Technology Co Ltd The Zeroplus Logic Analyzer User s Manual V3 10 fe ZEROPLUS LAP C 32128 Standard 3 10 CNO2 S N LaDoc2 EE UU UU LU UU UU LI Fendt EMO Fig 3 158 An Altered Interface Sample to Be Used in Subsequent Chapters FMO7IAA PEELE OS PIRE The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 3 7 The Flow of Software Operation RAM Size 128K se ih lt o wo Trigger Page Fue l Select Analysis Function Trigger Position 50 Hip Eh Trigger Count Activate Signal from Testing Fard UART Bus Annlvsis SPI Bus Annlvsts Tools to Annlvze Data Dd Mb te a Fal EH I oe SPI
174. ox of Bus Property dialog box the corresponding module will be displayed in the Protocol Analyzer list box according to the input character See the figure below FMO7IAA 57 AP RE ESAS i ARAE Zeroplus Technology Co Ltd ee Refresh Protocol Analyzer The Zeroplus Logic Analyzer User s Manual V3 10 Bus Property x Bus Setting C Bus Golor Config s Activate the Latch Function 40 Rising Edge Protocol Analyzer Setting Protocol Analyzer Parameters Config C ZEROPLUS LA CAN 2 08 MODULE V1 32 00 CNO1 c ZEROPLUS LA I2C EEPROM 24LC561 24LC562 MODULE V1 00 00 CNO1 ZEROPLUS LA I2C MODULE 2 01 03 c ZEROPLUS LA LG4572 MODULE V1 00 00 CN03 C ZEROPLUS LA PECI MODULE V1 11 00 CNO1 ZEROPLUS LA PT2262 PT2272 MODULE V1 00 00 CNO1 ZEROPLUS LA S2CwireJAS2Cwire MODULE v1 00 00 CMO1 ZEROPLUS LA SPI MODULE V1 11 03 C ZEROPLUS LA UART MODULE v2 13 00 CNO01 gt A TNT DIET A 4704 4 RAS dt c0 oO TNI S v Use the DsDp More Protocol Analyzer Fig 3 79 Find Editor Box When you input I in the Find editor box the Protocol Analyzer list displays all Protocol Analyzers with the initial character of I see the below picture Bus Property a xi Bus Setting Bus Color Config s Activate the Latch Function AD v Rising Edge Protocol Analyzer Setting Protocol Analyzer Parameters Config s ZEROPLUS LA I2C EEPROM 24LC56
175. ppens just begin to analyze Baud Rate 125000 Auto When CAM Data for expansion cambine Basic ID and ID Min 1bps Mas 10Mb Min 1 bps M ax Ps v The Del is displayd in the CRC Field Fig4 127 Protocol Analyzer CAN2 0B Configuration dialog box Set the CAN 2 0B Configuration dialog box 159 Pin Assignment Protocol Analyzer CAN 2 0B only needs one channel to decoding signals the default channel is AO Start Packet Format The Start Position can be divided into two formats 111 Bit Start the Start Position is that three bits are High and O Bit Start the Start Position is that one bit is Low Protocol Analyzer Property Percentage Sample The Percentage Sample should be entered in the position of the Baud Rate which is selected from the range between 25 and 75 and the default of the Baud Rate is 60 The resolution can be adjusted to 1 Baud Rate The Baud Rate can be set to Integer or selected from the pull down menu 10000 20000 40000 50000 80000 100000 125000 200000 250000 400000 500000 660000 800000 and 1000000 manually and the default is 125000 If the Auto is selected the Baud Rate can be calculated by the main program automatically and displayed on the CAN 2 0B dialog box Data Reverse Decoding If it is selected the data can be decoded in reverse After End Packet happens just begin to analyze If it is selected the signal will be decoded when the End Packet appears When CAN Dat
176. r is full of hard facts for engineers The contents of this version of the User Manual may look more different than the one on the web Every engineer finds new problems new solutions or other issues during real life applications Though there are dozens of questions here we look forward to your feedback which is important for future versions It may help us produce more efficient and accurate devices so that we will offer you much better service 197 FMO7IAA C O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 7 Appendix 1 1 Hot Keys 7 2 Contact Us 198 FMO7IAA The Zeroplus Logic Analyzer gt SERBHESEOSIRAS User s Manual V3 10 Zeroplus Technology Co Ltd Objective In this chapter users will learn the functions of all defined hot keys in the software interface of the Logic Analyzer 7 1 Hot Keys Table 7 1 Hot Keys 1 Hot Key Equivalent Orders A Go to A Bar Move the ODE to the center of the waveform area select A bar by the cursor B Go to B Bar Move the sand to the center of the waveform area select B bar by the cursor T Go to T Bar Move the od to the center of the waveform area select T bar by the cursor E Change to Zoom mode Change the mouse mode to Zoom H Change to Hand mode Change the mouse mode to Hand Table 7 2 Hot Keys 2 Statement Hot Key Equivalent Orders Statement Ctrl A Go to A Bar Center A bar Ctrl B Go to B Bar Center B bar C
177. ress without the background color If it is the first time that the Address has been read we confirm that the data of the packet has been altered 1 corresponding position which is highlighted by the Blue frame STEP 3 Display the Memory Analyzer function in the waveform window When users input the Address in this Edit Box and click the Find icon it will go to the Tip The Packet is read the Address is 0X00A6 the Data are 0X0150 OXO1FA in sequence Te ZFR OPUS LAP C 32128 Standard V3 10 CN02 5 Erw 3 f Ele BysfSignal Tygger Runfatop Qaa Toots Window tiep 0 e Wm s INN vf Ebro 128K i oMnzo o 50 T 4 Page 1 coum fle jg sme gh OG Mnr Wek eo ES amp Height b Tigger Oey T Scale 53 6429941 Display Pos 5633 APOS 64527 A Tz 64527 v L Total 131072 6977 BPos 844697 B TzB4497 Bus Sugnl Tagger Fe S56 1 MIULIU UU U f UU ieaie No x ULI pu AA AAAA AA AAA ALA A AA A ALA AA NOAA OAA O ULL dL Teli ahs Busi 12c nm T 0 Ox Ox20 ee 0x58 Fig4 167 Memory Analyzer Display 181 ES SS pepe pe enmt Maaien LI ead 1 A pu pu pu pu pu pum o p n 10 UXDA i oxis o oaa d o d l Fa I I ee E es 1 171 I 1 I lt _ lt JdTL M3 1
178. rior the waveform or data Release all selected bars and change Mouse mode to Normal Space Change the trigger conditions Change trigger conditions Left Operate the position shown ESC Operate the position shown 200 FMO7IAA CD FRABROSRAA Zeroplus Technology Co Ltd 201 Hot Key F1 F2 F3 F5 F6 F7 F8 F9 vest F11 F12 The Zeroplus Logic Analyzer User s Manual V3 10 Table 7 4 Hot Keys 4 Equivalent Orders Help Logic Analyzer Help Decrease the sampling rate Increase the sampling rate Run Stop Single Run Run Stop gt Repetitive Run Run Stop Stop Data gt Zoom Out Data gt Zoom In Data gt To the Previous Edge Data To the Next Edge Statement Logic Analyzer Help Decrease the sampling rate Increase sampling rate Execute the acquirement once Execute the acquirement continuously Stop acquiring data Zoom out the waveform Zoom in the waveform Move forward to the prior variation waveform and center that location Move forward to the next variation waveform and center that location FMO7IAA AP BE ELS RH S P 23 8 Zeroplus Technology Co Ltd The Zeroplus Logic Analyzer User s Manual V3 10 7 2 Contact Us Table 7 5 Contact Us Contact Us Copyright 1997 2010 ZEROPLUS TECHNOLOGY CO LTD Headquarter Taiwan Chung Ho City Instrument Division Business Department Taiwan Hsinchu City Taiwan Chung Ho City Other Serv
179. rmats are decided by the settings in the Protocol Analyzer when not selecting the option Activate the data formats are decided by the settings in the main program 127 FMO7IAA C O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 4 5 3 UART Analysis UART Introduction The UART which stands for Universal Asynchronous Receiver Transmitter is a serial asynchronous protocol The UART is often time integrated into PC communication devices and it usually equips an EEPROM Electronic Erasable Programmable Read Only Memory for error checking proposes with other chips There are two concepts about UART which must be understood before performing any further tasks The UART protocol will first translate a parallel data into serial data for the UART requiring only one wire to transmit signals The transmission starts at a triggered Low position and there are 7 or 8 bits of data following afterwards To halt a transmission it requires a signal or multiple bits of logic 1 Odd number bit transmission requires odd parity error checking and even number bit transmission requires even number error checking Following the parity check is another data translation from serial data to parallel data UART also generates an extra signal to indicate receiving and transmitting conditions Furthermore since UART is an asynchronous communication protocol and data transmission may not be in bytes a complete UAR
180. rols the data sampling Total The period of time when Logic Analyzer captures data Display Pos The middle tip means the middle position of the waveform Display Range Display the waveform time range of the current waveform display area A Pos The main function is to set A Bar or the other Bar B Pos The main function is to set B Bar or the other Bar A B Press the under arrow to exchange and become the other Bar Moreover you also can execute this function from the other Bar Ruler Waveform Display Listing Display Ruler shows the time position of the waveform shown in the waveform display area or the listing display area Bus Signal Waveform Display Listing Display FMO7IAA 23 C O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 Edit names of the measured channels color shown matches the trace color Trigger Column Trigger Column allows users to adjust signal trigger conditions Filter Column Filter Column allows users to set Bus or signal filter conditions Display Area Acquired data is displayed as a waveform or in a list format Waveform Display This interface shows the digital signals When the signal is logic 0 the waveform will be displayed as If the signal is logic 1 the waveform is as An unknown signal waveform is displayed in gray between the high and low levels as There are sixteen channels in LAP C 16032 LAP C 16064 LAP C 16128
181. s FMO7IAA AP RE BS BO i ARAE Zeroplus Technology Co Ltd Rising Edge A Falling Edge Either Edge iE Trigger Property Tip Tip T lt N A N A Trigger Content Setup Icon Description B Decrease trigger position Increase trigger position Trigger Page Trigger Count Trigger Delay Icon Description N A Trigger Delay 38 The Zeroplus Logic Analyzer User s Manual V3 10 Set the trigger condition as Rising Edge See Section 4 1 for detailed instructions Set the trigger condition as Falling Edge See Section 4 1 for detailed instructions Set the trigger condition as Either Edge See Section 4 1 for detailed instructions Reset Reset the trigger condition mn Trigger Level Port n l Port B rn zl Port C Port D TTL b 5 v fis V fis v fis v Trigger Count fF a Min i Max 65535 See Section 4 1 for detailed instructions reach before the trigger circuit initiates a sweep Cancel Default Help Fig 3 33 Set Trigger Content Trigger Level The voltage level that a trigger source signal must There are 4 ports available each port has the ability to assign different voltages to meet the users requirements Use the pull down menu to choose between TTL default TTL CMOS 5V CMOS 3 3V ECL and User Defined choose the value of the Tri
182. s of the protocol analyzer Select the protocol analyzer item and enter the value for Min Value or Max Value Signal Choose among Rising Edge Falling Edge Either Edge High or Low x x Activate the Function of Chain Data Find Activate the Function of Chain Data Find E janal Name B ignal Name Tas Y Next Previous Close Tas Next Previous Close Bus1 Min Value Max Value Bus Item Find in Value Max Value 40 e o fFF Data FFFFFFFF when Found ee Start At al hgn Found Statistics Statistics Statistics Fig 3 119 Waveform Find Dialog Box of the Logic Signal Tavefora Find X Tavefora Find x Activate the function of Chain Data Find Activate the Function of Chain Data Find Bus Signal Name BuciSianal Mame Eus v Next Previous Close Next Previous Close Bus1 Min Value Max Value Bus Item Min Value Max Value A fo FFF Data 00 FFFFFFFF AS Y Statistics faz A _Statistics_ Ds Y Op Not In Range En J o B1 Fig 3 120 Waveform Find Dialog Box of the Logic Bus Taveforme Find x Taveform Find x Activate the function of Chain Data Find Activate the Function of Chain Data Find Bus Signal Name Name Tous Next Previous Close Y Next Previous Close q Busi a Min Value Max Value ind Min Value Max Value zo BEEEMNW JI Freer je when Found Statistics
183. s signal to the Logic Analyzer to acquire the repetitive data and then click the Stop icon to end the repetitive run Tip Click icon to view all the data and then select the waveform analysis tools to analyze the waveforms Tip 103 and Dd x Li x Oe S AA S594 ES b creek m omn m emm ene m 4b Page 1 Count fi o 6E amp bi DEB noramrre Ww oe Be Be De al 4 Highl n Trigger Daley i Sea 2883 504 Display Powy APop gasir A T Ga527 7 A Bz30 7 Tataki 31072 Display Range 65513 65537 BPas5iddT B Tagiri Comger FilgiHo Bur Signal Tg Fite 14417 l A i ETF AUC T Ae FM d sw mo x mm x BR x pe zm PITT PI Ready Fig 4 25 Click Icon to View All the Data 3 Stop to end Run Click the Stop icon to end the Run If the status is Waiting with no signal outputting as shown in Fig 4 26 click the Stop icon to end the Run check the setup again and try the run process again EN Waiting Connected Zz Fig 4 26 Waiting Status FMO7IAA hb 5BEBEHERBRIDSPE4Za The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 4 2 Bus Logic Analysis Section 4 2 presents detailed instructions about logic analysis with a set of grouped signals which is known as Bus Logic Analysis Basic Software Setup of the Bus Logic Analysis Step1 Set up the RAM Size Frequency Trigger Level and Trigger Positi
184. sition e Display Area and Waveform Display Area Recent File See Fig 3 17 Exit Exit the program Exit Fig 3 2 File menu De S Fig 3 3 Standard Tool Bar 24 FMO7IAA J PRARRHBRAA The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Menu Bar File Menu Item Detail Menu amp Dialog Box 4 Hes Ctrl I Open a New file 21x Look in E My Documents gt ex E3 My Recent Documents Desktop My Documents g My Computer T Open Ctrl 0 dE en ett My Nadie Places File name m Open Files of type Logic Analyzer LAP C File alc be Cancel Close CtrltF4 Fig 3 5 Close the active workspace Save As 2 x Save in Om Documents 9 ck E3 My Recent Documents Desktop e My Documents Save CtrltS er 4 My Computer My Network Save As acer Auto Save mw 45 Save as type Logic Analyzer LAP C File alc Cancel LaProject Author SOFT EB8630F7B3 case lemma Fig 3 6 Save As Dialog Box Save Save the current file 25 FM0714A AP RE ESAS i ARAE Zeroplus Technology Co Ltd pa Export Waveform CtrltShift E The Zeroplus Logic Analyzer User s Manual V3 10 Save As Specify the name of the file to be saved Auto Save Save the required file automatically Save in Desktop gt Ba ex E3 Fe d
185. stems connection 2 Protocol Analyzer Signal Specifications 100MHz 0 0 0 Appropriate Sampling Rate 100MHz Same Data Time Per Bit Name of Syn Signals CAN 2 0B Data Verification Point did 190us converts to High signals gt 3 Protocol Analyzer IO Description CANL The main signal source of transmission data CANH Signal is opposite to the signal source of transmission data 4 Protocol Analyzer Electrical Specifications EL C NN S Logic Input High Logic Input Low CAN 2 0B Frame Specification CAN 2 0B can separate into frames as follows Data Frame Remote Transmit Request Frame Error Frame Overload Frame Because CAN2 OB is transmitted by the format of different signals the signal can separate into CANL and CANH and the signal direction of CANH is opposite to that of CANL Next we analyze CAN 2 0B signal with the standard of CANL Basic Data Frame Data frame can be divided into Basic CAN and Peli CAN Data Frame of Basic CAN transmission As follows 155 FMO7IAA 0 FRARE ARS 8 The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 message data can be separated into Start of Frame SOB Arbitration Field Control Field Data Field CRC Field pi PLLA re E T rel Ack Field End of Frame L 1 1 re EERE Gg S E EIER 8 EE EA Eu 22 IR ERU Per 588 28 e ELLE IT 9 1 Fig4 120 Basic Data Frame Start of Frame Every Start of Frame must be 0
186. switch freely When users activate the Data Contrast function the software will search whether there is a GUI DLL or not then it can judge whether there is a user defined Interface If there is a user defined Interface the GUI DLL will take effect if there isn t the embedded Data Contrast Interface will be activated STEP 2 Display the contrast results in the Data Contrast dialog box Tip After pressing Perform Contrast it will display the contrast information in the contrast result The below contents of the box are the contrast information The information is relative simpleness if users don t want to understand more details you can know whether the signals of the two contrast files are completely the same or not Data Contrast Settings X Active Data Contrast Contrast Files Basic File 23k Contrast File 1 alc Error Tolerance None C Beginning of Data Contrast Result Error Stat a Contrast Beginning Point 7 Bar 1111111111101 wm k Poll the contrast waveforms synchronization Pin Assignment v Display Files the contrast differences I Display Files horizontal Perform Contrast v Do contrast automatically when being run Apply Close Help Fig4 154 Display the Contrast Results in the Data Contrast Settings Dialog Box AO A0 FAIL It indicates that there are differences in the channels of the two files BO BO PASS It indicates th
187. t o PowratWok J A DC 30V po DC 30V Vmtrene SC BV _Input Resistance 500KO A0pF Working Temperature S C Storage Temperature 40C Refer to the User Manual for error analysis calculation V Reference FM0714A C O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 Table 1 9 Operating Environment WARNING Avoid direct sunlight Use in a dust free non conductive environment see Note Relative Humidity 8096 Altitude 2000m Temperature 0 40 Degrees C This is a Class A product which may cause radio interference in a domestic environment Note EN 61010 1 2001 specify degrees of pollution and their requirements Logic Analyzer falls under Level 2 Pollution refers to addition of foreign matter solid liquid or gaseous ionized gases which may produce a reduction of dielectric strength or surface resistivity Pollution Degree 1 No pollution or only dry non conductive pollution occurs This pollution has no effect Pollution Degree 2 Normally only non conductive pollution occurs Occasionally however temporary conductivity caused by the condensation must be expected Pollution Degree 3 Conductive pollution occurs or dry non conductive pollution which becomes conductive due to the condensation occurs In such conditions the equipment is normally protected against exposure to direct su
188. t one end on the testing board and the other in the LA as shown in the diagram opposite Check the box to compress all the data Compression is used to compress acquired data through a lossless compressor The purpose of this compression is to place more data in a limited memory than in an actual memory The compression rate of the Logic Analyzer can be up to 255 times This means that the maximum acquisition can be 32M Bits 128Kx255 32M Bits for each channel The chosen capacity of the memory 1MB means that the maximum data being sieved out arrives at 1MB 255 255M Bits Per Channel Note The rate will change depending on the data being analyzed Signal Filter Setup k x m Filter Condition Trigger Condition PortA Filter Condition i Trigger Condition PortB Filter Condition i Trigger Condition Pote L Filter Condition Trigger Condition Filter Condition m Filter Delay Setup IV Activate Filter Delay r Select Filter Delay Mode r Select Delay Start Point r Delay Time According to Filter Condition Start Edge 1 C End Edge Min 1 C Opposite of Filter Condition C Period Delay Max 65535 Display Bar Setup Bar Style Joriginal Bar Width 1 OK Cancel Restore Defaults IL e Fig 3 22 Signal Filter Setup Dialog Box The function of Signal Filter is to
189. t up the Packet List according to their requirements Setting Bus Packet Length in dialog box is only used for doing Bus Statistic Users can define how long the time is as a data packet to add the export function See the following figure 110 FMO7IAA Phe eee ih BR eS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Setting MEN w Bus Select Data Format C Binary C Decimal C Decimal signed Hexadecimal C ASCII Bus Packet Length Min 1 10 Max 2048 Packet Item M Packet v Mame M Timestamp Length Data Text fe i Text Color Auto OK Cancel Help Fig4 40 Packet List Setting BUS Packet List zi Refresh Export Synch Parameter Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length E 1 fFBusiBu 1023 o 1 o 1 o 1 o Fr 1 Oo 1 Packet Name Timestamp Data Data Data Data Data Data Data Data Data Data Length L2 _ busi us 1013 o 1 o 1 o 1 o Fr 1 Oo 1 Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length o fa ff 3 qo x Packet Name Timestamp Data Data Data Data Data Data Data Data Data Data Length o 1 o 1 o 1 o 1 O 1 j Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length Lo o 1 o f 1 o 1 o 1 Packet Name TimeStamp Data Data Data Data Data Da
190. ta Data Data Data Data Length L6 Busi us 973 jJ o 1 o 1 o 1 J o 1 o 1 j Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length pot ttotatotiatoatiafto fi zi d Fig4 41 Bus Packet List 1 View Specifications Packet Name and TimeStamp can be selected to display from the Packet List Setting dialog box Packet List the order of Packet Name Display the name of Packet or the Filter Display Bar TimeStamp It is the starting point of the Packet Tip The rest name and content are supplied by Plug BUS Packet List E x Setting Refresh Export Synch Parameter Packet Name TimeStamp Address Read A MWACK DESCRIBE IIC BUS T2C A NACK ADDR NACK Packet Name TimeStamp Address Read AsNACK DESCRIBE 2 ICBUSQ2C 5231 Packet Name TimeStamp Address Read A WACK DESCRIBE MENEE acket Name TimeStamp Address Read A WACK DESCRIBE pene qncsusqo eae Packet Name TimeStamp Address Read A WACK DESCRIBE 5 jCBUSQaC 20290 Fig4 42 Protocol Analyzer I2C Packet List Setting It is used to open Packet List Setting dialog box 111 FMO7IAA PHHH BRAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Refresh Press this button the list view can renew automatically Export Export the workspace into Text txt and CSV Files csv Synch Parameter Open the synch parameter setting
191. ter Setup and Filter Delay Setup etc 4 1 Logic Analysis Logic Analysis is meant for a single signal analysis Section 4 1 gives detailed instructions on the software s basic setup Basic Software Setup of the Logic Analysis Task 1 Clock Source Frequency and RAM Size Setup Step1 Click iM icon or click Sampling Setup from Bus Signal on the menu bar the dialog box as shown in Fig 4 1 will appear Bus Signal Trigger Run Stop Data Tools Window Help EA him h bb HEET m A il dean sol nn i Channels Setup EEUU Reto au x Wi Signal Filter Sett Clock Source Group into Bus TEE Ungroup from internal Clock Frequency SMHz Expand Coll S Synchronous Clock Format Row External Clock Rename Rising Edge Frequency 100KHz Falling Edge Min 0 001Hz Max 100MHz Note The external clock voltage level is the same as the port 4 trigger level Sampling RAM Size Compression Mode Signal Filter RAM Size 128K Data Compression Signal Filter Setup Channel number will be limited to 32 Apply Cancel Restore Defaults Help Fig 4 1 Clock Source Step 2 Clock Source Frequency Setup Internal Clock Asynchronous Clock Click on Internal Clock and then select the Frequency from the pull down menu to set up the frequency of the device under test DUT The frequency of the Internal Clock must be at least four times higher than the fr
192. ter istics Wi Em hid Statistics Window ix v Cascade Horizontal Vertical Screen Display gt llaDoci Fig 3 86 Display Signals in Waveform FM0714A O PRE RANA IRD Zeroplus Technology Co H Listing Display Hot Hews Window d Tip To let online users learn the latest news we add the Running Text Ads Function Turn On Start the Running Text Ads function News Activity Let users learn the activities of our company Production News Let users learn the latest products of our company Note If both News Activity and Production News are turned on The Running Text Ads will play News Activity prior to Production News and play the news in order the whole process plays repetitively 61 The Zeroplus Logic Analyzer User s Manual V3 10 File Bus Signal Trigger Run Stop Data Tools Window Help OEE au il I IR E Waveform Display Listing Display B S pr nnm Hot News Windo b E e amp i amp Navigator ale 25KHz Display Pos ns Boni al 81 92ms mm Memory Analyzer OF Bus Packet List Ti AD Al A2 A3 A4 fd Statistics ee me LILIE EA Cascade i NENNEN EIN ERE ERN E WENEENKEEHEHEHENNEFNENKN mam mima nans ums naso amm undue dum sm oed mms en Horizontal Vertical Screen Display gt I lLlaDoci i ZLaDoci 2 Fig 3 87 Disp
193. the protocol packet is START the frame is disabled Data Format The displayed value mode can be selected There are five options Binary Decimal Decimal signed Hexadecimal and ASCII Step3 Trigger Mark Setup To find the item in the Bus better users can activate the Trigger Mark function after starting Bus Trigger the trigger mark is shown with T bar According to the number of the trigger position the T bar is displayed in order TO T1 T2 T3 T4 and the color is red as the image below 1 Bus The trigger condition is 0 the red T bar displays the trigger condition in order 100 FM0714A PRE eee ih Bee The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 he Filter y Be ss ies se Se TS 100a Br o 11T TL T13 um 25 175 7t rozo X oxo XY oxo Xf oxo XX oxo jj oxo jj oxo jj oxo j joxo Fig 4 20 Bus Trigger Mark 2 Protocol Analyzer I2C The trigger condition is Data 0 the red T Bar displays the trigger condition in order LOCUS re ee ee D D G E S Fig 4 21 Protocol Analyzer Trigger Mark Tip The Trigger Mark function is available for the LAP C 162000 LAP C 322000 Modules and it is not available for the LAP C 16032 LAP C 16064 LAP C 16128 LAP C 32128 LAP C 321000 Modules 101 FMO7IAA 5 ZXBEREHEEBRR OD BIRZ SI The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Task 4 Bus Signal Trigger Condition Setup H
194. tion of Multi stacked Logic Analyzer in the Memory Stack Tip There are two Logic Analyzers to do the Memory Stack the Synchronous Channel is A0 the data on the left of A Bar is captured by the first Logic Analyzer the data on the right of A Bar is captured by the second Logic Analyzer LEBUPLYG LAPS CRM0G Sieaderd VICE GA OOOO mS PTS aigi x im File EgrfSigasl Trigger BunfStop Data Tools Mimio elp sli x DRE AO S p A D e p o ftzek m eon eomaHz je ee m e Page i ee a6 me r k ey E MILEZZZZEEEJETI TAL e l o eie NUN gU D Dispi i A Faa DU i PE A Te ian a amp l IX 771 Seule 112 OWT Display Fasi DHEN Tahal 382144 Display Banga BITIT Tiii B Frm B 7 64497 Compe ate Bs Bus Ei nal Trigger Filter 1587 Md GMAT 55 4567 8 emei dia Geh eT SIT GTA T Goia os EMEN EMO TOM Fa A F 2 2562144 us 2 S hae 490 450 499 450 Lano asi Laco sie OTe og sel sm STEP 4 Display the function of Multi stacked Logic Analyzer in the Channel Stack Tip There are two Logic Analyzers for Channel Stack the Synchronous Channel is AO the Synchronous Trigger Condition is the Rising Edge the former 32 channels A0 A7 BO B7 CO C7 DO D7 change into the 64 channels AO A7 BO B7 CO C7 DO D7 EO E7 FO F7 HO H7 l0 17 channels PRERUTLIG LAP CCD Staadard YJ DOUCHUZ ce OR Cael J il xi m Fila ByeiSigeal Trigger Pan Gtep Data T
195. trl C File gt Capture Window Open Capture Graph dialog box Ctrl E Data gt Zoom Change Mouse mode to Zoom mode Ctrl F Daae FndDaa Vane ee predetermined conditions Ctrl G ue nel Group selected signals into a Bus Group into Bus Ctrl N File gt New Create a new file Ctrl O File gt Open Open a saved file Ctrl P File gt Print Print an active file Ct S File gt Save Save an active file with its current name location and file format Bus Signal gt l Ctrl U Ungroup from Bus Ungroup signals Pins from a Bus Ctrl Z Data gt Previous Zoom Reverse the last zoom Ctrl Shit E File gt Export Waveform Open Export Waveform dialog box 199 FM0714A J ZRERIHSEROL SER 2 The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Table 7 3 Hot Keys 3 Hot Key Equivalent Orders Statement Page Down Operate the position shown Go to next page of the data or the waveform Page Up Operate the position shown Go to previous page of the data or the waveform Home Operate the position shown Go to the beginning of the data or the waveform End Operate the position shown Go to the end of the data or the waveform Up Operate the position shown Move the cursor up a grid Down Operate the position shown Move the cursor down a grid Move the selected Bar or display left to prior the waveform or data Right Operate the position shown Move the selected Bar or display right to poste
196. troduction 1 Brief Introduction Features 1 WIRE is a non synchronic half duplex serial transmission which requires only one OWIO to transmit data The typical 1 WIRE transmission structure is illustrated in Figure 4 95 During the 1 WIRE transmission the OWIO can be used to transmit data and supply power to all devices connected to the 1 WIRE OWIO will link to a 4 7K Ohm Pull High electric resistance which is linked to the power supply 3V 5 5V The transmission speed for 1 WIRE can be divided into two types standard and high speed Every 1 WIRE has a unique 64 bit code for the device to recognize Therefore the maximum number of link devices is 1 8 almost unlimited JV 1n 5 54 Host Micro C ontroller Fig4 93 Applications Applications 1 WIRE is commonly applied to the EEPROM and to certain sensor interfaces 2 Protocol Analyzer Signal Specifications Name of Protocol Analyzer 1 WIRE Required No of Channels Signal Frequency Not fixed around 10K Appropriate Sampling 1MHz Rate Nini Name of Syn Signals OW O Data Verification Point 20 US after the falling edge signals 3 Protocol Analyzer IO Description OWIO The only I O transmits Reset signals and data 4 Protocol Analyzer Electrical Specifications Parameter Min Typ Mex Unit Note Every IC varies High count Voltage 2 8 5 2 V according to the Pull High voltage LowcomtVotage 0 Vv 138 FMO7IAA
197. ull resistor 1 WIRE Protocol Analyzer is pulled back to the high status 3 Then Master detects a rising edge from the Data Line when every slave will wait for a period of time PDH standard speed 15 60us high speed 2 6us and send back a Presence Pulse to Master PDL standard speed 60 240us high speed 8 24us 4 Finally the 1 WIRE Protocol Analyzer will be pulled back to the high status through the resistor G Meanwhile Master can detect any online Slave O From Fig4 95 the low count Reset Pulse and Presence Pulse signals can be clearly seen 139 FMO7IAA C O PREP i Bee The Zeroplus Logic Analyzer Zeroplus Technology Co RI User s Manual V3 10 eo ee a dennes a es D E oI 7 1 arm MEE am eui eni Hg 1 00 Y M Tous ChiX 4 52V Figure 2a You can clearly see the negative going reset and the presence pulse Fig4 95 Reset Presence Detect Sequence 2 Write Data 1 To initialize Write Data Master will convert the Data Line from the high logic to the low 2 There are two types of Write time slot Write 1 time slot and Write O time slot 3 During a write cycle all Write time slots must have duration of at least 60us and a recovery period of 1us 4 When the I O line goes down Slave devices create samples from 15 60 us A Write 0 If the sampling is low O is generated as in Fig4 98 Write zero Time Slot VeuLLue Veuwup MIN Vig MIN RES ISTOR
198. umber between 0 and 9 Tip The number shortcut is set in the Add Bar dialog box Every new bar can be filled in one number which is used to find the required bar faster the default number of the new bar is O It is noticed that once the number key is set it can t be modified and each new bar can named with the same number that is to say one number can name many bars For example users can set the number 3 as the shortcut key When users press the number 3 key the C Bar will be displayed in the centre position of the screen The Zeroplus Logic Analyzer k l Select an Analytic Range gt Noise Filter EM Bus Width Filter Data Contrast User s Manual V3 10 B Find Data value Ctrl F Fo Find Pulse width l To the Previous Edge Fil f To the Next Edge F12 D GoToTB T t Add Bar Alt 4 Bk Go To A Bar A z Delete Bar Alt B B Go ToB Bar E i zoom E Go To More Hand H he Normal ESCAPE T Zoom In Fa E Zoom Out F8 Show all Data F10 w Previous Zoom Chrl z Data Format waveform Made List Data Made Fig 3 54 The selected bar will be shifted to the center of the waveform area Bar Key EMEN Fig3 55 Add Bar C2 2 780 Hater CI LOCUS D CR PLE FL 1m De Bel toe Baris Gate Dem ere e z Of Se BSH AE Deel ie ES Ira M GS E Tata dd rre haapa Tajm c HF F E ael 4 Ad smu P Aa 1 sm eu ow sd Tickets Pio Haa m e Tigo
199. ure below 42 FMO7IAA 43 J FRARAhARe EI Zeroplus Technology Co Ltd x Data Contrast P Find Data Value The Zeroplus Logic Analyzer User s Manual V3 10 Fig3 45 Before and After Filtering Data Contrast Settings x acct Contrast File LaDoci Error Talerance None Contrast Files Basic File Contrast Beginning Point 7 Bar Beginning of Data Contrast Result Error Stat Roll the contrast waveforms synchronization Pin Assignment Display Files the contrast differences Perform Contrast Display Files horizontal Do contrast automatically when being run Apply Close Help Fig3 46 Data Contrast Data Contrast It is used to contrast the difference for the two files of the same style One is the Basic File and the other is the Contrast File The contrast file can display the difference between the Basic File and the Contrast File Taveform Find E x Activate the function of Chain Data Find Bus Signal Mame ul n Next Previous Close Bus Item Find Min Value Max Value pata o F Start At End At When Found Statistics Statistics o jos zh sh di Fig 3 47 Waveform Find Dialog Box without FMO7IAA PRR AG ARRE ZeroplusTechnaology Co Ltd Tip Remember the final conditions When the find function is used the function of displaying the final conditions is adde
200. us Logic Analyzer User s Manual V3 10 Change the display of a Bus or a signal Size the signal columns automatically Highlight a signal or Bus and click Move Left Up to move the signal or Bus up left through the list of the Bus signal Highlight a signal or Bus and click Move Right Down to move the signal or Bus down right through the list of the Bus signal Highlight a signal or Bus and click Hide to hide it Click to show all signals and Buses that have been hidden Highlight a signal or Bus and click Color to change the color Highlight a signal or Bus and click Rename to rename the Bus or signal FMO7IAA 5 gt RAERERGBESA The Zeroplus Logic Analyzer eroplus Technology Co Ltd User s Manual V3 10 Fig 3 30 Trigger Tool Box 36 FMO7IAA M REA AG D ARRES The Zeroplus Logic Analyzer 37 ZeroplusTechnaology Co Ltd User s Manual V3 10 enu Bar Tri Menu Item Detail Menu amp Dialog Box xj gispnene eese ssusss sese sse nonu ne Bus Name Operator Value oe Bus Trigger Setup Bust F fF Data Format C Binary C Decimal C Decimal sianed Hexadecimal C ASCII Cancel Default Help Fig 3 31 Set Bus Trigger See Section 4 1 for detailed instructions Channel Trigger Setup i x pora Econ Filter Condition se M NS Trigger Condition Condition Filter Condition CRS CER UD RO UN ER pulp a Trigger Condition x x
201. use an alterable judgment circuit which can filter undesired signals in order to capture and store valuable data in the memory When the FMO7IAA 33 P Re Tee ie SIRAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 open the Signal Filter Setup dialog Combination of input signals from each channel meets the filer conditions the section of acquired data will be gathered by the Logic Analyzer and stored in the memory After storing the data it will return to the Logic Analyzer s system and be displayed as a waveform If the combination does not meet the filter conditions it won t gather and store data dz box Tip 1 Don t Care means that the Logic Analyzer TTE all signals from sampling Filter Condition delay time Use SERA UT Filter Condition delay time start we Fig 3 23 High and Low Levels It is the System default There are three modes of Signal Filter configuration for each channel om and dde the input signals satisfying the high level 3 Low Level means that the Logic Analyzer captures and displays the input signals satisfying the low level Filter Condition delay time end edge Fi Eben Condition end edge delay time Fig 3 24 High and Low Levels Signal Filter Delay Setup Filter Delay According to the filter condition Start Edge Show the waveform from the start edge to the delay time interval See details in Section 4 1
202. when Found Statistics h sl Statistics h z Statistics Bus2 I A ae _ Statistics Vt 1 D Yv A vr _ Statistics BO o A ACK B 1 i i K Fig 3 121 Waveform Find Dialog Box of the Protocol Analyzer I2C FMO7IAA Phe eee DS PEZ a The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 Tavefora Find xj Tavefora Find x Activate the function of Chain Data Find Activate the function of Chain Data Find BHsSigral Name ye a Next Previous Close Eu Next Previous Close Br a Min Value Max Value Min Value Max Value n e ae Es a 41 UNS When Found Statistics Start At Statistics Statistics Statistics A Ds B B1 Taveforme Find Taveforma Find Activate the function of Chain Data Find 3 Activate the function of Chain Data Find Next Previous Close Next Previous Close Min Value Max Value B em ind Min Value Max Value FFFFFFFF FFFFFFFF WEE Statistics ms f FELRE Statistics Statistics m _ Statistics p po Fig 3 123 Waveform Find Dialog Box of the Protocol Analyzer UART m Activate the Function of Chain Data Find Activate the function of Chain Data Find Byatstqerabhrarrie New Previous Close tox Next Previous Close Min Value Max Value Bus Item Find Min Value Max Value zi Frerrerr FFFFFFFF Statistics Statistics Statistics o When
203. which displays the software information of the software Hl version new functions and bug V Show tips at Startup dose modifications when activating the Fig3 107 Software Version Information Display software It is convenient for users Window to know the information of the present software version Right Key Menu Item Detail Menu amp Dialog Box Right Key Menu on the Bus Signal ia Sampling Setup Column ify Channels Setup BUS Bus Property Analog Waveform k Tip Reverse The Right Key menu is added on the Group into Bus Ctrl G Unogroup From Bus Erg basis of the Bus Signal menu So the Add Channel function of Sampling Setup Channels Setup Seam Chema Bus Property Group into Bus Ungroup from Delete Channel Delete All Channels Restore Default Channels Bus Format Row and Rename are the same as those in the Bus Signal menu And the Format Row d function of the Analog Waveform is the same Rename aU BIRD INOSIOOISITISRUE Fig 3 108 Right Key Menu on the Bus Signal Column 67 FMO7IAA AP RE ESAS iB PRE Zeroplus Technology Co Ltd Reverse Tip This function of Reverse is used to reverse the collected signal Change the High Level into the Low Level change the Low Level into the High Level The Reverse of Waveform Mode displays with the dashed so it is easy to distinguish Add Channel Copy Channel 68 The Zeroplus Logic Analyzer User s Manual V3 10
204. why does 256K make sense The reason for this extra RAM size is to cope with the fact that a few of the 1 16 channels may have a large data input Tip Use the pull down menu to choose the speed of the clock Clock Source Asynchronous Clock on the board being tested The sampling frequency should be more than 4 times higher than the signal to be measured so that the waveform duty cycle depiction will be accurate FMO7IAA 32 FRR RAG i ARAE ZeroplusTechnalogy Co Ltd Asynchronous Clock Internal Clack Frequency zar He te Rising Ed SOEHZ Sampling RAM Size RAM Size Channel number limited En 32 H Compression Tip 95 Signal Filter Setup Tip Select the Signal Filter Setup from the pull down menu of the Bus Signal or click the 9e icon or the Button on the Sampling Setup dialog box to The Zeroplus Logic Analyzer User s Manual V3 10 Choose the frequency of the clock on the board of the Logic Analyzer Select External Clock to acquire data through external sampling Choose either Rising Edge or Falling Edge to execute the analysis process According to the users input the value of external frequency in software the software can count the relevant value about signal mode and frequency For example the value of the message the time scale and the zoom in and out will be the value of time mode Connecting the Synchronous Clock Use one of the single connecting cables to pu
205. yzer HDQ Packet Analysis PROTOCOL ANALYZER HOQ X Item Color ltem Color W Read Cancel Default Help Fig4 119 Protocol Analyzer HDQ Packet dialog box Item Select the content which needs to display in the Packet List which includes Break Recovery Address Data Read Write and Describe Color Set color for items which needs to display in the packet list 154 FM0714A gt FERRARS RAE The Zeroplus Logic Analyzer ee Zeroplus Technology Co Ltd User s Manual V3 10 4 5 7 CAN 2 0B Analysis Preface Add Protocol Analyzer function to analyze CAN 2 0B transport protocols data CAN 2 0B serial transmission there are two signal channels CANH and CANL which match with baud ratio judge serial data If you want to change serial data into Bus format you need to analyze this function with LA a dialog box needs to be added you should set up a Protocol Analyzer CAN 2 0B dialog box CAN 2 0B Introduction 1 Brief Introduction Features CAN 2 0B Controller Area Network is an Asynchronous Transmission Protocol It costs low sky high use rate far data transmission distance 10KM very high data transmission bit 1M bit s sending information without appointed devices according to message frame dependable error disposal and detection error rule message automatism renewal after damage and node can exit Bus function on the serious error Applications CAN 2 0B is used for automotive electronics correlation sy
206. yzer Settings dialog box Bulti stacked Logic Analyzer Setting X Activate Stack Stack Type C Memory Stack OM H 000000 0000 Synchronous Channel m a E synchronous Trigger Condition Rising Edge Cancel Help Fig4 169 Multi stacked Logic Analyzer Settings Dialog Box Activate Stack Click the checkbox to activate the function of the Multi stacked Logic Analyzer the default is non activated Stack Type Users can select the Memory Stack and Channel Stack the default is the Channel Stack Please select the Logic Analyzer for stacking It can display all the connected Logic Analyzers and the 182 FM0714A i PHRSR E The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 10 S N code of them The M1 indicates the first Logic Analyzer and the M2 indicates the second Logic Analyzer M3 and M4 are similar to the previous Users should select two or more Logic Analyzers but the most analyzers users can select is four Synchronous Channel Select the synchronous channel form the pull down menu The default synchronous channel is AO Synchronous Trigger Condition Select the synchronous trigger condition Users can select the Rising Edge Falling Edge High and Low from the pull down menu The default is the Rising Edge The function of the Synchronous Trigger Condition can only be used in the Channel Stack that is to say it is disabled in the Memory Stack STEP 3 Display the func

1 FM07I4A

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