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SuperH Family E10A-USB Emulator Additional Document for User`s

1. a Specifying the measurement start end conditions Set the performance measurement conditions in the Action page after conditions have been set in the Event Condition dialog box that is opened by double clicking Ch1 to Ch6 and Ch8 to Ch12 on the Event Condition sheet of the Eventpoint window Notes 1 When no measurement start end conditions are specified measurement is started by executing a program and ended when an event condition is satisfied When only the measurement start or end condition is specified performance cannot be measured Be sure to specify both of the measurement start and end conditions Step is not possible while measurement start end conditions are specified Also when execution is restarted from the address where it stopped due to a breakpoint or CPU event break condition operation is not possible since this requires stepped execution Restart execution after removing the breakpoint or CPU event break condition The use of one channel as both a break condition and a measurement start or end condition is not possible After specification as a measurement start or end condition setting as a break condition is ineffective Table 2 10 Conditions Specified in the Action Page Item Description PA1 pai_start_point Specifies the conditions of Event Condition that has been set as the measurement start condition of performance channel 1 pa1_end_point Specifies the conditions o
2. An area that can be only read by MMU 3 During step operation BREAKPOINTs are disabled 4 When execution resumes from the address where a BREAKPOINT is specified single step operation is performed at the address before execution resumes Therefore realtime operation cannot be performed 5 When a BREAKPOINT is set to the slot instruction of a delayed branch instruction the PC value becomes an illegal value Accordingly do not seta BREAKPOINT to the slot instruction of a delayed branch instruction 6 When the Normal option is selected in the Memory area group box in the General page of the Configuration dialog box a BREAKPOINT is set to a physical address or a virtual address according to the SH7734 MMU status during command input when the VPMAP_SET command setting is disabled The ASID value of the SH7734 PTEH register during command R20UT0840EJ0100 Rev 1 00 Page 40 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 input is used When VPMAP_SET command setting is enabled a BREAKPOINT is set to a physical address into which address translation is made according to the VP_MAP table However for addresses out of the range of the VP_MAP table the address to which a BREAKPOINT is set depends on the SH7734 MMU status during command input Even when the VP_MAP table is modified after BREAKPOINT setting the address translated when the BREAKPOINT is set valid
3. 7 When the Physical option is selected in the Memory area group box in the General page of the Configuration dialog box a BREAKPOINT is set to a physical address A BREAKPOINT is set after disabling the SH7734 MMU upon program execution After setting the MMU is returned to the original state When a break occurs at the corresponding virtual address the cause of termination displayed in the status bar and the Output window is ILLEGAL INSTRUCTION not BREAKPOINT 8 When the Virtual option is selected in the Memory area group box in the General page of the Configuration dialog box a BREAKPOINT is set to a virtual address A BREAKPOINT is set after enabling the SH7734 MMU upon program execution After setting the MMU is returned to the original state When an ASID value is specified the BREAKPOINT is set to the virtual address corresponding to the ASID value The emulator sets the BREAKPOINT after rewriting the ASID value to the specified value and returns the ASID value to its original value after setting When no ASID value is specified the BREAKPOINT is set to a virtual address corresponding to the ASID value at command input 9 An address physical address to which a BREAKPOINT is set is determined when the BREAKPOINT is set Accordingly even if the VP_MAP table is modified after BREAKPOINT setting the BREAKPOINT address remains unchanged When a BREAKPOINT is satisfied with the modified address in the VP_MAP table the c
4. If the WAIT control signal is fixed to active during break a TIMEOUT error will occur at memory access 5 Direct Memory Access Controller DMAC The DMAC operates even when the emulator is used When a data transfer request is generated the DMAC executes DMA transfer 6 Memory Access during User Program Execution When a memory is accessed from the memory window etc during user program execution the user program is resumed after it has stopped in the emulator to access the memory Therefore realtime emulation cannot be performed The stopping time of the user program is as follows Environment Host computer 3 GHz Pentium 4 SH7734 533 MHz CPU clock JTAG clock 20 MHz TCK clock When a one byte memory is read from the command line window the stopping time will be about 40 ms R20UT0840EJ0100 Rev 1 00 Page 18 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 7 Memory Access during User Program Break The emulator can download the program for the flash memory area for details refer to section 6 22 Download Function to the Flash Memory Area in the SuperH Family E10A USB Emulator User s Manual Other memory write operations are enabled for the RAM area Therefore an operation such as memory write or BREAKPOINT should be set only for the RAM area 8 Cache Operation during User Program Break When the cache is enabled the emulator accesses memor
5. Data bus condition Data Breaks when the SH7734 data bus value matches the specified value Byte word or longword can be specified as the access data size Bus state condition Bus State There are two bus state condition settings Bus state condition Breaks or acquires a trace when the value of the data bus of the SH7734 is matched Read Write condition Breaks or acquires a trace when the specified read write condition is matched Window address condition Breaks or acquires a trace when the data in the specified memory range is accessed System bus Breaks or acquires a trace when the address or data on the system bus is matched LDTLB instruction event condition Breaks when the SH7734 executes the LDTLB instruction Count Breaks when the conditions set are satisfied the specified number of times Branch trace condition Branch trace Breaks or acquires a trace when a branch occurs with the condition specified by the SH7734 By default trace acquisition is enabled Software trace Selects whether or not the software trace is acquired Action Selects the operation when a condition such as setting a break trace or performance start or end is matched Table 2 4 lists the combinations of conditions that can be set under Ch1 to Ch12 and the software trace R20UT0840EJ0100 Rev 1 00 Sep 28 2011 ate Page 22 of 54 lt ENESAS SuperH Family E10A USB Emula
6. No Select 7 CPU Match flag No Select z Chala PreHit Channel No Select ba CPU Match flag No Select Chaqa PreHit Channel cru Match flag 7 CPU Match flag Match flag set gt 0 z Ch504 PreHit Channel No Select iad CPU Match flag No Select CHECOA PreHit Channel No Select fe CPU Match flag be Ch O A OA R PreHit Channel JCh41A CPU Match flag Cht14A OA DT_CT_R PreHit Channel No Select CPU Match flag Chi 2 Branch PreHit Channel No Select Figure 2 1 CPU Sequential Extend Page a Indicates the channel name for setting conditions b Selects a condition that is satisfied before the channel which sets up conditions When a channel name is selected it is required that the condition of the channel selected here must have already been satisfied When CPU Match flag is selected the CPU match flag must be set When a condition is selected by the channel selected here no break will occur c When a condition is satisfied the CPU match flag is set or cleared When a program breaks the CPU match flag is initialized Set the event condition for each channel in the Event Condition dialog box this also applies to the System Bus Sequential Extend page R20UT0840EJ0100 Rev 1 00 Page 27 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 Usage Example of Sequential Break Extension Setting A tutorial program provided for the product is used
7. Window address Page R20UT0840EJ0100 Rev 1 00 Sep 28 2011 2ENESAS Page 32 of 54 SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 iii Open the ASID page remove the check mark of the Don t care check box and enter the ASID value to be set When the ASID value is not set as a condition do not remove the check mark of the Don t care check box iv Open the Bus state page and specify the bus type and bus cycle that are to be set Event condition 5 Window address ASID Bus State Action Bus state Read Write Read Write C Read C Write Figure 2 5 Bus State Page v Selecting the Acquire trace check box in the Action page enables acquiring memory access within the range Note To cancel settings select the popup menu that is opened by clicking on the Ch5 OA or Ch6 OA column with the right mouse button R20UT0840EJ0100 Rev 1 00 Page 33 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 Software Trace Function Note This function can be supported with SHC C compiler manufactured by Renesas Electronics Corporation including OEM and bundle products V6 0 or later However SHC C compiler including OEM and bundle products V8 0 or later is needed when instructions other than those compatible with SH4 are output When a specific instruction is executed the PC
8. as an example For the tutorial program refer to section 6 Tutorial in the SuperH Family E10A USB Emulator User s Manual The conditions of Event Condition are set as follows 1 Chl Breaks address H 00001068 when the condition Prefetch address break after executing is satisfied 2 Ch2 Breaks address H 00001058 when the condition Prefetch address break after executing is satisfied 3 Ch4 Breaks address H 0000107a when the condition Prefetch address break after executing is satisfied 4 Ch10 Breaks address H 00001086 when the condition Prefetch address break after executing is satisfied Note Do not set other channels 5 Set the CPU Sequential Extend page as shown in figure 2 1 Then set the program counter and stack pointer PC H 00000800 R15 H 00010000 in the Registers window and click the Go button If this does not execute normally issue a reset and execute the above procedures The program is executed up to the condition of Ch10 and halted Here the condition is satisfied in the order of Ch2 gt 1 gt 4 gt 10 R20UT0840EJ0100 Rev 1 00 Page 28 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 J 0x00001058 ali j 0x00001068 p_sam gt sort a 0x00001070 p_sam gt change a 0x00001076 p_sam gt s0 aL0 0x0000107a p_sam gt sl aL1 0x0000107e p_sam gt s aL2 0x00001082 p_sam g
9. be set for Ch6 and Ch5 Ch11 gt 10 Halts a program when a condition is satisfied in the order of Event Condition 11 10 An event condition must be set for Ch11 and Ch10 Many Ch3 gt 2 gt 1 Channel Sequential Halts a program when a condition is satisfied in the order of Event Condition 3 2 1 An event condition must be set for Ch3 Ch2 and Ch1 Ch4 gt 3 gt 2 gt 1 Halts a program when a condition is satisfied in the order of Event Condition 4 3 2 1 An event condition must be set for Ch4 Ch3 Ch2 and Ch1 Ch5 gt 4 gt 3 gt 2 gt 1 Halts a program when a condition is satisfied in the order of Event Condition 5 4 3 2 1 An event condition must be set for Ch5 Ch4 Ch3 Ch2 and Ch1 Ch6 gt 5 gt 4 gt 3 gt 2 gt 1 Halts a program when a condition is satisfied in the order of Event Condition 6 5 4 3 2 1 An event condition must be set for Ch6 Ch5 Ch4 Ch3 Ch2 and Ch1 Ch10 gt 6 gt 5 gt 4 gt 3 gt 2 gt 1 Halts a program when a condition is satisfied in the order of Event Condition 10 6 5 4 3 2 1 An event condition must be set for Ch10 Ch6 Ch5 Ch4 Ch3 Ch2 and Ch1 Ch11 gt 10 gt 6 gt 5 gt 4 gt 3 gt 2 gt 1 Halts a program when a condition is satisfied in the order of Event Condition 11 10 6 5 4 3 2 1 An event condition must be set for Ch11 Ch10 Ch6 Ch5 Ch4 Ch3 Ch2 and
10. care in preparing the information included in this document but Renesas Electronics does not warrant that such information is error free Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein Renesas Electronics products are classified according to the following three quality grades Standard High Quality and Specific The recommended applications for each Renesas Electronics product depends on the product s quality grade as indicated below You must check the quality grade of each Renesas Electronics product before using it in a particular application You may not use any Renesas Electronics product for any application categorized as Specific without the prior written consent of Renesas Electronics Further you may not use any Renesas Electronics product for any application for which it is not intended without the prior written consent of Renesas Electronics Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for an application categorized as Specific or for which the product is not intended where you have failed to obtain the prior written consent of Renesas Electronics The quality grade of each Renesas Electronics product is Standard unless otherwise expressly specified in a Renesas Electronics dat
11. miss by an operand cache miss READ read however the number of waited cycles of cache fill is included due to contention Waited cycles for WCMW The number of waited cycles operand cache miss by an operand cache miss WRITE write Number of waited WILR The number of waited cycles cycles by an I L by an I L memory access memory access for read of an operand operand fetch READ Number of waited WILW The number of waited cycles by an I L memory access write of an operand R20UT0840EJ0100 Rev 1 00 2tENESAS Page 51 of 54 SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 Classification Type Measurement Item Option Note System bus System bus Number of requests RQ The number of valid bus performance cycles cells is counted by only available the system bus clock for Ch3 and Ch4 System bus System bus Number of RS The number of valid bus performance cont responses cycles cells is counted by only available the system bus clock for Ch3 and Ch4 cont Waited cycles for WRQ The cycles for an issued request request req that no acceptance signal gnt is issued to are counted by the system bus clock Even if the waits are issued simultaneously for multiple requests they are counted as 1 Waited cycles for WRS The cycles for an issued response response r_req that no acceptance signal r_gnt is issued to are counted by the system bus cloc
12. the information contained in this document or Renesas Electronics products or if you have any other inquiries Note 1 Renesas Electronics as used in this document means Renesas Electronics Corporation and also includes its majority owned subsidiaries Note 2 Renesas Electronics product s means any product developed or manufactured by or for Renesas Electronics Regulatory Compliance Notices European Union regulatory notices This product complies with the following EU Directives These directives are only valid in the European Union CE Certifications Electromagnetic Compatibility EMC Directive 2004 108 EC EN 55022 Class A WARNING This is a Class A product In a domestic environment this product may cause radio interference in which case the user may be required to take adequate measures EN 55024 e Information for traceability e Authorised representative Name Renesas Electronics Corporation Address 1753 Shimonumabe Nakahara ku Kawasaki Kanagawa 211 8668 Japan e Manufacturer Name Renesas Solutions Corp Address Nippon Bldg 2 6 2 Ote machi Chiyoda ku Tokyo 100 0004 Japan e Person responsible for placing on the market Name Renesas Electronics Europe Limited Address Dukes Meadow Millboard Road Bourne End Buckinghamshire SL8 5FH U K Environmental Compliance and Certifications e Waste Electrical and Electronic Equipment WEEE Directive 2002 96 EC WEEE Marking Notice Euro
13. the stall or the execution cycle is changed 2 Since the clock source of the counter is the CPU clock counting also stops when the clock halts in the sleep mode d Extension setting of the performance result storing counter The 32 bit counter stores the result of performance and two counters can be used as a 64 bit counter To set a 64 bit counter check the Enable check box in the Extend counter group box of the Performance Analysis dialog box for Ch and Ch3 2 Displaying the result of performance The result of performance is displayed in the Performance Analysis window or the PERFORMANCE_ANALYSIS command in hexadecimal 32 bits However when the extension counter is enabled it is displayed in hexadecimal 64 bits Note Ifa performance counter overflows as a result of measurement will be displayed for upper bits 3 Initializing the measured result To initialize the measured result select Initialize from the popup menu in the Performance Analysis window or specify INIT with the PERFORMANCE_ANALYSIS command R20UT0840EJ0100 Rev 1 00 Page 54 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Additional Document for User s Manual Supplementary Information on Using the SH7734 Publication Date Rev 1 00 September 28 2011 Published by Renesas Electronics Corporation 2tENESAS SALES OFFICES Renesas Electronics Corporation http www renesas com Refer to http w
14. 11 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 2 In the memory range for output do not specify the ranges that the user program has been downloaded or the user program accesses 3 Do not specify the internal RAM area for the output range 4 The range for trace output must be 1 MB or less 2 2 3 Notes on Using the JTAG H UDD Clock TCK and AUD Clock AUDCK 1 Set the JTAG clock TCK frequency to lower than the frequency of the SH7734 peripheral module clock CKP 2 Set the AUD clock AUDCK frequency to 50 MHz or lower If the frequency is higher than 50 MHz the emulator will not operate normally 3 The set value of the JTAG clock TCK is initialized by executing Reset CPU or Reset Go Thus the TCK value will be 5 MHz If the Search the best JTAG clock option is used when the emulator is initiated the TCK value will be initialized as a value that has been automatically acquired 2 2 4 Notes on Setting the Breakpoint Dialog Box 1 When an odd address is set the next lowest even address is used 2 A BREAKPOINT is accomplished by replacing instructions of the specified address Accordingly it can be set only to the RAM areas in CSO to CS6 and the internal RAM areas A BREAKPOINT cannot be set to the following addresses ROM areas in CSO to CS6 Areas other than CSO to CS6 except for the internal RAM A slot instruction of a delayed branch instruction
15. 2CENESAS E 7 D mL T lt D 3 D SuperH Family E10A USB Emulator Additional Document for User s Manual Supplementary Information on Using the SH7734 SuperH Family 10A USB for SH7734 HS7734KCU01HE All information contained in these materials including products and product specifications represents information on the product at the time of publication and is subject to change by Renesas Electronics Corp without notice Please review the latest information published by Renesas Electronics Corp through various means including the Renesas Electronics Corp website http www renesas com Renesas Electronics www renesas com Rev 1 00 Sep 2011 10 11 12 Notice All information included in this document is current as of the date this document is issued Such information however is subject to change without any prior notice Before purchasing or using any Renesas Electronics products listed herein please confirm the latest product information with a Renesas Electronics sales office Also please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website Renesas Electronics does not assume any liability for infringement of patents copyrights or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in t
16. Ch1 R20UT0840EJ0100 Rev 1 00 Sep 28 2011 Page 25 of 54 2tENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 Table 2 5 Sequential Event Conditions cont Type Event Condition Description CPU CPU Extend Expands the CPU Sequential Extend page Sequential The sequential setting is enabled with any Event Page combination cont For details refer to section 2 2 1 Sequential Break Extension Setting in this manual SystemBus SystemBus Ch9 gt 8 Halts a program when a condition is satisfied for Sequential Sequential Event Condition 9 8 Event Page Event An event condition must be set for Ch9 and Ch8 Ch8 gt 9 Halts a program when a condition is satisfied for Event Condition 8 9 An event condition must be set for Ch8 and Chg SystemBus Expands the SystemBus Sequential Extend page Extend The sequential setting is enabled with any combination For details refer to section 2 2 1 Sequential Break Extension Setting in this manual R20UT0840EJ0100 Rev 1 00 Sep 28 2011 Page 26 of 54 2ENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 Sequential Break Extension Setting Sequential setting CPU S quential Event SystemBus Sequential Event CPU Sequential Extend Cht AOA PreHit Channel Ch2QA OA DT_CT 7 CPU Match flag Match flag set gt 1 Ch2 IA_OA_DT_CT PreHit Channel
17. Data ASID Status address Bus Break Count Trace Trace Action Event O X X X X 0 X X X X 0 Condition B T 9 dialog and P box Event O X oO 0 X X X X X X 0 Condition B and 10 dialog P box Event O oO oO oO X X X oO X X oO Condition B and 11 dialog P box Event X X X X X X X X oO X 0 Condition B T 12 dialog and P box Software X X X X X X X X X oO Trace trace fixed dialog box Notes 1 O Can be set in the dialog box X Cannot be set in the dialog box 2 For the Action item B Setting a break is enabled T Setting a trace is enabled P Setting a performance start or end condition is enabled R20UT0840EJ0100 Rev 1 00 Page 24 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 Sequential Setting In the emulator sequential setting of an Event Condition is enabled Table 2 5 Sequential Event Conditions Type Event Condition Description CPU Sequential Event Page 2 Channel Sequential Ch2 gt 1 Halts a program when a condition is satisfied in the order of Event Condition 2 1 An event condition must be set for Ch2 and Ch1 Ch4 gt 3 Halts a program when a condition is satisfied in the order of Event Condition 4 3 An event condition must be set for Ch4 and Ch3 Ch6 gt 5 Halts a program when a condition is satisfied in the order of Event Condition 6 5 An event condition must
18. In the Configuration dialog box if User is set while the PPC mode list box has been set Ch1 and Ch2 of the performance analysis function and options 1 and 2 of the profile function cannot be used 2 2 8 Performance Measurement Function The emulator supports the performance measurement function 1 Setting the performance measurement conditions To set the performance measurement conditions use the Performance Analysis dialog box and the PERFORMANCE_SET command When a channel line on the Performance Analysis window is clicked with the right mouse button the popup menu is displayed and the Performance Analysis dialog box is displayed by selecting Setting R20UT0840EJ0100 Rev 1 00 Page 42 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 Performance Anal Condition Cycle M Don t Care Selection of a count item GPU performance Cycle Count C Instruction Branch Exception interruption C Stalled Cycle C TLB performance Instruction bus performance Operand bus performance Access count C Access miss count C Waited cycle C Extend counter Enable Figure 2 8 Performance Analysis Dialog Box Note For the command line syntax refer to the online help R20UT0840EJ0100 Rev 1 00 Page 43 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734
19. O ASEBRK GND BRKACK GND UVCC GND RESET PRESET GND GN MPMD GND N C Reset signal BSMODE AUDCK AUDATAO AUDATA1 AUDATA2 AUDATA3 AUDSYNC mo IM IN N IN oO IN Io jo IN a a fo TCK TMS TRST TDI TDO ASEBRK ACK L a 10 14 User system Figure 1 5 Recommended Circuit for Connection between the H UDI Port Connector and MPU when the Emulator is in Use 36 Pin Type Notes 1 When the emulator is connected BSMODE must be fixed to 0 2 The emulator uses AUDATA3 to AUDATAO pins the user function that AUDATA7 to AUDATA4 pins are multiplexed will not be available R20UT0840EJ0100 Rev 1 00 Page 9 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 1 Connecting the Emulator with the User System 1 5 2 Recommended Circuit 14 Pin Type Figure 1 6 shows a recommended circuit for connection between the H UDI port connector 14 pins and the MPU when the emulator is in use Notes 1 2 Do not connect anything to the N C pins of the H UDI port connector The MPMD pin must be 0 when the emulator is connected and 1 when the emulator is not connected respectively 1 When the emulator is used MPMD 0 2 When the emulator is not used MPMD 1 Figure 1 6 shows an example of circuits that allow the MPMD pin to be GND 0 whenever the emulator is connected by using the user system interface cable When the MPMD pin is changed by switches etc ground p
20. SR H 700000F0 GBR H 00000000 VBR H 00000000 MACH H 00000000 MACL H 00000000 PR H 00000000 DBR H 00000000 SGR H 00000000 SPC H 00000000 SSR H 000000F0 FPUL H 00000000 FPSCR H 00040001 FRO to FR15 H 00000000 XFO to XF15 H 00000000 DRO to DR14 H 00000000 XDO to XD15 H 00000000 2 The emulator uses the H UDI do not access the H UDI R20UT0840EJ0100 Rev 1 00 Page 17 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 3 Low Power States Sleep Software Standby Module Standby and Deep Standby For low power consumption the SH7734 has sleep software standby module standby and deep standby states The sleep software standby and deep standby states are switched using the SLEEP instruction When the emulator is used the sleep state can be cleared with either the normal clearing function or with the STOP button and a break will occur Do not use the STOP button in other low power states Note The memory must not be accessed or modified in low power state using the SLEEP instruction 4 Reset Signals The SH7734 reset signals are only valid during emulation started with clicking the GO or STEP type button If these signals are enabled on the user system in command input wait state they are not sent to the SH7734 Note Do not break the user program when the PRESET signal is being low and the WAIT control signal is being active A TIMEOUT error will occur
21. The user program is not executed in realtime Trace buffer Trace continue full This function overwrites the oldest trace information to store the latest trace information Trace stop After the trace buffer becomes full the trace information is no longer acquired The user program is continuously executed R20UT0840EJ0100 Rev 1 00 Sep 28 2011 Re Page 38 of 54 lt ENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 To set the memory output trace acquisition mode click the Trace window with the right mouse button and select Setting from the pop up menu to display the Acquisition dialog box The AUD trace acquisition mode can be set in the Trace mode1 or Trace mode2 group box in the Trace mode page of the Acquisition dialog box Acquisition Trace Mode Trace type C AUD trace C Internal trace Us Trace Mode 1 Realtime trace C Non realtime trace Trace Mode 2 Trace continue Trace stop AUD Mode G Abit C gpt MAUD trace display range stah Pinter D255 amp End painter Do User memory area Start H3000 End Address H33 FF m Trace Extend Mode IT Trace data with PPC Figure 2 7 Trace Mode Page Notes 1 The memory range for which trace is output is the address on the system bus and not supported for the MMU or cache R20UT0840EJ0100 Rev 1 00 Page 39 of 54 Sep 28 20
22. U must be as short as possible Do not connect the signal lines to other components on the board 5 The AUD signals AUDCK AUDATA3 to AUDATAO and AUDSYNC operate in high speed Isometric connection is needed if possible Do not separate connection nor connect other signal lines adjacently 6 Supply only the VccQ voltage to the UVCC pin because the H UDI and AUD of the MPU operate at the VccQ voltage I O power supply Make the emulator s switch settings so that the user power will be supplied SW2 1 and SW3 1 7 The resistance values shown in figure 1 5 are for reference 8 For the pin processing in cases where the emulator is not used refer to the hardware manual of the related MPU 9 For the AUDCK pin guard the pattern between the H UDI port connector and the MPU at GND level R20UT0840EJ0100 Rev 1 00 Page 8 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 1 Connecting the Emulator with the User System When the circuit is connected as shown in figure 1 5 the switches of the emulator are set as SW2 1 and SW3 1 For details refer to section 3 8 Setting the DIP Switches in the SuperH Family E10A USB Emulator User s Manual VccQ 3 3 V I O power supply All pulled up at 4 7 KQ to 10 kQ VCCQVCCQ VCCQ H UDI port connector 36 pin type SH7734 GND AUDCK GND AUDATAO GND AUDATA1 GND AUDATA2 GND AUDATA3 GND AUDSYNC GND N C GND N C GND TCK GND TMS GND TRST GND TDI GND TD
23. UT0840EJ0100 Rev 1 00 Page 20 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 The watchdog timer operates only when the user program is executed Do not change the value of the frequency change register in the IO window or Memory window The internal I O registers can be accessed from the IO window After the I O register definition file is created the MPU s specifications may be changed If each I O register in the I O register definition file differs from addresses described in the hardware manual change the I O register definition file according to the description in the hardware manual The I O register definition file can be customized depending on its format Note that however the emulator does not support the bit field function Verify In the IO window the verify function of the input value is disabled 14 Illegal Instructions If illegal instructions are executed by STEP type commands the emulator cannot go to the next program counter 1 Nn Reset CPU and Reset Go in the Debug Menu In the Configuration dialog box when Auto is set as Reset Mode the H UDI reset is issued at selection of Reset CPU or Reset Go For the H UDI reset the watchdog timer except for the overflow counter and the clock oscillator is not initialized To initialize all the resources select User from the Reset Mode combo box in the Configuration dia
24. a sheets or data books etc Standard Computers office equipment communications equipment test and measurement equipment audio and visual equipment home electronic appliances machine tools personal electronic equipment and industrial robots High Quality Transportation equipment automobiles trains ships etc traffic control systems anti disaster systems anti crime systems safety equipment and medical equipment not specifically designed for life support Specific Aircraft aerospace equipment submersible repeaters nuclear reactor control systems medical equipment or systems for life support e g artificial life support devices or systems surgical implantations or healthcare intervention e g excision etc and any other applications or purposes that pose a direct threat to human life You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics especially with respect to the maximum rating operating supply voltage range movement power voltage range heat radiation characteristics installation and other product characteristics Renesas Electronics shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges Although Renesas Electronics endeavors to improve the quality and reliability of its products semiconductor products have specific characteristics such as the
25. ause of termination displayed in the status bar and the Output window is ILLEGAL INSTRUCTION not BREAKPOINT 10 If an address of a BREAKPOINT cannot be correctly set in the ROM or flash memory area a mark will be displayed in the BP area of the address on the Source or Disassembly window by refreshing the Memory window etc after Go execution However no break will occur at this address When the program halts with the event condition the mark disappears R20UT0840EJ0100 Rev 1 00 Page 41 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 2 2 5 Notes on Setting the Event Condition Dialog Box and the BREAKCONDITION_ SET Command 1 When Go to cursor Step In Step Over or Step Out is selected the settings of Event Condition 3 are disabled 2 When an Event Condition is satisfied emulation may stop after two or more instructions have been executed 3 If aPC break address condition is set to the slot instruction after a delayed branch instruction user program execution cannot be terminated before the slot instruction execution execution stops before the branch destination instruction 2 2 6 Note on Setting the UBC_MODE Command In the Configuration dialog box if User is set while the UBC mode list box has been set Ch10 GA_OA_R and Ch11 OA_OA_CT_R of Event Condition cannot be used 2 2 7 Note on Setting the PPC_MODE Command
26. ber of memory performance count access for operand accesses by an operand read fetch READ equal to loading on the operand bus Accesses by the PREF instruction or canceled accesses are not included Number of memory MW The number of memory access for operand accesses by an operand write fetch WRITE equal to storing memory on the operand bus Canceled accesses are not included Number of operand CR The number of operand cache access cache reads during memory READ access read of an operand Number of operand CW The number of operand cache access cache reads during memory WRITE access write of an operand R20UT0840EJ0100 Rev 1 00 Page 49 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 Classification Type Measurement Item Option Note Operand bus Access Number of internal XLR The number of accesses to performance count cont RAM access for XY or O L memory in the cont operand fetch SH7734 during memory READ XY RAM or access read of an operand O L memory Accesses via the XY bus and the operand bus are included When MOVX and MOVY are executed simultaneously it increments one count regardless of the read or write Number of internal XLW The number of accesses to RAM access for XY or O L memory in the operand fetch SH7734 during memory WRITE XY RAM access write of an operand or O L memory Accesses via the XY b
27. ber of operand cache accesses read number of operand cache accesses write number of operand cache misses read number of operand cache misses write number of operand cache accesses read number of operand cache accesses write System bus occupied rate of request bus The equivalent CPU clock value of the number of requests number of elapsed cycles System bus occupied rate of response bus The equivalent CPU clock value of the number of responses number of elapsed cycles R20UT0840EJ0100 Rev 1 00 Sep 28 2011 Qe Page 53 of 54 lt ENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 Each measurement condition is also counted when conditions in table 2 13 are generated Table 2 13 Performance Measurement Conditions to be Counted Measurement Condition Notes No caching due to the Counted for accessing the cacheable area settings of TLB cacheable bit Cache on counting Accessing the non cacheable area is counted less than the actual number of cycles and counts Accessing the cacheable X Y RAM and U RAM areas is counted more than the actual number of cycles and counts Branch count The counter value is incremented by 2 This means that two cycles are valid for one branch Notes 1 In the non realtime trace mode of the AUD trace and memory output trace normal counting cannot be performed because the generation state of
28. e User System Section 1 Connecting the Emulator with the User System 1 1 Components of the Emulator The emulator supports the SH7734 Table 1 1 lists the components of the emulator Table 1 1 Components of the Emulator Classi Quan fication Component Appearance tity Remarks Hard Emulator box HS0005KCU01H ware Depth 65 0 mm Width 97 0 mm Height 20 0 mm Mass 72 9 g or HS0005KCU02H Depth 65 0 mm Width 97 0 mm Height 20 0 mm Mass 73 7 g User system interface gt 1 14 pin type cable Length 20 cm Mass 33 1 g User system interface 1 36 pin type cable Load Length 20 cm Mass 49 2 g only for HSOOO5KCU02H USB cable 1 Length 150 cm Mass 50 6 g Soft E10A USB emulator setup 1 HS0005KCU01SR ware program CSD SuperH Family E10A HS0005KCU01HJ USB Emulator User s HSOOO5KCU01HE Manual Supplementary HS7734KCU01 HJ Information on Using the HS7734KCU01HE SH7734 and Test program manual for HS0005TM01HJ and HSO005KCU01H and HS0005TM01HE HS0005KCU02H provided on a CD R Note Additional document for the MPUs supported by the emulator is included Check the target MPU and refer to its additional document R20UT0840EJ0100 Rev 1 00 Page 1 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 1 Connecting the Emulator with the User System 1 2 Connecting the Emulator with the User System To connect the E10A USB emulator hereinafter referred to as the emula
29. ed As shown in figure 1 1 an upper limit 5 mm applies to the heights of components mounted around the user system connector R20UT0840EJ0100 Rev 1 00 Page 3 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 1 Connecting the Emulator with the User System E10A USB optional 38 pin user system interface cable a 2 5767004 2 _ gt F E Area to be kept free of other components Target system H UDI port connector top view Figure 1 1 Restriction on Component Mounting 1 4 Pin Assignments of the H UDI Port Connector Figures 1 2 through 1 4 show the pin assignments of the 36 pin 14 pin and 38 pin H UDI port connectors respectively Note Note that the pin number assignments of the H UDI port connector shown on the following pages differ from those of the connector manufacturer R20UT0840EJ0100 Rev 1 00 Page 4 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Signal AUDCK Input SH7734 Output Pin No Note Output M23 Section 1 Signal TMS Connecting the Emulator with the User System Input SH7734 Output Pin No Input G4 GND GND AUDATAO GND Out TRST 2 GND 4 Input AUDATA1 Out TDI Input GND GND AUDATA2 Ou TDO Output GND GND ojoj Iajn AJOJN AUDATA3 Output ASEBRK BRKACK 2 Input output GND GND AUDSYNC 29 UVCC Outp
30. eption branch acquisition the next address to the address in which an exception occurs is acquired 3 Trace information cannot be acquired for the following branch instructions e The BF and BT instructions whose displacement value is 0 e Branch to H A0000000 by reset R20UT0840EJ0100 Rev 1 00 Page 34 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 AUD Trace Functions This function is operational when the AUD pin of the device is connected to the emulator It is activated by selecting the AUD trace radio button in the Trace type group box of the Trace mode page Set the trace condition to be used Table 2 8 shows the AUD trace acquisition mode that can be set in each trace function Table 2 8 AUD Trace Acquisition Mode Type Mode Description Continuous Realtime trace trace occurs When the next branch occurs while the trace information is being output all the information may not be output The user program can be executed in realtime but some trace information will be lost Non realtime trace When the next branch occurs while the trace information is being output the CPU stops operations until the information is output The user program is not executed in realtime Trace buffer Trace continue full This function overwrites the oldest trace information to store the latest trace information Trace stop After the trace b
31. ev 1 00 Sep 28 2011 ztENESAS SH7734 AUDCK AUDSYNC AUDATAO AUDATA1 AUDATA2 AUDATA3 TCK TMS TRST TDI TDO ASEBRK ACK PRESET MPMD BSMODE Figure 1 7 Recommended Circuit for Connection between the H UDI Port Connector and Page 13 of 54 SuperH Family E10A USB Emulator Section 1 Connecting the Emulator with the User System Notes 1 When the emulator is connected BSMODE must be fixed to 0 2 The emulator uses AUDATA3 to AUDATADO pins the user function that AUDATA7 to AUDATA4 pins are multiplexed will not be available R20UT0840EJ0100 Rev 1 00 Page 14 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 1 Connecting the Emulator with the User System R20UT0840EJ0100 Rev 1 00 Page 15 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 Section 2 Software Specifications when Using the SH7734 2 1 Differences between the SH7734 and the Emulator 1 When the emulator system is initiated it initializes the general registers and part of the control registers as shown in table 2 1 The initial values of the actual SH7734 registers are undefined Table 2 1 Register Initial Values at Emulator Link Up Register Emulator at Link Up RO to R14 H 00000000 R15 SP H A0000000 RO_BANK to R7_BANK H 00000000 PC Differs with the settings for boot mode
32. f Event Condition that has been set as the measurement end condition of performance channel 1 PA2 pa2_start_point Specifies the conditions of Event Condition that has been set as the measurement start condition of performance channel 2 pa2_end_point Specifies the conditions of Event Condition that has been set as the measurement end condition of performance channel 2 PA3 pa3_start_point Specifies the conditions of Event Condition that has been set as the measurement start condition of performance channel 3 pa3_end_point Specifies the conditions of Event Condition that has been set as the measurement end condition of performance channel 3 PA4 pa4_start_point Specifies the conditions of Event Condition that has been set as the measurement start condition of performance channel 4 pa4_end_point Specifies the conditions of Event Condition that has been set as the measurement end condition of performance channel 4 R20UT0840EJ0100 Rev 1 00 Page 44 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 Event condition 1 Address ASID Bus State Action C pal _end_point Cc mpa Figure 2 9 Action Page Note PA1 or PA2 cannot be set for Ch8 and Ch9 R20UT0840EJ0100 Rev 1 00 Page 45 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 b Measurement tolerance The measured value incl
33. face cable is connected to this pin and the MPMD pin is set to 0 do not connect to GND but to the MPMD pin directly 5 The GND bus lead at the center of the H UDI port connector must be grounded Unit mm 25 4 H UDI port connector top view Figure 1 4 Pin Assignments of the H UDI Port Connector 38 Pins R20UT0840EJ0100 Rev 1 00 Page 7 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 1 Connecting the Emulator with the User System 1 5 1 5 1 Recommended Circuit between the H UDI Port Connector and the MPU Recommended Circuit 36 Pin Type Figure 1 5 shows a recommended circuit for connection between the H UDI and AUD port connectors 36 pins and the MPU when the emulator is in use Notes 1 Do not connect anything to the N C pins of the H UDI port connector 2 The MPMD pin must be 0 when the emulator is connected and 1 when the emulator is not connected respectively 1 When the emulator is used MPMD 0 2 When the emulator is not used MPMD 1 Figure 1 5 shows an example of circuits that allow the MPMD pin to be GND 0 whenever the emulator is connected by using the user system interface cable When the MPMD pin is changed by switches etc ground pin 22 Do not connect this pin to the MPMD pin 3 When a network resistance is used for pull up it may be affected by a noise Separate TCK from other resistances 4 The pattern between the H UDI port connector and the MP
34. her or not the user system is connected When the user system interface cable is connected to this pin and the MPMD pin is set to 0 do not connect to GND but to the MPMD pin directly Pin 1 mark H UDI port connector top view H UDI port connector 23 0 l 6 x 2 54 15 24 top view joe Pin 1 mark Unit mm Figure 1 3 Pin Assignments of the H UDI Port Connector 14 Pins R20UT0840EJ0100 Rev 1 00 Page 6 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 1 Connecting the Emulator with the User System Pin Input SH7734 Pin Input SH7734 No Signal Output Pin No Note No Signal Output Pin No N C 20 NC N C 21 TRST 2 Input MPMD GND 4 22 NC N C 23 NC UCON GND 3 24 AUDATA3 Output AUDCK Output 25 NC N C 26 AUDATA2 Output ASEBRK Input 27 N C BRKACK 2 Output _ RESET 2 Output User reset 28 AUDATA1 Output N C 29 N C TDO Output 30 AUDATAO Output UVCC_AUD Output 31 N C N C 32 AUDSYNC Output UVCC Output 33 N C TCK Input 34 N C N C 35 N C TMS Input 36 N C N C 37 NC TDI Input H3 38 N C 1 Input to or output from the user system 2 The symbol means that the signal is active low 3 The emulator monitors the GND signal of the user system and detects whether or not the user system is connected 4 When the user system inter
35. his document No license express implied or otherwise is granted hereby under any patents copyrights or other intellectual property rights of Renesas Electronics or others You should not alter modify copy or otherwise misappropriate any Renesas Electronics product whether in whole or in part Descriptions of circuits software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples You are fully responsible for the incorporation of these circuits software and information in the design of your equipment Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits software or information When exporting the products or technology described in this document you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations You should not use Renesas Electronics products or the technology described in this document for any purpose relating to military applications or use by the military including but not limited to the development of weapons of mass destruction Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture use or sale is prohibited under any applicable domestic or foreign laws or regulations Renesas Electronics has used reasonable
36. in 9 Do not connect this pin to the MPMD pin When a network resistance is used for pull up it may be affected by a noise Separate TCK from other resistances The pattern between the H UDI port connector and the MPU must be as short as possible Do not connect the signal lines to other components on the board Supply only the VccQ voltage to the UVCC pin because the H UDI of the MPU operates at the VccQ voltage I O power supply Make the emulator s switch settings so that the user power will be supplied SW2 1 and SW3 1 The resistance values shown in figure 1 6 are for reference For the pin processing in cases where the emulator is not used refer to the hardware manual of the related MPU R20UT0840EJ0100 Rev 1 00 Page 10 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 1 Connecting the Emulator with the User System When the circuit is connected as shown in figure 1 6 the switches of the emulator are set as SW2 1 and SW3 1 For details refer to section 3 8 Setting the DIP Switches in the SuperH Family E10OA USB Emulator User s Manual VecQ 3 3 V I O power supply All pulled up at 4 7 kQ to 10 kQ VCCQ VCCQ VCCQ VCCQ VCCQ VCCQ H UDI port connector 14 pin type SH7734 GND 0 GND TDO ASEBRK BRKACK TS MPMD Reset signal BSMODE User system Figure 1 6 Recommended Circuit for Connection between the H UDI Port Connector and MPU when the Emulator is in Use 14 Pin T
37. k Even if the waits are issued simultaneously for multiple requests they are counted as 1 R20UT0840EJ0100 Rev 1 00 Page 52 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 Table 2 12 shows the measurement items and methods that are mainly used Table 2 12 Main Measurement Items Main Measurement Item Measurement Method Elapsed time Number of elapsed cycles x CPU clock cycles Number of execution instructions Number of valid instructions issued number of cases of simultaneous execution of two instructions Number of interrupts accepted Number of exceptions accepted Number of instruction fetches for both cache and non cache Number of memory accesses in an opcode Instruction cache hit ratio Number of instruction cache accesses instruction cache miss counts instruction cache access counts Number of operand accesses for both cache and non cache Number of memory accesses in an operand read number of memory accesses in an operand write Operand cache hit ratio read Number of operand cache accesses read number of operand cache misses read number of operand cache accesses read Operand cache hit ratio write Number of operand cache accesses write number of operand cache misses write number of operand cache accesses write Operand cache hit ratio Num
38. laysia Sdn Bhd Unit 906 Block B Menara Amcorp Amcorp Trade Centre No 18 Jin Persiaran Barat 46050 Petaling Jaya Selangor Darul Ehsan Malaysia Tel 60 3 7955 9390 Fax 60 3 7955 9510 Renesas Electronics Korea Co Ltd 11F Samik Lavied or Bldg 720 2 Yeoksam Dong Kangnam Ku Seoul 135 080 Korea Tel 82 2 558 3737 Fax 82 2 558 5141 2011 Renesas Electronics Corporation and Renesas Solutions Corp All rights reserved Colophon 1 1 SuperH Family E10A USB Emulator Additional Document for User s Manual Supplementary Information on Using the SH7734 2tENESAS Renesas Electronics Corporation R20UT0840EJ0100
39. log box At this time if Reset CPU or Reset Go is executed the reset signal will be waited for being input from the user system 1 lon Boot Mode When the emulator is started up or the reset function of the CPU is used while the setting is for the CSO boot mode a break in processing by the emulator occurs before execution of the instruction at H A0000000 While the setting is for the HIF boot mode a break occurs before execution of the first instruction in HIFRAM If the setting is for another boot mode a break occurs before execution of the first instruction in the boot ROM Run the program in the boot ROM in accord with the procedure for executing programs If Reset Go is executed while a boot mode has been set the address where execution of the program starts depends on the setting for the boot mode R20UT0840EJ0100 Rev 1 00 Page 21 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 2 2 Specific Functions for the Emulator when Using the SH7734 2 2 1 Event Condition Functions The emulator is used to set 12 event conditions Ch1 to Ch12 and the software trace Table 2 3 lists the conditions of Event Condition Table 2 3 Types of Event Conditions Event Condition Type Description Address bus condition Address Breaks when the SH7734 address bus value or the program counter value matches the specified value
40. mode list box of the Configuration dialog box In this case close the Trace window If a completion type exception occurs during exception branch acquisition the next address to the address in which an exception occurs is acquired Do not use the AUD full trace mode for the VIO function R20UT0840EJ0100 Rev 1 00 Page 37 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 Memory Output Trace Functions This function is activated by selecting the Use Memory trace radio button in the Trace type group box of the Trace mode page In this function write the trace data in the specified user memory range Specify the start address to output a trace for the Start edit box in the User memory area group box and the end address for the End Address edit box Set the trace condition to be used Table 2 9 shows the memory output trace acquisition mode that can be set in each trace function Table 2 9 Memory Output Trace Acquisition Mode Type Mode Description Continuous Realtime trace trace occurs When the next branch occurs while the trace information is being output all the information may not be output The user program can be executed in realtime but some trace information will be lost Non realtime trace When the next branch occurs while the trace information is being output the CPU stops operations until the information is output
41. ns are executed simultaneously simultaneously among the valid instructions issued Branch Number of BT The number of unconditional unconditional branch branches other than branches occurring after an exception However RTE is counted Exception Number of EA Interrupts are included interruption exceptions accepted Number of interrupts INT NMI is included accepted Number of UBC UBC Performs OR to count the channel hit number of channel hits in the CPU Stalled Cycles stalled in full SFM All items are counted cycle trace mode with independently multi counts R20UT0840EJ0100 Rev 1 00 Page 47 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 Classification Type Measurement Item Option Note CPU Stalled Cycles stalled in full SF This item is not counted if the performance cycle cont trace mode without stall cycle is generated cont multi counts simultaneously with a stall cycle that has occurred due to instruction execution TLB TLB Number of UTLB UMI The number of TLB miss performance miss for instruction exceptions generated by an fetch instruction fetch number of EXPEVT sets Number of UTLB UMO The number of TLB miss miss for operand exceptions generated by an fetch operand access number of EXPEVT sets Number of ITLB IM The number of ITLB misses miss for valid accesses does not include UTLB hits or misses Instruction bu
42. occurrence of failure at a certain rate and malfunctions under certain use conditions Further Renesas Electronics products are not subject to radiation resistance design Please be sure to implement safety measures to guard them against the possibility of physical injury and injury or damage caused by fire in the event of the failure of a Renesas Electronics product such as safety design for hardware and software including but not limited to redundancy fire control and malfunction prevention appropriate treatment for aging degradation or any other appropriate measures Because the evaluation of microcomputer software alone is very difficult please evaluate the safety of the final products or system manufactured by you Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances including without limitation the EU RoHS Directive Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations This document may not be reproduced or duplicated in any form in whole or in part without prior written consent of Renesas Electronics Please contact a Renesas Electronics sales office if you have any questions regarding
43. opens by double clicking on the Ch12 Branch column of the Eventpoint window The branch condition to be acquired can be set Branch trace Branch trace Action Branch M Don t care M Acquire subroutine branch instruction trace M Acquire exception branch instruction trace a Figure 2 3 Branch trace Dialog Box A branch trace can be acquired by selecting the Acquire trace check box of the Action page Note To cancel settings select Delete from the popup menu that is opened by clicking on the Ch12 Branch column with the right mouse button R20UT0840EJ0100 Rev 1 00 Sep 28 2011 2tENESAS Page 31 of 54 SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 Range Memory Access Trace Functions The memory access within the specified range is acquired by a trace The read cycle write cycle or read write cycle can be selected as the bus type ASID value or bus cycle for trace acquisition Setting Method i To open the Event condition 5 or Event condition 6 dialog box double click on the Ch5 OA or Ch6 OA column of the Eventpoint window ii Remove the check mark of the Don t care check box in the Window address page and enter the memory range to be set Event condition 5 Window address ASID Bus State Action Window address Start address H 00000000 End address H 00000000 Figure 2 4
44. pean Union Only Renesas development tools and products are directly covered by the European Union s Waste Electrical and Electronic Equipment WEEE Directive 2002 96 EC As a result this equipment including all accessories must not be disposed of as household waste but through your locally recognized recycling or disposal schemes As part of our commitment to environmental responsibility Renesas also offers to take back the equipment and has implemented a Tools Product Recycling Program for customers in Europe This allows you to return equipment to Renesas for disposal through our approved Producer Compliance Scheme To register for the program click here http www renesas com weee United States Regulatory notices on Electromagnetic compatibility FCC Certifications United States Only This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own ex
45. pecified in the UBC mode list box in the Configuration dialog box the UBC can be used in the user program Do not use the UBC in the user program as it is used by the emulator when EML is specified in the UBC mode list box in the Configuration dialog box 1 _ Memory Access during Break In the enabled MMU when a memory is accessed and a TLB error occurs during break it can be selected whether the TLB exception is controlled or the program jumps to the user exception handler in TLB Mode in the Configuration dialog box When TLB miss exception is enable is selected a Communication Timeout error will occur if the TLB exception handler does not operate correctly When TLB miss exception is disable is selected the program does not jump to the TLB exception handler even if a TLB exception occurs Therefore if the TLB exception handler does not operate correctly a Communication Timeout error will not occur but the memory contents may not be correctly displayed 12 Loading Sessions Information in JTAG clock of the Configuration dialog box cannot be recovered by loading sessions Thus the TCK value will be 5 MHz If the Search the best JTAG clock option is used when the emulator is initiated the TCK value will be initialized as a value that has been automatically acquired 13 IO Window Display and modification Do not change values of the User Break Controller because it is used by the emulator R20
46. pense CAUTION Changes or modifications not expressly approved by the party responsible for compliance could void the user s authority to operate the equipment Table of Contents Section 1 Connecting the Emulator with the User System s ssssssssssssisisesesisesesesesensnensesensnssenenesene 1 1 1 Components of the Emulator 1 2 Connecting the Emulator with the User System 1 3 Installing the H UDI Port Connector on the User System 1 4 Pin Assignments of the H UDI Port Connector 1 5 Recommended Circuit between the H UDI Port Connector and the MPU 1 5 1 Recommended Circuit 36 Pin Type 1 5 2 Recommended Circuit 14 Pin Type 1 53 Recommended Circuit 38 Pin Type Section 2 Software Specifications when Using the SH7734 2 1 Differences between the SH7734 and the Emulator 2 2 Specific Functions for the Emulator when Using the SH7734 2 2 1 Event Condition Functions 2 2 2 Trace Functions 2 2 3 Notes on Using the JTAG H UDI Clock TCK and AUD Clock AUDCK 2 2 4 Notes on Setting the Breakpoint Dialog Box 22 5 Notes on Setting the Event Condition Dialog Box and the BREAKCONDITION_ SET Command 42 2 2 6 Note on Setting the UBC_MODE Comma nd cceecesssescsseesesesseeseeeeecnecseeseseeecseeseeesecseseesaeeaeseeeasaeeaes 2 2 7 Note on Setting the PPC_MODE Command 2 2 8 Performance Measurement Function SuperH Family E10A USB Emulator Section 1 Connecting the Emulator with th
47. power supply to the UVCC and UVCC_AUD pins because the H UDI and AUD of the MPU operate at the VCCQ voltage respectively Make the emulator s switch settings so that the user power will be supplied SW2 1 and SW3 1 The resistance values shown in figure 1 7 are for reference For the AUDCK pin guard the pattern between the H UDI port connector and the MPU at GND level The GND bus lead at the center of the H UDI port connector must be grounded 10 For the pin processing in cases where the emulator is not used refer to the hardware manual of the related MPU R20UT0840EJ0100 Rev 1 00 Page 12 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 1 Connecting the Emulator with the User System When the circuit is connected as shown in figure 1 7 the switches of the emulator are set as SW2 1 and SW3 1 For details refer to section 3 8 Setting the DIP Switches in the SuperH Family E10A USB Emulator User s Manual VecQ 3 3 V I O power supply All pulled up at 4 7 kQ to 10 kQ VccQ VccQ VccQ VecQ H UDI port connector 38 pin type AUDCK AUDSYNC AUDATAO AUDATA1 AUDATA2 AUDATA3 TCK TMS TRST TD TDO ASEBRK BRKACK RESET MPMD GND UVCC UVCC_AUD UCON GND GND N C 6 2 HHH OOo Reset signal GND BUS Leads 777 1 2 4 7 10 13 16 18 20 22 23 25 27 29 31 33 34 35 36 37 38 User system MPU when the Emulator is in Use 38 Pin Type R20UT0840EJ0100 R
48. rH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 Notes on AUD Trace 1 When the trace display is performed during user program execution the mnemonics operands or source is not displayed The AUD branch trace function outputs the differences between newly output branch source addresses and previously output branch source addresses The window trace function outputs the differences between newly output addresses and previously output addresses If the previously output address is the same as the upper 16 bits the lower 16 bits are output If it matches the upper 24 bits the lower 8 bits are output If it matches the upper 28 bits the lower 4 bits are output The emulator regenerates the 32 bit address from these differences and displays it in the Trace window If the emulator cannot display the 32 bit address it displays the difference from the previously displayed 32 bit address If the 32 bit address cannot be displayed the source line is not displayed In the emulator when multiple loops are performed to reduce the number of AUD trace displays only the IP counts up In the emulator the maximum number of trace displays is 65534 lines 32767 branches However the maximum number of trace displays differs according to the AUD trace information to be output Therefore the above pointers cannot be always acquired The AUD trace acquisition is not available when User is selected in the UBC
49. s Instruction Number of memory MIF The number of memory performance accesses for accesses by an instruction instruction fetch fetch Accesses canceled by an instruction fetch bus are not counted Instruction fetches which have been fetched in anticipation of a branch but not actually executed are counted Accesses by the PREFI instruction are included Number of IC The number of accesses for instruction cache an instruction cache during access memory access of the opcode Number of ICM The number of cache misses instruction cache by an instruction cache miss access the number of accesses to the outside of the CPU core due to a cache miss R20UT0840EJ0100 Rev 1 00 Page 48 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 Classification Type Measurement Item Option Note Instruction bus Instruction Number of internal XL The number of accesses for performance cont RAM access for the XY or O L memory in the cont instruction fetch SH7734 during memory XY RAM or O L accesses of the opcode memory Number of I L ILIF The number of accesses for memory access for the I L memory in the SH7734 instruction fetch during memory accesses of the opcode Number of U ULF The number of accesses for memory access for the U memory in the SH7734 instruction fetch during memory accesses of the opcode Operand bus Access Number of memory MR The num
50. s supported As well as the 36 pin type a large amount of trace information can be acquired in realtime Since the 38 pin type connector is smaller than the 36 pin type 1 2 5 the size of the area where the connector is installed on the user system can be reduced To use the 38 pin type connector however an optional cable HSOOOSECKO1H is required R20UT0840EJ0100 Rev 1 00 Page 2 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 1 Connecting the Emulator with the User System 1 3 Installing the H UDI Port Connector on the User System Table 1 3 shows the recommended H UDI port connectors for the emulator Table 1 3 Recommended H UDI Port Connectors Connector Type Number Manufacturer Specifications 36 pin connector DX10M 36S Hirose Electric Co Ltd Screw type DX10M 36SE Lock pin type DX10G1M 36SE 14 pin connector 2514 6002 Minnesota Mining amp 14 pin straight type Manufacturing Ltd 38 pin connector 2 5767004 2 Tyco Electronics Corporation 38 pin Mictor type Note When designing the 36 pin connector layout on the user board do not connect any components under the H UDI connector When designing the 14 pin connector layout on the user board do not place any components within 3 mm of the H UDI port connector When designing the 38 pin connector layout on the user board reduce cross talk noise etc by keeping other signal lines out of the region where the H UDI port connector is situat
51. t s3 aL3 Ox00001086 p_sam gt s4 aL4 0x0000108a p_sam gt s5 aL5 0x0000108e p_sam gt s6 aL6 0x00001092 p_sam gt s aL7 0x00001096 p_sam gt s8 aL8 0x0000109a p_sam gt s9 aL9 0x0000109e delete p_sam Figure 2 2 Source Window at Execution Halted Sequential Break R20UT0840EJ0100 Rev 1 00 Page 29 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 2 2 2 Trace Functions The emulator supports the trace functions listed in table 2 6 Table 2 6 Trace Functions Memory Output Function Internal Trace AUD Trace Trace Branch trace Supported eight branches Supported Supported Range memory access trace Supported eight events Supported Supported Software trace Supported eight events Supported Supported Table 2 7 shows the type numbers that the AUD function can be used Table 2 7 Type Number and AUD Function Type Number AUD Function HS0005KCU01H Not supported HS0005KCU02H Supported R20UT0840EJ0100 Rev 1 00 Page 30 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 Branch Trace Functions The branch source and destination addresses their source lines branch types and types of accessed bus masters are displayed Setting Method Select the check box in the Branch group box in the Branch trace page of the Branch trace dialog box that
52. tor the H UDI port connector must be installed on the user system to connect the user system interface cable When designing the user system refer to an example of recommended connection between the connector and the MPU shown in this manual In addition read the E10A USB emulator user s manual and hardware manual for the related device Table 1 2 shows the type number of the emulator the corresponding connector type and the use of AUD function Table 1 2 Type Number AUD Function and Connector Type Type Number Connector AUD Function HS0005KCU02H 36 pin connector Available HS0005KCU01H HS0005KCU02H 14 pin connector Not available HSO0005KCU02H 38 pin connector Available The H UDI port connector has the 36 pin 14 pin and 38 pin types as described below Use them according to the purpose of the usage 1 36 pin type with AUD function The AUD trace function is supported A large amount of trace information can be acquired in realtime The window trace function is also supported for acquiring memory access in the specified range memory access address or memory access data by tracing 2 14 pin type without AUD function The AUD trace function cannot be used because only the H UDI function is supported Since the 14 pin type connector is smaller than the 36 pin type 1 2 5 the size of the area where the connector is installed on the user system can be reduced 3 38 pin type with AUD function The AUD trace function i
53. tor Section 2 Software Specifications when Using the SH7734 Table 2 4 Dialog Boxes for Setting Event Conditions Function Bus Window Address Data State Address Branch Bus Bus ASID Condition Condition LDTLB Count Condition Dialog Condition Condition Condition Bus Window System Instruction Condition Branch Software Box Address Data ASID Status address Bus Break Count Trace Trace Action Event 0 X O O X X X X X X oO Condition B and 1 dialog P box Event 0 0 O O X X X 0 X X 0 Condition B and 2 dialog P box Event 0 X 6 X X X X X X X oO Condition B and 3 dialog P box Event oO X oO X X X X X X X oO Condition B and 4 dialog P box Event X X ie 0 oO X X X X X oO Condition B T 5 dialog and P box Event X X O oO 6 X X X X X oO Condition B T 6 dialog and P box Event X X X X X X O X X X Break Condition fixed 7 dialog box Event oO X X X X oO X X X X oO Condition B T 8 dialog and P box R20UT0840EJ0100 Rev 1 00 Page 23 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 Table 2 4 Dialog Boxes for Setting Event Conditions cont Function Bus Window Address Data State Address Branch Bus Bus ASID Condition Condition LDTLB Count Condition Dialog Condition Condition Condition Bus Window System Instruction Condition Branch Software Box Address
54. udes tolerance Tolerance will be generated before or after a break For details see table 2 13 c Measurement items Items are measured in the Performance Analysis dialog box for each channel from Ch1 to Ch4 A maximum of four conditions can be specified at the same time Table 2 11 shows the measurement items Options in table 2 11 are parameters for lt mode gt of the PERFORMANCE_SET command They are displayed in CONDITION of the Performance Analysis window R20UT0840EJ0100 Rev 1 00 Page 46 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 Table 2 11 Measurement Items Classification Type Measurement Item Option Note Disabled None Not measured CPU Cycle Elapsed cycles AC Except for power on period performance counted by the CPU clock Cycles executed in PM The number of privileged privileged mode mode cycles among the number of elapsed cycles Cycles for asserting BL The number of cycles when the SR BL bit the SR BL bit 1 among the number of elapsed cycles Instruction Number of effective The number of execution instructions issued instructions number of valid instructions issued number of cases of simultaneous execution of two instructions The number of valid instructions means the number of completed instructions Number of 2 2l The number of times that two instruction executed instructio
55. uffer becomes full the trace information is no longer acquired The user program is continuously executed AUD pin 4 bits The trace data is acquired from the 4 bit AUDATA pin 8 bits The trace data is acquired from the 8 bit AUDATA pin This mode is not available when the SH7734 is used Note When the AUD trace is enabled the emulator forcibly changes the pin functions of the specified port as the AUD functions R20UT0840EJ0100 Rev 1 00 Sep 28 2011 Re Page 35 of 54 lt ENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 To set the AUD trace acquisition mode click the Trace window with the right mouse button and select Setting from the pop up menu to display the Acquisition dialog box The AUD trace acquisition mode can be set in the Trace mode1 Trace mode2 or AUD mode group box in the Trace mode page of the Acquisition dialog box Trace Mode m Trace type EA e C Internal trace C User Memory trace m Trace Mode 1 Realtime trace C Non realtime trace m Trace Mode 2 Trace continue Trace stop AUD Mode Abit Bbit AUD trace display range Start pointer D 255 End pointer Do User memory area stari Ho End Address H3FF m Trace Extend Mode l Trace data with PPC Figure 2 6 Trace Mode Page R20UT0840EJ0100 Rev 1 00 Page 36 of 54 Sep 28 2011 RENESAS Supe
56. us and the operand bus are included When MOVX and MOVY are executed simultaneously it increments one count regardless of the read or write Number of I L ILRW The number of accesses to I memory access for L memory in the SH7734 operand fetch during memory access READ WRITE read write of an operand Access Number of operand CMR The number of cache misses miss count cache miss READ by an operand cache access read number of accesses to the outside of the CPU core due to a cache miss Cache misses are not counted by the PREF instruction R20UT0840EJ0100 Rev 1 00 Page 50 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 cycles by an I L memory access for operand fetch WRITE Classification Type Measurement Item Option Note Operand bus Access Number of operand CMW The number of cache misses performance miss count cache miss WRITE by an operand cache access cont cont write number of accesses to the outside of the CPU core due to a cache miss Write through accesses are not counted Cache misses are not counted by the PREF instruction Waited cycles for WOR The number of waited cycles operand fetch by a memory access read of READ an operand Waited cycles for WOW The number of waited cycles operand fetch by a memory access write of WRITE an operand Waited cycles for WCMR The number of waited cycles operand cache
57. ut GND 30 GND N C 31 RESET 2 Output User reset 32 GND 33 GND 8 Output 34 GND Input Gi 35 N C 36 1 Input to or output from the user system 2 The symbol means that the signal is active low 3 The emulator monitors the GND signal of the user system and detects whether or not the user system is connected 4 When the user system interface cable is connected to this pin and the MPMD pin is set to 0 do not connect to GND but to the MPMD pin directly Edge of the board connected to the connector 37 61 43 51 E Pattern inhibited area H UDI port connector top view GND H UDI port connector top view A Pin 1 mark M2 6 x 0 45 H UDI port connector front view Figure 1 2 Pin Assignments of the H UDI Port Connector 36 Pins R20UT0840EJ0100 Rev 1 00 Sep 28 2011 Page 5 of 54 2tENESAS SuperH Family E10A USB Emulator Section 1 Connecting the Emulator with the User System Input SH7734 Pin No Signal Output PinNo Note 1 TCK Input G1 TRST Input H2 TDO Output G2 ASEBRK Input K4 BRKACK output TMS Input G4 TDI Input H3 RESET s Output User reset y Ne Z GND a UVCC 4 y Opt SS o1 GDS LS GND Output Input to or output from the user system The symbol means that the signal is active low The emulator monitors the GND signal of the user system and detects whet
58. value at execution and the contents of one general register are acquired by trace Describe the Trace x function x is a variable name to be compiled and linked beforehand For details refer to the SuperH RISC engine C C Compiler Assembler Optimizing Linkage Editor User s Manual When the load module is downloaded on the emulator and is executed while a software trace function is valid the PC value that has executed the Trace x function the general register value for x and the source lines are displayed To activate the software trace function select the Acquire Software trace radio button in the Software trace dialog box that is opened by double clicking on the software Trace column of the Eventpoint window Note To cancel settings select the Don t care radio button in the Software trace dialog box or select Delete from the popup menu that is opened by clicking on the software Trace column with the right mouse button Internal Trace Function This function is activated by selecting the Internal trace radio button in the Trace type group box of the Trace mode page Set the trace condition to be used Notes 1 If an interrupt is generated at the program execution start or end including a step operation the emulator address may be acquired In such a case the following message will be displayed Ignore this address because it is not a user program address 2 Ifacompletion type exception occurs during exc
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60. y according to the following methods Writing to memory e Cache hit Writes to the cache then issues a single external write The LRU is not updated e Cache miss Issues a single write Neither writing to the cache nor updating of the LRU proceeds Reading from memory e Cache hit Reads from the cache The LRU is not updated e Cache miss Issues a single read Neither filling of the cache nor updating of the LRU proceeds Therefore when memory read or write is performed during user program break the cache state does not change At breakpoint set Disables the instruction cache R20UT0840EJ0100 Rev 1 00 Page 19 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 2 Software Specifications when Using the SH7734 9 Port The AUD pins are multiplexed as shown in table 2 2 Table 2 2 Multiplexed Functions Function 1 Function 2 Vl1_CLK_A SDO_CLK_B FD0_B LCD_DATA0_B AUDCK AUD VI1_0_A SDO_CMD_B FD1_B LCD_DATA1_B AUDSYNC AUD VI1_4_A SDO_DAT3_B FD5_B LCD_DATA5_B AUDATAS AUD VI1_3_A SDO_DAT2_B FD4_B LCD_DATA4_B AUDATA2 AUD VI1_2_A SDO_DAT1_B FD3_B LCD_DATA3_B AUDATA1 AUD VI1_1_A SDO_DAT0O_B FD2_B LCD_DATA2_B AUDATAO AUD Note Function 1 can be used when the AUD pins of the device are not connected to the emulator When the AUD trace is enabled the emulator changes settings so that function 2 is forcibly used 10 UBC When User is s
61. ype Note When the emulator is connected BSMODE must be fixed to 0 R20UT0840EJ0100 Rev 1 00 Page 11 of 54 Sep 28 2011 RENESAS SuperH Family E10A USB Emulator Section 1 Connecting the Emulator with the User System 1 5 3 Recommended Circuit 38 Pin Type Figure 1 7 shows a recommended circuit for connection between the H UDI and AUD port connectors 38 pins and the MPU when the emulator is in use Notes 1 2 9 Do not connect anything to the N C pins of the H UDI port connector The MPMD pin must be 0 when the emulator is connected and 1 when the emulator is not connected respectively 1 When the emulator is used MPMD 0 2 When the emulator is not used MPMD 1 Figure 1 7 shows an example of circuits that allow the MPMD pin to be GND 0 whenever the emulator is connected by using the user system interface cable When the MPMD pin is changed by switches etc ground pin 3 Do not connect this pin to the MPMD pin When a network resistance is used for pull up it may be affected by a noise Separate TCK from other resistances The pattern between the H UDI port connector and the MPU must be as short as possible Do not connect the signal lines to other components on the board The AUD signals AUDCK AUDATA3 to AUDATAO and AUDSYNC operate in high speed Isometric connection is needed if possible Do not separate connection nor connect other signal lines adjacently Supply only the VCCQ voltage I O

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