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M5282EVB User`s Manual Devices Supported

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4. LED Function D1 D5 Ethernet Phy functionary See AMD AM79C874VC documentation D6 D9 User LEDs See Table 1 22 D11 3 3V Power Good D14 5V Power Good D15 Abort IRQ7 asserted D16 Reset RSTI asserted M5282EVB User s Manual Rev 2 1 20 Freescale Semiconductor Chapter 2 Initialization and Setup 2 1 System Configuration The M5282EVB board requires the following items for minimum system configuration The M5282EVB board provided e Power supply 6V to 14V DC with minimum of 300 mA e RS232C compatible terminal or a PC with terminal emulation software RS232 communication cable provided M5282EVB User s Manual Rev 2 Freescale Semiconductor 2 1 Initialization and Setup Figure 2 1 displays the minimum system configuration RS 232 Terminal or PC e _ dBUG u TE T alke mE m 55 Se ot N Be m Lu n raz CJ feo as ue M52B2EVB Rev 1 110018 Oe m bl On 2 Us M u ETE QU Li Serial ui m Lr c22 22 h EXT coc 6 to 14VDC MCF S282 Input Power
5. Jumper Function ON OFF JP1 Transceiver mode Standby High Speed No Slope Control JP2 CAN Termination Terminating resistor No terminating resistor between CANL and CANH The CANL and CANH signals are brought our from the CAN transceiver to a female DB 9 connector P9 in the configuration below Table 1 14 CAN Bus Connector Pinout DB 9 pin Signal 1 4 6 7 9 Not Connected 2 CANL 3 Ground 7 CANH 1 4 3 10 100T Ethernet Port The MCF5272 device performs the full set of IEEE 802 3 Ethernet CSMA CD media access control and channel interface functions The MCF5282 Ethernet Controller requires an external interface adaptor and transceiver function to complete the interface to the ethernet media The MCF5282 Ethernet module also features an integrated fast 100baseT Ethernet media access controller MAC The Fast Ethernet controller FEC incorporates the following features Full compliance with the IEEE 802 3 standard Support for three different physical interfaces M5282EVB User s Manual Rev 2 Freescale Semiconductor 1 13 M5282EVB Introduction 100 Mbps 802 3 media independent interface MIT 10 Mbps 802 3 MII 10 Mbps seven wire interface Half duplex 100 Mbps operation at system clock frequency 50 MHz 448 bytes total on chip transmit and receive FIFO memory to support a range of bus latencies Note the total FIFO size is 448 bytes It is not intended to hold entire fra
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7. bigital DNA Ee MCU TARGET BOARD CONNECTORS FLASH 12 Les 1 08 Fast Blow 3 Fi Coes Cora nar Un STE Candia Figure 2 1 Minimum System Configuration M5282EVB User s Manual Rev 2 2 2 Freescale Semiconductor Initialization and Setup 2 2 Installation and Setup The following sections describe all the steps needed to prepare the board for operation Please read the following sections carefully before using the board When you are preparing the board for the first time be sure to check that all jumpers are in the default locations Default jumper markings are documented on the master jumper table and printed on the underside of the board After the board is functional in its default mode the Ethernet interface may be used by following the instructions provided in Appendix A 2 2 1 Unpacking Unpack the computer board from its shipping box Save the box for storing or reshipping Refer to the following list and verify that all the items are present You should have received e M5282EVB Single Board Computer e M5282EVB User s Manual this document One RS232 communication cable One BDM Background Debug Mode wiggler cable e MCF5282UM ColdFire Integrated Microprocessor User Manual e ColdFire Programmers Reference Manual e A selection of Third Party Developer Tools and Literature NOTE Avoid touching the MOS devices Static discharg
8. LOul o eINv lt gt _ gt o elsoldso 0 21501950 1 lt _ gt 61 lt gt 81 ENILG 94 SL BES 2 vase gt vl l H lt lt 0521950 gt 2 2591980 eino1a gt 01 6 EIS 8 1 255 10 450 59450 9 101980 0819 v OdldSO 19149 5 loela Lo lt _ gt loelvid9 lt gt lt gt our Aiquesse peni jou 14001 V 05 5 V VQGA 81 5 SNV gt 2819 2485 RE 0 139 149 esr LN THA jut anyo 199 999 990 lo eINV 61 21 LENY i SSNV 9SNV 6 OLSH 2 1159 5 e ONY lt gt sr VSSN Rev 2 s Manual M5282EVB User Freescale Semiconductor B 10 Schematics jajonuoooi3 282 S4OM EIOIOIO 10 preog GOL 9951 545 7 Ur A AST or sayaims uoqynasay pue samog jounoog p uvseouway
9. make the call produced by C compiler else If C compiler does not produce a LINK UNLK pair the use the following code asm move l4 sp d1 put ch into dl asm move 140x0013 d0 select the function asm 15 make the call fendif 3 5 2 IN CHAR This function function code 0x0010 returns an input character from terminal to the caller The returned character is in D1 Assembly example move l 50010 0 Select the function trap 15 Make the call the input character is in dl C example int board in char void asm move 1 0x0010 d0 select the function M5282EVB User s Manual Rev 2 3 40 Freescale Semiconductor Using the Monitor Debug Firmware asm 15 make the call asm move ld1 d0 put the character in dO 3 5 3 CHAR PRESENT This function function code 0x0014 checks if an input character is present to receive A value of zero is returned in DO when no character is present A non zero value in DO means a character is present Assembly example move l 50014 0 Select the function trap 15 Make the call 40 contains the response yes no C example int board char present void asm move 1 0x0014 d0 select the function asm 15 make the call 3 5 4 EXIT TO dBUG This function function code 0x0000 transfers the control back to the dBU
10. seDed uo xoed 1ojsise1 pue dn jnd pejoeuuooun je spee eqoJd edoos jo uonoeuuoo 0 GOd JO 194 05 641 3 841 ld 3 LON Freescale Semiconductor Schematics 3OQ31MONP9V H3dJSNVH L Ip lt gt vL lt gt o elso 319YN3 LNdLNO ib lt T gt 641 I 8dL d O 49019 X09019 31IHM LON Qvad JHVIS H3dSNVH L lt gt sb lt 8 5 A Ager Ag e 0 2 50 o elsa 1159 OLSH M5282EVB User s Manual Rev 2 B 12 Schematics 15945 2002 Zi Beg 01 Wvuasnowupus Jequinn jueumoog 229 ZBZSAOWN 21001014 10 pyeog gA3ZSzsiW anu PPO GOAL 9851 545 VIOHOLOW 1309179S6E9AH uoeuyui 13091956801 eqIUSOL OHOZ9LE9AZGAH SeE9Lv9Sp Bunswes iuudiooj god eui SWYHAS 310N Y T Y I a anyo anyo anro anyo
11. zo 19145 ezar oewos 1 ZEZSH 3dAL Q 6 3nec o 1HOd WNINHAL NE ERIN 560 v60 1nozu oH Nel gece oy 4 S 1 ES NO30u04 A o TI 1noiu 20 2 NILE 20 E 2 20 Lg T oL gr E o x 10 81 33030503 zo szar sm pony Bumes ynejeg TUUS lo slaido T z 7 5 M5282EVB User s Manual Rev 2 Freescale Semiconductor B 14 Appendix C Evaluation Board BOM Table C 1 MCF5282EVB BOM Qty Reference Part Function 1 32 C1 C3 C4 C5 C6 C17 C31 0 1uF SMT Decoupling Capacitors C32 C33 C35 C37 C38 C39 C40 C47 C48 C57 C59 C60 C64 C65 C69 C71 C75 C78 C80 C88 C89 C90 C91 C92 C93 C94 C95 C96 C97 C98 C99 C101 C103 2 26 C2 C7 C8 C9 C10 C36 C41 1nF SMT Decoupling Capacitors C42 C43 C44 C45 C46 C58 C61 C62 C66 067 C72 C79 C84 C85 C86 C87 C100 C102 C104 3 5 C11 C12 C13 C14 C15 100pF SMT Capacitors 4 2 C16 C21 10uF TANT SMT Capacitors 5 10 C18 C22 C23 C24 C25 C26 68nF SMT Capacitors C27 C28 C29 C30 6 5 C34 C53 C54 C55 C56 470pF SMT Capacitors 7 7 C49 C50 C51 C52 C70 C76 10nF SMT Capacitors C81 8 3 C68 C74 AVX TPSE337K10CLR SMT Capacitors 9 1 C73 Rubycon 1000uF 35V SMT Capacitors 10 1 77 4 7uF Tant Capacitor 11 2 C83 C82 10pF SMT Capaci
12. Request to Send Input Clear to send Output 9 of A nm Not connected Figure 2 3 shows the jumper locations for the board M5282EVB User s Manual Rev 2 Freescale Semiconductor 2 5 Initialization and Setup 32013 1x3 Be Ee qu al e AHH LX N 13539 15089 eat2 zora J EN egac dH 00 pan Chu 62 27 489 83920 LJ TOOITSY OT HhJcHZc5 DE CLE US t t r nun UO 20 th 129 sa 241241 HSU 1J zn MOIR 3593 YO I CBCGJIOV reat M 0 su 4 1 Was a Lb 1 3 443 303 umiyawdo 134 143513 in3 ueljwdede 114 Td 98 322513 z up diug 4143 30 SHDIJ3NNUJ 139591 NIW Figure 2 3 Jumper Locations M5282EVB User s Manual Rev 2 Freescale Semiconductor 2 6 Initialization and Setup 2 3 System Power up and Initial Operation When all of the cables are connected to the board power may be applied The dBUG ROM Monitor initializes the board and then displays a power up message on the terminal which includes the amount of memory present on the board Hard Reset DRAM Size 16M Copyright 1995 2003 Motorola Inc 11 Rights Reserved ColdFire MCF5282 EVS Firmware v2e la xx Build XXX on XXX XX 2
13. FL Erase Usage FL erase addr bytes Write Usage FL write dest src bytes The FL command provides a set of flash utilities that will display information about the Flash devices on the EVB erase a specified range of Flash or erase and program a specified range of Flash When issued with no parameters the FL command will display usage information as well as device specific information for the Flash devices available This information includes size address range protected range access size and sector boundaries When the erase command is given the FL command will attempt to erase the number of bytes specified on the command line beginning at addr If this range doesn t start and end on Flash sector boundaries the range will be adjusted automatically and the user will be prompted for verification before proceeding When the write command is given the FL command will program the number of bytes specified from src to dest An erase of this region will first be attempted As with the erase command if the Flash range to be programmed doesn t start and end on Flash sector boundaries the range will be adjusted and the user will be prompted for verification before the erase is performed The specified range is also checked to insure that the entire destination range is valid within the same Flash device and that the src and dest are not within the same device M5282EVB User s Manual Rev 2 3 18 Freescale Semiconductor Using the Monitor De
14. M5282EVB User s Manual Rev 2 3 22 Freescale Semiconductor Using the Monitor Debug Firmware HELP Help Usage HELP command The HELP command displays a brief syntax of the commands available within dBUG In addition the address of where user code may start is given If command is provided then a brief listing of the syntax of the specified command is displayed Examples To obtain a listing of all the commands available within dBUG the command is help To obtain help on the breakpoint command the command is help br M5282EVB User s Manual Rev 2 Freescale Semiconductor 3 23 Using the Monitor Debug Firmware LR Loop Read Usage LR width addr The LR command continually reads the data at addr until a key is pressed The optional width specifies the size of the data to be read If no width is specified the command defaults to reading word sized data Example To continually read the longword data from address 0x20000 the command is lr 1l 20000 M5282EVB User s Manual Rev 2 3 24 Freescale Semiconductor Using the Monitor Debug Firmware LW Loop Write Usage LW width addr data The LW command continually writes data to addr The optional width specifies the size of the access to memory The default access size is a word Examples To continually write the longword data 0x12345678 to address 0x20000 the command is lw l 20000 12345678 Note that the following command w
15. mmap Memory Map Display This command displays the memory map information for the M5282EVB evaluation board The information displayed includes the type of memory the start and end address of the memory and the port size of the memory The display also includes information on how the Chip selects are used on the board and which regions of memory are reserved for dBUG use protected Here is an example of the output from this command Type Start End Port Size SDRAM 0x00000000 OxOOFFFFFF 32 bit SRAM Int 0x20000000 0x2000FFFF 32 bit SRAM Ext 0x30000000 0x3007FFFF 32 bit IPSBAR 0x40000000 Ox7FFFFFFF 32 bit Flash Int OxF0000000 OxF007FFFF 32 bit Flash Ext OxFFEO0000 OxFFFFFFFF 16 bit Protected Start End dBUG Code OxFFEOO0000 OxFFE3FFFF dBUG Data 0x00000000 0x0000FFFF Chip Selects CSO Ext Flash CS1 Ext SRAM M5282EVB User s Manual Rev 2 3 28 Freescale Semiconductor Using the Monitor Debug Firmware RD Register Display Usage RD reg The RD command displays the register set of the target If no argument for reg is provided then all registers are displayed Otherwise the value for reg is displayed dBUG preserves the registers by storing a copy of the register set in a buffer The RD command displays register values from the register buffer Examples To display all the registers and their values the command is rd To display only the program counter rd pc Here is an
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17. 49010 340 440 Wad s vL Sz epo LIMS SIMS SIMS epo IMS 41MS omoes The E i apon pepoou3 epo 49010 pepooua 8 n 9L SL poi pepoou3 z pow sseippy pepoou3 evivad y et 0154 apoi sseippy LL sse ppy 1459 2154 sng oL sng emed osal 101 6 eoweg 100g pepoou3 6 eowed 1008 pepoou3 Isa 8 TA use asnaq 100g pepoou3 8 100g pepoou3 gt H apo edo pepoou3 L apo edo popoou3 86 Tile apon edo pepoou3 9 apon ado apoi 1990 pepoou3 S apo 940 pepooua 49019 papoou 49019 papooua 49019 popoou 49019 exeuelu Wag Ov diyo L diu NO IMS ddO Y 5 Freescale Semiconductor Schematics EL Jo 6 EES 2002 cl Aepsen e npow 283GJOW JequinN jueuinoog ZBZSAOW 10 010 y 40 9 32829 1 9219 ent APIO 0081 9851 S S Kiquiesse Jou 01 139 peni jou 14001
18. 7 0 which is not available Ignore the Ethernet signals Ignore GPIO port PEH 7 0 e Pinout changes M5282EVB User s Manual Rev 2 Freescale Semiconductor E 1 Using the M5282EVB to Evaluate Subset Devices E 4 Considerations for the MCF5214 The MCF5214 does not have a Ethernet module and only 256Kbytes of internal flash When using the M5282EV B to evaluate this device the user should not use the Ethernet Module Functional Ethernet pins should be used as GPIO with the exception of Port PEH 7 0 which is not available The user should also ignore the top have of the internal flash Ignore the top half of the internal flash This is from FLASHBAR 0x40000 to FLASHBAR 0x80000 Ignore the Ethernet signals Ignore GPIO port PEH 7 0 Pinout changes M5282EVB User s Manual Rev 2 E 2 Freescale Semiconductor Appendix F Revision History This appendix lists major changes between versions of the M5282EVBUM document F 1 Changes Between Rev 1 3 and Rev 2 Table F 1 Rev 1 3 to Rev 2 Changes Chapter Description In SW1 4 3 Encoded Clock Mode table removed last row and the RCON column since the CLKMOD pins are Introduction always sampled no matter the RCON value M5282EVB User s Manual Rev 2 Freescale Semiconductor F 1 Revision History M5282EVB User s Manual Rev 2 F 2 Freescale Semiconductor
19. 90078 mora sed VS z var pote ast N b n LE E T Ezar 10198185 VSSA AnBnassv Nana 1 ssecszwn en s czar MOHS 2247 aveg i 40 uonejos puno on amp oeuy doran ou E p og 1545 3015 MS Veios R t nut A zd Joioouuop per Jav aor amo noge acie Avenassy ozo L 690 890 exovesuan 4 lo 01 indu seyor ONENGGSTVISM 0 3emmossiza cid ies guo es uA edt n 3019008 HUA 9 0 eesoesav en oza paie Angnassv una 1 20190708 THA 38 oz 2 sud s 614720 bumas ynejag uonoajas 29 sud 8 Lar 10 Bumos nzjaq uonoojos aouasajay M5282EVB User s Manual Rev 2 B 11 Freescale Semiconductor e I jo m 19909 2002 1 Aepsen 159 pue sdn ing V JequinwN jueunooq ez Jej 031u090J9IIA CBZGAOW el01001 OU 104 peog gA3c8cSlA VE 128 dnoi5 GOAL 9451 545 Aeg BIA ue pejoeuuoo eq 0
20. JP26 JP27 Clock Selection ON 1 2 ON 16 MHz External Clock OFF 1 2 ON 16 MHz Oscillator ON 2 3 OFF Crystal Default setting There is also a 25MHz oscillator U3 which feeds the Ethernet chip U4 1 3 3 Watchdog Timer The dBUG Firmware does NOT enable the watchdog timer on the MCF5282 1 3 4 The ColdFire family of processors can receive seven levels of interrupt priorities When the processor receives an interrupt which has a higher priority than the current interrupt mask in the status register it will perform an interrupt acknowledge cycle at the end of the current instruction cycle This interrupt acknowledge cycle indicates to the source of the interrupt that the request is being acknowledged and the device should provide the proper vector number to indicate where the service routine for this interrupt level is located If the source of interrupt is not capable of providing a vector its interrupt should be set up as an autovector interrupt which directs the processor to a predefined entry in the exception table refer to the MCF5282 User s Manual Exception Sources M5282EVB User s Manual Rev 2 1 10 Freescale Semiconductor M5282EVB Introduction The processor goes to an exception routine via the exception table This table is stored in the Flash EEPROM The address of the table location is stored in the VBR The dBUG ROM monitor writes a copy of the exception table into the RAM starting at 0x0000 0000
21. Manual Rev 2 3 26 Freescale Semiconductor Using the Monitor Debug Firmware MM Memory Modify Usage MM width addr data The MM command modifies memory at the address addr The value for addr may be an absolute address specified as a hexadecimal value or a symbol name Width specifies the size of the data that is modified If no width is specified the default of word sized data is used The value for data may be a symbol name or a number converted according to the user defined radix normally hexadecimal If a value for data is provided then the MM command immediately sets the contents of addr to data If no value for data is provided then the MM command enters into a loop The loop obtains a value for data sets the contents of the current address to data increments the address according to the data size and repeats The loop terminates when an invalid entry for the data value is entered 1 a period This command first aligns the starting address for the data access size and then increments the address accordingly during the operation Thus for the duration of the operation this command performs properly aligned memory accesses Examples To set the byte at location 0x00010000 to be OxFF the command is mm b 10000 FF To interactively modify memory beginning at 0x00010000 the command is mm 10000 M5282EVB User s Manual Rev 2 Freescale Semiconductor Using the Monitor Debug Firmware MMAP Usage
22. PST3 5 2 13 14 PST PSTO M 15 16 4 DDATA3 DDATA2 7 ig DDATA DDATAO J3 19 20 4 GND Freescale reserved 5 22 4 02 Freescale reserved GND 3 amp 93 24 PSTCLK Core Voltage M9 25 26 gt TA Figure 1 3 44 BDM Connector Pin Assignment Pin 7 of the BDM connector on the M5282EVB may be configured to connect to the RESET or TCLK signal of the MCF5282 For BDM communication the default is to configure this pin for RESET Table 1 16 BDM Header Pin 7 Selection JP17 Source 1 2 Pin 7 is RESET 2 3 Pin 7 is TCLK The BDM connector can also be used to interface to JTAG signals If you may configure this Pin 7 of the BDM header for TCLK for custom hardware On reset the JTAG_EN signal selects between multiplexed debug module and JTAG signals See Table 1 5 14 5 12 The MCF5282 s C module includes the following features e Compatibility with the bus standard e Multi master operation e Software programmable for one of 64 different clock frequencies Software selectable acknowledge bit e Interrupt driven byte by byte data transfer e Arbitration lost interrupt with auto mode switching from master to slave Calling address identification interrupt M5282EVB User s Manual Rev 2 Freescale Semiconductor 1 15 M5282EVB Introduction e Start and stop signal generation and detectio
23. TRACE Trace Into Usage TRACE num The TRACE command allows single instruction execution If num is provided then num instructions are executed before control is handed back to dBUG The value for num is a decimal number The TRACE command sets bits in the processors supervisor registers to achieve single instruction execution and the target code executed Control returns to dBUG after a single instruction execution of the target code This command is repeatable Examples To trace one instruction at the program counter the command is tr To trace 20 instructions from the program counter the command is tr 20 M5282EVB User s Manual Rev 2 Freescale Semiconductor 3 37 Using the Monitor Debug Firmware UP Upload Data Usage UP begin end filename The UP command uploads the data from a memory region specified by begin and end to a file specified by filename over the network The file created contains the raw binary data from the specified memory region The UP command uses the Trivial File Transfer Protocol TFTP to transfer files to a network host M5282EVB User s Manual Rev 2 3 38 Freescale Semiconductor Using the Monitor Debug Firmware VERSION Display dBUG Version Usage VERSION The VERSION command displays the version information for dBUG The dBUG version build number and build date are all given The version number is separated by a decimal for example 2b 1c 1a In this exam
24. be used as a terminal provided a terminal emulation software package is available Examples of this software are PROCOMM KERMIT QMODEM Windows 95 98 2000 XP Hyper Terminal or similar packages The board should then be connected as described in Section 2 2 6 Connecting the Terminal Once the connection to the PC is made power may be applied to the PC and the terminal emulation software can be run In terminal mode it is necessary to select the baud rate and character format for the channel Most terminal emulation software packages provide a command known as Alt p press the p M5282EVB User s Manual Rev 2 2 4 Freescale Semiconductor Initialization and Setup key while pressing the Alt key to choose the baud rate and character format The character format should be 8 bits no parity one stop bit see section 1 9 5 The Terminal Character Format The baud rate should be set to 19200 Power can now be applied to the board Figure 2 2 Pin Assignment for Female Terminal Connector Pin assignments are as follows Table 2 3 Pin Assignment for Female Terminal Connector DB9 Pin Function Data Carrier Detect Output shorted to pins 4 and 6 Receive Data Output from board receive refers to terminal side Transmit Data Input to board transmit refers to terminal side Data Terminal Ready Input shorted to pin 1 and 6 Signal Ground Data Set Ready Output shorted to pins 1 and 4
25. differs from RESET in that no processor register or memory contents are changed the processor and peripherals are not reset and dBUG is not restarted Also in response to depressing the ABORT button the contents of MCF5282 core internal registers are displayed The abort function is most appropriate when software is being debugged The user can interrupt the processor without destroying the present state of the system This is accomplished by forcing a non maskable interrupt that will call a dBUG routine that will save the current state of the registers to shadow registers in the monitor for display to the user The user will be returned to the ROM monitor prompt after exception handling 3 2 2 3 Software Reset Command dBUG does have a command that causes the dBUG to restart as if a hardware reset was invoked The command is RESET 3 3 Command Line Usage The user interface to dBUG is the command line A number of features have been implemented to achieve an easy and intuitive command line interface dBUG assumes that an 80x24 ASCII character dumb terminal is used to connect to the debugger For serial communications dBUG requires eight data bits no parity and one stop bit 8 N 1 The baud rate default is 19200 bps a speed commonly available from workstations personal computers and dedicated terminals The command line prompt is dBUG gt Any dBUG command may be entered from this prompt dBUG does not allow command li
26. example of the output from this command PC 00000000 SR 2000 t Sm 000 xnzvc An 00000000 00000000 00000000 00000000 00000000 00000000 00000000 01000000 Dn 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 M5282EVB User s Manual Rev 2 Freescale Semiconductor 3 29 Using the Monitor Debug Firmware RM Register Modify Usage RM reg data The RM command modifies the contents of the register reg to data The value for reg is the name of the register and the value for data may be a symbol name or it is converted according to the user defined radix normally hexadecimal dBUG preserves the registers by storing a copy of the register set in a buffer The RM command updates the copy of the register in the buffer The actual value will not be written to the register until target code is executed Examples To change register DO on MC68000 and ColdFire to contain the value 0x1234 the command is rm DO 1234 M5282EVB User s Manual Rev 2 3 30 Freescale Semiconductor Using the Monitor Debug Firmware RESET Reset the Board and dBUG Usage RESET The RESET command resets the board and dBUG to their initial power on states The RESET command executes the same sequence of code that occurs at power on If the RESET command fails to reset the board adequately cycle the power or press the reset button Examples To reset the board and clear the dBUG data structures the command is reset M5282EV
27. i 34885883333 2828 2222 E SS 88 33 39 85 3s 2988 9 22383398938885 gooo PP2z22 9999 5555 33 48 P 9999 3 SSSESZEEEROSU 66669 2285 2388 9599 g go gt SE 65 98 56 2255 dH 58518555882 853 33982 5 2598 8 PEE S REEL 3 Sud 791590 TOE T HOW SISNS 00 TENT EES 5909 TISd UT PHS NVO ZISNS egg Schematics Freescale Semiconductor M5282EVB User s Manual Rev 2 B 2 Schematics L Jo yous 2002 cl Jequie oN Aepsen ejeq 1 5 1 NYO V JequinN 9219 B SAOW I04010JA y 104 enu 4 GOAL 9481 SdS 8101004 pen S 20 jnejeq NYO 29 edA q 6 201290000 sng NYD 8 5 1e ieosuei LON S Ldr 104 in Q0EZQAHS9NS 434A INYO 90A HNYO QNO Su anyo zo XHNVO C D Aget M5282EVB User s Manual Rev 2 B 3 Freescale Semiconductor Schematics OZ ZI TORO AEPSUTI drop GOAL 9951 585 Ni ovi he w m D nowzeesson na we
28. implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document Freescale Semiconductor reserves the right to make changes without further notice to any products herein Freescale Semiconductor makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation consequential or incidental damages Typical parameters that may be provided in Freescale Semiconductor data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s technical experts Freescale Semiconductor does not convey any license under its patent rights nor the rights of others Freescale Semiconductor products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur Should Buyer purchase or use Freescale Semicon
29. sd Stack Dump SET set option value Set Configurations SHOW show option Show Configurations STEP step Step Over SYMBOL symbol lt symb gt a symb value lt r symb gt C l s gt Symbol Management TRACE trace lt num gt Trace Into UP up begin end filename Upload Memory to File VERSION version Show Version M5282EVB User s Manual Rev 2 Freescale Semiconductor Using the Monitor Debug Firmware ASM Assembler Usage ASM lt lt addr gt stmt The ASM command is a primitive assembler The lt stmt gt is assembled and the resulting code placed at lt addr gt This command has an interactive and non interactive mode of operation The value for address lt addr gt may be an absolute address specified as a hexadecimal value or a symbol name The value for stmt must be valid assembler mnemonics for the CPU For the interactive mode the user enters the command and the optional lt addr gt If the address is not specified then the last address is used The memory contents at the address are disassembled and the user prompted for the new assembly If valid the new assembly is placed into memory and the address incremented accordingly If the assembly is not valid then memory is not modified and an error message produced In either case memory is disassembled and the process repeats The user may press the lt Enter gt or lt Return gt key to accept the current memory contents and skip to the next in
30. this board TA signals from expansion boards should be connected to this line 1 3 6 User s Program Jumper JP16 allows users to test code from boot POR without having to overwrite the ROM Monitor When the jumper is set between pins 1 and 2 the behavior of the system is normal dBUG boots and then runs from OxFFEO 0000 When the jumper is set between pins 2 and 3 the board boots from the second half of the Flash OXFFFO 0000 Procedure 1 Compile and link as though the code was to be placed at the base of the flash 2 Setup the jumper JP16 for Normal operation pinl connected to pin 2 3 Download to SDRAM If using serial or ethernet start the ROM Monitor first If using BDM via a wiggler cable download first then start ROM Monitor by pointing the program counter PC to OxFFEO 0400 and run 4 In the ROM Monitor execute the FL write dest src lt bytes gt command 5 Move jumper JP16 to pin 2 connected to pin 3 and push the reset button S2 User code should now be running from reset POR 1 4 Communication Ports The M5282EVB provides external communication interfaces for 2 UART serial ports QSPI FlexCan 2 0B port port 10 100T ethernet port and BDM JTAG port 1 4 1 UARTO and UART1 The MCF5282 device has three built in UARTs each with its own software programmable baud rate generators Two of these UART interfaces are brought out to RS232 transceivers One channel is the ROM Monitor to Termina
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32. 0XX Enter help for help dBUG gt The board is now ready for operation under the control of the debugger as described in Chapter 2 If you do not get the above response perform the following checks 1 Make sure that the power supply is properly configured for polarity voltage level and current capability 1A and is connected to the board 2 Check that the terminal and board are set for the same character format and baud 3 Press the RESET button to insure that the board has been initialized properly If you still are not receiving the proper response your board may have been damaged Contact Matrix Design for further instructions please see the beginning of this manual for contact details 2 4 Using The Port The MCF5282 microprocessor has a built in debug module referred to as BDM background debug module In order to use BDM simply connect the 26 pin debug connector on the board J4 to the P amp E BDM wiggler cable provided in the kit No special setting is needed Refer to the ColdFire User s Manual BDM Section for additional instructions NOTE BDM functionality and use is supported via third party developer software tools Details may be found on CD ROM included in this kit M5282EVB User s Manual Rev 2 Freescale Semiconductor 2 7 Initialization and Setup M5282EVB User s Manual Rev 2 2 8 Freescale Semiconductor Chapter 3 Using the Monitor Debug Firmware The M5282
33. 22 Preparing the Board for Use CERE 605053 2 3 2 2 3 Providing Power to the 2 3 2 2 4 Selecting Terminal Baud Rate 2 4 2 2 5 The Terminal Character Format 2 4 2 2 6 Gonfiecting the TSM RE Ed 2 4 2 2 7 Using a Personal Computer as a Terminal 2 4 M5282EVB User s Manual Rev 2 Freescale Semiconductor V 2 3 System Power up and Initial Operation 2 7 24 DU The EUM uidi ds needs die sd ele 2 7 Chapter 3 Using the Monitor Debug Firmware BL 4 duda M apa ae SS 3 1 32 Opetalonal FCCLA L4 dopo OR RECOGE Ee OR dale NER CICERO ode bah de Re 3 2 3 2 1 System POSBEPUD 5 oa kr add p eed 3 2 222 System 3 3 RESET BURON oosicoiucsscehfPRROTEAGCixedadhatsetbes 3 4 32 22 ABORT heed RA HEAR RC 3 4 3 2 2 3 Software Reset Command 3 4 33 Command Line Usage oda dd eee ded dod at ow c a RO dna 3 4 CNS 3 5 49 TRAP 15 FONGHONS RR 3 40 GST DIT OHAR uosuat u aded qd ede UR do de dram Rod n et 3 40 Coe IN CHAR 2 int ceed athe eye qux que dap Ed ddp 3 40 ams CHAR PRESENT iai cita de E ERG o ee
34. 282EVB User s Manual Rev 2 3 2 Freescale Semiconductor Using the Monitor Debug Firmware Figure 3 1 shows the dBUG operational mode INITIALIZE NO COMMAND LINE INPUT FROM TERMINAL EXECUTE COMMAND FUNCTION A DOES COMMAND LINE CAUSE USER PROGRAM EXECUTION JUMP TO USER PROGRAM AND BEGIN EXECUTION Figure 3 1 Flow Diagram of dBUG Operational Mode 3 2 2 System Initialization After the EVB is powered up and initialized the terminal will display Low Voltage Detect Reset Power on Reset ColdFire MCF5282 on the M5282EVB Firmware vXX XX XX Build X on XXXX Copyright 1995 2003 Motorola Inc All Rights Reserved Enter help for help dBUG gt Other means can be used to re initialize the M5282EVB firmware These means are discussed in the following paragraphs M5282EVB User s Manual Rev 2 Freescale Semiconductor 3 3 Using the Monitor Debug Firmware 3 2 2 1 External RESET Button External RESET 52 is the red button Depressing this button causes all processes to terminate resets the 5282 processor and board logic and restarts the dBUG firmware Pressing the RESET button would be the appropriate action if all else fails 3 2 2 2 ABORT Button ABORT S1 is the button located next to the RESET button The abort function causes an interrupt of the present processing a level 7 interrupt on MCF5282 and gives control to the dBUG firmware This action
35. 48LC4M16A2TG 16 bit data bus each Each device is organized as 1 Meg x 16 x 4 banks with a 16 bit data bus One device stores the upper 16 bit word and the other the lower 16 bit word of the MCF5282 32 bit data bus 1 2 3 SRAM The M5282EVB has a footprint for one 4 Mbit 128 x 36 SRAM device Micron MT58L128L36F1 on the EVB U2 This memory device may be populated by the user for benchmarking purposes Also see Section 1 2 6 M5282EVB Memory Map 1 2 4 Internal SRAM The MCF5282 processor has 64 KBtyes of internal SRAM memory which may be used as data or instruction memory This memory is mapped to 0x2000_0000 and configured as data space but is not used by the dBUG monitor except during system initialization After system initialization is complete the internal memory is available to the user The memory is relocatable to any 32 KByte boundary within the processor s four gigabyte address space 1 2 5 Internal Flash The ColdFire Flash Module CFM is constructed with eight banks of 32K x 16 bit Flash to generate a 512 Kbyte 32 bit wide electrically erasable and programmable read only memory array The CFM is ideal for program and data storage for single chip applications and allows for field reprogramming without external high voltage sources The voltage required to program and erase the Flash is generated internally by on chip charge pumps Program and erase operations are performed under CPU control through a command driven inte
36. 4d ep doo 1 8 AMD qp ee Tre 1 8 gt 1 8 toe Clock UNG a 1 10 13 3 Watehdoq NS gt 1 10 1354 Excephan SOUCES aerer Joi ql eR RR E 1 10 125 dd CRACK A 1 11 Las DEM PIDEN 42 5d da none 1 12 Communication PONS de oes esducieorfeRbewedsqezee s4d2deieRs 1 12 LAT UARTO and UART auda hh wh DESK qe dead 1 12 1 4 2 FlexCAN 2 0 B Port 1 13 1 4 3 10 100T Ethernet Port deae sue Reed OR UC a 1 13 ked BONITAS PIE 1 14 es E RR E OEC 1 15 Erde Mcr 1 16 Connectors and User Components 1 16 1 5 1 Expansion oasis gae m d cue 1 16 1 5 2 Daughter Gard Expansion Connectors 1 17 1 53 Reset SER DNE acia op dca dog dodo Fi OE COGI Ke dede JE Oo UD a e ED oe eS 1 19 Usor LEDS 545344400 9 OI EX 1 20 Oh r LEDS ek 1 20 Chapter 2 Initialization and Setup ovem CORE dx ws d 6d ud m dos Red ies d ed 2 1 and isasaddsresbicueeciereRXfastri rbekbedecicesesq2dbpesbe 2 3 E gt d 2 3 2 2
37. 9 and JP10 JP12 ON OFF DTOUTO LED Enable Disable JP13 ON OFF DTOUT1 LED Enable Disable JP14 ON OFF DTOUT2 LED Enable Disable JP15 ON OFF DTOUTS LED Enable Disable JP16 1 2 2 3 Flash Boot dBug System JP17 1 2 2 3 BDM JTAG selection for Pin 7 of BDM Header JP18 1 2 2 3 VRL Selector VSSA J5 2 JP19 1 2 2 3 VRH Selector VDDA J5 20 JP20 ON OFF 3 3VP Jumper JP21 ON OFF 3 3V Jumper JP22 ON OFF 5V jumper JP23 1 2 2 3 VSSA Selector GND 45 1 JP24 1 2 VDDA 3 3V 3 4 VDDA 5V 5 6 VDDA J5 18 M5282EVB User s Manual Rev 2 Freescale Semiconductor Jumper Settings Table D 1 M5282EVB Jumper Settings continued Jumper Setting Function JP25 ON OFF Oscillator Disable Enable JP26 1 2 2 3 Clock Source Selector Osc external Crystal JP27 ON OFF Crystal Enable Disable JP28 ON OFF Terminal Port GPTBO JP29 ON OFF Terminal Port GPTB1 JP30 ON OFF Terminal Port DTIN3 JP31 ON OFF Terminal Port DTIN2 JP32 ON OFF Auxiliary Port GPTB2 JP33 ON OFF Auxiliary Port GPTB3 JP34 ON OFF Auxiliary Port DTOUT3 JP35 ON OFF Auxiliary Port DTOUT2 JP36 ON OFF 12 SCL JP37 ON OFF 12 SDA M5282EVB User s Manual Rev 2 Freescale Semiconductor Appendix E Using the M5282EVB to Evaluate Subset Devices The M5282EVB now supports the evaluation of the MCF5280 MCF5281 MCF5214 and MCF5216 microcontrollers in addition to the MCF5282 The evaluation boar
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39. B User s Manual Rev 2 Freescale Semiconductor Using the Monitor Debug Firmware SD Stack Dump Usage SD The SD command displays a back trace of stack frames This command is useful after some user code has executed that creates stack frames i e nested function calls After control is returned to dBUG the SD command will decode the stack frames and display a trace of the function calls M5282EVB User s Manual Rev 2 3 32 Freescale Semiconductor SET Usage Using the Monitor Debug Firmware Set Configurations SET option value The SET command allows the setting of user configurable options within dBUG With no arguments SET displays the options and values available The SHOW command displays the settings in the appropriate format The standard set of options is listed below baud This is the baud rate for the first serial port on the board All communications between dBUG and the user occur using either 9600 or 19200 bps eight data bits no parity and one stop bit 8 N 1 with no flow control base This is the default radix for use in converting a number from its ASCII text representation to the internal quantity used by dBUG The default is hexadecimal base 16 and other choices are binary base 2 octal base 8 and decimal base 10 client This is the network Internet Protocol IP address of the board For network communications the client IP is required to be set to a unique value usu
40. EVB User s Manual Rev 2 Freescale Semiconductor 3 11 Using the Monitor Debug Firmware BS Block Search Usage BS lt width gt begin end data The BS command searches a contiguous block of memory starting at address begin stopping at address end for the value data Width modifies the size of the data that is compared during the search If no width is specified the default of word sized data is used The values for addresses begin and end may be absolute addresses specified as hexadecimal values or symbol names The value for data may be a symbol name or a number converted according to the user defined radix normally hexadecimal This command first aligns the starting address for the data access size and then increments the address accordingly during the operation Thus for the duration of the operation this command performs properly aligned memory accesses Examples To search for the 16 bit value 0x1234 in the memory block starting at 0x00040000 and ending at 0x00080000 bs 40000 80000 1234 This reads the 16 bit word located at 0x00040000 and compares it against the 16 bit value 0x1234 If no match is found then the address is incremented to 0x00040002 and the next 16 bit value is read and compared To search for the 32 bit value OXABCD in the memory block starting at 0x00040000 and ending at 0x00080000 bs 1 40000 80000 ABCD This reads the 32 bit word located at 0x00040000 and compares it against the 32 bit
41. EVB single board computer has a resident firmware package that provides a self contained programming and operating environment The firmware named dBUG provides the user with monitor debug interface inline assembler and disassembly program download register and memory manipulation and I O control functions This chapter is a how to use description of the dBUG package including the user interface and command structure 3 1 What Is dBUG dBUG is a traditional ROM monitor debugger that offers a comfortable and intuitive command line interface that can be used to download and execute code It contains all the primary features needed in a debugger to create a useful debugging environment The firmware provides a self contained programming and operating environment dBUG interacts with the user through pre defined commands that are entered via the terminal These commands are defined in Section 3 4 Commands The user interface to dBUG is the command line number of features have been implemented to achieve an easy and intuitive command line interface dBUG assumes that an 80x24 character dumb terminal is utilized to connect to the debugger For serial communications dBUG requires eight data bits no parity and one stop bit 8 N 1 with no flow control The default baud rate is 19200 but can be changed after power up The command line prompt is dBUG gt Any dBUG command may be entered from this prompt dBUG does not allow comm
42. G by terminating the user code The register context are preserved Assembly example move l 50000 0 Select the function trap 15 Make the call exit to dBUG C example void board_exit_to_dbug void asm move 1 0x0000 d0 select the function asm trap 15 exit and transfer to dBUG M5282EVB User s Manual Rev 2 Freescale Semiconductor 3 41 Using the Monitor Debug Firmware M5282EVB User s Manual Rev 2 3 42 Freescale Semiconductor Appendix A Configuring dBUG for Network Downloads The dBUG module has the ability to perform downloads over an Ethernet network using the Trivial File Transfer Protocol TFTP NOTE this requires a TFTP server to be running on the host attached to the board Prior to using this feature several parameters are required for network downloads to occur The information that is required and the steps for configuring dBUG are described below A 1 Required Network Parameters For performing network downloads dBUG needs 6 parameters 4 are network related and 2 are download related The parameters are listed below with the dBUG designation following in parenthesis computers connected to an Ethernet network running the IP protocol need 3 network specific parameters These parameters are Internet Protocol IP address for the computer client IP IP address of the Gateway for non local traffic gateway IP and e Network netmask for flagging traffic a
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44. LDBUG Download dBUG Usage DL offset The DLDBUG command is used to update the dBUG image in Flash It erases the Flash sectors containing the dBUG image downloads a new dBUG image in S record format obtained from the console and programs the new dBUG image into Flash When the DLDBUG command is issued dBUG will prompt the user for verification before any actions are taken If the the command is affirmed the Flash is erased and the user is prompted to begin sending the new dBUG S record file The file should be sent as a text file with no special transfer protocol CAUTION Use this command with extreme caution as any error can render dBUG useless M5282EVB User s Manual Rev 2 3 16 Freescale Semiconductor Using the Monitor Debug Firmware DN Download Network Usage DN c e i s o offset filename The DN command downloads code from the network The DN command handle files which are either S record COFF ELF or Image formats The DN command uses Trivial File Transfer Protocol TFTP to transfer files from a network host In general the type of file to be downloaded and the name of the file must be specified to the DN command The c option indicates a COFF download the e option indicates an ELF download the i option indicates an Image download and the s indicates an S record download The o option works only in conjunction with the s option to indicate an optional offset for S record dow
45. M5282bVB User s Manual Devices Supported MCF5282 MCF5281 MCF5280 MCF5216 MCF5214 Document Number M5282EVBUM Rev 2 1 2009 How to Reach Us Home Page www freescale com Web Support http Awww freescale com support USA Europe or Locations Not Listed Freescale Semiconductor Inc Technical Information Center EL516 2100 East Elliot Road Tempe Arizona 85284 1 800 521 6274 or 1 480 768 2130 www freescale com support Europe Middle East and Africa Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen Germany 44 1296 380 456 English 46 8 52200080 English 49 89 92103 559 German 33 1 69 35 48 48 French www freescale com support Japan Freescale Semiconductor Japan Ltd Headquarters ARCO Tower 15F 1 8 1 Shimo Meguro Meguro ku Tokyo 153 0064 Japan 0120 191014 or 81 3 5437 9125 support japan freescale com Asia Pacific Freescale Semiconductor China Ltd Exchange Building 23F No 118 Jianguo Road Chaoyang District Beijing 100022 China 86 10 5879 8000 support asia freescale com Freescale Semiconductor Literature Distribution Center P O Box 5405 Denver Colorado 80217 1 800 441 2447 or 1 303 675 2140 Fax 1 303 675 2150 LDCForFreescaleSemiconductor hibbertgroup com Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products There are no express or
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48. OD 0 5 lt Edgeport Controller 0 SE 2 az lt 5 5 3 Interrupt 68 EE 55 Le x Controller 1 o amp DRAM Controller DMA UARTO UART1 UART2 Timer io Serial Serial Serial Modules mer Clock Module VO VO VO DriMo Module PLL DTIM3 FEC General General PIT QADC Purpose Purpose QSPI FlexCAN Timers Timer A Timer B PITO PIT3 Figure 1 2 MCF5282 Block Diagram M5282EVB User s Manual Rev 2 Freescale Semiconductor 1 5 M5282EVB Introduction 1 2 System Memory 1 2 1 External Flash One on board Flash ROM 05 is used in the system The Am291v160DB device contains 16Mbits of non volatile storage 2 M x 8 bit 1 M x 16 bit giving a total of 2MBytes of Flash memory Refer to the specific device data sheet and sample software provided for configuring the flash memory Users should note that the debug monitor firmware is installed in this flash device Development tools or user application programs may erase or corrupt the debug monitor If the debug monitor becomes corrupted and it s operation is desired the firmware must be programmed into the flash by applying a development port tool such as BDM Users should use caution to avoid this situation The M5282EVB dBUG debugger monitor firmware is programmed into the lower sectors of Flash OXFFEO 0000 to OxFFE2 FFFF 1 2 2 SDRAM The M5282EVB has 16 Mbytes of SDRAM populated on the EVB This is done with two devices Micron MT
49. P1 RP2 Philips SMT 4 x 22 resistor packs 35 1 RP3 Philips SMT 4 x 49 9 resistor packs 36 1 RP4 Philips SMT 4 x 75 resistor packs 37 16 RP5 RP6 RP13 RP14 RP15 SMT 4x 4 7K resistor packs RP16 RP17 RP18 RP19 RP20 RP21 RP22 RP23 RP24 RP25 RP26 38 4 RP7 RP9 RP10 RP11 Panasonic SMT 4x 50 resistor packs 39 1 RP8 Panasonic SMT 4x 330 resistor packs 40 1 RP12 Panasonic SMT 4x 470 resistor packs 41 4 R1 R4 R5 R21 Panasonic SMT 1K resistor 42 1 R2 Panasonic SMT 62 resistor M5282EVB User s Manual Rev 2 Freescale Semiconductor Evaluation Board BOM Table C 1 MCF5282EVB BOM continued Item Qty Reference Part Function 43 1 R3 Panasonic SMT 10 resistor 44 1 R6 Panasonic SMT 10K 1 resistor 45 2 R16 R7 Panasonic SMT 10K resistor 46 2 R9 R8 Panasonic SMT 180 resistor 47 4 R10 R22 Panasonic SMT 4 7K resistor 48 1 R11 Panasonic SMT 5K resistor 49 1 R12 Panasonic SMT 50 resistor 50 3 R13 R15 R18 Panasonic SMT 270 resistor 51 1 R14 Panasonic SMT 560 resistor 52 1 R17 R20 Panasonic SMT 100 resistor 53 1 SW1 Grayhill 78RB12 Configuration DIP switch 54 1 SW2 EAO Switch POWER SW SLIDE SPST Board Edge 55 1 S1 C amp K KS11R22CQD TRQ7 black push button switch 56 1 S2 C amp K KS11R23CQD Hard reset push button switch 57 9 TP1 TP2 TP3 TP4 TP5 TP6 Keystone 5015 Test points TP7 TP8 TP9 58 1 PE69012 Ethernet
50. To set an exception vector the user places the address of the exception handler in the appropriate vector in the vector table located at 0x0000 0000 and then points the VBR to 0x0000 0000 The MCF5282 microprocessor has eight external interrupt request lines IRQ 7 0 all of which are multiplexed with other functions The interrupt controller is capable of providing up to 32 interrupt sources These sources are e External interrupt signals IRQ 7 1 EPORT Software watchdog timer module e Timer modules UART module module DMA module e QSPI module FEC module QADC external interrupt inputs are edge sensitive The active level is programmable An interrupt request must be held valid until an IACK cycle starts to guarantee correct processing Each interrupt input can have it s priority programmed by setting the xIPL 2 0 bits in the Interrupt Control Registers No interrupt sources should have the same level and priority as another Programming two interrupt sources with the same level and priority can result in undefined operation The M5282EVB hardware uses IRQ7 to support the ABORT function using the ABORT switch S1 This switch is used to force an interrupt level 7 priority 3 if the user s program execution should be aborted without issuing a RESET refer to Chapter 2 for more information on ABORT Since the ABORT switch is not capable of generating a vector in response to a level seven interrupt acknowledge
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52. ally assigned by your local network administrator server This is the network IP address of the machine which contains files accessible via TFTP Your local network administrator will have this information and can assist in properly configuring a TFTP server if one does not exist gateway This is the network IP address of the gateway for your local subnetwork If the client IP address and server IP address are not on the same subnetwork then this option must be properly set Your local network administrator will have this information netmask This is the network address mask to determine if use of a gateway is required This field must be properly set Your local network administrator will have this information filename This is the default filename to be used for network download if no name is provided to the DN command filetype This is the default file type to be used for network download if no type is provided to the DN command Valid values are srecord coff and elf mac This is the ethernet Media Access Control MAC address a k a hardware address for the evaluation board This should be set to a unique value and the most significant nibble should always be even Examples To set the baud rate of the board to be 19200 the command is set baud 19200 NOTE See the SHOW command for a display containing the correct formatting of these options M5282EVB User s Manual Rev 2 Freescale Semi
53. and lines to exceed 80 characters Wherever possible dBUG displays data in 80 columns or less dBUG echoes each character as it is typed eliminating the need for any local echo on the terminal side In general dBUG is not case sensitive Commands may be entered either in upper or lower case depending upon the user s equipment and preference Only symbol names require that the exact case be used Most commands can be recognized by using an abbreviated name For instance entering h is the same as entering help Thus it is not necessary to type the entire command The commands DI GO MD STEP and TRACE are used repeatedly when debugging dBUG recognizes this and allows for repeated execution of these commands with minimal typing After a command is entered simply press lt RETURN gt or ENTER to invoke the command again The command is executed as if no command line parameters were provided An additional function called the System Call allows the user program to utilize various routines within dBUG The System Call is discussed at the end of this chapter M5282EVB User s Manual Rev 2 Freescale Semiconductor 3 1 Using the Monitor Debug Firmware The operational mode of dBUG is demonstrated in Figure 3 1 After the system initialization the board waits for a command line input from the user terminal When a proper command is entered the operation continues in one of the two basic modes If the command
54. bug Firmware GO Execute Usage GO lt addr gt The GO command executes target code starting at address addr The value for addr may be an absolute address specified as a hexadecimal value or a symbol name If no argument is provided the GO command begins executing instructions at the current program counter When the GO command is executed all user defined breakpoints are inserted into the target code and the context is switched to the target program Control is only regained when the target code encounters a breakpoint illegal instruction trap 15 exception or other exception which causes control to be handed back to dBUG The GO command is repeatable Examples To execute code at the current program counter the command is go To execute code at the C function main the command is go main execute code at the address 0x00040000 the command is go 40000 M5282EVB User s Manual Rev 2 Freescale Semiconductor 3 19 Using the Monitor Debug Firmware GT Execute To Usage GT addr The GT command inserts a temporary breakpoint at addr and then executes target code starting at the current program counter The value for addr may be an absolute address specified as a hexadecimal value or a symbol name When the GT command is executed all breakpoints are inserted into the target code and the context is switched to the target program Control is only regained when the target code encounters a breakpoint illega
55. causes execution of the user program the dBUG firmware may or may not be re entered at the discretion of the user s program For the alternate case the command will be executed under control of the dBUG firmware and after command completion the system returns to command entry mode During command execution additional user input may be required depending on the command function For commands that accept an optional width to modify the memory access size the valid values are e B8 bit byte access e 16 bit word access e L 32 bit long access When no width option is provided the default width is W 16 bit The core ColdFire register set is maintained by dBUG These are listed below e A0 A7 D0 D7 PC e SR All control registers on ColdFire are not readable by the supervisor programming model and thus not accessible via dBUG User code may change these registers but caution must be exercised as changes may render dBUG inoperable A reference to SP stack pointer actually refers to general purpose address register seven A7 3 2 Operational Procedure System power up and initial operation are described in detail in Chapter 1 This information is repeated here for convenience and to prevent possible damage 3 2 1 System Power up e Be sure the power supply is connected properly prior to power up Make sure the terminal is connected to TERMINAL P4 connector Turn power on to the board M5
56. command then the DI command uses the address of the last opcode that was disassembled The DI command is repeatable Examples To disassemble code that starts at 0x00040000 the command is di 40000 To disassemble code of the C function main the command is di main M5282EVB User s Manual Rev 2 3 14 Freescale Semiconductor Using the Monitor Debug Firmware DL Download Console Usage DL offset The DL command performs an S record download of data obtained from the console typically a serial port The value for offset is converted according to the user defined radix normally hexadecimal Please reference the ColdFire Microprocessor Family Programmer s Reference Manual for details on the S Record format If offset is provided then the destination address of each S record is adjusted by offset The DL command checks the destination download address for validity If the destination is an address outside the defined user space then an error message is displayed and downloading aborted If the S record file contains the entry point address then the program counter is set to reflect this address Examples To download an S record file through the serial port the command is dl To download an S record file through the serial port and add an offset to the destination address of 0x40 the command is dl 0x40 M5282EVB User s Manual Rev 2 Freescale Semiconductor 3 15 Using the Monitor Debug Firmware D
57. conductor 3 33 Using the Monitor Debug Firmware SHOW Usage SHOW option Show Configurations The SHOW command displays the settings of the user configurable options within dBUG When no option is provided SHOW displays all options and values Examples To display all options and settings the command is show To display the current baud rate of the board the command is show baud Here is an example of the output from a show command dBUG show base baud server client gateway netmask filename filetype ethaddr 16 19200 0 0 0 0 0 20 20 0 0 0 0 2557255 25540 test s19 S Record 00 CF 52 82 CF 01 M5282EVB User s Manual Rev 2 3 34 Freescale Semiconductor Using the Monitor Debug Firmware STEP Step Over Usage STEP The STEP command can be used to step over a subroutine call rather than tracing every instruction in the subroutine The ST command sets a temporary breakpoint one instruction beyond the current program counter and then executes the target code The STEP command can be used to step over BSR and JSR instructions The STEP command will work for other instructions as well but note that if the STEP command is used with an instruction that will not return i e BRA then the temporary breakpoint may never be encountered and dBUG may never regain control Examples To pass over a subroutine call the command is step M5282EVB User s Manua
58. d comes fitted with 830MHz MCF5282 microcontroller 512 Kbyte internal flash The MCF5282 microcontroller has a superset of the same functional modules and interfaces as those on the other devices supported This appendix briefly points out the differences between the MCF5282 and the subset devices that the users should take into consideration when using the M5282EVB for evaluating these devices Please see the specific microprocessor user s manual for more information regarding pinouts package information signal and functional descriptions E 1 Considerations for the MCF5281 The MCF5281 has only 256Kbytes of internal flash The user should ignore the upper half of internal flash when using the M5282EVB to evaluate the MCF5281 e Ignore the top half of the internal flash This is from FLASHBAR 0x40000 to FLASHBAR 0x80000 E 2 Considerations for the MCF5280 The MCF5280 has no internal flash The user should ignore all of the internal flash when using the M5282EV B to evaluate the MCF5280 Ignore all of internal Flash This is from FLASHBAR 0x00000 to FLASHBAR 0x80000 e You cannot boot from Flash The configuration setting for booting form internal flash on the MCFS5280 is invalid E 3 Considerations for the MCF5216 The MCF5216 does not have a Ethernet module When using the M5282EVB to evaluate this device the user should not use the Ethernet Module Functional Ethernet pins should be used as GPIO with the exception of Port PEH
59. d de CIRC Wh ie ee 3 41 254 EXT TO JEUG iua Dies ce ehh 44569 3 41 Appendix A Configuring dBUG for Network Downloads Required Network Parameters hn RR RES A 1 AS Configuring dBUG Network Parameters A 1 Troubleshooting Network Problems A 2 Appendix B Schematics Appendix C Evaluation Board BOM Appendix D Jumper Settings Appendix E Using the M5282EVB to Evaluate Subset Devices E Considerations for the 5261 665 i404 kd Ad Edu deck REOR REOR ROO EO Reo E 1 ES Considerations Tor the 5280 E 1 ES Considerations for the MCF5216 saec E 1 E 4 Considerations for the MCF5214 2 0 00 een E 2 M5282EVB User s Manual Rev 2 vi Freescale Semiconductor Appendix F Revision History F 1 Changes Between Rev 1 3 Rev 2 F 1 M5282EVB User s Manual Rev 2 Freescale Semiconductor vii M5282EVB User s Manual Rev 2 viii Freescale Semiconductor Chapter 1 M5282EVB Introduction The M5282EVB is a MCF5282 based evaluation board that can be used for the development and test of microcontroller systems see Figure 1 1 The MCF5282 is a member of the Freescale ColdFire 32 bit processor family The evaluation board is a development and test platform for software and hardware
60. ductor products for any such unintended or unauthorized application Buyer shall indemnify and hold Freescale Semiconductor and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part Freescale and the Freescale logo are trademarks of Freescale Semiconductor Inc All other product or service names are the property of their respective owners Freescale Semiconductor Inc 2008 All rights reserved M5282EVBUM Rev 2 1 2009 EMC Information on M5282EVB 1 This product as shipped from the factory with associated power supplies and cables has been tested and meets with requirements of EN5022 and EN 50082 1 1998 as a CLASS A product 2 This product is designed and intended for use as a development platform for hardware or software in an educational or professional laboratory 3 Ina domestic environment this product may cause radio interference in which case the user may be required to take adequate measures 4 Anti static precautions must be adhered to when using this product 5 Attaching additional cables or wiring to this product or modifying the products operation from the factory de
61. e can and will damage these devices Once you have verified that all the items are present remove the board from its protective jacket and anti static bag Check the board for any visible damage Ensure that there are no broken damaged or missing parts If you have not received all the items listed above or they are damaged please contact Matrix Design immediately for contact details please see the front of this manual 2 2 2 Preparing the Board for Use The board as shipped is ready to be connected to a terminal and power supply without any need for modification Figure 2 3 shows the position of the jumpers and connectors 2 2 3 Providing Power to the Board The board accepts two means of power supply connection either P2 or P3 Connector P2 is a 2 1 power jack P3 a lever actuated connector The board accepts 6V to 12V DC at 1 0 Amp via either of the connectors Table 2 1 Power Supply Connections on P2 Contact number Voltage 1 Ground M5282EVB User s Manual Rev 2 Freescale Semiconductor 2 3 Initialization and Setup Table 2 1 Power Supply Connections on P2 continued Contact number Voltage 2 N C 3 Center 6V to 14V DC Table 2 2 Power Supply Connections on P3 Contact Number Voltage 1 6V to 14V DC 2 Ground 2 2 4 Selecting Terminal Baud Rate The serial channel UARTO of the MCF5282 is used for serial communication and has a built
62. erface General purpose I O interface JTAG The MCF5282 communicates with external devices over a 32 bit wide data bus D 0 31 The MCF5282 can address a 32 bit address range However only 24 bits are available on the external bus There are internally generated chip selects to allow the full 32 bit address range to be selected There are regions that can be decoded to allow supervisor user instruction and data each to have the 32 bit address range All the processor s signals are available through the daughter card expansion connectors Refer to the schematic for their pin assignments The MCF5282 processor has the capability to support both BDM and JTAG These ports are multiplexed and can be used with third party tools to allow the user to download code to the board The board is configured to boot up in the normal BDM mode of operation The BDM signals are available at the port labeled BDM M5282EVB User s Manual Rev 2 Freescale Semiconductor M5282EVB Introduction Figure 1 2 shows the MCF5282 processor block diagram Chip Configuration _ 2 Lo 8 JTAG Reset S Port Controller gt Test Ports Debug Module Controller External Module Interface Coldfire V2 Core Module DIV EMAC 2 Kbyte D Cache I Cache Chip Selects E Interrupt 3 gt E
63. eset switch SW2 which resets the entire processor system dBUG configures the MCF5282 microprocessor internal resources during initialization The contents of the exception table are copied to address 0 0000 0000 in the SDRAM The Software Watchdog Timer 15 disabled the Bus Monitor is enabled and the internal timers are placed in a stop condition A memory map for the entire board can be seen in Table 1 1 If the external RCON pin is asserted SW 1 1 ON during reset then various chip functions including the reset configuration pin functions after reset are configured according to the levels driven onto the external data pins See the tables below on settings for reset configurations M5282EVB User s Manual Rev 2 1 8 Freescale Semiconductor M5282EVB Introduction If the RCON pin is not asserted SW 1 1 OFF during reset the chip configuration and the reset configuration pin functions after reset are determined by fixed defaults regardless of the states of the external data pins Table 1 4 SW1 1 RCON SW1 1 Reset Configuration OFF RCON not asserted Default chip configuration ON RCON is asserted Chip functions including the are configured according to the levels driven onto the external data pins Table 1 5 SW1 2 JTAG EN SW1 2 JTAG Enable OFF JTAG interface enabled ON BDM in
64. ev 2 Freescale Semiconductor 1 19 M5282EVB Introduction The RSTI signal is an open collector signal and so can be wire OR ed with other reset signals from additional peripherals dBUG configures the MCF5282 microprocessor internal resources during initialization The instruction cache is invalidated and disabled The Vector Base Register VBR contains an address which initially points to the Flash memory The contents of the exception table are written to address 0x0000 0000 in the SDRAM The Software Watchdog Timer is disabled the Bus Monitor is enabled and the internal timers are placed in a stop condition The interrupt controller registers are initialized with unique interrupt level priority pairs 1 5 4 User LEDs There are four LEDs available to the user Each of these LEDs are pulled to 3 3V through a 470 ohm resistor and can be illuminated by driving a logic 0 on the appropriate signal to sink the current Each of these signals can be disconnected from it s associated LED with a jumper The table below which MCF5282 signal is associated with LED Table 1 22 User LEDs LED MCF5282 Signal Jumper to disconnect D6 DTOUTO JP12 D7 DTOUT1 JP13 D8 DTOUT2 JP14 09 DTOUT3 JP15 1 5 5 Other LEDs There are several other LED on the M5282EVB to signal to the user various board processor component state Below is a list of those LEDs and their functions Table 1 23 LED Functions
65. external memory in different locations but the chip select configuration such as wait states and transfer acknowledge for each memory type should be maintained Possible chip select usage External FLASH Memory or 251 default CSO JP6 1 amp 2 3 amp 4 External SRAM Memory CS0 or CSI default CS1 JP6 1 amp 2 3 amp 4 Table 1 1 shows the M5282EVB memory map Table 1 1 The M5282EVB Default Memory Map Address Range Signal and Device 0x0000 0000 OxOOFF_FFFF 16 Mbyte SDRAM 0x2000 0000 0x2000 0000 64 Kbytes Internal SRAM 0x3000 0000 0x3000 0000 External SRAM not fitted OxF000 0000 0xF007 FFFF 512 Kbytes Internal Flash OxFFEO 0000 OxFFFF_FFFF 2 Mbytes External Flash 1 2 6 1 CSO selection When booting from an external device the MCF5282 accesses this device using CS0 CSO can be configured to connect to the external flash or external SRAM Table 1 2 JP 6 CSO Settings JP6 CSO CS1 Across 1 amp 2 3 amp 4 External Flash External SRAM Across 1 amp 3 2 amp 4 External SRAM External Flash M5282EVB User s Manual Rev 2 Freescale Semiconductor 1 7 M5282EVB Introduction 1 2 6 2 Reset Vector Mapping Asserting the reset input signal to the processor causes a reset exception The reset exception has the highest priority of any exception it provides for system initialization and recovery from catastrophic failure Reset also aborts any processing in progress when the reset input is
66. fault as shipped may effect its performance and also cause interference with other apparatus in the immediate vicinity If such interference is detected suitable mitigating measures should be taken M5282EVB User s Manual Rev 2 Freescale Semiconductor iii WARNING This board generates uses and can radiate radio frequency energy and if not installed properly may cause interference to radio communications As temporarily permitted by regulation it has not been tested for compliance with the limits for class a computing devices pursuant to Subpart J of Part 15 of FCC rules which are designed to provide reasonable protection against such interference Operation of this product in a residential area is likely to cause interference in which case the user at his her own expense will be required to correct the interference M5282EVB User s Manual Rev 2 iv Freescale Semiconductor oo 2 1 22 Chapter 1 M5282EVB Introduction MCE5282 MicroprotessoF ___ 1 3 pu MOMO 1 6 Le 1 6 PRIMNS 1 6 ERES ordo dated EE NC VR M ook a ODE 1 6 124 Internal SRAM 1 6 teo Mema RASH Laueseadqddcam d2 433223x444 1 6 1 25 M5282EVB Memory Map tede 1 7 Ce ew ed Hs de RR ORE Aa Se 1 7 1 2 6 2 Reset Vector Mapping 66 664 6
67. for the MCF5282 It can be used by software and hardware developers to test programs tools or circuits without having to develop a complete microprocessor system themselves special features of the MCF5282 are supported The M5282EVB now supports the evaluation of the MCF5280 MCF5281 MCF5214 and MCF5216 microcontrollers in addition to the MCF5282 The evaluation board comes fitted with 80MHz MCF5282 microcontroller 512 Kbyte internal flash The MCF5282 microcontroller has a superset of the same functional modules and interfaces as those on the other devices supported The heart of the evaluation board is the MCF5282 The M5282EVB has 8 Mbyte external SDRAM for development or application memory 2Mbyte external Flash memory and numerous hardware expansion possibilities The M5282EVB board also provides an Ethernet interface 10 100BaseT FlexCAN QSPI QADC I2C and RS232 interface in addition to the built in I O functions of the MCF5282 device for programming and evaluating the attributes of the microprocessor To support development and test the evaluation board can be connected to debuggers and emulators produced by different manufacturers using the BDM or JTAG interface The M5282EVB provides for low cost software testing with the use of a ROM resident debug monitor dBUG programmed into the external Flash device Operation allows the user to load code in the on board RAM execute applications set breakpoints and display or modify
68. from the processor the dBUG programs this interrupt request for autovector mode Refer to MCF5282 User s Manual for more information about the interrupt controller 1 3 5 TA Generation The processor starts a bus cycle by asserting CSx with the other control signals The processor then waits for a transfer acknowledgment TA either from within Auto acknowledge AA mode or from the externally addressed device before it can complete the bus cycle TA is used to indicate the completion of the bus cycle It also allows devices with different access times to communicate with the processor properly asynchronously The 5282 processor as part of the chip select logic has a built in mechanism to generate TA for all external devices which do not have the capability to generate this signal For example the Flash ROM cannot generate a TA signal The chip select logic is programmed by the dBUG ROM Monitor to generate TA internally after a pre programmed number of wait states In order to support future expansion of the M5282EVB the TA input of the processor is also connected to the Processor Expansion Bus J2 pin 68 This allows any expansion boards to assert this line to provide a TA M5282EVB User s Manual Rev 2 Freescale Semiconductor 1 11 M5282EVB Introduction signal to the processor On the expansion boards this signal should be generated through an open collector buffer with no pull up resistor a pull up resistor is included on
69. in timer This timer is used by the dBUG ROM monitor to generate the baud rate used to communicate with a serial terminal A number of baud rates can be programmed On power up or manual RESET the dBUG ROM monitor firmware configures the channel for 19200 baud Once the dBUG ROM monitor is running a SET command may be issued to select any baud rate supported by the ROM monitor 2 2 5 The Terminal Character Format The character format of the communication channel is fixed at power up or RESET The default character format is 8 bits per character no parity and one stop bit with no flow control It is necessary to ensure that the terminal or PC is set to this format 2 2 6 Connecting the Terminal The board is now ready to be connected to a PC terminal Use the RS 232 serial cable to connect the PC terminal to the M5282EVB PCB The cable has a 9 pin female D sub terminal connector at one end and a 9 pin male D sub connector at the other end Connect the 9 pin male connector to connector P3 on the M5282EVB board Connect the 9 pin female connector to one of the available serial communication channels normally referred to as COMI COM2 etc on the PC running terminal emulation software The connector on the PC terminal may be either male 25 pin or 9 pin It may be necessary to obtain a 25pin to Opin adapter to make this connection If an adapter is required refer to Figure 2 2 2 2 7 Using a Personal Computer as a Terminal A personal computer may
70. isolation transformer 59 1 U1 SN65HVD230D CAN Transceiver 60 1 102 MCF5282CVF80 MCF5282 ColdFire 61 1 U3 Pletronics Osc 25MHz 25MHz oscillator 62 1 U4 Am79C874VC Ethernet Phy 63 1 05 Am29LV160DB 90EC AMD 2MB Flash 64 1 106 Micron MT58L128L36F1 Burst FSRAM 65 1 U7 MC74LCX541DT Bus transceiver 66 1 U8 LM25968 3 3 National Semi DCtoDC switcher 67 1 09 LM2596S 5 National Semi DCtoDC switcher 68 2 U10 U12 ADM708SAR Voltage sensor 69 1 U11 Epson 8MHz oscillator SG 8002DC 8 0000M PC 70 1 Yl FOXS080 8MHz crystal 71 2 U13 U14 MT48LC4M16A2TG TSOP SDRAM 400 mil 72 2 U15 U16 MAX3225CAP RS232 Transceivers M5282EVB User s Manual Rev 2 Freescale Semiconductor Evaluation Board BOM M5282EVB User s Manual Rev 2 C 4 Freescale Semiconductor Appendix D Jumper Settings Table D 1 M5282EVB Jumper Settings Jumper Setting Function JP1 ON OFF CAN Transceiver Mode JP2 ON OFF CAN Termination JP3 ON OFF Flash Voltage Reference JP4 ON OFF Standby Voltage Supply JP5 ON OFF Voltage Reference High JP6 1 2 amp 3 4 50 to Flash and CS1 to FSRAM 1 3 amp 2 4 CS1 to Flash and CS0 to FSRAM JP7 ON OFF Voltage Reference Low JP8 ON OFF Ethernet Auto Negotiate Enabled JP9 ON OFF Ethernet Tech 0 10 amp 100 BaseT operation JP10 ON OFF Ethernet Tech 1 Full and Half Duplex Operation JP11 ON OFF Ethernet Tech 2 As above for JP
71. l Rev 2 Freescale Semiconductor 3 35 Using the Monitor Debug Firmware SYMBOL Symbol Name Management Usage SYMBOL lt symb gt a symb value r symb gt lt cllls gt The SYMBOL command adds or removes symbol names from the symbol table If only a symbol name is provided to the SYMBOL command then the symbol table is searched for a match on the symbol name and its information displayed The a option adds a symbol name and its value into the symbol table The r option removes a symbol name from the table The c option clears the entire symbol table the 1 option lists the contents of the symbol table and the s option displays usage information for the symbol table Symbol names contained in the symbol table are truncated to 31 characters Any symbol table lookups either by the SYMBOL command or by the disassembler will only use the first 31 characters Symbol names are case sensitive Symbols can also be added to the symbol table via in line assembly labels and ethernet downloads of ELF formatted files Examples To define the symbol main to have the value 0x00040000 the command is symbol a main 40000 To remove the symbol junk from the table the command is symbol r junk To see how full the symbol table is the command is symbol s To display the symbol table the command is symbol 1 M5282EVB User s Manual Rev 2 3 96 Freescale Semiconductor Using the Monitor Debug Firmware
72. l Rev 2 Freescale Semiconductor A 3 Configuring dBUG for Network Downloads M5282EVB User s Manual Rev 2 A 4 Freescale Semiconductor Appendix B Schematics M5282EVB User s Manual Rev 2 Freescale Semiconductor B 1 2002 ZI epson sim don nomero 9 souoms v uod gionis aiu Seg 2 22 2829 OW 81020 3 cee 8 Se 5 9 9552 o E 8 g 0031 9461 SAS LLON 3 2823 Be z 2 22 PE 2595588238 8 52 0895289545 o 8A328cSNN uonen e 4 e8cSAOW 9414 50 ust anono 0159 usu 30 10 68 0 Svus Svos amas XOS 180 05 NOOH na So vivusa 000W19 LIONN 9 0 500 319140 450 00150 Wid 069199 1019199 wid bos zany ESNY ESNY SNY SONY SSNV Yat val vi 51 SL 10 62 102190 aana ona RNE FEE H3XH3 tolaxia 0 noxia noxia PREKE 1003 1003 guo 8803 XINVO ETS SPS WERE 9999599999 0000 gt 99 Sc Sc DOTA NTT Ty
73. l instruction or other exception which causes control to be handed back to dBUG Examples To execute code up to the C function bench the command is gt bench M5282EVB User s Manual Rev 2 3 20 Freescale Semiconductor Using the Monitor Debug Firmware IRD Internal Register Display Usage IRD lt module register gt This command displays the internal registers of different modules inside 5282 In the command line module refers to the module name where the register is located and register refers to the specific register to display The registers are organized according to the module to which they belong Use the IRD command without any parameters to get a list of all the valid modules Refer to the MCF5262 User s Manual for more information on these modules and the registers they contain Example ird sim rsr M5282EVB User s Manual Rev 2 Freescale Semiconductor 3 21 Using the Monitor Debug Firmware IRM Internal Register Modify Usage IRM module register data This command modifies the contents of the internal registers of different modules inside the MCF5282 In the command line module refers to the module name where the register is located and register refers to the specific register to modify The data parameter specifies the new value to be written into the register Example To modify the TMR register of the first Timer module to the value 0x0021 the command is irm timerl tmr 0021
74. l output and the other is available to the user The ROM Monitor programs the interrupt level for UARTO to Level 3 priority 2 and autovector mode of operation The interrupt level for UARTI is programmed to Level 3 priority 1 and autovector mode of operation The signals from these channels are available on expansion connector J3 The signals of and UARTI are passed through the RS 232 transceivers U15 amp U16 and are available on DB 9 connectors P4 and P5 UART signal pins that are multiplexed with other functions on the MCF5282 can be disconnected from the UART transceivers by removing specific jumper JP 28 35 Table 1 12 UARTO and UART1 Jumpers Jumper UART Signal JP28 GPTB O0 O PTB 0 JP29 GPTB 1 PTB 1 JP30 DTIN3 URTSO M5282EVB User s Manual Rev 2 1 12 Freescale Semiconductor M5282EVB Introduction Table 1 12 UARTO and UART1 Jumpers continued Jumper UART Signal JP31 DTIN2 UCTSO JP32 GPTB 2 PTB 2 JP33 GPTB 3 PTB 3 JP34 DTOUT3 URTS1 JP35 DTOUT2 UCTS1 Refer to the MCF5282 User s Manual for programming the UART s and their register maps 1 4 2 FIexCAN 2 0 B Port The M5282EVB board provides 1 CAN transceivers The CAN TX and RX signals are brought out to a 3 3V CAN transceiver Texas Instruments SN65HVD230D Jumper JP1 and JP2 control CAN hardware configuration Table 1 13 CAN Jumper Configuration
75. mes but only to compensate for external bus latency The FIFO can be partitioned on any 32 bit boundary between receive and transmit for example 32 x 56 receive and 32 x 56 transmit Retransmission from transmit FIFO following a collision no processor bus used Automatic internal flushing of the receive FIFO for runts and collisions with no processor bus use For more details see MCF5282 User s Manual this module s signals also brought to expansion connector J3 The on board ROM MONITOR is programmed to allow a user to download files from a network to memory in different formats The current compiler formats supported are S Record COFF ELF or Image Table 1 15 Ethernet Hardware Configuration Function Jumper See AMD AM79C874VC User s Manual for Function Description JP8 Auto Negotiate JP9 Tech 0 JP10 Tech 1 JP11 Tech 2 1 4 4 BDM JTAG Port The MCF5282 processor has a Background Debug Mode BDM port which supports Real Time Trace Support and Real Time Debug The signals which are necessary for debug are available at connector J4 Figure 1 3 shows the J4 Connector pin assignment M5282EVB User s Manual Rev 2 Freescale Semiconductor M5282EVB Introduction Developer reserved amp gt 2 gt BKPT GND 3 4 m DSCLK GND 5 6 gt Developer reserved RESET lt g DSI or pad voltage ____yy 9 i5 44 DSO GND 12 8
76. mware BM Block Move Usage BM begin end dest The BM command moves a contiguous block of memory starting at address begin and stopping at address end to the new address dest The BM command copies memory as a series of bytes and does not alter the original block The values for addresses begin end and dest may be absolute addresses specified as hexadecimal values or symbol names If the destination address overlaps the block defined by begin and end an error message is produced and the command exits Examples To copy a block of memory starting at 0x00040000 and ending at 0x00080000 to the location 0x00200000 the command is bm 40000 80000 200000 To copy the target code s data section defined by the symbols data start and data end to 0x00200000 the command is bm data start data end 200000 NOTE Refer to upuser command for copying code data into Flash memory M5282EVB User s Manual Rev 2 3 10 Freescale Semiconductor Using the Monitor Debug Firmware BR Breakpoints Usage BR addr lt gt c count lt t trigger The BR command inserts or removes breakpoints at address addr The value for addr may be an absolute address specified as a hexadecimal value or a symbol name Count and trigger are numbers converted according to the user defined radix normally hexadecimal If no argument is provided to the BR command a listing of all defined breakpoints is displayed The r option to the BR command remove
77. n e Repeated start signal generation Acknowledge bit generation and detection Bus busy detection Please see the MCF5282 User s Manual for more detail The PC signals from the MCF5282 device are brought out to expansion connector J10 Jumpers JP36 and JP37 can be used to connect disconnect the PC signals SDA and SCL from the daughter card expansion connector J3 1 4 6 The QSPI Queued Serial Peripheral Interface module provides a serial peripheral interface with queued transfer capability It will support up to 16 stacked transfers at one time minimizing CPU intervention between transfers Transfer RAMs in the QSPI are indirectly accessible using address and data registers Functionality is very similar but not identical to the QSPI portion of the QSM Queued Serial Module implemented in the MC68332 processor Programmable queue to support up to 16 transfers without user intervention e Supports transfer sizes of 8 to 16 bits in 1 bit increments Four peripheral chip select lines for control of up to 15 devices e Baud rates from 274 5 Kbps to 17 5 Mbps at 140MHz Programmable delays before and after transfers Programmable clock phase and polarity e Supports wrap around mode for continuous transfers Please see the MCF5262 User s Manual for more detail The QSPI signals from the MCF5282 device are brought out to expansion connector J9 Some of these signals are multiplexed with other functions 1 5 Connect
78. nes to exceed 80 characters Wherever possible BUG displays data in 80 columns or less echoes each character as it is typed eliminating the need for any local echo on the terminal side The Backspace and Delete keys are recognized as rub out keys for correcting typographical mistakes Command lines may be recalled using the Control U Control D and Control R key sequences Control U and Control D cycle up and down through previous command lines Control R recalls and executes the last command line M5282EVB User s Manual Rev 2 3 4 Freescale Semiconductor Using the Monitor Debug Firmware In general dBUG is not case sensitive Commands may be entered either in uppercase or lowercase depending upon the user s equipment and preference Only symbol names require that the exact case be used Most commands can be recognized by using an abbreviated name For instance entering h is the same as entering help Thus it is not necessary to type the entire command name The commands DI GO MD STEP and TRACE are used repeatedly when debugging dBUG recognizes this and allows for repeated execution of these commands with minimal typing After a command is entered press the Return or Enter key to invoke the command again The command is executed as if no command line parameters were provided 3 4 Commands This section lists the commands that are available with all versions of BUG Some board
79. network download with the dn command The network download process uses the configured IP addresses and the default filename and filetype for initiating a TFTP download from the TFTP server Troubleshooting Network Problems Most problems related to network downloads are a direct result of improper configuration Verify that all IP addresses configured into dBUG are correct This is accomplished via the show command Using an IP address already assigned to another machine will cause dBUG network download to fail and probably other severe network problems Make certain the client IP address is unique for the board Check for proper insertion or connection of the network cable Is the status LED lit indicating that network traffic is present M5282EVB User s Manual Rev 2 A 2 Freescale Semiconductor Configuring dBUG for Network Downloads Check for proper configuration and operation of the TFTP server Most Unix workstations can execute a command named tftp which can be used to connect to the TFTP server as well Is the default TFTP root directory present and readable If ICMP DESTINATION UNREACHABLE or similar ICMP message appears then a serious error has occurred Reset the board and wait one minute for the TFTP server to time out and terminate any open connections Verify that the IP addresses for the server and gateway are correct Also verify that a TFTP server is running on the server M5282EVB User s Manua
80. nload The filename is passed directly to the TFTP server and therefore must be a valid filename on the server If neither of the c e i s or filename options are specified then a default filename and filetype will be used Default filename and filetype parameters are manipulated using the SET and SHOW commands The DN command checks the destination download address for validity If the destination is an address outside the defined user space then an error message is displayed and downloading aborted For ELF and COFF files which contain symbolic debug information the symbol tables are extracted from the file during download and used by dBUG Only global symbols are kept in dBUG The dBUG symbol table is not cleared prior to downloading so it is the user s responsibility to clear the symbol table as necessary prior to downloading If an entry point address is specified in the S record COFF or ELF file the program counter is set accordingly Examples To download an S record file with the name srec out the command is dn s srec out To download a file with the name coff out the command is dn c coff out To download a file using the default filetype with the name bench out the command is dn bench out To download a file using the default filename and filetype the command is dn M5282EVB User s Manual Rev 2 Freescale Semiconductor 3 17 Using the Monitor Debug Firmware FL Flash Utilities Info Usage
81. ntiguous block of memory starting at address begin stopping at address end with the value data Width modifies the size of the data that is written If no width is specified the default of word sized data 1s used The value for addresses begin and end may be an absolute address specified as a hexadecimal value or a symbol name The value for data may be a symbol name or a number converted according to the user defined radix normally hexadecimal The optional value inc can be used to increment or decrement the data value during the fill This command first aligns the starting address for the data access size and then increments the address accordingly during the operation Thus for the duration of the operation this command performs properly aligned memory accesses Examples To fill a memory block starting at 0x00020000 and ending at 0x00040000 with the value 0x1234 the command is bf 20000 40000 1234 To fill a block of memory starting at 0x00020000 and ending at 0x0004000 with a byte value of OxAB the command is bf b 20000 40000 AB To zero out the BSS section of the target code defined by the symbols bss start and bss end the command is bf bss start bss end 0 To fill a block of memory starting at 0x00020000 and ending at 0x00040000 with data that increments by 2 for each width the command is bf 20000 40000 0 2 M5282EVB User s Manual Rev 2 Freescale Semiconductor 3 9 Using the Monitor Debug Fir
82. oard Axiom Software Resident firmware package that provides a self contained programming and operating environment dBUG M5282EVB User s Manual Rev 2 Freescale Semiconductor M5282EVB Introduction DB 9 2 RS 232 26 pin Debug Header connector transceivers 2 Clocking 8 MHz RJ 45 Ethernet ColdFire MCF5282 Osc Xtal connector Transceiver 25 MHz Osc DB 9 CAN Transceiver 2 5b ol xw connector al E a 515 2 o e i s S amp Al 218 SDRAM MCU Target Board connectors 16 Mbytes Flash 2 Mbytes SRAM 512 Kbytes v v 2 120 pin Daughter Card expansion connectors Figure 1 1 M5282EVB Block Diagram 1 1 MCF5282 Microprocessor The microprocessor used on the M5282EVB is the highly integrated Freescale MCF5282 32 bit ColdFire variable length RISC processor The MCF5282 implements a ColdFire Version 2 core with a maximum core frequency and external bus speed of 80MHz Features of the MCF5282 include 512 Kbyte Flash memory e 64 Kbytes of dual ported SRAM e System debug support Fast Ethernet Controller FEC e FlexCan 2 0B QSPI QADC e Four 32 bit DAM timers M5282EVB User s Manual Rev 2 Freescale Semiconductor 1 3 M5282EVB Introduction Two 4 channel general purpose timers Four periodic interrupt timers PITs Software watchdog timer Phase Locked Loop PLL Two interrupt controllers DMA controller 4 channels External bus int
83. on 80 Ww xu w 20 oy xu i 250 oy za iv ea 00 w ry a as acte Acte Torea M5282EVB User s Manual Rev 2 Freescale Semiconductor B 6 Schematics L EL Jo 9 19909 2002 cl Jequie oN Aepsen OL Kiowan USe 4 JequinN 92 ZBZSAOW 2101010 10 preog gAIZ8ZSN enu 14000 0981 9851 SdS VIOHOLOIN HOLO3S 1008 WO LLOS AHOW3IW HSV14 91 jut anyo 899 189 lo Lela 0306 8009 LA762WV SO usej gt 30 gt 19599 OLSH HAM WH ON 91 1008 use 4 IN lt 6 gt gt ZB Suid pany 9 Dumes nezed lo celv lo ezlv Rev 2 s Manual M5282EVB User B 7 Freescale Semiconductor Schematics l jo 2 19909 2002 21 211215 JequinwN 92 1 IN CBZGAOW IOJOIOJA y 10 uonn e 3 gA328cSl 0031 9851 585 VIOHOLOIN jou 4927821 185 LIA jut 290 jut M v anto 199 099 690
84. onnectors are idea for interfacing to a custom daughter card or for simple probing of processor signals Below is a pinout description of these connectors M5282EVB User s Manual Rev 2 Freescale Semiconductor M5282EVB Introduction Table 1 20 J2 D23 mom spo pep 9s pep ow w oo w Sw w 9 __ Pepe wm wo p 8 EC BERN Em sw qme x se 9e Table 1 21 J3 qz ow e wee w ww s 9e ww je ow s M5282EVB User s Manual Rev 2 1 18 Freescale Semiconductor M5282EVB Introduction Table 1 21 J3 continued EUNT CREE ELUCET S s mw s wwe 5 w su Lr me e wes e se s mw sw e awcm m eum _ Ds me qup eme ew m ww LINE a eer s e umm foe aay Em ewe ww e omm w wm Es oe sp _ os ox Ew ewe p ew ew w we eme s ow Ge ran fen 1 5 3 Reset Switch S2 The reset logic provides system initilization Reset occurs during power on or via assertion of the signal RESET which causes the MCF5249 to reset Reset is also triggered by the reset switch S1 which resets the entire processor system A hard reset and voltage sense controller U12 is used to produce an active low power on RESET signal The reset switch S2 is fed into U12 which generates the signal which is fed to the MCF5282 reset RSTI M5282EVB User s Manual R
85. or CPU combinations may use additional commands not listed below Table 3 1 dBUG Command Summary Mnemonic Syntax Description ASM asm lt lt addr gt stmt gt Assemble BC be addr1 addr2 length Block Compare BF bf lt width gt begin end data lt inc gt Block Fill BM bm begin end dest Block Move BR br addr lt r gt lt c count gt lt t trigger gt Breakpoint BS bs lt width gt begin end data Block Search DC dc value Data Convert DI di lt addr gt Disassemble DL dl lt offset gt Download Serial DLDBUG didbug Download dBUG DN dn lt gt lt gt lt gt s lt 0 offset gt gt lt filename gt Download Network FL fl erase addr bytes Flash Utilities fl write dest src bytes GO go lt addr gt Execute GT gt addr Execute To HELP help command Help IRD ird module register Internal Register Display IRM irm module register data Internal Register Modify LR Ir lt width gt addr Loop Read LW Iw width addr data Loop Write MD md lt width gt begin end Memory Display M5282EVB User s Manual Rev 2 Freescale Semiconductor Using the Monitor Debug Firmware Table 3 1 dBUG Command Summary continued Mnemonic Syntax Description MM mm lt width gt addr data Memory Modify MMAP mmap Memory Map Display RD rd lt reg gt Register Display RM rm reg data Register Modify RESET reset Reset SD
86. ors and User Components 1 5 1 Expansion Connectors Three 2x10 dual row 100mil Berg Headers provide access to a number of MCF5282 peripheral signals Below is a pinout description of these connectors Table 1 17 J5 Pin MCF5282 Signal Pin MCF5282 Signal 1 VSSA 2 VRL 3 AN52 PQA0 4 GPTAO 5 ANO PQBO 6 GPTA1 7 RESET 8 GPTA3 9 RSTOUT 10 GPTA2 11 AN56 PQA4 12 GPTB3 M5282EVB User s Manual Rev 2 1 16 Freescale Semiconductor Table 1 17 J5 continued Pin MCF5282 Signal Pin MCF5282 Signal 13 55 14 AN53 PQA1 15 GPTB2 16 AN1 PQB1 17 AN2 PQB2 18 VDDA 19 AN3 PQB3 20 VRH Table 1 18 J6 Pin MCF5282 Signal Pin MCF5282 Signal 1 VSS 2 VSS 3 QSPIDI 4 GPTB1 5 QSPIDO 6 GPTBO 7 QSPICLK 8 QSPICSS3 9 QSPICS2 10 DTOUT3 PTC2 11 QSPICS1 12 CLKOUT 13 QSPICSO 14 URXD2 PAS1 15 IRQ1 16 UTXD2 PASO 17 DTIN3 PTC3 18 DTIN2 PTC1 19 DTIN2 PTD3 20 DTINO PTD1 Table 1 19 J7 Pin MCF5282 Signal Pin MCF5282 Signal 1 VSS 2 VSS 3 IRQ2 4 N C 5 IRQ3 6 N C 7 IRQ4 8 N C 9 IRQ5 10 N C 11 DTOUTO PTDO 12 N C 13 DTOUT1 PTD2 14 N C 15 DTOUT2 PTCO 16 N C 17 N C 18 N C 19 IRQ6 20 IRQ7 1 5 2 Daughter Card Expansion Connectors M5282EVB Introduction Two 120 way SMT connectors J2 and J3 provide access to all MCF5282 signals These c
87. ple v 2b 1a PS dBUG common CPU major and Board major and major and minor minor revision minor revision revision The version date is the day and time at which the entire dBUG monitor was compiled and built Examples To display the version of the dBUG monitor the command is version M5282EVB User s Manual Rev 2 Freescale Semiconductor 3 39 Using the Monitor Debug Firmware 3 5 TRAP 15 Functions An additional utility within the dBUG firmware is a function called the TRAP 15 handler This function can be called by the user program to utilize various routines within the dBUG to perform a special task and to return control to the dBUG This section describes the TRAP 15 handler and how it is used There are four TRAP 15 functions These are OUT CHAR IN CHAR CHAR PRESENT and EXIT TO dBUG 3 5 1 OUT CHAR This function function code 0x0013 sends a character which is in lower 8 bits of D1 to terminal Assembly example assume dl contains the character move l 0013 d0 Selects the function TRAP 15 The character in dl is sent to terminal C example void board_out_char int ch If your C compiler produces a LINK UNLK pair for this routine then use the following code which takes this into account if 1 LINK a6 40 produced by C compiler asm 18 6 41 put ch into dl asm move 140x0013 d0 select the function asm 15
88. recognized Processing cannot be recovered The reset exception places the processor in the supervisor mode by setting the S bit and disables tracing by clearing the T bit in the SR This exception also clears the M bit and sets the processor s interrupt priority mask in the SR to the highest level level 7 Next the VBR is initialized to zero 0x0000 0000 The control registers specifying the operation of any memories e g cache and or RAM modules connected directly to the processor are disabled Once the processor is granted the bus it then performs two longword read bus cycles The first longword at address 0 is loaded into the stack pointer and the second longword at address 4 is loaded into the program counter After the initial instruction is fetched from memory program execution begins at the address in the PC If an access error or address error occurs before the first instruction is executed the processor enters the fault on fault halted state The Memory that the MCF5282 accesses at address 0 is determined at reset by sampling D 19 18 Table 1 3 D 19 18 External Boot Chip Select Configuration onem pu 00 Internal 32 bit 01 External 16 bit 10 External 8 bit 11 External 32 bit 1 3 Support Logic 1 3 1 Reset Logic The reset logic provides system initialization Reset occurs during power on or via assertion of the signal RESET which causes the 5282 to reset RSTI is triggered by the r
89. registers or memory After software is operational the user may program the MCF5282 Internal Flash EEPROM or the on board FLASH memory for dedicated operation of new software application No additional hardware or software is required for basic operation Specifications e Freescale MCF5282 Microprocessor 80M Hz max core bus frequency Firmware running 64MHz e External Clock source 8MHz Operating temperature 0 to 70 C e Power requirement 6 14V DC 300 ma Typical e Power output 5V and 3 3V regulated supplies e Board Size 7 00 x 7 60 inches 8 layers M5282EVB User s Manual Rev 2 Freescale Semiconductor 1 1 M5282EVB Introduction Memory Devices 16 Mbyte SDRAM 2 MByte 512K x 32 Sync FLASH 512 Kbyte SRAM optional 512 Kbyte FLASH internal to MCF5282 device 64 Kbyte SRAM internal to MCF5282 device Peripherals Ethernet port 10 100Mb s Dual Speed Fast Ethernet Transceiver with MIT UARTO RS 232 serial port for dBUG firmware UART auxiliary RS 232 serial port I2C interface QSPI interface QADC interface FlexCan interface BDM JTAG interface User Interface Reset logic switch debounced Boot logic selectable dip switch Abort IRQ7 logic switch debounced Clocking options Oscillator Crystal or SMA for external clocking signals LEDs for power up indication general purpose I O and timer output signals Expansion connectors for daughter card Expansion connectors for MCU Target B
90. rface to an internal state machine All Flash physical blocks can be programmed or erased at the same time however it is not possible to read from a Flash physical block while the same M5282EVB User s Manual Rev 2 1 6 Freescale Semiconductor M5282EVB Introduction block is being programmed or erased The array used in the MCF5282 makes it possible to program or erase one pair of Flash physical blocks under the control of software routines executing out of another pair Please refer to MCF5282 User s Manual for more details 1 2 6 M5282EVB Memory Map Interface signals to support interface to external memory and peripheral devices are generated by the memory controller The MCF5282 supports 7 external chip selects however three of them are multiplexed with external address lines CS 1 0 are used with external memories and CS 3 2 are easily accessible to users through the daughter card expansion connectors CS 0 also functions as the global boot chip select for booting out of external flash Since the MCF5282 chip selects are fully programmable the memory banks may be located at any any 64 KByte boundary within the processor s four gigabyte address space Following is the default memory map for this board as configured by the Debug Monitor located in the external Flash bank The internal memory space of the MCF5282 is detailed further in the MCF5282 User s Manual Chip Selects 0 3 can be changed by user software to map the
91. rites 0x78 into memory lw b 20000 12345678 M5282EVB User s Manual Rev 2 Freescale Semiconductor 3 25 Using the Monitor Debug Firmware MD Memory Display Usage MD lt width gt begin end The MD command displays a contiguous block of memory starting at address begin and stopping at address end The values for addresses begin and end may be absolute addresses specified as hexadecimal values or symbol names Width modifies the size of the data that is displayed If no width is specified the default of word sized data is used Memory display starts at the address begin If no beginning address is provided the MD command uses the last address that was displayed If no ending address is provided then MD will display memory up to an address that is 128 beyond the starting address This command first aligns the starting address for the data access size and then increments the address accordingly during the operation Thus for the duration of the operation this command performs properly aligned memory accesses Examples To display memory at address 0x00400000 the command is md 400000 To display memory in the data section defined by the symbols data start and data end the command is md data start To display a range of bytes from 0x00040000 to 0x00050000 the command is md b 40000 50000 To display a range of 32 bit values starting at 0 00040000 and ending at 0x00050000 md 1 40000 50000 M5282EVB User s
92. s a breakpoint defined at address addr If no address is specified in conjunction with the r option then all breakpoints are removed Each time a breakpoint is encountered during the execution of target code its count value is incremented by one By default the initial count value for a breakpoint is zero but the c option allows setting the initial count for the breakpoint Each time a breakpoint is encountered during the execution of target code the count value is compared against the trigger value If the count value is equal to or greater than the trigger value a breakpoint is encountered and control returned to dBUG By default the initial trigger value for a breakpoint is one but the t option allows setting the initial trigger for the breakpoint If no address is specified in conjunction with the c or t options then all breakpoints are initialized to the values specified by the c or t option Examples To set a breakpoint at the C function main symbol main see symbol command the command is br main When the target code is executed and the processor reaches main control will be returned to dBUG To set a breakpoint at the C function bench and set its trigger value to 3 the command is br bench t 3 When the target code is executed the processor must attempt to execute the function bench a third time before returning control back to dBUG To remove all breakpoints the command is br r M5282
93. s local or non local netmask In addition the dBUG network download command requires the following three parameters IP address of the TFTP server server IP Name of the file to download filename Type of the file to download filetype of S record ELF or Image Your local system administrator can assign a unique IP address for the board and also provide you the IP addresses of the gateway netmask and TFTP server Fill out the lines below with this information e Client IP sy oh IP address of the board e Server IP pr oes IP address of the TFTP server e Gateway IP address of the gateway e Netmask QUE Network netmask A 2 Configuring dBUG Network Parameters Once the network parameters have been obtained the dBUG Rom Monitor must be configured The following commands are used to configure the network parameters set client client IP set server server IP set gateway gateway IP set netmask lt netmask gt set mac lt addr gt M5282EVB User s Manual Rev 2 Freescale Semiconductor A 1 Configuring dBUG for Network Downloads For example the TFTP server is named santafe and has IP address 123 45 67 1 The board is assigned the IP address of 123 45 68 15 The gateway IP address is 123 45 68 250 and the netmask is 255 255 255 0 The MAC address is chosen arbitrarily and is unique The commands to dBUG are set client 123 45 68 15 set server 123 45 67 1
94. set gateway 123 45 68 250 set netmask 255 255 255 0 set mac 00 CF 52 82 EB 01 The last step is to inform dBUG of the name and type of the file to download Prior to giving the name of the file keep in mind the following Most if not all TFTP servers will only permit access to files starting at a particular sub directory This is a security feature which prevents reading of arbitrary files by unknown persons For example SunOS uses the directory tftp boot as the default TFTP directory When specifying a filename to a SunOS TFTP server all filenames are relative to tftp boot As a result you normally will be required to copy the file to download into the directory used by the TFTP server A default filename for network downloads is maintained by dBUG To change the default filename use the command set filename filename When using the Ethernet network for download either S record COFF ELF or Image files may be downloaded A default filetype for network downloads is maintained by dBUG as well To change the default filetype use the command set filetype lt srecord coff elf image gt Continuing with the above example the compiler produces an executable COFF file a out This file is copied to the tftp_boot directory on the server with the command rep a out santafe tftp_boot a out Change the default filename and filetype with the commands set filename a out set filetype coff Finally perform the
95. struction or a enter period to quit the interactive mode In the non interactive mode the user specifies the address and the assembly statement on the command line The statement is the assembled and if valid placed into memory otherwise an error message 1s produced Examples To place a NOP instruction at address 0x00010000 the command is asm 10000 nop To interactively assembly memory at address 0x00400000 the command is asm 400000 M5282EVB User s Manual Rev 2 Freescale Semiconductor 3 7 Using the Monitor Debug Firmware BC Block Compare Usage BC addr1 addr2 length The BC command compares two contiguous blocks of memory on a byte by byte basis The first block starts at address addrl and the second starts at address addr2 both of length bytes If the blocks are not identical the address of the first mismatch is displayed The value for addresses addr1 and addr2 may be an absolute address specified as a hexadecimal value or a symbol name The value for length may be a symbol name or a number converted according to the user defined radix hexadecimal by default Example To verify that the data starting at 0x20000 and ending at 0x30000 is identical to the data starting at 0x80000 the command is bc 20000 80000 10000 M5282EVB User s Manual Rev 2 3 8 Freescale Semiconductor Using the Monitor Debug Firmware BF Block Fill Usage BF lt width gt begin end data inc The BF command fills a co
96. terface enabled Table 1 6 SW1 4 3 Encoded Clock Mode SW1 3 SW1 4 Clock Mode OFF OFF External clock mode PLL disabled OFF ON 1 1 PLL ON OFF Normal PLL mode with external clock reference ON ON Normal PLL mode w crystal oscillator reference Table 1 7 SW1 7 5 Chip Configuration Mode SW1 5 SW1 6 SW1 7 RCON SW1 1 Mode OFF X X ON Reserved ON OFF ON ON Reserved ON OFF OFF ON Factory Test ON ON OFF ON Single Chip ON ON ON ON Master X X X OFF Single Chip Table 1 8 SW1 9 8 Boot Device SW1 8 5 1 9 RCON SW1 1 Boot Device OFF OFF ON Internal 32 bit OFF ON ON External 16 bit ON OFF ON External 8 bit ON ON ON External 32 bit X X OFF Internal 32 bit M5282EVB User s Manual Rev 2 Freescale Semiconductor 1 9 M5282EVB Introduction Table 1 9 SW1 10 Bus Drive Strength SW1 10 RCON SW1 1 Drive Strength OFF ON Partial Bus Drive ON ON Full Bus Drive X OFF Full Bus Drive Table 1 10 SW1 12 11 Address Chip Select Mode SW1 11 SW1 12 RCON SW1 1 Mode OFF OFF ON PF 7 5 CS 6 4 OFF ON ON PF 7 CS6 PF 6 5 A 22 21 ON OFF ON PF 7 6 CS 6 5 PF 5 A21 ON ON ON PF 7 5 A 23 21 X X OFF PF 7 5 A 23 21 1 3 2 Clock Circuitry The M5282EVB three options to provide the clock to the MCF5282 These options can be configured by setting JP 25 27 See Table 1 11 Table 1 11 M5282EVB Clock Source Selection JP25
97. tors 12 2 D3 D1 LSGT670 Bicolour LED Infineon SMT LEDs 13 2 102 04 LGT670 GREEN LED Infineon SMT LEDs 14 3 D5 D15 D16 LST670 RED LED Infineon SMT LEDs 15 4 06 07 08 09 LTL 94PURK TA LED 16 3 010 012 013 MBRS340T3 LED 17 2 1014 01 LTL 94PGK TA LED 18 1 MULTICOMP MCHTE 15M 5 Fast blow fuse M5282EVB User s Manual Rev 2 Freescale Semiconductor Evaluation Board BOM Table C 1 MCF5282EVB BOM continued Item Qty Reference Part Function 19 5 JP16 JP17 JP18 19 JP23 Harwin M22 2010305 3 way jumper 20 30 JP1 JP2 JP3 JP4 JP5 JP7 JP8 Harwin M22 2010205 2 way jumper JP9 JP10 JP11 JP12 JP13 JP14 JP15 JP20 JP21 JP22 JP25 JP26 JP27 JP28 JP29 JP30 JP31 JP32 JP33 JP34 JP35 JP36 JP37 21 1 JP6 Samtec 2x2 male header 2x2 jumper 2mm 22 1 JP24 Samtec 2x3 male header 2x3 jumper 2mm 23 1 J1 Amphenol RHJS 5381 RJ45 connector RJ45 LED 24 2 J3 J2 AMP 177984 5 120way SMT Receptacle 25 1 144 Thomas amp Betts 609 2627 BDM 26 way header 26 3 145 6 100mil Berg Headers 2x10 27 1 28 1053378 1 External Clock Input SMA connector 28 1 J9 QSPI connector 0 1 pitch 29 1 J10 I2C Molex Conn 71565 I2C connector 30 4 1111213 4 SIEMENS B82111 B C24 25uH Inductors 31 3 P1 P4 P5 Molex DB9 conn DB9 RS232 PORT 32 1 P2 Switchcraft RAPC712 PSU barrel connector 33 1 P3 Augat 25V 02 2 way bare wire power connector 34 2 R
98. value If no match is found then the address is incremented to 0x00040004 and the next 32 bit value is read and compared M5282EVB User s Manual Rev 2 3 12 Freescale Semiconductor Using the Monitor Debug Firmware DC Data Conversion Usage DC data The DC command displays the hexadecimal or decimal value data in hexadecimal binary and decimal notation The value for data may be a symbol name or an absolute value If an absolute value passed into the DC command is prefixed by Ox then data is interpreted as a hexadecimal value Otherwise data is interpreted as a decimal value values are treated as 32 bit quantities Examples To display the decimal and binary equivalent of 0x1234 the command is dc 0x1234 To display the hexadecimal and binary equivalent of 1234 the command is dc 1234 M5282EVB User s Manual Rev 2 Freescale Semiconductor 3 13 Using the Monitor Debug Firmware DI Disassemble Usage DI lt addr gt The DI command disassembles target code pointed to by addr The value for addr may be an absolute address specified as a hexadecimal value or a symbol name Wherever possible the disassembler will use information from the symbol table to produce a more meaningful disassembly This is especially useful for branch target addresses and subroutine calls The DI command attempts to track the address of the last disassembled opcode If no address is provided to the DI

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