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1.     contactl    from CPU         contact2       Figure 21  Relay DO  The relay output is a dry contact so there is no polarity of the contact 1 and 2  The relay  used is a Takamisawa JY 5H K type and is capable of load up to   e 5A at 30VDC  e  A at 125VAC  e  A at 250VAC    23 LED    2 LEDs  green and red  are equipped to indicate working status and can be controlled  by software     24 Speaker  amp  Ear phone    A buzzer is equipped as the audio indicator  Its tone is software controllable whereas  the volume is to be tuned via a variable resistor  Depending on application needs  an  ear phone can also be attached  The audio jack has been intentionally designed to  disable the buzzer while the ear phone is connected  Usual ear phone used in Walk   Man can be used with 520     25 Wall mount shelf  An optional metal case can be used if mounting on the wall is required     26  Table stand    An optional table stand can be used if mounting on the table is required     Syntech Information Co  Ltd    31   Table of Contents    
2.   During system initialization   this register is set to 186     1 sec  1 day   1000000    24 hours   60 min   60 sec    11 57 ppm    12 ppm    Write protected  The time and trimming register are write protected  and they won t be changed  accidentally     Cold start detection  There is a cold start bit in the chip  This bit is set if power loss encountered or on  first power on  The software can then recognize this bit and initialize the calendar  chip     List of Figures  14  Syntech Information Co  Ltd     Cipher 520 Hardware Reference Manual    15  Memory and Calendar Backup Battery    A 3 6V rechargeable NiMH battery is used to backup the SRAM and keeps the calendar  chip running even when system power is off  Its capacity is 60 mAh and is trickle  charged with a typical 1 2 mA current  After fully charged  it is able to sustain for more  than 15 months as follows     SRAM  LL type  SONY CXK581000   current consumed is 0 7uA  typical  and 4uA  max  0 to 40  C   V3022   0 9uA  typical   1 5uA  max      Time  typical    60 mAh    0 7   0 9    37500 hrs   1562 days  gt  52 months   Time  worst    60 mAh    4 0   1 5    10909 hrs   454 days  gt  15 months  A switch is equipped to disconnect and preserve battery power when the 520 is not to be  used for a while  e g  during shipping   This switch must be normally turned on else  the SRAM contents and system time will get lost once the 520 was turned off  However   the 520 can still work properly regardless of this switch sett
3.  30  Figure 21  Relay DO iii aii 31   List of Figures Syntech Information Co  Ltd     Cipher 520 Hardware Reference Manual    1  Preface    This manual provides in depth hardware informations of the Cipher 520 programmable  terminal and serves as a reference for hardware and maintenance engineers  Assumption  has been made that readers of this manual have basic knowledge of electric and or  electronic theory     Numberings of all components  including connectors  passive and active components  conform to the PCB V0 03  However  Syntech does not guarantee this conformity  The  numberings and locations of components might be re arranged  For confirmation  please  refer to the PCB and its schematics  After all  this manual intends to describe the  operation theory of the circuitry utilized     Syntech Information Co  Ltd  Table of Contents    Cipher 520 Hardware Reference Manual    2  General Features    The Cipher 520 is equipped with the followings     TLCS 900 16 bit CPU running at 14 7456 MHz   Program   512 KB flash memory   Data memory   128 KB battery back up SRAM   Memory card   optional  512 KB to 2 MB SRAM  on a 512 KB basis   Fine tunable calendar chip   Memory  amp  calendar chip backup 3 6V NiCd battery    optional 1 2V X 7  1200 or 1800 mAh rechargeable NiMH battery X 1 or 2 for  operation backup    Battery external DC voltage monitor circuit on board  Self shutdown circuit on board  to prevent battery over discharge   optional slot bar code reader or magnetic card
4.  50  C  Temperature  storage     20 to 70   C   EMC regulation   FCC class A and CE approved    Physical    Dimensions   mm  including battery holder   Weight   maximum including all batteries    Material   ABS  Color   dark Gray    List of Figures  4  Syntech Information Co  Ltd     Cipher 520 Hardware Reference Manual    5  Nomenclature    5 1  Front view       Figure 1 Front View    1  Red and Green LED for status indication   2  LCD display  240 X 64 or 128 X 64    3  optional slot type reader  barcode or magnetic card   4  Keyboard   5  Volume   6  external ear phone connector   7  external PC AT keyboard connector   8  Reader port  1   9  Reader port  2    Syntech Information Co  Ltd   5  Table of Contents    5 2  Rear View    Cipher 520 Hardware Reference Manual       List of Figures    1   2   3   4   5   6   7   8   9     Figure2 Rear View    Optional Operational Battery  COM  connector   COM2 connector   COM3 connector   Digital input output connector  external power DC jack   Power switch   through hole for slot reader cable  table stand mounting hole     6  Syntech Information Co  Ltd     Cipher 520 Hardware Reference Manual    JP6  JPS    Ul    COM1 board  COM2 board    U8     H po H  U10 i BT1    JP3  JP4    JP12             JP8    Figure3 Main PCB front    1  JP9  digital I O 20  JP3  battery  1   2  P3  COMI 21  JP4  battery  2   3  P2  COM2 22  JP8  keyboard connector  4  Pl  COM3 23  JP12  reader 1 connector  5  J1  12V DC 24  JP11  reader 2 connector  6  S3
5.  asserted again  To restart the machine  the power switch must be turned off and then  on again     Syntech Information Co  Ltd   11  Table of Contents    Cipher 520 Hardware Reference Manual    9  Reset    The system reset signal is generated by a voltage detector chip Maxim MAX703  or  compatible chips   It outputs an active low reset signal when the system power drops  below a pre determined voltage level  Vdet    The reset signal then changes to high  when the power is higher than another pre determined voltage level  Vdet    The Vdet   is about 200 mV higher than Vdet   This is known as hysteresis  and it prevents noise  from false triggering the reset circuitry  The TLCS 900 is guaranteed to work within 5V   10   and the Vdet  is set to 4 6V  This reset signal does not only ensure the proper  operation of the CPU but also is used to reset the UART chip  NS82C50  and control  SRAM access  connecting to SRAM CE2  during power up and power down  The later  is very important as the SRAM contents might be changed by unwanted spikes during  supply voltage changes     Besides this basic function  this chip also provides power supply switching between   5V and back up battery  for SRAM  calendar and so on   That is  when power switch  is off  the SRAM contents can be preserved and the calendar chip running is not  interrupted     List of Figures  12  Syntech Information Co  Ltd     Cipher 520 Hardware Reference Manual    10 CPU    The CPU used in 520 is a Toshiba 16 bit CMOS CP
6.  power switch 25  BT1  3 6V NiHM battery  7  JP7  LCD connector 26  P4  reader 1   8  J2  DIO board connector 27  P5  reader 2   9  DIO board 28  JP10  external AT keyboard  10  JP6  COM1 board connector 29  J3  ear phone   11  COM1 board 30  R40  volume   12  JP5  COM2 board connector 31  LS1 Buzzer   13  COM2 board 32  S2  manual reset   14  R27  LCD view angle tuning 33  S1  NiHM battery on off  15  JP1  memory card connector 34  Ul  CPU   16  D1  red LED 35  U8  UART fot COM3   17  D2  green LED 36  U10 calendar chip   18  Fl  1 amp fuse for main board    19  F2  1 amp fuse for external devices    Syntech Information Co  Ltd   7  Table of Contents    U3    U2  U6    List of Figures    Cipher 520 Hardware Reference Manual       Figure 4 Main PCB back    1  U6 Reset  2  U3 1Mbit SRAM  3  U2 4 Mbit flash memory     8  Syntech Information Co  Ltd     Cipher 520 Hardware Reference Manual    7  Power Circuit    7 1  Power Source    The 520 can be powered from 2 sources   the external  12VDC or operation backup  battery  If line power was down  the 1200 or 1800 mAh NiMH battery pack then took  the place to provide the system power  The switching from external DC power to the  battery is accomplished by a simple pair of diodes and is not even noticed by the  operator     J1    DC Jack  Figure5 Main Power Connector    7 2  Switching Regulator    A high efficiency buck type switching regulator  Maxim MAX1626  is used to generate  the required system power   5V   This regulator is c
7.  reader    2 reader ports each for barcode scanners  Wand or Laser emulation   or  single dual track magnetic card readers    128X64 or 240X64 graphic type LCD display with LED back light  rubber keyboard  up to 8 X 8    up to 16 LEDs on the keyboard board   8 digital input output  each can be configured to input or output  external keyboard port for external PC AT keyboard attachment  RS232 port X 1    Communication port X 2  each can be configured as CMOS RS232  RS232   RS485  half duplex   RS485  full duplex  or 20 mA current loop     List of Figures Syntech Information Co  Ltd     Cipher 520 Hardware Reference Manual    3  What   s New    Compared to Cipher 510  many features have been enhanced and are listed below     Indicator Good Read  amp  Ready also  up to 16 LEDs on the  keyboard board    128KB flash 512KB flash  up to 512 KB up to 2MB   128KB    boards  input or output  switching regulator    resettable 1 Amp fuse X 2  speaker or ear phone  programmable tunable via variable resistor       Syntech Information Co  Ltd   3  Table of Contents    Cipher 520 Hardware Reference Manual    4  Characteristics    Basic characteristics of the Cipher 520 are listed below     4 1     4 2     4 3     Electrical  e Main Power Supply Voltage   12V  5  DC  Power consumption   maximum with LCD backlight off and no external devices  attached  Environmental    Humidity  operating    non condensed 20  to 90   Humidity  storage    non condensed 10  to 95   Temperature  operating    0 to
8.  share the same pin  However  the software is able to  tell which type of the readers are attached     1 9  OOOO DO ODO    JP 11  amp  12  male 2 54 mm SIP       DB 9 Male    00000  0000    Front Veiw    P4  amp  P5  D type 9 pin male    Figure 7 Reader Connector    JP11  amp  12 P4  amp  PS  1  Data    7 7  Vee   5V       The JP11 and JP12 are mainly for attaching slot type readers  And since they share the  same signal lines as P4 and P5  They should not be used at the same time  For example   if JP11 is attached to the slot type MSR then P4 should not be used  else fault would  occur        Syntech Information Co  Ltd   17  Table of Contents    Cipher 520 Hardware Reference Manual    18  External PC AT Keyboard    Besides the built in rubber keyboard  an external PC AT keyboard can be attached for  handy data entry  The connector and pin assignment conforms to PC AT standard    keyboard        Mini DIN 6M  OO    O      009    Front View  JP10  mini DIN 6 pin  female  Figure 8 External Keyboard Connector    N C   data   5V  Ground  N C      clock    DURAN    Cipher 520 Hardware Reference Manual    19  Keyboard  amp  indicators    An 8 by 8 scanning circuitry has been reserved for accessing the built in rubber  keyboard and LED  up to 16  indicators  The standard keyboard provides the following    keys   e numbers 0 9    e function keys  F1 F8  each has an corresponding LED     e ESC  escape   e clear   e BS  back space  e Space    e Alpha  toggle between numbers and alphas 
9.  with LED   e 4 direction keys  up  down  right and left     e Enter    1  2  3  4  5   6  7  8  9  1        DOO  EO O20  OO O DO OO as    JP8  10 X 2 2 54 mm male connector    Figure 9 Keypad Connector      D8     Vcc   5V     D9     Ground  D10     out select     Dil     in select     D12   0  LED enable    Syntech Information Co  Ltd     11   12   13   14   15   16   17   18   19   20      19     D13   Ground   D14   Ground   D15   Vec   5V  Keyboard IDO  Keyboard ID1  Keyboard ID2  Keyboard  D3    Table of Contents    Cipher 520 Hardware Reference Manual    20  Memory card    The data memory can be extended by adding an optional memory card  Which is able to   provide 512 KByte to 2 Mbyte SRAM  on an 512 KB basis since 4 Mbit size SRAMs   are used   Contents of these SRAMs are backed by an on board 3 6V NiMH battery    same type of battery used on main board   2 slide switches are used for    e Battery on off  if the memory card is not to be used for a while  This switch can be  set to OFF to preserve battery power  Of course  under normal use  it MUST be set  ON    e Memory access on off  when set to OFF  access to these SRAMs are denied  This is  usually used when a memory card is to be switched from one terminal to another   However  care should be taken that the battery ON OFF switch should be at the ON  position else SRAM contents would be lost  Also  under normal use  it should be set  ON    Since the flash writer  which we have mentioned in prior section  uses the 
10. Cipher 520  Hardware Reference Manual    v1 01    Mar 25  1999    O 1997  Syntech Information Corporation  CipherLab    is a registered trademark of the Syntech Information Corporation    Cipher 520 Hardware Reference Manual    TABLE OF CONTENTS    te ta    10   11   12   13   14   15   16   17   18   19   20   21   22     23   24   25   26     Preta ion an PAR N A A N 1  General ESAtUTES cueca e E EO EE EEA aeae 2  ATA ETEESI T SA aE aE OERE ee ee esa re o T OEE E EETA 3  Characters iii ted ras 4  data Bleed 4  42 Environmental andanada abad 4  43e A A O 4  Nomenclatura a adan 5  Jel ON 5  A A A O O 6  PCB 7   PoWer AT i Ti tata tia eI 9  Dee  ROWE SOU 9  T23  SWitehing RE lara 9  Tas  SUSE ares sens  ohreics a a boca sas tad Soe saa Pages tae UE a Ie aaa 9  Us A A O gs gone SE 10  Reset 12   CPU 13   Program Memory Flash li aes 13  Flashear aa talca ais sad  13  Data Memory  SRAM  sssivcivis ascii aria dba n a it 13  Calendar col dd 14  Memory and Calendar Backup Battery        ooococonococnnncccnnncncnoncnononcnononaconancncnanaccnnnos 15  LCD 16   A O O OL 17  External PC AT Keyboard uvinnicioniail dardo na ousted couadeaeds ei eiia 18  Keyboard  SE TOCA A heh ee a eee AAA 19  Mi Card 340 eG Re GG IIa RE A Cie 20  COM POT dotes 21  Disttaldput Op e tel ee 0 25  Docks  Digital Input E AS E A aaa 26  De De  Digtal OVPU o odiosa 28  LED 31   Speaker Go Bar PIO a E 31  Walleimount Shelf  citas a its 31  Fable Stands  lara bt it 31    Syntech Information Co  Ltd  Table of Cont
11. U TMP95C061 and features the  follows     Clock rate up to 20 MHz  14 7456 MHz for 520   mixed 8 16 bit data bus widths   direct addressing up to 16 Mbytes   2 UART ports   4 8 bit timers   2 16 bit timers   10s of I O ports depends on application   4 10 bit ADC channels    11  Program Memory  Flash     4 MBit flash memory  AMD 29F400BT or the likes  is used to store the program code   font and so on and features the follows     e guaranteed 100 000 erase program cycles   e single  5V for read  erase and programming   e 11 blocks each can be individually erased and re programmed  e 8 16 bits data bus    To facilitate program execution performance  this flash memory is accessed via a 16 bit  data bus  A 150 ns or faster access time type flash is used to accommodate the CPU rate     12  Flash writer    Normally  contents of the flash  e g  application program  can be updated by using the  520 itself  of course  by proper programming   However  it is possible that the flash  might get corrupted by improper usage or accident  Since the 520 then cannot even  start up properly  There must be some ways to re program the flash memory  A flash  writer card has been developed by Syntech to prevent nasty soldering  This card is able  to program the flash memory when it is already on the 520 board  For detail usage and  information of this card  please refer to its operation manual     13  Data Memory  SRAM     A 1 Mbit low power SRAM is equipped for program variables  data and so on  It
12. a from a pair of signal lines     Non inverting data   6   Nocomnection         Inverting data   8   Noconnection      4   Noconnection   9 H5V O    5   Noconnection     y O       21 1 3  Full duplex RS485    This is a differential serial communication interface where all terminals send and  receive data each from a pair of signal lines     Syntech Information Co  Ltd   21  Table of Contents    Cipher 520 Hardware Reference Manual      1_   Non inverting transmit data   6   ground      3   Inverting transmit data   8  Nocomnection      4  Noconnection   9  HSV    5  Non invertingreceivedata          RS485 transceivers  both half and full duplex board  are protected by a pair of surge  protectors  Also  when the terminal is at either end of the RS485 bus  a terminator  should be used to cancel signal echoing  This can be easily done by putting the slide  switch to ON position  move the switch to your right hand   which will connect 3  resistors onto the bus as follows        Figure 11 RS485 terminator    22 Speaker    Cipher 520 Hardware Reference Manual       21 1 4  20 mA current loop    This is usually used when electrical isolation between communication sides are required   Pin assignments of the 20 mA current loop are as follows       1  Transmitpower   6   Receivecathode      3 Transmit emitter   8   Ground      4  Receivepower   9 SV    5  ReceiveAmode J Jo ooo    Both transmit and receive part can work in either active  providing power  or passive   getting power from 
13. apable of delivering up to 2 Amp  current  And as a low on resistance P channel MOSFET has been used  the conversion  efficiency is very high even at light loads  80  or more under 10 mA load  Low ESR   equivalent series resistance  type tantalum capacitors are used both at input and output  sides to reduce ripples    Also  it is capable of 100  duty cycle operation  That is  when the input voltage is low   usually when the operational back up battery is used and is almost drained   the  MOSFET is turned on all the time  Thus  long working time utilizing the battery can be  achieved     7 3  Fuse    Two resettable fuses are used to protect the circuitry  These fuses are actually  thermistor like components whose resistance increase when temperature rises  results  from large current flows through  and thus current flows through are limited  Since it is  not actually broken as traditional fuses  replacement is not needed    e Fl  main board  add on boards  memory card  DIO card  COM cards and so on    e 2  external devices such as readers  PC AT keyboards and so on     Syntech Information Co  Ltd   9  Table of Contents    Cipher 520 Hardware Reference Manual    8  Operation Battery    8 1 1  Battery  To facilitate procurement  off the shelf battery pack is used as follows     e NiMH  1 2V X 7  free of memory effect  e 1200 or 18000 mAh    After fully charged  if LCD backlight is on and no external devices been attached  one  battery pack can last for 2 5 hours  Of course  if l
14. ents    Cipher 520 Hardware Reference Manual    LIST OF FIGURES   Figure 1       Front View ci iaa 5  Fig  re 2 Rear View nosene sauna sno douse aco as R 6  Figure 3  Main PCB froin ida 7  Figure 4  Main PUDOR RIO 8  Figure 5  Main Power Connector                0 cccccceccceesceesceceseceseceeeeesaceceaeceeeeeeeenseeesaeenas 9  Figure 6  LCD Connector    530 alinne Maeda isos asae 16  Figure 7  Reader Connector eins a 17  Figure 8  External Keyboard Connector     oooooonnccnnncninccnonccconoconoconcconnnoonnoconccnnccnancnos 18  Figure 9  Keypad Connector icon talas 19  Figure 10  COM port Connector  iii ti e ae Gas ete 21  Figure 11  RS485 terminator    id Dude is 22  Figure 12  20 mA current loop transmit connection         ooonooccnnnnccnnncccnnncccinnnccinnnos 23  Figure 13  20 mA current loop receive connection      ooonoonnnnnnnncnnccnnccccocaconccanccinncnns 24  Figure 14  DIO board connector   ienc tesdcouiswtnd caeincaineacs alia eae 23  Figure 15  DIO connector titi ds 25  Figure 16  CMOS level DL dias 26  Figure 17  Photo isolated DI                   cccccccccssscecssscecssscesssscessscceessscesnsseesneessnenessneees 27  Figure 18  Digital Input Example       oooooonnccnnncnnnncnnnconoccconccoonccononono nono conno cono canccnnncnos 28  Figure 19  Digital Input Example        ooooonncnnnnccnnncnnccnnccnconcconnccono conc conn conocio cono cnnncnnncnon 29  Figure 20  Digital Input Example         ooooooconnnnccnnoncccnonccinoncnononccononcconnnononnnccnnnnccnnnnoo
15. external device  mode        R22100 1 4W transmit power   5V O   5V transmit collector  M  a  gt d  A  TLP627      transmit emitter receive anode  IN  1 5K  ransmit data  Loh  PAISU receive cathode  SNE  520 in trasmit active mode 520 in receive passive mode    Figure 12 20 mA current loop transmit connection       Syntech Information Co  Ltd    23   Table of Contents    Cipher 520 Hardware Reference Manual       R22 100 1 4W receive power        5V O    l receive anode  receive data                r    PA 4  receive cathode transmit collector  ee  INO  transmit emitter  SE  520 inreceive active mode 520 in transmit passive mode    Figure 13 20 mA current loop receive connection       24 Speaker    Cipher 520 Hardware Reference Manual    22  Digital Input   Output    8 digital input output pins has been reserved and each can be individually set to input or  output  An optional DIO board can be used to accommodate kinds of input output needs       J2  dual in line  15 X 2  2 54 mm male connector    Figure 14 DIO board connector       Shorts to JP9 pin 3 to 22    DB 25 Female    OOOOOODOOOOOO  OOOCEOOOOOOG  O    Front View    JP9  D type 25 pin Female connector    Figure 15 DIO connector    No         Ground   24 SV  DIO board dependent    Syntech Information Co  Ltd    25   Table of Contents    Cipher 520 Hardware Reference Manual    22 1  Digital Input    2 kinds of digital inputs are available    e CMOS type   This is the  5V CMOS type digital signal  For 41 40 board  pin as
16. ing since the SRAM and  calendar chip is at that time supplied by the system  5V     Syntech Information Co  Ltd   15  Table of Contents    Cipher 520 Hardware Reference Manual    16 LCD    Two types of LCD displays can be used in 520 as follows     e 240 X 64 dots  e 128 X 64 dots    Both are STN type graphic display equipped with LED back light   The typical back light current for 240X64 type is 320 mA        000    22    Figure 6    JP7    OO    LCD Connector    This is a 22 pin SIP  single in line 2 54 mm pitch  connector     Ground   Vcc   5V   Vo  view angle control  A1  address bus   read write control  chip enable   D8  data bus    D9  data bus      D10  data bus   10  D11  data bus   11  D12  data bus     CHAIAARWNS    List of Figures    12   13   14   15   16   17   18   19   20   21     22    16    D13  data bus    D14  data bus    D15  data bus    chip select  1   chip select  2   reset   Vee   10V   LED backlight anode  shorts to  5V  LED backlight cathode   LED backlight anode  shorts to  5V      LED backlight cathode    Syntech Information Co  Ltd     Cipher 520 Hardware Reference Manual    17 Reader    There are total 2 reader ports provided  each can be either a Barcode slot reader   Barcode Scanner  Wand Laser emulation   or up to dual track magnetic card reader   They are equivalent in both hardware and software  Their connectors and pin   assignments are listed below  Beware that  in order to decode barcode and magnetic  card at the same time  some signals
17. ly voltage of the external device  V_   negative supply voltage of the external device  Vf   LED forward voltage  Ry   current setting resistor    Ron   switch contact resistance    If  V4   V    5V and maximum Ron is 100 then    5 1 3    R1  10 2 1 mA  Ry  lt  3 7KQ    22 2  Digital Output    3 kinds of digital outputs are available     CMOS level DO    28 Speaker    Cipher 520 Hardware Reference Manual    For 41 40 board  pin assignments of the JP9 are as follows     DO  3  DO  4       10K  U A       from CPU I O pin 1 2 Digital Output    74HC04    Figure 19  CMOS level DO    Syntech Information Co  Ltd    29   Table of Contents    Cipher 520 Hardware Reference Manual      Open collector DO    For 41 40 board  pin assignments of the JP9 are as follows     DO  3         15  bon  gt  gt  gt       ee COMMON    10K    from CPU I O pin 1 2     Digital Output  ULN2003             74HC04    Figure 20  Open collector DO    Care should be taken that 1f inductive type load is to be connected  the COMMON  point can be used for inductor inherent reverse EMF suppression  For example     Common    external power       This would connect the ULN2003 internal suppressing diode across this inductive  load     30 Speaker    Cipher 520 Hardware Reference Manual      Relay Output    For 41 40 board  pin assignments of the JP9 are as follows     DO  1  contact  1 DO  3  contact  1  DO  1  contact  2 DO  3  contact  2    DO  2  contact  1 DO  4  contact  1  DO  2  contact  2 DO  4  contact  2   
18. memory card   connector also  A JP2 connector is intentionally left on the board such that the flash   writer can still be used when the memory card is equipped     Also  like the battery on the main board  the 3 6V NiHM battery is charged by the  system  5V  After fully charged  the data retention time is estimated below     SRAM  LL type  SONY CXK581000   current consumed is 0 7uA  typical  and 4uA  max  0 to 40  C     Time  1 SRAM  typical    60 mAh    0 7    85714 hrs   3571 days  gt  119 months  Time  1 SRAM  worst    60 mAh    4 0    15000 hrs  625 days  gt  20 months    More SRAMs are equipped  less data retention time     20 Speaker    Cipher 520 Hardware Reference Manual    21  COM port    There are totally 3 serial communication ports  namely COM1  COM2 and COM3   They all features DB 9 female connector as depicted below     DB 9 Male    00000  0000  Front Veiw    Figure 10 COM port Connector    For flexibility  for COM1  amp  2  4 kinds of COM boards can be attached to accommodate  application needs as follows    e RS232   e Half duplex RS485   e Full duplex RS485   e 20 mA current loop    Whereas the COM3 has been fixed to RS232     21 1 1  RS232    This is an EIA RS232C compatible interface and provides 4 signals as follows       1  Grun   6   Nocomecti  on        3  Receivedata   8  RTS    4   Noconenction   9 45V O    5  ground   d   E    21 1 2  Half duplex RS485    This is a differential serial communication interface where all terminals send and  receive dat
19. nent  damage such as polarity reversal  A monitoring and shutdown circuitry is used to  prevent this from happening  The battery voltage is feed to the CPU on chip ADC via a  resistor divider and then is checked by the program  If the battery was drained  the  system will shutdown the system power     During the discharging cycle  from fully charged to drained   the battery voltage drops  rapidly at the beginning and then stays around 1 2V during most of the cycle   70     Finally when it is about to be drained  the voltage starts to drop again  Unfortunately the  battery voltage alone is not sufficient to decide the remaining capacity of the battery   The recommended voltage level is 1 1V per cell for battery low and 1 0V for drained   That is  if the whole battery pack drops to below 6 0V  it is considered to be drained and  the system power will be shutdown     List of Figures   10   Syntech Information Co  Ltd     Cipher 520 Hardware Reference Manual    The shutdown is accomplished by a Flip Flop and its glue circuits  Its output is reset to  low  power enabled  during power on  A CPU output pin can then set it to high  to  shutdown the switching regulator  by sending a negative going pulse  An R C network  prevents power on spikes to false trigger the circuit by disabling it for the starting 50ms   After shutdown  this Flip Flop is still powered to keep this shutdown signal  which  however consumes very little current  The shutdown signal stays even if the main power  is
20. onger working time is required  both  battery packs can be equipped to double it     8 1 2  Charging    The charging current is typically 36 mA   0 02C  In this way  the battery pack can be  fully charged  from fully drained  in about 60 hours  This is also the safe charging  current when the battery pack is fully charged  Else heat will be generated and shall  damage or shorten useful life of the battery pack    Note that this is not a software controllable charging  As long as the main power   12V   is available  even if the power switch is off  this charging is taken in place     8 1 3  Maintenance    Normally  the NiMH battery is guaranteed to work for 300 charge discharge cycles  while preserves at least 60  of its original capacity  However  it features a self   discharging characteristic even when it is disconnected  After a long term storage  even  when it is new   several charge discharge cycles should be exercised to restore its  specified capacity  On the shelf battery chargers can be used for this purpose     8 1 4  Protection  amp  Shutdown    The typical voltage for a NiMH battery cell is 1 2V and can be charged up to 1 4V or  even 1 5V when fully charged  When the battery is fully charged  only a small amount  of current can be asserted into the battery  As long as the charge current is within the  specified trickle charge current limit  0 04 C   the battery will not be damaged   However  deep discharging the battery degrades its useful life or even cause perma
21. s  contents are backed up by the on board 3 6V NiMH battery  A 150 ns or faster access  time type SRAM is used to accommodate the CPU rate     Syntech Information Co  Ltd   13  Table of Contents    Cipher 520 Hardware Reference Manual    14 Calendar chip    A battery backup calendar chip is used to retain the system time even when power is off   The chip utilized is a V3022 from EM micro electronic Marin SA  It features the  following outstanding features     Very low power consumption  When powered from the battery  3 6V   the current is typically 0 9uA     Wide operation voltage range  This chip works down to 2V     On chip high precision oscillator  This is a must for accurate time keeping  The oscillator is built in inside the chip  and is factory trimmed     Timer Adjustment  It can also be fine tuned to compensate for a fast or slow clock  This is an  outstanding feature for those applications which need absolute accurate system  time such as a time clock application  The tuning of the calendar chip is done by  modifying the value of the trimming register of the calendar chip     Trimming Register  The speed of the calendar chip can be tuned in units of ppm via a digital trimming  register  The trimming range is from 0 to 255 ppm  The bigger the value of the  trimming register the slower the calendar chip runs  For instance  if the calendar  chip is 1 second slow in one day then the value of the trimming register should  decrease 12 to correctly adjust the calendar chip
22. signments of JP9 are  as follows     DI  1    DI  3  DI  4     5V  10K  100  DI 1 2 to CPU I O pin    74HC04    Figure 16 CMOS level DI       9               e Photo coupled  This is used when electrical isolation is required          6    8  DI  cathode      9    26 Speaker    Cipher 520 Hardware Reference Manual        5V  10K  anode to CPU I O pin  a  gt   TLP521  cathode o eo    Figure 17 Photo isolated DI    Characteristics of the TLP 521 are listed below     1  LED  e Maximum Forward current   70 mA  e Pulse forward current  1 A  e Maximum reverse voltage   5V  e Forward voltage  at 10 mA    1 15V  typical   1 3V  maximum   e Reverse current   10u A  maximum     2  Output Transistor  e Collector Emitter breakdown Voltage   35 V  e Emitter Collector breakdown Voltage   7 V  e Maximum Power dissipation   150 mW  e Maximum collector current   50 mA  e Collector dark current  at 25  C    100 nA maximum  e Collector dark current  at 85  C    SOUA maximum  e Current transfer ratio   100  minimum   600   maximum   e Isolation resistance   10  o  typical   e Isolation Voltage   2500 Vrms  typical     The transistor collector is pulled up by Ri  a 10K resistor and then feed to CPU input  pin  which features a low threshold of 0 8V and high threshold of 2 2V  That is  the  collector voltage must be no more than 0 8V to be treated as low and no lower than 2 2V  to be treated as high     22 1 1  Input High    Ideally  when there is no current flowing through the input LED  the outp
23. ut transistor is  off and the collector is pulled up to  5V  However  leakage current does exist  Assume  a small leakage current flows through the LED then     collector voltage Vc    5V    Ic   Ri   gt  2 2 V    where Ic is the collector current and   collector dark current      LED leakage current   current transfer ratio     Syntech Information Co  Ltd    27   Table of Contents    Cipher 520 Hardware Reference Manual    The lowest collector voltage worst case    5 0     SOuA   IL   600     10 K   5 V   0 5 V   60000   IL  gt  2 2 V and IL  lt  38 pA    That is  the leakage current into the LED should not be larger than 38uA  however this  is much higher than the LED leakage current 10 uA and false trigger is not likely to  happen     22 1 2  Input Low   To input a low  the external device must supply a large enough current to flow through  the LED to turn on the transistor and pull collector no higher than 0 8V  This LED  current can be calculated similar to the case for input high     5V   0 5V    100    IL   10K   lt  0 8 V  then IL gt 0 37 mA    That is  to pull the digital points low  there must be at least 0 37 mA current flowing  through the LED  For example  to connect an external dry contact to the digital inputs        External  Device    Cipher 510   5V           NES og              Collector  RI SWI1     TLP521  Cathode Emitter    Figure 18 Digital Input Example    LED current IL    V4   V    V     R    Ron  0 37 mA   1 mA  safe margin   Where V4  positive supp
    
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