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User Manual for the Mother Boards: 886LCD/ATX(GV) 886LCD

1. Lee cef 49 7 3 1 Advanced settings CPU 49 7 3 2 Advanced settings IDE 50 7 3 3 Advanced settings Floppy 52 7 3 4 Advanced settings SuperlO Configuration 53 7 3 5 Advanced settings Hardware Health Configuration 54 7 36 Advanced settings ACPI Configuration 55 7 37 Advanced settings General ACPI 56 7 3 8 Advanced settings Advanced ACPI Configuration sse en 57 7 3 9 Advanced settings USB 58 G kontron sssLcp ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 6 of 71 7 3 10 Advanced settings USB Mass Storage Device 59 TA else E 60 FE 0d ee P 61 7 5 1 Boot Boot Settings 62 726 lt us M R 63 Chipset sce cece 64 7 7 4 Advanced Chipset Settings Intel Brookdale G NorthBridge Configuration 65 7 7 2 Advanced Chipset Setting
2. 40 4 23 PCI Slot 1 Slot 2 and Slot 3 connectors U u 41 4 23 1 PCI Slot COMMON vais 41 4 23 2 Signal Description PCI Slot 42 4 23 3 886LCD ATX GV 886LCD ATXU GV PCI IRQ amp INT routing 43 SYSTEM RESOURCES u hace 44 51 2 2 2 44 MEE ieu ce oe oS a uu aa 44 5 3 uu M 45 5 4 VO MAD E S 46 55 U sag LLL 46 OVERVIEW OF BIOSFEATURES en Rene 47 6 1 1 System Management BIOS SMBIOS eee 47 6 1 2 Legacy USB Support uuu pce te b ded 47 BIOS CONFIGURATION SETUP 48 T3 Jntrod ction 48 DuBmee 48 7 3 Advanced Menu uuu uu
3. 32 4112 USB Connector 2 3 USB2I89 u Dco Dae te cerae REL ere ELLE aU 33 4 11 3 5 4 5 5 4 5 iia 33 G kontron 886LCD ATX GV ATXU GV 5 6 7 KTD 00647 E Public User Manual Date 2009 01 14 5 of 71 4 12 Audio M ETC 34 4 12 1 Audio Line in Line out and 2 34 4 12 2 CD ROM Audio input 34 4 13 Fan connectors CPU FAN CHASSIS PWR FANN 35 4 14 The Clear CMOS Jumper CIlr CMOS U u J 36 4 15 Front Side Bus Speed FSB u u 36 4 16 Case 5 edict 37 4 17 Trusted Platform Module TPM connector CN7 Unsupported 37 4 18 Front Panel connector CN5 u 38 4 19 GAME MIDI Connector CN6 J 39 4 20 IR Connector lau RE 39 4 21 WOL Connector 40 4 22
4. BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Power Exit Configure Win627THF Super IO Chipset Allows BIOS to Enable OnBoard Floppy Controller Disabled to ie Floppy Drive Swap Disabled Serial Portl Address 3F8 IRQ4 Serial Port2 Address 2F8 IRQ3 Serial Port2 Mode Normal Parallel Port Mode Disabled OnBoard Game Port Disabled lt Select Screen Select Item t change option Fl General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options Description OnBoard Floppy Controller Disabled Enable or disable the Floppy Controller Enabled Serial Port1 Address Disabled Select the BASE addresse and IRQ 3F8 IRQ4 2F8 IRQ3 3E8 IRQ4 2E8 IRQ3 Serial Port2 Address Disabled Select the BASE addresse and IRQ 3F8 IRQ4 2F8 IRQ3 3E8 IRQ4 2E8 IRQ3 Serial Port2 Mode Normal Select Mode for Serial Port2 IRDA ASK IR Parallel Port Address Disabled Select the I O address for the LPT 378 278 3BC Parallel Port Mode Normal Select the requested operation mode Bi Directional EPP ECP EPP Version 1 9 1 7 Setup the required version of EPP ECP Mode DMA Channel DMAO Select a DMA channel DMA1 DMA3 Parallel Port IRQ IRQ5 Select the IRQ for the parallel port IRQ7 OnBoard Game Port Disabled Enable Disable Game Port Enabled G kontron 886LCD ATX GV ATXU
5. Line out Left Line out Right GND Note 1 Signals are shorted to GND internally in the connector when jack plug is not inserted 4 12 2 CD ROM Audio input CDROM CD ROM audio input may be connected to this connector It may also be used as a secondary line in signal Type loh lol Pull U D CD Left L 3 CD GND CE __ _ CD Left Left and right CD audio input lines or secondary Line in CD Right CD GND Analogue GND for Left and Right CD This analogue GND is not shorted to the general digital GND on the board G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 35 of 71 4 13 Fan connectors CPU FAN CHASSIS FAN PWR The CPU FAN FANS is used for connection of the active cooler for the CPU The CHASSIS 2 can be used to power control and monitor a fan for chassis ventilation etc Pull Type loh lol U D UNE a op YS __2 _ 2 jm ao aaa Signal description 12V PWM 12V supply for fan can be turned on off or modulated PWM by the chipset maximum of 1000 mA be supplied from this pin SENSE Tacho signal from the fan for supervision The signals shall be generated by an open collector transistor or similar On board is a pull up resistor 1K to 5V The signal has to be pulses typically 2 Hz per rotation
6. 21 44 Display Connectors eroe u u 22 4 4 1 GRT Connector E 22 4 4 2 uu e A E du Epp eut a d dno 23 45 Parallel ATA harddisk interface uuu u u u u u u u u u 25 4 5 1 IDE Hard Disk Connector IDE P iiie necu tts daa Lad ead 26 4 5 2 IDE Hard Disk Connector IDE S 26 4 6 Serial ATA harddisk interface u 27 4 6 1 SATA Hard Disk Connector SATAQ 5 27 47 Floppy Disk Connector FDC1 28 48 Printer Port Connector u u u u 29 49 Ur os yee a EL EE 30 4 9 1 Serial Port Com1 DB9 30 4 9 2 Serial Port Com2 Pin Header 30 4 10 nre 31 4 10 1 Ethernet connector ETEHBR i i nip ap e RE Hd 31 4 11 USB Connector irure cruces coq acce na ve Gu Qu dr waa Oda re 32 441 1 USB Connector 0 1 USBO T
7. ere wil wawas AD22 AD21 AD20 AD19 GND COMPONENT SIDE cme s A007 33v Pai 33V abs tor Ado Ao GND PWR WR GND 002 or O o AD abo PWR ovo Pwi ACK REQ4 lor Paim sv v PWR v PwC G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 42 of 71 4 23 2 Signal Description PCI Slot Connector SYSTEM PINS CLK Clock provides timing for all transactions on PCI and is an input to every PCI device All other PCI signals except RST INTA INTB INTC and INTD are sampled on the rising edge of CLK and all other timing parameters are defined with respect to this edge PCI operates at 33 MHz RST Reset is used to bring PCl specific registers sequencers and signals to a consistent state What effect RST has on a device beyond the PCI sequencer is beyond the scope of this specification except for reset states of required PCI configuration registers Anytime RST is asserted all PCI output signals must be driven to their benign state In general this means they must be asynchronously tri stated SE
8. INT INT PIROZD INT INT PIROZA INT INT INT PIROZA INT INT INT INT_PIRQ E INT_PIRQ G INT_PIRQ G G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 44 of 71 5 System Resources 5 1 Memory map The table below lists the system memory map Address range hex Size Description 00000000 0007FFFF 512 Kbytes Conventional memory 00080000 0009FBFF 127 Kbyte Extended conventional memory 0009 00 0009FFFF 1 Kbyte Extended BIOS data 000A0000 OOOAFFFF 64 Kbytes 845 VGA Controller Video memory and BIOS 000B0000 OOOBFFFF 64 Kbytes 845 VGA Controller Video memory and BIOS 000 0000 000CBFFF 48 Kbytes 845 VGA Controller Video memory and BIOS 000CC000 000CDFFF 8 Kbytes Realtek 8100 Ethernet boot F0000000 F7FFFFFF 0x8000000 845 Controller 00000 FECOOFFF 0x1000 Motherboard resource APIC 00000 FEEOOFFF 0x1000 Motherboard resource APIC FF8FF800 FF8FF8FF 0x100 Realtek 8100 Ethernet Controller FF8FFCOO FF8FFDFF 0x200 SATA RAID controller FFA7F400 FFA7F7FF 0x400 USB Controller FFA7F800 FFA7F8FF 0x100 Realtek AC97 Audio FFA7FCOO FFA7FDFF 0x2
9. DVOB D 11 0 DVOB Data This data bus is used to drive 12 bit pixel data on each edge of DVOB_CLK This provides 24 bits of data per clock DVOB HSYNC Horizontal Sync This is the HSYNC signal for the DVOB interface The active polarity of the signal is programmable DVOB VSYNC DVOB BLANK Vertical Sync This is the VSYNC signal for the DVOB interface The active polarity of the signal is programmable Flicker Blank or Border Period Indication DVOB BLANK is a programmable output pin driven by the GMCH When programmed as a blank period indication this pin indicates active pixels excluding the border When programmed as a border period indication this pin indicates active pixel including the border pixels DVOBC_CLKINT DVOBC Pixel Clock Input Interrupt This signal may be selected as the reference input to the dot clock PLL DPLL for the multiplexed DVO devices This pin may also be programmed to be an interrupt input for either of the multiplexed DVO devices DVOB_FLDSTL TV Field and Flat Panel Stall Signal This input can be programmed to be either a TV Field input from the TV encoder or Stall input from the flat panel When used as a Field input it synchronizes the overlay field with the TV encoder field when the overlay is displaying an interleaved source When used as the Stall input it indicates that the pixel pipeline should stall one horizontal line The polarity is programmable for both modes
10. OC 48 PWR GND DRVB OC 48 PWR erp DRVA OC 48 cb __ MOTEB OC 48 17 18 Dor _ MEME C T T STEP UR s WDATA T o T a WGATE OC 48 eat TRKOR 15 330R Hj PAR ge 29 30 330R 5 ETE 48 NC DSKCHG IS 330R Signal Description DIR This signal controls the direction of the floppy disk drive head movement during a seek operation A low level request steps through centre STEP This output signal supplies step pulses to move the head during seek operations DENSELO This output indicates whether a low data rate 250 300kbps at low level or a high data rate 500 1000kbps at high level has been selected TRKO Floppy Disk Track 0 active low input to indicate that the head of the selected drive is at track 0 INDEX Floppy Disk Index active low input indicates the beginning of a disk track WPT Active low input signal indicating that the selected drive contains a write protected disk DSKCHG Input pin that senses whether the drive door has been opened or the diskette has been changed G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 29 of 71 4 8 Printer Port Connector PRINTER The printer port connector is provided in a standard DB25 pinout The signal definition in standard printer port mode
11. The PWR 1 be used for high power fans Pull loh lol U D GND Signal description 12V supply for fan A maximum of 2000 mA can be supplied from this pin Tacho signal from the fan for supervision The signals shall be generated by an open collector transistor or similar On board is a pull up resistor 1K to 5V The signal has to be pulses typically 2 Hz per rotation 6 kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 36 of 71 4 14 The Clear CMOS Jumper Cir CMOS The Clear CMOS Jumper is used to clear the CMOS content 2 Default 3 P oy 1 5 2 Clear 3 CMOS To clear all CMOS settings including Password protection move the Clear CMOS jumper with or without power on the system for approximately 1 minute Alternatively if no jumper is available turn off power and remove the battery for 1 minute but be careful to orientate the battery correctly when reinserted 4 15 Front Side Bus Speed FSB Select CPU base clock to one of 3 options by configuring the FSB jumper row JP5 as shown below 1 5 DEFAULT 1 2 JUPER SPEED 1 2 CPU SELECT 2 3 100MHz EMPTY 133MHz gt CPU SELECT p l 100MHz 5 133MHz 3 The CPU used has itself output signals that i
12. devices in the May cause system to malfunction system YES lets th Plug amp Play O S 22 _ operating system PCI Latency Timer 641 aonfiqure pinus Allocate IRQ to PCI VGA Yes 3 Play PnP devices PCI IDE BusMaster Enabled not required for boot Spread Spectrum Mode Disabled m 1 if your system has TPM Clock Enabled Plug and Play operating system PCI Slot 1 IRQ Preference Auto lt 1 PCI Slot 2 IRQ Preference Auto 2 s PCI Slot 6 IRQ Preference Auto ay F change option F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options Description Plug amp Play O S No Select if you have a PnP O S Yes PCI Latency Timer 32 64 96 128 Value in units of PCI clocks for PCI device latency 160 192 224 248 timer register Allocate IRQ to PCI VGA Yes Assigns IRQ to PCI VGA card No Palette Snooping Disabled ENABLED informs the PCI device that an ISA Enabled graphics device is installed in the system so the card will function correctly PCI IDE BusMaster Enabled Setup PCI bus mastering for read write to IDE drives Disabled Spread Spectrum Mode Enabled Spread Spectrum Mode Disabled PCI Slot 1 IRQ Preference Auto 3 4 5 7 9 Manual IRQ selection 10 11 12 14 15 PCI Slot 2 IRQ Preference Auto 3 4 5 7 9 Manual IRQ selection 10 11 12 14 15 PCI Slot 6 IRQ Preference Auto 3
13. Signa Description J1BUTTON1 Active low Joystick switch input 1 J2BUTTON1 Active low Joystick 11 switch input 1 J1X Joystick timer pin This pin connect to X positioning variable resistors for the Joystick Joystick Il timer pin This pin connect to X positioning variable resistors for the Joystick Joystick II timer pin This pin connect to Y positioning variable resistors for the Joystick J2Y Joystick timer pin This pin connect to Y positioning variable resistors for the Joystick J1BUTTON2 Active low Joystick 11 switch input 2 This pin has an internal pullup resistor J2BUTTON2 Active low Joystick switch input 2 This pin has an internal pullup resistor MIDI IN MIDI serial data input 4 20 IR Connector IR1 Pull a mas Pwr i Signa Description Infrared receive signal Support IrDA version 1 0 SIR Protocol with maximum baudrate up to 115 2 K bps Infrared transmit signal Support IrDA version 1 0 SIR Protocol with maximum baudrate up to 115 2 K bps G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 40 of 71 4 21 Connector W O L Pull U D loh lol Type L PWR svsev 1 awa co L T Pv Signa Description Wake on LAN from an external LAN adapter is supported through this signal Connect PME the W O L signals from the adapter to t
14. DIMM2 FSB CASE OPEN FLOPPY DIMM1 Clr CMOS FRONT PANEL CN5 IDE P GAME MIDI CN6 TPM IDE S ATXPWR USB2 3 AGP DVO COM2 FAN2 ATXPWR 12V PCI SLOT 3 PCI SLOT 2 SLOT 1 CDROM 1 CRT MSE USBO KBD USB1 PRINTER Kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 19 of 71 4 1 2 886LCD ATX GV DIMM2 ae k CIr CMOS FRONT PANEL IDE P FR USB2 3 4 v 7 Um AGP DVO SATA1 SATAO 2x PCI SLOT 6 PCI SLOT 5 PCI SLOT 4 FAN1 p PCI SLOT 3 a CDROM PCI SLOT 2 LINE IN LINE OUT PCI SLOT 1 MSE USBO MIC USB1 PRINTER ETHER USB4 05 5 kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 20 of 71 4 2 Power Connector ATXPWR ATXPWR 12V 886LCD ATX GV 886LCD ATXU GV is designed to be supplied from a standard ATX power supply ATX Power Connector 886LCD ATX GV and 886LCD ATXU GV Pull Pull ee SE5V 191 57 8 isf a MEN GND GND 6 S 5 1151 5 Note 5V supply is not used onboard 12V Power Connector 886LCD ATX GV and 886LCD ATXU GV Pull Pull toe sanai De em PWR GND 12V PWR PWR GND 2 12V PWR The requirements to the s
15. 3 SYSTEM 5 10 34A uU LI uW 10 3 2 Processor Support 1 cuan ruis 12 3 8 System Memory 14 3 4 Syst m 15 3 5 Power COMSUMpPtion uu u u 16 4 CONNECTOR DEFINITIONS J U U U u u u u uu u u 17 41 224 una ean 18 4 1 1 886 a u n m Dr es ates P aka ra 18 4 1 2 88G6LCD A X GV L u a lu me ahua 19 42 Power Connector ATXPWR ATXPWR 12MV J 20 43 Keyboard and PS 2 mouse connectors u u u u u J J J J J J 21 4 3 1 Stacked MINI DIN keyboard and mouse Connector MSE amp
16. ATA 66 ATA 100 support PS 2 keyboard and mouse ports Game Midi port LAN Support 1x 10 100Mbits s LAN subsystem using the Realtek RTL8100C LAN controllers PXE netboot supported Wake On LAN WOL supported BIOS e Kontron Technology AMI BIOS core version 8 00 e Support for Advanced Configuration and Power Interface ACPI 1 0 2 0 Plug and Play Suspend To Ram Suspend To Disk SW Watchdog not supported by BIOS Secure CMOS OEM Setup Defaults Always BIOS power setting SATA RAID Support RAID modes 0 and 1 G kontron 886LCD ATX GV ATXU GV KTD 00647 E Instantly Available PC Technology Public User Manual Date 2009 01 14 Page 11 of 71 PCI Rev 2 2 compliant with support for 33 MHz PCI operations Suspend to RAM support Expansion Capabilities PCI Bus routed to PCI slot s PCI Local Bus Specification Revision 2 2 PCI bus with Bus master mode 886LCD ATXU GV board 6x PCI bus with Bus master mode 886LCD ATX GV board 2 x DVO ports for ADD card expansion LPC Bus routed to CN7 connector Trusted Platform Module Header Hardware Monitor Subsystem Fan monitoring CPU FAN CHASSIS FAN PWR FAN Thermal monitoring CPU die temperature System temperature and External temperature input routed to JP3 connector Voltage monitoring Intrusion detect input JP6 SMI violations BIOS on HW monitor not supported Supported by API Windows Operating Sys
17. BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Power Exit The available keys for the Menu screens are as follows lt gt or lt gt Select Screen T or Select Item lt gt or lt gt Change Field lt Tab gt Select Field lt F1 gt General Help lt F10 gt Save and Exit lt Esc gt Exits the Menu The following section lists the available BIOS setup information and features of the different Menus 7 2 Main Menu BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Power Exit System Overview Use ENTER TAB or SHIFT TAB to select a AMIBIOS field Version 08 00 10 vse 11 or Ir to t configure system Time PCB ID Serial 00375748 Part 66610000 Processor Type Intel R Pentium R 4 CPU 2 4GHZ Speed 2400MHz Select Screen Count 1 Select Item t Change Field System Memory Tab Select Field Size 1016 F1 General Help F10 Save and Exit System Time 10 18 15 ESC Exit System Date Mon 03 15 2006 V02 53 C Copyright 1985 2002 American Megatrends Inc Main Menu Selections Options Descrpton System Time HH MM SS Set the system time System Date MM DD YYYY Set the system date G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 49 of 71 7 3 A
18. and mouse Connector MSE amp KBD see below G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 22 of 71 4 4 Display Connectors The 886LCD board family provides onboard two basic types of interfaces to a display Analog CRT interface and a digital interface typically used with flat panels The digital interface to flat panels can be achieved through the DVO port available on the AGP connector by using a dedicated ADD card 4 41 CRT Connector CRT Pull Pull woe UD UD 14111 1 4 Pp vow ewe per a Ro nj wc _ _ L f r memo sR A GREEN 2 12 io TED 2k7 r gf s ANeGND PWR R AO 83 135 HSYNC TBD 9591 j sv PWR PWR DIG GND 45 150 DDCCLK 0 TBD 2k7 Note 1 5V supply the CRT connector is fused by 1 1 reset able fuse Signal Description CRT Connector HSYNC CRT horizontal synchronization output VSYNC CRT vertical synchronization output DDCCLK Display Data Channel Clock Used as clock signal to from monitors with DDC interface DDCDAT Display Data Channel Data Used as data signal to from monitors with DDC interface RED Analog output carrying the red color signal to the CRT Fo
19. present on AD 31 00 During a read it indicates the master is prepared to accept data Wait cycles are inserted until both IRDY and TRDY are asserted together TRDY Target Ready indicates the target agent s selected device s ability to complete the current data phase of the transaction TRDY is used in conjunction with IRDY A data phase is completed on any clock both TRDY and IRDY are sampled asserted During a read TRDY indicates that valid data is present on AD 31 00 During a write it indicates the target is prepared to accept data Wait cycles are inserted until both IRDY and TRDY are asserted together STOP Stop indicates the current target is requesting the master to stop the current transaction LOCK Lock indicates an atomic operation that may require multiple transactions to complete When LOCK is asserted non exclusive transactions may proceed to an address that is not currently locked A grant to start a transaction on PCI does not guarantee control of LOCK Control of LOCK is obtained under its own protocol in conjunction with GNT It is possible for different agents to use PCI while a single master retains ownership of LOCK If a device implements Executable Memory it should also implement LOCK and guarantee complete access exclusion in that memory A target of an access that supports LOCK must provide exclusion to a minimum of 16 bytes aligned Host bridges that have system memory behind them should impleme
20. 6 kontron 8861 ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 1 of 71 User Manual for the Mother Boards 886LCD ATX GV G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 2 of 71 Document revision history Revision Daes ey E Jan 14 2009 MLA Minor corrections PXE RPL selection added to BIOS D May 30 2008 MLA Battery type updated and Battery load information added th Correction Processor support table JP3 connector included Febr 2007 MER Removal of PCI Slot 3 4 5 IRQ Preference B June 6 2006 MLA Many minor corrections 1 0 Mar 13 2006 PJA Release version 0 1 Dec 9 2005 PJA First preliminary manual version Copyright Notice Copyright 2006 KONTRON Technology A S ALL RIGHTS RESERVED No part of this document may be reproduced or transmitted in any form or by any means electronically or mechanically for any purpose without the express written permission of KONTRON Technology A S Trademark Acknowledgement Brand and product names are trademarks or registered trademarks of their respective owners Disclaimer KONTRON Technology A S reserves the right to make changes without notice to any product including circuits and or software described or contained in this manual in order to improve design and or performance Specifications listed in this manual are subject to change
21. GV KTD 00647 E Public User Manual Date 2009 01 14 54 of 71 7 3 5 Advanced settings Hardware Health Configuration BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Power Exit Hardware Health Event Monitoring Enable Hardware H W Health Function Enabled Monitoring Chassis Intrusion Disabled System Temperatur 37 98 CPU Temperature 43 C 109 F Fan3 Speed 2657 RPM Fan2 Speed 2657 RPM Fanl Speed 2657 RPM VcoreA 1 483 V VcoreB 1596 V lt Select Screen 5Vin 25 134 V Select hea 12Vin 212 016 V Le cham e option 12Vin 11 787 V ge opt 5Vin 5 200 V F1 General Help j F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options ______ Description H W Health Function Enable Enable Hardware Health Monitoring Device Disabled Chassis Intrusion Enable Enable BIOS warning in case intrusion is detected on Disabled Case Open 51 G kontron 886LCD ATX GV ATXU GV Date 2009 01 14 Page 55 of 71 KTD 00647 E Public User Manual 7 3 6 Advanced settings ACPI Configuration BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Power Exit ACPI Aware O S Yes General ACPI Configuration Advanced ACPI Configuration Enable disable ACPI support for Operating System ENABLE IF
22. U D 307 PWR GRNLED PWRLEDr PWR 330 CRNLED 5166 cv Rus so PWR HDDLED 7 __ _____ me o o cs __ __ __ HDD LED 11112 C 90 PWR HDDLED 13 1 ___ L LPWR 5V SBSV SPKR PWR E CT DE ss Signa Description GRN LED Green Status LED When the system is in Suspend the green LED will flash When the system is in normal working mode the Green LED will be Off PWR LED ATX Power LED LED for showing ATX Power On HDD LED HDD LED for showing SATA or PATA activity KBLOCK Keyboard Lock Switch Active low signal will cause keyboard to be locked SLEEP Suspend Switch Connector RESET Reset Switch Connector PWRSW ATX Power Switch Connector 5V SB5V Standby 5V or ATX Power 5V depending on power state SPKR Chassis Speaker Connector G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 39 of 71 4 19 GAME MIDI Connector CN6 Pull Pull ea PWR Dicey IPWR pPE JIBUTTON1 EIE J2BUTTON1 P 0151601 ox eee 7 8 4 1 L JPWR GND 491 cov P o v mMY J2BUTTON2 J 0 1 2 MIDI IN j sss PWR VCC 15 16
23. and the input may be disabled completely DVOC CLK DVOC_CLK DVOC Clock Output These pins provide a differential pair reference clock that can run up to 165 MHz Formerly known by DVOC CLKOUTO DVOC DVOC_CLKOUT1 DVOC_CLK Care should be taken to be sure that DVOC_CLK is connected to the primary clock receiver of the DVO device DVOC D 11 0 DVOC Data This data bus is used to drive 12 bit pixel data on each edge of DVOC CLK This provides 24 bits of data per clock DVOC HSYNC DVOC VSYNC Horizontal Sync This is the HSYNC signal for the DVOC interface The active polarity of the signal is programmable Vertical Sync This is the VSYNC signal for the DVOC interface The active polarity of the signal is programmable DVOC_BLANK Flicker Blank or Border Period Indication DVOC_BLANK is a programmable output pin driven by the GMCH When programmed as a blank period indication this signal indicates active pixels excluding the border When programmed as a border period indication this signal indicates active pixel including the border pixels DVOBC DVOBC Interrupt This signal may be used as an interrupt input for either of the multiplexed DVO devices DVOC FLDSTL TV Field and Flat Panel Stall Signal This input can be programmed to be either a TV Field input from the TV encoder or Stall input from the flat panel When used as a Field input it synchronizes the overlay fie
24. contains information about the computing system and its components Using SMBIOS a system administrator can obtain the system types capabilities operational status and installation dates for system components The MIF database defines the data and provides the method for accessing this information The BIOS enables applications such as third party management software to use SMBIOS The BIOS stores and reports the following SMBIOS information BIOS data such as the BIOS revision level Fixed system data such as peripherals serial numbers and asset tags Resource data such as memory size cache size and processor speed Dynamic data such as event detection and error logging Non Plug and Play operating systems such as Windows NT require an additional interface for obtaining the SMBIOS information The BIOS supports an SMBIOS table interface for such operating systems Using this support an SMBIOS service level application running on a non Plug and Play operating system can obtain the SMBIOS information 886L CD Boards support reading certain MIF specific details by the Windows API Refer to the section in this manual for details 6 1 2 Legacy USB Support Legacy USB support enables USB devices such as keyboards mice and hubs to be used even when the operating system s USB drivers are not yet available Legacy USB support is used to access the BIOS Setup program and to install an operating system that supp
25. data parity errors during all PCI transactions except a Special Cycle The PERR pin is sustained tri state and must be driven active by the agent receiving data two clocks following the data when a data parity error is detected The minimum duration of PERR is one clock for each data phase that a data parity error is detected If sequential data phases each have a data parity error the PERR signal will be asserted for more than a single clock PERR must be driven high for one clock before being tri stated as with all sustained tri state signals There are no special conditions when a data parity error may be lost or when reporting of an error may be delayed An agent cannot report a PERR until it has claimed the access by asserting DEVSEL for a target and completed a data phase or is the master of the current transaction System Error is for reporting address parity errors data parity errors on the Special Cycle command or any other system error where the result will be catastrophic If an agent does not want a non maskable interrupt NMI to be generated a different reporting mechanism is required SERR is pure open drain and is actively driven for a single PCI clock by the agent reporting the error The assertion of SERR is synchronous to the clock and meets the setup and hold times of all bused signals However the restoring of SERR to the deasserted state is accomplished by a weak pullup same value as used for s t s which is provided b
26. its safety or effectiveness KONTRON Technology Technical Support and Services If you have questions about installing or using your KONTRON Technology Product check this User s Manual first you will find answers to most questions here To obtain support please contact your local Distributor or Field Application Engineer FAE Before Contacting Support Please be prepared to provide as much information as possible CPU Board 1 Type 2 Part number Number starting with 6 3 Serial Number Configuration 1 CPU Type Clock speed 2 DRAM Type and Size 3 BIOS Revision Find the Version Info in the BIOS Setup in the Kontron Section 4 BIOS Settings different than Default Settings Refer to the Software Manual System 1 O S Make and Version 2 Driver Version numbers Graphics Network and Audio 3 Attached Hardware Harddisks CD rom LCD Panels etc G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 4 of 71 Table of contents 1 INTRODUCTION m 7 2 INSTALLATION PROCEDURE 2 17 terrore en uP exa Dane rex ander ndun caue duis 8 24 8 2 2 Requirement according to 60950 u u u uuu u u u T T 9
27. ulejs s punog 104 pesn eq Jej oujuoo xsippueu Aq pesn eq Jejo nuoo Aq pesn eq ew 10sseo2oJd o9 pesf qoddns 2 S d pseoquo Aq pesn eq 320 O Sul p1eoquo Aq pes Jejo41uo ysIp Addo 4 pseoquo Aq pesn e N pseoquo q pesn eq e Jej oJjuoo Y LYS Aq pesn eq 8 uod pueoquo Aq pesn eq V loq lenas Aq pesn eq SLOMI 8O9I Duipeose p sn jdnueju jdnueju 0 MHOHOO pue Ajued Notes 1 Availability of the shaded IRQs depends on the setting in the BIOS According to the PCI Standard PCI Interrupts IRQA IRQH can be shared These interrupt lines are managed by the PnP handler and are subject to change during system initialisation 2 IRQ16 to IRQ23 are APIC interrupts 3 G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 46 of 71 5 4 Map Address hex Description Programmable interrupt controller System Timer Standard keyboard System speaker System CMOS Real time clock Se
28. 0 of 71 8 05 setup Use the Setup exe files for all relevant drivers The drivers can be found on the 886LCD ATXU GV and 886LCD ATX GV Driver CD or they be downloaded from the homepage http www kontron emea com G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 71 of 71 9 Warranty KONTRON Technology warrants its products to be free from defects in material and workmanship during the warranty period If a product proves to be defective in material or workmanship during the warranty period KONTRON Technology will at its sole option repair or replace the product with a similar product Replacement Product or parts may include remanufactured or refurbished parts or components The warranty does not cover 1 Damage deterioration or malfunction resulting from Accident misuse neglect fire water lightning or other acts of nature unauthorized product modification or failure to follow instructions supplied with the product Repair or attempted repair by anyone not authorized by KONTRON Technology Causes external to the product such as electric power fluctuations or failure Normal wear and tear Any other causes which does not relate to a product defect 2 Removal installation and set up service charges gt Exclusion of damages KONTRON TECHNOLOGY LIABILITY IS LIMITED TO THE COST OF REPAIR OR REPLACEMENT OF THE PRODUCT KONTRON TECHNOLOGY SHALL NOT BE L
29. 00 Realtek AC97 Audio FFA80000 FFAFFFFF 0x80000 845 VGA Controller FFB7FCOO FFB80000 FFB7FFFF FFBFFFFF 0x400 0x80000 Ultra SATA Controller Intel 82802 Firmware Hub Device 00000 FFF7FFFF 0x380000 Motherboard reserved FFF80000 FFFFFFFF 0x80000 Intel 82802 Firmware Hub Device 5 2 devices Device Function Vendor ID 8086 Device ID 2560 Device Function Northbridge 8086 2562 Graphics NI O PCI to PCI bridge ISA LPC Bridge IDE Controller SMBUS Controller O1 0 O O Audio Device PCI SLOT 1 PCI SLOT2 PCI SLOT 3 PCI SLOT 4 SIL3512 SATA Controller RTL8100 Ethernet PCI SLOT 5 PCI SLOT 6 Note All PCI slots for the 886LCD ATX GV and 886LCD ATXU GV boards support PCI BUS Mastering kontron 886LCD ATX GV ATXU GV 45 of 71 Date 2009 01 14 Public User Manual KTD 00647 E Interrupt Usage 5 3 5018 99 suonoejes uo Buipuedep Se slols IOd uo snglNS Aq pesn eq YDA pJeoquo pesn eq Jej ojuoo pseoquo Aq pesn eq e N Jejogjuoo GSN Aq pesn eq
30. 3 Processor System Bus 400 533 MHz System Memory nterface DDR 1 6 2 1 GBis SDRAM Intel 82845 Graphics and Memory Controller Hub GMCH Hub interface 2 SATA 150 Intel 2280108 SATA controller LPC I F Keyboard Super Mouse FD PP SP IR SMBus SMBus Devices Controller Hub 4 FWH Flash BIOS G kontron 886LCD ATX GV ATXU GV Date 2009 01 14 KTD 00647 E Public User Manual 3 5 Power Consumption 16 of 71 This section describes static and dynamic power consumption on the 886LCD ATXU GV board ina specific configuration 886LCD ATXU GV P4 2 0GHz 400MHz FSB 256MByte L2 cache P4 cooler 256Mbyte of PC2100 266MHz DDR SDRAM VGA monitor Keyboard and mouse inserted Wire colour Yellow Blue White Voltage 12 00 V 12 00 V 5 00 V Total Power XP Idle DC W XP Idle XP Idle power XP Full Load DC XP Full Load AC XP Full Load power G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 17 of 71 4 Connector Definitions The following sections provide pin definitions and detailed description of all on board connectors The connector definitions follow the following notation Description Shows the pin numbers in the connector The graphical layout of the
31. 4 5 7 9 Manual IRQ selection 10 11 12 14 15 Only available on the 886LCD ATX GV Note PCI Slot 3 IRQ Preference PCI Slot 4 IRQ Preference and PCI Slot 5 IRQ Preference do not exist G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 61 of 71 7 5 Boot Menu BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Power Exit Boot Settings Configure Settings during System Boot Boot Settings Configuration SR PM ST31200224A 15 FLOPPY DRIVE CORSAIR Flash Voya Realtek Boot Agent 17 Boot Device 258 Boot Device 3 4 d 19 Boot Device th Boot Device lt Select Screen Select Item Enter Go to Sub Screen F1 General Help F10 Save and Exit 5 Exit V02 53 C Copyright 1985 2002 American Megatrends Inc G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 62 of 71 7 51 Boot Boot Settings Configuration BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Power Exit Boot Settings Configure Settings during System Boot Quick Boot Enabled Quiet Boot Disabled AddOn ROM Display Mode force BIOS Bootup Num Lock On PS 2 Mouse Support Auto Wait for If Error Enabled Hit DEL Message Display Enabled Interrupt 19 Capture Disabled lt Select Screen 11 Se
32. Advanced ACPI Configuration Enable RSDP pointers ACPI 2 0 Features No ee ACPI APIC support Enabled Tables AMI table Enabled Headless mode Disabled lt Select Screen Select Item t change option F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options Description ACPI 2 0 Features No Enable Disable ACPI 2 0 features Yes APIC support Enabled Setup if the APIC controller should be supported in the Disabled ACPI code AMI OEMB table Enabled Enable Disable AMI OEMB table Disabled Headless mode Enabled Enable Disable Headless mode Disabled G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 58 of 71 7 3 9 Advanced settings USB Configuration BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Power Exit USB Configuration Enables support for Legacy USB AUTO Module Version 2 23 2 6 4 Option disables USB Devices Enabled 1 2 SHEDCI P USB devices 1 Drive connected Legacy USB Support Enabled USB 2 0 Controller Mode FullSpeed gt USB Mass Storage Device Configuration lt Select Screen Select Item t change option Fl General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options Lega
33. CMOS settings including Password protection move the JP6 jumper with or without power for approximately 1 minute Alternatively turn off power and remove the battery for 1 minute but be careful to orientate the battery corretly when reinserted kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 9 of 71 2 2 Requirement according to EN60950 Users of 886LCD GV boards should take care when designing chassis interface connectors in order to fulfill the EN60950 standard When an interface connector has a VCC or other power pin which is directly connected to a power plane like the VCC plane To protect the external power lines of peripheral devices the customer has to take care about e That the wires have the right diameter to withstand the maximum available power That the enclosure of the peripheral device fulfils the fire protecting requirements of IEC EN 60950 Lithium Battery precautions CAUTION Danger of explosion if battery is incorrectly replaced Replace only with same or equivalent type recommended by manufacturer Dispose of used batteries according to the manufacturer s instructions ADVARSEL Lithiumbatteri Eksplosionsfare ved fejlagtig handtering Udskiftning ma kun ske med batteri af samme fabrikat og type Lev r det brugte batteri til leverandgren VARNING Explosionsfara vid felaktigt batteribyte Anvand samma batterityp eller e
34. D7 GND PWR DVOC CIk DVOC D5 1 5V PWR DVOC D3 DVOC D1 GND PWR DVOC Blank DVOC Vsync 1 5V PWR M DVI Data PWR PWR PWR 24 25 26 WI col 30 W A31 A33 A34 A35 A36 A37 A38 A39 A40 A41 WI W PWR 0 Y 0 Y A A A A M I2CData 1 5V GPERR GND GSERR DVOB Blank 1 5V DVOB Fid Stl DVOB D10 GND DVOB D8 DVOB D6 1 5V DVOB_Clk DVOB_D4 GND DVOB_D2 DVOB_DO 1 5V DVOB Vsync VREFCG B46 B47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 B63 B64 B65 B66 A46 A47 A48 A49 50 51 52 53 54 55 M_DVI_Clk M_DDCData PWR GND PWR ADD_Detect M_DDCCIk 1 5V PWR DVOBC Clkint DVOB D11 GND PWR DVOB D9 DVOB D7 1 5V PWR DVOB_Clk DVOB_D5 GND PWR DVOB_D3 DVOB D1 1 5V PWR DVOB_Hsync W gt W zs 0 0 U 0 A A A A 58 59 A60 A61 A62 A63 A64 A65 A66 gt Oo N INI W W 2 2 lt zs G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 24 of 71 Signal Description AGP DVO Connector Signal DVOB_CLK DVOB_CLK Description DVOB Clock Output These signals provide a differential pair reference clock that can run up to 165 MHz Formerly known by DVOB CLKOUTO DVOB CLK and DVOB_CLKOUT1 DVOB_CLK Care should be taken to be sure that DVOB CLK is connected to the primary clock receiver of the Intel amp DVO device
35. Disable USB 1 Enabled Enable Disable ICH4 USB Host Controller 1 function Disable USB 2 Enabled Enable Disable ICH4 USB Host Controller 2 function Disable USB 3 Enabled Enable Disable ICH4 USB Host Controller 3 function Disable EHCI USB 2 0 Enabled Enable Disable EHC USB Controller function Disable Onboard LAN Disable Set up Onboard LAN for Disable Enable or Enable Enabled with RPL PXE boot With RPL PXE boot Onboard Sata Enabled Enable Disable Onboard SATA Disable Enabled Enable Disable the ICH4 IOAPIC function Disable Extended IOAPIC Enabled Enable Disable the extended mode of ICH4 IOAPIC Disable function G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 67 of 71 7 8 Power Menu BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Power Exit Enable Disable SMI APM Configuration based power management and APM Power Management APM Enabled support Power Button Mode On Off Restore on AC Power Loss Last state Force Throttle Disabled Manual Throttle Ratio 50 Wake LAN Resume 55 Disabled Keyboard PowerOn Disabled Mouse PowerOn Disabled V02 53 C Copyright 1985 2002 American Megatrends F1 F10 Select Sc Select It Change Op General H Save and ESC Exit Inc reen em tion elp Exit Feature Power Managem
36. IABLE FOR 1 DAMAGE TO OTHER PROPERTY CAUSED BY ANY DEFECTS IN THE PRODUCT DAMAGES BASED UPON INCONVENIENCE LOSS OF USE OF THE PRODUCT LOSS OF TIME LOSS OF PROFITS LOSS OF BUSINESS OPPORTUNITY LOSS OF GOODWILL INTERFERENCE WITH BUSINESS RELATIONSHIPS OR OTHER COMMERCIAL LOSS EVEN IF ADVISED OF THEIR POSSIBILITY OF SUCH DAMAGES 2 ANY OTHER DAMAGES WHETHER INCIDENTAL CONSEQUENTIAL OR OTHERWISE 3 ANY CLAIM AGAINST THE CUSTOMER BY ANY OTHER PARTY
37. OS supports ACPI DISABLE IF OS does lt F10 not support ACPI Select Screen Select Item change option General Help Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature X Description O ACPI Aware O S Select if O S supports ACPI Yes G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 56 of 71 7 3 7 Advanced settings General ACPI Configuration BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Power Exit General ACPI Configuration Select the ACPI state Suspend mode 51 amp S3 STR 12 Repost Video 53 Resume No P lt Select Screen Select Item t change option F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Description O Suspend mode 51 POS only Select the ACPI state used for System Suspend 51853 STR Repost Video on S3 No Determines whether to invoke VGA BIOS post on Resume Yes S3 STR resume G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 57 of 71 7 3 8 Advanced settings Advanced ACPI Configuration BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Power Exit
38. RR open drain is floated REQ and GNT must both be tri stated they cannot be driven low or high during reset To prevent AD C BE and PAR signals from floating during reset the central resource may drive these lines during reset bus parking but only to a logic low level they may not be driven high RST may be asynchronous to CLK when asserted or deasserted Although asynchronous deassertion is guaranteed to be a clean bounce free edge Except for configuration accesses only devices that are required to boot the system will respond after reset ADDRESS AND DATA AD 31 00 Address and Data are multiplexed on the same PCI pins A bus transaction consists of an address phase followed by one or more data phases PCI supports both read and write bursts The address phase is the clock cycle in which FRAME is asserted During the address phase AD 31 00 contain a physical address 32 bits For I O this is a byte address for configuration and memory it is a DWORD address During data phases AD 07 00 contain the least significant byte Isb and AD 31 24 contain the most significant byte msb Write data is stable and valid when IRDY is asserted and read data is stable and valid when TRDY is asserted Data is transferred during those clocks where both IRDY and TRDY are asserted 3 0 Bus Command and Byte Enables are multiplexed the same PCI pins During the address phase of a transaction C BE 3 0 define the bus comm
39. SWDMA1 optimum transfer mode SWDMA2 Note To use UDMA Mode 2 3 4 and 5 with a MWDMAO0 device the harddisk cable used MUST be UDMA66 MWDMA1 cable 80 conductor cable MWDMA2 UDMAO0 UDMA1 UDMA2 UDMA3 UDMA4 UDMA5 S M A R T Auto Select if the Device should be monitoring itself Self Disabled Monitoring Analysis and Reporting Technology Enabled System 32Bit Data Transfer Disabled Select if the Device should be using 32Bit data Enabled Transfer G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 52 of 71 7 3 3 Advanced settings Floppy Configuration BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Power Exit Floppy Configuration Select the type of floppy drive connected to the system Floppy A Disabled Floppy B Disabled lt Select Screen Select Item t change option F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options Description Disabled Select Floppy device installed in the system 360KB 1 2 720 1 44 2 88 Disabled Select Floppy device installed in the system 360KB 1 2MB 720KB 1 44MB 2 88MB G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 53 of 71 7 3 44 Advanced settings SuperlO Configuration
40. Z 533MHz FSB RK80532PE051512 2 40 GHZ 400MHz FSB RK80532PC056512 2 40 GHZ 533MHz FSB RK80532PE056512 2 50 GHZ 400MHz FSB RK80532PC060512 2 53 GHZ 533MHz FSB RK80532PE061512 2 60 GHZ 400MHz FSB RK80532PC064512 2 66 GHZ 533MHz FSB RK80532PE067512 2 80 GHZ 533MHz FSB RK80532PE072512 3 06 GHZ 533MHz FSB RK80532PE083512 Intel Celeron Processors 1 70 GHZ 400MHz FSB RK80531RC029128 1 80 GHZ 400MHz FSB RK80531RC033128 2 00 GHZ 400MHz FSB RK80532RC041 128 2 10 GHZ 400MHz FSB RK80532RC045128 2 20 GHZ 400MHz FSB RK80532RC049128 2 30 GHZ 400MHz FSB RK80532RC052128 2 30 GHZ 400MHz FSB __128 B80532RC052128 2 40 GHZ 400MHz FSB RK80532RC056128 2 50 GHZ 400MHz FSB RK80532RC060128 2 60 GHZ 400MHz FSB RK80532RC064128 2 70 GHZ 400MHz FSB RK80532RC068128 2 80 GHZ 400MHz FSB RK80532RC072128 RK80532PC041512 RK80532PE056512 RK80532PC064512 RK80532PE072512 RK80532RC041 128 RK80532RC060128 6 kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 13 of 71 Intel Intel Single Pack OEM Product Product Order Code Order Code Intel Celeron D Processors 3 20 GHz 533MHz FSB 3 06 GHz 533MHz FSB 2 93 GHz 533MHz FSB HT Hyper Threading support G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 14 of 71 3 3 System Memory support The 886LCD ATX GV and 886LCD ATXU GV boards have two onboard DIMM sockets and support
41. anced Security Chipset Power Exit Advanced Chipset Settings Intel Brookdale G NorthBridge chipset f configuration Warning Setting wrong values in below sections may 5 cause system to malfunction P gt Intel Brookdale G NorthBridge Configuration gt Intel ICH4 SouthBridge Configuration lt Select Screen 11 Select Item Enter Go to Sub Screen F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 65 of 71 7 7 1 Advanced Chipset Settings Intel Brookdale G NorthBridge Configuration BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Power Exit Configure advanced settings for NorthBrigde Select which graphics controller to use as Primary Video Device Auto the primary boot Graphics Mode Select Enabled 8MB deed M Graphics Aperture Size 64MB IGD Device 2 Function 1 Enabled Boot Type VBIOS Default DVO N A Select Screen 11 Select Item Enter Go to Sub Screen F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options Description Primary Video Device Internal Select which graphics controller to use as the primary External PCI boot device Auto Graphics Mode Select D
42. and During the data phase C BE 3 0 are used as Byte Enables The Byte Enables are valid for the entire data phase and determine which byte lanes carry meaningful data C BE 0 applies to byte 0 Isb and C BE 3 applies to byte msb PAR Parity is even parity across AD 31 00 and C BE 3 0 Parity generation is required by all PCI agents PAR is stable and valid one clock after the address phase For data phases PAR is stable and valid one clock after either IRDY is asserted on a write transaction or TRDY is asserted on a read transaction Once PAR is valid it remains valid until one clock after the completion of the current data phase PAR has the same timing as AD 31 00 but it is delayed by one clock The master drives PAR for address and write data phases the target drives PAR for read data phases INTERFACE CONTROL PINS FRAME Cycle Frame is driven by the current master to indicate the beginning and duration of an access FRAME is asserted to indicate a bus transaction is beginning While FRAME is asserted data transfers continue When FRAMEZ is deasserted the transaction is in the final data phase or has completed IRDY Initiator Ready indicates the initiating agent s bus master s ability to complete the current data phase of the transaction IRDY is used in conjunction with TRDY A data phase is completed on any clock both IRDY and TRDY are sampled asserted During a write IRDY indicates that valid data is
43. as follows Serial output This signal sends serial data to the communication link The signal is set to a marking state on hardware reset when the transmitter is empty or when loop mode operation is initiated Serial input This signal receives serial data from the communication link DTR Data Terminal Ready This signal indicates to the modem or data set that the on board UART is ready to establish a communication link DSR Data Set Reagy This signal indicates that the modem or data set is ready to establish a communication link RTS Request To Send This signal indicates to the modem or data set that the on board UART is ready to exchange data Clear To Send This signal indicates that the modem or data set is ready to exchange data Data Carrier Detect This signal indicates that the modem or data set has detected the data carrier RI Indicator This signal indicates that modem has received a telephone ringing signal The connector pinout for each operation mode is defined in the following sections 4 9 1 Serial Port Com1 DB9 Connector Pull Pull U D loh lol Type Type loh lol U D PWR 4 9 2 Serial Port Com2 Pin Header Connectors The pinout of Serial ports Com2 is as follows Pull Pull am E imas Po RD EE ML LU He 5 pR lama o lawa If the DB9 ada
44. condary Parallel ATA IDE Channel Primary Parallel ATA IDE Channel Comport 2 Printer Port 845 VGA Controller 845 VGA Controller Comport 1 PCI Bus Realtek 8100 Ethernet Controller SATA Raid Controller SATA Raid Controller SATA Raid Controller SATA Raid Controller SATA Raid Controller Standard Universal PCI to USB Host Controller Standard Universal PCI to USB Host Controller Standard Universal PCI to USB Host Controller PCI System Management Bus Realtek AC97 Audio Realtek AC97 Audio Ultra ATA Controller 5 5 DMA Channel Usage DMA Channel Number Data Width System Resources 8 or 16 bits Available 8 or 16 bits Available 8 or 16 bits Available 8 or 16 bits Available 8 or 16 bits DMA Controller 16 bits Available 16 bits Available 16 bits Available G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 47 of 71 6 Overview of BIOS features This Manual section details specific BIOS features for the 886LCD ATX GV 886LCD ATX GV boards The BIOS are based on the AMI BIOS core version 8 with Kontron BIOS extensions 6 1 1 System Management BIOS SMBIOS SMBIOS is a Desktop Management Interface DMI compliant method for managing computers in a managed network The main component of SMBIOS is the Management Information Format MIF database which
45. connector definition tables is made similar to the physical connectors The mnemonic name of the signal at the current pin The notation states that the signal XX is active low Analog Input Analog Output Input TTL compatible if nothing else stated Input Output TTL compatible if nothing else stated Bi directional tristate pin Schmitt trigger input TTL compatible Input open collector Output TTL compatible Pin not connected Output TTL compatible Output open collector or open drain TTL compatible Output with tri state capability TTL compatible LVDS Low Voltage Differential Signal PWR Power supply or ground reference pins loh Typical current in mA flowing out of an output pin through a grounded load while the output voltage is gt 2 4 V DC if nothing else stated lol Typical current in mA flowing into an output pin from a VCC connected load while the output voltage is lt 0 4 V DC if nothing else stated Pull U D On board pull up or pull down resistors on input pins or open collector output pins Note Special remarks concerning the signal The abbreviation TBD To Be Determined is used for specifications which are not available yet or which are not sufficiently specified by the component vendors 6 kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 18 of 71 41 Connector layout 4 1 1 886LCD ATXU GV
46. ctions G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 26 of 71 4 5 1 IDE Hard Disk Connector IDE P This connector can be used for connection of up till two primary IDE drives Pull Pull bae f Dose ee suma sena nne wo G8 e TBD RESETA GND PWR o o oo o D7 __ DAS TB lO D 5 6 _ 502 DA 0 p sa TBD DA2 DA13 TBD 1 DA __ DA14 DA DA15 cw DDRQA 21 2208 lWA GND GSS COND KS GU A GND i OS U S DDAKA COND _____ o Dr s cana T 78 TBD DAA CBLIDA 115K eee DAA2 TBD HDCSAO HDCSA1 O TBD HDACTA GND RNAi s 4 5 2 Hard Disk Connector IDE_ 5 This connector can be used for connection of up till two secondary IDE drive s Pull Pull bee Gd Dee iwe sea wo 65 ne L RESETB GND PWR G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 27 of 71 4 6 Serial ATA harddisk interface Two serial ATA harddisk controllers are available on the board a primary controlle
47. curity Chipset Power Exit Security Settings Install or Change the password Supervisor Password Installed User Password Installed Change Supervisor Password User Access Level Full Access Change User Password Clear User Password Password Check Setup Boot Sector Virus Protection Disabled 2 salect Screen Select Item Enter Go to Sub Hard Disk Security Screen Primary Master HDD User Password Fl General Help Primary Slave HDD User Password F10 Gave and Exit Secondary Slave HDD User Password ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options Description Change Supervisor Password Change the Supervisor Password Password User Access Level No Access Set the user level Access for the BIOS View Only Limited Full Access Change User Password Password Change the User Password Clear User Password Ok Clears the User Password Cancel Password Check Setup Shall the BIOS prompt for password on boot or only Always when entering setup Boot Sector Virus Enabled Will write protect the MBR when the BIOS is used to Protection Disabled access the harddrive HDD Password Password Locks the HDD with a password the user needs to type the password on power on G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 64 of 71 7 7 Chipset Menu BIOS Setup Utility Main Adv
48. cy USB Support Disabled Support for legacy USB Keyboard Enabled Auto USB 2 0 Controller Mode FullSpeed Configures the USB 2 0 controller in HiSpeed HiSpeed 480Mbps or FullSpeed 12Mbps G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 59 of 71 7 3 10 Advanced settings USB Mass Storage Device Configuration BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Power Exit USB Mass Storage Device Configuration Enables USB host USB Mass Storage Reset Delay 20 Sec controllers Device 1 JetFlash TS256MJF2L Emulation Type Auto lt Select Screen Select Item change option F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options Description USB Mass Storage Reset 10 Sec 20 30 Number of seconds the BIOS waits for the USB device Delay Sec 40 Sec after start unit command Emulation Type Auto Setup the emulation type for the USB device Floppy Forced FDD Hard Disk CDROM G kontron sssLcp ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 60 of 71 7 4 PCIPnP Menu BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Power Exit Advanced PCI PnP Settings NO lets the BIOS Warning Setting wrong values in below sections coni igure alp eng
49. d feature in ATX Power Supplies Running the board without 3 3V connected will damage the board after a few minuttes 2 Insert the DIMM DDR 184pin DRAM module s Be careful to push it in the slot s before locking the tabs For a list of approved DDR DRAM modules contact your Distributor or FAE DIMM 184pin DRAM modules are supported 3 Install the processor The CPU is keyed and will only mount in the CPU socket in one way Use the handle to open close the CPU socket Intel Pentium 4 Celeron and Celeron D processors are supported 4 Use heat paste or adhesive pads between CPU and cooler and connect the Fan electrically to the FAN3 connector See chapter 4 1 for identifying the FAN3 connector 5 Insert all external cables for hard disk keyboard etc except for flat panel A CRT monitor must be connected in order to change CMOS settings to flat panel support with ADD DVO module To achieve UDMA 66 100 133 performance on the IDE interface 80poled UDMA cables must be used 6 Connect power supply to the board by the ATXPWR connector 7 on the ATX power supply 8 The PWRSW must be toggled to start the Power supply this is done by shorting pins pins 19 and 21 on the CN5 connector see Connector description A normally open switch can be connected via the CN5 connector 9 Enter the BIOS setup by pressing the F2 key during boot up Refer to the Software Manual for details on BIOS setup Note To clear all
50. dvanced Menu BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Power Exit Advanced Settings Configure CPU Warning Setting wrong values in below sections May cause system to malfunction CPU Configuration IDE Configuration Floppy Configuration SuperlO Configuration Hardware Health Configuration ACPI Configuration USB Configuration V V VV V V V lt Select Screen 11 Select Item Enter Go to Sub Screen F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc 7 3 1 Advanced settings CPU Configuration BIOS Setup Utility Advanced Configure advanced CPU settings This should enabled in order to boot legacy OSes that Manufacturer Intel cannot Support CPUs Brand String Intel R Pentium R CPU 2 40GHz with Extended CPUID Frequency 2 40GHz FPiinet ions FSB Speed 533MHz Cache 11 8 KB Cache L2 512 KB Ratio Status Locked Ratio Actual Value 18 Ratio CMOS Setting 18 VID CMOS Setting 62 Select t Change Option Max CPUID Value Limit Disabled Fl General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options Description Max CPUID Value Limit Disabled This should be enabled in order to boot legacy OSes Enabled that cann
51. eds DDR 333 PC2700 and DDR 400 PC3200 may be used after qualification testing e Support for up to 2GB of system memory ECC not supported Chipset Intel 845GV Chipset consisting of e Intel 82845GV Graphics and Memory Controller Hub GMCH e Intel 82801DB I O Controller Hub 4 ICH4 e 4 Mbit Firmware Hub FWH for BIOS Video e Intel Extreme Graphics controller e Video memory support maximum 64MB with more than 128MB DDR SDRAM installed The GMCH has an integrated 350 MHz RAMDAC that can directly drive a progressive scan analog monitor up to a resolution of 2048x1536 at 60 Hz e The GMCH provides two multiplexed Digital Video Out Ports DVOs through the onboard AGP 2 0 1 5V connector that are can drive a 165 MHz pixel clock o DVIDVO ADD CRT DVO ADD and LVDS DVO ADD cards supported Note Only ADD cards are supported AGP cards are not supported Audio Audio AC97 version 2 3 subsystem using the Realtek ALC655 codec e Line out e Line in e CDROM in e Microphone Control Winbond W83627HG LPC Bus I O Controller Peripheral e USB host interface 3 host controllers and supports 6 USB ports includes a interfaces high speed 2 0 USB controller USB legacy keyboard function supported e Two Serial ports RS232 Port 2 be set to operate in normal IrDA or ASKIR mode One Parallel port SPP EPP ECP One Floppy port Two Serial ATA 150 IDE interfaces Two Parallel ATA IDE interfaces with UDMA 33
52. ent APM Options Disabled Enabled Description Setup the SMI APM support Power Button Mode On Off Standby Suspend Go Into On Off Standby or Suspend when Power button is pressed Restore on AC Power Loss Power Off Power On Last State Force Throttle Disabled Enabled Disable Enable the force to thermal throtting function Manual Throttle Ratio 87 5 75 0 62 5 50 37 5 25 12 5 Select the Duty Cycle in Throttle mode Wake on LAN Resume S5 Disabled Enabled Disabled Enabled generate of SMI on SLP_EN sp we can wake from S5 Keyboard PowerOn Disabled Space Key Mouse PowerOn Disabled Double Left Button Double Right Button G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 68 of 71 7 9 Exit Menu BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Power Exit Exit Options Exit system setup after saving the changes Save Changes and Exit Discard Changes and Exit Discard Changes F10 Key can be used for this operation Load Optimal Defaults Load Failsafe Defaults Secure CMOS Disable Halt on invalid Time Date Enabled lt Select Screen 11 Select Item Enter Go to Sub Screen F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature i Description Sa
53. his connector and install software to support W O L 5V SB5V Standby 5V or ATX Power 5V depending on power state 4 22 JP3 optional Pull U D loh lol Type EE EE L Re L Signal Description Option for connection of external temperature sensor based on NTC Resistor 150mW R NTC oup 10Kohm or simialar G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 41 of 71 4 23 PCI Slot 1 Slot 2 and Slot 3 connectors 4 231 PCI Slot Connector Terminal Note Type Signal 5 C Signal Type Note co TR mi 95 c BRENNEN PWR GND TMS 9 TDI v PW j f re 6 t I a INTD FO EOS REQ2 FO Or PWR PWR O PWR 0 O O i ias F ial F _ GNTO o I REO PW j PWR V O I j j O X UU So ___ 030 9 PW j x _ 8 o 17 abs o j k o GND x PWR v 2 o 01 CBE o zt E 2 I C poe eel uem
54. io G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 25 of 71 4 5 Parallel ATA harddisk interface Two parallel ATA harddisk controllers are available on the board a primary and a secondary controller Standard 377 harddisks or CD ROM drives may be attached to the primary and secondary controller board by means of the 40 pin IDC connectors IDE_P and IDE_S The harddisk controllers support Bus master IDE ultra DMA 33 66 100 MHz and standard operation modes The signals used for the harddisk interface are the following CBLID This input signal CaBLe ID is used to detect the type of attached cable 80 wire cable when low input and 40 wire cable when 5V via 10Kohm pull up resistor DDREQ Disk DMA Request might be driven by the IDE hard disk to request bus master access to the PCI bus The signal is used in conjunction with the PCI bus master IDE function and is not associated with any PC AT bus compatible DMA channel DDACK Disk DMA Acknowledge Active low signal grants IDE bus master access to the PCI bus HDACT Signal from hard disk indicating hard disk activity The signal level depends on the hard disk type normally active low The signals from primary and secondary controller are routed together through diodes and passed to the connector FEATURE is A for primary and for secondary controller The pinout of the connectors are defined in the following se
55. is as follows Pull Pull U D loh lol Type Type loh lol U D 2 2 oc ster Fig ee aro 24 24 2 2 The interpretation of the signals in standard Centronics mode SPP with a printer attached is as follows Parallel data bus from PC board to printer The data lines are able to operate in PS 2 compatible bi directional mode Signal to select the printer sent from CPU board to printer Signal from printer to indicate that the printer is selected This signal indicates to the printer that data at PD7 0 are valid Signal from printer indicating that the printer cannot accept further data Signal from printer indicating that the printer has received the data and is ready to accept further data This active low output initializes resets the printer This active low output causes the printer to add a line feed after each line printed Signal from printer indicating that an error has been detected Signal from printer indicating that the printer is out of paper The printer port additionally supports operation in the EPP and ECP mode as defined in 3 G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 30 of 71 4 9 Serial Ports Two RS232 serial ports EIA TIA 232 E compliant are available on the 886LCD ATX GV and 886LCD ATXU GY The typical interpretation of the signals in the COM ports is
56. isabled 1MB Select the amount of system memory used by the 4MB 8MB 16MB internal graphics device 32MB Graphics Aperture Size 4MB 8MB 16Mb Size of the AGP Aperture memory 32MB 64MB 128MB 256MB IGD Device 2 Function 1 Disabled Setup the multimonitor function Enabled Boot Type VBIOS Default Setup type of boot screen CRT LFP CRT LFP EFP TV CRT EFP CRT TV EFP EFP2 EFP TV N A G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 66 of 71 7 7 2 Advanced Chipset Settings SouthBridge Configuration BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Power Exit Enable Disable the ICH4 IOAPIC function Onboard IDE Enabled SMBUS Enabled 97 Audio Enabled USB 1 Enabled USB 2 Enabled USB 3 Enabled EHCI USB 2 0 Enabled Onboard LAN Enabled Onboard SATA Enabled M lt Select Screen IOAPIC Enabled T Select Them Extended IOAPIC Enabled to Sub Screen Fl General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Description Onboard IDE Enabled Enable Disable ICH4 IDE Controller function Disable SMBUS Enabled Enable Disable ICH4 SMBUS function Disable 97 Audio Enabled Enable Disable ICH4 AC97 Audio Controller function
57. ld with the TV encoder field when the overlay is displaying an interleaved source When used as the Stall input it indicates that the pixel pipeline should stall one horizontal line The polarity is programmable for both modes and the input may be disabled completely M I2CCLK 2 CLK The specific function of this signal is 2 CLK for a multiplexed digital display This signal is tri stated during a hard reset M I2CDATA 2 DATA The specific function of this signal is 2 DATA for a multiplexed digital display This signal is tri stated during a hard reset M DVI CLK MDVI The specific function is DVI_CLK DDC for a multiplexed digital display connector This signal is tri stated during a hard reset M DATA MDVI DATA The specific function of this signal is DVI DATA DDC for a multiplexed digital display connector This signal is tri stated during a hard reset M DDCCLK MDDC CLK This signal may be used as the DDC_CLK for a secondary multiplexed digital display connector This signal is tri stated during a hard reset M DDCDATA MDDC This signal may be used as the DDC Data for a secondary multiplexed digital display connector This signal is tri stated during a hard reset ADD 10 7 0 ADD Card ID These signals will be strapped on the ADD card for software identification purposes These signals may need pull up or pull down resistors in a DVO device down scenar
58. lect Item Enter Go to Sub Screen F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options Description Quick Boot Enabled Allows BIOS to skip certain test while booting Disabled Quiet Boot Disabled Shows boot logo instead of POST screen Enabled Enabled amp Maintain AddOn ROM Display Mode Force BIOS Set display mode for Option ROM Keep Current Bootup Num Lock Select Power on state for numlock PS 2 Mouse Support Disabled Select support for PS 2 Mouse Enabled Auto Wait For F1 If Error Enabled Wait for F1 key to be pressed if error occurs Disabled See note 1 below Hit DEL Message Display Disabled Display the message or not Enabled Interrupt 19 Capture Disabled Allows option ROMs to trap interrupt 19 Enabled Note 1 Errors INS Pressed Timer Error Interrupt Controller 1 error Keyboard Interface Error Primary Master Hard Disk Error S M A R T HDD Error Cache Memory Error DMA Controller Error Resource Conflict PCI I O conflict PCI ROM conflict PCI IRQ conflict PCI IRQ routing table error Halt on Invalid Time Date Bad Static Resource Conflict PCI I O conflict and PCI ROM conflict G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 63 of 71 7 6 Security Menu BIOS Setup Utility Main Advanced PCIPnP Boot Se
59. mer not operational Processor error 8042 Gate A20 test error cannot switch to protected mode General exception error processor exception interrupt error Display memory error system video adapter coc N AMIBIOS ROM checksum error CMOS shutdown register read write error Cache memory test failed Troubleshooting POST BIOS Beep Codes Number of Beeps Troubleshooting Action Reseat the memory or replace with known good modules Fatal error indicating a serious problem with the system Consult your system manufacturer Before declaring the motherboard beyond all hope eliminate the possibility of interference by a malfunctioning add in card Remove all expansion cards except the video adapter If beep codes are generated when all other expansion cards are absent consult your system manufacturer s technical support If beep codes not generated when all other expansion cards are absent one of the add in cards is causing the malfunction Insert the cards back into the system one at a time until the problem happens again This will reveal the malfunctioning card If the system video adapter is an add in card replace or reseat the video adapter If the video adapter is an integrated part of the system board the board may be faulty 6 kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 7
60. n ekvivalent typ som rekommenderas av apparattillverkaren Kassera anvant batteri enligt fabrikantens instruktion VORSICHT Explosionsgefahr bei unsachgem f3em Austausch der Batterie Ersatz nur durch den selben oder einen vom Hersteller empfohlenen gleichwertigen Typ Entsorgung gebrauchter Batterien nach Angaben des Herstellers ADVARSEL Eksplosjonsfare ved feilaktig skifte av batteri Benytt samme batteritype eller en tilsvarende type anbefalt av apparatfabrikanten Brukte batterier kasseres i henhold til fabrikantens instruksjoner VAROITUS Paristo voi r j ht jos se on virheellisesti asennettu Vaihda paristo ainoastaan laltevalmistajan suosittelemaan tyyppiln H vit kaytetty paristo valmistajan ohjeiden mukaisesti G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 10 of 71 3 System specification 3 1 Component main data The table below summarises the features of the 886LCD GV embedded motherboards Form factor 886LCD ATXU GV uATX 244 1 x 305 0 mm 886LCD ATX GV ATX 190 5 x 304 0 mm Processor e Support for Intel Pentium 4 Intel Celeron and Intel Celeron D Processors in mPGA478 socket with 400MHz 533MHz system bus e 0 13 micron and 90nm Architecture support e 2 128KB 256KB 512KB Memory e 2x184pin DDR SDRAM Dual Inline Memory Module DIMM sockets e Support for DDR 266 PC2100 DRAM supporting higher spe
61. ndicate what the maximum default frequency to be used is Please also note that the CPU internal clock multiplier is fixed by the manufacturer CPU select Will let the CPU BIOS automatically control the base clock default 100 2 setting Will force CPU input clock to 100 2 and the internal CPU clock and FSB will be set accordingly CPU clock 100MHz x Clock multiplier FSB clock 400MHz 133MHz setting Will force CPU input clock to 133MHz and the internal CPU clock and FSB will be set accordingly CPU clock 133MHz x Clock multiplier FSB clock 533MHz kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 37 of 71 4 16 Case Open 51 The Case Open connector can be used for Intrusion Detection If Case is opened the switch should be closed Pull Pull U D loh lol Type Type loh lol U D GND CASEOPEN 220K 4 17 Trusted Platform Module TPM connector CN7 unsupported Pull Pull U D loh lol Type loh lol U D ee ck GND NENNEN x LFRAME NC 5 6 5 5 PWR L IA3 7 8 LAD2 7 91144 LAD L SMCLK L PWR VCC8SB L PWR GND LL LLL SUS STAT G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 38 of 71 4 18 Front Panel connector CN5 Pull Pull U D loh lol Type Type loh lol
62. nt LOCK as a target from the PCI bus point of view and optionally as a master Initialization Device Select is used as a chip select during configuration read and write transactions DEVSEL Device Select when actively driven indicates the driving device has decoded its address as the target of the current access As an input DEVSEL indicates whether any device on the bus has been selected G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 43 of 71 ARBITRATION PINS BUS MASTERS ONLY Request indicates to the arbiter that this agent desires use of the bus This is a point to point signal Every master has its own REQ which must be tri stated while RST is asserted Grant indicates to the agent that access to the bus has been granted This is a point to point signal Every master has its own GNT which must be ignored while RST is asserted While RST is asserted the arbiter must ignore all REQ lines since they are tri stated and do not contain a valid request The arbiter can only perform arbitration after RST is deasserted A master must ignore its GNT while is asserted REQ and GNT are tri state signals due to power sequencing requirements when 3 3V or 5 0V only add in boards are used with add in boards that use a universal I O buffer ERROR REPORTING PINS The error reporting pins are required by all devices and maybe asserted when enabled Parity Error is only for the reporting of
63. orts USB By default Legacy USB support is set to Enabled Legacy USB support operates as follows 1 When you apply power to the computer legacy support is disabled 2 POST begins 3 Legacy USB support is enabled by the BIOS allowing you to use a USB keyboard to enter and configure the BIOS Setup program and the maintenance menu 4 POST completes 5 The operating system loads While the operating system is loading USB keyboards and mice are recognized and may be used to configure the operating system Keyboards and mice are not recognized during this period if Legacy USB support was set to Disabled in the BIOS Setup program 6 After the operating system loads the USB drivers all legacy and non legacy USB devices are recognized by the operating system and Legacy USB support from the BIOS is no longer used To install an operating system that supports USB verify that Legacy USB support in the BIOS Setup program is set to Enabled and follow the operating system s installation instructions G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 48 of 71 7 BIOS Configuration Setup 7 1 Introduction The BIOS Setup is used to view and configure BIOS settings for the 886LCD ATX GV and 886LCD ATXU GV boards The BIOS Setup is accessed by pressing the DEL key after the Power On Self Test POST memory test begins and before the operating system boot begins The Menu bar is shown below
64. ot Support CPUs with Extended CPUID Functions G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 50 of 71 7 3 2 Advanced settings IDE Configuration BIOS Setup Utility Main Advanced PCIPnP Boot Security Chipset Power Exit IDE Configuration DISABLED disables OnBoard PCI IDE Controller Both the integrated TIDE controller PRIMARY enables only Primary IDE Master Hard Disk IDE Primary IDE Slave Not Detected SECONDARY enables Secondary IDE Master Not Detected Only the Secondas Secondary IDE Slave Not Detected D Y Hard Disk Write Protect Disabled 4 IDE Detect Time Out Sec 35 IDE 80Pin Cable Detection Host amp Device Controllers lt Select Screen Select Item t change option F1 General Help F10 Save and Exit ESC Exit V02 53 C Copyright 1985 2002 American Megatrends Inc Feature OnBoard PCI IDE Controller Options Disabled Primary Secondary Both Description Setup the configuration of the hard drive interfaces Hard Disk Write Protect Disable Enabled Enable write protection on HDDs only works when it is accessed through the BIOS IDE Detect Time Out Sec 0 5 10 15 20 25 30 35 Select the time out value when the BIOS is detecting ATA ATAPI Devices ATA PI 80Pin Cable Detection Ho
65. pter ribbon cable is used the DB9 pinout will be identical to the pinout of Serial Com1 G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 31 of 71 4 10 Ethernet connector The 886LCD ATX GV and 886LCD ATXU GV boards supports 1 channel of 10 100Mb Ethernet using the Realtek 8100C LAN controller In order to achieve the specified performance of the Ethernet port Category 5 twisted pair cables must be used with 10 100MB LAN networks The signals for the Ethernet ports are as follows Transmit pair in 10Base T and 100Base TX mode Receive pair in 10Base T and 100Base TX mode 4 10 1 Ethernet connector ETHER The Ethernet connector is mounted together with USB Ports 4 and 5 The pinout of the RJ45 connector is as follows Signal loh lol G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 32 of 71 4 11 USB Connector USB The 886LCD ATX GV and 886LCD ATXU GV contains three USB Universal Serial Bus ports UHCI Host Controllers Each Host Controller includes a root hub with two separate USB ports each for a total of 6 USB ports The USB Host Controllers support the standard Universal Host Controller Interface UHCI Specification Rev 1 1 All 6 USB ports support both USB1 0 and USB2 0 signaling Over current detection on all six USB ports is supported USB Port 0 and 1 are
66. r SATAO and a secondary controller SATA1 4 6 1 SATA Hard Disk Connector SATAO SATA1 SATAQ J16 Pull Type UD note L ew mwa 2 seme p E 3 4 5 SATAO RX 6 SATAORX _ GND signals used for the primary Serial ATA harddisk interface are the following SATAO Host transmitter differential signal pair SATAO RX SATAO Host receiver differential signal pair SATAO TX All of the above signals are compliant to 4 SATA1 J15 Pull Type loh lol U D amm cc umm s ep p C 1 3 4 u 5 SATA1 RX 6 SATA1 RX LI CNO The signals used for the secondary Serial ATA harddisk interface are the following SATA1 Host transmitter differential signal pair SATA1 RX SATA1 TX Host receiver differential signal pair SATA1 TX All of the above signals are compliant to 4 G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 28 of 71 47 Floppy Disk Connector FDC1 EE S U D loh lol Type Type loh lol U D PwR GND 911 2 L jp 88 3 48 NC j PWR GND 15 pss ns 7 8 f INDEX 15 330R PWR GND 9 10
67. r 75 Ohm cable impedance GREEN Analog output carrying the green color signal to the CRT For 75 Ohm cable impedance BLUE Analog output carrying the blue color signal to the CRT For 75 Ohm cable impedance DIG GND Ground reference for HSYNC and VSYNC ANA GND Ground reference for RED GREEN and BLUE G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 23 of 71 4 4 2 AGP DVO connector The 886LCD ATX GV 886LCD ATXU boards are equipped with the Intel 845GV chipset The GV chipset does not support AGP output but only DVO output Noe Type Signa m PN d Signal 1 Note Pvc PWR EV PWMR as 9 PR GN PWR x 1 A 9 9 035 A Be 9 PWR 52 __ PWR l x I __ PR 35 PWR ADD_ID2 817 17 ADD ID3 x ADbRS w f Bi ADD_RS ______ A19 GND PWR ADD_ID4 B20 A20 ADD 105 21 22 23 24 25 26 27 28 29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 ADD ID6 RSVD GND 3V3AUX 3 3V DVOC Flq Stl DVOC D10 3 3V DVOC D8 DVOC D6 GND DVOC DVOC D4 1 5V DVOC D2 DVOC DO GND DVOC Hsync ADD RS 1 5V M I2CCIk ADD 107 1 RSVD GND PWR RSVD 3 3V PWR DVOBC Intr DVOC D11 3 3V PWR DVOC D9 DVOC
68. s SouthBridge 66 7 8 Dee 67 7 9 2 mec 68 7 10 AMI BIOS Beep enar 69 8 OS SE UP 70 9 WARRANTY Bee 71 G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 7 of 71 1 Introduction This manual describes the 886LCD ATX GV and 886LCD ATXU GV boards made by KONTRON Technology A S The boards will also be denoted 886LCD GV family if no differentiation is required All boards are to be used with the Intel Pentium 4 Intel Celeron and Intel Celeron D Processors Use of this manual implies a basic knowledge of PC AT hard and software This manual is focused on describing the 886 Board s special features and is not intended to be a standard PC AT textbook New users are recommended to study the short installation procedure stated in chapter 2 before switching on the power G kontron sssLcp ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 8 of 71 2 Installation procedure 2 1 Installing the board To get the board running follow these steps In some cases the board shipped from KONTRON Technology has CPU DDR DRAM and Cooler mounted In this case Step 2 4 can be skipped 1 Turn off the power supply Warning Do not use Power Supply without voltage monitoring watchdog which is A standar
69. st amp Device Host Device Select the mechanism for detecting 80Pin ATA Cable G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 51 of 71 BIOS Setup Utility Advanced Primary IDE Master Select the type of Device Hard Disk Vendor ST340014A Size 40 0GB LBA Mode Supported Block Mode 16Sectors PIO Mode 4 MultiWord DMA 2 Ultra DMA Ultra DMA 5 S M A R T Supported s Select Item Auto t Change Option LBA Large Mode Auto 1 1 1 Block Multi Sector Transfer Auto F10 save and Exit PIO Mode Auto ESC Exit DMA Mode Auto S M A R T Auto 32Bit Data Transfer Disabled V02 53 C Copyright 1985 2002 American Megatrends Inc Feature Options Description Not Installed Select the type of device connected to the system Auto CDROM ARMD LBA Large Mode Disabled Enabling LBA causes Logical Block Addressing to be Auto used in place of Cylinders Heads and Sectors Block Multi Sector Disabled Select if the device should run in Block mode Transfer Auto PIO Mode Auto Selects the method for transferring the data between the hard disk and system memory The Setup menu only lists those options supported by the drive and platform Selects the Ultra DMA mode used for moving data to from the drive Autotype the drive to select the
70. supplied on the separate Rear IO connector USB Port 4 and 5 are supplied on the combined ETHER USB4 USB5 connector USB Ports 2 and 3 are supplied on the USB2 3 connector 4 11 1 USB Connector 0 1 05 0 1 0580 and USB 1 are located on a separate Rear connector I O Bracket connector loh lol Signal Signal loh lol 5V SB5V USBO 5V SB5V USB1 Note 1 5V supply for the USB devices is on board fused with a 1 5A reset able fuse The supply is common for the two channels SB5V is supplied during power down to allow wakeup on USB device activity In order to meet the requirements of USB v 1 1 standard the 5V input supply must be at least 5 00V 05 0 USBO Differential pair works as Data Address Command Bus USB1 USB1 USB5V 5V supply for external devices Fused with 1 5A reset able fuse G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 33 of 71 4 11 2 USB Connector 2 3 USB2 3 USB2 and USB3 are located on a a 2x5 pinrow connector The pinout of the USB2 3 connector USB2 is as follows m Pull Pull U D loh lol Type loh lol U D SV SBSV ENES svisBv PwR 1 0 25 2 USB2 USB3 0 25 2 15K Po PWR GND SAEI GND PWR Gam L9 10 N M Note 1 5V supply for the USB devices is on board fused with a 1 rese
71. t able fuse The supply is common for the two channels SB5V is supplied during power down to allow wakeup on USB device activity In order to meet the requirements of USB v 1 1 standard the 5V input supply must be at least 5 00V USB2 USB2 Differential pair works as Data Address Command Bus USB3 USB3 USB5V supply for external devices Fused with 1 5A reset able fuse 4 11 3 USB Connector 4 5 USB4 5 0584 and 0585 are mounted together with ETHER ethernet port on a Rear IO connector I O Bracket connector loh lol i i loh lol 5V SB5V 05 4 5V SB5V USB5 Note 1 The 5V supply for the USB devices is on board fused with a 1 5A reset able fuse The supply is common for the two channels SB5V is supplied during power down to allow wakeup on USB device activity In order to meet the requirements of USB v 1 1 standard the 5V input supply must be at least 5 00V USB4 USB4 Differential pair works as Data Address Command Bus USB5 USB5 USB5V 5V supply for external devices Fused with 1 5A reset able fuse kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 34 of 71 4 12 Audio Connector 4 12 1 Audio Line in Line out and Microphone Audio Line in Line out and Microphone are available in the stacked audio jack connector IN Signa Type Line in Left Line in Right GND
72. ted minimum 5 years retention varies depending on temperature actual application on off rate and variation within chipset and other components Approximately current draw is 3 7uA no PSU connected CAUTION Danger of explosion if the battery is incorrectly replaced Replace only with the same or equivalent type recommended by the manufacturer Dispose of used batteries according to the manufacturer s instructions G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 12 of 71 3 2 Processor support table 886LCD ATX GV and 886LCD ATX GV boards are designed to support the following processors Intel Pentium 4 Processors Intel Celeron D Processors Intel Celeron Processors Intel Intel Single Pack OEM Product Product Order Code Order Code Cache Speed size Intel Pentium 49 Embedded Processors 2 0A GHZ 400MHz FSB 2 40 GHZ 533MHz FSB 2 60 GHZ 400MHz FSB 2 80 GHZ 400MHz FSB Intel Celeron Embedded Processors 2 00 GHZ 400MHz FSB 128K 2 50 GHZ 400MHz FSB 128K Intel Celeron D Embedded Processors 2 80 GHz 533MHz FSB 256K BX80546RE2800C RK80546RE072256 Intel Pentium 4 Processors 1 60 GHZ 400MHz FSB 512K RK80534PC025512 1 60 GHZ 400MHz FSB 512K BX80532PC1600D 1 80 GHZ 400MHz FSB 512K RK80534PC033512 1 80 GHZ 400MHz FSB 512K BX80532PC1800D RK80532PC033512 2 00 GHZ 400MHz FSB RK80532PC041512 2 20 GHZ 400MHz FSB RK80532PC049512 2 26 GH
73. tems Support WinXP Win2000 Win2003 WinXP Embedded limitations may apply WinCE net limitations may apply Linux Feodora Core 3 Suse 9 2 limitations may apply Environmental Conditions Operating 0 C 60 C operating temperature forced cooling It is the customer s responsibility to provide sufficient airflow around each of the components to keep them within allowed temperature range Storage 20 C 70 C 5 95 relative humidity non condensing Electro Static Discharge ESD Radiated Emissions All Peripheral interfaces intended for connection to external equipment are ESD EMI protected EN 61000 4 2 2000 ESD Immunity EN55022 1998 class B Generic Emission Standard Safety UL 60950 1 2003 First Edition CSA C22 2 No 60950 1 03 Ist Ed April 1 2003 Product Category Information Technology Equipment Including Electrical Business Equipment Product Category CCN NWGQ2 NWGQ8 File number E194252 Theoretical MTBF 129679 hours 14 5 years Calculation based on Telcordia SR 332 method Resiriction of Hazardeous Substances RoHS 886LCD ATX GV and 886LCD ATXU GV boards are RoHS compliant Capacitor utilization No Tantal capacitors on board Only Japanese brand Aluminium capacitors rated for 100 C used on board Battery Exchangeable 3 0V Lithium battery for onboard Real Time Clock and CMOS RAM Manufacturer Panasonic PN CR2032NL LE or CR 2032L BE Expec
74. the following memory features e 2 5V only 184 pin DDR SDRAM DIMMs with gold plated contacts e Supports up to two single sided and or double sided DIMMs four rows populated with unbuffered PC1600 PC2100 DDR SDRAM Supports 64 Mbit 128 Mbit 256 Mbit and 512 Mbit technologies for x8 and x16 width devices Maximum of 2 Gbytes system memory by using 512 Mbit technology devices double sided Supports 200 MHz and 266 MHz DDR devices 64 bit data interface ECC not supported with the Intel 845GV chipset The installed DDR SDRAM should support the Serial Presence Detect SPD data structure This allows the BIOS to read and configure the memory controller for optimal performance If non SPD memory is used the BIOS will attempt to configure the memory settings but performance and reliability may be impacted In general DDR SDRAM with higher speeds than 266 2 be used e g 333MHz or 400 2 but it is recommended to run a qualification test before use or to use Kontron Technology validated DDR SDRAM G kontron 886LCD ATX GV ATXU GV KTD 00647 E 3 4 System overview Public User Manual Date 2009 01 14 Page 15 of 71 The block diagram below shows the architecture and main components of the 886LCD boards The two key components on the board are the Intel 845GV and Intel ICH4 Embedded Chipsets Intel DVO 1 06 58 5 Ports 4 IDE Devices UtraATAI1O0 Sa 6 USB Ports Sj 3UHCI e AC 97 Codec 97 2
75. upply voltages are as follows also refer to ATX specification version 2 03 Control signal description Active high signal from the power supply indicating that the 5V and 3V3 supplies are within operating limits It is strongly recommended to use an ATX supply with the 886LCD ATX GV 886LCD ATXU GV boards in order to implement the supervision of the 5V and 3V3 supplies These supplies are not supervised onboard the 886LCD ATX GV and 886LCD ATXU GV boards PS_ON Active low open drain signal from the board to the power supply to turn on the power supply outputs Signal must be pulled high by the power supply G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 21 of 71 4 3 Keyboard and PS 2 mouse connectors Attachment of a keyboard or PS 2 mouse adapter can be done through the stacked PS 2 mouse and keyboard connector MSE amp KBD Both interfaces utilize open drain signaling with on board pull up The PS 2 mouse and keyboard is supplied from 5V_STB when in standby mode in order to enable keyboard or mouse activity to bring the system out from power saving states The supply is provided through a 1 1A resetable fuse 4 31 Stacked MINI DIN keyboard and mouse Connector MSE amp KBD Pull Pull U D loh lol pe loh lol U D NR __ ___ Signal Description Keyboard amp
76. ve Changes and Exit Exit system setup after saving the changes Discard Changes and Exit Exit system setup without saving any changes Discard Changes Discards changes done so far to any of the setup questions Load Optimal Defaults Load Optimal Default values for all the setup questions Load Failsafe Defaults Load Failsafe Default values for all the setup questions Secure CMOS Enabled will store current CMOS in non volatile ram Enabled This will maintain the settings even if battery is failing Halt on Invalid Time Date Disable Enabled G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 Page 7 10 AMI BIOS Beep Codes Boot Block Beep Codes Number of Beeps Description Insert diskette in floppy drive A 69 of 71 AMIBOOT ROM file not found in root directory of diskette in A Base Memory error Flash Programming successful Floppy read error Keyboard controller BAT command failed No Flash EPROM detected Floppy controller failure Boot Block BIOS checksum error Flash Erase error Flash Program error AMIBOOT ROM file size error BIOS ROM image mismatch file layout does not match image present in flash device POST BIOS Beep Codes Number of Beeps Description Memory refresh timer error Parity error in base memory first 64KB block Base memory read write test error Motherboard ti
77. without notice KONTRON Technology assumes no responsibility or liability for the use of the described product s conveys no license or title under any patent copyright or mask work rights to these products and makes no representations or warranties that these products are free from patent copyright or mask work right infringement unless otherwise specified Applications that are described in this manual are for illustration purposes only KONTRON Technology A S makes no representation or warranty that such application will be suitable for the specified use without further testing or modification G kontron 886LCD ATX GV ATXU GV KTD 00647 E Public User Manual Date 2009 01 14 3 of 71 Life Support Policy KONTRON Technology s PRODUCTS ARE NOT FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL OF THE GENERAL MANAGER OF KONTRON Technology A S As used herein 1 Life support devices or systems are devices or systems which a are intended for surgical implant into body or b support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in significant injury to the user 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect
78. y the system designer and not by the signaling agent or central resource This pull up may take two to three clock periods to fully restore SERR The agent that reports SERR s to the operating system does so anytime SERR is sampled asserted INTERRUPT PINS OPTIONAL Interrupts on PCI are optional and defined as level sensitive asserted low negative true using open drain output drivers The assertion and deassertion of INTx is asynchronous to CLK A device asserts its INTx line when requesting attention from its device driver Once the INTx signal is asserted it remains asserted until the device driver clears the pending request When the request is cleared the device deasserts its INTx signal PCI defines one interrupt line for a single function device and up to four interrupt lines for a multi function device or connector For a single function device only be used while the other three interrupt lines no meaning 4 23 3 886LCD ATX GV 886LCD ATXU GV PCI IRQ amp INT routing Board type 886LCD ATXU GV 886LCD ATX GV INT INT PIRORG INT INT INT INT INT INT INT INT INT PIROZD INT PIRO4G INT INT_PIRQ H INT PIROZA INT INT INT INT INT

User Manual for the Mother Boards: 886LCD/ATX(GV) 886LCD

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