PCI-DAS6030 & PCI-DAS6032 User`s Guide
Contents
1. I O Type Signal Name Function AUXIN lt 5 0 gt sources A D CONVERT External ADC Convert Strobe default software selectable A D TIMEBASE IN External ADC Pacer Time Base A D START TRIGGER ADC Start Trigger default A D STOP TRIGGER ADC Stop Trigger default A D PACER GATE External ADC Gate default D A START TRIGGER DAC Trigger Gate default D A UPDATE DAC Update Strobe default D A TIMEBASE IN External DAC Pacer Time Base AUXOUT lt 2 0 gt sources STARTSCAN A pulse indicating the start of conversion software selectable SSH An active signal that terminates at the start of the last conversion in a scan A D STOP Indicates the end of a scan A D CONVERT ADC convert pulse default SCANCLK Delayed version of ADC convert default CTR1 CLK CTR1 clock source D A UPDATE D A update pulse default CTR2 CLK CTR2 clock source A D START TRIGGER ADC Start Trigger Out A D STOP TRIGGER ADC Stop Trigger Out A D PACER GATE External ADC gate D A START TRIGGER DAC Start Trigger Out Default selections AUXINO A D CONVERT summary AUXINI A D START TRIGGER AUXIN2 A D STOP TRIGGER AUXIN3 D A UPDATE AUXIN4 D A START TRIGGER AUXINS A D PACER GATE AUXOUTO D A UPDATE AUXOUTI A D CONVERT AUXOUT2 SCANCLK DAQ Sync signals The DAQ Sync hardware provides the capability of triggering or clocking up to four slave boards from a master board to synchronize2. STC Queue ADC DAC Buffer Buffer Buffer 8K 8K 16K 32K x 16 SRAM MEMORY BUS AID START TRIGGER AID STOP TRIGGER AID PACER GATE le A D PACER OUT AWYVY 100 Pin I O CONNECTOR SCANCLK lt 4 D A START MEER y D A UPDATE i D A PACER OUT lt K DIO 8 BIT EXT CTR1 CLK d 4 CTR1 CLK CTR1 GATE EA CTR1 OUT SOUNDER aA CTR2 GATE useR Control CTR2 OUT FOUNEN CTR2 CLK AUX IN AUX OUT INTERFACE EXT CTR2 CLK THRESH HI 12 BIT ATRIG SYSTEM TIMING amp CONTROL DAQ SYNC LOCAL BUS Boot EEPROM THRESH LO 12 BIT oa oO Ee oO lu Zz 2 oO oO Oo am gt N ie lt A a lt PCI BRIDGE CHO WI BUS MASTER DMA CH1 Figure 4 1 Block diagram PCI DAS6030 32 4 3 PCI DAS6030 amp PCI DAS6032 User s Guide Functional Details DAQ signal timing The DAQ timing signals are SCANCLK A D START TRIGGER A D STOP TRIGGER STARTSCAN SSH A D CONVERT A D PACER GATE A D EXTERNAL TIME BASE A D STOP ATRIG SCANCLK signal SCANCLEK is an output signal that may be used for switching external multiplexers It is a 400 ns wide pulse that follows the CONVERT signal after a 50 ns delay This is adequate time for the analog input signal to be acquired so that the next signal may be
3. EU EMC Directive 89 336 EEC Electromagnetic Compatibility EN 61326 1997 Amendment 1 1998 Emissions Group 1 Class A EN 55011 1990 CISPR 11 Radiated and Conducted emissions Immunity EN61326 Annex A IEC 1000 4 2 1995 Electrostatic Discharge immunity Criteria A IEC 1000 4 3 1995 Radiated Electromagnetic Field immunity Criteria B IEC 1000 4 4 1995 Electric Fast Transient Burst immunity Criteria A IEC 1000 4 5 1995 Surge immunity Criteria A IEC 1000 4 6 1996 Radio Frequency Common Mode immunity Criteria A IEC 1000 4 11 1994 Voltage Dip and Interrupt immunity Criteria A Tests to IEC 1000 4 8 were not required The PCI boards do not contain components that would be susceptible to magnetic fields Declaration of Conformity based on tests conducted by Chomerics Test Services Woburn MA 01801 USA in June 2004 Test records are outlined in Chomerics Test Report EMI3889 04 We hereby declare that the equipment specified conforms to the above Directives and Standards 2 Moet Carl Haapaoja Director of Quality Assurance CE Declaration of Conformity Manufacturer Measurement Computing Corporation Address 10 Commerce Way Suite 1008 Norton MA 02766 USA Category Electrical equipment for measurement control and laboratory use Measurement Computing Corporation declares under sole responsibility that the product PCI DAS6032 to which this declaration relates is in conformity
4. The D A START TRIGGER signal is used to hold off output scans until after a trigger event The DAQ Sync DS D A START TRIGGER input or any AUXIN pin can be programmed to serve as the D A START TRIGGER signal It is also available as an output on any AUXOUT pin When used as an input the D A START TRIGGER signal may be software selected as either a positive or negative edge trigger The selected edge of the D A START TRIGGER signal causes the DACs to start generating the output waveform The D A START TRIGGER signal can be used as an output to monitor the trigger that initiates waveform generation The output is an active high pulse having a width of 50 ns Figure 4 24 and Figure 4 25 show the input and output timing requirements for the D A START TRIGGER signal 4 13 PCI DAS6030 amp PCI DAS6032 User s Guide Functional Details Rising Edge Polarity e 2 Falling Edge Polarity et w ra 37 5 ns minimum Figure 4 24 D A START TRIGGER input signal timing tw tw 50 ns Figure 4 25 D A START TRIGGER output signal timing D A CONVERT signal The D A CONVERT signal causes a single output update on the D A converters You can program the DAQ Sync DS D A UPDATE input or any AUXIN pin to accept the D A CONVERT signal It is also available as an output on any AUXOUT pin The D A CONVERT input signal polarity is software selectable DAC outputs update within 100ns of the selected edge The D A CONVERT pulses s
5. For analog signal conditioning and expansion you can use the following signal conditioning accessory products with the C100HDS0 x cable JISO RACK 16 P 16 channel ISO 5B module rack for connecting an ISO 5B module to an analog input Details on this product are available on our web site at www mcecdag com cbicatalog cbiproduct asp dept_id 127 amp pf_id 1111 J SO RACK DA02 P 2 channel 5B module rack for 50 pin DA02 amp 100 pin series detachable terminals are available Details are available on our web site at www mecdag com cbicatalog cbiproduct asp dept_id 128 amp pf_id 711 2 9 Chapter 3 Programming and Developing Applications After following the installation instructions in Chapter 2 your board should now be installed and ready for use Although the board is part of the larger DAS family in general there may be no correspondence among registers for different boards Software written at the register level for other DAS models will not function correctly with your board Programming languages Measurement Computing s Universal Library provides access to board functions from a variety of Windows programming languages If you are planning to write programs or would like to run the example programs for Visual Basic or any other language please refer to the Universal Library User s Guide available on our web site at www measurementcomputing com PDFmanuals sm ul user guide pdf Packaged applic
6. 2 TC CTR2 CLK e ols ee eT CTR2 OUT Mode n ST CTR2 OUT Mode 0 Figure 4 34 CTR2 OUT signal timing 4 18 Chapter 5 Calibrating the Board Introduction You should calibrate the board using the JnstaCal utility after the board has fully warmed up The recommended warm up time is 15 minutes For best results calibrate the board immediately before making critical measurements The high resolution analog components on the board are somewhat sensitive to temperature Pre measurement calibration ensures that your board is operating at optimum calibration values Calibration theory Analog inputs are calibrated for offset and gain Offset calibration for the analog inputs is performed directly on the input amplifier PGIA with coarse and fine trim DACs acting on the amplifier For input gain calibration a precision calibration reference is used with coarse and fine trim DACs acting on the ADC see Figure 5 1 Analog In gt PGIA lt m A Pre Gain Offset BY Trim DAC Coarse Trim DAC Fine Trim DAC c Post Gain oarse Offset Trim DAC Fine Gain Trim DAC Coarse Trim DAC Fine Figure 5 1 Analog input calibration basic elements 5 1 PCI DAS6030 amp PCI DAS6032 User s Guide Calibrating the Board A similar method is used to calibrate the analog output components A trim DAC is used to adjust
7. 4 1 shows a simplified block diagram of the PCI DAS6030 and PCI DAS6032 This board provides all of the functional elements shown in the figure The System Timing and Control STC is the logical center for all DAQ DIO and DAC if applicable operations It communicates over two major busses a local bus and a memory bus The local bus carries digital I O data and software commands from the PCI Bus Master There are two Direct Memory Access DMA channels provided for data transfers to the PC Primarily the memory bus carries A D and D A related data and commands There are three buffer memories provided on the memory bus The queue buffer 8K configuration memory stores programmed channel numbers gains and offsets The ADC buffer 8K FIFO First In First Out temporarily stores scanned and converted analog inputs The DAC 16K buffer stores data to be output as analog waveforms Auxiliary input amp output interface The board s 100 pin I O connector provides six software selectable inputs and three software selectable outputs The signals are user configurable clocks triggers and gates Refer to DAQ signal timing for information about these signals and their timing requirements Table 4 1 lists all of the possible signals and the default signals you use on the nine pins 4 1 PCI DAS6030 amp PCI DAS6032 User s Guide Functional Details Table 4 1 Auxiliary I O Signals
8. Acquisition is suspended whenever the ATRIG signal goes above the THRESH_HI level The hysteresis level is set by THRESH_HI This is a level sensitive Trigger 1 oo Gate Inside Window gating mode 2 n a ee _Thresh_HI Thresh_LO Acquired Data 2 Figure 4 21 Gate Positive Hysteresis Data acquisition is enabled whenever ATRIG is below the THRESH_HI level and above the THRESH_LO level Acquisition is suspended whenever the ATRIG signal is outside of this region This is a level sensitive gating mode 2 a 2 Trigger Thresh_Hl Thresh_LO eae Fig i a ea Acquired Data 42 1 Figure 4 22 Gate Inside Window 4 12 PCI DAS6030 amp PCI DAS6032 User s Guide Functional Details Gate Outside Window Data acquisition is enabled whenever ATRIG is above the THRESH_HI level or below the THRESH_LO level Acquisition is suspended whenever the ATRIG signal is between the THRESH_HI and THRESH _LO levels This is a level sensitive gating mode 2 1 Thresh_HI Thresh_LO Trigger PERNAR ATSE A Acquired Data 2 1 a Figure 4 23 Gate Outside Window Waveform generation timing signals The signals that control the timing for the analog output functions on the PCI DAS6030 are D A START TRIGGER D A UPDATE D A EXTERNAL TIME BASE D A START TRIGGER signal
9. D START TRIGGER A D STOP TRIGGER External analog ATRIG input CHO IN through CH15 IN A D triggering modes External digital Software configurable for rising or falling edge External analog Refer to Analog Trigger on page 6 Pre Post trigger Unlimited number of pre trigger samples 16 Meg post trigger samples ADC pacer out Available at user connector A D PACER OUT RAM buffer size 8 K samples Data transfer DMA Programmed I O DMA modes Demand or Non demand using scatter gather Configuration memory Up to 8 K elements Programmable channel gain and offset Streaming to disk rate 100 kS s system dependent 6 1 PCI DAS6030 amp PCI DAS6032 User s Guide Specifications Accuracy 100 kS s sampling rate single channel operation and a 15 minute warm up Accuracies listed are for measurements made following an internal calibration They are valid for operational temperatures within 1 C of internal calibration temperature and 4 Table 2 Absolute accuracy specifications t10 C of factory calibration temperature Calibrator test source high side tied to channel 0 high and low side tied to channel 0 low Low level ground is tied to channel 0 low at the user connector Range Absolute Accuracy 10 V 3 81 LSB 5 V 13 61 LSB 2 V 13 69 L
10. LO 55 n c 6 CH2 IN HI 56 n c 7 CH2 IN LO 57 n c 8 CH3 IN HI 58 n c 9 CH3 IN LO 59 n c 10 CH4 IN HI 60 n c 11 CH4 IN LO 61 n c 12 CH5 IN HI 62 n c 13 CH5 IN LO 63 n c 14 CH6 IN HI 64 n c 15 CH6 IN LO 65 n c 16 CH7 IN HI 66 nic 17 CH7 INLO 67 nic 18 LLGND 68 nic 19 nic 69 nic 20 nic 70 nic 21 nic 71 nic 22 nic 72 n c 23 n c 73 n c 24 n c 74 n c 25 n c 75 n c 26 n c 76 n c 27 n c 77 n c 28 n c 78 n c 29 n c 79 n c 30 n c 80 n c 31 n c 81 n c 32 n c 82 n c 33 n c 83 n c 34 n c 84 n c 35 AISENSE 85 DIOO 36 D A OUT 0 86 DIO1 37 D A GND 87 DIO2 38 D A OUT1 88 DIO3 39 PC 5 V 89 DIO4 40 AUXOUTO D A PACER OUT 90 DIO5 41 AUXOUT1 A D PACER OUT 91 DIO6 42 AUXOUT2 SCANCLK 92 DIO7 43 AUXINO A D CONVERT ATRIG 93 CTR1 CLK 44 n c 94 CTR1 GATE 45 AUXIN1 A D START TRIGGER 95 CTR1 OUT 46 AUXIN2 A D STOP TRIGGER 96 GND 47 AUXIN3 D A UPDATE 97 CTR2 CLK 48 AUXIN4 D A START TRIGGER 98 CTR2 GATE 49 AUXIN5 A D PACER GATE 99 CTR2 OUT 50 GND 100 GND N C on PCI DAS6032 6 12 PCI DAS6030 amp PCI DAS6032 User s Guide Specifications Table 28 16 channel single ended mode pin out Pin Signal Name Pin Signal Name 1 LLGND 51 nic 2 CHO IN 52 nic 3 CH8 IN 53 nic 4 CH1 IN 54 nic 5 CH9 IN 55 nic 6 CH2 I
11. counter 1 It can be selected through software at the CTR1 CLK pin rather than using the on board 10 MHz or 100 kHz sources It is also polarity programmable The maximum input frequency is 10 MHz There is no minimum frequency specified Figure 4 29 shows the timing requirements for the CTR1 CLK signal tp 100 ns minimum l I I I 1 tw H 15 ns minimum tw 25 ns minimum Figure 4 29 CTR1 CLK signal timing 4 15 PCI DAS6030 amp PCI DAS6032 User s Guide Functional Details CTR1 GATE signal You can use the CTR1 GATE signal for starting and stopping the counter saving counter contents etc It is polarity programmable and is available at the CTR1 GATE pin Figure 4 30 shows the minimum timing requirements for the CTR1 GATE signal t l i Rising Edge Polarity Falling Edge Polarity T es le 25 ns minimum Figure 4 30 CTR1 GATE signal timing CTR1 OUT signal This signal is present on the CTR1 OUT pin The CTR1 OUT signal is the output of one of the two user s counters in an industry standard 82C54 chip For detailed information on counter operations please refer to the data sheet on our WEB page at http www measurementcomputing com PDFmanuals 82C54 pdf Figure 4 31 shows the timing requirements for the CTR1 OUT signal for counter mode 0 and mode 2 TC CTR1 CLK mA E E E CTR1 OUT Mode ti lt i lt LOSS T CTR1 OUT Mode 0 Figure 4 31 CTR1 OUT signal timing
12. data input and or output The PCI DAS6030 and PCI DAS6032 boards provide the capability of inter board synchronization between boards in the PCI DAS6000 family There are five trigger strobes and a synchronizing clock provided on a 14 pin header Table 4 2 lists the available signals Table 4 2 DAQ Sync signals DS A D START TRIGGER DS A D STOP TRIGGER DS A D CONVERT DS D A UPDATE DS D A START TRIGGER SYNC CLK 4 2 PCI DAS6030 amp PCI DAS6032 User s Guide Functional Details Except for the SYNC CLK signal the DAQ Sync timing and control signals are a subset of the AUXIO signals available at the 100 pin I O connector These versions of the signals are used for board to board synchronization and have the same timing specifications as their I O connector counterparts Refer to DAQ signal timing for explanations of signals and timing Use the SYNC CLCK signal to determine the master slave configuration of a DAQ Sync enabled system Each system can have one master and up to three slaves SYNC CLK is the 40 MHz time base used to derive all board timing and control The master provides this clock to the slave boards so that all boards in the DAQ sync enabled system are timed from the same clock Analog In AISENSE D A OUTO D A OUT 1 PCI DAS6030 Only AID CONVERT am Calibration DACs HOLDING REGISTER ADC 16 16 BIT EOC Calibration DACs
13. switched in The polarity of the SCANCLK signal is programmable The default output pin for the SCANCLK signal is AUXOUT2 but any of the AUXOUT pins may be programmed as a SCANCLK output CONVERT i i SCANCLK 1 1 o ae A ta i tw i ta 50 ns tw 400 ns Figure 4 2 SCANCLK signal timing A D START TRIGGER signal Use the A D START TRIGGER signal for conventional triggering when you only need to acquire data after a trigger event Figure 4 3 shows the A D START TRIGGER signal timing for a conventionally triggered acquisition i i AID Start Trigger Sl ES a N Start Scan l Convert o N o Scan Counter 4 4 Figure 4 3 Data acquisition example for conventional triggering The A D START TRIGGER source is programmable and may be set to any of the AUXIN inputs or to the DAQ Sync DS A D START TRIGGER input The polarity of this signal is also programmable to trigger acquisitions on either the positive or negative edge The A D START TRIGGER signal is also available as an output and can be programmed to appear at any of the AUXOUT outputs Refer to Figure 4 4 and Figure 4 5 for A D START TRIGGER input and output timing requirements 4 4 PCI DAS6030 amp PCI DAS6032 User s Guide Functional Details tw Rising Edge Polarity Falling Edge Polarity a a w lw 37 5 ns minimum Figure 4 4 A D START TRIGGER input signal timing tw tw 50 ns Figure 4
14. the gain of the DAC A separate DAC is used to adjust offset on the final output amplifier The calibration circuits are duplicated for both analog outputs see Figure 5 2 Analog Out Figure 5 2 Analog output calibration basic elements 5 2 Chapter 6 Specifications Typical for 25 C unless otherwise specified Specifications in italic text are guaranteed by design Analog Input Table 1 Analog input specifications A D converter Successive approximation type Resolution 16 bits 1 in 65536 Maximum sample rate 100 kS s Number of channels 16 single ended 8 differential software selectable Input ranges Bipolar 10 V 5 V 2 V 1 V 0 5 V 0 2 V 40 1 V Unipolar 0 to 10 V 0 to 5 V 0 to 2 V 0 to 1 V 0 to 0 5 V 0 to 0 2 V 0to0 1 V Software selectable A D pacing Internal counter ASIC Software selectable time base Internal 40 MHz 50 ppm stability External source via AUXIN lt 5 0 gt Software selectable External convert strobe A D CONVERT Software paced Burst mode Software selectable option burst rate 10 uS A D gate sources External digital A D GATE External analog ATRIG input CHO IN through CH15 IN A D gating modes External digital Programmable active high or active low level or edge External analog Refer to Analog Trigger on page 6 A D trigger sources External digital A
15. typ 100 mV 40 uS max 20 uS max 10 uS max 5 uS typ 0 to 10V 40 uS max 20 uS max 10 uS max 5 uS typ 0to5 V 40 uS max 20 uS max 10 uS max 5 uS typ 0to2V 40 uS max 20 uS max 10 uS max 5 uS typ Otol V 40 uS max 20 uS max 10 uS max 5 uS typ 0 to 500 mV 40 uS max 20 uS max 10 uS max 5 uS typ 0 to 200 mV 40 uS max 20 uS max 10 uS max 5 uS typ 0 to 100 mV 40 uS max 20 uS max 10 uS max 5 uS typ 6 3 PCI DAS6030 amp PCI DAS6032 User s Guide Specifications Parametrics Table 7 Parametrics specifications Max working voltage signal common mode CMRR 60 Hz 11 V 10 V range and 0 to 10 V 92 dB 5 V range and 0 to 5 V 97 dB 2 V range and 0 to 2 V 101 dB 1 V range and 0 to 1 V 104 dB 0 5 V range and 0 to 0 5 V 105 dB 0 2 V range and 0 to 0 2 V 105 dB 0 1 V range and 0 to 0 1 V 105 dB Small signal bandwidth all ranges 255 kHz Input coupling DC Input impedance 100 GOhm in normal operation 820 Ohm typ in powered off or overload condition Input bias current 200 pA Input offset current 100 pA Absolute maximum input voltage 25 V power on 15 V power off Protected Inputs CH lt 15 0 gt IN AISENSE Crosstalk Adjacent Channels 75 dB All other Channels 90 dB Noise performance Table 8 summarizes the noise performance for the PCI DAS6030 and PCI DAS6032 Noise distribution is determi
16. with the relevant provisions of the following standards or other documents EU EMC Directive 89 336 EEC Electromagnetic Compatibility EN 61326 1997 Amendment 1 1998 Emissions Group 1 Class A EN 55011 1990 CISPR 11 Radiated and Conducted emissions Immunity EN61326 Annex A IEC 1000 4 2 1995 Electrostatic Discharge immunity Criteria A IEC 1000 4 3 1995 Radiated Electromagnetic Field immunity Criteria B IEC 1000 4 4 1995 Electric Fast Transient Burst immunity Criteria A IEC 1000 4 5 1995 Surge immunity Criteria A IEC 1000 4 6 1996 Radio Frequency Common Mode immunity Criteria A IEC 1000 4 11 1994 Voltage Dip and Interrupt immunity Criteria A Tests to IEC 1000 4 8 were not required The PCI boards do not contain components that would be susceptible to magnetic fields Declaration of Conformity based on tests conducted by Chomerics Test Services Woburn MA 01801 USA in June 2004 Test records are outlined in Chomerics Test Report EMI3889 04 We hereby declare that the equipment specified conforms to the above Directives and Standards 2 Moet Carl Haapaoja Director of Quality Assurance Measurement Computing Corporation 10 Commerce Way Suite 1008 Norton Massachusetts 02766 508 946 5100 Fax 508 946 9500 E mail info mccdag com www mccdag com
17. 4 16 PCI DAS6030 amp PCI DAS6032 User s Guide Functional Details CTR2 CLK signal The CTR2 CLK signal can serve as the clock source for independent user counter 2 It can be selected through software at the CTR2 CLK pin rather than using the on board 10 MHz or 100 kHz sources It is also polarity programmable The maximum input frequency is 10 MHz There is no minimum frequency specified Figure 4 32 shows the timing requirements for the CTR2 CLK signal tp 100 ns minimum M I I I tw H 15 ns minimum tw 25 ns minimum Figure 4 32 CTR2 CLK signal timing CTR2 GATE signal You can use the CTR2 GATE signal for starting and stopping the counter saving counter contents etc It is polarity programmable and is available at the CTR2 GATE pin Figure 4 33 shows the timing requirements for the CTR2 GATE signal Rising Edge Polarity f G Falling Edge Polarity es fee wH l tw 25 ns minimum Figure 4 33 CTR2 GATE signal timing 4 17 PCI DAS6030 amp PCI DAS6032 User s Guide Functional Details CTR2 OUT signal This signal is present on the CTR2 OUT pin The CTR2 OUT signal is the output of one of the two user s counters in an industry standard 82C54 chip For detailed information on counter operations please refer to the data sheet on our web site at http www measurementcomputing com PDFmanuals 82C54 pdf Figure 4 34 shows the timing of the CTR1 OUT signal for mode 0 and for mode
18. 5 A D START TRIGGER output signal timing The A D START TRIGGER signal is also used to initiate pre triggered DAQ operations when you need to acquire data just before a trigger event In most pre triggered applications the A D START TRIGGER signal is generated by a software trigger The use of A D START TRIGGER and A D STOP TRIGGER in pre triggered DAQ applications is explained next A D STOP TRIGGER signal Pre triggered data acquisition continually acquires data into a circular buffer until a specified number of samples have been collected after the trigger event Figure 4 6 illustrates a typical pre triggered DAQ sequence ten Start Scan p E y a p S p A p gg A p Scan Counter 3 2 1 10 i3 i2 1 0 3 2 1 AID Start Trigger a i 2 I I 1 I t 5 Don t care 1 AID Stop Trigger ON i I 1 i i 1 Figure 4 6 Pre triggered data acquisition example The A D STOP TRIGGER signal signifies when the circular buffer should stop and when the specified number of post trigger samples should be acquired It is available as an output and an input By default it is available at AUXINZ2 as an input but may be programmed for access at any of the AUXIN pins or the DAQ Sync DS A D STOP TRIGGER input It may be programmed for access at any of the AUXOUT pins as an output When using the A D STOP TRIGGER signal as an input the polarity may be configured for either rising or falling edge The selected edge of the A D STOP TRIGGER si
19. 96 AUXIN2 A D STOP TRIGGER CTR1 OUT 95 AUXIN1 A D START TRIGGER CTR1 GATE 94 n c CTR1 CLK 93 AUXINO A D CONVERT ATRIG DIO7 92 AUXOUT2 SCANCLK DIO6 91 AUXOUT1 A D PACER OUT DIO5 90 AUXOUTO D A PACER OUT DIO4 89 PC 5 V DIO3 88 D A OUT1 DIO2 87 D A GND DIO1 86 D A OUT 0 DIOO 85 AISENSE n c 84 nic n c 83 nic n c 82 n c n c 81 n c n c 80 n c n c 79 n c n c 78 n c n c 77 n c n c 76 n c n c 75 n c n c 74 n c n c 73 n c n c 72 n c n c 71 n c n c 70 n c n c 69 n c n c 68 LLGND n c 67 CH15 IN n c 66 CH7 IN n c 65 CH14 IN n c 64 CH6 IN n c 63 CH13 IN n c 62 CH5 IN n c 61 CH12 IN n c 60 CH4 IN n c 59 CH11 IN n c 58 CH3 IN n c 57 CH10 IN n c 56 CH2 IN n c 55 CH9 IN n c 54 CH1 IN n c 53 CH8 IN n c 52 CHO IN n c 51 LLGND N the PCI DA 2 C on the PC S603 PCI slot 2 6 PCI DAS6030 amp PCI DAS6032 User s Guide Installing the PCI DAS6030 and PCI DAS6032 Strain relief is stamped Pins 1 50 49_ 50 Pins 1 50 are on the long side of the D connector The red stripe identifies pin 1 99 100 L Pins 51 100 are on the short side of Strain relief is Be Pe Canneetr Stamped Pins 51 100 g The red stripe identifies pin 51 Figure 2 1 C100HD50 x cable Details on the C100HD50 x cable are available on our web site at www mccdaq com cbicatalog cbiproduct asp dept_id 104 amp pf id 1203 a g D A e d o sa D a
20. Figure 2 2 C100 MMS x cable Details on the C1IOOMMS x cable are available on our web site at www mcecdaq com cbicatalog cbiproduct asp dept_id l04 amp pf_id 1514 PCI DAS6030 amp PCI DAS6032 User s Guide Installing the PCI DAS6030 and PCI DAS6032 DAQ Sync connector and pin out Table 2 4 DAQ Sync connector amp cable types Connector type 14 pin right angle 100 mil box header Compatible cables MCC p n CDS 14 x 14 pin ribbon cable for board to board DAQ Sync connection x number of boards Figure 2 3 Table 2 5 DAQ Sync connector pin out view from top Signal Name Pin l Pin Signal Name DS A D START TRIGGER 1 2 GND DS A D STOP TRIGGER 3 4 GND DS A D CONVERT 5 6 GND DS D A UPDATE 7 8 GND _DS D A START TRIGGER 9 10__ GND RESERVED 11 12 GND SYNC CLK 13 14 GND The red stripe identifies pin 1 14 pin Ribbon Cable J Figure 2 3 CDS 14 3 cable Details on the CDS 14 x cable are available on our web site at www mccdaq com cbicatalog cbiproduct asp dept_id 104 amp pf id 1528 Field wiring signal termination and conditioning You can use the following BNC and screw terminal boards to terminate field signals and route them into the PCI DAS6030 and PCI DA S6032 using the C100HD50 x cable BNC 16SE Brings analog signals to standard BNC connectors Designed for boards operating in single ended mode Details on this product are available on our web site at
21. N 56 nic 7 CH10 IN 57 nic 8 CH3 IN 58 nic 9 CH11 IN 59 nic 10 CH4 IN 60 nic 11 CH12 IN 61 nic 12 CH5 IN 62 nic 13 CH13 IN 63 nic 14 CH6 IN 64 nic 15 CH14 IN 65 nic 16 CH7 IN 66 nic 17 CH15 IN 67 nic 18 LLGND 68 nic 19 n c 69 nic 20 n c 70 nic 21 n c 71 n c 22 n c 72 n c 23 n c 73 n c 24 n c 74 nic 25 n c 75 n c 26 n c 76 n c 27 n c 77 nic 28 n c 78 nic 29 n c 79 nic 30 n c 80 n c 31 n c 81 nic 32 n c 82 nic 33 n c 83 nic 34 n c 84 nic 35 AISENSE 85 DIOO 36 D A OUT 0 86 DIO1 37 D A GND 87 DIO2 38 D A OUT1 88 DIO3 39 PC 5V 89 DIO4 40 AUXOUTO D A PACER OUT 90 DIO5 41 AUXOUT1 A D PACER OUT 91 DIO6 42 AUXOUT2 SCANCLK 92 DIO7 43 AUXINO A D CONVERT ATRIG 93 CTR1 CLK 44 n c 94 CTR1 GATE 45 AUXIN1 A D START TRIGGER 95 CTR1 OUT 46 AUXIN2 A D STOP TRIGGER 96 GND 47 AUXIN3 D A UPDATE 97 CTR2 CLK 48 AUXIN4 D A START TRIGGER 98 CTR2 GATE 49 AUXIN5 A D PACER GATE 99 CTR2 OUT 50 GND 100 GND N C on PCI DAS6032 6 13 CE Declaration of Conformity Manufacturer Measurement Computing Corporation Address 10 Commerce Way Suite 1008 Norton MA 02766 USA Category Electrical equipment for measurement control and laboratory use Measurement Computing Corporation declares under sole responsibility that the product PCI DAS6030 to which this declaration relates is in conformity with the relevant provisions of the following standards or other documents
22. NE Interrupt is generated when a DAQ sequence completes DAQ FIFO 1 4 FULL Interrupt is generated when ADC FIFO is full DAQ SINGLE Interrupt is generated after each conversion completes DAQ EOSCAN Interrupt is generated after the last channel is converted in multi channel scans DAQ EOSEQ Interrupt is generated after each interval delay during multi channel scans DAC Interrupt sources DAC_ACTIVE Interrupt is generated when DAC waveform circuitry is active software programmable DAC DONE Interrupt is generated when a DAC sequence completes DAC_FIFO_1 4 EMPTY Interrupt is generated DAC FIFO is 4 empty DAC_HIGH_CHANNEL Interrupt is generated when the DAC high channel output is updated 6 7 PCI DAS6030 amp PCI DAS6032 User s Guide Specifications Counters Table 18 Counter specifications User counter type 82C54 Number of channels 2 Resolution 16 bits Compatibility 5 V TTL CTRn base clock source Internal 10 MHz internal 100 kHz or external connector software selectable CTRn CLK Internal 10 MHz clock source stability 50 ppm Counter n gate Available at connector CTRn GATE Counter n output Available at connector CTRn OUT Clock input frequency 10 MHz max High pulse width clock input 15 ns min Low pulse width clock input 25 ns min Gate width high 25 ns min Gate width low 25 ns min Input low
23. PCI DAS6030 amp PCI DAS6032 Analog and Digital I O Boards User s Guide MEASUREMENT COMPUTING PCI DAS6030 and PCI DAS6032 Analog and Digital I O Boards User s Guide A A MEASUREMENT COMPUTING Document Revision 6 May 2006 Copyright 2006 Measurement Computing Corporation Your new Measurement Computing product comes with a fantastic extra Management committed to your satisfaction Refer to www mccdaq com execteam html for the names titles and contact information of each key executive at Measurement Computing Thank you for choosing a Measurement Computing product and congratulations You own the finest and you can now enjoy the protection of the most comprehensive warranties and unmatched phone tech support It s the embodiment of our two missions To offer the highest quality computer based data acquisition control and GPIB hardware and software available at the best possible price To offer our customers superior post sale support FREE Whether providing unrivaled telephone technical and sales support on our latest product offerings or continuing that same first rate support on older products and operating systems we re committed to you Lifetime warranty Every hardware product manufactured by Measurement Computing Corporation is warranted against defects in materials or workmanship for the life of the product Products found defective are repaired or replaced promptly L
24. SB 1V 13 83 LSB 500 mV 14 09 LSB 200 mV 16 71 LSB 100 mV 19 99 LSB 0to 10 V 6 40 LSB 0to5V 26 11 LSB 0to2V 26 28 LSB Otol V 26 54 LSB 0 to 500 mV 27 13 LSB 0 to 200 mV 32 11 LSB 0 to 100 mV 38 70 LSB Table 3 Absolute accuracy components all values are Range of Offset HV Noise Quantization V Temp Drift Absolute Reading Single Pt Averaged C Accuracy at FS mV 10 V 0 0061 479 2 634 1 54 9 0 0001 1 147 5 V 0 0361 243 6 317 1 27 5 0 0006 2 077 2 V 0 0361 102 2 126 8 11 0 0 0006 0 836 1 V 0 0361 55 1 63 4 59 0 0006 0 422 500 mV 0 0361 31 6 36 8 3 2 0 0006 0 215 200 mV 0 0411 17 4 22 5 2 0 0 0006 0 102 100 mV 0 0461 12 7 19 6 1 8 0 0006 0 061 0 to 10 V 0 0061 326 6 417 8 36 6 0 0001 0 976 0to5V 0 0361 167 3 208 9 18 3 0 0006 1 992 0to2 V 0 0361 71 7 83 6 73 0 0006 0 802 Otol V 0 0361 39 9 41 8 3 7 0 0006 0 405 0to500mV_ 0 0361 23 9 28 1 25 0 0006 0 207 0to200mV 0 0411 14 4 19 6 1 8 0 0006 0 098 0tol00mV 0 0461 11 2 18 1 1 7 0 0006 0 059 1 Averaged measurements assume averaging of 100 single channel readings Each PCI DAS6030 and PCI DAS6032 is tested at the factory to assure the board s overall error does not exceed accuracy limits described in Table 2 6 2 PCI DAS6030 amp PCI DAS6032 User s Guide Specifications Table 4 Relative accuracy all values are Range Relative Accuracy uV Single Poi
25. TR1 OUT 95 AUXIN1 A D START TRIGGER Table 2 2 CTR1 GATE 94 nic as CTR1 CLK 93 AUXINO A D CONVERT ATRIG 8 channel differential mode DIO7 92 AUXOUT2 SCANCLK DIO6 91 AUXOUT1 A D PACER OUT DIO5 90 AUXOUTO D A PACER OUT DIO4 89 PC 5 V DIO3 88 D A OUT1 DIO2 87 D A GND DIO1 86 D A OUT 0 DIOO 85 AISENSE n c 84 n c n c 83 n c n c 82 n c n c 81 n c n c 80 n c n c 79 n c n c 78 n c n c 77 n c n c 76 n c n c 75 n c n c 74 n c n c 73 n c n c 72 n c n c 71 n c n c 70 n c n c 69 n c n c 68 LLGND n c 67 CH7 IN LO n c 66 CH7 IN HI n c 65 CH6 IN LO n c 64 CH6 IN HI n c 63 CH5 IN LO n c 62 CH5 IN HI n c 61 CH4 IN LO n c 60 CH4 IN HI n c 59 CH3 IN LO n c 58 CH3 IN HI n c 57 CH2 IN LO n c 56 CH2 IN HI n c 55 CH1 IN LO n c 54 CH1 IN HI n c 53 CHO IN LO nic 52 CHO IN HI n c 51 LLGND N C on the PCI DAS6032 PCI slot 2 5 PCI DAS6030 amp PCI DAS6032 User s Guide Installing the PCI DAS6030 and PCI DAS6032 Table 2 3 Signal Name in Signal Name i GND 16 channel single ended CTR2OUT 99 AUXIN5 A D PACER GATE mode CTR2 GATE 98 AUXIN4 D A START TRIGGER CTR2 CLK 97 AUXIN3 D A UPDATE GND
26. V 4 7 LSB 0to 10 V 7 9 LSB Table 11 Absolute accuracy components all values are Range of Reading Offset Temp Drift Absolute Accuracy at FS mV HV C 10 V 0 0062 813 0 0001 1 430 0tol0V 0 0062 584 0 0001 1 201 Each PCI DAS6030 is tested at the factory to assure that the board s overall error does not exceed the values specified in Table 10 Table 12 Relative accuracy specifications Range Relative Accuracy All ranges 0 5 LSB typical 1 0 LSB max Relative accuracy is defined as the measured deviation from a straight line drawn between measured endpoints of the transfer function 6 5 PCI DAS6030 amp PCI DAS6032 User s Guide Analog output pacing and triggering Table 13 Analog output pacing and triggering specifications DAC pacing software programmable Internal counter ASIC Selectable time base Internal 40 MHz 50 ppm stability External Source via AUXIN lt 5 0 gt SW selectable External convert strobe D A UPDATE Software paced DAC gate sources software programmable External digital D A START TRIGGER External analog ATRIG input CHO IN through CH15 IN Software gated DAC gating modes External digital Programmable active high or active low level or edge External analog Refer to Analog Trigger below DAC trigger sources External digital D A START TRIGGER Extern
27. acquisitions may be started and controlled via an analog signal There are four trigger gate modes available using the analog trigger feature Trigger positive or negative slope Gate above reference or below reference Hysteresis positive or negative hysteresis Window inside or outside window The Trigger mode is used to start an acquisition sequence The remaining modes provide gating functions during an acquisition sequence which start and stop the acquisition based on the gate condition There are two possible inputs for the analog trigger source see Figure 4 15 The first is the AUXINO ATRIG pin on the 100 pin I O connector This is a software selectable dual purpose pin that supports either digital or analog trigger inputs The source selection defaults to analog trigger on power up and may be modified at any time using nstaCal The input range on the ATRIG pin is always 10V 12 bit DACs are used to set the HI and LO levels for the threshold s The threshold resolution in this mode is 4 88mV per step Caution Remove all analog inputs before configuring this pin as a digital input Any voltage levels above 15V in this configuration may cause damage to the product The second possible analog trigger source is the post gain version of any one of the 16 analog inputs In this mode the voltage present on the first channel in the scan may be used to initiate the acquisition sequence Since the input to the a
28. al analog ATRIG input CHO IN through CH15 IN Software triggered DAC triggering modes External digital Software configurable for rising or falling edge External analog Software configurable for Positive or Negative slope DAC pacer out Available at user connector D A PACER OUT RAM buffer size 16 K samples Data transfer DMA Programmed I O Update DACs individually or simultaneously software selectable DMA modes Demand or non demand using scatter gather Waveform generation throughput 100 kS s max per channel 2 channels simultaneous Analog trigger Table 14 Analog trigger specifications Analog trigger sources software selectable External ATRIG input CHO IN through CH15 IN first channel in scan Analog trigger levels ATRIG input 10 V CHO IN through CH15 IN Full scale range dependent Analog trigger modes External analog Software configurable for Positive or negative slope Analog gate modes External analog software configurable for Above or below reference Positive or negative hysteresis In or out of window Resolution 12 bits 1 in 4096 Accuracy 1 full scale range max Bandwidth 3 dB ATRIG input 4 MHz 255 kHz CHO IN through CH15 IN 6 6 Specifications PCI DAS6030 amp PCI DAS6032 User s Guide Specifications Analog input output calibration Table 15 Analog I O calibrati
29. ations programs Many packaged application programs such as SoftWIRE Labtech Notebook and HP VEE now have drivers for your board If the package you own does not have drivers for the board please fax or e mail the package name and the revision number from the install disks We will research the package for you and advise how to obtain drivers Some application drivers are included with the Universal Library package but not with the application package If you have purchased an application package directly from the software vendor you may need to purchase our Universal Library and drivers Please contact us by phone fax or e mail Phone 508 946 5100 and follow the instructions for reaching Tech Support Fax 508 946 9500 to the attention of Tech Support Email techsupport mccdaq com Register level programming You should use the Universal Library or one of the packaged application programs mentioned above to control your board Only experienced programmers should try register level programming If you need to program at the register level in your application you can find more information in the STC Register Map for the PCI DAS6000 Series available at www mccdaq com registermaps RegMapSTC6000 pdf An exception to this is the DAQ Sync capability of these boards that permit synchronized data acquisition by multiple boards in this series 3 1 Chapter 4 Functional Details Basic architecture Figure
30. bs cise ih cn E E e ie E e 6 7 Digitalanput outputs ssc E E E E E 6 7 Tinterrupt Section ese eke EE tots Me E Neal E E E E A 6 7 Counters Configurable AUXIN lt 5 0 gt AUXOUT lt 2 0 gt external trigger clocks DAQ Sync inter board triggers clocks ccccecsseessessceeseesecesecesecsecsaecssecseceaeceaecaeecaeeeaeeeaeeeaeeeeesereeseeeeeenteeas Power Consumption in a E E E O E E oases ce Environitiental seina a a a A E E a NOO EN EEE Sn et Mechanical sosote a a aera cea e E a E N aie aiet DAQ Sync connector and pin out Main connector and pin oUt spssnesceronon nieni EEEE E a EE a EE E a Preface About this User s Guide What you will learn from this user s guide This user s guide explains how to install configure and use the PCI DAS6030 and PCI DAS6032 so that you get the most out of the analog digital and timing I O features This user s guide also refers you to related documents available on our web site and to technical support resources that can also help you get the most out of these boards Conventions in this user s guide For more information on Text presented in a box signifies additional information and helpful hints related to the subject matter you are reading Caution Shaded caution statements present information to help you avoid injuring yourself and others damaging your hardware or losing your data lt t gt Angle brackets that enclose numbers separated by a colon signify a ra
31. ctions for reaching Tech Support Fax 508 946 9500 to the attention of Tech Support Email techsupport mccdaq com Installing the software Refer to the Quick Start Guide for instructions on installing the software on the Measurement Computing Data Acquisition Software CD This booklet is available in PDF at www mccdag com PDFmanuals DA Q Software Quick Start pdf Installing the hardware The PCI DAS6030 and PCI DAS6032 boards are completely plug and play There are no switches or jumpers to set Configuration is controlled by your system s BIOS To install your board follow the steps below Install the MCC DAQ software before you install your board The driver needed to run your board is installed with the MCC DAQ software Therefore you need to install the MCC DAQ software before you install your board Refer to the Quick Start Guide for instructions on installing the software 1 Turn your computer off open it up and insert your board into any available PCI slot 2 Close your computer and turn it on If you are using an operating system with support for plug and play such as Windows 2000 or Windows XP a dialog box pops up as the system loads indicating that new hardware has been detected If the information file for this board is not already loaded onto your PC you will be prompted for the disk containing this file The MCC DAQ software contains this file If required insert the Measurement Computing Data Acquis
32. cuvicsasedcesd cu s0vude de deuces deduvonsdesdvsed da ceeds sda cavestdestVesdaeseoves CTR1 GATE signal CERT OUT Signals shustett ts aaecieid a E Moiese Bad niet aoe Gee nite tests CTR CLK sighan aai a iA AEE E tock ARE OE A AA E GBA E A A ave CTR2 GATE signal CTR2 OUT S1gtial wcccz esccsccessconcsssescasas cvs en inesistenti ide E AEE sa cubeas dodcnesd ovsd uce NE E SANE oacevicesaduness costneae dndevtes Chapter 5 Calibrating the Boar iin cic cisieticececteecvetcaecccsecnanseetectenedenceescutectens entieseutbotenedstccienc enenegevtbodeevtncdened oees 5 1 TiO MUCH OMe as 2e2 ites eens Beeugee ies haus Teas Sees tc feats ee ee ea eet Sede ea ee ee Alaa thet A neue a Tce ce Calibration theory Chapter 6 Specifications 2452 20 Nida i eich Rann adalah linn aniline 6 1 Analog Input ACCURACY en eni taa bves bia teas E E E A E e REE ETE SEEE O E EOK E eve Settling tue soinura E r A As eaaa oTa a eaa Eer AEA ar N EINE EE NTS 6 3 Parametrics Noise performance Analog output PCI DAS6030 only oo eeeeeecsseesceseeeeesecseesccseeseceaeeeesscsaeeeesaecasesecnessecnaeeeceaecaeeseseeeeaeeatneeas 6 5 Analog output pacing and triggering see ceeeecseesecseeseeecseesecsensesecsaeecssesecaesecseesecsessecaesaeeecsaeseesauaecsesaeeecsaeeesnavaeeateas 6 6 Analog tri SQ er esiesccclces ed flee ee cea fess bak even n a dak vie che Seven deg vents a ds eee ceases 6 6 Analog input output calibration icare iseiti een ca
33. ecceeeceeeeeeeeeeeeeeeeeeeeeeeeseeeeeeeeeseneeeeneeeeeeeeeees 2 1 What comes with your PCI DAS6030 and PCI DAS6032 shipment ccccsceesseesseeseeeeeeeeceeeeeteeneenseenaes 2 1 Hardware 2 lessic ss cecses tases eE ees ot nas ede cana tedes hea vesessases hh oye E AETS Additional documentation is Optional components inann e aae EETA Sedna E EN A ae OA ee Unpacking the PCI DAS6030 and PCI DAS6032 Installing the software Tnistalline the hardware a a na done oce net eeiad aut a Ea ek Gtad tae bess tein ste Configuring the hardware vc sc02 tek icecie dies Bevitihiee ea hee eats Galetitele end a aa a dail dard waded Bebe Differential input mode eee Single ended input mode Non referenced single ended input mode DAQ Syne configuration eceeeeereees Connecting the board for I O operations Connectors cables main I O connector Pinout main I O connector eee DAQ Synce connector and pin OUt ee eeeeeeteereeee Field wiring signal termination and conditioning Chapter 3 Programming and Developing Applications ccccesseneeeseeeeeeeeneeeeeeseeeeseeeseenseeeseaeseseseaneeeeseanes 3 1 Propsramiming languages n a e E E evan T seer ov ee esd eee ecco ee Ee Packaged applications programs Register level programmini sc525 soe occ oes tescc casted di oe O E ates daaee as es Besa O E aoe ose Ma aes Chapter 4 Functional Details A seccc Fe vase hea cece ca cccis ve c
34. ecetue ck cece a dewssnaceussiteccuainecadasceccaseacecobassietecaseoees Basic architecture Auxiliary input amp output interface DAQ Sync signals 5 seein an a adden eden an eu died dadiuen seu aE BOATOS E SaO DAQ signal tat ien eaaa a a tach duedaenZe ais sot ews doutee ceevsnl dads nagente E SCANCEK Siti st EAE E R AEE ARE EAA EE E E A EA AD STAREGTRIGGER 81810 alo osc cress scence eaa E AE A AREAS EE EERE AEA Aa A AAAA A D STOP TRIGGER signal STARTSCAN signal SSH signal cece A D CONVERT signal A D PACER GATE signal cece A D EXTERNAL TIME BASE signal A D STOP signal 0 ce ceeeeeceeeeereeeeeees sees ATRIG signale nrar oe e cocteliawebbastzs ssydlidaadeded Subd dabelMevtadalesddeet li cbt ld sdhesh raa aE ENS iv PCI DAS6030 amp PCI DAS6032 User s Guide Waveform generation timing Signals ccccesceessesseessceesceecesecesecaecssecsecsaecaaecaeecaeeeseeeneeeaeeeeesereeseeeneeeeeees 4 13 D A START TRIGGER signal D A CONVERT sigtial einans ogiari int n AEE RE a An Ea e E E EA EAE AE AERAR Ea RaRa EGE D A EXTERNAL TIME BASE signal 0 ccsccscsscssccesscesseecescesseceseescsscessecesssscescessecessencesceacensecsssencescesssceseesceseesesenes 4 15 General purpose counter signal timimg cccccceesseesceesceesceeecesecseceeceseceseceaecsaecseecaeeeseeeaeseeeseeeseeeeeenteeereees 4 15 CTR CLE signal vecicesccsccssscavcssseschsed cescescoucd decuuces desshbed oe hvess n
35. gnal initiates the post triggered phase of a pre triggered acquisition sequence As an output the A D STOP TRIGGER signal indicates the event separating the pre trigger data from the post trigger data The output is an active high pulse with a pulse width of 50 ns Figure 4 7 and Figure 4 8 show the input and output timing requirements for the A D STOP TRIGGER signal 4 5 PCI DAS6030 amp PCI DAS6032 User s Guide Functional Details Rising Edge Polarity es rs O Falling Edge Polarity a a po w l lgs 37 5 ns minimum Figure 4 7 A D STOP TRIGGER input signal timing tw 50 ns Figure 4 8 A D STOP TRIGGER output signal timing STARTSCAN signal The STARTSCAN output signal indicates when a scan of channels has been initiated You can program this signal to be available at any of the AUXOUT pins The STARTSCAN output signal is a 50 ns wide pulse the leading edge of which indicates the start of a channel scan Figure 4 9 shows the timing for the STARTSCAN signal tw 50 ns Figure 4 9 STARTSCAN start of scan timing SSH signal The SSH signal can be used as a control signal for external sample hold circuits The SSH signal is a programmable polarity pulse that is asserted throughout a channel scan The state of this signal changes after the start of the last conversion in the scan The SSH signal may be routed via software selection to any of the AUXOUT pins Figure 4 10 shows the timing for the SSH signal Start P
36. hen tying all of the low inputs together and using that node as the reference input When configured for non referenced single ended input mode 16 analog input channels are available In this mode each input signal is not referenced to the board s ground but to a common reference signal AISENSE The input signal is delivered through three wires The wire carrying the signal to measure connects to CH IN HI The wire carrying the reference signal connects to AISENSE The third wire is connected to LLGND This mode is useful when the application calls for differential input mode but the limitation on channel count prevents it 2 3 PCI DAS6030 amp PCI DAS6032 User s Guide Installing the PCI DAS6030 and PCI DAS6032 DAQ Sync configuration You can interconnect multiple boards in the PCI DAS6000 series to synchronize data acquisition or data output To do this order and install a CDS 14 x cable at the DAQ Sync connectors P2 between the boards to be synchronized The x in the CDS 14 x part number specifies the number of connectors available on the cable and therefore the number of boards you can interconnect Using a CDS 14 2 you can connect two PCI DAS6000 series boards together for I O synchronization Using a CDS 14 3 you can synchronize three boards and so on You can connect up to five PCI DAS6000 series boards A CDS 14 3 cable is shown in Figure 2 3 on page 2 8 By default all DAQ Sync connectors are config
37. his hardware user s guide you should also receive the Quick Start Guide available in PDF at www mcecdag com PDFmanuals DAQ Software Quick Start pdf This booklet supplies a brief description of the software you received with your USB 3110 and information regarding installation of that software Please read this booklet completely before installing any software or hardware Optional components If you ordered any of the following products with your board they should be included with your shipment Cables A Q y C100HD50 x C100MMS x CDS 14 x 2 1 PCI DAS6030 amp PCI DAS6032 User s Guide Installing the PCI DAS6030 and PCI DAS6032 Signal termination and conditioning accessories MCC provides signal termination products for use with the PCI DAS6030 and PCI DAS6032 Refer to the Field wiring signal termination and conditioning section on page 2 8 for a complete list of compatible accessory products Unpacking the PCI DAS6030 and PCI DAS6032 As with any electronic device you should take care while handling to avoid damage from static electricity Before removing the PCI DAS6030 and PCI DAS6032 from its packaging ground yourself using a wrist strap or by simply touching the computer chassis or other grounded object to eliminate any stored static charge If any components are missing or damaged notify Measurement Computing Corporation immediately by phone fax or e mail Phone 508 946 5100 and follow the instru
38. hould be no less than 100 us apart When used as an output the D A CONVERT signal may be used to monitor the pacing of the output updates The output has a pulse width of 225 ns with selectable polarity Figure 4 26 and Figure 4 27 show the input and output timing requirements for the D A CONVERT signal tw l I Rising Edge Polarity Falling Edge Polarity eS w l tw 37 5 ns minimum Figure 4 26 D A CONVERT input signal timing f tw I y f l f I I I Figure 4 27 D A CONVERT output signal timing 4 14 PCI DAS6030 amp PCI DAS6032 User s Guide Functional Details D A EXTERNAL TIME BASE signal The D A EXTERNAL TIME BASE signal can serve as the source for the on board DAC pacer circuit rather than using the internal time base Any AUXIN pin can be set programmatically as the source for this signal The polarity is programmable The maximum frequency for the D A EXTERNAL TIME BASE signal is 20 MHz The minimum pulse width is 23 ns high or low There is no minimum frequency specification Figure 4 28 shows the timing requirements for the D A EXTERNAL TIME BASE signal tp 50 ns minimum ty 23 ns minimum Figure 4 28 D A EXTERNAL TIME BASE signal timing General purpose counter signal timing The general purpose counter signals are CTRI CLK CTRI GATE CTR1 OUT CTR2 CLK CTR2 GATE CTR2 OUT CTR1 CLK signal The CTR1 CLK signal can serve as the clock source for independent user
39. hronizing clock provided on a 14 pin header The DAQ Sync signals use dedicated pins Only the direction can be set Refer to Chapter 2 Installing the Board and Chapter 6 Specifications for more information on these signals Interrupts can be generated by up to seven ADC sources and four DAC sources Interrupt sources are listed in Chapter 6 Specifications The PCI DAS6030 and PCI DAS6032 boards contain an 82C54 counter chip which consists of three 16 bit counters Clock gate and output signals from two of the three counters are available on the 100 pin I O connector The third counter is used internally Software features For information on the features of JnstaCal and the other software included with your PCI DA S6040 refer to the Quick Start Guide that shipped with your device The Quick Start Guide is also available in PDF at www mcecdag com PDFmanuals DAQ Software Quick Start pdf Check www mccdag com download htm for the latest software version or versions of the software supported under less commonly used operating systems Chapter 2 Installing the PCI DAS6030 and PCI DAS6032 What comes with your PCI DAS6030 and PCI DAS6032 shipment The following items are shipped with the PCI DAS6030 and PCI DAS6032 Hardware The following items should be included with your shipment PCI DAS6030 board or PCI DAS6032 board iE i PCI DAS6030 PCI DAS6032 Additional documentation In addition to t
40. ife support systems and or devices without prior written consent from Measurement Computing Corporation Life support devices systems are devices or systems which a are intended for surgical implantation into the body or b support or sustain life and whose failure to perform can be reasonably expected to result in injury Measurement Computing Corporation products are not designed with the components required and are not subject to the testing required to ensure a level of reliability suitable for the treatment and diagnosis of people iii Table of Contents Preface About this User s Guide waicnc nein an annie wai nn A ee a es vi What you will learn from this user s guide 000 0 eeceecceecceseceseceeeseceseceaecaeecseecaeeeseeecseeeseenseeeseceaeeaecsecaeeaeeenes vi Goniventions 1 this users guides seeks ide neath en pied OA a ee Res a eed ea ale ah teas vi Where to find more information cccccccccssscsssceescecsecsseceececseecssecseeesececssecsseceseeecssecssecsecessecssseeseeeeseecssecsseeeeeeeesaeeseeees vi Chapter 1 Introducing the PCI DAS6030 and PCI DAS6032 2 ccccceseesseeeeeeeeeeeeeeeeeeaeeeeeeeeeseesseeeeeeeeeeneees 1 1 Overview PCI DAS6030 and PCI DAS6032 features cccccccccessseceseceesseceseceesseceseceesseceseeeeseceeeeecsseeesees 1 1 Software TeatikeSuen nn enan eee aa A clrccge ace a Cosa Ra Fe oere a Raa a SE EEE 1 1 Chapter 2 Installing the PCI DAS6030 and PCI DAS6032 c s
41. ifetime Harsh Environment Warranty We will replace any product manufactured by Measurement Computing Corporation that is damaged even due to misuse for only 50 of the current list price I O boards face some tough operating conditions some more severe than the boards are designed to withstand When a board becomes damaged just return the unit with an order for its replacement at only 50 of the current list price We don t need to profit from your misfortune By the way we honor this warranty for any manufacturer s board that we have a replacement for 30 Day Money Back Guarantee You may return any Measurement Computing Corporation product within 30 days of purchase for a full refund of the price paid for the product being returned If you are not satisfied or chose the wrong product by mistake you do not have to keep it Please call for an RMA number first No credits or returns accepted without a copy of the original invoice Some software products are subject to a repackaging fee These warranties are in lieu of all other warranties expressed or implied including any implied warranty of merchantability or fitness for a particular application The remedies provided herein are the buyer s sole and exclusive remedies Neither Measurement Computing Corporation nor its employees shall be liable for any direct or indirect special incidental or consequential damage arising from the use of its products even if Measurement Computing Corporat
42. ifferential input mode When all channels are configured for differential input mode eight analog input channels are available In this mode the input signal is measured with respect to the low input The input signal is delivered through three wires The wire carrying the signal to be measured connects to CH IN HI The wire carrying the reference signal connects to CH IN LO The third wire is connected to LLGND Differential input mode is the preferred configuration for applications in noisy environments or when the signal source is referenced to a potential other than PC ground Single ended input mode When all channels are configured for single ended input mode 16 analog input channels are available In this mode the input signal is referenced to the board s signal ground LLGND The input signal is delivered through two wires The wire carrying the signal to be measured connects to CH IN HI The other wire is connected to LLGND Non referenced single ended input mode This mode is a compromise between differential and single ended modes It offers some of the advantages of each mode Using non referenced single ended mode you can still get noise rejection but not the limitation in the number of channels resulting from a fully differential configuration The possible downside is that the external reference input must be the same for every channel It is equivalent to configuring the inputs for differential mode and t
43. ion has been notified in advance of the possibility of such damages HM PCI DAS6030_32 doc ii Trademark and Copyright Information TracerDAQ Universal Library nstaCal Harsh Environment Warranty Measurement Computing Corporation and the Measurement Computing logo are either trademarks or registered trademarks of Measurement Computing Corporation Windows Microsoft and Visual Studio are either trademarks or registered trademarks of Microsoft Corporation LabVIEW is a trademark of National Instruments CompactFlash is a registered trademark of SanDisk Corporation All other trademarks are the property of their respective owners Information furnished by Measurement Computing Corporation is believed to be accurate and reliable However no responsibility is assumed by Measurement Computing Corporation neither for its use nor for any infringements of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent or copyrights of Measurement Computing Corporation All rights reserved No part of this publication may be reproduced stored in a retrieval system or transmitted in any form by any means electronic mechanical by photocopying recording or otherwise without the prior written permission of Measurement Computing Corporation Notice Measurement Computing Corporation does not authorize any Measurement Computing Corporation product for use in l
44. ition Software CD and click OK 3 To test your installation and configure your board run the nstaCal utility installed in the previous section Refer to the Quick Start Guide that came with your board for information on how to initially set up and load InstaCal Allow your computer to warm up for at least 15 minutes before acquiring data with these boards board The high speed components used on these boards generate heat and it takes this amount of time for a board to reach steady state if it has been powered off for a significant amount of time 2 2 PCI DAS6030 amp PCI DAS6032 User s Guide Installing the PCI DAS6030 and PCI DAS6032 Configuring the hardware All hardware configuration options on the PCI DAS6030 and PCI DAS6032 are software controlled You can select some of the configuration options using nstaCal such as the analog input configuration 16 single ended or eight differential channels the edge used for triggering when using an external pacer and the source for the two independent counters Once selected any program that uses the Universal Library will initialize the hardware according to these selections Following is an overview of the available hardware configuration options for these boards There is additional general information regarding analog signal connection and configuration in the Guide to Signal Connections available on our web site at http Awww measurementcomputing com signals signals pdf D
45. nai 1 Figure 4 17 Trigger Negative Slope Gate Above Data acquisition is enabled whenever ATRIG goes above the THRESH_HI level Acquisition is suspended whenever the ATRIG signal goes below the THRESH_HI level This is a level sensitive gating mode 2 pd 1 cs _Thresh_HI Trigger Result Figure 4 18 Gate Above 4 10 PCI DAS6030 amp PCI DAS6032 User s Guide Functional Details Gate Below Data acquisition is enabled whenever ATRIG goes below the THRESH_LO level Acquisition is suspended whenever the ATRIG signal goes above the THRESH_LO level This is a level sensitive gating mode 2 14 Thresh_LO Trigger M Acquired Data a ati MNIE EAREN PAARO EIE IAA S AIIE AEAEE AEL AE NIIE PAIE ONITE TRAE ER E no Figure 4 19 Gate Below Gate Negative Hysteresis Data acquisition is enabled whenever ATRIG goes above the THRESH_HI level Acquisition is suspended whenever the ATRIG signal goes below the THRESH_LO level The hysteresis level is set by THRESH_LO This is a level sensitive gating mode 2 1 _Thresh_HI 0 1 Thresh_LO 2 Acquired Data 2 HA es Figure 4 20 Gate Negative Hysteresis PCI DAS6030 amp PCI DAS603 2 User s Guide Functional Details Gate Positive Hyste resis Data acquisition is enabled whenever ATRIG goes below the THRESH_LO level
46. nalog trigger circuit has been scaled by the selected range the effective resolution of the thresholds is equal to the A D s full scale range 2 5V divided by 4096 For example the 2 5V range allows for 5V 4096 or 1 2 mV of threshold resolution 4 8 PCI DAS6030 amp PCI DAS6032 User s Guide Functional Details a a O 5 Channel x GIA Ww z Z 8 7 12 BIT S a 3 ATRIG Q 2 Only applies to the first channel in the scan Figure 4 15 ATRIG Circuit The next section includes a detailed description of each mode of operation In each case a 2V triangle waveform is used as the ATRIG input source The THRESH_ HI is set to 1 0V and the THRESH _LO signal is set to 1 0V In the following analog trigger signal diagrams the bold portion of the waveform indicates the data acquired for the given ATRIG mode Trigger Above The acquisition will begin when the ATRIG signal first goes above the THRESH_HI This mode is non retriggerable a Fi csc _ Thresh_Hl Trigger JL Acquired Data 2 41 Figure 4 16 Trigger Positive Slope 4 9 PCI DAS6030 amp PCI DAS6032 User s Guide Functional Details Trigger Below The acquisition will begin when ATRIG signal fist goes below the THRESH_LO level This mode is non retriggerable 2 2 1 Thresh_LO Trigger Acquired Data Fo
47. nctions pdf MCC s Universal Library for LabVIEW User s Guide is available on our web site at www mcecdag com PDFmanuals SM UL LabVIEW pdf PCI DAS6030 amp PCI DAS6032 User s Guide this document is also available on our web site at www mcecdag com PDFmanuals PCI DAS6030 32 pdf vi Chapter 1 Introducing the PCI DAS6030 and PCI DAS6032 Overview PCI DAS6030 and PCI DAS6032 features This manual explains how to install and use the PCI DAS6030 and PCI DAS6032 boards The PCI DAS6030 and PCI DAS6032 boards provide either eight differential or 16 single ended analog inputs with 16 bit resolution Input ranges are either Bipolar or Unipolar Bipolar input ranges are 10V 5V 2 0V 1V 0 5V 0 2V and 0 1V Unipolar input ranges are 0 to 10V 0 to 5V 0 to 2V 0 to 1V 0 to 0 5V 0 to 0 2V and 0 to 0 1V The input ranges are software selectable The PCI DAS6030 and PCI DAS6032 have eight lines of digital I O The PCI DAS6030 also provides two digital to analog outputs Each board has nine user configurable trigger clock gate pins that are available at a 100 pin I O connector Six pins are configurable as inputs and three are configurable as outputs Refer to Chapter 4 Functional Details and Chapter 6 Specifications for more information The PCI DAS6030 and PCI DAS6032 provide triggering and synchronization capability There are five trigger strobes and a sync
48. nector specifications Connector type 14 pin right angle 100mil box header Compatible cables MCC p n CDS 14 x 14 pin ribbon cable x number of boards 2 5 6 10 PCI DAS6030 amp PCI DAS6032 User s Guide Specifications Table 25 DAQ Sync connector pin out Pin Signal Name DS A D START TRIGGER GND DS A D STOP TRIGGER GND DS A D CONVERT GND DS D A UPDATE GND CO N gt 1 A Go Po gt DS D A START TRIGGER GND RESERVED GND SYNC CLK GND Main connector and pin out Table 26 Main connector specifications Connector type Shielded SCSI 100 D type Compatible cables C100HD50 x unshielded ribbon cable x 3 or 6 feet C100MMS x shielded round cable x 1 2 or 3 meters Compatible accessory products with C100HDS50 x cable ISO RACK 16 P ISO DA02 P BNC 16SE BNC 16DI CIO MINI50 CIO TERM100 SCB 50 Compatible accessory products with C1OOMMS x cable SCB 100 PCI DAS6030 amp PCI DAS6032 User s Guide Specifications Table 27 8 channel differential mode pin out Pin Signal Name Pin Signal Name 1 LLGND 51 nic 2 CHO IN HI 52 nic 3 CHO IN LO 53 nic 4 CH1 IN HI 54 nic 5 CH1 IN
49. ned by gathering 50 K samples with inputs tied to ground at the user connector Samples are gathered 100 kS s sampling rate The specification applies to both single ended and differential modes of operation Table 8 Analog input noise performance specifications Range LSBrms Typical counts 10 V 0 6 8 5 V 0 6 8 2 V 0 6 8 41 V 0 6 8 500 mV 0 7 8 200 mV 1 1 11 100 mV 2 0 17 0to 10 V 0 8 0to5 V 0 8 0to2V 0 8 Otol V 0 8 0 to 500 mV 1 1 11 0 to 200 mV 2 0 17 0 to 100 mV 3 8 25 6 4 PCI DAS6030 amp PCI DAS6032 User s Guide Specifications Analog output PCI DAS6030 only Table 9 PCI DAS6030 analog output specifications D A converter type Double buffered multiplying Resolution 16 bits 1 in 65536 Number of channels 2 voltage output Voltage range 10 V 0 to 10 V software selectable Monotonicity 16 bits guaranteed Update rate 100 kS s per channel Slew rate 5 V us typ Settling time full scale step 10 us max to 1 LSB Noise 60 pVrms DC to 1 MHz BW Current drive 5 mA Output short circuit duration Indefinite 25 mA Output coupling DC Output impedance 0 1 ohms max Power up and reset DACs cleared to 0 volts 20 mV max Table 10 A nalog output absolute accuracy specifications Range Absolute Accuracy 10
50. nge of numbers such as those assigned to registers bit settings etc bold text Bold text is used for the names of objects on the screen such as buttons text boxes and check boxes For example 1 Insert the disk or CD and click the OK button italic text Italic text is used for the names of manuals and help topic titles and to emphasize a word or phrase For example The JnstaCal installation procedure is explained in the Quick Start Guide Never touch the exposed pins or circuit connections on the board Where to find more information The following electronic documents provide information that can help you get the most out of your PCI DAS6030 and PCI DAS6032 boards The following electronic documents provide helpful information relevant to the operation of the PCI DAS6030 and PCI DAS6032 MCC s Specifications PCI DAS6030 and PCI DAS6032 the PDF version of the Electrical Specification Chapter in this guide is available on our web site at www mccdaq com pdfs PCI DAS6030 32 pdf MCC s Quick Start Guide is available on our web site at www mcecdag com PDFmanuals DAQ Software Quick Start pdf MCC s Guide to Signal Connections is available on our web site at www mcecdag com signals signals pdf MCC s Universal Library User s Guide is available on our web site at www mecdag com PDFmanuals sm ul user guide pdf MCC s Universal Library Function Reference is available on our web site at www mecdag com PDFmanuals sm ul fu
51. nt Averaged 10 V 723 3 72 3 45 V 361 6 36 2 2 V 144 7 14 5 1 V 72 3 7 2 500 mV 42 2 4 2 200 mV 26 5 2 7 100 mV 24 1 2 4 0to10 V 482 2 48 2 0to5V 241 1 24 1 0to2V 96 4 9 6 Otol V 48 2 4 8 0 to 500 mV 33 1 3 3 0 to 200 mV 24 1 2 4 0 to 100 mV 22 9 2 3 1 Averaged measurements assume averaging of 100 single channel readings Relative accuracy is defined as the measured deviation from a straight line drawn between measured endpoints of the transfer function ADC resolution noise and front end non linearity are included in this measurement Table 5 Differential non linearity specifications All ranges 0 5 LSB typ 1 0 LSB max Settling time Settling time is defined as the time required for a channel to settle to within a specified accuracy in response to a full scale FS step Two channels are scanned at the specified rate A FS DC signal is presented to channel 1 a FS DC signal is presented to channel 0 Table 6 Settling time specifications Condition Range 0 00076 0 0015 0 0061 4 0 012 0 5 LSB 1 LSB LSB 8 LSB Same range to same 10 V 40 uS max 20 uS max 10 uS max 5 uS typ range 5 V 40 uS max 20 uS max 10 uS max 5 uS typ 2 V 40 uS max 20 uS max 10 uS max 5 uS typ 1 V 40 uS max 20 uS max 10 uS max 5 uS typ 500 mV 40 uS max 20 uS max 10 uS max 5 uS typ 200 mV 40 uS max 20 uS max 10 uS max 5 uS
52. on specifications Recommended warm up time 15 minutes Calibration Auto calibration calibration factors for each range stored on board in non volatile RAM Onboard calibration reference DC Level 5 000 V 1 mV Actual measured values stored in EEPROM Tempco 0 6 ppm C max Long term stability 6 ppm sqrt 1000 hrs Calibration interval 1 year Digital input output Table 16 Digital I O specifications Digital type Discrete 5V TTL compatible Number of I O 8 Configuration 8 bits independently programmable for input or output All pins pulled up to 5 V via 47 K resistors default Positions available for pull down to ground Hardware selectable via solder gap Input high voltage 2 0 V min 7 0 V absolute max Input low voltage 0 8 V max 0 5 V absolute min Output high voltage IOH 32 mA 3 80 V min 4 20 V typ Output low voltage IOL 32 mA 0 55 V max 0 22 V typ Data transfer Programmed I O Power up reset state Input mode high impedance Interrupt Section Table 17 Interrupt specifications Interrupts PCI INTA mapped to IRQn via PCI BIOS at boot time Interrupt enable Programmable through PLX9080 ADC interrupt sources DAQ ACTIVE Interrupt is generated when a DAQ sequence is active software programmable DAQ STOP Interrupt is generated when A D Stop Trigger In is detected DAQ DO
53. t any of the AUXIN pins If the A D PACER GATE signal is active no scans can occur If the A D PACER GATE signal becomes active during a scan in progress the current scan is completed and scans are then held off until the gate is de asserted A D EXTERNAL TIME BASE signal The A D EXTERNAL TIME BASE signal can serve as the source for the on board pacer circuit rather than using the 40 MHz internal time base Any AUXIN pin can be set programmatically as the source for this signal The polarity is programmable The maximum frequency for the A D EXTERNAL TIME BASE signal is 20 MHz The minimum pulse width is 23 ns high or low There is no minimum frequency specification Figure 4 13 shows the timing specifications for the A D EXTERNAL TIME BASE signal 4 7 PCI DAS6030 amp PCI DAS6032 User s Guide Functional Details tp 50 ns minimum tw 23 ns minimum Figure 4 13 A D EXTERNAL TIME BASE signal timing A D STOP signal The A D STOP signal indicates a completed acquisition sequence You can program this signal to be available at any of the AUXOUT pins The A D STOP output signal is a 50 ns wide pulse whose leading edge indicates a DAQ done condition Figure 4 14 shows the timing for the A D STOP signal tw tw 50 ns Figure 4 14 A D STOP signal timing ATRIG signal In addition to standard digital trigger features the PCI DAS6030 and PCI DAS6032 also provide analog triggering capability When using the analog trigger
54. t selections AUXINO A D CONVERT AUXINI A D START TRIGGER AUXIN2 A D STOP TRIGGER AUXIN3 D A UPDATE AUXIN4 D A START TRIGGER AUXINS A D GATE AUXOUTO D A UPDATE AUXOUTI A D CONVERT AUXOUT2 SCANCLK Compatibility 5 V TTL Minimum pulse width 37 5 ns 6 9 PCI DAS6030 amp PCI DAS6032 User s Guide Specifications DAQ Sync inter board triggers clocks The DAQ Sync bus provides inter board triggering and synchronization capability Five trigger strobe I O pins and one clock I O pin are provided on a 14 pin header The DAQ Sync signals use dedicated pins Only the direction may be set Table 20 DAQ Sync signal specifications DAQ Synce signals DS A D START TRIGGER DS A D STOP TRIGGER DS A D CONVERT DS D A UPDATE DS D A START TRIGGER SYNC CLK Power Consumption Table 21 Power consumption specifications 5 V PCI DAS6030 32 1 3 A typical 1 5 A max Does not include power consumed through the I O connector 5 V available at I O connector 1 A max protected with a resettable fuse Environmental Table 22 Environmental specifications Operating temperature range 0 to 55 C Storage temperature range 20 to 70 C Humidity 0 to 90 non condensing Mechanical Table 23 Mechanical specifications Card dimensions PCI half card 174 4 mm L x 106 9 mm W x 11 65mm H DAQ Sync connector and pin out Table 24 DAQ Sync con
55. ulse c eS CONVERT SE i 7 SSH S 1 u tor 10 ns minimum toff Figure 4 10 SSH signal timing 4 6 PCI DAS6030 amp PCI DAS6032 User s Guide Functional Details A D CONVERT signal The A D CONVERT signal indicates the start of an A D conversion It is available through software selection as an input to any of the AUXIN pins defaulting to AUXINO or the DAQ Sync DS A D CONVERT input and as an output to any of the AUXOUT pins When used as an input the polarity is software selectable The A D CONVERT signal starts an acquisition on the selected edge The selected edge either rising of falling of the convert pulses must be separated by a minimum of 10 us to remain within the 100 kS s conversion rate specification Refer to Figure 4 3 and Figure 4 6 for the relationship of A D CONVERT to the DAQ sequence Figure 4 11 and Figure 4 12 show the input and output pulse width requirements for the A D CONVERT signal Rising Edge Polarity l l Falling Edge Polarity l l ty 37 5 ns minimum Figure 4 11 A D CONVERT signal input timing requirement Figure 4 12 A D CONVERT Signal Output Timing Requirement The A D CONVERT signal is generated by the on board pacer circuit unless the external clock option is in use This signal may be gated by hardware A D PACER GATE or software A D PACER GATE signal The A D PACER GATE signal is used to disable scans temporarily This signal may be programmed for input a
56. ured as inputs slave mode In order to be useful one board must be set through software to serve as the master and the signal sources of the slave boards must be defined Connecting the board for I O operations Connectors cables main I O connector Table 2 1 lists the board connectors applicable cables and compatible accessory boards Table 2 1 Board connectors cables accessory equipment Connector type Shielded SCSI 100 D type Compatible cables C100HD50 x unshielded ribbon cable x 3 or 6 feet Figure 2 1 C100MMS x shielded round cable x 1 2 or 3 meters Figure 2 2 Compatible accessory products with the C100HD50 x cable ISO RACK16 P ISO DA02 P BNC 16SE BNC 16DI CIO MINIS50 CIO TERM100 SCB 50 Compatible accessory products with the CLOOMMS x cable SCB 100 2 4 PCI DAS6030 amp PCI DAS6032 User s Guide Installing the PCI DAS6030 and PCI DAS6032 Signal Name Pin Signal Name Pinout main GND 100 GND CTR2 OUT 99 AUXIN5 A D PACER GATE I O connector CTR2 GATE 98 AUXIN4 D A START TRIGGER CTR2 CLK 97 AUXIN3 D A UPDATE GND 96 AUXIN2 A D STOP TRIGGER C
57. voltage 0 8 V max Input high voltage 2 0 V min Output low voltage 0 4 V max Output high voltage 3 0 V min 6 8 PCI DAS6030 amp PCI DAS6032 User s Guide Specifications Configurable AUXIN lt 5 0 gt AUXOUT lt 2 0 gt external trigger clocks The PCI DAS6030 and PCI DAS6032 provide nine user configurable trigger clock pins available at the 100 pin I O connector Of these six are configurable as inputs while three are configurable as outputs Table 19 Configurable triggers clocks specifications AUXIN lt 5 0 gt sources A D CONVERT External ADC convert strobe SW selectable A D TIMEBASE IN External ADC pacer time base A D START TRIGGER ADC Start Trigger A D STOP TRIGGER ADC Stop Trigger A D PACER GATE External ADC gate D A START TRIGGER DAC trigger gate D A UPDATE DAC update strobe D A TIMEBASE IN External DAC pacer time base AUXOUT lt 2 0 gt sources STARTSCAN A pulse indicating start of conversion SW selectable SSH Active signal that terminates at the start of the last conversion in a scan A D STOP Indicates end of scan A D CONVERT ADC convert pulse SCANCLK Delayed version of ADC convert CTRI CLK CTR1 clock source D A UPDATE D A update pulse CTR2 CLK CTR2 clock source A D START TRIGGER A D STOP TRIGGER ADC Start Trigger Out ADC Stop Trigger Out A D PACER GATE External ADC gate D A START TRIGGER DAC Start Trigger Out Defaul
58. www mecdag com cbicatalog cbiproduct asp dept_id 101 amp pf_id 713 BNC 16DI Brings analog signals to standard BNC connectors Designed for boards operating in differential mode Details on this product are available on our web site at www mcecdag com cbicatalog cbiproduct asp dept_id 101 amp pf_id 714 CIO MINI50 50 pin screw terminal board Two boards are required Details on this product are available on our web site at www mccdag com cbicatalog cbiproduct asp dept_id 102 amp pf_id 258 CIO TERM100 100 pin screw terminal board daisy chained 50 pin IDC connectors Details on this product are available on our web site at www mecdaq com cbicatalog cbiproduct asp dept_id l02 amp pf id 281 SCB 50 50 conductor shielded signal connection screw terminal box provides two independent 50 pin connections Details on this product are available on our web site at www mecdag com cbicatalog cbiproduct asp dept_id 196 amp pf_id 1168 2 8 PCI DAS6030 amp PCI DAS6032 User s Guide Installing the PCI DAS6030 and PCI DAS6032 You can use the following screw terminal box to terminate field signals and route them into the PCI DAS6030 and PCI DAS6032 board using the C1OOMMS x cable SCB 100 100 conductor shielded signal connection screw terminal box provides two independent 50 pin connections Details on this product are available on our web site at www mecdaq com cbicatalog cbiproduct asp dept_id 196 amp pf_id 1169
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