Home

USER`S MANUAL

1. 49 49 Be 48 48 TO MODEL 5025 552 47 47 CARRIER BOARD 1 0 TERMINATION 46 46 PANEL 45 45 44 44 43 43 l x gt een 40 40 TOP VIEW 39 39 38 38 37 37 36 36 35 35 34 34 STRAIN 33 33 RELIEF AAA 3 6 e RIBBON CABLE BLACK LINE ON CABLE CONNECTOR 51 Si 2002 261 INDICATES PIN 50 1004 512 30 30 29 29 28 28 A 27 27 26 26 25 25 24 24 23 23 22 22 Lie POLARIZING 21 21 KEY 20 20 H 19 19 18 18 17 17 16 16 SS GOGOL 15 15 A 14 14 13 13 12 12 PIN 1 11 11 50 PIN 10 10 CONNECTOR 9 9 1004 512 PIN 1 BO LON SABLE 8 8 NO MARKINGS STRAIN RELIEF 7 7 1004 534 6 6 5 a 5 FRONT VIEW 4 4 3 3 NOTE SEVEN DIGIT PART NUMBERS ARE 2 2 ACROMAG PART NUMBERS XXXX XXX 1 sl 1 Gd MODEL 5025 551 x SCHEMATIC MODEL 5025 551 x SIGNAL CABLE SHIELDED 4501 463A Lc98 00980dV SAIYAS MOVd OI TYIHLSNANI GHvOd YAIYHUYUVO SN lod 6 123456 7 8 9 101112131415 16 1718 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 3
2. Complies with IEC1000 4 2 Level 1 2KV direct contact discharge at field input output terminals and European Norm EN50082 1 Surge Immunity Complies with IEC1000 4 5 Level 2 1KV and European Norm EN50082 1 at field input output terminals Electric Fast Transient Immunity EET cece seen Complies with IEC1000 4 4 Level 2 1KV power terminals 0 5KV at field input and output terminals and European Norm EN50082 1 Radiated Emissions Meets or exceeds European Norm EN50081 1 for class A equipment APPENDIX CABLE MODEL 5025 550 x Non Shielded MODEL 5025 551 x Shielded Type Flat Ribbon Cable 50 wires female connectors at both ends The x suffix designates the length in feet 12 feet maximum Choose shielded or unshielded cable according to model number The unshielded cable is recommended for digital I O while the shielded cable is recommended for optimum performance with precision analog I O applications Application Used to connect Model 5025 552 termination panel to carrier board 50 pin field connectors Length Last field of part number designates length in feet user specified 12 feet maximum It is recommended that this length be kept to a minimum to reduce noise and power loss Cable 50 wire flat ribbon cable 28 gage Non Shielded cable model uses Acromag Part 2002 211 3M Type C3365 50 or equivalent Shielded cable model uses Acromag Part 2002 261 3M
3. GHvOd YAIHUYUVO SN Idd J L P2 P1 50 50 49 49 P2 P1 48 48 TO 47 47 TO MODEL 5025 552 46 46 CARRIER BOARD 1 0 TERMINATION 45 45 PANEL 44 44 43 43 42 42 41 41 i x St 40 40 FEET 39 39 Se Se TOP VIEW 37 37 36 36 35 35 34 34 33 33 z z sea s r 31 31 NON SHIELDED CONNECTOR 30 30 1004 534 RIBBON CABLE 1004 512 29 29 2002 211 28 28 E 27 27 E a 26 26 E BS gt E gt 2 3 NEGER SR 24 24 E L gt gt gt gt 23 23 E BS La os gt m A ESSE SS O k 21 21 E aoo ee aaa gt Le E 20 20 BT fi POLARIZING 19 19 E sooo en gt 18 18 E B iLL LEE 17 17 E gt 16 16 E DEE 15 15 E DEE 14 14 E SE 13 13 LC CCC AK K KH k k Z 12 12 m 11 11 aa PIN 1 ASS e S 50 PIN ci mi pn once 8 5 IS DESIGNATED WITH STRAIN RELIEF 7 Z RED INK 1004 534 5 5 4 4 FRONT VIEW 3 3 2 2 NOTE SEVEN DIGIT PART NUMBERS ARE 1 1 ACROMAG PART NUMBERS XXXX XXX MODEL 5025 550 x SCHEMATIC MODEL 5025 550 x SIGNAL CABLE NON SHIELDED 4501 462A Lc98 00980dV SAIYAS MOVd OI TYIHLSNANI GHvOd YAIYHUYUVO SN lod 8 PIN 50 OF P1 amp P2 CONNECT TO P2 GROUND SHIELD pq E 5 P2 P1
4. 58 5 FRONT VIEW 4501 464A Lc98 00980dV SAIYAS MOVd OI TYIHLSNANI GHvOd Yala vo SN 19d
5. IP Logie Interface ccoo az ee on 10 APC8621E 6 600 3 A B C 40 to 85 C Carrier Board Clock Circuitry 10 ODDDDDWOWDAWDAAWDANNDAODOOUAAAAARHRAHRHRWWWWWD PD PCI Irnterrupter eau aaa aaa aaa aaaa saa ezaa zazna 10 KEY APC8620 8621 FEATURES Power Failure Monitor 10 Power Supply Fuees EE 10 e PCI Specification Version 2 1 Compliant Slave Carrier Power Supply Filters s E 10 Provides a PCI bus interface to control and communicate 5 0 SERVICE AND REPAIR 10 with industry standard IP modules SERVICE AND REPAIR ASSISTANCE 10 Interface for IP Modules APC8620 provides an electrical PRELIMINARY SERVICE PROCEDURE 10 and mechanical interface for up to five industry standard IP 6 0 SPECIFICATIONS Sg 11 modules APC8621 provides an electrical and mechanical GENERAL SPECIFICATIONS aaa 11 interface for up to three industry standard IP modules IP PCI BUS COMPLIANGE Lunn nn nono nnnnononononnnss 11 Modules are available from Acromag and other vendors in a INDUSTRIAL 1 O PACK COMPLIANCE 11 wide variety of Input Output configurations to meet the ENVIRONMENTAL Gate eege 12 needs of varied applications Plug And Play PCI bus Carrier The carrier card contains standard PCI bus configuration memory Upon power up INDUSTRIAL I O PACK SERIES APC8620 8621 PCI BUS CARRIER BOARD
6. the system auto configuration process assigns the carrier s base address in memory space Plug And Play Interrupt Support The personal computer system software will allocate one interrupt line to the carrier The carrier s interrupt pending register can be used to quickly identify IP module pending interrupts Supports Two Interrupt Channels per IP Up to two interrupt requests are supported for each IP Additional registers are associated with each interrupt request for control and status monitoring e Full IP Register Access Makes maximum use of logically organized programmable registers on the carrier boards to provide for easy configuration and control of IP modules Supports accesses to IP input output interrupt and ID ROM data spaces No hardware jumper settings are required on the carrier board e IP Module Access Time Out Allows access to empty IP slots without system failure If the IP module accessed does not respond within 32u seconds the bus access is terminated without system failure This allows each IP slot to be probed to determine if an IP is installed A control register bit will be set and or issue of an interrupt request to indicate IP module time out access has occurred e Optional Screw Termination Panel Model supports field connection via screw terminals using the optional DIN rail mount termination panels e Connectors Access I O Access to field I O signals is provided via industry standard 50 pin hea
7. GENERAL INFORMATION KEY APC8620 8621 FEATURES 4501 463 CABLE 5025 551 SHIELDED 18 4501 464 TERMINATION PANEL 5025 552 19 PCI BUS INTERFACE FEATURES SIGNAL INTERFACE PRODUCTS IP MODULE OLE CONTROL SOFTWARE 2 0 PREPARATION FOR USE UNPACKING AND INSPECTION CARD CAGE CONSIDERATIONS ooccccccoccccnonccconanocinnno BOARD CONFIGURATION vrrrrrvrrrnrrnnrnrrnnrrrrrnnrrnrnnnen Interrupt Configuration CONNECTORS huer edda ds Carrier Field I O Connectors IP modules A B IP Field I O Connectors IP modules A E IP Logic Interface Connectors IP modules A E IP Logic Strobe Connechors PCI BUS Connections DATA TRANSFER TIMING eerren FIELD GROUNDING CONSIDERATIONS 3 0 PROGRAMMING INFORMATION PCI Configuration Address Space Configuration Transactions Configuration Registers MEMORY MAP Gieres esi iin ee Gein kaiene Carrier Board Status Register IP Interrupt Pending Register IP Module Interrupt Gpace IP Module ID Gpace IP Module I O Gpace aaa eaaaswae GENERATING INTERRUPTS ena Sequence of Events for an Interrupt 4 0 THEORY OF OPERATION CARRIER BOARD OVERVIEW ooooocccccoccccococcconanaco
8. Type 3476 50 or equivalent Headers Both Ends 50 pin female header with strain relief Header Acromag Part 1004 512 3M Type 3425 6600 or 12 equivalent Strain Relief Acromag Part 1004 534 3M Type 3448 3050 or equivalent Keying Headers at both ends have polarizing key to prevent improper installation Schematic and Physical Attributes For Non Shielded cable model see Drawing 4501 462 For Shielded cable model see Drawing 4501 463 Shipping Weight 1 0 pound 0 5Kg packed CABLE MODEL 5029 943 Type Model 5029 943 IP500 Communication Cable A five foot long flat 50 pin cable with a female connector on one end for connection to carrier board and four DE 9P connectors serial ports on the other end Application Used to connect up to four DB 9 serial ports to carrier board connectors It is used primarily with Acromag Model IP500 IP501 amp IP502 serial communication modules Length 5 feet Cable 50 wire flat ribbon cable 28 gage Non Shielded cable model uses Acromag Part 2002 211 3M Type C3365 50 or equivalent Headers 50 pin female header with strain relief Header Acromag Part 1004 512 3M Type 3425 6600 or equivalent Strain Relief Acromag Part 1004 534 3M Type 3448 3050 or equivalent Port Connectors Four DE 9P 9 pin D SUB Male connectors with strain relief 3M connector U89809 9000 with 3448 8DO9A strain relief or equivalent Keying 50 pin Header at one end has polarizing
9. of the IP modules are individually fused with a current limit of 1 amp imposed by the fuses A blown fuse can be identified by visible inspection or by use of an ohm meter The fuses are located under each IP slot near the logic connectors see figure 4501 671 or 4501 676 Power Supply Filters Power line filters are dedicated to each IP module for filtering of the 5 12 and 12 volt supplies The power line filters are a T type filter circuit comprising ferrite bead inductors and a feed through capacitor The filters provide improved noise performance as is required on precision analog IP modules 5 0 SERVICE AND REPAIR SERVICE AND REPAIR ASSISTANCE Surface Mounted Technology SMT boards are generally difficult to repair It is highly recommended that a non functioning board be returned to Acromag for repair The board can be damaged unless special SMT repair and service tools are used Further Acromag has automated test equipment that thoroughly checks the performance of each board When a board is first produced and when any repair is made it is tested placed in a burn in room at elevated temperature and retested before shipment Please refer to Acromag s Service Policy Bulletin or contact Acromag for complete details on how to obtain parts and repair PRELIMINARY SERVICE PROCEDURE Before beginning repair be sure that all of the procedures in Section 2 Preparation For Use have been followed Also refer to
10. oo do IPB F7 GE JEE oo oo s gal det He NEBI H ee OG 00 38 F6 38 oo no 00 38 ER BE 00 00 3 Bal an ce ss B 188 l 1 Be O ODDODDODOODDDODDDODODDODD Y A A AA A NE JE 19 y y 0 325 0 190 0 295 e gt 0 591 ke 1 605 gt lt 2 508 gt 0 608 ke Ji 6 600 S 4501 676A Lc98 00980dV SAIYAS MOVd OI TYIHLSNANI GHvOd YAIYHUYUVO SN lod GL IP MODULE TO CARRIER BOARD MECHANICAL ASSEMBLY ASSEMBLY PROCEDURE 1 THREADED SPACERS ARE PROVIDED BY ACROMAG IN TWO DIFFERENT 3 CAREFULLY ALIGN IP MODULE TO CARRIER BOARD AND PRESS LENGTHS WITH IP MODULES THE SHORTER LENGTH IS FOR USE WITH TOGETHER UNTIL CONNECTORS AND SPACERS ARE SEATED APC8620 CARRIER BOARD SHOWN 2 INSERT FLAT HEAD SCREWS ITEM A THROUGH SOLDER SIDE OF 4 INSERT PAN HEAD SCREWS ITEM C THROUGH SOLDER SIDE IP MODULE AND INTO HEX SPACERS ITEM B AND TIGHTEN 4 PLACES OF CARRIER BOARD AND INTO HEX SPACERS ITEM B AND UNTIL HEX SPACER IS COMPLETELY SEATED TIGHTEN 4 PLACES M2 x 6 FLAT HEAD O oF SOLDER SIDE OF IP MODULE SCREW l COMPONENT SIDE OF IP MODULE THREADED M2 gt i E niw i COMPONENT SIDE OF CARRIER BOARD re BRACKET I 1 M2 x 6 OG PAN HEAD OB SCREW 4501 672A Lc98 00980dV SAIYAS MO
11. oo i 20 88 oo oo 88 38 ooj H joojoo oo oo 88 ds joof 1 EIER i sa ss HIEI j SES EE ER ER zo oo 88 58 ooj n ooj oo F Fa 18 l i 2 ER 38 I H I 1 I a ER E i it I I i g OODODODODDOODODONODOONODN OOOO OOO nono DODDDODODDEDDODDOODDDDDON DR OZPL IE RADZA ATZ KD rees ODOODDODDOODOODODODODODDO DODODDODODODODODODDDDDODO DODODDDODODODODDOODDDDODO 4 y I 7 Y 0 32 y 0 190 0 325 A A 0 200 0 295 4 0 591 lt lt 1 605 gt lt 2 508 gt 0 608 ke 12 283 gt FUSES 5V 2 AMP F1 6 9 108 13 12V 1 AMP F2 4 7 12 amp 15 12V 1 AMP F3 5 8 11 amp 14 4501 671B Lc98 00980dV SAIYAS MOVd OI TYIHLSNANI GHvOd YAIYHUYUVO SN lod APC8621 IP LOCATIONS bl el e er 19 SH F4 BI re E BJ ATI BIS F1 IPA re Io SS FS E F3 oo Do OG 2 0 33 o0 SEE dl F9 28 FUSES Belles lke Es V 2AMP F1 2 3 362 o0 00 5 ol 1188 au i ETE l Ge 55 EE IPC as 12V 1 AMP F4 6 amp 8 opd eo oo zaj ooi PS F2 HI on 12V 1 AMP F5 7 89 oo ooj e s ag JEE PENSEI H IEE OG 00 38 38 oo oo lobos HE EE
12. the documentation of your carrier board to verify that it is correctly configured Verify that there are no blown fuses Replacement of the carrier and or IP with one that is known to work correctly is a good technique to isolate a faulty board CAUTION POWER MUST BE TURNED OFF BEFORE REMOVING OR INSERTING BOARDS Acromag s Applications Engineers can provide further technical assistance if required When needed complete repair services are also available from Acromag INDUSTRIAL I O PACK SERIES APC8620 8621 PCI BUS CARRIER BOARD 6 0 SPECIFICATIONS PHYSICAL Physical Configuration PCI 5V Card Length APC8620 12 283 inches 312 0 mm 6 600 inches 167 64 mm seas 4 200 inches 106 68 mm Board Thickness 0 063 inches 1 60 mm Max Component Height 0 380 inches 9 65 mm Max Component Height Under IP Modules 0 180 inches 4 57 mm Connectors P1 PCI Bus PCI Specification 2 1 5V brd card edge finger spacing A E Carrier Field I O 50 pin Male Header with For APC8620 ejector latches A C Carrier Field I O 50 pin Male Header without For APC8621 ejector latches P4 5 9 12 15 IP Field I O 50 pin male plug header P3 6 9 for APC8621 AMP 173280 3 or equivalent P6 7 10 13 16 IP Logic 50 pin male plug header AMP P4 7 10 for APC8621 173280 3 or eq
13. thick Operating Temperature 40 C to 100 C Storage Temperature 40 C to 100 C Shipping Weight 1 25 pounds 0 6kg packed L APC8620 IP LOCATIONS A GSE EH ME EG HE nnonnnnnnonnnnonnnnnnonoD nnnnnnnonnnannonnonnnnnno nannnnnanononnnnnnonnonno Geen ELE O pa O O E O Oy A A B Js arl Ct i CD Et d 38 F2 BE I it i I I 0 ER FE I i I i I oo oo 88 Be oo tt Joolloo i i 88 BE ool 1 F10 i Jool ool 1 ao oo 38 F1 38 H I SEE IPA IGE i Nee leet a oo ooj 88 38 ool FZ FQ F11 F12 paali gal F13 F15 F14 H no co 38 sej coli F8 H ooj oo i Do oo 88 F3 BB col it Jesl aeo i I no ooj 58 FE oo d Jaal oa I no oo 88 38 o0 Do 00 3 525 3 362 oo oo LA gt CO I tt ogl so i I 88 88 lo elle IPO i PD Hele E GE EE SS Eb I I SE SE 4 200 DD 00 F6 Sait Ii i PBS poo 1 i oo oo rt ae 20 d oej so i oe co 38 E joof it gej jce i no oo 38 38 pol El aol oo i i mo oo 88 38 ool i esj eo oG D I 88 F5 FE oo Hi Jooj oo oo oo 138 P B 38
14. 485 serial communication modules Termination Panel Model 5025 552 DIN rail mountable panel provides 50 screw terminals for universal field I O termination Connects to carrier boards via flat 50 pin ribbon cable Model 5025 550 X or 5025 551 X IP MODULE OLE CONTROL SOFTWARE Acromag provides a software product sold separately consisting of IP module OLE Object Linking and Embedding drivers for Windows 95 98 NT compatible application programs Model IPSW OLE PCI MSDOS format This software provides individual drivers that allow Acromag IP modules and our personal computer carriers to be easily integrated into Windows application programs such as Visual C Visual Basic Borland Delphi Microsoft Office 97 applications and others The OLE controls provide a high level interface to IP modules eliminating the need to perform low level reads writes of registers and the writing of interrupt handlers all the complicated details of programming are handled by the OLE controls These functions are intended for use in conjunction with an Acromag personal computer carrier and consist of a carrier OLE control and an OLE control for each Acromag IP module as well as a generic OLE control for non Acromag IP modules 2 0 PREPARATION FOR USE UNPACKING AND INSPECTION Upon receipt of this product inspect the shipping carton for evidence of mishandling during transit If the shipping carton is badly damaged or water stained reques
15. 9 40 41 42 43 44 45 46 47 48 49 50 123456 7 8 9 10 111213 1415 16 1718 19 20 21 22 2324 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 MODEL 5025 552 TERMINATION PANEL SCHEMATIC SHOWN HERE TERMINATION e PANEL ACROMAG PART NUMBER 4001 040 DIN EN 50035 32mm P1 TB1 G RAIL DIN MOUNTING T RAIL DIN MOUNTING DIMENSIONS ARE IN INCHES MILLIMETERS TOLERANCE 0 020 8 5 3 032 SHOWN HERE 77 0 DIN EN 50022 35mm TB1 GI EE E GE EE E E EE E E E E E E EE E E E ii EE E E EE E E EE E EE EE E L d u SCREWDRIVER SLOT FOR 5 315 A REMOVAL FROM T RAIL 135 0 TOP VIEW SIDE VIEW E NOTES 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 1 3 5 7 9 1113 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 sake MODEL 5025 552 TERMINATION PANEL
16. Acromag 4 Series APC8620 8621 Industrial I O Pack PCI Bus Non Intelligent Carrier Board USER S MANUAL ACROMAG INCORPORATED 30765 South Wixom Road P O BOX 437 Wixom MI 48393 7037 U S A Tel 248 624 1541 Fax 248 624 9234 Copyright 2000 Acromag Inc Printed in the USA Data and specifications are subject to change without notice 8500 576 E01B010 INDUSTRIAL I O PACK SERIES APC8620 8621 PCI BUS CARRIER BOARD The information contained in this manual is subject to change APPENDIX LL mar 12 without notice Acromag Inc makes no warranty of any kind with CABLE MODEL 5025 550 12 regard to this material including but not limited to the implied CABLE MODEL 5025 551 12 warranties of merchantability and fitness for a particular purpose CABLE MODEL 5029 943 12 Further Acromag Inc assumes no responsibility for any errors TERMINATION PANEL MODEL 5025 552 12 that may appear in this manual and makes no commitment to update or keep current the information contained in this manual DRAWINGS Page No part of this manual may be copied or reproduced in any form 4501 671 APC8620 IP LOGATIONS 1 13 without the prior written consent of Acromag Inc 4501 676 APC8621 IP LOCATIONS 14 4501 672 MECHANICAL ASSEMBLY DRAWING 15 Table of Contents Page 4501 673 APC8620 8621 BLOCK DIAGRAM 16 4501 462 CABLE 5025 550 NON SHIELDED 17 1 0
17. PCI bus Accesses to the configuration data port determine the size of the access to the configuration register addressed and can be an 8 16 or 32 bit operation Any access to the Configuration address port that is not a 32 bit access is treated like a normal computer I O access Thus computer I O devices using 8 or 16 bit registers are not affected because they will be accessed as expected Table 3 1 Configuration Address Port FUNCTION 31 Enables accesses to Configuration Data to be translated to configuration cycles on the PCI bus 30 24 Reserved Return 0 when read 23 16 15 11 Bus Number Choose a specific PCI bus in the system Zero if only one PCI bus Device Number Choose a specific device PCI board on the bus Function Number Choose a specific function in a device Function number is zero for the APC8620 8621 Register Number Used to indicate which PCI Configuration Register to access The Configuration 10 T Registers and their corresponding register 1 8 2 numbers are given in Table 3 2 0 1 0 Read Only bits that return 0 INDUSTRIAL I O PACK SERIES APC8620 8621 PCI BUS CARRIER BOARD Configuration Registers The PCI specification requires software driven initialization and configuration via the Configuration Address space This PCI carrier provides 256 bytes of configuration registers for this purpose The PCI carrier contains the configuration registers shown in Table 3 2 to facilit
18. S APC8620 8621 PCI BUS CARRIER BOARD TABLE 2 3 APC8620 8621 Write and Read Complete Time Notes Table 2 3 1 The data transfer times given in table 2 3 are measured from the falling edge of FRAME to the falling edge of LRDYi The PCI bus starts a data transfer cycle by driving FRAME low The APC8620 8621 signals the completion of a read or write cycle by driving LRDYi low 2 This access time assumes zero IP module wait states For each IP module wait state 125n seconds must be added to this value 3 This access time assumes zero IP module wait states For each IP module wait state 250n seconds must be added to this value FIELD GROUNDING CONSIDERATIONS Carrier boards are designed with passive filters on each supply line to each IP module This provides maximum filtering and signal decoupling between the IP modules and the carrier board However the boards are considered non isolated since there is electrical continuity between the PCI bus and the IP grounds Therefore unless isolation is provided on the IP module itself the field I O connections are not isolated from the PCI bus Care should be taken in designing installations without isolation to avoid ground loops and noise pickup This is particularly important for analog I O applications when a high level of accuracy resolution is needed 12 bits or more Contact your Acromag representative for information on our many isolated signal conditioning products that c
19. Vd OI TYIHLSNANI GHvOd YAIYHUYUVO SN lod 9 APC8620 8621 BLOCK DIAGRAM 5 _ POWER POWER FAILURE LOW VOLTAGE 19 gt SUPPLY MONITOR 12 gt FILTERS IP A amp FUSES IP MODULE A FIELD L IP A CONTROL 1 0 PCI BUS 5 PLX LBE3 IP DATA 15 de IP ADDRESS 1 6 l 5 e TECHNOLOGY FPGA rn pcl9050 15 POWER 5 12 LBEO INTERRUPT 122 SUPPLY 4157 gt INTERFACE PENDING 125 FILTERS 12 P B Belt CHIP REGISTER amp FUSES IP MODULE B FIELD NTAR G Ls IP B CONTROL e E C BE 0 5 INTERRUPT gt DSEL LD 15 CONTROL 45 POWER EE REGISTER 5 gt SUPPLY RAME 12 gt FILTERS IP C RDYI LINT amp FUSES IP MODULE C FIELD gt 1 p IP_C CONTROL 40 TRDY IPMODULE DEVSEL CS14 RE 4 AD 31 45 POWER 12 SUPPLY LRESET HA en EE B p o FIELD PERR gd IPMODULE CG IP D CONTROL IP MODULE D ie ACCESS SERRA LRZW TIME OUT CONTROL if STOP gt PORER PAR ADS 357 SUPPLY eem i SER P e IP MODULE E FIELD IP E CONTROL Ge 16 MHz DIVIDE 8 MHz CLOCKS TO OSCILLATION BY 2 IP MODULES NOTE FOR MODEL APC8621 IP MODULES D amp E ARE NOT AVAILABLE 4501 673B Lc98 00980dV SAIYAS MOVd OI TYIHLSNANI
20. ate Plug and Play compatibility The Configuration Registers are accessed via the Configuration Address and Data Ports The most important Configuration Registers are the Base Address Registers and the Interrupt Line Register which must be read to determine the base address assigned to the carrier and the interrupt request line that goes active on a carrier interrupt request Table 3 2 Configuration Registers D15 D7 num oo Je os JI 0 Feelt Vendor ID 1085 Command Rev ID Cache Base Addr Memory Mapped Configuration Registers Base Address for I O Mapped Configuration Registers 32 bit Memory Base Address for APC8620 8621 Not Used Subsystem Vendor ID Not Used Reserved Reserved MEMORY MAP 7 10 Inter Line The 1K byte of memory consumed by the board is composed of blocks of memory for the ID I O and INT spaces corresponding to five IP modules In addition a small portion of the 1K byte address space contains registers specific to the function of the carrier board The carrier is configured to map this 1K byte block of memory into 32 bit memory space The system configuration software will allocate space by writing the assigned address into the corresponding Base Address register of the Configuration Registers The memory map for APC8620 8621 is shown in Tables 3 3 Table 3 3 APC8620 8621 Carrier Bd Memory Map Address High Byte Low Byte Address Hex D15 D08 D07 DOO Hex Pl smc Reset Status C
21. ce This link is implemented and controlled by the carrier board s FPGA The PCI bus to IP logic interface link allows a PCI bus master to e Access up to 64 ID Space bytes for IP module identification via 8 bit or 16 bit data transfers using PCI bus e Access up to 128 I O Space bytes of IP data via 8 bit or 16 bit data transfers e Access IP module interrupt space via 8 bit or 16 bit PCI bus data transfers e Respond to two IP module interrupt requests per IP module Carrier Board Clock Circuitry A 16MHz clock is divided down by a clock driver to obtain the IP module 8MHz clock signals Separate IP clocks are driven to each IP module All clock lines include series damping resistors to reduce clock overshoot and undershoot When an IP module places data on the bus for all data read cycles any undriven data lines are read by the PCI bus as high because of pull up resisters on the carrier board s data bus PCI Interrupter Interrupts are initiated from an interrupting IP module However the carrier board will only pass an interrupt generated by an IP module to the PCI bus if the carrier board has been first enabled for interrupts Each IP module can initiate two interrupts which can be individually monitored on the carrier board After interrupts are enabled on the carrier board via the Interrupt Enable Bits see section 3 for programming details an IP generated interrupt is recognized by the carrier board and is recorded in t
22. ders with ejector latches A separate header is provided for each IP module e Supervisory Circuit for Reset Generation A microprocessor supervisor circuit provides power on power off and low power detection reset signals to the IP modules per the IP specification e Individually Filtered Power Filtered 5V 12V and 12V DC power is provided to the IP modules via passive filters present on each supply line serving each IP This provides optimum filtering and isolation between the IP modules and the carrier board and allows analog signals to be accurately measured or reproduced on IP modules without signal degradation from the carrier board logic signals e individually Fused Power Fused 5V 12V and 12V DC power is provided A fuse is present on each supply line serving each IP module e OLE Control Software is Available Acromag provides Object Linking and Embedding OLE controls software for Windows 95 98 NT This software Model IPSW OLE PCI MSDOS format provides individual drivers that allow IP modules and our personal computer carriers to be easily integrated into Windows application programs such as Visual C Visual Basic Borland Delphi Microsoft Office 97 applications and others PC BUS INTERFACE FEATURES e Slave Module All read and write accesses are implemented as either a 32 bit 16 bit or 8 bit single data transfer Immediate Disconnect on Read The PCI bus will immediately disconnect aft
23. ector Connector pins are designated by a letter and a number The letter indicates which side of a particular connector the pin contact is on B is on the component side of the carrier board while A is on the solder side Connector gold finger numbers increase with distance from the bracket end of the printed circuit board Refer to the PCI bus specification for additional information on the PCI bus signals TABLE 2 2 PCI Bus P1 CONNECTIONS 12V TRST TMS TMS Bracket End Tt Ground Ground Reserved RST 5V GNT Ground Reserved AD 30 3 3V AD 28 AD 26 Ground AD 24 IDSEL 3 3V AD 22 AD 20 Ground AD 18 AD 16 3 3V FRAME Ground TRDY Ground REO B18 B37 B37 A37 STOPA 3 3V PERR B40 A40 SDONE KEYWAY KEYWAY KEYWAY KEYWAY i s used to indicate an active low signal BOLD ITALIC Logic Lines are NOT USED by the carrier board ADI ADI ADI 3 3V ADI ADI 3 3V ADI A37 DATA TRANSFER TIMING All PCI bus read or write cycles to the APC8620 8621 are typically implemented within 150n seconds FRAME active to TRDY active After 150n seconds the PCI bus is available to the system for other PCI bus activity As the PCI bus is released the APC8620 8621 completes the read or write cycle to the targeted IP module or carrier register within the access times given in Table 2 3 INDUSTRIAL I O PACK SERIE
24. en installing IP modules cables termination panels and field wiring Refer to Mechanical Assembly Drawing 4501 672 and your IP module documentation for specific configuration and assembly instructions Interrupt Configuration No hardware jumper configuration is required All interrupt enabling and status are configured via programmable registers on the carrier board see Section 3 for programming details The carrier board passes interrupt requests from the IP modules to the PCI bus Refer to the IP modules for their specific configuration requirements CONNECTORS Connectors of the APC8620 carrier consist of five three for APC8621 carrier IP module field I O connectors five three for module assignment is marked on the board for easy identification see IP location drawing 4501 671 or 4501 676 for physical locations of the IP modules Flat cable assemblies and Acromag termination panels or user defined terminations can be quickly mated to the field I O connectors Pin assignments are defined by the IP module employed since the pins from the IP module field side correspond identically to the pin numbers of the 50 pin connectors Carrier field I O connectors A through E A through C for APC8621 are industry standard 50 pin low profile headers male with short ejector latches no ejector latches for APC8621 and they mate to ribbon cable connectors 3M Type P N 3425 6600 IP Field I O Connectors IP modules A through E T
25. equest via the IP Module s also be supported and configured at the IPs INTREQ1 signal An access to an interrupt select space results e in the IP module serving up an interrupt vector In addition IP Module Interrupt Pending access to the interrupt space will cause some IP modules to This bit will be 1 when there is an interrupt release their interrupt request See each IP module s User pending This bit will be 0 when there is no Manual for details interrupt pending Polling this bit will reflect the IP Module s pending interrupt status even if IP Module ID Space Read Only the IP Module Interrupt Enable bit is set to 0 Reset condition Set to 0 Each IP contains identification ID information that resides in IP Module Error the ID space per the IP specification This area of memory This bit will be 1 when there is an active IP contains either 32 bytes Format I ID or 64 bytes Format II ID Module Error signal This bit will be 0 when of information at most Format I requires read of only the least significant byte Format II requires read of a 16 bit value The carrier will implement 16 bit reads to the ID space to allow support for either Format I or Format Il Both fixed and variable EE through E A through C for Geste may be present within the ID ROM Variable APC8621 The Industrial I O Pack information may include unique information required for the specification states that the error signals module The identificat
26. er a read The read data is then stored in a read FIFO Data in the read FIFO is then accessed by the PCI bus when the read cycle is retried This allows the PCI bus to be free for other system operations while the read data is moved to the read FIFO e Interrupt Support PCI bus INTA interrupt request is supported All IP module interrupts are mapped to INTA Carrier board software programmable registers are utilized as interrupt request control and status monitors SIGNAL INTERFACE PRODUCTS See Appendix for more information on compatible products This IP carrier board will mate directly to all industry standard IP modules Acromag provides the following interface products all connections to field signals are made through the carrier board which passes them to the individual IP modules Cables Model 5025 551 X Shielded Cable or Model 5025 550 X Non Shielded Cable A Flat 50 pin cable with female connectors at both ends for connecting carrier boards to Model 5025 552 termination panels The unshielded cable is recommended for digital I O while the shielded cable is recommended for optimum performance with precision analog I O applications Model 5029 943 IP500 Serial Communication Cable A 5 foot long flat 50 pin cable with a female connector on one end for connection to the carrier board and four DE 9P connectors serial ports on the other end Also used for interface with Acromag Model IP501 RS 422 amp IP502 RS
27. he carrier board s Interrupt Pending Register A carrier board pending interrupt will cause the board to pass the interrupt to the PCI bus provided the Interrupt Enable bits of the carrier s Status Register have been enabled see section 3 for programming details The PC interrupt request line assigned by the system configuration software will then be asserted The PC AT will respond to the asserted interrupt line by executing the interrupt service routine corresponding to the interrupt line asserted The interrupt service routine is executed only if the IRQ on the PC AT s 8259 interrupt controller has been previously unmasked see section 3 for programming details The interrupt service routine should respond to an interrupt by accessing IP Interrupt Select INTSEL space The interrupt service routine should also conclude the interrupt routine by writing the End Of Interrupt command to the PC AT s 8259 interrupt controller see section 3 for more details Power Failure Monitor The carrier board contains a 5 volts undervoltage monitoring circuit which provides a reset to the IP modules when the 5 volt power drops below 4 27 volts typical 4 15 volts minimum This circuitry is implemented per the Industrial I O Pack specification 10 Power Supply Fuses The 5V supply lines to each of the IP modules are individually fused with a current limit of 2 amp imposed by the fuses In addition the 12 and 12 supply lines to each
28. he field side connectors of IP modules A through E A through C for APC8621 mate to AMP 173280 3 connectors P4 P5 P9 P12 and P15 P3 P6 and P9 for APC8621 respectively on the carrier board IP location is silk screened on the board for easy identification Field and logic side connectors are keyed to avoid incorrect assembly The AMP 173280 3 connectors mate to AMP 173279 3 connectors or similar on the IP modules This provides excellent connection integrity and utilizes gold plating in the mating area Threaded metric M2 screws and spacers supplied with Acromag IP modules provide additional stability for harsh environments see Drawing 4501 672 for assembly details Pin assignments for these connectors are made by the specific IP model used and correspond identically to the pin numbers of the front panel connectors IP Logic Interface Connectors IP modules A through E The logic interface sides of IP modules A through E A through C for APC8621 mate to AMP 173280 3 connectors P6 P7 P10 P13 and P16 P4 P7 and P10 for APC8621 respectively on the carrier board IP location is silk screened on the board for easy identification Field and logic side connectors are keyed to avoid incorrect assembly The AMP 173280 3 connectors mate to AMP 173279 3 connectors or similar on the IP modules This provides excellent connection integrity and utilizes gold plating in the mating area Threaded metric M2 screws and spacers supp
29. he requested data Write Complete Time Time from FRAME active until LRDYi active 650nS Typical carrier register 750nS Typical 8 bit and 16 bit IP module write assuming 0 IP module wait states 1250nS Typical 32 bit IP module write assuming 0 IP module wait states Read Complete Time Time from FRAME active until LRDYi active 500nS Typical carrier register 650nS Typical 8 bit and 16 bit IP module read assuming 0 IP module wait states 1100nS Typical 32 bit IP module read assuming 0 IP module wait states ul re CN PClbus INTA interrupt signal Up to two requests sourced from each IP mapped to INTA Interrupt vectors come from IP modules via access to IP module INT space 32 bit Memory Space Upon power up the system auto configuration process plug amp play maps the carriers base address for a 1K byte block of memory into the PCI bus 32 bit Memory Space INDUSTRIAL I O PACK COMPLIANCE Specification 11111111111 This device meets or exceeds all written Industrial I O Pack specifications per ANSI VITA 4 1995 for 8MHz operation only Supports Type I and Type II ID space formats Electrical Mechanical Interface Carrier supports five single For APC8620 size IP modules A E or two double size and one single size IP module 32 bit IP modules are not supported Electrical Mechanical Interface Carrier supports three single Fo
30. ing up to five three for APC8621 industry standard IP module interfaces The carrier board s PCI bus interface allows an intelligent single board computer PCI bus Master to control and communicate with IP modules that are present on the PCI bus carrier IP module field I O connections link to the field I O connections of the carrier which in turn are used to connect field electronic hardware to the carrier board via ribbon cable The PCI bus and IP module logic commons have a direct electrical connection i e they are not electrically isolated However the field I O connections can be isolated from the PCI bus if an IP module that provides this isolation between the logic and field side is utilized A wide variety of IP modules are currently available from Acromag and other vendors that allow interface to many external devices for digital I O analog I O and communication applications PCI Bus Interface The carrier board s PCI bus interface is used to program and monitor carrier board registers for configuration and control of the board s documented modes of operation see section 3 In addition the PCI bus interface is also used to communicate with and control external devices that are connected to an IP module s field I O signals assuming an IP module is present on the carrier board The PCI bus interface is implemented in the logic of the carrier board s PCI bus target interface chip The PCI bus interface chip i
31. interrupt space of the IP module selected to be serviced Note that the interrupt space accessed must correspond to the interrupt request signal driven by the IP module 12 The carrier board will assert the INTSEL signal to the appropriate IP together with carrier board generated address bit A1 to select which interrupt request is being processed A1 low corresponds to INTREQO A1 high corresponds to INTREQ1 13 The IP module receives an active INTSEL signal from the carrier and supplies its interrupt vector to the host system during this interrupt acknowledge cycle An IP module designed to release its interrupt request on acknowledge will release its interrupt request upon receiving an active INTSEL signal from the carrier If the IP module is designed to release it s interrupt request on register access the interrupt service routine must access the required register to clear the interrupt request 14 Write End Of Interrupt command to PC AT s 8259 15 If the IP interrupt stimulus has been removed and no other IP modules have interrupts pending the interrupt cycle is completed i e the carrier board negates its interrupt request INTA 4 0 THEORY OF OPERATION This section describes the basic functionality of the circuitry used on the carrier board Refer to the Block Diagram shown in the Drawing 4501 673 as you review this material CARRIER BOARD OVERVIEW The carrier board is a PCI bus slave target board provid
32. ion Section for each IP module is located indicate a non recoverable error from the IP in the carrier board memory map per Table 3 3 Refer to the such as a component failure or hard wired documentation of your IP module for specific information about configuration error Refer to your IP specific each IP module s ID Space contents documentation to see if the error signal is supported and what it indicates Reset condition Set to 0 LSB D8 Not Time Out IPE IPE Used Interrupt Inti Into Pend Pend Pend Note Shaded areas not used by ACP8621 carrier all IP module Error signals are inactive This bit allows the user to monitor the Error signals INDUSTRIAL I O PACK SERIES APC8620 8621 PCI BUS CARRIER BOARD IP Module I O Space Read Write Only 256 Byte Addresses The I O space on each IP module is fixed at 128 16 bit words 256 bytes The five three for APC8621 IP module I O spaces are accessible at fixed offsets for the APC8620 8621 s Base Address IP modules may not fully decode their I O space and may use byte or word only accesses See each IP module s User Manual for details GENERATING INTERRUPTS Interrupt requests originate from the carrier board in the case of an access time out and from the IP modules Each IP may support 0 1 or 2 interrupt requests Upon an IP module interrupt request the carrier passes the interrupt request onto the host provided that the carrier board is enabled for interr
33. key to prevent improper installation Shipping Weight 1 0 pound 0 5Kg packaged TERMINATION PANEL MODEL 5025 552 Type Termination Panel For Carrier Boards Application To connect field I O signals to the Industrial I O Pack IP Termination Panel Acromag Part 4001 040 Phoenix Contact Type FLKM 50 The 5025 552 termination panel facilitates the connection of up to 50 field I O signals and connects to the carrier boards via a flat ribbon cable Model 5025 550 x or 5025 551 x The field connectors on the carrier board connect the I O signals to the P2 connector on each of the Industrial I O Pack modules Field signals are accessed via screw terminal strips The terminal strip markings on the termination panel 1 50 correspond to P2 pins 1 50 on the Industrial I O Pack IP Each Industrial I O Pack IP has its own unique P2 pin assignments Refer to the IP module manual for correct wiring connections to the termination panel Schematic and Physical Attributes See Drawing 4501 464 Field Wiring 50 position terminal blocks with screw clamps Wire range 12 to 26 AWG Connections to Carrier P1 50 pin male header with strain relief ejectors Use Acromag 5025 550 x or 5025 551 x cable to connect panel to carrier board Keep cable as short as possible to reduce noise and power loss Mounting Termination panel is snapped on the DIN mounting rail Printed Circuit Board Military grade FR 4 epoxy glass circuit board 0 063 inches
34. lied with Acromag IP modules provide additional stability for harsh environments see Drawing 4501 672 for assembly details Pin assignments for these connectors are defined by the IP module specification and are shown in Table 2 1 IP Logic Strobe Connectors Each IP module has an uncommitted Strobe signal on the logic interface connector pin 46 The Strobe signal may be used as an optional input or output from the IP module On the APC8620 the Strobe signals for each of the five IP modules are routed on the printed circuit board to the location just above the INDUSTRIAL I O PACK SERIES APC8620 8621 PCI BUS CARRIER BOARD IP module D and E field connectors as shown in Drawing 4501 671 On the APC8621 the Strobe signals for each of the three IP modules are routed on the printed circuit board to the location just above of IP module C field connector as shown in Drawing 4501 676 The factory default is to leave these signals unconnected Table 2 1 Standard IP Logic Interface Connections Pin Description Number Pin Description Number Do 4 IDSEL 29 De 1 6 MEMSEL 31 Da s mse 33 Dos 1 9 DMAck0 34 Dos _ to oset 35 Doe 13 DMAEnd 38 Asterisk is used to indicate an active low signal BOLD ITALIC Logic Lines are NOT USED by the carrier board PCI Bus Connections Table 2 2 indicates the pin assignments for the PCI bus signals at the card edge conn
35. mplements PCI specification version 2 1 as an interrupting slave including 8 bit and 16 bit data transfers to the IP modules The carrier board s PCI bus data transfer rates are shown in Table 2 3 Carrier Board Registers The carrier board registers presented in section 3 are implemented in the logic of the carrier board s FPGA An outline of the functions provided by the carrier board registers includes e Monitoring the error signal received from each IP module is possible via the IP Error Bit Enabling of PCI bus interrupt requests from each IP module is possible via the IP Module Interrupt Enable Bit e Enabling of interrupt generation upon an IP module access time out is implemented via the Time Out Interrupt Enable Bit e Monitoring an IP module access time out is possible via the IP Module Access Time Out Status Bit e Identify pending interrupts via the carrier s IP Module Interrupt Pending Bit e Lastly pending interrupts can be individually monitored via the IP Module Interrupt Pending register INDUSTRIAL I O PACK SERIES APC8620 8621 PCI BUS CARRIER BOARD IP Logic Interface The IP logic interface is also implemented in the logic of the carrier board s FPGA The carrier board implements ANSI VITA 4 1995 Industrial I O Pack logic interface specification and includes five three for APC8621 IP logic interfaces The PCI bus address and data lines are linked to the address and data of the IP logic interfa
36. noc no IMPORTANT SAFETY CONSIDERATIONS It is very important for the user to consider the possible adverse effects of power wiring component sensor or software failures in designing any type of control or monitoring system This is especially important where economic property loss or human life is involved It is important that the user employ satisfactory overall system design It is agreed between the Buyer and Acromag that this is the Buyer s responsibility 1 0 GENERAL INFORMATION The APC8620 8621 card is a personal computer Peripheral Component Interconnect PCI bus card and is a carrier for the Industrial I O Pack IP mezzanine board field I O modules The carrier board provides a modular approach to system assembly since each carrier can be populated with any combination of analog input output digital input output communication etc IP modules Thus the user can create a board which is customized to the application This saves money and space a single carrier board populated with IP modules may replace several dedicated function PCI bus boards The APC8620 8621 non intelligent carrier board provides impressive functionality at low cost Board Size Supported IP Operating Length Slots Temperature Range APC8620 12 283 5 A B C D E 0 to 70 C PCI BUS Interface APC8620E 12 2837 5 A B C D E 40 to 85 C Carrier Board Registers a APC8621 6 600 3 A B C 0 to 70 C
37. o the IP module A 16 bit or 8 bit PCI bus access results in a s ingle 16 bit or 8 bit access to the IP module respectively INDUSTRIAL I O PACK SERIES APC8620 8621 PCI BUS CARRIER BOARD Carrier Status Control Register Read Write Base 00H IP Interrupt Pending Register Read Base 02H The Carrier Board Status Register reflects and controls The IP Interrupt Pending Register is used to individually functions globally on the carrier board identify pending IP interrupts or a pending carrier generated interrupt as a result of IP module time out access If multiple IP BIT FUNCTION interrupts are pending software must determine the order in 15 09 Not Used which they are serviced MSB LSB D7 DO IPD IPD IPC IPC IPB IPB IPA IPA Int1 IntO Int1 Into Int1 Into Int1 IntO Pend Pend Pend Pend Pend Pend Pend Pend 08 Software Reset Write Writing a 1 to this bit causes a software reset Only Writing a 0 or reading this bit has no effect When set the software reset pulse will have a duration of 1u second Not Used IP Module Access Time Out Interrupt Pending This bit will be 1 when there is a IP Module Access Time Out interrupt pending This bit will be 0 when there is no interrupt pending Reset condition Set to 0 Writing a 1 to this bit will release the pending interrupt IP Module Access Time Out Status Status bit to indicated that the last IP module Where access has timed out This bit only
38. oading and power requirements Be sure that the system power supplies are able to accommodate the power requirements of the carrier board plus the installed IP modules within the voltage tolerances specified IMPORTANT Adequate air circulation must be provided to prevent a temperature rise above the maximum operating temperature The lack of air circulation within the computer chassis is a cause for some concern Most if not all computer chassis do not provide a fan for cooling of add in boards The dense packing of the IP modules to the carrier board alone results in elevated IP module and carrier board temperatures and the restricted air flow within the chassis aggravates this problem Adequate air circulation must be provided to prevent a temperature rise above the maximum operating temperature and to prolong the life of the electronics If the installation is in an industrial environment and the board is exposed to environmental air careful consideration should be given to air filtering BOARD CONFIGURATION The carrier board is plug and play compatible and as such its board addresses are automatically assigned by the system auto configuration routine upon power up The base address of the carrier board s configuration registers in memory space and I O space is assigned In addition the base address of the IP modules and carrier board registers are assigned in 32 bit memory space Power should be removed from the board wh
39. ocks of memory space the carrier requires It then programs the carrier s configuration registers with the unique memory address range assigned The configuration registers are also used to indicate that the PCI carrier requires an interrupt request line The system software then programs the configuration registers with the interrupt request line assigned to the PCI carrier Since this PCI carrier is relocatable and not hardwired in address space this carrier s device drive provided by Acromag uses the mapping information stored in the carrier s Configuration Space registers to determine where the carrier is mapped in memory space and which interrupt line will be used Configuration Transactions The PCI bus is designed to recognize certain UO accesses initiated by the host processor as a configuration access Configuration uses two 32 bit I O ports located at addresses OCF8 and OCFC hex These two ports are e 32 bit configuration address port occupying UO addresses OCF8 through OCFB hex e 32 bit configuration data port occupying I O addresses OCFC through OCFF hex Configuration space is accessed by writing a 32 bit long word into the configuration address port that specifies the PCI bus the carrier board on the bus and the configuration register on the carrier being accessed A read or write to the configuration data port will then cause the configuration address value to be translated to the requested configuration cycle on the
40. ontrol 0003 IP interrupt Pending Register _ 0002 0005 PA Interrupt 0 Select Space _ 0004 000F ___ IPC Interrupt 1 Select Space 000E 0011 TP D interrupt 0 Select Space 0010 0013 IP D interrupt 1 Select Space _ 0012 0015 IP E interrupt 0 Select Space _ 0014 0017 PE Interrupt 1 Select Space 0016 Base Address Hex Ks R High Byte Low Byte Address D15 Dos D07 DOO Hex y Not Used Not Used y 0041 IPA IPA 0040 y ID Space 1D Space y 0081 IPB 0080 y ID Space ID Space y 00C1 IPC 00C0 y ID Space ID Space y 0101 IPD IPD 0100 y ID Space ID Space 4 0141 IPE 0140 y ID Space ID Space y 0181 IPA 0180 y I O Space 1 0 Space y 0201 IP B 0200 y I O Space I O Space y 0281 IPC 0280 y I O Space I O Space AD 0301 IPD 0300 y 1 0 Space I O Space y 0381 IPE 0380 y I O Space 1 0 Space y Note Shaded areas not used by ACP8621 carrier The APC8620 8621 base address is determined through the PCI Configuration Registers The addresses given in Table 3 3 are relative to the base address of the APC8620 8621 carrier The addresses within each IP s own space are specific to that IP module Refer to the IP module s User Manual for information relating to the IP specific addressing The Carrier registers IP Identification ID spaces IP Input Output IO and IP Interrupt spaces are accessible via the PCI bus space as given in Tables 3 3 A 32 bit PCI bus access will result in two 16 bit accesses t
41. ould be used to interface to the IP input output modules 3 0 PROGRAMMING INFORMATION This Section provides the specific information necessary to program and operate the APC8620 8621 non intelligent carrier board This Acromag APC8620 8621 is a PCI Specification version 2 1 compliant PCI bus slave carrier board The carrier connects a PCI host bus to the IP module s 16 bit data bus per the Industrial I O Pack logic interface specification on the mezzanine IP boards which are installed on the carrier The PCI bus is defined to address three distinct address spaces I O memory and configuration space The IP modules can be accessed via the PCI bus memory space only The PCI card s configuration registers are initialized by system software at power up to configure the card The PCI carrier is a Plug and Play PCI card As a Plug and Play card the board s base address and system interrupt request line are not selected via jumpers but are assigned by system software upon power up via the configuration registers A PCI bus configuration access is used to access a PCI card s configuration registers PCI Configuration Address Space When the computer is first powered up the computer s system configuration software scans the PCI bus to determine what PCI devices are present The software also determines the configuration requirements of the PCI card The system software accesses the configuration registers to determine how many bl
42. r APC8621 size IP modules A C or one double size and one single size IP module 32 bit IP modules are not supported I O Space 16 bit and 8 bit Supports 128 byte values per IP module ID Gpace es 16 and 8 bit Supports Type 1 32 bytes per IP consecutive odd byte addresses Also supports Type II 32 words per IP via D16 data transfers Memory Space 11 111 Not Supported I nterrupiS 242 445 Supports two interrupt requests per IP and interrupt acknowledge cycles via access to IP INT space INDUSTRIAL I O PACK SERIES APC8620 8621 PCI BUS CARRIER BOARD ENVIRONMENTAL Operating Temperature 0 to 70 C 40 to 85 C E Versions Relative Humidity 5 95 non condensing Storage Temperature 55 to 100 C PCI bus and IP module logic commons have a direct electrical connection As such unless the IP module provides isolation between the logic and field side the field I O signals are not isolated from the PCI bus Radiated Field Immunity RFI Designed to comply with IEC1000 4 3 Level 3 10V m at frequencies 27MHz to 500MHz and European Norm EN50082 1 Non lsolated Electromagnetic Interference Immunity EMI 2 2 No digital upset under the influence of EMI from switching solenoids commutator motors and drill motors Electrostatic Discharge Immunity ESD 11
43. reflects the last IP module access All Bits A bit will be a 1 when the corresponding 0 if last IP module access did not time out IP Interrupt interrupt is pending A bit will be a 0 1 if last IP module access did time out Pending when its corresponding interrupt is not Time Out Interrupt Enable Read pending Polling this bit will reflect the IP When set to 1 this bit will enable the carrier module s pending interrupt status even if the IP interrupt enable bit is set to 0 board to generate an interrupt upon time out of STRA AG an IP module access The default setting or Geet gt SE Gr a G reset condition is 0 interrupt generation upon cleared if its correspond interrupt request time out disabled The interrupt service signal is inactive routine in responding to the Time Out Access interrupt will need to set this bit to 0 to clear IP Module Interrupt Space Read Only the pending interrupt request IP Module Interrupt Enable The Interrupt space for each IP module is fixed at two 16 bit When set to 1 this bit will enable the words Interrupt O select space is read typically by an interrupt generation of IP module interrupts The default service routine to respond to an interrupt request via the IP setting or reset condition is 0 IP module Module s INTREQO signal Likewise interrupt 1 select space is interrupt generation disabled Interrupts must read to respond to an interrupt r
44. t that the carrier s agent be present when the carton is opened If the carrier s agent is absent when the carton is opened and the contents of the carton are damaged keep the carton and packing material for the agent s inspection For repairs to a product damaged in shipment refer to the Acromag Service Policy to obtain return instructions It is suggested that salvageable shipping cartons and packing material be saved for future use in the event the product must be shipped INDUSTRIAL I O PACK SERIES APC8620 8621 PCI BUS CARRIER BOARD APC8621 IP module logic connectors and one PCI bus interface connector These interface connectors are discussed in the following sections This board is physically protected with packing material and electrically protected with an anti static bag during shipment It is recommended that the board be visually inspected for evidence of mishandling prior to applying power Y Carrier Field I O Connectors IP modules A through E CAUTION SENSITIVE ELECTRONIC DEVICES DO N T SHIP OR STORE NEAR STRONG ELECTROSTATIC ELECTROMAGNETIC MAGNETIC OR RADIOACTIVE FIELDS Field I O connections are made via 50 pin ribbon cable connectors A B C D and E A B and C for APC8621 for IP EE static sensitive modules in positions A through E A through C for APC8621 1P components and should only be handled at a static safe workstation CARD CAGE CONSIDERATIONS Refer to the specifications for l
45. uivalent Power Board power requirements are a function of the installed IP modules This specification lists currents for the carrier board only The carrier board provides 5V 12V and 12V power to each IP from the PCI bus Each IP module supply line is individually filtered and fused Fuses 5 volts 2 amp per slot 12 volts 1 amp per slot The power failure monitor circuit provides a reset to IP modules when the 5 volt power drops below 4 27 volts typically 4 15 volts minimum Currents specified are for the carrier board only for Models AP8620 8621 add the IP module currents for the total current required from each supply 5 Volts Gg 210mA Typical 300mA Maximum 12 Volts 5 11111111 OmA Not Used 12 Volts ac OmA Not Used PCI BUS COMPLIANCE Specification This device meets or exceeds all written PCI Local Bus specifications per revision 2 1 dated June 1995 Data Transfer Bus Slave with 32 bit 16 bit and 8 bit data transfer operation 32 bit read or write accesses are implemented as two 16 bit transfers to the IP modules PCI bus Write Cycle Time 150nS Typical measured from falling edge of FRAME to the falling edge of TRDY PCI bus Read Cycle Time 150nS Typical The carrier issues a RETRY which frees the PCI bus while the read request is completed The PCI bus will repeat the same read a4 a request until it completes with t
46. upts within the Carrier Board Status Register Sequence of Events For an Interrupt 1 Clear the interrupt enable bits in the Carrier Board Status Register by writing a 0 to bit 2 bit 3 2 Write interrupt vector to the location specified on the IP and perform any other IP specific configuration required do for each supported IP interrupt request 3 Determine the IRQ line assigned to the carrier during system configuration within the configuration register 4 Set up the PC AT s interrupt vector for the appropriate interrupt 5 Unmask the IRQ on the PC AT s 8259 interrupt controller 6 The IP asserts an interrupt request to the carrier board asserts interrupt request line IntReq0 or IntReq1 7 The carrier drives PCI bus interrupt request signal INTA active 8 PC AT s drives the IRQ line assigned to the active carrier 9 The interrupt service routine pointed to by the vector set up in step 4 starts 10 Interrupt service routine determines which IP module caused the interrupt by reading the carrier interrupt pending register If multiple interrupts are pending the interrupt service routine software determines which IP module to service first Ina PC interrupts are shared and can be from any slot on the backplane or from the mother board itself The driver must first check that the interrupt came from the PCI carrier by reading the carrier interrupt pending register 11 The interrupt service routine accesses the

USER`S MANUAL

Contents

Download Pdf Manuals

Related Search

Related Contents