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DAQ M Series User Manual

1. 1 Analog Input Analog Output 2 Digital 2 E Routing Bus 5 Digital 1 0 and Clock Interface Bis 5 Generation Counters RTSI J PFI National Instruments Corporation Figure 2 2 General M Series Block Diagram 2 1 M Series User Manual Chapter 2 DAQ System Overview DAQ STC2 and DAQ 6202 The DAQ STC2 and DAQ 6202 implement a high performance digital engine for M Series data acquisition hardware Some key features of this engine include the following e Flexible AI and AO sample and convert timing e Many triggering modes e Independent AI AO DI and DO FIFOs e Generation and routing of RTSI signals for multi device synchronization e Generation and routing of internal and external timing signals e Two flexible 32 bit counter timer modules with hardware gating e Digital waveform acquisition and generation e Static DIO signals e True 5 V high current drive DO e DI change detection e PLL for clock synchronization e Seamless interface to signal conditioning accessories e PCI PXT interface e Independent scatter gather DMA controllers for all acquisition and generation functions Calibration Circuitry M Series User Manual The M Series analog inputs and outputs have calibration circuitry to correct gain and offset errors You can calibrate the device to minimize AI and AO errors caused by time
2. Counter Value Buffer M Series User Manual Figure 7 34 Duplicate Count Prevention Example 7 36 ni com Chapter 7 Counters Even if the Source pulses are long the counter increments only once for each Source pulse Normally the counter value and Counter n Internal Output signals change synchronously to the Source signal With duplicate count prevention the counter value and Counter n Internal Output signals change synchronously to the 80 MHz Timebase Note that duplicate count prevention should only be used if the frequency of the Source signal is 20 MHz or less When To Use Duplicate Count Prevention You should use duplicate count prevention if the following conditions are true e You are making a counter measurement e You are using an external signal such as PFI x as the counter Source e The frequency of the external source is 20 MHz or less e You can have the counter value and output to change synchronously with the 80 MHz Timebase In all other cases you should not use duplicate count prevention Enabling Duplicate Count Prevention in NI DAQmx You can enable duplicate count prevention in NI DAQmx by setting the Enable Duplicate Count Prevention attribute property For specific information about finding the Enable Duplicate Count Prevention attribute property refer to the help file for the API you
3. gt to p_Al_ Convert tu POUT Figure B 7 Convert Clock Timing Diagram Table B 3 Convert Clock Timing Time Description Line Min ns Max ns tg Delay from _i to Sync Convert Clock Timebase PFI 6 4 15 9 RTSI 6 0 15 6 STAR 5 7 12 9 to Delay from _i to Convert Clock Timebase PFI 16 2 39 1 RTSI 16 0 38 8 STAR 15 5 36 1 tio Delay from Convert Clock Timebase to p_AI_Convert 6 0 13 0 ti Delay from Convert Clock Timebase to Convert Clock PFI 4 6 10 8 when exported to an external terminal POUT RTSI 4 6 10 5 i a p_Al_Convert aaa tye Figure B 8 Convert Clock and Any Internal Signal Timing Diagram National Instruments Corporation B 9 M Series User Manual Appendix B Timing Diagrams Table B 4 Convert Clock and Any Internal Signal Timing Time Description Line Min ns Max ns to _i to p_AI_ Convert in external PFI 22 2 52 1 convert mode RTSI 22 1 51 8 STAR 21 5 49 1 Start Trigger The Start Trigger is the signal that starts an AI acquisition This signal can come from an external source through an external terminal or from an internal source One possible internal source is a software generated pulse A multiplexer selects from all the possible sources all of them at _i level and outputs a signal called Selected Start Trigger Selected Start Trigger then gets sent to the two timing levels in the AI section the Convert Clock Ti
4. CTR_0_OUT CTR_1_GATE lt _ Interval p to Measure CTR_1_SOURCE JUUUUUUUU UU UU UU Figure 7 13 Method 3 Then route the Counter 0 Internal Output signal to the Gate input of Counter 1 You can route a signal of known frequency F2 to the Counter 1 Source input F2 can be 830MHzTimebase For signals that might be slower than 0 02 Hz use a slower known timebase Configure Counter 1 to perform a single pulse width measurement Suppose the result is that the pulse width is J periods of the F2 clock From Counter 0 the length of the pulse is N F1 From Counter 1 the length of the same pulse is J F2 Therefore the frequency of F1 is given by F1 F2 N J 7 12 ni com Chapter 7 Counters Choosing a Method for Measuring Frequency The best method to measure frequency depends on several factors including the expected frequency of the signal to measure the desired accuracy how many counters are available and how long the measurement can take e Method 1 uses only one counter It is a good method for many applications However the accuracy of the measurement decreases as the frequency increases Consider a frequency measurement on a 50 kHz signal using an 80 MHz Timebase This frequency corresponds to 1600 cycles of the 80 MHz Timebase Your measurement may return 1600 1 cycles depending on the phase of the signal with respect to the timebase As your frequency becomes lar
5. 7 7 Semi Period Measurement 7 8 Single Semi Period Measurement 7 8 Buffered Semi Period Measurement 7 8 Frequency Measurement ss 7 9 Choosing a Method for Measuring Frequency cee eeeeeeeeeeeee 7 13 Position Measurement reccsen a Lantos len eae ties 7 14 Measurements Using Quadrature Encoders cece eeeeeeeeeseeeeeees 7 14 Measurements Using Two Pulse Encoders 0 0 eeeeeseereeeeees 7 16 Buffered Sample Clock Position Measurement ceeeeeseeeeee 7 17 Two Signal Edge Separation Measurement 7 17 Single Two Signal Edge Separation Measurement eee 7 18 Buffered Two Signal Edge Separation Measurement 0 0 7 18 Counter Output Applications serment denim 7 19 Simple Pulse Generation ss 7 19 Single Pulse Generation 7 19 Single Pulse Generation with Start Trigger 7 20 Retriggerable Single Pulse Generation 7 20 Pulse Train G n ration sis ns mnt ti Ne de nt en 7 21 Continuous Pulse Train Generation eee ee eeeeseeeeeeeseeeeseeeees 7 21 Finite Pulse Train Generation 7 22 Frequency Generation meroes iaei ERE EE nine 7 23 Using the Frequency Generator 7 23 Frequency DiviSl n san eh nm Rien teen RS 7 24 Pulse G neration Tor ETS 5m de naine E
6. A 37 Figure A 16 USB 6225 Mass Termination Pinout A 40 Figure A 17 PCI PXI 6229 Pinout sien A 46 Figure A 18 USB 6229 Screw Terminal Pinout A 52 Figure A 19 USB 6229 BNC Top Panel and Pinout eee eee eeceeeeeeeeeeeeneeeees A 54 Figur A 27 PCI PXI 6250 Pinout sts ss nnn a A 61 Figure A 28 NI PCI PCIe PXI PXIe 625 1 Pinout A 66 Figure A 29 USB 6251 Screw Terminal Pinout A 70 Figure A 30 USB 6251 BNC Top Panel and Pinout cece eee eeeeeseeneeeees A 72 Figure A 39 USB 6251 Mass Termination Pinout A 80 Figure A 40 PCI PXI 6254 Pinout ss A 85 Figure A 41 PCI PXI 6255 Pinout ssh tiistlisnssssgaenttls menti A 91 Figure A 42 USB 6255 Screw Terminal Pinout A 97 Figure A 43 USB 6255 Mass Termination Pinout cceccssceeseeseeeceeteeeeeeseeneeeees A 100 Figure A 44 NI PCI PCIe PXI PXIe 6259 Pinout ss A 106 Figure A 45 USB 6259 Screw Terminal Pinout A 112 Figure A 46 USB 6259 BNC Top Panel and Pinout eee eeeeseceeeeeeneeeees A 114 Figure A 55 USB 6259 Mass Termination Pinout A 122 Figure A 56 PCI PXI 6280 Pinout ss A 127 Figure A 57 PCI PXI 6281 Pinout
7. ss 11 1 Triggering with an Analog Source ss 11 2 APFT lt 0 1 gt Terminal srs st nt nn ini diese 11 2 Analog Input Channels ss uses nt henri autes 11 3 Analog Trigger ACTIONS s es ai 11 3 Routing Analog Comparison Event to an Output Terminal 11 3 Analog Trig cer Type Skieni aE E a EEEE E T E AET VEE E 11 4 Analog Trisg r ACCUTACY erone ei a E guia E A A ets sen 11 7 National Instruments Corporation xi M Series User Manual Contents Appendix A Device Specific Information NI 6220 NI 6221 NI 6224 NI 6225 NI 6229 NI 6250 NI 6251 NI 6254 NI 6255 NI 6259 NI 6280 NI 6281 NI 6284 NI 6289 Appendix B Timing Diag Appendix C rams Troubleshooting Appendix D Upgrading from E Series to M Series Appendix E Technical Support and Professional Services Glossary Index M Series User Manual xii ni com Device Pinouts Contents Figure A 1 PCI PXI 6220 Pinout sisi A 3 Figure A 2 PCI PXI 6221 68 Pin Pinout 00 ee eee eseeeeeeeeseeeaeeeeeeseeneeeaes A 8 Figure A 3 PCI 6221 37 Pin Pinout s A 12 Figure A 4 USB 6221 Screw Terminal Pinout A 15 Figure A 5 USB 6221 BNC Top Panel and Pinout eee cece eseeeeeeneeneeeees A 17 Figure A 13 PCI PXI 6224 Pinout sense antennes A 25 Figure A 14 PCI PXI 6225 Pinout siisii isnie iiser aksesin A 31 Figure A 15 USB 6225 Screw Terminal Pinout
8. Figure 1 1 Applying the USB 62xx Screw Terminal Signal Label National Instruments Corporation 1 3 M Series User Manual Chapter 1 Getting Started USB Cable Strain Relief USB 622x 625x 628x Screw Terminal and USB 622x 625x 628x Mass Termination Devices Use the supplied strain relief hardware to provide strain relief for your USB cable Adhere the cable tie mount to the rear panel of the USB 62xx Screw Terminal or USB 62xx Mass Termination device as shown in Figure 1 2 Thread a zip tie through the cable tie mount and tighten around the USB cable Figure 1 2 USB Cable Strain Relief on USB 62xx Screw Terminal and USB 62xx Mass Termination Devices M Series User Manual 1 4 ni com Getting Started Chapter 1 in Figure 1 3 The strain relief holes can also be used as cable management holes on the end cap to provide strain relief for your USB cable as shown for signal wires to from the screw terminals and BNC connectors USB 622x 625x BNC Devices Thread a zip tie through two of the strain relief 3 Signal Wire Strain Relief USB Cable Strain Relief 2 Security Cable Slot 1 3 USB Cable Strain Relief on USB 62xx BNC Devices Figure 1 Panel Wall Mounting USB Device is an accessory you can use to mount the USB 62xx family of products to a Mounting Kit part number 780214 01 not included in your USB 62xx kit panel or wall USB 622x 625x 628x Device
9. Pause Trigger Selected Reference Trigger Reference Trigger Terminal Le 99 99 De Terminal e Terminal Start Trigger D e Terminal D L Selected Start Trigger K RTSI Terminal Pause Trigger SI Start Terminal SI Sample Clock Timebase Counter Sync Sample Clock Timebase Block H gt gt e gt Terminal gt SLTCy j p_Al_Convert o lt a ees ec SI2 Convert Clock Timebase Counter S12 TC O gt Dee Sync Convert Clock Timebase Sara 1 A Terminal 5 Selected Sample Clock e gt Terminal Figure B 18 Pause Trigger and the Analog Input Timing Engine M Series User Manual B 18 ni com Appendix B Timing Diagrams i ta gt Selected Pause Trigger M ara te piles 1 wei lgs Sync Convert Clock Timebase i t gt ta7 gt ter Pause Trigger o i tes 37 gt i o POUT Figure B 19 Pause Trigger Timing Diagram Table B 10 Pause Trigger Timing Time Description Line Min ns Max ns t34 _ito Selected Gate PFI 3 2 7 8 RTSI 3 0 7 5 STAR 2 5 4 9 t35 Selected Pause Trigger Setup Time 1 5 to Sync Convert Clock Timebase t36 Hold Sync Convert Clock Timebase 0 t37 Sync Convert Clock Timebase to Pause Trigger 0 6 2 6 t3g Pause Trigger Source in _i to POUT RTSI 1 1 3 1 Output Timing Output timing refers to the delays involved in exp
10. Al Sample Clock Delay From Start Trigger Figure 4 16 Al Sample Clock and Al Start Trigger Al Sample Clock Timebase Signal You can route any of the following signals to be the AI Sample Clock Timebase ai SampleClockTimebase signal e 20 MHz Timebase 100 kHz Timebase e PXICLK10 e RTSI lt 0 7 gt e PFI lt 0 15 gt e PXISTAR e Analog Comparison Event an analog trigger AI Sample Clock Timebase is not available as an output on the I O connector AI Sample Clock Timebase is divided down to provide one of the possible sources for AI Sample Clock You can configure the polarity selection for AI Sample Clock Timebase as either rising or falling edge Al Convert Clock Signal M Series User Manual Use the AI Convert Clock ai ConvertClock signal to initiate a single A D conversion on a single channel A sample controlled by the AI Sample Clock consists of one or more conversions You can specify either an internal or external signal as the source of AI Convert Clock You also can specify whether the measurement sample begins on the rising edge or falling edge of AI Convert Clock 4 30 ni com Chapter 4 Analog Input With NI DAQmx 7 4 and later the driver chooses the fastest conversion rate possible based on the speed of the A D converter and adds 10 Us of padding between each channel to allow for adequate settling time This scheme enables the channels to approximate simultaneous sampling a
11. Ti H 4 Tip Count TCT ER Buffer Figure 7 19 Buffered Position Measurement Two Signal Edge Separation Measurement Two signal edge separation measurement is similar to pulse width measurement except that there are two measurement signals Aux and Gate An active edge on the Aux input starts the counting and an active edge on the Gate input stops the counting You must arm a counter to begin a two edge separation measurement After the counter has been armed and an active edge occurs on the Aux input the counter counts the number of rising or falling edges on the Source The counter ignores additional edges on the Aux input The counter stops counting upon receiving an active edge on the Gate input The counter stores the count in a hardware save register National Instruments Corporation 7 17 M Series User Manual Chapter 7 Counters M Series User Manual You can configure the rising or falling edge of the Aux input to be the active edge You can configure the rising or falling edge of the Gate input to be the active edge Use this type of measurement to count events or measure the time that occurs between edges on two signals This type of measurement is sometimes referred to as start stop trigger measurement second gate measurement or A to B measurement Single Two Signal Edge Separation Measurement With single two signal edge separation measurement the c
12. toy SI Start Figure B 12 Sample Clock Timebase Timing Diagram Table B 6 Sample Clock Timebase Timing Time Description Line Min ns Max ns tig Delay to Selected Start Trigger PFI 3 4 8 8 RTSI 3 3 8 5 STAR 2 7 5 7 tio Selected Start Trigger Setup Hold Time 1 5 to Sync Sample Clock Timebase t20 Selected Start Trigger Setup Hold Time 0 to Sync Sample Clock Timebase toy Sync Sample Clock Timebase to SI_Start 0 9 2 2 National Instruments Corporation Reference Trigger Use the Reference Trigger to stop the acquisition It is normally used in pretrigger acquisitions it is necessary to acquire data before and after the trigger The Reference Trigger signals the time when the AI timing engine starts counting the number of posttrigger conversions to take before stopping The Reference Trigger can come from external or internal sources and its source is selected with a multiplexer Its output is called the Selected Reference Trigger B 13 M Series User Manual Appendix B Timing Diagrams Selected Reference Trigger Reference Trigger POUT Terminal veo Es Terminal o Terminal p Start Trigger ae Terminal D Selected Start Trigger RTSI Trail S Selected Pause Trigger D Pause Trigger SI Start Terminal e lt SI PP Sample Clock Timebase Counter Pr Sy
13. xZ AI GND N7 AI GND USB 62xx Device USB 62xx Device des ae GS o Floating Grounded i Soiree FS Source __9FS Figure A 7 Analog Input Circuitry National Instruments Corporation A 19 M Series User Manual Appendix Device Specific Information e Single Ended Mode For each BNC connector that you use for two single ended channels set the source type switch to the GS position This setting disconnects the built in ground reference resistor from the negative terminal of the BNC connector allowing the connector to be used as a single ended channel as shown in Figure A 8 Ground Ref Source GS USB 62xx BNC Device Figure A 8 Single Ended Channels When you set the source type to the GS position and configure the device for single ended input in software each BNC connector provides access to two single ended channels AI x and AI x 8 For example the BNC connector labeled AI 0 provides access to single ended channels AI 0 and AI 8 the BNC connector labeled AI 1 provides access to single ended channels AI 1 and AI 9 and so on Up to 16 single ended channels are available in single ended measurement modes For information on how to connect your signals in single ended mode AI GND and or AI SENSE refer to the Connecting Analog Input Signals section of Chapter 4 Analog Input For a detailed description of each signal refer to the I O Connector Signal Descriptions section
14. Figure A 29 USB 6251 Screw Terminal Pinout M Series User Manual A 70 ni com Appendix Device Specific Information Table A 15 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number Name CTR 0 SRC 81 PFI 8 CTR 0 GATE 83 PFI 9 CTR 0 AUX 85 PFI 10 CTR 0 OUT 89 PFI 12 CTROA 81 PFI 8 CTROZ 83 PFI 9 CTROB 85 PFI 10 CTR 1 SRC 76 PFI 3 CTR 1 GATE 77 PFI 4 CTR 1 AUX 87 PFI 11 CTR 1 OUT 91 PFI 13 CTRIA 76 PFI 3 CTRIZ 77 PFI 4 CTR 1B 87 PFI 11 FREQ OUT 93 PFI 14 Sy Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later USB 6251 Screw Terminal Specifications Refer to the NI 625x Specifications for more detailed information about the USB 6251 Screw Terminal device USB 6251 Screw Terminal LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6251 Screw Terminal LEDs USB 6251 Screw Terminal Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 3 Connector and LED Information for information about replacing the fuse on the USB 6251 Screw Terminal National Instruments Corporation A 71 M Series User Manual Appendix Device Specific Information USB 6251 BNC USB 6251 BNC Pinout Figure A 30 shows
15. 58 N A 57 N wo 56 N D 55 N 54 nN o 53 Hk Kej 52 51 xi 50 oo 49 En a 48 A 47 wo 46 N 45 44 o 43 o 42 41 40 39 38 37 36 35 sIDIo B GI I o DS AI8 Al1 Al GND Al1 Al3 Al GND Al 4 Al GND Al1 Al6 Al GND Al1 AO AO APFI 0 PO 4 D GND PO 1 PO 6 D GND 5V D GND D GND TERMINAL 35 PFI PF 0 CONNECTOR 0 Al 0 15 3 DO 5 TERMINAL 68 0 1 TERMINAL 34 TERMINAL 1 0 P1 0 1 P1 1 G4 D GND 5V D GND PF PF DG PFI PF PFI DIRES 6 P1 6 ND 9 P2 1 12 P2 4 14 P2 6 Figure A 57 PCI PXI 6281 Pinout A 132 ni com Appendix Device Specific Information Table A 27 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 PFI 10 CTR 0 OUT 2 PFI 12 CTROA 37 PFI 8 CTROZ 3 PFI 9 CTROB 45 PFI 10 CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR 1 OUT 40 PFI 13 CTRIA 42 PFI 3 CTRIZ 41 PFI 4 CTR 1B 46 PFI 11 FREQ OUT 1 PFI 14 Sy Note For more information about default NI DAQmx counter inputs refer to Connectin
16. M Series Device Configured in NRSE Mode Figure 4 11 Single Ended Connections for Ground Referenced Signal Sources NRSE Configuration AI and AIl must both remain within 11 V of AI GND To measure a single ended ground referenced signal source you must use the NRSE ground reference setting Connect the signal to one of AI lt 0 15 gt and connect the signal local ground reference to AI SENSE You also can connect the signal to one of AI lt 16 79 gt and connect the signal local ground reference to AI SENSE 2 AI SENSE or AI SENSE 2 is internally connected to the negative input of the NI PGIA Therefore the ground point of the signal connects to the negative input of the NI PGIA Any potential difference between the device ground and the signal ground appears as a common mode signal at both the positive and negative inputs of the NI PGIA and this difference is rejected by the amplifier If the input circuitry of a device were referenced to ground as it is in the RSE On NI 6225 devices the reference for each AI lt 16 63 gt signal is AI SENSE 2 and each AI lt 64 79 gt signal is AI SENSE in NRSE mode National Instruments Corporation 4 23 M Series User Manual Chapter 4 Analog Input ground reference setting this difference in ground potentials would appear as an error in the measured voltage Using the DAQ Assistant you can configure the channels for RSE or NRSE input modes Refer to the Configuri
17. National Instruments Corporation 4 31 M Series User Manual Chapter 4 Analog Input Routing Al Convert Clock Signal to an Output Terminal You can route AI Convert Clock as an active low signal out to any PFI lt 0 15 gt or RTSI lt 0 7 gt terminal All PFI terminals are configured as inputs by default Using a Delay from Sample Clock to Convert Clock When using an internally generated AI Convert Clock you also can specify a configurable delay from AI Sample Clock to the first AI Convert Clock pulse within the sample By default this delay is three ticks of AI Convert Clock Timebase Figure 4 17 shows the relationship of AI Sample Clock to AI Convert Clock Al Convert Clock Timebase Al Sample Clock Al Convert Clock e a gt Delay Convert From Period Sample Clock M Series User Manual Figure 4 17 Al Sample Clock and Al Convert Clock Other Timing Requirements The sample and conversion level timing of M Series devices work such that clock signals are gated off unless the proper timing requirements are met For example the device ignores both AI Sample Clock and AI Convert Clock until it receives a valid AI Start Trigger signal Once the device recognizes an AI Sample Clock pulse it ignores subsequent AI Sample Clock pulses until i
18. Signal_i To Internal Logic Selected Pause Trigger Sync Sample Clock Timebase Figure B 28 Pause Trigger Input Delay Path ee tooo Signal_i l i i i t m i 10 Selected Pause Trigger 11 ml 1 Ho Sync Sample Clock Timebase i gt Figure B 29 Pause Trigger Timing Diagram Table B 17 Pause Trigger Timing from Signal_i to Selected Pause Trigger Time From To Min ns Max ns to Signal _i Selected Pause Trigger LA 7 8 Table B 18 Pause Trigger Setup and Hold Timing Time Parameter Min ns Max ns tio Setup 1 5 ty Hold 0 Input Timing Verification Consider an application that uses an external trigger and an external clock The trigger and clock signals are routed to an internal D flip flop DFF To ensure that the trigger is sampled on a particular clock edge the setup and hold times of the internal DFF must be met e Recall that a terminal is a PFI pin RTSI pin or PXI_Star pin e Let TriggerDelay be the delay from the trigger terminal to the DFF e Let ClockDelay be the delay from the clock terminal to the DFF M Series User Manual B 26 ni com Appendix B Timing Diagrams Let DFF getup and DFFya be the setup and hold time of the DFF e Let Externalsetup and Externalg be the setup and hold time of the trigger to the clock at the terminals Figure B
19. measurement AUX _____ A GATE A A A SOURCE LI ir Counter Value 1 2 3 1 2 3 1 2 3 E 3 3 3 Buffer 3 3 Figure 7 21 Buffered Two Signal Edge Separation Measurement For information about connecting counter signals refer to the Default Counter Timer Pinouts section Counter Output Applications Simple Pulse Generation Single Pulse Generation The counter can output a single pulse The pulse appears on the Counter n Internal Output signal of the counter You can specify a delay from when the counter is armed to the beginning of the pulse The delay is measured in terms of a number of active edges of the Source input You can specify a pulse width The pulse width is also measured in terms of a number of active edges of the Source input You also can specify the active edge of the Source input rising or falling National Instruments Corporation 7 19 M Series User Manual Chapter 7 Counters M Series User Manual Figure 7 22 shows a generation of a pulse with a pulse delay of four and a pulse width of three using the rising edge of Source Counter Armed SOURCE PLL OUT Figure 7 22 Single Pulse Generation Single Pulse Generation with Start Trigger The counter can output a single pulse in response to one pulse on a hardware Start Trigger signal The puls
20. Connecting Signals to the USB 6251 BNC Analog Input You can use each analog input BNC connector for one signal in differential mode or two signals in single ended mode e Differential Mode To connect signals in differential mode determine the type of signal source you are using a floating signal FS source or a ground referenced signal GS source Refer to the Connecting Analog Input Signals section of Chapter 4 Analog Input for more information National Instruments Corporation A 73 M Series User Manual Appendix Device Specific Information M Series User Manual To measure a floating signal source move the switch to the FS position To measure a ground referenced signal source move the switch to the GS position Figure A 31 shows the AI 0 BNC and corresponding FS GS switch on the top panel of the USB 6251 BNC AIO aS FS GS Figure A 31 FS GS Switch Figure A 32 shows the analog input circuitry on the USB 6251 BNC When the switch is set to the FS position AI x is grounded through a 0 1 UF capacitor in parallel with a 5 KQ resistor O e AI Xx O o AI x Aix Aix i oGS o GS i Floating Grounded i Source FS Source frs otpF 35kQ O4uF gt SSk i V7 AI GND 7 AI GND USB 62xx Device USB 62xx Device Figure A 32 Analog Input Circuitry A 74 ni com Appendix
21. F Fli sn 1 2 3 4 5 SOURCE Counter Value 0 Figure 7 2 Single Point On Demand Edge Counting You also can use a pause trigger to pause or gate the counter When the pause trigger is active the counter ignores edges on its Source input When the pause trigger is inactive the counter counts edges normally You can route the pause trigger to the Gate input of the counter You can configure the counter to pause counting when the pause trigger is high or when it is low Figure 7 3 shows an example of on demand edge counting with a pause trigger 7 2 ni com Chapter 7 Counters Counter Armed l Pause Trigger Pause When Low lt ia source TLL ALALALILI LAAT 10 1 2 3 4 5 Counter Value 0 Figure 7 3 Single Point On Demand Edge Counting with Pause Trigger Buffered Sample Clock Edge Counting With buffered edge counting edge counting using a sample clock the counter counts the number of edges on the Source input after the counter is armed The value of the counter is sampled on each active edge of a sample clock A DMA controller transfers the sampled values to host memory The count values returned are the cumulative counts since the counter armed event That is the sample clock does not reset the counter You can route the counter sample clock to the Gate input of the counter You can configure the counter to sample on the rising or fall
22. Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more information about custom cabling solutions USB 6289 Mass Termination LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6289 Mass Termination LEDs USB 6289 Mass Termination Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 3 Connector and LED Information for information about replacing the fuse on the USB 6289 Mass Termination NI recommends that you use the SH68 68 EPM cable however an SH68 68 EP cable will work with M Series devices M Series User Manual A 162 ni com Timing Diagrams This appendix contains detailed timing information and diagrams for the M Series device blocks Analog Input Timing Diagrams Analog Output Timing Diagrams Digital 1 0 Timing Diagrams Counters Timing Diagrams Clock Generation Timing Diagrams Analog Input Timing Diagrams The following sections describe the timing specifications and timing of the triggers and clock signals related to the analog input timing engine National Instruments Corporation Input Timing Input timing relates to any signal external to the M Series devicethat is used as a clock or a trigger This timing describes the delays involved with importing the external signal into the device Internal Timing Internal timing describes the relationship between internal signa
23. Default Connector 0 Pin Number Counter Timer Signal Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 PFI 10 CTR 0 OUT 2 PFI 12 CTROA 37 PFI 8 CTROZ 3 PFI 9 CTROB 45 PFI 10 CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR 1 OUT 40 PFI 13 CTR 1 A 42 PFI 3 CTRIZ 41 PFI 4 CTR1IB 46 PFI 11 FREQ OUT 1 PFI 14 AJA Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later PCI PXI 6255 Specifications Refer to the M 625x Specifications for more detailed information about the PCI PXI 6255 device PCI PXI 6255 Accessory and Cabling Options This section describes some cable and accessory options for the PCI PXI 6255 Refer to ni com for other accessory options including new devices M Series User Manual A 92 ni com Appendix Device Specific Information SCXI Accessories SCXI is a programmable signal conditioning system designed for measurement and automation applications To connect your M Series device to an SCXI chassis use the SCXI 1349 adapter and an SHC68 68 EPM cable Use Connector 0 of your M Series device to control SCXI Connector 1 cannot be used to control SCXI SCC Accessories SCC provides portable modular signal conditioning to your DAQ system To connect your M Series device to an SCC module carrier such as the SC 2345 SC 2350 or SCC
24. Device Specific Information e Single Ended Mode For each BNC connector that you use for two single ended channels set the source type switch to the GS position This setting disconnects the built in ground reference resistor from the negative terminal of the BNC connector allowing the connector to be used as a single ended channel as shown in Figure A 33 Ground Ref Source GS Figure A 33 Single Ended Channels When you set the source type to the GS position and configure the device for single ended input in software each BNC connector provides access to two single ended channels AI x and AI x 8 For example the BNC connector labeled AI 0 provides access to single ended channels AI 0 and AI 8 the BNC connector labeled AI 1 provides access to single ended channels AI 1 and AI 9 and so on Up to 16 single ended channels are available in single ended measurement modes For information on how to connect your signals in single ended mode AI GND and or AI SENSE refer to the Connecting Analog Input Signals section of Chapter 4 Analog Input For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information Analog Output You can access analog output signals on the BNC connectors labeled AO 0 and AO 1 Figure A 34 shows the analog output circuitry on the USB 6251 BNC as 7 AO GND NF Figure A 34 A
25. e CB 37F LP Low profile connector block with 37 screw terminals RTSI Cables Use RTSI bus cables to connect timing and synchronization signals among PCI devices such as M Series E Series CAN and other measurement vision and motion devices Cables In most applications you can use the following cables e SH37F 37M 1 37 pin female to male shielded I O cable 1 m e SH37F 37M 2 37 pin female to male shielded I O cable 2 m Custom Cabling and Connectivity Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more information about custom cabling solutions A 14 ni com USB 6221 Screw Terminal Appendix USB 6221 Screw Terminal Pinout Figure A 4 shows the pinout of the USB 6221 Screw Terminal Device Specific Information For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information AIO AI8 AI GND Al 1 AlQ Al GND Al2 Al 10 Al GND Al3 Al 11 Al GND AISENSE 13 Al GND AO 0 AO GND oo M O O1 R CO ND 14 15 16 NC No Connect PO 0 PO 1 PO 2 PO 3 PO 4 PO 5 PO 6 PO 7 PFI 0 P1 0 PFI 1 P1 1 PFI 2 P1 2 PFI 3 P1 3 PFI 4 P1 4 PFI 5 P1 5 PFI 6 P1 6 PFI 7 P1 7 DODODODOODDOODODO PFI 8 P2 0 D GND PFI 9 P2 1 D GND PFI 10 P2 2 D GND
26. A162 y 57 23 Al 15 TERMINAL 68 fl i TERMINAL 35 AI6t 12 461 A153 AI GND 56 22 AOO AI 52 13 47 A160 AO GND 55 21 AO1 TERMINAL 34 f TERMINAL1 A151 14148 A159 AO GND 54 20 APFIO AI 58 15 49 A150 D GND 53 19 P0 4 Al 49 16 50 A157 P0 0 52 18 D GND Al 48 17 51 alse P0 5 51 17 Po 1 Al 47 18 52 A139 D GND 50 16 P0 6 AI 38 19 53 Al 46 P0 2 49 15 D GND Al 37 20 54 Al 45 PO 7 48 14 5V AI 44 21155 alse P0 3 47 13 D GND TERMINAL TERMINAL 34 AT ND 22 56 Al SENSE 2 PFI 11 P2 3 46 12 D GND TERMINAL 35 Its ell TERMINAL 68 AI 35 23 57 Al 43 PFI 10 P2 2 45 11 PFIO P1 0 AI 34 2458 AI 42 D GND 44 10 PFI1 P1 1 OQO AI 41 25 59 A1 33 PFI 2 P1 2 43 9 D GND AI 32 26 60 AI 40 PFI 3 P1 3 42 8 45V Al 23 27161 A134 PFI 4 P1 4 41 7 DGND AI 30 28 62 A1 22 PFI 13 P2 5 40 6 PFIS5 P1 5 AI 21 29 63 A1 29 PFI 15 P2 7 39 5 PFI6 P1 6 AI 20 30 64 A1 28 PFI 7 P1 7 38 4 D GND Al 27 31165 A119 PFI 8 P2 0 37 3 PFI9 P2 1 Al 18 32 66 A1 26 D GND 36 2 PFI12 P2 4 Al 17 33167 A125 D GND 35 1 PFI14 P2 6 AI 24 34 68 AI 16 ss Le NC No Connect Figure A 41 PCI PXI 6255 Pinout National Instruments Corporation A 91 M Series User Manual Appendix Device Specific Information Table A 19 Default NI DAQmx Counter Timer Pins
27. Provides BNC connectivity to all analog signals some digital signals and spring terminals for other digital signals e BNC 2111 Provides BNC connectivity to 16 single ended analog input signals two analog output signals five DIO PFI signals and the external reference voltage for analog output e BNC 2120 Similar to the BNC 2110 and also has a built in function generator quadrature encoder temperature reference and thermocouple connector e BNC 2090A Desktop rack mountable device with 22 BNCs for connecting analog digital and timing signals Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks Use an SH68 68 EPM shielded cable to connect an M Series device to a connector block such as the following e CB 68LP and CB 68LPR unshielded connector blocks e SCC 68 I O connector block with screw terminals general breadboard area bus terminals and four expansion slots for SCC signal conditioning modules e SCB 68 shielded connector block with temperature sensor e TBX 68 DIN rail mountable connector block National Instruments Corporation A 141 M Series User Manual Appendix Device Specific Information Cables In most applications you can use the following cables e SH68 68 EPM High performance cable with individual bundles separating analog and digital signals Each differential analog input channel is routed on an individually shielded twisted pair of
28. Table 8 1 Filters Filtered Input N Filter Clocks Pulse Width Pulse Width Needed to Guaranteed to Guaranteed to Filter Setting Pass Signal Pass Filter Not Pass Filter 125 ns 5 125 ns 100 ns 6 425 us 257 6 425 us 6 400 us 2 56 ms 101 800 2 56 ms 2 54 ms Disabled The filter setting for each input can be configured independently On power up the filters are disabled Figure 8 3 shows an example of a low to high transition on an input that has its filter set to 125 ns N 5 RTSI PFI or PXI_STAR Terminal Filtered input goes high when terminal Filter Clock 1 1 2 3 4 1 2 3 4 5 is sampled high on 40 MHz five consecutive filter i clocks National Instruments Corporation 8 5 Figure 8 3 Filter Example Enabling filters introduces jitter on the input signal For the 125 ns and 6 425 us filter settings the jitter is up to 25 ns On the 2 56 ms setting the jitter is up to 10 025 us When a PFI input is routed directly to RTSI or a RTSI input is routed directly to PFI the M Series device does not use the filtered version of the input signal Refer to the KnowledgeBase document Digital Filtering with M Series and CompactDAQ for more information about digital filters and counters To access this KnowledgeBase go to ni com info and enter the info code rddfms
29. USB 6225 Screw Terminal LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6225 Screw Terminal LEDs USB 6225 Screw Terminal Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 3 Connector and LED Information for information about replacing the fuse on the USB 6225 Screw Terminal A 38 ni com Appendix Device Specific Information USB 6225 Mass Termination USB 6225 Mass Termination Pinout Figure A 16 shows the pinout of the USB 6225 Mass Termination device For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information ay Note M Series devices may be used with most E Series accessories However some E Series accessories use different terminal names Refer to the M Series and E Series Pinout Comparison section of Chapter 3 Connector and LED Information for more information National Instruments Corporation A 39 M Series User Manual Appendix Device Specific Information a Al 24 Al 16 Al 8 amp 34 AIO Al 17 Al 25 Al1 33 Al GND Al 18 Al 26 Al GND 32 Alg Al 27 Al 19 Al 10 31 Al 2 Al 20 Al 28 Al3 30 Al GND Al 21 Al 29 Al GND 29 Al 11 Al 30 Al 22 Al 4 28 Al SENSE Al 23 Al 31 Al GND 27 Al 12 A
30. ni com IRQ as a transfer method 10 4 changing data transfer methods 10 5 K KnowledgeBase E 1 L LabVIEW documentation xvii LabWindows CVI documentation xviii LED patterns USB 6221 BNC A 23 USB 6221 Screw Terminal A 16 USB 6225 Mass Termination A 44 JSB 6225 Screw Terminal A 38 JSB 6229 BNC A 59 SB 6229 Screw Terminal A 53 SB 6251 BNC A 78 SB 6251 Mass Termination A 83 SB 6251 Screw Terminal A 71 JSB 6255 Mass Termination A 104 JSB 6255 Screw Terminal A 98 USB 6259 BNC A 120 USB 6259 Mass Termination A 125 USB 6259 Screw Terminal A 113 USB 6281 Mass Termination A 142 USB 6281 Screw Terminal A 137 USB 6289 Mass Termination A 162 USB 6289 Screw Terminal A 157 LED patterns USB devices 3 14 Linux xvii GG qaag CE low impedance sources 4 7 lowpass filter analog input 4 4 M Series and E Series accessories D 1 differences from E Series D 1 National Instruments Corporation 1 9 Index information A 1 migrating applications to D 1 pinout comparison versus E Series 3 4 specifications xx A 1 upgrading to D 1 Mac OS X xvii Measurement Studio documentation xviii measurements buffered period 7 7 buffered pulse width 7 5 buffered semi period 7 8 buffered two signal edge separation 7 18 choosing frequency 7 13 frequency 7 9 period 7 6 position 7 14 pulse width 7 4 semi period 7 8 single period 7 6 single pulse width 7 4 single semi period 7 8
31. ts 1 lt _____ oo Figure B 46 Counter n Source Timing Requirements Table B 30 Counter n Source Timing Time Description Synchronization Mode Min ns Max ns ts Counter n Source Period 80 MHz Source 12 5 Other Internal Source 25 0 External Source 50 0 National Instruments Corporation B 39 M Series User Manual Appendix B Timing Diagrams Table B 30 Counter n Source Timing Time Description Synchronization Mode Min ns Max ns ts Counter n Source Pulse Width 80 MHz Source 6 2 Other Internal Source 12 5 External Source 16 0 The times in this table are measured at the pin of the M Series device For example ts specifies the minimum period of a signal driving a PFI RTSI or PXI_STAR pin when that signal is internally routed to Counter n Source Gate Pulse Width Figure B 47 and Table B 31 show the timing requirements for Counter n Gate The requirements depend on the gating mode 1 t7 1 lt gt Counter n Gate Figure B 47 Counter n Gate Pulse Width Timing Diagram Table B 31 Counter n Gate Pulse Width Timing Time Description Gating Mode Min ns Max ns t Counter n Gate Pulse Width Edge 12 0 Counter n Gate Pulse Width Level One Source Period The times in this table are measured at the pin o
32. 4 29 Routing AI Sample Clock Signal to an Output Terminal 4 29 Other Timing Requirements ss 4 29 AI Sample Clock Timebase Signal 4 30 Al Convert Clock Signal ss isss ira a sass 4 30 Using an Internal Source 4 31 Using an External Source shit tin 4 31 Routing AI Convert Clock Signal to an Output Terminal 4 32 Using a Delay from Sample Clock to Convert Clock 4 32 Other Timing Requirements 4 32 AI Convert Clock Timebase Signal 4 34 AI Hold Complete Event Signal 4 35 ATStart Trigger Sigmal cs ccsssefescesssthsessdes Moses ccbasdesessaesctasessconsdes cassssvaneesecnentas 4 35 Using a Digital Source oo eee ee eseeeseceeeeseeeeeeseceeeseteeeeseseeeeaees 4 35 Using an Analog Source este ist 4 36 Routing AI Start Trigger to an Output Terminal 0 0 4 36 AT Reference Trigger Signal sviitit scesigsedeasessasescsscatsoutsasaossedeas 4 36 Using a Digital Source 4 37 Using an Analog Source see sheet lise 4 37 Routing AI Reference Trigger Signal to an Output Terminal 4 37 AT Pause Trigger Signal sis dis its asapssbaseseasestas 4 38 Using a Digital Source 4 38 Using an Analog Source cs csc sccaseiiscoveds acest seseasssyecedeacsstd ovoessesezees 4 38 Routing AI Pause Trigger Signal to an Output Terminal 0 00 4 38 Getting Started with AI Applications in Software 4 38
33. Al9 Al2 Al GND Al 11 Al SENSE Al 12 AI5 AI GND Al 14 Al7 Al GND NC NC D GND PO 0 ROIS D GND PO 2 PO 7 PO 3 PFI 11 P2 3 PFI 10 P2 2 D GND PFI 2 P1 2 PFI 3 P1 3 PFI 4 P1 4 PFI 13 P2 5 PE S Retz PFI 7 P1 7 PFI 8 P2 0 D GND D GND AI 8 Al 1 AI GND Al 10 Al3 Al GND Al 4 Al GND Al 13 Al 6 Al GND Al 15 NC NC NC PO 4 D GND PO 1 P0 6 D GND 5V D GND D GND PFI 0 P1 0 PEIM P11 D GND 5 V D GND PFIS P15 PFI 6 P1 6 D GND PFI 9 P2 1 PFI 12 P2 4 PFI 14 P2 6 NC No Connect TERMINAL 68 N O aineeton 0 TERMINAL 34 TERMINAL 35 TERMINAL 1 Q4 National Instruments Corporation Figure A 1 PCI PXI 6220 Pinout M Series User Manual Appendix Device Specific Information Table A 1 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 PFI 10 CTR 0 OUT 2 PFI 12 CTROA 37 PFI 8 CTROZ 3 PFI 9 CTROB 45 PFI 10 CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR 1 OUT 40 PFI 13 CTR 1 A 42 PFI 3 CTRIZ 41 PFI 4 CTR 1B 46 PFI 11 FREQ OUT 1 PFI 14 3 Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later PCI
34. Buffered In a buffered acquisition data is moved from a PC buffer to the DAQ device s onboard FIFO using DMA or interrupts for NI PCI PCIe PXT PXIe devices or USB Signal Streams for USB devices before it is written to the DACs one sample at a time Buffered acquisitions typically allow for much faster transfer rates than non buffered acquisitions because data is moved in large blocks rather than one point at a time One property of buffered I O operations is the sample mode The sample mode can be either finite or continuous 5 4 ni com Chapter 5 Analog Output Finite sample mode generation refers to the generation of a specific predetermined number of data samples Once the specified number of samples has been written out the generation stops Continuous generation refers to the generation of an unspecified number of samples Instead of generating a set number of data samples and stopping a continuous generation continues until you stop the operation There are several different methods of continuous generation that control what data is written These methods are regeneration FIFO regeneration and non regeneration modes Regeneration is the repetition of the data that is already in the buffer Standard regeneration is when data from the PC buffer is continually downloaded to the FIFO to be written out New data can be written to the PC buffer at any time without disrupting the output With FIFO regeneration the entire buff
35. CAN and other measurement vision and motion devices Since PXI devices use PXI backplane signals for timing and synchronization no cables are required Cables In most applications you can use the following cables e SHC68 68 EPM High performance cable designed specifically for M Series devices It has individual bundles separating analog and digital signals Each differential analog input channel is routed on an individually shielded twisted pair of wires Analog outputs are also individually shielded e SHC68 68 Lower cost shielded cable with 34 twisted pairs of wire e RC68 68 Highly flexible unshielded ribbon cable Custom Cabling and Connectivity The CA 1000 is a configurable enclosure that gives user defined connectivity and flexibility through customized panelettes Visit ni com for more information about the CA 1000 Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more information about custom cabling solutions NI recommends that you use the SHC68 68 EPM cable however an SHC68 68 EP cable will work with M Series devices M Series User Manual A 6 ni com Appendix Device Specific Information NI 6221 The following sections contain information about the PCI PXI 6221 68 pin PCI 6221 37 pin USB 6221 Screw Terminal and USB 6221 BNC devices PCI PXI 6221 68 Pin PCI PXI 6221 68 Pin Pinout Figure A 2 shows the pinout of the PCI PXI 6221 68 pin device Fo
36. CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR 1 OUT 40 PFI 13 CTRIA 42 PFI 3 CTRIZ 41 PFI 4 CTR 1B 46 PFI 11 FREQ OUT 1 PFI 14 Sy Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later NI PCI PCle PXI PXle 6251 Specifications Refer to the NI 625x Specifications for more detailed information about the NI PCI PCIe PXI PXIe 6251 device NI PCI PCle PXI PXle 6251 Accessory and Cabling Options This section describes some cable and accessory options for M Series devices with one 68 pin connector such as the NI PCI PCIe PXI PXIe 6251 Refer to ni com for other accessory options including new devices National Instruments Corporation A 67 M Series User Manual Appendix Device Specific Information SCXI Accessories SCXI is a programmable signal conditioning system designed for measurement and automation applications To connect your M Series device to an SCXI chassis use the SCXI 1349 adapter and an SHC68 68 EPM cable You also can use an M Series device to control the SCXI section of a PXI SCXI combination chassis such as the PXI 1010 or PXI 1011 The M Series device in the rightmost PXI slot controls the SCXI devices No cables or adapters are necessary Refer to the SCXT Advisor available by going to ni com info and entering the info code rdscad for more information S
37. CTROB 45 PFI 10 CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR 1 OUT 40 PFI 13 CTR 1 A 42 PFI 3 CTRIZ 41 PFI 4 CTR 1B 46 PFI 11 FREQ OUT 1 PFI 14 3 Note For more information about default NI DAQmx counter inputs refer to Connecting Table A 29 Default NI DAQmx Counter Timer Pins Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later M Series User Manual USB 6281 Mass Termination Specifications Refer to the M 628x Specifications for more detailed information about the USB 6281 Mass Termination device USB 6281 Mass Termination Accessory and Cabling Options This section describes some cable and accessory options for M Series devices with one 68 pin connector such as the USB 6281 Mass Termination device Refer to ni com for other accessory options including new devices A 140 Appendix Device Specific Information SCC Accessories SCC provides portable modular signal conditioning to your DAQ system To connect your M Series device to an SCC module carrier such as the SC 2345 SC 2350 or SCC 68 use an SH68 68 EPM shielded cable Refer to the SCC Advisor available by going to ni com info and entering the info code rdscav for more information BNC Accessories You can use the SH68 68 EPM shielded cable to connect your DAQ device to BNC accessories such as the following e BNC 2110
38. Chapter 5 Analog Output AO Offset and AO Reference Selection 5 2 Minimizing Glitches on the Output Signal 5 3 Analog Output Data Generation Methods ss 5 4 Analog Output Triggering sise 5 5 Connecting Analog Output Signals ss 5 6 Analog Output Timing Signals ss 5 6 National Instruments Corporation vij M Series User Manual Contents AO Start Trigger Signaler Mean Ruth Rares 5 7 Using a Digital SOUTE cirine its 5 7 Using an Analog Source 5 7 Routing AO Start Trigger Signal to an Output Terminal 5 8 AO Pause Trigger Signal cose eds sbasstessaasasanbes iii Must oud sveuacaeviay 5 8 Using a Digital Source sic iii ie aa an themit 5 9 Using an Analog Source 5 9 Routing AO Pause Trigger Signal to an Output Terminal 5 9 AO Sample Clock Signal jcccsoi cesss cede cctstiesessehesevede sed lbeses n 5 10 Using an Internal Source wo eee iesenii iniinis iesesta 5 10 Using an External Source oo inene 5 10 Routing AO Sample Clock Signal to an Output Terminal 5 10 Other Timing Requirement 5 10 AO Sample Clock Timebase Signal 5 11 Getting Started with AO Applications in Software 5 12 Chapter 6 Digital 1 0 Static DIO se enr me nes ne et nn RS N a nn et TS 6 2 Disita Waveform Tnigg rint s Listes inner 6 3 Digital Waveform Acquisition ses 6 4 DISample Clock Sibnal s semaine ut tn ann nine 6 4 Using an Internal Source wo ee
39. For signals that might be slower than 0 02 Hz use a slower known timebase You can configure the counter to make K 1 buffered period measurements Recall that the first period measurement in the buffer should be discarded Average the remaining K period measurements to determine the average period of F1 The frequency of F1 is the inverse of the average period Figure 7 11 illustrates this method Intervals Measured Ty To mee TK F1 Gat Gate Fi Ft 1 Source V2 Nilsa Na sie as Nx et MMA Buffered Period Measurement N N 1 A Peri fF1 _ _ X verage Period o K Fi K x Ft Frequency of F1 _ N N NW Figure 7 11 Method 1b 7 10 ni com Chapter 7 Counters Method 2 Measure High Frequency with Two Counters lIn this method you measure one pulse of a known width using your signal and derive the frequency of your signal from the result This method is good for high frequency signals In this method you route a pulse of known duration T to the Gate of a counter You can generate the pulse using a second counter You also can generate the pulse externally and connect it to a PFI or RTSI terminal You only need to use one counter if you generate the pulse externally Route the signal to measure F1 to the Source of the counter Configure the counter for a single pulse width measurement If you measure t
40. Highly flexible unshielded ribbon cable Custom Cabling and Connectivity The CA 1000 is a configurable enclosure that gives user defined connectivity and flexibility through customized panelettes Visit ni com for more information about the CA 1000 Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more information about custom cabling solutions NI recommends that you use the SHC68 68 EPM cable however an SHC68 68 EP cable will work with M Series devices National Instruments Corporation A 11 M Series User Manual Appendix PCI 6221 37 Pin M Series User Manual Device Specific Information PCI 6221 37 Pin Pinout Figure A 3 shows the pinout of the PCI 6221 37 pin device For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information AIO AI 9 AI GND Al 10 Al3 Al 4 Al 13 Al SENSE Al 14 Al 15 AO GND AO 0 PFI 0 P1 0 D GND PFI 3 P1 3 D GND PFI 6 P1 6 D GND PO 1 j slele felelsfelr D alfa AJ a oO N o La Al8 amp Al 1 Al2 Al 11 Al GND Al 12 AI5 Al6 Al7 NC AO 1 AO GND PFI 1 P1 1 PFI 2 P1 2 PFI 4 P1 4 PFI 5 P1 5 PFI 7 P1 7 PO 0 NC No Connect Figure A 3 PCI 6221 3
41. PFI PF 2 P1 2 3 P1 3 4 P1 4 13 P2 5 15 P2 7 7 P1 7 8 P2 0 D GND D GND aw 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25 58 D A 57 N w 56 N D 55 D 54 D o 53 x 52 51 50 oo 49 a 48 A 47 wo 46 D 45 k 44 o 43 42 41 40 39 38 37 36 35 sIDIo BR IGI pe Al 8 Al 1 Al GND Al1 Al3 Al GND Al 4 Al GND Al1 Al6 Al GND Al1 AO 0 AO 1 APFI 0 PO 4 DG PO 1 P0 6 DG 5V DG DG PF PF DG 5V DG PF PFI DG PFI PF PFI 0 3 N CONNECTOR 0 AI 0 15 5 TERMINAL 68 TERMINAL 34 ND ND ND ND 0 P1 0 1 P1 1 ND TERMINAL 35 TERMINAL 1 Q4 ND 5 P1 5 6 P1 6 ND 9 P2 1 12 P2 4 14 P2 6 Figure A 28 NI PCI PCle PXI PXle 6251 Pinout A 66 ni com Appendix Device Specific Information Table A 14 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 PFI 10 CTR 0 OUT 2 PFI 12 CTROA 37 PFI 8 CTROZ 3 PFI 9 CTROB 45 PFI 10
42. PO 5 PO 6 PO 7 D GND PFI 8 P2 0 Figure A 11 USER 1 and USER 2 BNC Connections M Series User Manual A 22 ni com Appendix Device Specific Information Figure A 12 shows an example of how to use the USER 1 and USER 2 BNCs To access the PFI 8 signal from a BNC connect USER 1 on the screw terminal block to PFI 8 with a wire USER 1 BNC Internal SV D GND Connection PFI8 P03 ne Signal D GND P0 4 P0 5 P0 6 PO 7 Screw D GND Terminal PFI 8 P2 0 Block Figure A 12 Connecting PFI 8 to USER 1 BNC The designated space below each USER lt 1 2 gt BNC is for marking or labeling signal names USB 6221 BNC Specifications Refer to the NI 622x Specifications for more detailed information about the USB 6221 BNC device USB 6221 BNC LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6221 BNC LEDs USB 6221 BNC Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 3 Connector and LED Information for information about replacing the fuse on the USB 6221 BNC National Instruments Corporation A 23 M Series User Manual Appendix Device Specific Information NI 6224 PCI PXI 6224 Pinout Figure A 13 shows the pinout of the PCI PXI 6224 The I O signals appear on two 68 pin connectors For a detailed de
43. lt AI 51 AI 59 gt lt AI 52 AI 60 gt lt AI 53 AI 61 gt lt AI 54 AI 62 gt lt AI 55 AI 63 gt lt AI 64 AI 72 gt lt AI 65 AI 73 gt lt AI 66 AI 74 gt lt AI 67 AI 75 gt lt AI 68 AI 76 gt lt AI 69 AI 77 gt lt AI 70 AI 78 gt lt AI 71 AI 79 gt Also refer to the Connecting Ground Referenced Signal Sources section of Chapter 4 Analog Input AI SENSE AI SENSE 2 Input Analog Input Sense In NRSE mode the reference for each AI lt 0 15 gt signal is AI SENSE the reference for each AI lt 16 63 gt and AI lt 64 79 gt signal is AI SENSE 2 Also refer to the Connecting Ground Referenced Signal Sources section of Chapter 4 Analog Input AO lt 0 3 gt AO GND Output Analog Output Channels 0 to 3 These terminals supply the voltage output of AO channels 0 to 3 AO GND Analog Output Ground AO GND is the reference for AO lt 0 3 gt All three ground references AI GND AO GND and D GND are connected on the device M Series User Manual 3 2 ni com Chapter 3 Connector and LED Information Table 3 1 1 0 Connector Signals Continued Signal Name Reference Direction Description D GND Digital Ground D GND supplies the reference for PO lt 0 31 gt PFI lt 0 15 gt P1 P2 and 5 V All three ground references AI GND AO GND and D GND are connected on the device PO lt 0 31 gt D GND Input or Port 0 Digital I
44. of Chapter 3 Connector and LED Information Analog Output You can access analog output signals on the BNC connectors labeled AO 0 and AO 1 Figure A 9 shows the analog output circuitry on the USB 6221 BNC 10 pa AO GND VY Figure A 9 Analog Output Circuitry M Series User Manual A 20 ni com Appendix Device Specific Information Refer to the Connecting Analog Output Signals section of Chapter 5 Analog Output for more information Digital 1 0 and Timing 1 0 You can access digital I O and timing I O signals on the BNC connectors labeled PFI lt 0 7 gt P1 lt 0 7 gt Figure A 10 shows the DIO TIO circuitry on the USB 6221 BNC _ PFI x P1 x a Figure A 10 Digital 1 0 and Timing 1 0 Circuitry D GND Refer to the Connecting Digital I O Signals section of Chapter 6 Digital I O and the Connecting PFI Input Signals section of Chapter 8 PFI for more information National Instruments Corporation A 21 M Series User Manual Appendix Device Specific Information USER 1 and USER 2 The USER 1 and USER 2 BNC connectors allow you to use a BNC connector for a digital or timing I O signal of your choice The USER 1 and USER 2 BNC connectors are routed internal to the USB 6221 BNC to the USER 1 and USER 2 screw terminals as shown in Figure A 11 USER 1 BNC USER 2 BNC PO 1 Screw PO 2 Terminal P0 3 Block D GND PO 4
45. usr local natinst nidaqmx docs Note USB 622x 625x 628x devices are not supported in NI DAQmx for Linux NI DAQmx Base Linux Mac OS X 3 ai 3 LabVIEW The NI DAQmx Base Getting Started Guide describes how to install your NI DAQmx Base software your NI DAQmx Base supported DAQ device and how to confirm that your device is operating properly In Windows select Start All Programs National Instruments NI DAQmx Base Documentation Getting Started Guide Getting Started with NI DAQmx Base for Linux and Mac Users describes how to install your NI DAQmx Base software your NI DAQmx Base supported DAQ device and how to confirm that your device is operating properly on your Mac Linux machine The NI DAQmx Base Readme lists which devices are supported by this version of NI DAQmx Base In Windows select Start All Programs National Instruments NI DAQmx Base DAQmx Base Readme The NI DAQmx Base VI Reference Help contains VI reference and general information about measurement concepts In LabVIEW select Help NI DAQmx Base VI Reference Help The NI DAQmx Base C Reference Help contains C reference and general information about measurement concepts In Windows select Start All Programs National Instruments NI DAQmx Base Documentation C Function Reference Help Note All NI DAQmx Base documentation for Linux is installed at usr local natinst nidagmxbase documentation Note All NI DAQmx Base documentation for Mac OS
46. with an Analog Source section of Chapter 11 Triggering for more information Routing AO Pause Trigger Signal to an Output Terminal You can route AO Pause Trigger out to RTSI lt 0 7 gt National Instruments Corporation 5 9 M Series User Manual Chapter 5 Analog Output AO Sample Clock Signal M Series User Manual Use the AO Sample Clock ao SampleClock signal to initiate AO samples Each sample updates the outputs of all of the DACs You can specify an internal or external source for AO Sample Clock You also can specify whether the DAC update begins on the rising edge or falling edge of AO Sample Clock Using an Internal Source One of the following internal signals can drive AO Sample Clock e AO Sample Clock Timebase divided down e Counter n Internal Output A programmable internal counter divides down the AO Sample Clock Timebase signal Using an External Source Use one of the following external signals as the source of AO Sample Clock e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXISTAR e Analog Comparison Event an analog trigger Routing AO Sample Clock Signal to an Output Terminal You can route AO Sample Clock as an active low signal out to any PFI lt 0 15 gt or RTSI lt 0 7 gt terminal Other Timing Requirements A counter on your device internally generates AO Sample Clock unless you select some external source AO Start Trigger starts the counter and either the software or hardware can s
47. z 0 1 2 3 0 1 2 3 oO r gt lt Figure 4 20 Al Sample Clock and Al Convert Clock Improperly Matched Leads to Aperiodic Sampling National Instruments Corporation 4 33 M Series User Manual Chapter 4 Analog Input Al Sample Clock Channel Measured 012 3 012 3 012 3 Sample 1 Sample 2 Sample 3 gt q gt q D AI Convert Clock t Figure 4 21 Al Sample Clock and Al Convert Clock Properly Matched It is also possible to use a single external signal to drive both AI Sample Clock and AI Convert Clock at the same time In this mode each tick of the external clock causes a conversion on the ADC Figure 4 22 shows this timing relationship Al Sample Clock Al Convert Clock Channel Measured 0 12 3 10 1 23 10 Sample 1 Sample 2 Sample 3 lt gt q gt q gt Figure 4 22 One External Signal Driving Both Clocks Simultaneously Al Convert Clock Timebase Signal The AI Convert Clock Timebase ai ConvertClockTimebase signal is divided down to provide on of the possible sources for AI Convert Clock Use one of the following signals as the source of AI Convert Clock Timebase e AI Sample Clock Timebase e 20 MHz Timebase AI Convert Clock Timebase is not available as an output on the I O conne
48. 1 OUT 40 PFI 13 CTRIA 42 PFI 3 CTR1Z 41 PFI 4 CTR1B 46 PFI 11 FREQ OUT 1 PFI 14 3 Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later USB 6225 Mass Termination Specifications Refer to the NI 622x Specifications for more detailed information about the USB 6225 Mass Termination device USB 6225 Mass Termination Accessory and Cabling Options This section describes some cable and accessory options for M Series devices with two 68 pin connectors such as the USB 6225 Mass Termination device Refer to ni com for other accessory options including new devices National Instruments Corporation A 41 M Series User Manual Appendix M Series User Manual Device Specific Information SCC Accessories SCC provides portable modular signal conditioning to your DAQ system To connect your M Series device to an SCC module carrier such as the SC 2345 SC 2350 or SCC 68 use an SH68 68 EPM shielded cable Use Connector 0 of your M Series device to control an SCC module carrier Connector 1 cannot be used with SCCs Refer to the SCC Advisor available by going to ni com info and entering the info code rdscav for more information BNC Accessories Using a BNC Accessory with Connector 0 Connector 0 of your device is compatible with several BNC accessories e BNC 2110 Provides BNC connectivity to all
49. 2 PFI11 P2 3 46 12 DGND veruna A ell TERMINAL 68 AI 35 23 57 al43 PFI 10 P2 2 45 11 PFIO P1 0 AI 34 24 58 al 42 D GND 44 10 PFI1 P1 1 QO Al 41 25 59 A133 PFI 2 P1 2 43 9 DGND AI 32 26 60 al 40 PFI 3 P1 3 42 8 5V AI 23 27 61 A1314 PFI 4 P1 4 41 7 DGND AI 30 28 62 al 22 PFI13 P2 5 40 6 PFI5 P1 5 AI 21 29 63 A1 29 PFI15 P2 7 39 5 PFI6 P1 6 AI 20 30 64 A1 28 PFI 7 P1 7 38 4 DGND AI 27 31165 A119 PFI 8 P2 0 37 3 PFI9 P2 1 AI 18 82 66 A1 26 D GND 36 2 PFI12 P24 Al 17 33 67 A125 D GND 35 1 PFI14 P2 6 AI 24 34 68 Al 16 ed NC No Connect Figure A 14 PCI PXI 6225 Pinout National Instruments Corporation A 31 M Series User Manual Appendix Device Specific Information Table A 7 Default NI DAQmx Counter Timer Pins Default Connector 0 Pin Number Counter Timer Signal Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 PFI 10 CTR 0 OUT 2 PFI 12 CTROA 37 PFI 8 CTROZ 3 PFI 9 CTROB 45 PFI 10 CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR 1 OUT 40 PFI 13 CTR 1 A 42 PFI 3 CTRIZ 41 PFI 4 CTR1IB 46 PFI 11 FREQ OUT 1 PFI 14 AJA Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later PCI PXI 6225 Specifi
50. 3 4 upgrading from D 1 edge counting 7 2 buffered 7 3 on demand 7 2 sample clock 7 3 single point 7 2 edge separation measurement buffered two signal 7 18 single two signal 7 18 enabling duplicate count prevention in NI DAQmx 7 37 encoders quadrature 7 14 ni com encoding X1 7 14 X2 7 15 X4 7 15 equivalent time sampling 7 24 examples NI resources E 1 exporting timing output signals using PFI terminals 8 2 external reference clock 9 2 external source mode 7 39 F features counter 7 32 field wiring considerations 4 24 filters counter 7 32 PFI 8 4 PXI_STAR 9 9 RTSL 9 7 finite pulse train timing generation 7 22 floating signal sources connecting 4 13 description 4 13 using in differential mode 4 15 using in NRSE mode 4 18 using in RSE mode 4 19 when to use in differential mode 4 13 when to use in NRSE mode 4 13 when to use in RSE mode 4 14 FREQ OUT signal 7 30 frequency division 7 24 generation 7 23 generator 7 23 measurement 7 9 Frequency Output signal 7 30 fuse replacement USB 6221 BNC A 23 USB 6221 Screw Terminal A 16 USB 6225 Mass Termination A 44 National Instruments Corporation 1 7 Index SB 6225 Screw Terminal A 38 SB 6229 BNC A 59 SB 6229 Screw Terminal A 53 SB 6251 BNC A 78 SB 6251 Mass Termination A 83 SB 6251 Screw Terminal A 71 SB 6255 Mass Termination A 104 SB 6255 Screw Terminal A 98 SB 6259 BNC A 120 SB 6259 Mass Termination A
51. 36 shows delays for generating different clocks described in the Clock Routing section of Chapter 9 Digital Routing and Clock Generation from the onboard 80 MHz oscillator t lt gt Onboard 80 MHz Oscillator 80 MHz Timebase 20 MHz Timebase 100 kHz Timebase i ty pa i tgs lt gt Figure B 52 Generating Different Clocks from the Onboard 80 MHz Oscillator National Instruments Corporation B 45 M Series User Manual Appendix B Timing Diagrams Table B 36 Generating Different Clocks from the Onboard 80 MHz Oscillator Reference Clock 80 MHz Timebase PLL 20 MHz Timebase PLL Time From To Min ns Max ns ty Onboard 80 MHz Oscillator 80 MHz Timebase 4 0 9 0 ty 80 MHz Timebase 20 MHz Timebase 0 5 2 5 t3 80 MHz Timebase 100 kHz Timebase 1 0 5 0 Table B 37 shows delays for generating different clocks using an External Reference Clock and the PLL RTSI lt 0 7 gt _ et STAR_TRIG 5 PXI_CLK10 Figure B 53 Generating Different Clocks Using an External Reference Clock Table B 37 Generating Different Clocks Using an External Reference Clock and the PLL and the PLL Time From To Min ns Max ns t4 80 MHz Timebase 20 MHz Timebase 1 5 5 0 ts The source of the external reference clock 80 MHz Timebase 1 0 55 RTSI lt 0 7 gt
52. 4 1 5 1 6 USB 6281 Mass Termination accessory options A 140 cabling options A 140 fuse replacement A 142 LED patterns A 142 pinout A 138 specifications A 140 USB cable strain relief 1 4 1 5 1 6 USB 6281 Screw Terminal fuse replacement A 137 LED patterns A 137 pinout A 136 signal label 1 3 specifications A 137 USB cable strain relief 1 4 1 5 1 6 USB 6289 Mass Termination accessory options A 160 cabling options A 160 fuse replacement A 162 LED patterns A 162 pinout A 158 specifications A 160 USB cable strain relief 1 4 1 5 1 6 M Series User Manual 1 18 USB 6289 Screw Terminal fuse replacement A 157 LED patterns A 157 pinout A 155 signal label 1 3 specifications A 157 USB cable strain relief 1 4 1 5 1 6 using low impedance sources 4 7 PFI terminals as Static digital I Os 8 3 as timing input signals 8 2 to export timing output signals 8 2 RTSI as outputs 9 6 terminals as timing input signals 9 6 short high quality cabling 4 7 the disk drive power connector PCI Express 3 9 W waveform generation digital 6 5 signals 5 6 triggering 6 3 Web resources E 1 X X1 encoding 7 14 X2 encoding 7 15 X4 encoding 7 15 ni com
53. 45 PFI 10 CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR 1 OUT 40 PFI 13 CTRIA 42 PFI 3 CTRIZ 41 PFI 4 CTR1B 46 PFI 11 FREQ OUT 1 PFI 14 3 Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later USB 6255 Mass Termination Specifications Refer to the NI 625x Specifications for more detailed information about the USB 6255 Mass Termination device USB 6255 Mass Termination Accessory and Cabling Options This section describes some cable and accessory options for M Series devices with two 68 pin connectors such as the USB 6255 Mass Termination device Refer to ni com for other accessory options including new devices National Instruments Corporation A 101 M Series User Manual Appendix M Series User Manual Device Specific Information SCC Accessories SCC provides portable modular signal conditioning to your DAQ system To connect your M Series device to an SCC module carrier such as the SC 2345 SC 2350 or SCC 68 use an SH68 68 EPM shielded cable Use Connector 0 of your M Series device to control an SCC module carrier Connector 1 cannot be used with SCCs Refer to the SCC Advisor available by going to ni com info and entering the info code rdscav for more information BNC Accessories Using a BNC Accessory with Connector 0 Connector 0 of your device is c
54. 58 ni com Appendix Device Specific Information Figure A 26 shows an example of how to use the USER 1 and USER 2 BNCs To access the PFI 8 signal from a BNC connect USER 1 on the screw terminal block to PFI 8 with a wire USER 1 BNC Internal Z D GND Connection PFI8 P03 ne Signal D GND P0 4 P0 5 P0 6 PO 7 Screw D GND Terminal PFI 8 P2 0 Block Figure A 26 Connecting PFI 8 to USER 1 BNC The designated space below each USER lt 1 2 gt BNC is for marking or labeling signal names USB 6229 BNC Specifications Refer to the NI 622x Specifications for more detailed information about the USB 6229 BNC device USB 6229 BNC LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6229 BNC LEDs USB 6229 BNC Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 3 Connector and LED Information for information about replacing the fuse on the USB 6229 BNC National Instruments Corporation A 59 M Series User Manual Appendix Device Specific Information NI 6250 PCI PXI 6250 Pinout Figure A 27 shows the pinout of the PCI PXI 6250 For a detailed description of each signal refer to the 7 O Connector Signal Descriptions section of Chapter 3 Connector and LED Information AJA Note M Series devices may be used with most E Series accessorie
55. 7 7 AI GND PAL mae Non Referenced Signal Source DAQ Device Signal Source DAQ Device Single Ended NRSE ALS ALS Al SENSE Al SENSE Ae S77 AI GND Referenced Single Ended Signal Source DAQ Device NOT RECOMMENDED RSE AI Signal Source DAQ Device Ground loop potential V1 Vg are added to measured signal Refer to the Analog Input Ground Reference Settings section for descriptions of the RSE NRSE and DIFF modes and software considerations t Refer to the Connecting Ground Referenced Signal Sources section for more information M Series User Manual 4 12 ni com Chapter 4 Analog Input Connecting Floating Signal Sources What Are Floating Signal Sources A floating signal source is not connected to the building ground system but has an isolated ground reference point Some examples of floating signal sources are outputs of transformers thermocouples battery powered devices optical isolators and isolation amplifiers An instrument or device that has an isolated output is a floating signal source When to Use Differential Connections with Floating Signal Sources Use DIFF input connections for any channel that meets any of the following conditions e The input signal is low level less than 1 V e The leads connecting the signal to the device are greater than 3 m 10 ft e The input signal requires a separate ground r
56. 87 PFI 11 FREQ OUT 93 PFI 14 Sy Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later USB 6229 Screw Terminal Specifications Refer to the NI 622x Specifications for more detailed information about the USB 6229 Screw Terminal device USB 6229 Screw Terminal LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6229 Screw Terminal LEDs USB 6229 Screw Terminal Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 3 Connector and LED Information for information about replacing the fuse on the USB 6229 Screw Terminal National Instruments Corporation A 53 M Series User Manual Appendix Device Specific Information USB 6229 BNC USB 6229 BNC Pinout Figure A 19 shows the pinout of the USB 6229 BNC For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information DIGITAL AND TIMING 1 0 POWER 5 V NI USB 6229 PFI 0 P1 0 PFI 1 P1 1 PFI 2 P1 2 PFI 3 P1 3 16 Inputs 16 bit 250 kS s Multifunction I O with Correlated Digital 1 0 for USB DIGITAL AND TIMING 1 0 O PFI 4 P1 4 PFI 5 P1 5 PFI 6 P1 6 PFI7 P17 USER 1 USER 2 NAME NAME i l Y Pos J pos J P0 10 ANALOG O
57. 9 B 20 ni com Appendix B Timing Diagrams Analog Output Timing Diagrams The analog output timing can be broken into the following three sections e Input Timing The timing for external signals to enter the M Series device and be available on the internal signal buses e Internal Analog Output Timing The timing specifications of the analog output unit itself to and from internal signals e Output Timing The timing of exported signals going to the M Series device external terminals Figure B 22 gives an overview of analog output timing Internal Other Sources Internal Sources Sample NS Clock s m gt Timebase AO Timer Sample Clock STAR_TRIG gt RTSI or UT Selected PFI gt N Start STAR_TRIG_i Trigger PFI RTSI_i or PFI_i PL N Start Trigger P Selected Pause gt i Pause Trigger RTSI Figure B 22 M Series Analog Output Timing National Instruments Corporation B 21 M Series User Manual Appendix B Timing Diagrams The following signals are used in Figure B 22 and in the following sections M Series User Manual Sample Clock This signal multiplied by the digital to analog conversions This signal is routed to the DAC and in every pulse the DAC will perform a data conversion This signal can come directly from an external signal or can be the result of dividing down the Sample Clock Timebase using the UI counter Sample Clock Time
58. A Device Specific Information Table 7 4 68 Pin Device Default NI DAQmx Counter Timer Pins Default Connector 0 Pin Counter Timer Signal Number Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 PFI 10 CTR 0 OUT 2 PFI 12 CTROA 37 PFI 8 CTROZ 3 PFI 9 CTROB 45 PFI 10 7 30 ni com Chapter 7 Counters Table 7 4 68 Pin Device Default NI DAQmx Counter Timer Pins Continued Default Connector 0 Pin Counter Timer Signal Number Name CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR 1 OUT 40 PFI 13 CTRIA 42 PFI 3 CTR 1Z 41 PFI 4 CTR 1 B 46 PFI 11 FREQ OUT 1 PFI 14 You can use these defaults or select other sources and destinations for the counter timer signals in NI DAQmx Refer to Connecting Counter Signals in the NI DAQm x Help or the LabVIEW Help in version 8 0 or later for more information about how to connect your signals for common counter measurements and generations M Series default PFI lines for counter functions are listed in Physical Channels in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later Counter Triggering Counters support three different triggering actions National Instruments Corporation Arm Start Trigger To begin any counter input or output function you must first enable or arm the counter Software can arm a counter or configure counters to be armed on a har
59. A Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later PCI PXI 6224 Specifications Refer to the NI 622x Specifications for more detailed information about the PCI PXI 6224 device PCI PXI 6224 Accessory and Cabling Options This section describes some cable and accessory options for M Series devices with two 68 pin connectors such as the PCI PXI 6224 Refer to ni com for other accessory options including new devices M Series User Manual A 26 ni com Appendix Device Specific Information SCXI Accessories SCXI is a programmable signal conditioning system designed for measurement and automation applications To connect your M Series device to an SCXI chassis use the SCXI 1349 adapter and an SHC68 68 EPM cable Use Connector 0 of your M Series device to control SCXI NI DAQ 7 4 and later supports SCXI in parallel mode on Connector 1 3 Note When using Connector 1 in parallel mode with SCXI modules that support track and hold you must programmatically disable track and hold You also can use an M Series device to control the SCXI section of a PXI SCXI combination chassis such as the PXI 1010 or PXI 1011 The M Series device in the rightmost PXI slot controls the SCXI devices No cables or adapters are necessary Refer to the SCXI Advisor available by going to ni com info and entering the info code rdsc
60. AI 9 and so on Up to 32 single ended channels are available in single ended measurement modes For information on how to connect your signals in single ended mode AI GND and or AI SENSE refer to the Connecting Analog Input Signals section of Chapter 4 Analog Input For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information Analog Output You can access analog output signals on the BNC connectors labeled AO 0 and AO 1 Figure A 50 shows the analog output circuitry on the USB 6259 BNC as 7 AO GND NF Figure A 50 Analog Output Circuitry National Instruments Corporation A 117 M Series User Manual Appendix Device Specific Information Refer to the Connecting Analog Output Signals section of Chapter 5 Analog Output for more information Digital 1 0 and Timing 1 0 You can access digital I O and timing I O signals on the BNC connectors labeled PFI lt 0 7 gt P1 lt 0 7 gt Figure A 51 shows the DIO TIO circuitry on the USB 6259 BNC PFI x P1 x A D GND N7 Figure A 51 Digital 1 0 and Timing 1 0 Circuitry Refer to the Connecting Digital I O Signals section of Chapter 6 Digital I O and the Connecting PFI Input Signals section of Chapter 8 PFI for more information APFI You can access the analog programmable function interface signals on the BNC connectors labeled APF
61. AI GND Si 13 Al SENSE 2 TA 30 AI GND AGND 62 T5 31 AO1 RES 63 T6 32 AO GND AO GND 64 y TJ re SI 81 PFI 8 P2 0 Pos ov 113 82 D GND 114 66 P09 98 I 83 PFI 9 P2 1 115 67 P0 10 99 IS 84 D GND 116 68 P0 11 100 IS 85 PFI 10 P2 2 117 69 P0 12 101 IS 86 D GND 118 70 P0 13 102 II 87 PFI 11 P2 3 119 71 P0 14 103 IS em 88 D GND PO 120 15 104 S H a Gl 89 PFI 12 P2 4 E IS 121 i 5 IS 20 D GND 122 74 P0 17 106 IS Gl 91 PFI 13 P2 5 123 75 P0 18 107 IS 92 D GND 124 76 P0 19 108 KX SI 93 PFI 14 P2 6 125 77 P0 20 109 IX S 94 D GND 126 78 P0 21 110 KS 95 PFI 15 P2 7 127 79 Ses 5v P0 22 111 IS DE 80 Po 23 112 19 NC No Connect NC No Connect PO 24 D GND PO 25 D GND P0 26 D GND P0 27 D GND P0 28 D GND P0 29 D GND P0 30 D GND P0 31 D GND M Series User Manual Figure A 18 USB 6229 Screw Terminal Pinout A 52 ni com Appendix Device Specific Information Table A 11 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number Name CTR 0 SRC 81 PFI 8 CTR 0 GATE 83 PFI 9 CTR 0 AUX 85 PFI 10 CTR 0 OUT 89 PFI 12 CTROA 81 PFI 8 CTROZ 83 PFI 9 CTROB 85 PFI 10 CTR 1 SRC 76 PFI 3 CTR 1 GATE 77 PFI 4 CTR 1 AUX 87 PFI 11 CTR 1 OUT 91 PFI 13 CTRIA 76 PFI 3 CTRIZ 77 PFI 4 CTR 1B
62. An SCXI system consists of a rugged chassis that houses shielded signal conditioning modules that amplify filter isolate and multiplex analog signals from thermocouples or other transducers SCXI is designed for large measurement systems or systems requiring high speed acquisition System features include the following e Modular architecture Choose your measurement technology e Expandability Expand your system to 3 072 channels e Integration Combine analog input analog output digital I O and switching into a single unified platform e High bandwidth Acquire signals at high rates e Connectivity Select from SCXI modules with thermocouple connectors or terminal blocks 5 Note SCXI is not supported on PCI 6221 37 pin or all variants of USB 622x 625x 628x devices M Series User Manual SCC SCC is a front end signal conditioning system for M Series plug in data acquisition devices An SCC system consists of a shielded carrier that holds up to 20 single or dual channel SCC modules for conditioning thermocouples and other transducers SCC is designed for small measurement systems where you need only a few channels of each signal type or for portable applications SCC systems also offer the most comprehensive and flexible signal connectivity options System features include the following e Modular architecture Select your measurement technology on a per channel basis e Small channel systems Condition up to 16
63. Appendix Device Specific Information N Al 8 34 68 AIO Al 1 33 67 Al GND AI GND 32 66 Al9 Al 10 31 65 Al2 AI 3 30 64 Al GND AI GND 29 63 Al 11 Al 4 28 62 Al SENSE Al GND 27 61 Al 12 Al 13 26 60 AI5 Al6 25 59 Al GND Al GND 24 58 Al 14 Al 15 23 57 AI 7 AO 0 22 56 Al GND AO 1 21 55 AO GND APFI 0 20 54 AO GND P0 4 19 53 D GND D GND 18 52 P0 0 PO 1 17 51 PO 5 P0 6 16 50 D GND D GND 15 49 P0 2 5V 14 48 PO 7 D GND 13 47 P0 3 D GND 12 46 PFI 11 P2 3 PFI 0 P1 0 11 45 PFI 10 P2 2 PFI 1 P1 1 10 44 D GND D GND 9 43 PFI 2 P1 2 5V 8 42 PFI 3 P1 3 D GND 7 41 PFI 4 P1 4 PFI 5 P1 5 6 40 PFI 13 P2 5 PFI 6 P1 6 5 39 PFI 15 P2 7 D GND 4 38 PFI 7 P1 7 PFI 9 P2 1 3 37 PFI 8 P2 0 PFI 12 P2 4 2 36 D GND PFI 14 P2 6 1 35 D GND ee CONNECTOR 0 Al 0 15 TERMINAL 68 TERMINAL 35 l lo TERMINAL 34 TERMINAL 1 National Instruments Corporation A 139 Figure A 59 USB 6281 Mass Termination Pinout M Series User Manual Appendix Device Specific Information Counter Timer Signal Default Pin Number Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 PFI 10 CTR 0 OUT 2 PFI 12 CTROA 37 PFI 8 CTROZ 3 PFI 9
64. B 1 Input Timing Time From To Min ns Max ns t PFI PFI_i 4 2 6 4 15 2 19 2 RTSI RTSLi 0 9 22 2 0 3 0 STAR STAR 0 9 2 8 The delay ranges given for PFI and RTSI represent the fastest and slowest terminal routing within the trigger group for a given condition maximum or minimum timing This difference can be useful when two external signals will be used together and the relative timing between the signals is important Internal Timing National Instruments Corporation B 5 Al Timing Clocks The analog input timing engine has two levels of timing that control an AI acquisition The first level is the convert level This is the timing that controls when the analog to digital conversions take place The SC DIV and SI2 counters run on this timing level The signal that clocks this timing level is called Convert Clock Timebase This signal can come from an internal source for example an internal timebase or an external signal It can be divided down using the SI2 counter or it can be used directly in external convert mode In order to synchronize triggers to the Convert Clock Timebase signal another related signal is generated called Sync Convert Clock Timebase Sync Convert Clock Timebase is generated differently depending on the mode the AI timing engine is operating on e When Convert Clock Timebase is a signal that is divided down using the SI2 counter either internal or e
65. CONNECTOR 1 Al 16 31 TERMINAL35 GE Cs TERMINAL 1 TERMINAL 34 TERMINAL 68 COIN D A HR o rm gt r gt gt gt gt gt gt gt gt gt NC No Connect GND 28 SENSE 2 27 GND 18 25 GND 16 M Series User Manual Figure A 60 PCI PXI 6284 Pinout A 144 ni com Appendix Device Specific Information Table A 30 Default NI DAQmx Counter Timer Pins Default Connector 0 Pin Number Counter Timer Signal Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 PFI 10 CTR 0 OUT 2 PFI 12 CTROA 37 PFI 8 CTROZ 3 PFI 9 CTROB 45 PFI 10 CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR 1 OUT 40 PFI 13 CTRIA 42 PFI 3 CTRIZ 41 PFI 4 CTR1B 46 PFI 11 FREQ OUT 1 PFI 14 3 Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later PCI PXI 6284 Specifications Refer to the NI 628x Specifications for more detailed information about the PCI PXI 6284 device PCI PXI 6284 Accessory and Cabling Options This section describes some cable and accessory options for M Series devices with two 68 pin connectors such as t
66. Common mode rejection ratio A measure of the ability of a differential amplifier to reject interference from a common mode signal usually expressed in decibels dB The ability of an electronic system to cancel any electronic noise pick up that is common to both the positive and negative polarities of the input leads to the instrument front end Common mode rejection is only a relevant specification for systems having a balanced or differential input G 4 ni com common mode signal connector convert rate count counter counter timer D D GND D SUB connector DAC Glossary 1 Any voltage present at the instrumentation amplifier inputs with respect to amplifier ground 2 The signal relative to the instrument chassis or computer s ground of the signals from a differential input This is often a noise signal such as 50 or 60 Hz hum 1 A device that provides electrical connection 2 A fixture either male or female attached to a cable or chassis for quickly making and breaking one or more circuits A symbol that connects points on a flowchart Reciprocal of the interchannel delay The number of events such as zero crossings pulses or cycles 1 Software A memory location used to store a count of certain occurrences 2 Hardware A circuit that counts events When it refers to an instrument it refers to a frequency counter A circuit that counts external pulses or clock pulses timing Digital g
67. Counter n Source Gate Z Internal Output e Change Detection Event e Analog Comparison Event e FREQ OUT e PFI lt 0 5 gt ay Note Signals with a are inverted before being driven on the RTSI terminals Using RTSI Terminals as Timing Input Signals M Series User Manual You can use RTSI terminals to route external timing signals to many different M Series functions Each RTSI terminal can be routed to any of the following signals e AT Convert Clock ai ConvertClock e Al Sample Clock ai SampleClock e Al Start Trigger ai StartTrigger e Al Reference Trigger ai ReferenceTrigger e AI Pause Trigger ai PauseTrigger e AI Sample Clock Timebase ai SampleClockTimebase e AO Start Trigger ao StartTrigger e AO Sample Clock ao SampleClock e AO Sample Clock Timebase ao SampleClockTimebase e AO Pause Trigger ao PauseTrigger 9 6 ni com RTSI Filters Chapter 9 Digital Routing and Clock Generation e Counter input signals for either counter Source Gate Aux HW_Arm A B or Z e DI Sample Clock di SampleClock e DO Sample Clock do SampleClock Most functions allow you to configure the polarity of PFI inputs and whether the input is edge or level sensitive You can enable a programmable debouncing filter on each PFI RTSL or PXI_STAR signal When the filters are enabled your device samples the input on each rising edge of a filter clock M Series devices use an onboard oscillator to generate the filter
68. D GND 18 52 P0 8 P0 9 17151 P0 13 P0 14 16 50 D GND D GND 15 49 P0 10 5V 14 48 P0 15 D GND 13 47 PO 11 D GND 12 46 P0 27 P0 16 11 45 P0 26 P0 17 10 44 D GND D GND 9 43 P0 18 5V 8 42 P0 19 D GND 7 41 P0 20 P0 21 6 40 P0 29 P0 22 5 39 P0 31 D GND 4 38 P0 23 P0 25 3 37 P0 24 P0 28 2 36 D GND P0 30 1 135 D GND U CONNECTOR 1 Al 16 31 TERMINAL 68 TERMINAL 35 cj lo TERMINAL 34 TERMINAL 1 Figure A 55 USB 6259 Mass Termination Pinout A 122 ni com Appendix Device Specific Information Table A 25 Default NI DAQmx Counter Timer Pins Default Connector 0 Pin Number Counter Timer Signal Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 PFI 10 CTR 0 OUT 2 PFI 12 CTROA 37 PFI 8 CTROZ 3 PFI 9 CTROB 45 PFI 10 CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR 1 OUT 40 PFI 13 CTRIA 42 PFI 3 CTRIZ 41 PFI 4 CTR1B 46 PFI 11 FREQ OUT 1 PFI 14 3 Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later USB 6259 Mass Termination Specifications Refer to the NI 625x Specifications for more detailed information about the USB 6259 Mass Termination device USB 6259 Mass Termination Accessory and Cabling Options This se
69. D GND 36 2 PFI12 P2 4 D GND 35 1 PFI14 P2 6 ey NC No Connect Figure A 2 PCI PXI 6221 68 Pin Pinout M Series User Manual A 8 ni com Appendix Device Specific Information Table A 2 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 PFI 10 CTR 0 OUT 2 PFI 12 CTROA 37 PFI 8 CTROZ 3 PFI 9 CTROB 45 PFI 10 CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR 1 OUT 40 PFI 13 CTRIA 42 PFI 3 CTRIZ 41 PFI 4 CTR 1B 46 PFI 11 FREQ OUT 1 PFI 14 Sy Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later PCI PXI 6221 68 Pin Specifications Refer to the NI 622x Specifications for more detailed information about the PCI PXI 6221 68 pin device PCI PXI 6221 68 Pin Accessory and Cabling Options This section describes some cable and accessory options for M Series devices with one 68 pin connector such as the PCI PXI 6221 68 pin Refer to ni com for other accessory options including new devices National Instruments Corporation A 9 M Series User Manual Appendix Device Specific Information SCXI Accessories SCXI is a programmable signal conditioning system designed for measurement and automation applications T
70. DOND P0 15 104 NI SI 89 PFI 12 P2 4 PAETE N S PAGINE P0 17 106 Slot PFI 13 P2 5 S NIE P0 18 107 ISl Gl 93 PFI 14 P2 6 P0 19 108 S l Si oen P0 20 109 S Sos PFI 15 P2 7 aa ae N S 5V p S P0 23 112 S 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 Al 20 Al 28 Al GND Al 21 Al 29 AI GND Al 22 Al 30 AI GND Al 23 AI 31 AI GND APFI 1 Al GND AO3 AO GND PO 24 D GND PO 25 D GND P0 26 D GND P0 27 D GND P0 28 D GND P0 29 D GND P0 30 D GND P0 31 D GND M Series User Manual Figure A 62 USB 6289 Screw Terminal Pinout A 156 ni com Appendix Device Specific Information Table A 32 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number Name CTR 0 SRC 81 PFI 8 CTR 0 GATE 83 PFI 9 CTR 0 AUX 85 PFI 10 CTR 0 OUT 89 PFI 12 CTROA 81 PFI 8 CTROZ 83 PFI 9 CTROB 85 PFI 10 CTR 1 SRC 76 PFI 3 CTR 1 GATE 77 PFI 4 CTR 1 AUX 87 PFI 11 CTR 1 OUT 91 PFI 13 CTRIA 76 PFI 3 CTRIZ 77 PFI 4 CTR 1B 87 PFI 11 FREQ OUT 93 PFI 14 Sy Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later USB 6289 Screw Terminal Specifications Refer to the NI 628x Specifications for more detailed information about the USB 6289 Screw
71. Detection Analog Trigger Circuitry Output gt Counter Circuitry Figure 11 2 Analog Trigger Circuit You must specify a source and an analog trigger type The source can be either an APFI lt 0 1 gt terminal or an analog input channel APFI lt 0 1 gt Terminals When you use either APFI lt 0 1 gt terminal as an analog trigger you should drive the terminal with a low impedance signal source less than 1 kQ source impedance If APFI lt 0 1 gt are left unconnected they are susceptible to crosstalk from adjacent terminals which can cause false M Series User Manual 11 2 ni com Chapter 11 Triggering triggering Note that the APFI lt 0 1 gt terminals also can be used for other functions such as the AO External Reference input as described in the AO Offset and AO Reference Selection section of Chapter 5 Analog Output Analog Input Channels Select any analog input channel to drive the NI PGIA The NI PGIA amplifies the signal as determined by the input ground reference setting and the input range The output of the NI PGIA then drives the analog trigger detection circuit By using the NI PGIA you can trigger on very small voltage changes in the input signal When the DAQ device is waiting for an analog trigger with a AI channel as the source the AI muxes should not route different AI channels to the NI PGIA If a different channel is routed to the NI PGIA the trigger condition on the desired chann
72. FIFO on the device Typically hardware timed non buffered operations are used to read single samples with known time increments between them Analog Input Triggering Analog input supports three different triggering actions e Start trigger e Reference trigger e Pause trigger Refer to the AI Start Trigger Signal AI Reference Trigger Signal and AI Pause Trigger Signal sections for information about these triggers An analog or digital trigger can initiate these actions All M Series devices support digital triggering but some do not support analog triggering To find your device triggering options refer to the specifications document for your device Connecting Analog Input Signals Table 4 3 summarizes the recommended input configuration for both types of signal sources National Instruments Corporation 4 11 M Series User Manual Chapter 4 Analog Input Table 4 3 Analog Input Configuration Floating Signal Sources Not Connected to Building Ground Referenced Ground Signal Sources Examples Example e Ungrounded thermocouples e Plug in instruments with PESES non isolated outputs e Signal conditioning with P AI Ground Reference Da i i Setting e Battery devices Differential Signal Source DAQ Device Signal Source DAQ Device co Al Al Pr Al Al C
73. FIFO supports a retransmit mode In the retransmit mode after all the samples in the FIFO have been clocked out the FIFO begins outputting all of the samples again in the same order For example if the FIFO contains five samples the pattern generated consists of sample 1 2 3 4 5 1 2 3 4 5 1 and so on DO Sample Clock Signal Use the DO Sample Clock do SampleClock signal to update the DO terminals with the next sample from the DO waveform generation FIFO M Series devices do not have the ability to divide down a timebase to produce an internal DO Sample Clock for digital waveform generation Therefore you must route an external signal or one of many internal signals from another subsystem to be the DO Sample Clock For example you can National Instruments Corporation 6 5 M Series User Manual Chapter 6 Digital 1 0 M Series User Manual correlate digital and analog samples in time by sharing your AI Sample Clock or AO Sample Clock as the source of your DO Sample Clock To generate digital data independent of an AI AO or DI operation you can configure a counter to generate the desired DO Sample Clock or use an external signal as the source of the clock If the DAQ device receives a DO Sample Clock when the FIFO is empty the DAQ device reports an underflow error to the host software Using an Internal Source To use DO Sample Clock with an internal source specify the signal source and the polarity of the
74. GND USB 62xx Device USB 62xx Device Figure A 21 Analog Input Circuitry A 56 ni com Appendix Device Specific Information e Single Ended Mode For each BNC connector that you use for two single ended channels set the source type switch to the GS position This setting disconnects the built in ground reference resistor from the negative terminal of the BNC connector allowing the connector to be used as a single ended channel as shown in Figure A 22 Ground Ref Source GS i Figure A 22 Single Ended Channels When you set the source type to the GS position and configure the device for single ended input in software each BNC connector provides access to two single ended channels AI x and AI x 8 For example the BNC connector labeled AI 0 provides access to single ended channels AI 0 and AI 8 the BNC connector labeled AI 1 provides access to single ended channels AI 1 and AI 9 and so on Up to 32 single ended channels are available in single ended measurement modes For information on how to connect your signals in single ended mode AI GND and or AI SENSE refer to the Connecting Analog Input Signals section of Chapter 4 Analog Input For a detailed description of each signal refer to the I O Connector Signal Descriptions section of Chapter 3 Connector and LED Information Analog Output You can access analog output signals on the BNC connectors labeled AO 0 and AO 1 Figure A 23 show
75. GND AO GND Al GND Al 23 Al 30 Al GND Al 21 Al 28 Al SENSE 2 Al 27 Al GND Al 18 Al 25 Al GND Al 16 M Series User Manual Figure A 61 PCI PXI 6289 Pinout A 150 ni com Appendix Device Specific Information Table A 31 Default NI DAQmx Counter Timer Pins Default Connector 0 Pin Number Counter Timer Signal Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 PFI 10 CTR 0 OUT 2 PFI 12 CTROA 37 PFI 8 CTROZ 3 PFI 9 CTROB 45 PFI 10 CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR 1 OUT 40 PFI 13 CTRIA 42 PFI 3 CTRIZ 41 PFI 4 CTR1B 46 PFI 11 FREQ OUT 1 PFI 14 3 Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later PCI PXI 6289 Specifications Refer to the NI 628x Specifications for more detailed information about the PCI PXI 6289 device PCI PXI 6289 Accessory and Cabling Options This section describes some cable and accessory options for M Series devices with two 68 pin connectors such as the PCI PXI 6289 Refer to ni com for other accessory options including new devices National Instruments Corporation A 151 M Series User Manual Appendix Device Specific Information SCXI Accessories SCXI is a programmable signal conditioning system designed for measurement
76. M Series User Manual Figure 9 4 Filter Example Enabling filters introduces jitter on the input signal For the 125 ns and 6 425 us filter settings the jitter is up to 25 ns On the 2 56 ms setting the jitter is up to 10 025 us When a PFI input is routed directly to RTSI or a RTSI input is routed directly to PFI the M Series device does not use the filtered version of the input signal Refer to the KnowledgeBase document Digital Filtering with M Series and CompactDAQ for more information about digital filters and counters To access this KnowledgeBase go to ni com info and enter the info code rddfms 9 10 ni com Bus Interface The bus interface circuitry of M Series devices efficiently moves data between host memory and the measurement and acquisition circuits M Series devices are available for the following platforms e PCI e PCI Express e PXI e PXI Express e USB All M Series devices are jumperless for complete plug and play operation The operating system automatically assigns the base address interrupt levels and other resources NI M Series PCI PCle PXI PXIe devices incorporate PCI MITE technology to implement a high performance PCI interface M Series USB devices incorporate USB STC2 technology to implement a Hi Speed USB interface DMA Controllers and USB Signal Stream NIM Series PCI PCIe PXI PXIe devices have six fully independent DMA controllers for high performance transfers of data blocks One DM
77. NC 55 21 NC 54 20 APFI 0 53 19 P0 4 52 18 D GND 51117 PO 1 50 16 PO 6 49 15 D GND 48 14 5V 47 13 D GND 46 12 D GND 45 11 PFI 0 P1 0 44 10 PFI 1 P1 1 43 9 D GND 42 8 5V 41 7 D GND 40 6 PFI 5 P1 5 39 5 PFI 6 P1 6 38 4 D GND 37 3 PFI 9 P2 1 36 2 PFI 12 P2 4 35 1 PFI 14 P2 6 ne NC No Connect CONNECTOR 1 Al 16 31 TERMINAL35 TERMINAL 1 TERMINAL 34 TERMINAL 68 P0 30 1 35 D GND P0 28 2 36 D GND P0 25 3 37 P0 24 D GND 4 38 P0 23 P0 22 5 39 P0 31 PO 21 6 40 P0 29 D GND 7 41 P0 20 5V 8 42 P0 19 D GND 9 43 P0 18 PO 17 10 44 D GND P0 16 11 45 P0 26 D GND 12 46 P0 27 D GND 13 47 P0 11 5V 14 48 P0 15 D GND 15 49 P0 10 P0 14 16 50 D GND P0 9 17 51 P0 13 D GND 18 52 P0 8 P0 12 19 53 D GND APFI 1 20 54 NC NC 21 55 ING NC 22 56 AI GND Al 31 23 57 Al23 AI GND 24 58 AI 30 Al 22 25 59 AI GND Al 29 26 60 Al21 AI GND 27 61 Al28 Al 20 28 62 AI SENSE 2 AI GND 29 63 Al 27 Al 19 30 64 AI GND AI 26 31165 AI18 AI GND 32166 Al 25 Al 17 33 67 AI GND Al 24 34 68 Al 16 NC No Connect National Instruments Corporation Figure A 40 PCI PXI 6254 Pinout A 85 M Seri
78. NRSE measurement system reference but the voltage at this reference can vary with respect to the measurement system ground The unwanted DC voltage due to amplifier offset voltages added to a signal Peripheral Component Interconnect A high performance expansion bus architecture originally developed by Intel to replace ISA and EISA It offers a theoretical maximum transfer rate of 132 MB s A high performance expansion bus architecture originally developed by Intel to replace PCI PCI Express offers a theoretical maximum transfer rate that is dependent upon lane width a x1 link theoretically provides 250 MB s in each direction to and from the device Once overhead is accounted for a x1 link can provide approximately 200 MB s of input capability and 200 MB s of output capability Increasing the number of lanes in a link increases maximum throughput by approximately the same factor See PCI Express National Instruments Corporation G 13 M Series User Manual Glossary period PFI PGIA physical channel Plug and Play devices posttriggering power source ppm pretriggering pulse pulse width PXI PXI Express M Series User Manual The period of a signal most often measured from one zero crossing to the next zero crossing of the same slope The period of a signal is the reciprocal of its frequency in Hz Period is designated by the symbol T Programmable Function Interface Programmable Gain Instru
79. O 5 V LED Law M Poot gt TTL Signal gt 5V A A t o Switch 1 0 Connector M Series Device Figure 6 4 Digital 1 0 Connections A Caution Exceeding the maximum input voltage ratings which are listed in the specifications document for each M Series device can damage the DAQ device and the computer NI is not liable for any damage resulting from such signal connections Getting Started with DIO Applications in Software You can use the M Series device in the following digital I O applications e Static digital input e Static digital output e Digital waveform generation e Digital waveform acquisition e DI change detection 3 Note For more information about programming digital I O applications and triggers in software refer to the NI DAQmx Help or the LabVIEW Help in version 8 0 or later M Series User Manual 6 10 ni com Counters M Series devices have two general purpose 32 bit counter timers and one frequency generator as shown in Figure 7 1 The general purpose counter timers can be used for many measurement and pulse generation applications Input Selection Muxes Counter 0 Input Selection Muxes Counter 0 Source Counter 0 Timebase Counter 0 Gatg Counter 0 Internal Output Counter 0 Aux Counter 0 HW Arm Counter 0 A Counter 0 TC Counter 0 B Co
80. PFI RTSL and PXI_STAR represent signals at connectors pins of the M Series device The other named signals represent internal signals Other Internal PFI RTSI or PXI_STAR Signals 80 MHz Timebase PFI_i RTSL i or PXI_STAR_i b or PXI_STAR Count_Enable Out_o Counter n Gate e PFI RTSI Selected_Gate Gat eis PFL RTS Logic Counter Counter j Internal Output Selected_Source PFI RTSI Em 20 MHz Timebase 100 kHz Timebase PXICLK10 or PXI_STAR Counter n Source M Series User Manual Figure B 41 Counter Timer Circuitry Pin to Internal Signal Delays Input timing is the timing specification for importing a signal to an internal bus on the M Series device Table B 26 shows the input timing for the counters on all input terminals Signals refer to the signal at the I O connector of the device and signals appended with _i refer to the signal internal to the device after the input buffer PFI RTSI or PXI_STAR PFI_i RTSI_i or PXI_STAR_i lt gt Figure B 42 Pin to Internal Signal Delays Timing Diagram B 36 ni com App Table B 26 Pin to Internal Signal Delays Timing endix B Timing Diagrams Time From To Min ns Max ns t PFI PFL i 5 2 6 2 18 2 22 0 RTSI RTSLi 2 0 2 5 5 0 6 0 STAR STAR i 0 9 2 5 The delay ranges given for PFI a
81. PFI 11 P2 3 D GND PFI 12 P2 4 D GND PFI 13 P2 5 D GND PFI 14 P2 6 D GND PFI 15 P2 7 5V National Instruments Corporation Figure A 4 USB 6221 Screw Terminal Pinout A 15 M Series User Manual Appendix Device Specific Information Table A 4 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number Name CTR 0 SRC 81 PFI 8 CTR 0 GATE 83 PFI 9 CTR 0 AUX 85 PFI 10 CTR 0 OUT 89 PFI 12 CTROA 81 PFI 8 CTROZ 83 PFI 9 CTROB 85 PFI 10 CTR 1 SRC 76 PFI 3 CTR 1 GATE 77 PFI 4 CTR 1 AUX 87 PFI 11 CTR 1 OUT 91 PFI 13 CTR 1 A 76 PFI 3 CTR1Z 77 PFI 4 CTR 1B 87 PFI 11 FREQ OUT 93 PFI 14 3 Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later M Series User Manual USB 6221 Screw Terminal Specifications Refer to the NI 622x Specifications for more detailed information about the USB 6221 Screw Terminal device USB 6221 Screw Terminal LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6221 Screw Terminal LEDs USB 6221 Screw Terminal Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 3 Connector and LED Information for information about replacing the fuse on the USB 6221 Screw T
82. PFI 3 CTR 1 GATE PFI 4 CTR 1 AUX PFI 11 CTR 1 OUT PFI 13 CTR 1 A PFI 3 CTR1Z PFI 4 CTR 1B PFI 11 FREQ OUT PFI 14 3 Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later Connecting Signals to the USB 6221 BNC Analog Input You can use each analog input BNC connector for one signal in differential mode or two signals in single ended mode e Differential Mode To connect signals in differential mode determine the type of signal source you are using a floating signal FS source or a ground referenced signal GS source Refer to the Connecting Analog Input Signals section of Chapter 4 Analog Input for more information M Series User Manual A 18 ni com Appendix Device Specific Information To measure a floating signal source move the switch to the FS position To measure a ground referenced signal source move the switch to the GS position Figure A 6 shows the AI 0 BNC and corresponding FS GS switch on the top panel of the USB 6221 BNC AIO aS FS GS Figure A 6 FS GS Switch Figure A 7 shows the analog input circuitry on the USB 6221 BNC When the switch is set to the FS position AI x is grounded through a 0 1 UF capacitor in parallel with a 5 KQ resistor 1 Ce Al x co AI x AI x Al x O1pF gt 3 5k2 O1pF gt 5ko
83. STAR_TRIG PXI_CLK10 through PLL_OUT M Series User Manual B 46 ni com Troubleshooting Analog Input This section contains common questions about M Series devices If your questions are not answered here refer to the National Instruments KnowledgeBase at ni com kb I am seeing crosstalk or ghost voltages when sampling multiple channels What does this mean You may be experiencing a phenomenon called charge injection which occurs when you sample a series of high output impedance sources with a multiplexer Multiplexers contain switches usually made of switched capacitors When a channel for example AI 0 is selected in a multiplexer those capacitors accumulate charge When the next channel for example AT 1 is selected the accumulated current or charge leaks backward through channel 1 If the output impedance of the source connected to AI 1 is high enough the resulting reading can somewhat affect the voltage in AI 0 To circumvent this problem use a voltage follower that has operational amplifiers op amps with unity gain for each high impedance source before connecting to an M Series device Otherwise you must decrease the sample rate for each channel Another common cause of channel crosstalk is due to sampling among multiple channels at various gains In this situation the settling times can increase For more information about charge injection and sampling channels at different gains refer to the Multichannel Sc
84. Series and E Series Pinout Comparison section of Chapter 3 Connector and LED Information for more information National Instruments Corporation A 143 M Series User Manual Appendix Device Specific Information GND GND 11 SENSE 12 GND 14 gt gt gt gt gt gt gt gt gt gt gt gt GND NC D GND P0 0 P0 5 D GND P0 2 P0 7 P0 3 PFI 11 P2 3 PFI 10 P2 2 D GND PFI 2 P1 2 PFI 3 P1 3 P P P P z FI 4 P1 4 FI 13 P2 5 Fl 15 P2 7 Fl 7 P1 7 PFI 8 P2 0 D GND D GND wer 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25 58 N A 57 N wo 56 N N 55 D 54 np 53 52 51 NS 50 oo 49 a 48 A 47 wo 46 N 45 44 o 43 42 41 40 39 38 37 36 35 sIDIo BR GIo I o o D NC No Connect AI 8 Al 1 Al GND Al 10 Al 3 AI GND Al 4 Al GND Al 13 Al6 Al GND Al 15 NC NC APFI 0 P0 4 D GND PO 1 P0 6 D GND 5V D GND D GND PFI 0 P1 0 Pal Veale D GND 5V D GND PFI 5 P1 5 PFI 6 P1 6 D GND PFI 9 P2 1 PFI 12 P2 4 PFI 14 P2 6 TERMINAL 68 TERMINAL 34 TERMINAL 1 TERMINAL 35 gt CONNECTOR 0 Al 0 15 y
85. Series device does not use the filtered version of the input signal M Series User Manual Chapter 7 Counters Prescaling Refer to the KnowledgeBase document Digital Filtering with M Series and CompactDAQ for more information about digital filters and counters To access this KnowledgeBase go to ni com info and enter the info code rddfms Prescaling allows the counter to count a signal that is faster than the maximum timebase of the counter M Series devices offer 8X and 2X prescaling on each counter prescaling can be disabled Each prescaler consists of a small simple counter that counts to eight or two and rolls over This counter can run faster than the larger counters which simply count the rollovers of this smaller counter Thus the prescaler acts as a frequency divider on the Source and puts out a frequency that is one eighth or one half of what it is accepting External Signal DULL LL LUT UT UT LU LL Prescaler Rollover Used as Source by Counter Counter Value 0 X 1 Figure 7 31 Prescaling Prescaling is intended to be used for frequency measurement where the measurement is made on a continuous repetitive signal The prescaling counter cannot be read therefore you cannot determine how many edges have occurred since the previous rollover Prescaling can be used for event counting provided it is acceptable to have an error of up to seven or one Prescaling can be used when the counte
86. Sn hentai Rs 9 2 20 MEIZTimebase ie Aes A Mat ata nette ee le rites 9 2 100 KHZ Timebas este ces cs ten tn ne den 9 2 External Reference Clock innreise non a E ninnn tr 9 2 10 MHZ Reference Clock babes Mets ea Ea Ve ini 9 3 Synchronizing Multiple Devices ss 9 3 Real Time System Integration RTSI ss 9 4 RTSI Connector Pinouts niiiesite es jalan Rel gg Ae NAN se 9 4 Using RES as Outputs 8 asee arao esheets aE E Ee AaS 9 6 Using RTSI Terminals as Timing Input Signals 9 6 RI SI Piltets Sn RAR ee tee ne rte enliven es 9 7 PXI Clock and Trigger Signals ss nnen aa p heed miens 9 8 PAT CLR LO sn E EE RE E shade ate D nr nd Dir re de 9 8 PRE Trigo Sannaa NA ah ee edie 9 9 PXLSTAR TI i EEE CEE re tetas ste vetee te 9 9 PXI STAR Filt rs fitness mumihntne Mein oie ae ae dues 9 9 Chapter 10 Bus Interface DMA Controllers and USB Signal Stream 10 1 PXI Considerations oi issu asset Sateen ies Mon te EE nn aed eee ees 10 2 PXT Clock and Trigger Signals jaiii neies 10 2 PX and PLEX press 2 3 nn nn nn nn Ms re nette 10 2 Using PXI with CompactPCT ss 10 3 Data Transfer Methods anus dns ne Mn en iia Bestia eases 10 4 Changing Data Transfer Methods 10 5 Chapter 11 Triggering Triggering with a Digital Source
87. Table B 20 to the total Selected Pause delay Selected Pause Trigger Sync Sample Clock Timebase Routing Logic Figure B 33 Pause Trigger Path tis Selected Pause Trigger O _ 1 gt tis RTSI Terminal Figure B 34 Pause Trigger Output Routing Delay Timing Diagram Table B 20 Pause Trigger Output Routing Delay Timing Time From To Min ns Max ns ti3 Selected Pause Trigger RTSI 6 7 7 1 16 3 17 0 National Instruments Corporation B 29 M Series User Manual Appendix B Timing Diagrams e Sample Clock The rising edge of the Sample Clock is output synchronous to the Sample Clock Timebase It can be calculated by adding the Sample Clock Timebase insertion to the delay in Table B 21 The exported Sample Clock signal is active low each falling edge representing a conversion Routing Logic m RTSI PFI Internal Logic B D To Internal Logic Sample Clock Timebase gt gt Sample Clock Timebase RTSI PFI Terminal Figure B 36 Sample Clock Delay Timing Diagram Table B 21 Sample Clock Delay Timing Time From To Min ns Max ns ti4 AO Sample Clock PFI 9 7 10 7 31 1 34 3 AO Sample Clock RTSI 8 8 9 1 21 3 21 7 M Series User Manual B 30 ni com Appendix B Timing Diagrams Digital 1 0 Timing Diagrams This section describes t
88. Terminal device USB 6289 Screw Terminal LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6289 Screw Terminal LEDs USB 6289 Screw Terminal Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 3 Connector and LED Information for information about replacing the fuse on the USB 6289 Screw Terminal National Instruments Corporation A 157 M Series User Manual Appendix Device Specific Information USB 6289 Mass Termination USB 6289 Mass Termination Pinout Figure A 55 shows the pinout of the USB 6289 Mass Termination device For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information 3 Note M Series devices may be used with most E Series accessories However some E Series accessories use different terminal names Refer to the M Series and E Series Pinout Comparison section of Chapter 3 Connector and LED Information for more information M Series User Manual A 158 ni com Appendix Device Specific Information N Al 8 34 68 AIO Al 1 33 67 Al GND Al GND 32 66 AIO Al 10 31 65 Al2 AlI 3 30 64 Al GND AI GND 29 63 Al 11 Al 4 28 62 Al SENSE AI GND 27 61 Al 12 Al 13 26 60 A
89. USB 6251 Screw Terminal A 70 USB 6255 Mass Termination A 99 USB 6255 Screw Terminal A 96 USB 6259 BNC A 114 USB 6259 Mass Termination A 121 USB 6259 Screw Terminal A 111 USB 6281 Mass Termination A 138 USB 6281 Screw Terminal A 136 USB 6289 Mass Termination A 158 USB 6289 Screw Terminal A 155 pins default 7 30 PFI terminals as static digital I Os 8 3 pin assignments See pinouts pinouts position measurement 7 14 buffered 7 17 M Series User Manual comparison 3 4 counter default 7 30 device 1 2 NI 6220 A 2 NI 6224 A 24 NI 6250 A 60 NI 6254 A 84 NI 6280 A 126 NI 6284 A 143 PCI PCIe PXI PXIe 6251 A 65 PCI PCle PXI PXIe 6259 A 105 PCI PXI 6221 68 pin A 7 PCI PXI 6225 A 30 PCI PXI 6229 A 45 PCI PXI 6255 A 90 PCI PXI 6281 A 131 PCI PXI 6289 A 149 PCI 6221 37 pin A 12 RTSI connector 3 13 9 4 USB 6221 BNC A 17 USB 6221 Screw Terminal A 15 USB 6225 Mass Termination A 39 USB 6225 Screw Terminal A 36 USB 6229 BNC A 54 USB 6229 Screw Terminal A 51 I 12 power 5 V 3 6 connector PCI Express disk drive 3 9 rail D 1 power up states 6 7 8 6 prescaling 7 34 programmable function interface PFI 8 1 power up states 6 7 8 6 programmed I O 10 4 changing data transfer methods 10 5 programming devices in software 2 6 programming examples NI resources E 1 pulse encoders 7 16 generation for ETS 7 24 train generation 7 21 continuous 7 21 pulse width me
90. With single period measurement the counter counts the number of rising or falling edges on the Source input occurring between two active edges of the Gate input On the second active edge of the Gate input the counter stores the count in a hardware save register and ignores other edges on the Gate and Source inputs Software then reads the stored count Figure 7 7 shows an example of a single period measurement cre L SOURCE LFS IE Counter Value 0 1 2 3 4 5 HW Save Register 5 Figure 7 7 Single Period Measurement 7 6 ni com Chapter 7 Counters Buffered Period Measurement Buffered period measurement is similar to single period measurement but buffered period measurement measures multiple periods The counter counts the number of rising or falling edges on the Source input between each pair of active edges on the Gate input At the end of each period on the Gate signal the counter stores the count in a hardware save register DMA controller transfers the stored values to host memory The counter begins when it is armed The arm usually occurs in the middle of a period of the Gate input So the first value stored in the hardware save register does not reflect a full period of the Gate input In most applications this first point should be discarded Figure 7 8 shows an example of a buffered period measurement GATE SOURCE Counter Value Buffer Co
91. Z Reload with X4 Decoding Measurements Using Two Pulse Encoders The counter supports two pulse encoders that have two channels channels A and B The counter increments on each rising edge of channel A The counter decrements on each rising edge of channel B as shown in Figure 7 18 cha che Counter Value 2 X 3 X 4 X 5 Y 4 Y 3 X 4 Figure 7 18 Measurements Using Two Pulse Encoders 7 16 ni com Chapter 7 Counters For information about connecting counter signals refer to the Default Counter Timer Pinouts section Buffered Sample Clock Position Measurement With buffered position measurement position measurement using a sample clock the counter increments based on the encoding used after the counter is armed The value of the counter is sampled on each active edge of a sample clock A DMA controller transfers the sampled values to host memory The count values returned are the cumulative counts since the counter armed event that is the sample clock does not reset the counter You can route the counter sample clock to the Gate input of the counter You can configure the counter to sample on the rising or falling edge of the sample clock Figure 7 19 shows an example of a buffered X1 position measurement Counter Sample Clock Armed i Sample on Rising Edge ChA Ch B
92. _i Refers to any internal signal available to the analog input timing engine for use In the case of signals coming from an external terminal this is the signal after is been through the first input buffer _i also can refer to other internal signals such as internal timebases or signals coming from other blocks POUT Refers to any output signal right before it is driven to an output terminal Convert Clock Timebase and Sync Convert Clock Timebase Convert Clock Timebase is the source signal used to generate the signal that will actually cause the ADC to do a conversion p_AI_Convert This signal can be an internal or external timebase B 2 ni com National Instruments Corporation Appendix B Timing Diagrams that is divided by the SI2 counter or can be an external Convert Clock signal Sync Convert Clock Timebase is a signal related to Convert Clock Timebase that is used to synchronize external signals before they are used by circuits running from Convert Clock Timebase Sample Clock Timebase and Sync Sample Clock Timebase Sample Clock Timebase is the source for the SI counter and can be used to generate the sample timing Each Sample Clock in turn triggers the generation of one or more converts This signal can be an internal or external timebase Sync Sample Clock Timebase is a signal related to Sample Clock Timebase that is used to synchronize external signals before they are used by circuits running from Sample Clock Time
93. and Counter n TC Signals The Counter n Internal Output signal changes in response to Counter n TC The two software selectable output options are pulse output on TC and toggle output on TC The output polarity is software selectable for both options National Instruments Corporation 7 29 M Series User Manual Chapter 7 Counters With pulse or pulse train generation tasks the counter drives the pulse s on the Counter n Internal Output signal The Counter n Internal Output signal can be internally routed to be a counter timer input or an external source for AI AO DI or DO timing signals Routing Counter n Internal Output to an Output Terminal You can route Counter n Internal Output to any PFI lt 0 15 gt or RTSI lt 0 7 gt terminal All PFIs are set to high impedance at startup Frequency Output Signal The Frequency Output FREQ OUT signal is the output of the frequency output generator Routing Frequency Output to a Terminal You can route Frequency Output to any PFI lt 0 15 gt terminal All PFIs are set to high impedance at startup The FREQ OUT signal also can be routed to DO Sample Clock and DI Sample Clock Default Counter Timer Pinouts M Series User Manual By default NI DAQmx routes the counter timer inputs and outputs to the PFI pins shown in Table 7 4 To find the default NI DAQmx counter timer pins for the PCI 6221 37 pin USB 62xx Screw Terminal and USB 62xx BNC devices refer to Appendix
94. and temperature drift at run time No external circuitry is necessary an internal reference ensures high accuracy and stability over time and temperature changes Factory calibration constants are permanently stored in an onboard EEPROM and cannot be modified When you self calibrate the device software stores new constants in a user modifiable section of the EEPROM To return a device to its initial factory calibration settings software can copy the factory calibration constants to the user modifiable section of the EEPROM Refer to the NJ DAQmx Help or the LabVIEW Help in version 8 0 or later for more information about using calibration constants 2 2 ni com Chapter 2 DAQ System Overview For a detailed calibration procedure for M Series devices refer to the B E M S Series Calibration Procedure for NI DAQmx by clicking Manual Calibration Procedures on ni com calibration Signal Conditioning Many sensors and transducers require signal conditioning before a measurement system can effectively and accurately acquire the signal The front end signal conditioning system can include functions such as signal amplification attenuation filtering electrical isolation simultaneous sampling and multiplexing In addition many transducers require excitation currents or voltages bridge completion linearization or high amplification for proper and accurate operation Therefore most computer based measurement systems include some form of si
95. and the effect of the change Input Output The transfer of data to from a computer system involving communications channels operator interface devices and or data acquisition and control interfaces 1 The electrical characteristic of a circuit expressed in ohms and or capacitance inductance 2 Resistance Inch or inches A set of high level software functions that controls a specific GPIB VXI or RS232 programmable instrument or a specific plug in DAQ device Instrument drivers are available in several forms ranging from a function callable language to a virtual instrument VI in LabVIEW A circuit whose output voltage with respect to ground is proportional to the difference between the voltages at its two inputs An instrumentation amplifier normally has high impedance differential inputs and high common mode rejection Amount of time that passes between sampling consecutive channels in an Al scan list The interchannel delay must be short enough to allow sampling of all the channels in the channel list within the sample interval The greater the interchannel delay the more time the PGIA is allowed to settle before the next channel is sampled The interchannel delay is regulated by AI Convert Clock ai ConvertClock Connection between one or more of the following hardware software and the user For example hardware interfaces connect two other pieces of hardware 1 A means for a device to notify another device that a
96. certain period of time Selected Pause Trigger is the signal that becomes the Pause Trigger signal before synchronization p_AI_Convert The signal that starts the conversions of data at the ADC component This signal goes directly to the ADC but copies can be routed to output terminals B 3 M Series User Manual Appendix B Timing Diagrams Input Timing Input timing refers to the delays involved in importing external signals to be used as triggers or clocks in the AI timing engine Figures B 2 and B 3 and Table B 1 describe the insertion delays for external signals Reference Trigger ER Selected Reference Trigger e gt Terminal Start Trigger D Terminal Selected Start Trigger gt Selected Pause Trigger RTSI 7 Le D Pause Trigger SI Start WY k Sample Clock Timebase SI Counter N f Sync Sample Clock Timebase Block Q om Terminal D p_Al_Convert a t Clock Timeb oF sie TC onvert Clock Timebase Counter i Sync Convert Clock Timebase eles Selected Sample Clock Start gt D Terminal Figure B 2 Input Timing and the Analog Input Timing Engine Terminal H gt gt t M Series User Manual Figure B 3 Input Timing Diagram B 4 ni com Appendix B Timing Diagrams Table
97. channel 0 anda 1 mV signal is connected to channel 1 Suppose the input range for channel 0 is 10 V to 10 V and the input range of channel 1 is 200 mV to 200 mV You can connect channel 2 to AI GND or you can use the internal ground refer to Internal Channels in the NI DAQmx Help Set 4 8 ni com National Instruments Corporation Chapter 4 Analog Input the input range of channel 2 to 200 mV to 200 mV to match channel 1 Then scan channels in the order 0 2 1 Inserting a grounded channel between signal channels improves settling time because the NI PGIA adjusts to the new input range setting faster when the input is grounded Minimize Voltage Step between Adjacent Channels When scanning between channels that have the same input range the settling time increases with the voltage step between the channels If you know the expected input range of your signals you can group signals with similar expected ranges together in your scan list For example suppose all channels in a system use a 5 to 5 V input range The signals on channels 0 2 and 4 vary between 4 3 V and 5 V The signals on channels 1 3 and 5 vary between 4 V and 0 V Scanning channels in the order 0 2 4 1 3 5 produces more accurate results than scanning channels in the order 0 1 2 3 4 5 Avoid Scanning Faster Than Necessary Designing your system to scan at slower speeds gives the NI PGIA more time to settle to a more accurate level Here
98. connect your M Series device to an SCC module carrier such as the SC 2345 SC 2350 or SCC 68 use an SHC68 68 EPM shielded cable Use Connector 0 of your M Series device to control an SCC module carrier SCC carriers can be used with Connector with NI DAQ 7 4 and later B Note PCI Express users should consider the power limits on certain SCC modules without an external power supply Refer to the NI 625x Specifications and the PCI Express Device Disk Drive Power Connector section of Chapter 3 Connector and LED Information for information about power limits and increasing the current the device can supply on the 5 V terminal Refer to the SCC Advisor available by going to ni com info and entering the info code rdscav for more information M Series User Manual A 108 ni com Appendix Device Specific Information BNC Accessories You can use the SHC68 68 EPM shielded cable to connect your DAQ device to BNC accessories such as the following e BNC 2110 Provides BNC connectivity to all analog signals some digital signals and spring terminals for other digital signals e BNC 2111 Provides BNC connectivity to 16 single ended analog input signals two analog output signals five DIO PFI signals and the external reference voltage for analog output BNC 2120 Similar to the BNC 2110 and also has a built in function generator quadrature encoder temperature reference and thermocouple connector BNC 2090A Desktop
99. counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later Connecting Signals to the USB 6229 BNC Analog Input You can use each analog input BNC connector for one signal in differential mode or two signals in single ended mode e Differential Mode To connect signals in differential mode determine the type of signal source you are using a floating signal FS source or a ground referenced signal GS source Refer to the Connecting Analog Input Signals section of Chapter 4 Analog Input for more information National Instruments Corporation A 55 M Series User Manual Appendix Device Specific Information M Series User Manual To measure a floating signal source move the switch to the FS position To measure a ground referenced signal source move the switch to the GS position Figure A 20 shows the AI 0 BNC and corresponding FS GS switch on the top panel of the USB 6229 BNC AIO aS FS GS Figure A 20 FS GS Switch Figure A 21 shows the analog input circuitry on the USB 6229 BNC When the switch is set to the FS position AI x is grounded through a 0 1 UF capacitor in parallel with a 5 KQ resistor O e AI Xx O o AI x Aix Aix i oGS o GS i Floating Grounded i Source FS Source frs otpF 35kQ O4uF gt SSk i V7 AI GND 7 AI
100. data from one system to another Options for data transfer are DMA interrupt and programmed I O For programmed I O transfers the CPU in the PC reads data from the DAQ device whenever the CPU receives a software signal to acquire a single data point Interrupt based data transfers occur when the DAQ device sends an interrupt to the CPU telling the CPU to read the acquired data from the DAQ device DMA transfers use a DMA controller instead of the CPU to move acquired data from the device into computer memory Even though high speed data transfers can occur with interrupt and programmed I O transfers they require the use of the CPU to transfer data DMA transfers are able to acquire data at high speeds and keep the CPU free for performing other tasks at the same time Decibel The unit for expressing a logarithmic measure of the ratio of two signal levels dB 20log10 V1 V2 for signals in volts Direct current although the term speaks of current many different types of DC measurements are made including DC Voltage DC current and DC power An electronic board that performs general analog or digital I O functions on one or multiple channels connected to a PC through a bus or I O port such as PCI PXI Ethernet USB or serial G 6 ni com DIFF differential input digital I O digital signal digital trigger DIO DMA DMA controller chip driver E E Series edge detection EEPROM National Instrumen
101. debouncing filter Figure 8 1 shows the circuitry of one PFI line Each PFI line is similar Timing Signals Static DO Buffer To Input Timing Signal Selectors Direction Control e I O Protection PFI x P1 P2 Static DI Weak Pull Down PFI Filters Figure 8 1 M Series PFI Circuitry National Instruments Corporation 8 1 M Series User Manual Chapter 8 PFI When a terminal is used as a timing input or output signal it is called PFI x where x is an integer from 0 to 15 When a terminal is used as a static digital input or output it is called P1 x or P2 x On the I O connector each terminal is labeled PFI x P1 or PFI x P2 The voltage input and output levels and the current drive levels of the PFI signals are listed in the specifications of your device Using PFI Terminals as Timing Input Signals Use PFI terminals to route external timing signals to many different M Series functions Each PFI terminal can be routed to any of the following signals e AT Convert Clock ai ConvertClock e Al Sample Clock ai SampleClock e AI Start Trigger ai StartTrigger e Al Reference Trigger ai ReferenceTrigger e Al Pause Trigger ai PauseTrigger e AI Sample Clock Timebase ai SampleClockTimebase e AO Start Trigger ao StartTrigger e AO Sample Clock ao SampleClock e AO Sample Clock Timebase ao SampleClockTimebase e AO Pause Trigge
102. describing device terminals specifications features and operation are on the NI DAQmx CD that includes Device Documentation Insert the CD open the Device Documentation directory and double click the Device Documents shortcut for your language to find view and print device documents If you need more help getting started developing an application with NI products NI offers training courses To enroll in a course or obtain a detailed course outline refer to ni com training Technical Support on the Web For additional support refer to ni com support or zone ni com 3 Note You can download these documents at ni com manuals M Series User Manual DAQ specifications and some DAQ manuals are available as PDFs You must have Adobe Acrobat Reader with Search and Accessibility 5 0 5 or later installed to view the PDFs Refer to the Adobe Systems Incorporated Web site at www adobe com to download Acrobat Reader Refer to the National Instruments Product Manuals Library at ni com manuals for updated documentation resources XX ni com Getting Started M Series devices feature up to 80 analog input AT channels up to four analog output AO channels up to 48 lines of digital input output DIO and two counters If you have not already installed your device refer to the DAQ Getting Started Guide For specifications arranged by M Series device family refer to the specifications document for your device on ni com manuals Bef
103. designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case the user is required to correct the interference at their own expense Canadian Department of Communications This Class A digital apparatus meets all requirements of the Canadian Interference Causing Equipment Regulations Cet appareil num rique de la classe A respecte toutes les exigences du R glement sur le mat riel brouilleur du Canada Compliance with EU Directives Users in the European Union EU should refer to the Declaration of Conformity DoC for information pertaining to the CE marking Refer to the Declaration of Conformity DoC for this product for any additional regulatory compliance information To obtain the DoC for this product visit ni com certification search by model number or product line and click the appropriate link in the Certification column The CE marking Declaration of Conformity contains important supplementary information and instructions for the user or installer Contents About This Manual Conventions sine ne ann de en nt En PT ee RE tt td XV Related Documentation si
104. example of a buffered pulse width measurement GATE SOURCE Counter Value Buffer D NI Figure 7 6 Buffered Pulse Width Measurement National Instruments Corporation 7 5 M Series User Manual Chapter 7 Counters Note that if you are using an external signal as the Source at least one Source pulse should occur between each active edge of the Gate signal This condition ensures that correct values are returned by the counter If this condition is not met consider using duplicate count prevention described in the Duplicate Count Prevention section For information about connecting counter signals refer to the Default Counter Timer Pinouts section Period Measurement M Series User Manual In period measurements the counter measures a period on its Gate input signal after the counter is armed You can configure the counter to measure the period between two rising edges or two falling edges of the Gate input signal You can route an internal or external periodic clock signal with a known period to the Source input of the counter The counter counts the number of rising or falling edges occurring on the Source input between the two active edges of the Gate signal You can calculate the period of the Gate input by multiplying the period of the Source signal by the number of edges returned by the counter Single Period Measurement
105. from channel 1 The second method switches between channels much less often and is affected much less by settling time Analog Input Data Acquisition Methods M Series User Manual When performing analog input measurements you either can perform software timed or hardware timed acquisitions Software timed acquisitions With a software timed acquisition software controls the rate of the acquisition Software sends a separate command to the hardware to initiate each ADC conversion In NI DAQmx software timed acquisitions are referred to as having on demand timing Software timed acquisitions are also referred to as immediate or static acquisitions and are typically used for reading a single sample of data Hardware timed acquisitions With hardware timed acquisitions a digital hardware signal AI Sample Clock controls the rate of the acquisition This signal can be generated internally on your device or provided externally Hardware timed acquisitions have several advantages over software timed acquisitions The time between samples can be much shorter The timing between samples is deterministic Hardware timed acquisitions can use hardware triggering Hardware timed operations can be buffered or non buffered A buffer is a temporary storage in computer memory for to be generated samples Buffered In a buffered acquisition data is moved from the DAQ device s onboard FIFO memory to a PC buffer using
106. generation with start trigger 7 20 synchronization modes 7 37 timing diagrams B 36 counter input delays B 36 timing signals 7 25 triggering 7 31 troubleshooting C 3 counting edges 7 2 crosstalk when sampling multiple channels C 1 custom cabling 2 6 D DACs 5 1 DAQ hardware 2 1 system 2 1 DAQ 6202 2 2 DAQ STC2 2 2 National Instruments Corporation l 5 Index data acquisition methods 4 10 generation methods 5 4 transfer methods 10 4 changing 10 5 DMA 10 4 IRQ 10 4 programmed I O 10 4 USB Signal Stream 10 4 Declaration of Conformity NI resources E 2 default counter terminals 7 30 NI DAQmx counter timer pins 7 30 pins 7 30 detection troubleshooting C 3 device information A 1 multiple synchronization 9 3 NI 6220 A 2 NI 6221 A 7 NI 6224 A 24 NI 6225 A 30 NI 6229 A 45 NI 6250 A 60 NI 6251 A 65 NI 6254 A 84 NI 6255 A 90 NI 6259 A 105 NI 6280 A 126 NI 6281 A 131 NI 6284 A 143 NI 6289 A 149 pinouts 1 2 specifications 1 2 A 1 DI change detection 6 8 DI Sample Clock signal 6 4 di SampleClock 6 4 diagnostic tools NI resources E 1 DIFF connections using with floating signal sources 4 15 M Series User Manual Index using With ground referenced signal sources 4 22 when to use with floating signal sources 4 13 when to use with ground referenced signal sources 4 20 differential analog input troubleshooting C 1 differential connections using wi
107. i 2cccccccccsccssscssaescezscsssncesessasstvecdesssebtescssudestivesovnensss A 132 Figure A 58 USB 6281 Screw Terminal Pinout A 136 Figure A 59 USB 6281 Mass Termination Pinout A 139 Figure A 60 PCI PXI 6284 Pinout ss A 144 Figure A 61 PCI PXI 6289 Pinout ss A 150 Figure A 62 USB 6289 Screw Terminal Pinout A 156 Figure A 63 USB 6289 Mass Termination Pinout A 159 National Instruments Corporation xiii M Series User Manual About This Manual Conventions The M Series User Manual contains information about using the National Instruments M Series data acquisition DAQ devices with NI DAQmx 8 7 1 and later M Series devices feature up to 80 analog input AD channels and up to four analog output AO channels up to 48 lines of digital input output DIO and two counters lt gt bold italic monospace The following conventions are used in this manual Angle brackets that contain numbers separated by an ellipsis represent a range of values associated with a bit or signal name for example AO lt 3 0 gt The symbol leads you through nested menu items and dialog box options to a final action The sequence File Page Setup Options directs you to pull down the File menu select the Page Setup item and select Options from the last dial
108. in the signal and the ground potential difference between the signal source and the device ground Refer to the Using Non Referenced Single Ended NRSE Connections for Floating Signal Sources section for more information about NRSE connections When to Use Referenced Single Ended RSE Connections with Floating Signal Sources M Series User Manual Only use RSE input connections if the input signal meets the following conditions e The input signal can share a common reference point AI GND with other signals that use RSE e The input signal is high level greater than 1 V e The leads connecting the signal to the device are less than 3 m 10 ft DIFF input connections are recommended for greater signal integrity for any input signal that does not meet the preceding conditions In the single ended modes more electrostatic and magnetic noise couples into the signal connections than in DIFF configurations The coupling is the result of differences in the signal path Magnetic coupling is proportional to the area between the two signal conductors Electrical coupling is a function of how much the electric field differs between the two conductors With this type of connection the NI PGIA rejects both the common mode noise in the signal and the ground potential difference between the signal source and the device ground Refer to the Using Referenced Single Ended RSE Connections for Floating Signal Sources section for more inf
109. info code rdscav for more information BNC Accessories You can use the SHC68 68 EPM shielded cable to connect your DAQ device to BNC accessories such as the following e BNC 2110 Provides BNC connectivity to all analog signals some digital signals and spring terminals for other digital signals e BNC 2111 Provides BNC connectivity to 16 single ended analog input signals two analog output signals five DIO PFI signals and the external reference voltage for analog output e BNC 2120 Similar to the BNC 21 10 and also has a built in function generator quadrature encoder temperature reference and thermocouple connector e BNC 2090A Desktop rack mountable device with 22 BNCs for connecting analog digital and timing signals M Series User Manual A 134 ni com Appendix Device Specific Information Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks Use an SHC68 68 EPM shielded cable to connect an M Series device to a connector block such as the following e CB 68LP and CB 68LPR unshielded connector blocks e SCC 68 I O connector block with screw terminals general breadboard area bus terminals and four expansion slots for SCC signal conditioning modules e SCB 68 shielded connector block with temperature sensor e TBX 68 DIN rail mountable connector block e TB 2706 front panel mounted terminal block for PXI M Series devices RTSI Cables Use RTSI bus cab
110. interface for the device All external triggers are input on these terminals Internal signals can be exported to these terminals as well _i Signals All signals marked with _i are external signals that have been through the I O buffers and are ready for internal use B 22 ni com Appendix B Timing Diagrams Input Timing Input timing refers to the delays of importing signals from the external terminals so that the analog output timing engine can use them as sources for different triggers or clocks Figure B 23 and Table B 12 describe the insertion delays for external signals Terminal tu Ll t _i i Figure B 23 Input Timing Diagram Table B 12 Input Timing Time From To Min ns Max ns ti PFI PFL i 4 1 6 4 15 2 19 2 RTSI RTSLi 0 9 2 2 2 0 3 0 STAR STAR_i 0 9 2 8 The delay ranges given for PFI and RTSI represent the fastest and slowest terminal routing within the trigger group for a given condition maximum or minimum timing This difference can be useful when two external signals will be used together and the relative timing between the signals is important Internal Analog Output Timing The analog output timer has two internal clocks that are referenced Sample Clock Timebase and Sync Sample Clock Timebase How they are generated depends on how the analog output timer is configured If the analog output timing engine is configured to operate w
111. internal block of the DAQ STC2 Use the table to calculate the setup and hold times for your Source and Gate signals for the general case In the general case you can determine whether the setup and hold requirements are met by adding up the various delays of the appropriate signals through the counter timer circuit no E Count_Enable X X Selected_Source Figure B 49 DAQ STC2 Internal Block Setup and Hold Requirements Timing Diagram Table B 33 DAQ STC2 Internal Block Setup and Hold Requirements Timing Time Parameter Min ns Max ns tos Setup 1 5 tog Hold 0 National Instruments Corporation B 41 M Series User Manual Appendix B Timing Diagrams Example of the General Case Calculate the setup and hold time requirements when the Gate and Source come from PFI lines and the Gate is used in level mode iy Note This example shows how we determine the setup and hold times for the PFI to PFI example above first case using level gating Setup To calculate the setup time subtract the Source delay from the Gate delay Use maximum delays Gate Delay PFI to PFI_i 22 0 ns PFI_i to Selected Gate 6 0 ns Selected Gate to Count Enable Level 18 0 ns Count Enable Setup Time 1 5ns 47 5 ns Source Delay PFI to PFI_i 18 2 ns PFI_i to Selected Source 21 0 ns 39 2 ns Tsetup gt 47 5 ns 39 2 ns 8 3 ns Hold To calculate the hol
112. of the National Instruments Alliance Partner Program are business entities independent from National Instruments and have no agency partnership or joint venture relationship with National Instruments Patents For patents covering National Instruments products refer to the appropriate location Help Patents in your software the patents txt file on your media or ni com patents WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS 1 NATIONAL INSTRUMENTS PRODUCTS ARE NOT DESIGNED WITH COMPONENTS AND TESTING FOR A LEVEL OF RELIABILITY SUITABLE FOR USE IN OR IN CONNECTION WITH SURGICAL IMPLANTS OR AS CRITICAL COMPONENTS IN ANY LIFE SUPPORT SYSTEMS WHOSE FAILURE TO PERFORM CAN REASONABLY BE EXPECTED TO CAUSE SIGNIFICANT INJURY TO A HUMAN 2 IN ANY APPLICATION INCLUDING THE ABOVE RELIABILITY OF OPERATION OF THE SOFTWARE PRODUCTS CAN BE IMPAIRED BY ADVERSE FACTORS INCLUDING BUT NOT LIMITED TO FLUCTUATIONS IN ELECTRICAL POWER SUPPLY COMPUTER HARDWARE MALFUNCTIONS COMPUTER OPERATING SYSTEM SOFTWARE FITNESS FITNESS OF COMPILERS AND DEVELOPMENT SOFTWARE USED TO DEVELOP AN APPLICATION INSTALLATION ERRORS SOFTWARE AND HARDWARE COMPATIBILITY PROBLEMS MALFUNCTIONS OR FAILURES OF ELECTRONIC MONITORING OR CONTROL DEVICES TRANSIENT FAILURES OF ELECTRONIC SYSTEMS HARDWARE AND OR SOFTWARE UNANTICIPATED USES OR MISUSES OR ERRORS ON THE PART OF THE USER OR APPLICATIONS DESIGNER ADVERSE FACTORS SUCH AS THESE ARE HEREAFTER COLLECTIVELY TERMED S
113. on the device model For models not described below refer to the specifications for your device NI 622x Devices On NI 622x devices the AO offset is always 0 V AO GND The AO reference is always 10 V So for NI 622x devices the AO Range 10 V NI 625x Devices On NI 625x devices the AO offset is always 0 V AO GND The AO reference of each analog output AO lt 0 3 gt can be individually set to one of the following e 10V e 5 V e APFI lt 0 1 gt You can connect an external signal to APFI lt 0 1 gt to provide the AO reference The AO reference can be a positive or negative voltage If AO reference is a negative voltage the polarity of the AO output is inverted The valid ranges of APFI lt 0 1 gt are listed in the device specifications You can use one of the AO lt 0 3 gt signals to be the AO reference for a different AO signal However you must externally connect this channel to APFI 0 or APFI 1 5 2 ni com Chapter 5 Analog Output NI 628x Devices On NI 628x devices the AO offset of each analog output can be individually set to one of the following e 0V AO GND e 5V e APFI lt 0 1 gt e AO lt 0 3 gt You can connect an external signal to APFI lt 0 1 gt to provide the AO offset You can route the output of one of the AO lt 0 3 gt signals to be the AO offset for a different AO lt 0 3 gt signal For example AO 0 can be routed to be the AO offset of AO 1 This route is done on
114. pinout of the USB 6255 Screw Terminal For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information 3 Note For a ground connection you can connect the shield of a shielded cable to the chassis ground lug depicted in Figure A 42 M Series User Manual A 96 ni com Appendix Device Specific Information AIO Al 1 Al2 Al3 Al4 Al GND AI5 Al 6 Al7 Al 16 Al 17 Al 18 Al GND Al SENSE AO GND AO 0 Al 49 AI 50 AI 51 AI 52 AI 53 AI 54 AI 55 AI GND AI 64 Al 65 Al 66 Al 67 Al 68 Al 69 Al 70 Al 71 OMANODARWND fo 11 12 13 14 15 16 S S alk Aig 3 J san Ae a S S 20 A 11 AI 22 36 IS S 21 Al 12 AIGND 37 S S 22 Al GND ES 38 I 23 Al 13 S PAAA AI 32 39 IS IN S 2s AI 15 ASS 40 LS SIl 26 alos Al 34 ATS S fea NS N IS QI 28 Al 26 AIGND 44 I S 29 AI GND AT 45l IS S 30 APFI0 AI 38 a6 IS SI 31 AO GND S Sl 32 a0 1 AI 39 47 IS S Al 48 48 S al at PO 0 97 S NE PO 1 98 IS S NE PO 2 99 IS S Ae P0 3 100 IS S GES P0 4 101 IS S NES P0 5 102 IS N CNE P0 6 103 IS HS TEA PO 7 104 Si RES PFIO P1 0 105 S NEZ PFI 1 P1 1_ 106 IS S AE PFI2 P1 2 107 IS S ET
115. refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information J MO 4 Al4 P0 0 ng 81 PFI 8 P2 0 Al 12 SI 82 D GND AI 8 2 PO 66 IS AI GND SI 83 PFI 9 P2 1 AI GND 3 PO 2 67 IS AI5 SI 84 D GND Al 1 4 P0 3 68 IS Al 13 85 PFI 10 P2 2 Al 9 5 P0 4 69 IS Al GND 86 D GND AI GND 6 P0 5 70 IS AI 6 SI 87 PFI 11 P2 3 AI 2 7 P0 6 71 I9 AI 10 8 Al 14 P07 72 88 D GND Al GND 89 PFI 12 P2 4 Al GND 9 PFI 0 P1 0 73 AI7 SI 20 D GND AI 3 10 PFI 1 P1 1 74 I Al 15 91 PFI 13 P2 5 Al 11 11 PFI 2 P1 2_75 S AI GND 92 D GND AIGND 12 PFI 3 P1 3 76 S APFI O S 93 PFI 14 P2 6 AI SENSE 13 PF14 P1 4 77 IS AI GND Sl 94 D GND AIGND 14 PFI 5 P1 5 78 S AO 1 95 PFI 15 P2 7 AO 0 15 morn FREINS IS SEEEN AOGND 16 PFI7 P1 7 80 S 96 me Figure A 58 USB 6281 Screw Terminal Pinout M Series User Manual A 136 ni com Appendix Device Specific Information Table A 28 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number Name CTR 0 SRC 81 PFI 8 CTR 0 GATE 83 PFI 9 CTR 0 AUX 85 PFI 10 CTR 0 OUT 89 PFI 12 CTROA 81 PFI 8 CTROZ 83 PFI 9 CTROB 85 PFI 10 CTR 1 SRC 76 PFI 3 CTR 1 GATE 77 PFI 4 CTR 1 AUX 87 PFI 11 CTR 1 OUT 91 PFI 13 CT
116. ses 7 24 Counter Timing Signals sieste ue Ant En den en As 7 25 Counter n Source Signal 7 26 Routing a Signal to Counter n Source 7 26 Routing Counter n Source to an Output Terminal sssseeseeeeseeeee 7 27 Counter A Gate Signal nt Mn nt ee bees ds 7 27 Routing a Signal to Counter n Gate 7 27 National Instruments Corporation ix M Series User Manual Contents Routing Counter n Gate to an Output Terminal 0 0 ee 7 27 Counter n AUX Signal sconna sareen nra a trapi iite ii apii 7 28 Routing a Signal to Counter n AUX sssssssesseeseersrrereresrrsrsresrrsrreesreee 7 28 Counter n A Counter n B and Counter n Z Signals cceeceseceeseeseeeeeeeeaee 7 28 Routing Signals to A B and Z Counter Inputs 0 0 7 28 Routing Counter n Z Signal to an Output Terminal 7 28 Counter n Up_Down Signal 7 29 Counter n HW Arm Sigtial c ccc sccceccsesgessenscsaceesteecessvsstects a 7 29 Routing Signals to Counter n HW Arm Input 7 29 Counter n Internal Output and Counter n TC Signals eee eee eters 7 29 Routing Counter n Internal Output to an Output Terminal 7 30 Frequency Output Signal 2225 ststiniasntesn hante 7 30 Routing Frequency Output to a Terminal 7 30 Default Counter Timer Pinouts ss 7 30 Counter TiS Sern Bia o inst in alim ini ni EEA EERE E eas Plein ein 7 31 Other Counter Features 3ssrsss heures etes nettes 7 32 Cascading Counteis rensie Meter sataneenninebe an 7 32 Cou
117. set to high impedance at startup National Instruments Corporation 7 27 M Series User Manual Chapter 7 Counters Counter n Aux Signal The Counter n Aux signal indicates the first edge in a two signal edge separation measurement Routing a Signal to Counter n Aux Each counter has independent input selectors for the Counter n Aux signal Any of the following signals can be routed to the Counter n Aux input e RTSI lt 0 7 gt e PFI lt 0 15 gt e AIl Reference Trigger ai ReferenceTrigger e Al Start Trigger ai StartTrigger e PXI STAR e Analog Comparison Event In addition Counter 1 Internal Output Counter 1 Gate Counter 1 Source or Counter 0 Gate can be routed to Counter 0 Aux Counter 0 Internal Output Counter 0 Gate Counter 0 Source or Counter Gate can be routed to Counter 1 Aux Some of these options may not be available in some driver software Counter n A Counter n B and Counter n Z Signals M Series User Manual Counter n B can control the direction of counting in edge counting applications Use the A B and Z inputs to each counter when measuring quadrature encoders or measuring two pulse encoders Routing Signals to A B and Z Counter Inputs Each counter has independent input selectors for each of the A B and Z inputs Any of the following signals can be routed to each input e RTSI lt 0 7 gt e PFI lt 0 15 gt e PXI STAR e Analog Comparison Event Routing Counter n Z Signal
118. signal The source can be any of the following signals e AI Sample Clock ai SampleClock e AT Convert Clock ai ConvertClock e AO Sample Clock ao SampleClock e Counter n Internal Output e Frequency Output e DI Change Detection Output Several other internal signals can be routed to DO Sample Clock through RTSI Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later for more information Using an External Source You can route any of the following signals as DO Sample Clock e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXI STAR e Analog Comparison Event an analog trigger You can generate samples on the rising or falling edge of DO Sample Clock You must ensure that the time between two active edges of DO Sample Clock is not too short If the time is too short the DO waveform generation FIFO is not able to read the next sample fast enough The DAQ device reports an overrun error to the host software 6 6 ni com Chapter 6 Digital I O Routing DO Sample Clock to an Output Terminal You can route DO Sample Clock out to any PFI terminal The PFI circuitry inverts the polarity of DO Sample Clock before driving the PFI terminal 1 0 Protection Each DIO and PFI signal is protected against overvoltage undervoltage and overcurrent conditions as well as ESD events However you should avoid these fault conditions by following these guidelines e Ifyou configure a PFI or DIO l
119. single two signal edge separation 7 18 two signal edge separation 7 17 using quadrature encoders 7 14 using two pulse encoders 7 16 measuring high frequency with two counters 7 11 large range of frequencies using two counters 7 12 low frequency with one counter 7 9 averaged 7 10 methods data transfer 10 4 minimizing glitches on the output signal 5 3 output signal glitches C 3 voltage step between adjacent channels 4 9 multichannel scanning considerations 4 7 multiple device synchronization 9 3 MUX 4 1 M Series User Manual Index National Instruments support and services E 1 NET languages documentation xix NI 6220 A 2 accessory options A 4 cabling options A 4 pinout A 2 specifications A 4 NI 6221 A 7 NI 6224 A 24 accessory options A 26 cabling options A 26 pinout A 24 specifications A 26 NI 6225 A 30 specifications A 41 NI 6229 A 45 NI 6250 A 60 accessory options A 62 cabling options A 62 pinout A 60 specifications A 62 NI 6251 A 65 specifications A 81 NI 6254 A 84 accessory options A 86 cabling options A 86 pinout A 84 specifications A 86 NI 6255 A 90 specifications A 92 A 101 NI 6259 A 105 specifications A 123 NI 6280 A 126 accessory options A 128 cabling options A 128 pinout A 126 specifications A 128 NI 6281 A 131 M Series User Manual 1 10 specifications A 133 NI 6284 A 143 accessory options A 145 cabling options A 145 pinout
120. slots and are not system controllers Using PXI with CompactPCI Using PXI compatible products with standard CompactPCI products is an important feature provided by the PXI Hardware Specification Revision 2 1 If you use a PXI compatible plug in module in a standard CompactPCI chassis you cannot use PXI specific functions but you can still use the basic plug in device functions For example the RTSI bus on a PXI M Series device is available in a PXI chassis but not ina CompactPCI chassis The CompactPCI specification permits vendors to develop sub buses that coexist with the basic PCI interface on the CompactPCI bus Compatible operation is not guaranteed between CompactPCI devices with different sub buses nor between CompactPCI devices with sub buses and PXI The standard implementation for CompactPCI does not include these sub buses The PXI M Series device works in any standard CompactPCI chassis adhering to the PICMG CompactPCI 2 0 R3 0 core specification PXI specific features are implemented on the J2 connector of the CompactPCI bus The PXI device is compatible with any CompactPCI chassis with a sub bus that does not drive the lines used by that device Even if the sub bus is capable of driving these lines the PXI device is still compatible as long as those terminals on the sub bus are disabled by default and never enabled A Caution Damage can result if these lines are driven by the sub bus NI is not liable for any damage resul
121. that locates an edge of an analog signal such as the edge of a square wave Electrically Erasable Programmable Read Only Memory ROM that can be erased with an electrical signal and reprogrammed Some SCXI modules contain an EEPROM to store measurement correction coefficients M Series User Manual Glossary encoder EXTCLK external trigger EXTREF FIFO filter filtering M Series User Manual A device that converts linear or rotary displacement into digital or pulse signals The most popular type of encoder is the optical encoder which uses a rotating disk with alternating opaque areas a light source and a photodetector External clock signal A voltage pulse from an external source that causes a DAQ operation to begin External reference signal First In First Out memory buffer A data buffering technique that functions like a shift register where the oldest values first in come out first Many DAQ products and instruments use FIFOs to buffer digital data from an A D converter or to buffer the data before or after bus transmission The first data stored is the first data sent to the acceptor FIFOs are often used on DAQ devices to temporarily store incoming or outgoing data until that data can be retrieved or output For example an analog input FIFO stores the results of A D conversions until the data can be retrieved into system memory a process that requires the servicing of interrupts and often the p
122. the basic accuracy of time or frequency based measurements For instruments timebase refers to the accuracy of the internal clock Output delay time An upgrade to the earlier version of NI DAQ Traditional NI DAQ Legacy has the same VIs and functions and works the same way as NI DAQ 6 9 x You can use both Traditional NI DAQ Legacy and NI DAQmx on the same computer which is not possible with NI DAQ 6 9 x A device that responds to a physical stimulus heat light sound pressure motion flow and so on and produces a corresponding electrical signal See also sensor 1 Any event that causes or starts some form of data capture 2 An external stimulus that initiates one or more instrument functions Trigger stimuli include a front panel button an external input voltage pulse or a bus trigger command The trigger may also be derived from attributes of the actual signal to be acquired such as the level and slope of the signal Source clock period Source pulse width Transistor Transistor Logic A digital circuit composed of bipolar transistors wired in a certain manner A typical medium speed digital technology Nominal TTL logic levels are 0 and 5 V G 18 ni com USB virtual channel W waveform Glossary Universal Serial Bus A 480 Mbit s serial bus with up to 12 Mbps bandwidth for connecting computers to keyboards printers and other peripheral devices USB 2 0 retains compatibility with the origin
123. the pinout of the USB 6251 BNC For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information DIGITAL AND TIMING 1 0 PFI 1 P1 1 PFI 2 P1 2 PFI 3 P1 3 POWER 5 V NI USB 6251 8 Ini inputs ee 126 MS tion Cort relate Digital 10 for Use PFI 5 P1 5 PFI 6 P1 6 PFI 7 P1 7 DIGITAL ANDTIMING 1 0 O M Series User Manual D GND PFI 8 P2 0 PFI 9 P2 1 PFI 10 P2 2 PFI 11 P2 3 D GND PFI 12 P2 4 PFI 13 P2 5 PFI 14 P2 6 PFI 15 P2 7 D GND D GND AI GND AI SENSE NC CHS GND x NATIONAL INSTRUMENTS Figure A 30 USB 6251 BNC Top Panel and Pinout A 72 ni com Appendix Device Specific Information Table A 16 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Name CTR 0 SRC PFI 8 CTR 0 GATE PFI9 CTR 0 AUX PFI 10 CTR 0 OUT PFI 12 CTROA PFI 8 CTR OZ PFI9 CTROB PFI 10 CTR 1 SRC PFI 3 CTR 1 GATE PFI 4 CTR 1 AUX PFI 11 CTR 1 OUT PFI 13 CTR1A PFI 3 CTRIZ PFI 4 CTR1B PFI 11 FREQ OUT PFI 14 Sy Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later
124. the task once for every AI Sample Clock A measurement acquisition consists of one or more samples You can specify an internal or external source for AI Sample Clock You also can specify whether the measurement sample begins on the rising edge or falling edge of AI Sample Clock Using an Internal Source One of the following internal signals can drive AI Sample Clock e Counter n Internal Output e AI Sample Clock Timebase divided down e A pulse initiated by host software A programmable internal counter divides down the sample clock timebase Several other internal signals can be routed to AI Sample Clock through RTSI Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later for more information 4 28 ni com Chapter 4 Analog Input Using an External Source Use one of the following external signals as the source of AI Sample Clock e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXI STAR e Analog Comparison Event an analog trigger Routing Al Sample Clock Signal to an Output Terminal You can route AI Sample Clock out to any PFI lt 0 15 gt or RTSI lt 0 7 gt terminal This pulse is always active high You can specify the output to have one of two behaviors With the pulse behavior your DAQ device briefly pulses the PFI terminal once for every occurrence of AI Sample Clock With level behavior your DAQ device drives the PFI terminal high during the entire sample All PFI
125. to be installed The installed documentation contains the NI DAQmx API overview measurement tasks and concepts and function reference This help is fully integrated into the Visual Studio NET documentation To view the NI DAQmx NET documentation go to Start Programs National Instruments NI DAQ NI DAQmx NET Reference Help Expand NI Measurement Studio Help NI Measurement Studio NET Class Library Reference to view the function reference Expand NI Measurement Studio Help NI Measurement Studio NET Class National Instruments Corporation xix M Series User Manual About This Manual Library Using the Measurement Studio NET Class Libraries to view conceptual topics for using NI DAQmx with Visual C and Visual Basic NET To get to the same help topics from within Visual Studio go to Help Contents Select Measurement Studio from the Filtered By drop down list and follow the previous instructions Device Documentation and Specifications Training Courses The NI 622x Specifications contains all specifications for the NI 6220 NI 6221 NI 6224 NI 6225 and NI 6229 M Series devices The NI 625x Specifications contains all specifications for the NI 6250 NI 6251 NI 6254 NI 6255 and NI 6259 M Series devices The NI 628x Specifications contains all specifications for the NI 6280 NI 6281 NI 6284 and NI 6289 M Series devices Documentation for supported devices and accessories including PDF and help files
126. to develop a new application or add example code to an existing application To locate LabVIEW and LabWindows CVI examples open the National Instruments Example Finder In LabVIEW and LabWindows CVI select Help Find Examples Measurement Studio Visual Basic and ANSI C examples are located in the following directories e NI DAQmx examples for Measurement Studio supported languages are in the following directories Measurement Studio VCNET Examples NIDaq Measurement Studio DotNET Examples NIDaq e NI DAQmx examples for ANSI C are in the NI DAQ Examples DAQmx ANSI C Dev directory For additional examples refer to zone ni com National Instruments Corporation 2 7 M Series User Manual Connector and LED Information The I O Connector Signal Descriptions M Series and E Series Pinout Comparison 5 V Power Source PCI Express Device Disk Drive Power Connector and RTSI Connector Pinout sections contain information about M Series connectors The USB Device Fuse Replacement and LED Patterns sections refer to M Series USB device fuses and LEDs Refer to Appendix A Device Specific Information for device I O connector pinouts 1 0 Connector Signal Descriptions Table 3 1 describes the signals found on the I O connectors Not all signals are available on all devices National Instruments Corporation 3 1 M Series User Manual Chapter 3 Connector and LED Information Table 3 1 1 0 Connect
127. to ni com info and entering the info code rdscav for more information BNC Accessories Using a BNC Accessory with Connector 0 Connector 0 of your device is compatible with several BNC accessories e BNC 2110 Provides BNC connectivity to all analog signals some digital signals and spring terminals for other digital signals e BNC 2111 Provides BNC connectivity to 16 single ended analog input signals two analog output signals five DIO PFI signals and the external reference voltage for analog output e BNC 2120 Similar to the BNC 2110 and also has a built in function generator quadrature encoder temperature reference and thermocouple connector e BNC 2090A Desktop rack mountable device with 22 BNCs for connecting analog digital and timing signals National Instruments Corporation A 33 M Series User Manual Appendix Device Specific Information You can use the SHC68 68 EPM shielded cable to connect Connector 0 of your DAQ device to BNC accessories Using a BNC Accessory with Connector 1 Connector 1 of your device is compatible with BNC 2115 BNC 2115 provides BNC connectivity to 24 of the differential 48 single ended analog input signals on Connector 1 You can use an SHC68 68 cable to connect to the BNC 2115 Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks such as e CB 68LP and CB 68LPR unshielded connector blocks e SCC 68 I O conne
128. wires Analog outputs are also individually shielded e R68 68 Highly flexible unshielded ribbon cable Custom Cabling and Connectivity The CA 1000 is a configurable enclosure that gives user defined connectivity and flexibility through customized panelettes Visit ni com for more information about the CA 1000 Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more information about custom cabling solutions USB 6281 Mass Termination LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6281 Mass Termination LEDs USB 6281 Mass Termination Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 3 Connector and LED Information for information about replacing the fuse on the USB 6281 Mass Termination NI recommends that you use the SH68 68 EPM cable however an SH68 68 EP cable will work with M Series devices M Series User Manual A 142 ni com Appendix Device Specific Information NI 6284 PCI PXI 6284 Pinout Figure A 60 shows the pinout of the PCI PXI 6284 The I O signals appear on two 68 pin connectors For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information 3 Note M Series devices may be used with most E Series accessories However some E Series accessories use different terminal names Refer to the M
129. 0 In most applications you can use the following cables with Connector 0 e SHC68 68 EPM High performance cable designed specifically for M Series devices It has individual bundles separating analog and digital signals Each differential analog input channel is routed on an individually shielded twisted pair of wires Analog outputs are also individually shielded SHC68 68 Lower cost shielded cable with 34 twisted pairs of wire e RC68 68 Highly flexible unshielded ribbon cable Choosing a Cable for Connector 1 In most applications you can use the following cables with Connector 1 e SHC68 68 Shielded cable with 34 twisted pairs of wire Each differential analog input channel on Connector 1 is routed on a twisted pair on the SHC68 68 cable e RC68 68 Highly flexible unshielded ribbon cable Custom Cabling and Connectivity The CA 1000 is a configurable enclosure that gives user defined connectivity and flexibility through customized panelettes Visit ni com for more information about the CA 1000 Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more information about custom cabling solutions NI recommends that you use the SHC68 68 EPM cable however an SHC68 68 EP cable will work with M Series devices National Instruments Corporation A 95 M Series User Manual Appendix Device Specific Information USB 6255 Screw Terminal USB 6255 Screw Terminal Pinout Figure A 42 shows the
130. 115 Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks such as e CB 68LP and CB 68LPR unshielded connector blocks e SCC 68 I O connector block with screw terminals general breadboard area bus terminals and four expansion slots for SCC signal conditioning modules e SCB 68 shielded connector block with temperature sensor make sure the switches are set properly e TBX 68 DIN rail mountable connector block e TB 2706 front panel mounted terminal block for PXI M Series devices You can use one screw terminal accessory with the signals on either connector of your M Series device You can use two screw terminal accessories with one M Series device by using both connectors 3 RTSI Cables Use RTSI bus cables to connect timing and synchronization signals among PCI devices such as M Series E Series CAN and other measurement vision and motion devices Since PXI devices use PXI backplane signals for timing and synchronization no cables are required Cables The PCI PXI 6255 has two connectors that require different cables NI recommends that you use the SHC68 68 cable when the SCB 68 is connected to Connector 1 2 TB 2706 uses Connector 0 of your PXI device After a TB 2706 is installed Connector 1 cannot be used 3 The SCC 68 only can be used with Connector 0 M Series User Manual A 94 ni com Appendix Device Specific Information Choosing a Cable for Connector
131. 125 SB 6259 Screw Terminal A 113 SB 6281 Mass Termination A 142 SB 6281 Screw Terminal A 137 SB 6289 Mass Termination A 162 SB 6289 Screw Terminal A 157 fuse replacement USB devices 3 10 Gaaaeae tests cite ets Gq G generations analog output data 5 4 buffered hardware timed 5 4 clock 9 1 continuous pulse train 7 21 digital waveform 6 5 frequency 7 23 hardware timed 5 4 non buffered hardware timed 5 4 pulse for ETS 7 24 pulse train 7 21 retriggerable single pulse 7 20 simple pulse 7 19 single pulse 7 19 single pulse with start trigger 7 20 software timed 5 4 getting started 1 1 AI applications in software 4 38 AO applications in software 5 12 DIO applications in software 6 10 ghost voltages when sampling multiple channels C 1 M Series User Manual Index ground reference connections checking C 1 settings 4 1 4 4 analog input 4 4 ground referenced signal sources connecting 4 20 description 4 20 using in differential mode 4 22 using in NRSE mode 4 23 when to use in differential mode 4 20 when to use in NRSE mode 4 21 when to use in RSE mode 4 21 H hardware 1 1 2 1 hardware timed acquisitions 4 10 generations 5 4 help technical support E 1 hysteresis analog edge triggering with 11 5 T O connector 3 1 NI 6220 pinout A 2 NI 6250 pinout A 60 NI 6254 pinout A 84 NI 6224 pinout A 24 NI 6280 pinout A 126 NI 6284 pinout A 143 PCTI PClIe PXI PXIe 6251 pi
132. 18 5V 8 42 Po 19 D GND 7 41 Po 20 P0 21 6 40 P0 29 P0 22 5 39 Po 31 D GND 4 38 P0 23 P0 25 3 37 P0 24 P0 28 2 36 D GND P0 30 1 35 D GND Lee CONNECTOR 1 Al 16 31 TERMINAL 68 TERMINAL 35 ol lo TERMINAL 34 TERMINAL 1 National Instruments Corporation Figure A 63 USB 6289 Mass Termination Pinout A 159 M Series User Manual Appendix Device Specific Information Default Connector 0 Pin Number Counter Timer Signal Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 PFI 10 CTR 0 OUT 2 PFI 12 CTROA 37 PFI 8 CTROZ 3 PFI 9 CTROB 45 PFI 10 CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR 1 OUT 40 PFI 13 CTR 1 A 42 PFI 3 CTRIZ 41 PFI 4 CTR1IB 46 PFI 11 FREQ OUT 1 PFI 14 AJA Note For more information about default NI DAQmx counter inputs refer to Connecting Table A 33 Default NI DAQmx Counter Timer Pins Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later M Series User Manual USB 6289 Mass Termination Specifications Refer to the M 628x Specifications for more detailed information about the USB 6289 Mass Termination device USB 6289 Mass Termination Accessory and Cabling Options This section describes some cable and accessory options for M Series devices with two 68 pin connectors such as the USB 6289 Mass Termination devic
133. 2 BNCs for connecting analog digital and timing signals M Series User Manual A 10 ni com Appendix Device Specific Information Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks Use an SHC68 68 EPM shielded cable to connect an M Series device to a connector block such as the following e CB 68LP and CB 68LPR unshielded connector blocks e SCC 68 I O connector block with screw terminals general breadboard area bus terminals and four expansion slots for SCC signal conditioning modules e SCB 68 shielded connector block with temperature sensor e TBX 68 DIN rail mountable connector block e TB 2706 front panel mounted terminal block for PXI M Series devices RTSI Cables Use RTSI bus cables to connect timing and synchronization signals among PCI devices such as M Series E Series CAN and other measurement vision and motion devices Since PXI devices use PXI backplane signals for timing and synchronization no cables are required Cables In most applications you can use the following cables e SHC68 68 EPM High performance cable designed specifically for M Series devices It has individual bundles separating analog and digital signals Each differential analog input channel is routed on an individually shielded twisted pair of wires Analog outputs are also individually shielded e SHC68 68 Lower cost shielded cable with 34 twisted pairs of wire e RC68 68
134. 2 P1 2 CONVERT M Series User Manual 3 4 ni com Chapter 3 Connector and LED Information Table 3 2 M Series and E Series Device Pinout Comparison Continued E Series M Series Terminal Terminal Terminal Differences 11 PFI 0 AI START TRIG PFI 0 P1 0 On E Series devices as an input this terminal can either TRIG1 be a PFI input or the analog trigger input On M Series devices as an input this terminal can only be a PFI input Analog triggers use the APFI lt 0 1 gt terminals E Series devices can drive this terminal with the AI START TRIG signal M Series devices as an output can drive this terminal with the AI START TRIG signal You also can route many other internal timing signals to this terminal On M Series devices you also can use this terminal as the digital I O signal P1 0 Also refer to Chapter 8 PFI 16 P0 6 P0 6 On both E Series and M Series devices these terminals are digital I O signals You can individually configure each signal as an input or output 48 P0 7 P0 7 On E Series devices P0 6 and P0 7 also can control the up down signal of general purpose Counters 0 and 1 respectively On M Series devices you have to use one of the PFI terminals to control the up down signal of general purpose Counters 0 and 1 20 AO EXT REF APFI 0 On E Series devices this terminal is the external EXTREF reference input for the AO circuitry On M Series devices this terminal can be us
135. 259 Specifications Refer to the NI 625x Specifications for more detailed information about the NI PCI PCle PXI PXIe 6259 device NI PCI PCle PXI PXle 6259 Accessory and Cabling Options This section describes some cable and accessory options for M Series devices with two 68 pin connectors such as the NI PCI PCIe PXI PXIe 6259 Refer to ni com for other accessory options including new devices National Instruments Corporation A 107 M Series User Manual Appendix Device Specific Information SCXI Accessories SCXI is a programmable signal conditioning system designed for measurement and automation applications To connect your M Series device to an SCXI chassis use the SCXI 1349 adapter and an SHC68 68 EPM cable Use Connector 0 of your M Series device to control SCXI NI DAQ 7 4 and later supports SCX in parallel mode on Connector 1 Note When using Connector 1 in parallel mode with SCXI modules that support track and hold you must programmatically disable track and hold You also can use an M Series device to control the SCXI section of a PXI SCXI combination chassis such as the PXI 1010 or PXI 1011 The M Series device in the rightmost PXI slot controls the SCXI devices No cables or adapters are necessary Refer to the SCXT Advisor available by going to ni com info and entering the info code rdscad for more information SCC Accessories SCC provides portable modular signal conditioning to your DAQ system To
136. 3 67 Al GND AI GND 32166 AI9 Al 10 31 65 Al2 Al3 30 64 Al GND Al GND 29 63 Al 11 Al 4 28 62 Al SENSE Al GND 27 61 Al 12 Al 13 26 60 AI5 Al6 25 59 Al GND Al GND 24 58 Al 14 Al 15 23 57 Al7 AO 0 22 56 AI GND AO 1 2155 AO GND APFI 0 20 54 AO GND P0 4 19 53 D GND D GND 18 52 P0 0 PO 1 17 51 PO 5 P0 6 16 50 D GND D GND 15 49 P0 2 5V 14 48 PO 7 D GND 13 47 P0 3 D GND 12 46 PFI 11 P2 3 PFI 0 P1 0 11 45 PFI 10 P2 2 PFI 1 P1 1 10 44 D GND D GND 9 48 PFI 2 P1 2 5V 8 42 PFI3 P1 3 D GND 7 41 PFI4 P1 4 PFI 5 P1 5 6 40 PFI 13 P2 5 PFI 6 P1 6 5 39 PFI 15 P2 7 D GND 4 38 PFI 7 P1 7 PFI 9 P2 1 3 37 PFI 8 P2 0 PFI 12 P2 4 2 36 D GND PFI 14 P2 6 1 35 D GND U CONNECTOR 0 AI 0 15 TERMINAL 68 TERMINAL 35 D TERMINAL 34 TERMINAL 1 AI 24 34 68 Al 16 Al 17 33 67 Al GND Al GND 32 66 Al 25 Al 26 31165 Al 18 Al 19 30 64 Al GND AI GND 29 63 Al 27 Al 20 28 62 Al SENSE 2 Al GND 27 61 Al 28 Al 29 26 60 Al 21 AI 22 25 59 AI GND AI GND 24 58 AI 30 AI 31 23 57 Al 23 AO 2 22 56 AI GND AO 3 21 55 AO GND APFI 1 20 54 AO GND PO 12 19 53 D GND
137. 30 shows the external trigger and external clock and the trigger delay and clock delay DFF External 3 Trigger ons D QF External Clock ClockDelay Figure B 30 External Trigger and External Clock Application To satisfy the DFF setup and hold requirement the following condition must be true Externalgetup 2 DFF getup ClockDelay TriggerDelay Externalyoiqg 2 DFFyo14 ClockDelay TriggerDelay DFFsetup and DFFxa are given by Table B 16 for AO Start Trigger and Table B 18 for AO Pause triggers ClockDelay is the sum of the input timing shown in Table B 12 and insertion timing shown in Table B 13 TriggerDelay is the sum of the input timing shown in Table B 12 and internal timing shown in Tables B 15 and B 17 For setup calculations use the maximum timing parameters For hold calculations use the minimum timing parameters For input timing as shown in Table B 12 two numbers are given for the maximum delay and two numbers for the minimum delay In order to account for the worst case skew between different input terminals use the range given in the input delay tables in the Input Timing section in a way that provides the most conservative results For setup calculations use the bigger number for TriggerDelay and the smaller number ClockDelay For hold calculations use the smaller number for TriggerDelay and the larger number for ClockDelay National Instruments Corporation B 27 M Ser
138. 4 10 shows how to connect a ground referenced signal source to the M Series device configured in DIFF mode Al O OO oo kd Ground p Referenced t Instrumentation Signal Vs Amplifier Source o So Al Lol Measured Voltage Common H 00 _ Mode V i l oa Noise and em 4 Ground R Potential 77 b ed Input Multiplexers oe Al SENSE AI GND I O Connector M Series Device Configured in DIFF Mode Figure 4 10 Differential Connections for Ground Referenced Signal Sources With this type of connection the NI PGIA rejects both the common mode noise in the signal and the ground potential difference between the signal source and the device ground shown as V in the figure AI and AI must both remain within 11 V of AI GND M Series User Manual 4 22 ni com Chapter 4 Analog Input Using Non Referenced Single Ended NRSE Connections for Ground Referenced Signal Sources Figure 4 11 shows how to connect ground reference signal sources in NRSE mode 1 0 Connector Al lt 0 15 gt Lo or AI lt 16 n gt O TO Ground a To Referenced a So Instrumentation Signal s A Ju Amplifier Source 7 So Input Multiplexers y Measured l gt Voltage Common R Al SENSE g Mode AI GND or AI SENSE 2 Noise 9 and Ground Potential 77
139. 4 P1 4 PFI 13 P2 5 PFI 15 P2 7 PFI 7 P1 7 PFI 8 P2 0 D GND D GND 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25 58 24 57 23 56 22 55 21 54 20 53 19 52 18 51 17 50 16 49 15 48 14 47 13 46 12 45 11 44 10 43 9 42 8 41 7 40 6 39 5 38 4 37 3 36 2 35 1 Al 8 Al 1 Al GND Al 10 Al3 Al GND Al 4 Al GND Al 13 Al6 Al GND Al 15 AO 0 AO 1 APFI 0 P0 4 D GND PO 1 P0 6 D GND 5V D GND D GND PFI 0 P1 0 PRL WP ileal D GND 5V D GND PFI 5 P1 5 PFI 6 P1 6 D GND PFI 9 P2 1 PFI 12 P2 4 PFI 14 P2 6 TERMINAL 68 TERMINAL 34 TERMINAL 1 TERMINAL 35 oO a c Pe Pe oS we oi a G O Q oO TERMINAL 35 TERMINAL 1 TERMINAL 34 TERMINAL 68 P0 30 P0 28 P0 25 D GND P0 22 P0 21 D GND 5V D GND P0 17 P0 16 D GND D GND 5V D GND P0 14 P0 9 D GND P0 12 APFI 1 AO 3 AO 2 AI 31 AI GND Al 22 AI 29 AI GND Al 20 Al GND Al 19 Al 26 Al GND Al 17 Al 24 COIN D O R ol rm D GND D GND P0 24 P0 23 PO 31 P0 29 P0 20 P0 19 P0 18 D GND P0 26 P0 27 PO 11 P0 15 P0 10 D GND P0 13 PO 8 D GND AO
140. 68 P0 30 P0 28 P0 25 D GND P0 22 P0 21 D GND 5V D GND P0 17 P0 16 D GND D GND 5V D GND P0 14 P0 9 D GND P0 12 APFI 1 AO 3 AO 2 Al 31 AI GND Al 22 AI 29 AI GND Al 20 Al GND Al 19 Al 26 Al GND Al 17 Al 24 OINIOD a Rl wo m D GND D GND P0 24 P0 23 P0 31 P0 29 P0 20 P0 19 P0 18 D GND P0 26 P0 27 PO 11 PO 15 PO 10 D GND P0 13 POS D GND AO GND AO GND Al GND Al 23 Al 30 Al GND Al 21 Al 28 Al SENSE 2 Al 27 Al GND Al 18 Al 25 Al GND Al 16 M Series User Manual Figure A 44 NI PCI PCle PXI PXle 6259 Pinout A 106 ni com Appendix Device Specific Information Table A 22 Default NI DAQmx Counter Timer Pins Default Connector 0 Pin Number Counter Timer Signal Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 PFI 10 CTR 0 OUT 2 PFI 12 CTROA 37 PFI 8 CTROZ 3 PFI 9 CTROB 45 PFI 10 CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR 1 OUT 40 PFI 13 CTRIA 42 PFI 3 CTR1Z 41 PFI 4 CTR1B 46 PFI 11 FREQ OUT 1 PFI 14 3 Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later NI PCI PCle PXI PXle 6
141. 68 use an SHC68 68 EPM shielded cable Use Connector 0 of your M Series device to control an SCC module carrier Connector 1 cannot be used with SCCs Refer to the SCC Advisor available by going to ni com info and entering the info code rdscav for more information BNC Accessories Using a BNC Accessory with Connector 0 Connector 0 of your device is compatible with several BNC accessories e BNC 2110 Provides BNC connectivity to all analog signals some digital signals and spring terminals for other digital signals e BNC 2111 Provides BNC connectivity to 16 single ended analog input signals two analog output signals five DIO PFI signals and the external reference voltage for analog output BNC 2120 Similar to the BNC 2110 and also has a built in function generator quadrature encoder temperature reference and thermocouple connector BNC 2090A Desktop rack mountable device with 22 BNCs for connecting analog digital and timing signals You can use the SHC68 68 EPM shielded cable to connect Connector 0 of your DAQ device to BNC accessories National Instruments Corporation A 93 M Series User Manual Appendix Device Specific Information Using a BNC Accessory with Connector 1 Connector 1 of your device is compatible with BNC 2115 BNC 2115 provides BNC connectivity to 24 of the differential 48 single ended analog input signals on Connector 1 You can use an SHC68 68 cable to connect to the BNC 2
142. 68 EPM cable however an SHC68 68 EP cable will work with M Series devices M Series User Manual A 154 ni com Appendix Device Specific Information USB 6289 Screw Terminal USB 6289 Screw Terminal Pinout Figure A 45 shows the pinout of the USB 6289 Screw Terminal For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information National Instruments Corporation A 155 M Series User Manual Appendix Device Specific Information AIO AI 8 AI GND Al 1 AI9 AI GND Al2 Al 10 Al GND Al3 Al 11 Al GND Al SENSE Al GND AO 0 AO GND PO 7 PFI 0 P1 0 PFI 1 P1 1 PFI 2 P1 2 PFI 3 P1 3 PFI 4 P1 4 PFI 5 P1 5 PFI 6 P1 6 PFI 7 P1 7 OOND AWN ADDPDADADD 2 22020920 QP 22202000 S 17 A14 SI 18 Al 12 a Gl 19 Al GND ONE Gl 20 Als FE Sll 21 al 13 BE Sl 22 Al GND AGND GI 23 Ale AIAG SI 24 al 14 men SI 25 AI GND RON GI 26 A17 EE Gl 27 a115 RTE GI 28 Al GND RENTE Z9 ARFI O AI SENSE 2 30 AI GND SI 31 a0 1 ALOND SI 32 AO GND ETS EE Pos 979 Sl83 PFI 9 P2 1 P0 9 98 IS NI DENE po 10 99 IS Gl 85 PFI 10 P2 2 an Me S S PEUR P0 13 102 N Gl 87 PFI 11 P2 3 BOTAO S S
143. 7 Pin Pinout A 12 ni com Appendix Device Specific Information Table A 3 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number Name CTR 0 SRC 13 PFI 0 CTR 0 GATE 32 PFI 1 CTR 0 AUX 33 PFI 2 CTR 0 OUT 17 PFI 6 CTROA 13 PFI 0 CTROZ 32 PFI 1 CTROB 33 PFI 2 CTR 1 SRC 15 PFI 3 CTR 1 GATE 34 PFI 4 CTR 1 AUX 35 PFI 5 CTR 1 OUT 36 PFI 7 CTRIA 15 PFI 3 CTRIZ 34 PFI 4 CTRIB 35 PFI 5 FREQ OUT 35 PFI 5 Sy Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later PCI 6221 37 Pin Specifications Refer to the NI 622x Specifications for more detailed information about the PCI 6221 37 pin device PCI 6221 37 Pin Accessory and Cabling Options This section describes some cable and accessory options for the PCI 6221 37 pin device Refer to ni com for other accessory options including new devices National Instruments Corporation A 13 M Series User Manual Appendix Device Specific Information M Series User Manual Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks Use an SH37F 37M cable to connect a PCI 6221 37 pin device to a connector block such as the following e CB 37FH DIN mountable connector block with 37 screw terminals
144. 9 Screw Terminal A 113 USB 6281 Mass Termination A 140 USB 6281 Screw Terminal A 137 USB 6289 Mass Termination A 160 USB 6289 Screw Terminal A 157 start analog input internal timing B 10 trigger 7 32 static DIO 6 2 using PFI terminals as 8 3 support technical E 1 switching from a large to a small input range 4 8 qaqaaqcqcadacgc qaagc ee National Instruments Corporation 1 15 Index synchronization modes 7 37 80 MHz source 7 38 external source 7 39 other internal source 7 39 synchronizing multiple devices 9 3 synchronous counting mode 7 34 T technical support xx E 1 terminal configuration 4 4 analog input 4 1 terminal name 3 4 terminals connecting counter 7 30 NI DAQm x default counter 7 30 Timebase 100 kHz 9 2 20 MHz 9 2 80 MHz 9 2 timed acquisitions 4 10 timing diagrams AI timing clocks B 5 analog input B 1 analog input internal timing B 5 analog input output timing B 19 analog input pause trigger B 18 analog input reference trigger B 13 analog input sample clock B 15 analog input signal definitions B 2 analog input Start B 10 analog input timing B 4 analog output B 21 analog output input timing B 23 analog output Pause Trigger B 29 analog output pause trigger B 25 analog output signal definitions B 22 analog output Start trigger B 25 analog output timing Start trigger B 28 clock generation B 45 Convert Clock B 8 M Series User Manual I
145. A controller is available for each measurement and acquisition block e Analog input e Analog output e Counter 0 e Counter 1 e Digital waveform generation digital output e Digital waveform acquisition digital input Each DMA controller channel contains a FIFO and independent processes for filling and emptying the FIFO This allows the buses involved in the transfer to operate independently for maximum performance Data is National Instruments Corporation 10 1 M Series User Manual Chapter 10 Bus Interface transferred simultaneously between the ports The DMA controller supports burst transfers to and from the FIFO Each DMA controller supports several features to optimize PCI PXI bus utilization The DMA controllers pack and unpack data through the FIFOs This feature allows the DMA controllers to combine multiple 16 bit transfers to the DAQ circuitry into a single 32 bit burst transfer on PCI The DMA controllers also automatically handle unaligned memory buffers on PCI PXI M Series USB devices have four fully independent USB Signal Stream for high performance transfers of data blocks These channels are assigned to the first four measurement acquisition circuits that request one PXI Considerations PXI clock and trigger signals are only available on PXI devices PXI Clock and Trigger Signals Refer to the PXI_CLK10 PXI Triggers PXI_STAR Trigger and PXI_STAR Filters sections of Chapter 9 Digital Routing a
146. A 143 specifications A 145 NI 6289 A 149 specifications A 151 A 160 NI support and services E 1 NI DAQ documentation xvi device documentation browser xx NI DAQmx default counter terminals 7 30 enabling duplicate count prevention 7 37 NI DAQmx Base documentation xvii NI DAQm x for Linux documentation xvi NI PGIA 4 1 non buffered hardware timed acquisitions 4 11 hardware timed generations 5 4 non referenced single ended connections using with floating signal sources 4 18 using with ground referenced signal sources 4 23 when to use with floating signal sources 4 13 when to use with ground referenced signal sources 4 21 NRSE connections using with floating signal sources 4 18 using with ground referenced signal sources 4 23 when to use with floating signal sources 4 13 when to use with ground referenced signal sources 4 21 0 on demand acquisitions 4 10 ni com edge counting 7 2 timing 4 10 options 2 4 order of channels for scanning 4 8 other internal source mode 7 39 software installing 1 1 output signal glitches C 3 minimizing 5 3 terminal routing analog comparison events 11 3 outputs using RTSI as 9 6 overview 2 1 P pause trigger 7 32 analog input internal timing diagram B 18 PCI Express See also PCIe 6251 See also PCIe 6259 disk drive power connector 3 9 PCT PCIe PXI PXIe 6251 accessory options A 67 cabling options A 67 pinout A 65 specifications A 67 PC
147. A 37 USER 1 BNC USER 2 BNC D GND PO 0 PO 1 Screw P0 2 Terminal P0 3 __ Block D GND P0 4 P0 5 P0 6 PO 7 D GND PFI8 P2 0 Figure A 37 USER 1 and USER 2 BNC Connections National Instruments Corporation A 77 M Series User Manual Appendix Device Specific Information M Series User Manual Figure A 38 shows an example of how to use the USER 1 and USER 2 BNCs To access the PFI 8 signal from a BNC connect USER 1 on the screw terminal block to PFI 8 with a wire USER 1 BNC Internal 7 D GND Connection PFI8 P03 wile Signal D GND PO 4 PO 5 P0 6 PO 7 Screw D GND Terminal PFI 8 P2 0 Block Figure A 38 Connecting PFI 8 to USER 1 BNC The designated space below each USER lt 1 2 gt BNC is for marking or labeling signal names USB 6251 BNC Specifications Refer to the NI 625x Specifications for more detailed information about the USB 6251 BNC device USB 6251 BNC LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6251 BNC LEDs USB 6251 BNC Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 3 Connector and LED Information for information about replacing the fuse on the USB 6251 BNC A 78 ni com Appendix Device Specific Information USB 6251 Mass Termin
148. Advisor available by going to ni com info and entering the info code rdscav for more information BNC Accessories You can use the SHC68 68 EPM shielded cable to connect your DAQ device to BNC accessories such as the following e BNC 2110 Provides BNC connectivity to all analog signals some digital signals and spring terminals for other digital signals e BNC 2111 Provides BNC connectivity to 16 single ended analog input signals two analog output signals five DIO PFI signals and the external reference voltage for analog output A 146 ni com Appendix Device Specific Information e __ BNC 2120 Similar to the BNC 2110 and also has a built in function generator quadrature encoder temperature reference and thermocouple connector e __ BNC 2090A Desktop rack mountable device with 22 BNCs for connecting analog digital and timing signals You can use one BNC accessory with the signals on either connector of your M Series device You can use two BNC accessories with one M Series device by using both connectors Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks Use an SHC68 68 EPM shielded cable to connect an M Series device to a connector block such as the following e CB 68LP and CB 68LPR unshielded connector blocks e SCC 68 I O connector block with screw terminals general breadboard area bus terminals and four expansion slots for SCC signal conditio
149. Advisor available by going to ni com info and entering the info code rdscad for more information SCC Accessories SCC provides portable modular signal conditioning to your DAQ system To connect your M Series device to an SCC module carrier such as the SC 2345 SC 2350 or SCC 68 use an SHC68 68 EPM shielded cable Refer to the SCC Advisor available by going to ni com info and entering the info code rdscav for more information BNC Accessories You can use the SHC68 68 EPM shielded cable to connect your DAQ device to BNC accessories such as the following e BNC 2110 Provides BNC connectivity to all analog signals some digital signals and spring terminals for other digital signals e BNC 2111 Provides BNC connectivity to 16 single ended analog input signals two analog output signals five DIO PFI signals and the external reference voltage for analog output BNC 2120 Similar to the BNC 2110 and also has a built in function generator quadrature encoder temperature reference and thermocouple connector BNC 2090A Desktop rack mountable device with 22 BNCs for connecting analog digital and timing signals National Instruments Corporation A 129 M Series User Manual Appendix Device Specific Information Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks Use an SHC68 68 EPM shielded cable to connect an M Series device to a connector block s
150. Bottom Pensu p torini Analog Comparison Event Figure 11 7 Analog Window Triggering Mode Entering Window M Series User Manual 11 6 ni com Chapter 11 Triggering Analog frigger Accuracy The analog trigger circuitry compares the voltage of the trigger source to the output of programmable trigger DACs When you configure the level or the high and low limits in window trigger mode the device adjusts the output of the trigger DACs Refer to the specifications document for your device to find the accuracy or resolution of these DACs which also shows the accuracy or resolution of analog triggers To improve accuracy do the following National Instruments Corporation Use an AI channel with a small input range instead of APFI lt 0 1 gt as your trigger source The DAQ device does not amplify the APFI lt 0 1 gt signals When using an AI channel the NI PGIA amplifies the AI channel signal before driving the analog trigger circuitry If you configure the AI channel to have a small input range you can trigger on very small voltage changes in the input signal Software calibrate the analog trigger circuitry The propagation delay from when a valid trigger condition is met to when the analog trigger circuitry emits the Analog Comparison Event may have an impact on your measurements if the trigger signal has a high slew rate If you find these conditions have a noticeabl
151. CC Accessories SCC provides portable modular signal conditioning to your DAQ system To connect your M Series device to an SCC module carrier such as the SC 2345 SC 2350 or SCC 68 use an SHC68 68 EPM shielded cable 3 Note PCI Express users should consider the power limits on certain SCC modules without an external power supply Refer to the NI 625x Specifications and the PCI Express Device Disk Drive Power Connector section of Chapter 3 Connector and LED Information for information about power limits and increasing the current the device can supply on the 5 V terminal Refer to the SCC Advisor available by going to ni com info and entering the info code rdscav for more information BNC Accessories You can use the SHC68 68 EPM shielded cable to connect your DAQ device to BNC accessories such as the following e BNC 2110 Provides BNC connectivity to all analog signals some digital signals and spring terminals for other digital signals e BNC 2111 Provides BNC connectivity to 16 single ended analog input signals two analog output signals five DIO PFI signals and the external reference voltage for analog output e BNC 2120 Similar to the BNC 2110 and also has a built in function generator quadrature encoder temperature reference and thermocouple connector e BNC 2090A Desktop rack mountable device with 22 BNCs for connecting analog digital and timing signals M Series User Manual A 68 ni com Appendix
152. Connect 222292992 2229222 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 Al 27 Al 28 Al 29 AI 30 AI GND AI 31 AI 40 Al 41 AI 42 Al 43 Al 44 Al SENSE 2 Al 45 Al 46 Al 47 Al 56 PFI 8 P2 0 D GND PFI 9 P2 1 D GND PFI 10 P2 2 D GND PFI 11 P2 3 D GND PFI 12 P2 4 D GND PFI 13 P2 5 D GND PFI 14 P2 6 D GND PFI 15 P2 7 5V National Instruments Corporation Figure A 15 USB 6225 Screw Terminal Pinout A 37 M Series User Manual Appendix Device Specific Information Table A 8 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number Name CTR 0 SRC 113 PFI 8 CTR 0 GATE 115 PFI 9 CTR 0 AUX 117 PFI 10 CTR 0 OUT 121 PFI 12 CTROA 113 PFI 8 CTROZ 115 PFI 9 CTROB 117 PFI 10 CTR 1 SRC 108 PFI 3 CTR 1 GATE 109 PFI 4 CTR 1 AUX 119 PFI 11 CTR 1 OUT 123 PFI 13 CTR 1 A 108 PFI 3 CTR1Z 109 PFI 4 CTR 1B 119 PFI 11 FREQ OUT 125 PFI 14 3 Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later M Series User Manual USB 6225 Screw Terminal Specifications Refer to the M 622x Specifications for more detailed information about the USB 6225 Screw Terminal device
153. ConvertClock to perform interval sampling As Figure C 1 shows AI Sample Clock controls the sample period which is determined by the following equation 1 sample period sample rate Channel 0 Channel 1 Convert Period lt Sample Period Figure C 1 Al Sample Clock and Al Convert Clock AI Convert Clock controls the convert period which is determined by the following equation 1 convert period convert rate This method allows multiple channels to be sampled relatively quickly in relationship to the overall sample rate providing a nearly simultaneous effect with a fixed delay between channels C 2 ni com Analog Output Appendix C Troubleshooting Counters I am seeing glitches on the output signal How can I minimize it When you use a DAC to generate a waveform you may observe glitches on the output signal These glitches are normal when a DAC switches from one voltage to another it produces glitches due to released charges The largest glitches occur when the most significant bit of the DAC code changes You can build a lowpass deglitching filter to remove some of these glitches depending on the frequency and nature of the output signal Visit ni com support for more information about minimizing glitches When multiple sample clocks on my buffered counter measurement occur before consecutive edges on my source I see weird behavior Why Duplicate count prevention ensur
154. Corporation G 3 M Series User Manual Glossary buffer bus buses C C calibration calibrator cascading CE channel clock CMOS CMRR common mode rejection M Series User Manual 1 Temporary storage for acquired or generated data 2 A memory device that stores intermediate data between two devices The group of electrical conductors that interconnect individual circuitry in a computer Typically a bus is the expansion vehicle to which I O or other devices are connected Examples of PC buses are the PCI AT ISA and EISA bus Celsius The process of determining the accuracy of an instrument In a formal sense calibration establishes the relationship of an instrument s measurement to the value provided by a standard When that relationship is known the instrument may then be adjusted calibrated for best accuracy A precise traceable signal source used to calibrate instruments Process of extending the counting range of a counter chip by connecting to the next higher counter European emissions control standard Pin or wire lead to which you apply or from which you read the analog or digital signal Analog signals can be single ended or differential For digital signals you group channels to form ports Ports usually consist of either four or eight digital channels Hardware component that controls timing for reading from or writing to groups Complementary metal oxide semiconductor
155. Counter n Z 7 28 counters 7 25 DI Sample Clock 6 4 DO Sample Clock 6 5 exporting timing output using PFI terminals 8 2 FREQ OUT 7 30 Frequency Output 7 30 minimizing output glitches C 3 output minimizing glitches on 5 3 simple pulse generation 7 19 single period measurement 7 6 point edge counting 7 2 pulse generation 7 19 retriggerable 7 20 with start trigger 7 20 pulse width measurement 7 4 semi period measurement 7 8 two signal edge separation measurement 7 18 single ended connections for floating signal sources 4 19 RSE configuration 4 19 software 1 1 configuring AI ground reference settings 4 6 NI resources E 1 programming devices 2 6 software timed acquisitions 4 10 generations 5 4 specifications A 1 device 1 2 ni com PCI PCIe PXT PXIe 6251 A 67 PCI PClIe PXI PXIe 6259 A 107 PCI PXI 6220 A 4 PCI PXI 6221 A 9 PCI PXI 6224 A 26 PCI PXI 6225 A 32 PCI PXI 6229 A 47 PCI PXI 6250 A 62 PCI PXI 6254 A 86 PCI PXI 6255 A 92 PCI PXI 6280 A 128 PCI PXI 6281 A 133 PCI PXI 6284 A 145 PCI PXI 6289 A 151 PCI 6221 37 pin A 13 JSB 6221 BNC A 23 JSB 6221 Screw Terminal A 16 JSB 6225 Mass Termination A 41 SB 6225 Screw Terminal A 38 SB 6229 BNC A 59 SB 6229 Screw Terminal A 53 SB 6251 BNC A 78 SB 6251 Mass Termination A 81 SB 6251 Screw Terminal A 71 SB 6255 Mass Termination A 101 SB 6255 Screw Terminal A 98 JSB 6259 BNC A 120 JSB 6259 Mass Termination A 123 USB 625
156. D Al 21 Al 29 AI GND Al 22 Al 30 Al GND Al 23 AI 31 AI GND APFI 1 Al GND AO3 AO GND PO 24 D GND PO 25 D GND P0 26 D GND P0 27 D GND P0 28 D GND P0 29 D GND P0 30 D GND P0 31 D GND M Series User Manual Figure A 45 USB 6259 Screw Terminal Pinout A 112 ni com Appendix Device Specific Information Table A 23 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number Name CTR 0 SRC 81 PFI 8 CTR 0 GATE 83 PFI 9 CTR 0 AUX 85 PFI 10 CTR 0 OUT 89 PFI 12 CTROA 81 PFI 8 CTROZ 83 PFI 9 CTROB 85 PFI 10 CTR 1 SRC 76 PFI 3 CTR 1 GATE 77 PFI 4 CTR 1 AUX 87 PFI 11 CTR 1 OUT 91 PFI 13 CTRIA 76 PFI 3 CTRIZ 77 PFI 4 CTR 1B 87 PFI 11 FREQ OUT 93 PFI 14 Sy Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later USB 6259 Screw Terminal Specifications Refer to the NI 625x Specifications for more detailed information about the USB 6259 Screw Terminal device USB 6259 Screw Terminal LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6259 Screw Terminal LEDs USB 6259 Screw Terminal Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 3 Connector and LED Information for information about rep
157. DAQ M Series M Series User Manual NI 622x NI 625x and NI 628x Devices Fran ais Deutsch HAE et Of fia AH ni com manuals July 2008 371022K 01 INSTRUMENTS y NATIONAL Worldwide Technical Support and Product Information ni com National Instruments Corporate Headquarters 11500 North Mopac Expressway Austin Texas 78759 3504 USA Tel 512 683 0100 Worldwide Offices Australia 1800 300 800 Austria 43 662 457990 0 Belgium 32 0 2 757 0020 Brazil 55 11 3262 3599 Canada 800 433 3488 China 86 21 5050 9800 Czech Republic 420 224 235 774 Denmark 45 45 76 26 00 Finland 358 0 9 725 72511 France 01 57 66 24 24 Germany 49 89 7413130 India 91 80 41190000 Israel 972 3 6393737 Italy 39 02 41309277 Japan 0120 527196 Korea 82 02 3451 3400 Lebanon 961 0 1 33 28 28 Malaysia 1800 887710 Mexico 01 800 010 0793 Netherlands 31 0 348 433 466 New Zealand 0800 553 322 Norway 47 0 66 90 76 60 Poland 48 22 3390150 Portugal 351 210 311 210 Russia 7 495 783 6851 Singapore 1800 226 5886 Slovenia 386 3 425 42 00 South Africa 27 0 11 805 8197 Spain 34 91 640 0085 Sweden 46 0 8 587 895 00 Switzerland 41 56 2005151 Taiwan 886 02 2377 2222 Thailand 662 278 6777 Turkey 90 212 279 3031 United Kingdom 44 0 1635 523545 For further support information refer to the Technical Support and Professional Services appendix To comment on National Instruments documentation refer to the National Instruments We
158. DAQmx allows you to disable DMA and use interrupts To change your data transfer mechanism between DMA and interrupts in NI DAQmx use the Data Transfer Mechanism property node USB Devices USB M Series devices have four dedicated USB Signal Stream channels These channels are assigned to the first four measurement acquisition circuits that request one If a USB Signal Stream is not available you must set the data transfer mechanism to programmed T O otherwise the driver returns an error To change your data transfer mechanism between USB Signal Stream and programmed I O use the Data Transfer Mechanism property node function in NI DAQmx National Instruments Corporation 10 5 M Series User Manual Triggering A trigger is a signal that causes an action such as starting or stopping the acquisition of data When you configure a trigger you must decide how you want to produce the trigger and the action you want the trigger to cause All M Series devices support internal software triggering as well as external digital triggering Some devices also support analog triggering For information about the different actions triggers can perform for each sub system of the device refer to the following sections e The Analog Input Triggering section of Chapter 4 Analog Input e The Analog Output Triggering section of Chapter 5 Analog Output e The Counter Triggering section of Chapter 7 Counters 3 Note Not all M Series devices support analog
159. DMA or interrupts before it is transferred to application memory Buffered acquisitions typically allow for much faster transfer rates than non buffered acquisitions because data is moved in large blocks rather than one point at a time One property of buffered I O operations is the sample mode The sample mode can be either finite or continuous Finite sample mode acquisition refers to the acquisition of a specific predetermined number of data samples Once the specified number of samples has been read in the acquisition 4 10 ni com Chapter 4 Analog Input stops If you use a reference trigger you must use finite sample mode Continuous acquisition refers to the acquisition of an unspecified number of samples Instead of acquiring a set number of data samples and stopping a continuous acquisition continues until you stop the operation Continuous acquisition is also referred to as double buffered or circular buffered acquisition If data cannot be transferred across the bus fast enough the FIFO becomes full New acquisitions overwrite data in the FIFO before it can be transferred to host memory The device generates an error in this case With continuous operations if the user program does not read data out of the PC buffer fast enough to keep up with the data transfer the buffer could reach an overflow condition causing an error to be generated Non buffered In non buffered acquisitions data is read directly from the
160. Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later for more information You also can specify whether the measurement acquisition begins on the rising edge or falling edge of AI Start Trigger National Instruments Corporation 4 35 M Series User Manual Chapter 4 Analog Input Using an Analog Source When you use an analog trigger source the acquisition begins on the first rising edge of the Analog Comparison Event signal Routing Al Start Trigger to an Output Terminal You can route AI Start Trigger out to any PFI lt 0 15 gt or RTSI lt 0 7 gt terminal The output is an active high pulse All PFI terminals are configured as inputs by default The device also uses AI Start Trigger to initiate pretriggered DAQ operations In most pretriggered applications a software trigger generates AI Start Trigger Refer to the AJ Reference Trigger Signal section for a complete description of the use of AI Start Trigger and AI Reference Trigger in a pretriggered DAQ operation Al Reference Trigger Signal Use AI Reference Trigger ai ReferenceTrigger signal to stop a measurement acquisition To use a reference trigger specify a buffer of finite size and a number of pretrigger samples samples that occur before the reference trigger The number of posttrigger samples samples that occur after the reference trigger desired is the buffer size minus the number of pretrigger samples Once the acquisition b
161. Device Specific Information Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks Use an SHC68 68 EPM shielded cable to connect an M Series device to a connector block such as the following e CB 68LP and CB 68LPR unshielded connector blocks e SCC 68 I O connector block with screw terminals general breadboard area bus terminals and four expansion slots for SCC signal conditioning modules e SCB 68 shielded connector block with temperature sensor e TBX 68 DIN rail mountable connector block e TB 2706 front panel mounted terminal block for PXI M Series devices RTSI Cables Use RTSI bus cables to connect timing and synchronization signals among PCI PCI Express devices such as M Series E Series CAN and other measurement vision and motion devices Since PXI devices use PXI backplane signals for timing and synchronization no cables are required Cables In most applications you can use the following cables e SHC68 68 EPM High performance cable designed specifically for M Series devices It has individual bundles separating analog and digital signals Each differential analog input channel is routed on an individually shielded twisted pair of wires Analog outputs are also individually shielded e SHC68 68 Lower cost shielded cable with 34 twisted pairs of wire e RC68 68 Highly flexible unshielded ribbon cable Custom Cabling and Connectivity The CA 1000 is a c
162. DoC A DoC is our claim of compliance with the Council of the European Communities using the manufacturer s declaration of conformity This system affords the user protection for electronic compatibility EMC and product safety You can obtain the DoC for your product by visiting ni com certification e Calibration Certificate If your product supports calibration you can obtain the calibration certificate for your product at ni com calibration If you searched ni com and could not find the answers you need contact your local office or NI corporate headquarters Phone numbers for our worldwide offices are listed at the front of this manual You also can visit the Worldwide Offices section of ni com niglobal to access the branch office Web sites which provide up to date contact information support phone numbers email addresses and current events M Series User Manual E 2 ni com Glossary Symbol Prefix Value p pico 10 12 n nano 10 u micro 10 6 m milli 10 3 k kilo 103 M mega 106 Symbols Percent Positive of or plus Negative of or minus Plus or minus lt Less than gt Greater than lt Less than or equal to 2 Greater than or equal to Per H Degree Q Ohm National Instruments Corporation G 1 M Series User Manual Glossary A A A D AC accuracy ADE AI AI GND AI SENSE analog analog input signal analog output
163. I lt 0 1 gt Figure A 52 shows the APFI circuitry on the USB 6259 BNC o _ APF x Al GND N7 Figure A 52 Analog Programmable Function Interface Circuitry Refer to the Triggering with an Analog Source section of Chapter 11 Triggering for more information M Series User Manual A 118 ni com Appendix Device Specific Information USER 1 and USER 2 The USER 1 and USER 2 BNC connectors allow you to use a BNC connector for a digital or timing I O signal of your choice The USER 1 and USER 2 BNC connectors are routed internal to the USB 6259 BNC to the USER 1 and USER 2 screw terminals as shown in Figure A 53 USER 1 BNC USER 2 BNC D GND PO 0 PO 1 Screw P0 2 Terminal P0 3 __ Block D GND P0 4 P0 5 P0 6 PO 7 D GND PFI8 P2 0 Figure A 53 USER 1 and USER 2 BNC Connections National Instruments Corporation A 119 M Series User Manual Appendix Device Specific Information M Series User Manual Figure A 54 shows an example of how to use the USER 1 and USER 2 BNCs To access the PFI 8 signal from a BNC connect USER 1 on the screw terminal block to PFI 8 with a wire USER 1 BNC Internal 7 D GND Connection PFI8 P03 wile Signal D GND PO 4 PO 5 P0 6 PO 7 Screw D GND Terminal PFI 8 P2 0 Block Figure A 54 Connecting PFI 8 t
164. I GND AI 30 44 10 PFI4 P1 4 AI 22 Al GND 43 9 D GND SEE AI 29 Al 21 42 8 45V Al GND Al 28 4117 DGND AI 20 AI SENSE 2 40 6 PFI5 P1 5 Al GND Al 27 39 5 PFI6 P1 6 AI 19 AI GND 38 4 DG ND AI 26 Al 18 37 3 PFI 9 P2 1 AI GND AI 25 36 2 PFI12 P2 4 Al 17 Al GND 35 1 PFI14 P2 6 Al 24 Al 16 No Connect NC No Connect M Series User Manual Figure A 17 PCI PXI 6229 Pinout A 46 ni com Appendix Device Specific Information Table A 10 Default NI DAQmx Counter Timer Pins Default Connector 0 Pin Number Counter Timer Signal Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 PFI 10 CTR 0 OUT 2 PFI 12 CTROA 37 PFI 8 CTROZ 3 PFI 9 CTROB 45 PFI 10 CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR 1 OUT 40 PFI 13 CTRIA 42 PFI 3 CTRIZ 41 PFI 4 CTR1B 46 PFI 11 FREQ OUT 1 PFI 14 3 Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later PCI PXI 6229 Specifications Refer to the NI 622x Specifications for more detailed information about the PCI PXI 6229 device PCI PXI 6229 Accessory and Cabling Options This section describes some cable and accessory options for M Series devices with two 68 pin connectors such as the PCI PXI 6229 Refer to ni com for other acc
165. I PCIe PXI PXIe 6259 accessory options A 107 cabling options A 107 pinout A 105 specifications A 107 PCI PXI 6221 68 pin accessory options A 9 cabling options A 9 pinout A 7 specifications A 9 PCI PXI 6225 accessory options A 32 National Instruments Corporation 1 11 Index cabling options A 32 pinout A 30 specifications A 32 PCI PXI 6229 accessory options A 47 cabling options A 47 pinout A 45 specifications A 47 PCI PXI 6255 accessory options A 92 cabling options A 92 pinout A 90 PCI PXI 628 1 accessory options A 133 cabling options A 133 pinout A 131 PCI PXI 6289 A 149 accessory options A 151 cabling options A 151 pinout A 149 PCI 6220 A 2 PCI 6221 37 pin accessory options A 13 cabling options A 13 pinout A 12 specifications A 13 PCI 6221 68 pin A 7 PCI 6224 A 24 PCI 6225 A 30 PCI 6229 A 45 PCI 6250 A 60 PCI 6251 A 65 PCI 6254 A 84 PCI 6255 A 90 PCI 6259 A 105 PCI 6280 A 126 PCI 6281 A 131 PCI 6284 A 143 PCIe 6251 A 65 PCIe 6259 A 105 M Series User Manual Index period measurement 7 6 buffered 7 7 single 7 6 PFI 8 1 connecting input signals 8 4 exporting timing output signals using PFI terminals 8 2 filters 8 4 T O protection 8 6 programmable power up states 8 6 using terminals as static digital I Os 8 3 using terminals as timing input signals 8 2 USB 6251 BNC A 72 USB 6251 Mass Termination A 79
166. I channels sampling with AI Sample Clock and AI Convert Clock C 2 AI Convert Clock signal 4 30 AI Convert Clock Timebase signal 4 34 AI data acquisition methods 4 10 AI FIFO 4 2 AI Hold Complete Event signal 4 35 AI Pause Trigger signal 4 38 AI Reference Trigger signal 4 36 AI Sample Clock signal 4 28 AI Sample Clock Timebase signal 4 30 AI Start Trigger signal 4 35 AI timing signals 4 25 ai ConvertClock 4 30 ai ConvertClockTimebase 4 34 ai HoldCompleteEvent 4 35 ai PauseTrigger 4 38 ai ReferenceTrigger 4 36 ai SampleClock 4 28 ai SampleClockTimebase 4 30 ai StartTrigger 4 35 analog comparison event routing 11 3 comparison event signal 11 3 edge triggering 11 4 trigger actions 11 3 trigger types 11 4 M Series User Manual Index triggering 11 2 analog edge triggering with hysteresis 11 5 analog input 4 1 channels 11 3 charge injection C 1 circuitry 4 1 connecting signals 4 11 connecting through I O connector 4 1 crosstalk when sampling multiple channels C 1 data acquisitions 4 10 methods 4 10 differential troubleshooting C 1 getting started with applications in software 4 38 ghost voltages when sampling multiple channels C 1 ground reference settings 4 1 lowpass filter 4 4 MUX 4 1 range 4 2 sampling channels with AI Sample Clock and AI Convert Clock C 2 signals 4 25 AI Convert Clock 4 30 AI Convert Clock Timebase 4 34 AI Hold Complete Event 4 35 AI Pause Tr
167. IS Al6 25 59 Al GND Al GND 24 58 Al 14 Al 15 23 57 AI7 AOO 22 56 AIl GND AO 1 21 55 AO GND APFI 0 20 54 AO GND P0 4 19 53 D GND D GND 18 52 P0 0 PO 1 17151 PO 5 P0 6 16 50 D GND D GND 15 49 PO 2 5V 14 48 PO 7 D GND 13 47 P0 3 D GND 12 46 PFI 11 P2 3 PFI 0 P1 0 11 45 PFI 10 P2 2 PFI 1 P1 1 10 44 D GND D GND 9 43 PFI 2 P1 2 5V 8 42 PFI3 P1 3 D GND 7 41 PFI 4 P1 4 PFI 5 P1 5 6 40 PFI 13 P2 5 PFI 6 P1 6 5 39 PFI 15 P2 7 D GND 4 38 PFI 7 P1 7 PFI 9 P2 1 3 37 PFI 8 P2 0 PFI 12 P2 4 2 36 D GND PFI 14 P2 6 1 135 D GND Ce CONNECTOR 0 Al 0 15 TERMINAL 68 TERMINAL 35 ol lo TERMINAL 34 TERMINAL 1 a Al 24 34 68 Al 16 Al 17 33 67 Al GND Al GND 32 66 Al 25 AI 26 31165 Al 18 Al 19 30 64 Al GND AI GND 29 63 A1 27 AI 20 28 62 Al SENSE 2 AI GND 27 61 Al28 Al 29 26 60 Al 21 Al 22 25 59 Al GND AI GND 24 58 also AI 31 23 57 Al23 AO 2 22 56 Al GND AO 3 21 55 AO GND APFI 1 20 54 AO GND P0 12 19153 D GND D GND 18 52 Pos P0 9 17151 P0 13 P0 14 16 50 D GND D GND 15 49 Po 10 5V 14 48 P0 15 D GND 13 47 Po 11 D GND 12 46 P0 27 P0 16 11145 P0 26 P0 17 10 44 D GND D GND 9 43 Po
168. I_STAR signal e Drive the DO Sample Clock or DI Sample Clock e Generate an interrupt The Change Detection Event signal also can be used to detect changes on digital output events DI Change Detection Applications The DIO change detection circuitry can interrupt a user program when one of several DIO signals changes state You also can use the output of the DIO change detection circuitry to trigger a DI or counter acquisition on the logical OR of several digital signals To trigger on a single digital signal refer to the Triggering with a Digital Source section of Chapter 11 Triggering By routing the Change Detection Event signal to a counter you also can capture the relative time between samples You also can use the Change Detection Event signal to trigger DO or counter generations Connecting Digital 1 0 Signals The DIO signals PO lt 0 31 gt P1 lt 0 7 gt and P2 lt 0 7 gt are referenced to D GND You can individually program each line as an input or output Figure 6 4 shows P1 lt 0 3 gt configured for digital input and P1 lt 4 7 gt configured for digital output Digital input applications include receiving TTL signals and sensing external device states such as the state of the switch shown in the figure Digital output applications include sending TTL signals and driving external devices such as the LED shown in the figure National Instruments Corporation 6 9 M Series User Manual Chapter 6 Digital I
169. M Series User Manual Appendix Device Specific Information AIO AI GND AI 9 AI2 AI GND Al 11 AI SENSE AI 12 AI5 Al GND Al 14 AI7 AI GND AO GND AO GND D GND PO 0 PO 5 D GND poe PO 7 P0 3 PFI 11 P2 3 PFI 10 P2 2 D GND PFI 2 P1 2 PFI 3 P1 3 PFI 4 P1 4 PFI 13 P2 5 PFI 15 P2 7 PFI 7 P1 7 PFI 8 P2 0 D GND D GND NC 68 34 Als P0 30 1 D GND 67 33 Al1 Po 28 2 D GND 66 32 AI GND Po 25 3 P0 24 65 31 Al10 PONN DGND 4 P0 23 64 30 A13 T e Po 22 5 P0 31 63 29 Al GND ce cS P0 21 6 P0 29 62 28 A14 D Ur DGND 7 P0 20 61 27 AI GND aS 5V 8 P0 19 60 26 A113 GS D GND P0 18 59 25 AI6 P0 17 D GND 58 24 AI GND P0 16 P0 26 57 23 ALIS TERMINAL 68 fi ris TERMINAL 35 P GND P0 27 56 22 AO0 D GND PO 11 55l21 AO 4 TERMINAL 34 TERMINAL1 45 P0 15 54 20 NC D GND P0 10 53 19 P0 4 P0 14 D GND 52 18 D GND P0 9 P0 13 51117 Po 1 D GND P0 8 50 16 Po 6 P0 12 D GND 49 15 D GND NC AO GND 48 14 io TERMINAL 1 TERMINAL 34 408 AOGND 47 13 D GND AO 2 Al GND 46 12 D GND TERMINAL 35 mtj LUE TERMINAL 68 Al 31 AI 23 45 11 PFIO P1 0 A
170. M Series User Manual Chapter 8 PFI 1 0 Protection Each DIO and PFI signal is protected against overvoltage undervoltage and overcurrent conditions as well as ESD events However you should avoid these fault conditions by following these guidelines e If you configure a PFI or DIO line as an output do not connect it to any external signal source ground or power supply e Ifyou configure a PFI or DIO line as an output understand the current requirements of the load connected to these signals Do not exceed the specified current output limits of the DAQ device NI has several signal conditioning solutions for digital applications requiring high current drive e Ifyou configure a PFI or DIO line as an input do not drive the line with voltages outside of its normal operating range The PFI or DIO lines have a smaller operating range than the AI signals e Treat the DAQ device as you would treat any static sensitive device Always properly ground yourself and the equipment when handling the DAQ device or connecting to it Programmable Power Up States At system startup and reset the hardware sets all PFI and DIO lines to high impedance inputs by default The DAQ device does not drive the signal high or low Each line has a weak pull down resistor connected to it as described in the specifications document for your device NI DAQmx supports programmable power up states for PFI and DIO lines Software can program any value a
171. O Channels 0 to 31 You can individually Output configure each signal as an input or output APFI lt 0 1 gt AO GND or Input Analog Programmable Function Interface Channels 0 AI GND to 1 Each APFI signal can be used as AO external reference inputs for AO lt 0 3 gt AO external offset input or as an analog trigger input APFI lt 0 1 gt are referenced to AI GND when they are used as analog trigger inputs APFI lt 0 1 gt are referenced to AO GND when they are used as AO external offset or reference inputs These functions are not available on all devices Refer to the specifications for your device 5 V D GND Output 5 V Power Source These terminals provide a fused 5 V power source PFI lt 0 7 gt P1 lt 0 7 gt D GND Input or Programmable Function Interface or Digital I O Channels PFI lt 8 15 gt P2 lt 0 7 gt Output 0 to 7 and Channels 8 to 15 Each of these terminals can be individually configured as a PFI terminal or a digital I O terminal As an input each PFI terminal can be used to supply an external source for AI AO DI and DO timing signals or counter timer inputs As a PFI output you can route many different internal AI AO DI or DO timing signals to each PFI terminal You also can route the counter timer outputs to each PFI terminal As a Port 1 or Port 2 digital I O signal you can individually configure each signal as an input or output USER lt 1 2 gt User Defined Channels 1
172. PFI 15 P2 7 D GND 4 38 PFI7 P1 7 PFI 9 P2 1 3 37 PFI 8 P2 0 PFI 12 P2 4 2 36 DGND PFI 14 P2 6 1 35 D GND CONNECTOR 0 Al 0 15 TERMINAL 68 TERMINAL 35 cl lo TERMINAL 34 TERMINAL 1 M Series User Manual Figure A 39 USB 6251 Mass Termination Pinout A 80 ni com Appendix Device Specific Information Table A 17 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 PFI 10 CTR 0 OUT 2 PFI 12 CTROA 37 PFI 8 CTROZ 3 PFI 9 CTROB 45 PFI 10 CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR 1 OUT 40 PFI 13 CTRIA 42 PFI 3 CTRIZ 41 PFI 4 CTR 1B 46 PFI 11 FREQ OUT 1 PFI 14 Sy Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later USB 6251 Mass Termination Specifications Refer to the NI 625x Specifications for more detailed information about the USB 6251 Mass Termination device USB 6251 Mass Termination Accessory and Cabling Options This section describes some cable and accessory options for M Series devices with one 68 pin connector such as the USB 6251 Mass Termination device Refer to ni com for other accessory options including new devices National Instruments Corporation A 81 M Ser
173. PXI 6220 Specifications Refer to the M 622x Specifications for more detailed information about the PCI PXI 6220 device PCI PXI 6220 Accessory and Cabling Options This section describes some cable and accessory options for M Series devices with one 68 pin connector such as the PCI PXI 6220 Refer to ni com for other accessory options including new devices M Series User Manual A 4 ni com Appendix Device Specific Information SCXI Accessories SCXI is a programmable signal conditioning system designed for measurement and automation applications To connect your M Series device to an SCXI chassis use the SCXI 1349 adapter and an SHC68 68 EPM cable You also can use an M Series device to control the SCXI section of a PXI SCXI combination chassis such as the PXI 1010 or PXI 1011 The M Series device in the rightmost PXI slot controls the SCXI devices No cables or adapters are necessary Refer to the SCXT Advisor available by going to ni com info and entering the info code rdscad for more information SCC Accessories SCC provides portable modular signal conditioning to your DAQ system To connect your M Series device to an SCC module carrier such as the SC 2345 SC 2350 or SCC 68 use an SHC68 68 EPM shielded cable Refer to the SCC Advisor available by going to ni com info and entering the info code rdscav for more information BNC Accessories You can use the SHC68 68 EPM shielded cable to connect your DA
174. Panel and Pinout M Series User Manual A 114 ni com Appendix Device Specific Information Table A 24 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Name CTR 0 SRC PFI 8 CTR 0 GATE PFI9 CTR 0 AUX PFI 10 CTR 0 OUT PFI 12 CTROA PFI 8 CTR OZ PFI9 CTROB PFI 10 CTR 1 SRC PFI 3 CTR 1 GATE PFI 4 CTR 1 AUX PFI 11 CTR 1 OUT PFI 13 CTR1A PFI 3 CTRIZ PFI 4 CTR1B PFI 11 FREQ OUT PFI 14 Sy Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later Connecting Signals to the USB 6259 BNC Analog Input You can use each analog input BNC connector for one signal in differential mode or two signals in single ended mode e Differential Mode To connect signals in differential mode determine the type of signal source you are using a floating signal FS source or a ground referenced signal GS source Refer to the Connecting Analog Input Signals section of Chapter 4 Analog Input for more information National Instruments Corporation A 115 M Series User Manual Appendix Device Specific Information M Series User Manual To measure a floating signal source move the switch to the FS position To measure a ground referenced signal source move the switch to the GS position Figure A 47 shows the AI 0 BNC and corresponding FS GS switch on the t
175. Pos D GND 50 16 P06 Po 12 19 53 DGND PO 2 49 15 D GND NC 20 54 NC PO 48 14 SM TERMINAL 1 TERMINAL 34 NC 21 55 NC P0 3 47 13 D GND H A NC 22 56 AI GND PFI 11 P2 3 46 12 D GND TERMINAL 35 PEJ Se TERMINAL 68 gj 31 23157 al23 PFI 10 P2 2 45 11 PFIO P1 0 AIGND 24 58 al3o0 D GND 44 10 PFI1 P1 1 oO Al 22 25 59 AI GND PFi2 P1 2 43 9 DGND da Al 29 26 60 Al21 PFI3 P1 8 42 8 45V AI GND 27161 A128 PFi4 P1 4 41 7 DGND AI 20 28 62 AI SENSE 2 PFI 13 P2 5 40 6 PFI5 P1 5 AI GND 29163 A127 PFI 15 P2 7 39 5 PFI6 P1 6 AI 19 30 64 AI GND PFI 7 P1 7 38 4 DGND Al 26 31 65 A118 PFI8 P20 37 3 PFI9 P21 AIGND 32 66 al25 D GND 36 2 PFI12 P24 Al 17 33 67 alGND D GND 35 1 PFI14 P2 6 AI 24 34 68 A116 n O NC No Connect NC No Connect Figure A 13 PCI PXI 6224 Pinout National Instruments Corporation A 25 M Series User Manual Appendix Device Specific Information Table A 6 Default NI DAQmx Counter Timer Pins Default Connector 0 Pin Number Counter Timer Signal Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 PFI 10 CTR 0 OUT 2 PFI 12 CTROA 37 PFI 8 CTROZ 3 PFI 9 CTROB 45 PFI 10 CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR 1 OUT 40 PFI 13 CTR 1 A 42 PFI 3 CTRIZ 41 PFI 4 CTR1IB 46 PFI 11 FREQ OUT 1 PFI 14
176. Q device to BNC accessories such as the following e BNC 2110 Provides BNC connectivity to all analog signals some digital signals and spring terminals for other digital signals e BNC 2111 Provides BNC connectivity to 16 single ended analog input signals two analog output signals five DIO PFI signals and the external reference voltage for analog output BNC 2120 Similar to the BNC 2110 and also has a built in function generator quadrature encoder temperature reference and thermocouple connector BNC 2090A Desktop rack mountable device with 22 BNCs for connecting analog digital and timing signals National Instruments Corporation A 5 M Series User Manual Appendix Device Specific Information Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks Use an SHC68 68 EPM shielded cable to connect an M Series device to a connector block such as the following e CB 68LP and CB 68LPR unshielded connector blocks e SCC 68 I O connector block with screw terminals general breadboard area bus terminals and four expansion slots for SCC signal conditioning modules e SCB 68 shielded connector block with temperature sensor e TBX 68 DIN rail mountable connector block e TB 2706 front panel mounted terminal block for PXI M Series devices RTSI Cables Use RTSI bus cables to connect timing and synchronization signals among PCI devices such as M Series E Series
177. RIA 76 PFI 3 CTRIZ 77 PFI 4 CTR 1B 87 PFI 11 FREQ OUT 93 PFI 14 Sy Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later USB 6281 Screw Terminal Specifications Refer to the NI 628x Specifications for more detailed information about the USB 6281 Screw Terminal device USB 6281 Screw Terminal LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6281 Screw Terminal LEDs USB 6281 Screw Terminal Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 3 Connector and LED Information for information about replacing the fuse on the USB 6281 Screw Terminal National Instruments Corporation A 137 M Series User Manual Appendix Device Specific Information USB 6281 Mass Termination USB 6281 Mass Termination Pinout Figure A 39 shows the pinout of the USB 6281 Mass Termination device For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information 3 Note M Series devices may be used with most E Series accessories However some E Series accessories use different terminal names Refer to the M Series and E Series Pinout Comparison section of Chapter 3 Connector and LED Information for more information M Series User Manual A 138 ni com
178. S PFI 3 P1 3 108 IX S mee PFI 4 P1 4 109 I N NE PFI 5 P1 5 110 IS N AES PFI6 P1 6 111 IS S PFI 7 P1 7 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 Al 27 Al 28 Al 29 AI 30 AI GND AI 31 AI 40 AI 41 AI 42 Al 43 Al 44 Al SENSE 2 Al 45 Al 46 Al 47 Al 56 PFI 8 P2 0 D GND PFI 9 P2 1 D GND PFI 10 P2 2 D GND PFI 11 P2 3 D GND PFI 12 P2 4 D GND PFI 13 P2 5 D GND PFI 14 P2 6 D GND PFI 15 P2 7 5V National Instruments Corporation Figure A 42 USB 6255 Screw Terminal Pinout A 97 M Series User Manual Appendix Device Specific Information Table A 20 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number Name CTR 0 SRC 113 PFI 8 CTR 0 GATE 115 PFI 9 CTR 0 AUX 117 PFI 10 CTR 0 OUT 121 PFI 12 CTR 0 A 113 PFI 8 CTROZ 115 PFI 9 CTROB 117 PFI 10 CTR 1 SRC 108 PFI 3 CTR 1 GATE 109 PFI 4 CTR 1 AUX 119 PFI 11 CTR 1 OUT 123 PFI 13 CTR 1 A 108 PFI 3 CTR1Z 109 PFI 4 CTR 1B 119 PFI 11 FREQ OUT 125 PFI 14 3 Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later M Series User Manual USB 6255 Screw Terminal Specifications Refer to the M 625x Specificatio
179. SB 622x 625x 628x Devices For EMC compliance the chassis of the USB M Series device must be connected to earth ground through the chassis ground The wire should be AWG 16 or larger solid copper wire with a maximum length of 1 5 m 5 ft Attach the wire to the earth ground of the facility s power system For more information about earth ground connections refer to the KnowledgeBase document Earth Grounding for Test and Measurement Devices by going to ni com info and entering the info code earthground You can attach a wire to the ground lug screw of any USB 62xx device as shown in Figure 3 1 NATIONAL NI USB 62xx INSTRUMENTS ultifunction I O with M Correlated Digital 1 0 for USB active READY O Figure 3 1 Grounding a USB 62 xx Device through the Ground Lug Screw National Instruments Corporation 3 7 M Series User Manual Chapter 3 Connector and LED Information USB 6225 625x 628x Screw Terminal Devices You can attach and solder a wire to the chassis ground lug of certain USB 62xx Screw Terminal devices as shown in Figure 3 2 The wire should be as short as possible Figure 3 2 Grounding a USB 62xx Screw Terminal Device through the Chassis Ground Lug USB 62xx BNC Devices You can attach a wire toa CHS GND screw terminal of any USB 62xx BNC device as shown in Figure 3 3 Use as short a wire as possible In a
180. TE module monotonicity multichannel multifunction DAQ multiplex mux NI NI DAQ M Series User Manual The numerical prefix designating 10 Multifunction I O DAQ module Designates a family of data acquisition products that have multiple analog input channels digital I O channels timing and optionally analog output channels An MIO product can be considered a miniature mixed signal tester due to its broad range of signal types and flexibility Also known as multifunction DAQ MXI Interface To Everything A custom ASIC designed by National Instruments that implements the PCI bus interface The MITE supports bus mastering for high speed data transfers over the PCI bus A board assembly and its associated mechanical parts front panel optional shields and so on A module contains everything required to occupy one or more slots in a mainframe SCXI and PXI devices are modules A characteristic of a DAC in which the analog output always increases as the values of the digital code input to it increase Pertaining to a radio communication system that operates on more than one channel at the same time The individual channels might contain identical information or they might contain different signals See MIO To assign more than one signal to a channel See also mux Multiplexer A set of semiconductor or electromechanical switches arranged to select one of many inputs to a single output The majority of DAQ car
181. Timing Engine B 6 ni com Appendix B Timing Diagrams ty t2 te ri Dit gt 3 gt eu Sample i Clock Timebase gt et Sync Sample Clock Timebase i te te Convert Clock Timebase i t7 a Sync Convert i Clock Timebase i Figure B 5 Al Timing Clocks Timing Diagram Table B 2 Al Timing Clocks Timing Time Description Line Min ns Max ns to Minimum Pulse Width 12 5 t3 Minimum Period 50 0 t4 Delay to Sample Clock Timebase PFI 3 8 9 3 RTSI 3 5 9 0 STAR 3 0 6 4 ts Delay to Sync Sample Clock Timebase PFI 3 4 8 5 RTSI 3 2 8 3 STAR 2 7 5 6 te Delay to Convert Clock Timebase PFI 4 1 10 2 RTSI 3 9 9 9 STAR 3 4 7 3 t Delay to Sync Convert Clock PFI 3 6 8 9 Timebase RTSI 3 3 8 6 STAR 2 9 6 0 National Instruments Corporation B 7 M Series User Manual Appendix B Timing Diagrams Convert Clock Convert Clock is the signal that determines when an analog to digital conversion is started The signal going to the ADC is called p_AI_ Convert Convert Clock also can be routed to several external I O terminals for external use Convert Clock is always generated from the Convert Clock Timebase signal either directly or indirectly b
182. UTPUT A01 A02 Pon D GND AAAAPA P P0 12 P0 13 P0 14 P0 15 ANALOG INPUT D GND NT D GND P0 16 P0 17 P0 18 4 Po 19 D GND D GND PFI 8 P2 0 P0 20 PFI 9 P2 1 P0 21 PFI 10 P2 2 PO 22 PFI 11 P2 3 P0 23 D GND D GND PFI 12 P2 4 PO 24 PFI 13 P2 5 l TIE H P0 25 PFI 14 P2 6 P0 26 PFI 15 P2 7 P0 27 D GND D GND D GND Po 28 AI GND PO 29 AI SENSE P0 30 Al SENSE 2 P0 31 Y S IS IS IS IS S IS IS S IS IS IS IS IS IS IS S IS S S IS S IS CHS GND CHS GND O 7 NATIONAL D INSTRUMENTS Figure A 19 USB 6229 BNC Top Panel and Pinout M Series User Manual A 54 ni com Appendix Device Specific Information Table A 12 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Name CTR 0 SRC PFI 8 CTR 0 GATE PFI 9 CTR 0 AUX PFI 10 CTR 0 OUT PFI 12 CTROA PFI 8 CTROZ PFI 9 CTROB PFI 10 CTR 1 SRC PFI 3 CTR 1 GATE PFI 4 CTR 1 AUX PFI 11 CTR 1 OUT PFI 13 CTRIA PFI 3 CTRIZ PFI 4 CTR1B PFI 11 FREQ OUT PFI 14 Sy Note For more information about default NI DAQmx
183. X is installed at Applications National Instruments NI DAQmx Base documentation Note USB 622x 625x 628x devices are not supported in NI DAQmx Base If you are a new user use the Getting Started with LabVIEW manual to familiarize yourself with the LabVIEW graphical programming environment and the basic LabVIEW features you use to build data National Instruments Corporation xvii M Series User Manual About This Manual LabWindows CVI acquisition and instrument control applications Open the Getting Started with LabVIEW manual by selecting Start All Programs National Instruments LabVIEW LabVIEW Manuals or by navigating to the labview manuals directory and opening LV_Getting_Started pdf Use the LabVIEW Help available by selecting Help Search the LabVIEW Help in LabVIEW to access information about LabVIEW programming concepts step by step instructions for using LabVIEW and reference information about LabVIEW VIs functions palettes menus and tools Refer to the following locations on the Contents tab of the LabVIEW Help for information about NI DAQmx e Getting Started Getting Started with DAQ Includes overview information and a tutorial to learn how to take an NI DAQmx measurement in LabVIEW using the DAQ Assistant e VI and Function Reference Measurement I O VIs and Functions Describes the LabVIEW NI DAQmx VIs and properties e Taking Measurements Contains the conceptual and how to information you need to acq
184. YSTEM FAILURES ANY APPLICATION WHERE A SYSTEM FAILURE WOULD CREATE A RISK OF HARM TO PROPERTY OR PERSONS INCLUDING THE RISK OF BODILY INJURY AND DEATH SHOULD NOT BE RELIANT SOLELY UPON ONE FORM OF ELECTRONIC SYSTEM DUE TO THE RISK OF SYSTEM FAILURE TO AVOID DAMAGE INJURY OR DEATH THE USER OR APPLICATION DESIGNER MUST TAKE REASONABLY PRUDENT STEPS TO PROTECT AGAINST SYSTEM FAILURES INCLUDING BUT NOT LIMITED TO BACK UP OR SHUT DOWN MECHANISMS BECAUSE EACH END USER SYSTEM IS CUSTOMIZED AND DIFFERS FROM NATIONAL INSTRUMENTS TESTING PLATFORMS AND BECAUSE A USER OR APPLICATION DESIGNER MAY USE NATIONAL INSTRUMENTS PRODUCTS IN COMBINATION WITH OTHER PRODUCTS IN A MANNER NOT EVALUATED OR CONTEMPLATED BY NATIONAL INSTRUMENTS THE USER OR APPLICATION DESIGNER IS ULTIMATELY RESPONSIBLE FOR VERIFYING AND VALIDATING THE SUITABILITY OF NATIONAL INSTRUMENTS PRODUCTS WHENEVER NATIONAL INSTRUMENTS PRODUCTS ARE INCORPORATED IN A SYSTEM OR APPLICATION INCLUDING WITHOUT LIMITATION THE APPROPRIATE DESIGN PROCESS AND SAFETY LEVEL OF SUCH SYSTEM OR APPLICATION Compliance Compliance with FCC Canada Radio Frequency Interference Regulations Determining FCC Class The Federal Communications Commission FCC has rules to protect wireless communications from interference The FCC places digital electronics into two classes These classes are known as Class A for use in industrial commercial locations only or Class B for use in residential or commercial loc
185. able enclosure that gives user defined connectivity and flexibility through customized panelettes Visit ni com for more information about the CA 1000 Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more information about custom cabling solutions USB 6225 Mass Termination LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6225 Mass Termination LEDs USB 6225 Mass Termination Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 3 Connector and LED Information for information about replacing the fuse on the USB 6225 Mass Termination M Series User Manual A 44 ni com Appendix Device Specific Information NI 6229 The following sections contain information about the PCI PXI 6229 USB 6229 Screw Terminal and USB 6229 BNC devices PCI PXI 6229 PCI PXI 6229 Pinout Figure A 17 shows the pinout of the PCI PXI 6229 The I O signals appear on two 68 pin connectors For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information 3 Note M Series devices may be used with most E Series accessories However some E Series accessories use different terminal names Refer to the M Series and E Series Pinout Comparison section of Chapter 3 Connector and LED Information for more information National Instruments Corporation A 45
186. absolute accuracy but it increases the nominal resolution of input ranges by about 5 over what the formula shown above would indicate Choose an input range that matches the expected input range of your signal A large input range can accommodate a large signal variation but reduces the voltage resolution Choosing a smaller input range improves the voltage resolution but may result in the input signal going out of range 4 2 ni com Chapter 4 Analog Input For more information about setting ranges refer to the NI DA Qmx Help or the LabVIEW Help in version 8 0 or later Table 4 1 shows the input ranges and resolutions supported by each M Series device family Table 4 1 M Series Input Range and Nominal Resolution Nominal Resolution Assuming M Series Device Family Input Range 5 Over Range NI 622x 10 V to 10 V 320 uV 5 V to5 V 160 uV 1VtolV 32 uV 200 mV to 200 mV 64uV NI 625x 10 V to 10 V 320 uV 5 Vto5 V 160 uV 2 V to2 V 64 uV 1VtolV 32 uV 500 mV to 500 mV 16 uV 200 mV to 200 mV 6 4 uV 100 mV to 100 mV 3 2 UV NI 628x 10 V to 10 V 80 1 uV 5 V to5 V 40 1 uV 2 V to2 V 16 0 uV 1VtolV 8 01 UV 500 mV to 500 mV 4 01 UV 200 mV to 200 mV 1 60 uV 100 mV to 100 mV 0 80 uV National Instruments Corporation 4 3 M Series User Manual Chapter 4 Analog Input Analog Input Lowpass Filter A lowpass filter att
187. ad for more information SCC Accessories SCC provides portable modular signal conditioning to your DAQ system To connect your M Series device to an SCC module carrier such as the SC 2345 SC 2350 or SCC 68 use an SHC68 68 EPM shielded cable Use Connector 0 of your M Series device to control an SCC module carrier SCC carriers can be used with Connector 1 with NI DAQ 7 4 and later Refer to the SCC Advisor available by going to ni com info and entering the info code rdscav for more information BNC Accessories You can use the SHC68 68 EPM shielded cable to connect your DAQ device to BNC accessories such as the following e BNC 2110 Provides BNC connectivity to all analog signals some digital signals and spring terminals for other digital signals e BNC 2111 Provides BNC connectivity to 16 single ended analog input signals two analog output signals five DIO PFI signals and the external reference voltage for analog output National Instruments Corporation A 27 M Series User Manual Appendix Device Specific Information e BNC 2120 Similar to the BNC 21 10 and also has a built in function generator quadrature encoder temperature reference and thermocouple connector e BNC 2090A Desktop rack mountable device with 22 BNCs for connecting analog digital and timing signals You can use one BNC accessory with the signals on either connector of your M Series device You can use two BNC accessories wit
188. additional filters to AI signals using external accessories as described in the Cables and Accessories section of Chapter 2 DAQ System Overview Analog Input Ground Reference Settings M Series User Manual M Series devices support the analog input ground reference settings Differential mode In DIFF mode the M Series device measures the difference in voltage between two AI signals e Referenced single ended mode In RSE mode the M Series device measures the voltage of an AI signal relative to AI GND e Non referenced single ended mode In NRSE mode the M Series device measures the voltage of an AI signal relative to one of the AI SENSE or AI SENSE 2 inputs The AI ground reference setting determines how you should connect your AI signals to the M Series device Refer to the Connecting Analog Input Signals section for more information 4 4 ni com Chapter 4 Analog Input Ground reference settings are programmed on a per channel basis For example you might configure the device to scan 12 channels four differentially configured channels and eight single ended channels M Series devices implement the different analog input ground reference settings by routing different signals to the NI PGIA The NI PGIA is a differential amplifier That is the NI PGIA amplifies or attenuates the difference in voltage between its two inputs The NI PGIA drives the ADC with this amplified voltage The amount of amplification the
189. agram National Instruments Corporation B 11 M Series User Manual Appendix B Timing Diagrams Table B 5 Convert Clock Timebase Timing Time Description Line Min ns Max ns ti3 Delay to Selected Start Trigger PFI 3 4 8 8 RTSI 3 3 8 5 STAR 2 7 5 7 ti4 Selected Start Trigger Setup Time 1 5 to Sync Convert Clock Timebase tis Selected Start Trigger Hold Time 0 to Sync Convert Clock Timebase tie Sync Convert Clock Timebase to Start Trigger 0 9 2 4 ty7 Start Trigger to POUT PFI 1 1 3 1 RTSI 1 1 2 7 Selected Reference Trigger Reference Trigger Terminal gt lt 2 e gt Terminal e _i Terminal Start Trigger D e Terminal gt RTSI Selected Pause Trigger Terminal gt 199 gt e Pause Trigger SI Start Terminal SI Sample Clock Timebase Counter Sync Sample Clock Timebase plock O D gt gt Terminal SI_TC y j p_Al_Convert SI2 Convert Clock Timebase Counter P12 TC Sync Convert Clock Timebase oe 1 Start Selected Sample Clock aii Terminal J gt lt gt _ gt p 4 e gt Terminal e M Series User Manual Figure B 11 Sample Clock Timebase Timing and the Analog Input Timing Engine B 12 ni com Appendix B Timing Diagrams Selected Start Trigger i Sync Sample Clock Timebase
190. al USB specification Volts Common mode voltage Ground loop voltage Volts input high Volts input low Volts in Measured voltage Volts output high Volts output low Volts out Signal source voltage See channel 1 The plot of the instantaneous amplitude of a signal as a function of time 2 Multiple voltage readings taken at a specific sampling rate National Instruments Corporation G 19 M Series User Manual Index Symbols 5 V power source 3 6 Numerics 10 MHz reference clock 9 3 100 kHz Timebase 9 2 20 MHz Timebase 9 2 5B Series 2 5 80 MHz source mode 7 38 80 MHz Timebase 9 2 A A D converter 4 2 accessories 2 5 choosing for your device 1 3 NI 6220 A 4 NI 6224 A 26 NI 6280 A 128 NI 6284 A 145 NI PCI PCIe PXI PXIe 6259 A 107 NI 6250 A 62 NI 6254 A 86 PCI PCIe PXI PXIe 6251 A 67 PCI PXI 6221 68 pin A 9 PCI PXI 6225 A 32 PCI PXI 6229 A 47 PCI PXI 6255 A 92 PCI PXI 6281 A 133 PCI PXI 6289 A 151 PCI 6221 37 pin A 13 USB 6225 Mass Termination A 41 USB 6251 Mass Termination A 81 USB 6255 Mass Termination A 101 USB 6259 Mass Termination A 123 USB 6281 Mass Termination A 140 National Instruments Corporation USB 6289 Mass Termination A 160 used with M Series D 1 accuracy analog triggers 11 7 acquisitions circular buffered 4 11 digital waveform 6 4 double buffered 4 11 hardware timed 4 10 on demand 4 10 software timed 4 10 A
191. al modules On M Series devices the eight PXI trigger signals are synonymous with RTSI lt 0 7 gt Note that in a PXI chassis with more than eight slots the PXI trigger lines may be divided into multiple independent buses Refer to the documentation for your chassis for details In a PXI system the Star Trigger bus implements a dedicated trigger line between the first peripheral slot adjacent to the system slot and the other peripheral slots The Star Trigger can be used to synchronize multiple devices or to share a common trigger signal among devices A Star Trigger controller can be installed in this first peripheral slot to provide trigger signals to other peripheral modules Systems that do not require this functionality can install any standard peripheral module in this first peripheral slot An M Series device receives the Star Trigger signal PXI_STAR from a Star Trigger controller PXI_STAR can be used as an external source for many AI AO and counter signals An M Series device is not a Star Trigger controller An M Series device may be used in the first peripheral slot of a PXI system but the system will not be able to use the Star Trigger feature You can enable a programmable debouncing filter on each PFI RTSL or PXI_STAR signal When the filters are enabled your device samples the input on each rising edge of a filter clock M Series devices use an onboard oscillator to generate the filter clock with a 40 MHz fre
192. al to be the source of DI Sample Clock or DO Sample Clock Then generate a trigger that initiates pulses on the source signal The method for generating this trigger depends on which signal is the source of DI Sample Clock or DO Sample Clock For example consider the case where you are using AI Sample Clock as the source of DI Sample Clock To initiate pulses on AI Sample Clock and therefore on DI Sample Clock you use AI Start Trigger to trigger the start of an AI operation The AI Start Trigger causes the M Series device to begin generating AI Sample clock pulses which in turn generates DI Sample clock pulses as shown in Figure 6 2 PFI 1 Al Start Trigger initiates Al Start Trigger i Al Sample Clock and DI Sample Clock Al Sample Clock C eee DI Sample Clock Figure 6 2 Digital Waveform Triggering Similarly if you are using AO Sample Clock as the source of DI Sample Clock then AO Start Trigger initiates both AO and DI operations If you are using a Counter output as the source of DI Sample Clock the counter s start trigger enables the counter which drives DI Sample Clock If you are using an external signal such as PFI x as the source for DI Sample Clock or DO Sample Clock you must trigger that external signal National Instruments Corporation 6 3 M Series User Manual Chapter 6 Digital 1 0 Digital Waveform Acquisition You can acquire digital wavef
193. alog triggers 11 4 U upgrading from E Series to M Series D 1 USB bulk transfers 10 4 cable strain relief 1 4 1 5 1 6 Signal Stream 10 1 USB Signal Stream 10 1 as a transfer method 10 4 changing data transfer methods 10 5 USB 6221 BNC cable management 1 5 connecting signals A 18 fuse replacement A 23 LED patterns A 23 pinout A 17 specifications A 23 USB cable strain relief 1 5 USB 6221 Mass Termination USB cable strain relief 1 4 USB 6221 Screw Terminal fuse replacement A 16 ni com LED patterns A 16 pinout A 15 signal label 1 3 specifications A 16 USB cable strain relief 1 4 1 5 1 6 USB 6225 Mass Termination A 30 accessory options A 41 cabling options A 41 fuse replacement A 44 LED patterns A 44 pinout A 39 specifications A 41 USB cable strain relief 1 4 1 5 1 6 USB 6225 Screw Terminal A 30 fuse replacement A 38 LED patterns A 38 pinout A 36 signal label 1 3 specifications A 38 USB cable strain relief 1 4 1 5 1 6 USB 6229 BNC cable management 1 5 connecting signals A 55 fuse replacement A 59 LED patterns A 59 pinout A 54 specifications A 59 USB cable strain relief 1 5 USB 6229 Screw Terminal fuse replacement A 53 LED patterns A 53 pinout A 51 signal label 1 3 specifications A 53 USB cable strain relief 1 4 1 5 1 6 USB 6251 BNC cable management 1 5 connecting signals A 73 fuse replacement A 78 LED pa
194. ample Clock signals which in turn signal the start of a sample In order to synchronize external triggers to the Sample Clock Timebase another related signal is created Sync Sample Clock Timebase This is always the inverted signal selected to be Sample Clock Timebase while the Sample Clock Timebase signal is a copy without inversion of the signal The idea is that for each significant edge of the Sample Clock Timebase there is a significant edge of the Sync Sample Clock Timebase signal that occurs before Sample Clock Timebase and that can be used to synchronize the input triggers The source for Convert Clock Timebase and Sample Clock Timebase is the internal signal bus _i The timing of this signal is described in relation to this common point The Convert Clock Timebase and Sample Clock Timebase can be asynchronous from each other Selected Reference Trigger Reference Trigger Terminal Le 99 99 D gt Terminal Start Trigger Terminal gt e lt D gt Terminal Selected Start Trigger gt gt RTSI Terminal sis gt Pause Trigger Pause Trigger i SI Start Terminal Sl Counter Block lt gt gt Terminal j p_Al_Convert ock Timebase Counter SI2 TC Block lock Timebase 1 Terminal L Selected Sample Clock gt Terminal M Series User Manual Figure B 4 Al Timing Clocks and the Analog Input
195. analog input and eight digital I O lines e Low profile portable Integrates well with other laptop computer measurement technologies 2 4 ni com Chapter 2 DAQ System Overview e High bandwidth Acquire signals at rates up to 1 25 MHz e Connectivity Incorporates panelette technology to offer custom connectivity to thermocouple BNC LEMO B Series and MIL Spec connectors 3 Note PCI Express users should consider the power limits on certain SCC modules without an external power supply Refer to the specifications for your device and the PCI Express Device Disk Drive Power Connector section of Chapter 3 Connector and LED Information for information about power limits and increasing the current the device can supply on the 5 V terminal ayi Note SCC is not supported on the PCI 6221 37 pin USB 622x 625x 628x Screw Terminal or USB 622x 625x BNC devices 5B Series 5B is a front end signal conditioning system for plug in data acquisition devices A 5B system consists of eight or 16 single channel modules that plug into a backplane for conditioning thermocouples and other analog signals National Instruments offers a complete line of 5B modules carriers backplanes and accessories Ai Note 5B is not supported on the PCI 6221 37 pin USB 622x 625x 628x Screw Terminal or USB 622x 625x BNC devices 3 Note For more information about SCXI SCC and 5B Series products refer to ni com signalconditioning Cables and Acc
196. analog signals some digital signals and spring terminals for other digital signals e BNC 2111 Provides BNC connectivity to 16 single ended analog input signals two analog output signals five DIO PFI signals and the external reference voltage for analog output e BNC 2120 Similar to the BNC 2110 and also has a built in function generator quadrature encoder temperature reference and thermocouple connector e BNC 2090A Desktop rack mountable device with 22 BNCs for connecting analog digital and timing signals You can use the SH68 68 EPM shielded cable to connect Connector 0 of your DAQ device to BNC accessories Using a BNC Accessory with Connector 1 Connector 1 of your device is compatible with BNC 2115 BNC 2115 provides BNC connectivity to 24 of the differential 48 single ended analog input signals on Connector 1 You can use an SH68 68 S cable to connect to the BNC 2115 A 42 ni com Appendix Device Specific Information Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks Use an SH68 68 EPM shielded cable to connect an M Series device to a connector block such as the following e CB 68LP and CB 68LPR unshielded connector blocks e SCC 68 I O connector block with screw terminals general breadboard area bus terminals and four expansion slots for SCC signal conditioning modules e SCB 68 shielded connector block with temperature sensor make sure th
197. and 2 On USB 62xx BNC devices the USER lt 1 2 gt BNC connectors allow you to use a BNC connector for a digital or timing I O signal of your choice The USER lt 1 2 gt BNC connectors are internally routed to the USER lt 1 2 gt screw terminals CHS GND Chassis Ground This terminal connects to the USB 62xx BNC device metal enclosure You can connect your cable s shield wire to CHS GND for a ground connection NC No connect Do not connect signals to these terminals On NI 6225 devices the reference for each AI lt 16 63 gt signal is AI SENSE 2 and each AI lt 64 79 gt signal is AI SENSE in NRSE mode USB 62xx Screw Terminal users can connect the shield of a shielded cable to the chassis ground lug for a ground connection The chassis ground lug is not available on all device versions National Instruments Corporation 3 3 M Series User Manual Chapter 3 Connector and LED Information M Series and E Series Pinout Comparison The pinout of Connector 0 of 68 pin M Series devices is similar to the pinout of 68 pin E Series devices On M Series devices some terminals have enhanced functionality or other slight differences Table 3 2 compares the two pinouts Table 3 2 M Series and E Series Device Pinout Comparison E Series M Series Terminal Terminal Terminal Differences 1 FREQ OUT PFI 14 P2 6 E Series devices
198. and automation applications To connect your M Series device to an SCXI chassis use the SCXI 1349 adapter and an SHC68 68 EPM cable Use Connector 0 of your M Series device to control SCXI NI DAQ 7 4 and later supports SCX in parallel mode on Connector 1 Note When using Connector 1 in parallel mode with SCXI modules that support track and hold you must programmatically disable track and hold M Series User Manual You also can use an M Series device to control the SCXI section of a PXI SCXI combination chassis such as the PXI 1010 or PXI 1011 The M Series device in the rightmost PXI slot controls the SCXI devices No cables or adapters are necessary Refer to the SCXT Advisor available by going to ni com info and entering the info code rdscad for more information SCC Accessories SCC provides portable modular signal conditioning to your DAQ system To connect your M Series device to an SCC module carrier such as the SC 2345 SC 2350 or SCC 68 use an SHC68 68 EPM shielded cable Use Connector 0 of your M Series device to control an SCC module carrier SCC carriers can be used with Connector with NI DAQ 7 4 and later Refer to the SCC Advisor available by going to ni com info and entering the info code rdscav for more information BNC Accessories You can use the SHC68 68 EPM shielded cable to connect your DAQ device to BNC accessories such as the following e BNC 2110 Provides BNC connectivity to all analo
199. annel with a large input range to a channel with a small input range can greatly increase the settling time Suppose a 4 V signal is connected to channel 0 and a mV signal is connected to channel 1 The input range for channel 0 is 10 V to 10 V and the input range of channel 1 is 200 mV to 200 mV When the multiplexer switches from channel 0 to channel 1 the input to the NI PGIA switches from 4 V to 1 mV The approximately 4 V step from 4 V to 1 mV is 1 000 of the new full scale range For a 16 bit device to settle within 0 0015 15 ppm or 1 LSB of the 200 mV full scale range on channel 1 the input circuitry must settle to within 0 000031 0 31 ppm or 1 50 LSB of the 10 V range Some devices can take many microseconds for the circuitry to settle this much To avoid this effect you should arrange your channel scanning order so that transitions from large to small input ranges are infrequent In general you do not need this extra settling time when the NI PGIA is switching from a small input range to a larger input range Insert Grounded Channel between Signal Channels Another technique to improve settling time is to connect an input channel to ground Then insert this channel in the scan list between two of your signal channels The input range of the grounded channel should match the input range of the signal after the grounded channel in the scan list Consider again the example above where a 4 V signal is connected to
200. anning Considerations section of Chapter 4 Analog Input I am using my device in differential analog input ground reference mode and I have connected a differential input signal but my readings are random and drift rapidly What is wrong In DIFF mode if the readings from the DAQ device are random and drift rapidly you should check the ground reference connections The signal can be referenced to a level that is considered floating with reference to the device ground reference Even if you are in DIFF mode you must still reference the signal to the same ground level as the device reference There National Instruments Corporation C 1 M Series User Manual Appendix C Troubleshooting M Series User Manual are various methods of achieving this reference while maintaining a high common mode rejection ratio CMRR These methods are outlined in the Connecting Analog Input Signals section of Chapter 4 Analog Input AI GND is an AI common signal that routes directly to the ground connection point on the devices You can use this signal if you need a general analog ground connection point to the device Refer to the When to Use Differential Connections with Ground Referenced Signal Sources section of Chapter 4 Analog Input for more information How can I use the AI Sample Clock and AI Convert Clock signals on an M Series device to sample the AI channel s M Series devices use AI Sample Clock ai SampleClock and AI Convert Clock ai
201. anual Appendix Device Specific Information Table A 13 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 PFI 10 CTR 0 OUT 2 PFI 12 CTROA 37 PFI 8 CTROZ 3 PFI 9 CTROB 45 PFI 10 CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR 1 OUT 40 PFI 13 CTR 1 A 42 PFI 3 CTRIZ 41 PFI 4 CTR 1B 46 PFI 11 FREQ OUT 1 PFI 14 3 Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later PCI PXI 6250 Specifications Refer to the M 625x Specifications for more detailed information about the PCI PXI 6250 device PCI PXI 6250 Accessory and Cabling Options This section describes some cable and accessory options for M Series devices with one 68 pin connector such as the PCI PXI 6250 Refer to ni com for other accessory options including new devices M Series User Manual A 62 ni com Appendix Device Specific Information SCXI Accessories SCXI is a programmable signal conditioning system designed for measurement and automation applications To connect your M Series device to an SCXI chassis use the SCXI 1349 adapter and an SHC68 68 EPM cable You also can use an M Series device to control the SCXI section of a PXI SCXI combination chassis su
202. are sensitivity frequency range and linearity 1 Electronic equipment that makes transducer or other signals suitable in level and range to be transmitted over a distance or to interface with voltage input instruments 2 The manipulation of signals to prepare them for digitizing A generic term for any instrument in the family of signal generators Signals are waveforms containing information Although physical signals can be in the form of mechanical electromagnetic or other forms they are most often converted to electronic form for measurement G 16 ni com single trigger mode single buffered single ended input single ended output software applications software triggering source impedance synchronous task TC National Instruments Corporation G 17 Glossary When the arbitrary waveform generator goes through the staging list only once Describes a device that acquires a specified number of samples from one or more channels and returns the data when the acquisition is complete A circuit that responds to the voltage on one input terminal and ground See also differential input A circuit whose output signal is present between one output terminal and ground The programs that run on your computer and perform a specific user oriented function such as accounting program development measurement or data acquisition In contrast operating system functions basically perform the generic houseke
203. are timed acquisitions 4 10 hardware timed generations 5 4 period measurement 7 7 position measurement 7 17 pulse width measurement 7 5 semi period measurement 7 8 two signal edge separation measurement 7 18 bus interface 10 1 RTSI 9 4 C cable management 1 5 cables 2 5 choosing for your device 1 3 custom 2 6 NI 6220 A 4 NI 6224 A 26 NI 6280 A 128 NI 6284 A 145 NI PCI PCIe PXI PXIe 6259 A 107 NI 6250 A 62 NI 6254 A 86 PCI PCIe PXI PXIe 6251 A 67 PCI PXI 6221 68 pin A 9 PCI PXI 6225 A 32 PCI PXI 6229 A 47 PCI PXI 6255 A 92 National Instruments Corporation 1 3 Index PCI PXI 6281 A 133 PCI PXI 6289 A 151 PCI 6221 37 pin A 13 USB 6225 Mass Termination A 41 USB 6251 Mass Termination A 81 USB 6255 Mass Termination A 101 USB 6259 Mass Termination A 123 USB 6281 Mass Termination A 140 USB 6289 Mass Termination A 160 calibration 1 2 2 2 calibration certificate NI resources E 2 cascading counters 7 32 Change Detection Event signal 6 8 changing data transfer methods between DMA and IRQ 10 5 between USB signal stream and programmed I O 10 5 channel scanning order 4 8 Z behavior 7 15 channels analog input 11 3 sampling with AI Sample Clock and AI Convert Clock C 2 charge injection C 1 choosing frequency measurement 7 13 circular buffered acquisition 4 11 clock 10 MHz reference 9 3 external reference 9 2 generation 9 1 timing diagrams B 45 PXI and trigger
204. are two examples to consider Example 1 Averaging many AI samples can increase the accuracy of the reading by decreasing noise effects In general the more points you average the more accurate the final result However you may choose to decrease the number of points you average and slow down the scanning rate Suppose you want to sample 10 channels over a period of 20 ms and average the results You could acquire 500 points from each channel at a scan rate of 250 kS s Another method would be to acquire 1 000 points from each channel at a scan rate of 500 kS s Both methods take the same amount of time Doubling the number of samples averaged from 500 to 1 000 decreases the effect of noise by a factor of 1 4 the square root of 2 However doubling the number of samples in this example decreases the time the NI PGIA has to settle from 4 us to 2 Us In some cases the slower scan rate system returns more accurate results Example 2 If the time relationship between channels is not critical you can sample from the same channel multiple times and scan less frequently For example suppose an application requires averaging 100 points from channel 0 and averaging 100 points from channel 1 You could alternate reading between channels that is read one point from channel 0 then one point 4 9 M Series User Manual Chapter 4 Analog Input from channel 1 and so on You also could read all 100 points from channel 0 then read 100 points
205. are using Synchronization Modes The 32 bit counter counts up or down synchronously with the Source signal The Gate signal and other counter inputs are asynchronous to the Source signal So M Series devices synchronize these signals before presenting them to the internal counter M Series devices use one of three synchronization methods e 80 MHz source mode e Other internal source mode External source mode National Instruments Corporation 7 37 M Series User Manual Chapter 7 Counters In DAQmx the device uses 80 MHz source mode if you perform the following e Perform a position measurement e Select duplicate count prevention Otherwise the mode depends on the signal that drives Counter n Source Table 7 6 describes the conditions for each mode Table 7 6 Synchronization Mode Conditions Duplicate Count Type of Signal Driving Synchronization Prevention Enabled Measurement Counter n Source Mode Yes Any Any 80 MHz Source No Position Measurement Any 80 MHz Source No Any 80 MHz Timebase 80 MHz Source No All Except Position 20 MHz Timebase Other Internal Source Measurement 100 kHz Timebase or PXI_CLK10 No All Except Position Any Other Signal External Source Measurement such as PFI or RTSI M Series User Manual 80 MHz Source Mode In 80 MHz source mode the device synchronizes signals on the rising edge of the source and counts on the following rising edge of the s
206. asurement 7 4 buffered 7 5 single 7 4 PXI and PXI Express 10 2 clock 10 2 clock and trigger signals 9 8 ni com considerations 10 2 trigger signals 10 2 triggers 9 9 using with CompactPCI 10 3 PXI Express See also PXIe 6251 See also PXIe 6259 and PXI 10 2 chassis compatibility 10 2 PXI_CLK10 9 8 PXI_ STAR filters 9 9 trigger 9 9 PXI 6220 A 2 PXI 6221 A 7 PXI 6224 A 24 PXI 6225 A 30 PXI 6229 A 45 PXI 6250 A 60 PXI 6251 A 65 PXI 6254 A 84 PXI 6255 A 90 PXI 6259 A 105 PXI 6280 A 126 PXI 6281 A 131 PXI 6284 A 143 PXIe 6251 A 65 PXIe 6259 A 105 Q quadrature encoders 7 14 R range analog input 4 2 real time system integration bus 9 4 reciprocal frequency measurement 7 12 reference clock 10 MHz 9 3 National Instruments Corporation Index external 9 2 trigger analog input internal timing B 13 referenced single ended connections using with floating signal sources 4 19 when to use with floating signal sources 4 14 when to use with ground referenced signal sources 4 21 related documentation xvi retriggerable single pulse generation 7 20 routing analog comparison event to an output terminal 11 3 clock 9 1 digital 9 1 RSE configuration 4 19 RSE connections using with floating signal sources 4 19 when to use with floating signal sources 4 14 when to use with ground referenced signal sources 4 21 RTSI 9 4 connector pinout 3 13 9 4
207. ate until the next Source pulse In this example the counter stores the values in the buffer on the first rising Source edge after the rising edge of Gate The details of when exactly the counter synchronizes the Gate signal vary depending on the synchronization mode Synchronization modes are described in the Synchronization Modes section National Instruments Corporation 7 35 M Series User Manual Chapter 7 Counters Example Application That Works Incorrectly Duplicate Counting In Figure 7 33 after the first rising edge of Gate no Source pulses occur so the counter does not write the correct data to the buffer No Source edge so no value written to buffer es O ed Source Counter Value _ 6 X7 X 1 Buffer 7 Figure 7 33 Duplicate Count Example Example Application That Prevents Duplicate Count With duplicate count prevention enabled the counter synchronizes both the Source and Gate signals to the 80 MHz Timebase By synchronizing to the timebase the counter detects edges on the Gate even if the Source does not pulse This enables the correct current count to be stored in the buffer even if no Source edges occur between Gate signals as shown in Figure 7 34 Gate Source Counter detects rising Gate edge Counter value increments only one time for each Source pulse 80 MHz Timebase
208. ater supports SCXI in parallel mode on Connector 1 3 Note When using Connector 1 in parallel mode with SCXI modules that support track and hold you must programmatically disable track and hold You also can use an M Series device to control the SCXI section of a PXI SCXI combination chassis such as the PXI 1010 or PXI 1011 The M Series device in the rightmost PXI slot controls the SCXI devices No cables or adapters are necessary Refer to the SCXI Advisor available by going to ni com info and entering the info code rdscad for more information SCC Accessories SCC provides portable modular signal conditioning to your DAQ system To connect your M Series device to an SCC module carrier such as the SC 2345 SC 2350 or SCC 68 use an SHC68 68 EPM shielded cable Use Connector 0 of your M Series device to control an SCC module carrier SCC carriers can be used with Connector 1 with NI DAQ 7 4 and later Refer to the SCC Advisor available by going to ni com info and entering the info code rdscav for more information BNC Accessories You can use the SHC68 68 EPM shielded cable to connect your DAQ device to BNC accessories such as the following e BNC 2110 Provides BNC connectivity to all analog signals some digital signals and spring terminals for other digital signals e BNC 2111 Provides BNC connectivity to 16 single ended analog input signals two analog output signals five DIO PFI signals and the external ref
209. ation USB 6251 Mass Termination Pinout Figure A 39 shows the pinout of the USB 6251 Mass Termination device For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information ay Note M Series devices may be used with most E Series accessories However some E Series accessories use different terminal names Refer to the M Series and E Series Pinout Comparison section of Chapter 3 Connector and LED Information for more information National Instruments Corporation A 79 M Series User Manual Appendix Device Specific Information AI 8 AlO Al1 33 67 AI GND AI GND 32 66 Alg Al 10 31 65 Al2 Al3 30 64 AI GND AI GND 29 63 Al 11 Al4 28 62 Al SENSE AI GND 27 61 Al12 Al 13 26 60 A15 Al6 25 59 Al GND AI GND 24 58 Al14 Al 15 2357 A17 AO 0 22 56 AI GND AO 1 21 55 AO GND APFI 0 20 54 AO GND P0 4 19 53 D GND D GND 18 52 Po o P0 1 17 51 Po 5 P0 6 16 50 D GND D GND 15 49 Po 2 5V 14 48 PO 7 D GND 13 47 P0 3 D GND 12 46 PFI 11 P2 3 PFIO P1 0 11 45 PFI 10 P2 2 PFI1 P1 1 10 44 D GND D GND 9 43 PFI 2 P1 2 5V 8 42 PFI3 P1 3 D GND 7 41 PFI 4 P1 4 PFI5 P1 5 6 40 PFI13 P2 5 PFI6 P1 6 5 39
210. ations All National Instruments NI products are FCC Class A products Depending on where it is operated this Class A product could be subject to restrictions in the FCC rules In Canada the Department of Communications DOC of Industry Canada regulates wireless interference in much the same way Digital electronics emit weak signals during normal operation that can affect radio television or other wireless products All Class A products display a simple warning statement of one paragraph in length regarding interference and undesired operation The FCC rules have restrictions regarding the locations where FCC Class A products can be operated Consult the FCC Web site at www fcc gov for more information FCC DOC Warnings This equipment generates and uses radio frequency energy and if not installed and used in strict accordance with the instructions in this manual and the CE marking Declaration of Conformity may cause interference to radio and television reception Classification requirements are the same for the Federal Communications Commission FCC and the Canadian Department of Communications DOC Changes or modifications not expressly approved by NI could void the user s authority to operate the equipment under the FCC Rules Class A Federal Communications Commission This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to part 15 of the FCC Rules These limits are
211. b site at ni com info and enter the info code feedback 2004 2008 National Instruments Corporation All rights reserved Important Information Warranty M Series devices are warranted against defects in materials and workmanship for a period of one year from the date of shipment as evidenced by receipts or other documentation National Instruments will at its option repair or replace equipment that proves to be defective during the warranty period This warranty includes parts and labor The media on which you receive National Instruments software are warranted not to fail to execute programming instructions due to defects in materials and workmanship for a period of 90 days from date of shipment as evidenced by receipts or other documentation National Instruments will at its option repair or replace software media that do not execute programming instructions if National Instruments receives notice of such defects during the warranty period National Instruments does not warrant that the operation of the software shall be uninterrupted or error free A Return Material Authorization RMA number must be obtained from the factory and clearly marked on the outside of the package before any equipment will be accepted for warranty work National Instruments will pay the shipping costs of returning to the owner parts which are covered by warranty National Instruments believes that the information in this document is accurate The documen
212. base Selected Start Trigger and Start Trigger S tart Trigger is the signal that starts the analog input timing engine This signal can come from external signals a software command or internal sources Selected Start Trigger is the signal chosen to be the Start Trigger before it is synchronized just after the selection mux Selected Reference Trigger and Reference Trigger A Reference Trigger is a trigger that can stop the AI timing engine If the Reference Trigger is enabled the AI timing engine will stop acquiring data once it sees a valid event on the Reference Trigger and it has acquired the posttrigger number of samples This signal can come from external signals a software command or internal sources The Selected Reference Trigger is the signal chosen to be the Reference Trigger before it is synchronized just after the selection mux Selected Sample Clock and Sample Clock Selected Sample Clock is the signal selected to become Sample Clock before any synchronization just after the selection mux The Sample Clock marks the beginning of a new sample This signal can be an external or internal signal When an internal signal it can be generated with the SI counter dividing the Sample Clock Timebase signal It also can come from an external terminal or from a signal from another internal resource inside the M Series device Selected Pause Trigger and Pause Trigger The Pause Trigger can be used to pause the acquisition for a
213. base This signal can be used to generate the Sample Clock This signal acts as the clock for the UI counter and a Sample Clock can be generated every N periods of the Sample Clock Timebase by programming the UI counter accordingly This signal can come from an internal source such as the board oscillator or an external source Sync Sample Clock Timebase The Sync Sample Clock Timebase is a signal that is generated internally and is related to the Sample Clock Timebase How it is generated and the relationship between the two signals depends on the mode of operation In general the Sync Sample Clock Timebase is used to synchronize the input signals to the analog output timing engine before they are used by the Sample Clock Timebase Start Trigger and Selected Start Trigger The Start Trigger determines when a timed analog output operation will begin This signal can come from a software command or an external pulse Selected Start Trigger is the output of the selection block for the Start Trigger source Pause Trigger and Selected Pause The waveform generation can be paused using the pause trigger When enabled the waveform generation will occur as long as the gate is enabled The generation will be paused if the gate is disabled This signal can come from a software command or an external signal The Selected Pause is the output of the selection block for the Pause Trigger source Star_Trig RTSI or PFI These terminals are the I O
214. be one of the following signals e A pulse initiated by host software e PFI lt 0 15 gt e RTSI lt 0 7 gt e Al Reference Trigger ai ReferenceTrigger e AI Start Trigger ai StartTrigger e PXI STAR The source also can be one of several internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later for more information You also can specify whether the waveform generation begins on the rising edge or falling edge of AO Start Trigger Using an Analog Source When you use an analog trigger source the waveform generation begins on the first rising edge of the Analog Comparison Event signal Refer to the Triggering with an Analog Source section of Chapter 11 Triggering for more information National Instruments Corporation 5 7 M Series User Manual Chapter 5 Analog Output Routing AO Start Trigger Signal to an Output Terminal You can route AO Start Trigger out to any PFI lt 0 15 gt or RTSI lt 0 7 gt terminal The output is an active high pulse PFI terminals are configured as inputs by default AO Pause Trigger Signal Use the AO Pause Trigger ao PauseTrigger signal to mask off samples in a DAQ sequence That is when AO Pause Trigger is active no samples occur AO Pause Trigger does not stop a sample that is in progress The pause does not take effect until the beginning of the next sample When you generate analog output signals t
215. c DO Buffer I O Protection PO x DO x Direction Control Static DI lt H Weak Pull Down DI Waveform Measurement _ FIFO DI Sample Clock o DI Change Detection Figure 6 1 M Series Digital 1 0 Circuitry The DIO terminals are named P0 lt 0 31 gt on the M Series device I O connector The voltage input and output levels and the current drive levels of the DIO lines are listed in the specifications of your device Static DIO Each of the M Series DIO lines can be used as a static DI or DO line You can use static DIO lines to monitor or control digital signals Each DIO can be individually configured as a digital input DI or digital output DO All samples of static DI lines and updates of DO lines are software timed M Series User Manual 6 2 ni com Chapter 6 Digital I O P0 6 and P0 7 on 68 pin M Series devices also can control the up down input of general purpose counters 0 and 1 respectively However it is recommended that you use PFI signals to control the up down input of the counters The up down control signals Counter 0 Up_Down and Counter 1 Up_Down are input only and do not affect the operation of the DIO lines Digital Waveform Triggering M Series devices do not have an independent DI or DO Start Trigger for digital waveform acquisition or generation To trigger a DI or DO operation first select a sign
216. cations Refer to the M 622x Specifications for more detailed information about the PCI PXI 6225 device PCI PXI 6225 Accessory and Cabling Options This section describes some cable and accessory options for the PCI PXI 6225 Refer to ni com for other accessory options including new devices M Series User Manual A 32 ni com Appendix Device Specific Information SCXI Accessories SCXI is a programmable signal conditioning system designed for measurement and automation applications To connect your M Series device to an SCXI chassis use the SCXI 1349 adapter and an SHC68 68 EPM cable Use Connector 0 of your M Series device to control SCXI Connector 1 cannot be used to control SCXI You also can use an M Series device to control the SCXI section of a PXI SCXI combination chassis such as the PXI 1010 or PXI 1011 The M Series device in the rightmost PXI slot controls the SCXI devices No cables or adapters are necessary Refer to the SCXT Advisor available by going to ni com info and entering the info code rdscad for more information SCC Accessories SCC provides portable modular signal conditioning to your DAQ system To connect your M Series device to an SCC module carrier such as the SC 2345 SC 2350 or SCC 68 use an SHC68 68 EPM shielded cable Use Connector 0 of your M Series device to control an SCC module carrier Connector 1 cannot be used with SCCs Refer to the SCC Advisor available by going
217. ces Figure 4 9 shows how to connect a floating signal source to the M Series device configured for RSE mode Al lt 0 n gt O D El 3 Programmable Gain i Instrumentation Floating n Signal Q l ee TI Amplifier Source o Input Multiplexers A u o Al SENSE m Voltage o jii GND 1 0 Connector Selected Channel in RSE Configuration Figure 4 9 RSE Connections for Floating Signal Sources Using the DAQ Assistant you can configure the channels for RSE or NRSE input modes Refer to the Configuring AI Ground Reference Settings in Software section for more information about the DAQ Assistant Mational Instruments Corporation 4 19 M Series User Manual Chapter 4 Analog Input Connecting Ground Referenced Signal Sources What Are Ground Referenced Signal Sources A ground referenced signal source is a signal source connected to the building system ground It is already connected to a common ground point with respect to the device assuming that the computer is plugged into the same power system as the source Non isolated outputs of instruments and devices that plug into the building power system fall into this category The difference in ground potential between two instruments connected to the same building power system is typically between 1 and 100 mV but the difference can be much higher if power distribution circuits are improperly connected If a
218. ch as the PXI 1010 or PXI 1011 The M Series device in the rightmost PXI slot controls the SCXI devices No cables or adapters are necessary Refer to the SCXT Advisor available by going to ni com info and entering the info code rdscad for more information SCC Accessories SCC provides portable modular signal conditioning to your DAQ system To connect your M Series device to an SCC module carrier such as the SC 2345 SC 2350 or SCC 68 use an SHC68 68 EPM shielded cable Refer to the SCC Advisor available by going to ni com info and entering the info code rdscav for more information BNC Accessories You can use the SHC68 68 EPM shielded cable to connect your DAQ device to BNC accessories such as the following e BNC 2110 Provides BNC connectivity to all analog signals some digital signals and spring terminals for other digital signals e BNC 2111 Provides BNC connectivity to 16 single ended analog input signals two analog output signals five DIO PFI signals and the external reference voltage for analog output BNC 2120 Similar to the BNC 2110 and also has a built in function generator quadrature encoder temperature reference and thermocouple connector e BNC 2090A Desktop rack mountable device with 22 BNCs for connecting analog digital and timing signals Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks Use an SHC68 68 EPM shielded cable t
219. ck with temperature sensor e TBX 68 DIN rail mountable connector block e TB 2706 front panel mounted terminal block for PXI M Series devices You can use one screw terminal accessory with the signals on either connector of your M Series device You can use two screw terminal accessories with one M Series device by using both connectors RTSI Cables Use RTSI bus cables to connect timing and synchronization signals among PCI devices such as M Series E Series CAN and other measurement vision and motion devices Since PXI devices use PXI backplane signals for timing and synchronization no cables are required TB 2706 uses Connector 0 of your PXI device After a TB 2706 is installed Connector 1 cannot be used National Instruments Corporation A 49 M Series User Manual Appendix Device Specific Information Cables In most applications you can use the following cables e SHC68 68 EPM High performance cable designed specifically for M Series devices It has individual bundles separating analog and digital signals Each differential analog input channel is routed on an individually shielded twisted pair of wires Analog outputs are also individually shielded e SHC68 68 Lower cost shielded cable with 34 twisted pairs of wire e RC68 68 Highly flexible unshielded ribbon cable Custom Cabling and Connectivity The CA 1000 is a configurable enclosure that gives user defined connectivity and flexibility through custo
220. clock with a 40 MHz frequency 3 Note NI DAQmx only supports filters on counter inputs The following is an example of low to high transitions of the input signal High to low transitions work similarly Assume that an input terminal has been low for a long time The input terminal then changes from low to high but glitches several times When the filter clock has sampled the signal high on N consecutive edges the low to high transition is propagated to the rest of the circuit The value of N depends on the filter setting refer to Table 9 2 Table 9 2 Filters N Filter Clocks Pulse Width Pulse Width Needed to Guaranteed to Guaranteed to Filter Setting Pass Signal Pass Filter Not Pass Filter 125 ns 5 125 ns 100 ns 6 425 us 257 6 425 us 6 400 us 2 56 ms 101 800 2 56 ms 2 54 ms Disabled National Instruments Corporation 9 7 M Series User Manual Chapter 9 Digital Routing and Clock Generation The filter setting for each input can be configured independently On power up the filters are disabled Figure 9 3 shows an example of a low to high transition on an input that has its filter set to 125 ns N 5 RTSI PFI or PXI_STAR Terminal Filter Clock 40 MHz Filtered Input Filtered input goes high when terminal 1 1 2 3 4 1 2 3 4 5 is sampled high on five consecutive f
221. counter as a Pause Trigger if it is not used as a Start Trigger The counter pauses pulse generation when the Pause Trigger is active Figure 7 25 shows a continuous pulse train generation using the rising edge of Source SOURCE UU UU OUT TL Counter Armed Figure 7 25 Continuous Pulse Train Generation Continuous pulse train generation is sometimes called frequency division If the high and low pulse widths of the output signal are M and N periods then the frequency of the Counter n Internal Output signal is equal to the frequency of the Source input divided by M N For information about connecting counter signals refer to the Default Counter Timer Pinouts section Finite Pulse Train Generation This function generates a train of pulses of predetermined duration This counter operation requires both counters The first counter for this example Counter 0 generates a pulse of desired width The second counter Counter 1 generates the pulse train which is gated by the pulse of the first counter The routing is done internally Figure 7 26 shows an example finite pulse train timing diagram Counter 0 Paired Counter Counter 1 Generation Complete Figure 7 26 Finite Pulse Train Timing Diagram 7 22 ni com Chapter 7 Counters Frequency Generation You can generate a frequency by using a counter in pulse train generation mode or by using
222. crewing and unscrewing of self threading screws will produce a compromised connection M Series User Manual 4 With a Phillips 2 screwdriver remove the Phillips 4 40 screw adjacent to the USB connector 5 Remove the nut from the power connector 6 Remove the four Phillips 4 40 screws that attach the top panel to the enclosure and remove the panel and connector unit 7 Replace the broken fuse while referring to Figure 3 6 for the fuse location 8 Replace the top panel screws nut and end pieces USB 622x 625x 628x Mass Termination Devices To replace a broken fuse in the USB 62xx Mass Termination complete the following steps 1 Power down and unplug the device 2 Remove the USB cable and signal cable s from the device 3 12 ni com Chapter 3 Connector and LED Information 3 Loosen the four Phillips screws that attach the lid to the enclosure and remove the lid 4 Replace the broken fuse while referring to Figure 3 7 for the fuse locations d M m Ch 1 ol Jo jo o i o o I o O o o Te Hint le SS 1 T 2A 250V 5 x 20 mm Fuse 2 Littelfuse 0453002 Fuse on USB 628x Devices Figure 3 7 USB 62xx Mass Termination Fuse Locations 5 Replace the lid and screws RTSI Connector Pinout Refer to the RTSI Connector Pinout section of Chapter 9 Digital Routing and Clock Gen
223. ction describes some cable and accessory options for M Series devices with two 68 pin connectors such as the USB 6259 Mass Termination device Refer to ni com for other accessory options including new devices National Instruments Corporation A 123 M Series User Manual Appendix Device Specific Information M Series User Manual SCC Accessories SCC provides portable modular signal conditioning to your DAQ system To connect your M Series device to an SCC module carrier such as the SC 2345 SC 2350 or SCC 68 use an SH68 68 EPM shielded cable Use Connector 0 of your M Series device to control an SCC module carrier SCC carriers can be used with Connector 1 with NI DAQ 7 4 and later Refer to the SCC Advisor available by going to ni com info and entering the info code rdscav for more information BNC Accessories You can use the SH68 68 EPM shielded cable to connect your DAQ device to BNC accessories such as the following e BNC 2110 Provides BNC connectivity to all analog signals some digital signals and spring terminals for other digital signals e BNC 2111 Provides BNC connectivity to 16 single ended analog input signals two analog output signals five DIO PFI signals and the external reference voltage for analog output e BNC 2120 Similar to the BNC 21 10 and also has a built in function generator quadrature encoder temperature reference and thermocouple connector e BNC 2090A Desktop rack mou
224. ctor M Series User Manual 4 34 ni com Chapter 4 Analog Input Al Hold Complete Event Signal The AI Hold Complete Event ai HoldCompleteEvent signal generates a pulse after each A D conversion begins You can route AI Hold Complete Event out to any PFI lt 0 15 gt or RTSI lt 0 7 gt terminal The polarity of AI Hold Complete Event is software selectable but is typically configured so that a low to high leading edge can clock external AI multiplexers indicating when the input signal has been sampled and can be removed Al Start Trigger Signal Use the AI Start Trigger ai StartTrigger signal to begin a measurement acquisition A measurement acquisition consists of one or more samples If you do not use triggers begin a measurement with a software command Once the acquisition begins configure the acquisition to stop e When a certain number of points are sampled in finite mode e After a hardware reference trigger in finite mode e With a software command in continuous mode An acquisition that uses a start trigger but not a reference trigger is sometimes referred to as a posttriggered acquisition Using a Digital Source To use AI Start Trigger with a digital source specify a source and an edge The source can be any of the following signals e PFI lt 0 15 gt e RTSI lt 0 7 gt e Counter n Internal Output e PXI STAR The source also can be one of several other internal signals on your DAQ device Refer to
225. ctor block with screw terminals general breadboard area bus terminals and four expansion slots for SCC signal conditioning modules e SCB 68 shielded connector block with temperature sensor make sure the switches are set properly e TBX 68 DIN rail mountable connector block e TB 2706 front panel mounted terminal block for PXI M Series devices You can use one screw terminal accessory with the signals on either connector of your PCI PXI 6225 device You can use two screw terminal accessories with one M Series device by using both connectors 3 RTSI Cables Use RTSI bus cables to connect timing and synchronization signals among PCI devices such as M Series E Series CAN and other measurement vision and motion devices Since PXI devices use PXI backplane signals for timing and synchronization no cables are required NI recommends that you use the SHC68 68 cable when the SCB 68 is connected to Connector 1 2 TB 2706 uses Connector 0 of your PXI device After a TB 2706 is installed Connector 1 cannot be used 3 The SCC 68 only can be used with Connector 0 M Series User Manual A 34 ni com Appendix Device Specific Information Cables The PCI PXI 6225 has two connectors that require different cables Choosing a Cable for Connector 0 In most applications you can use the following cables with Connector 0 e SHC68 68 EPM High performance cable designed specifically for M Series devices It has individual bundles
226. d time subtract the Gate delay from the Source delay Use minimum delays Gate Delay PFI to PFI_i 5 2 ns PFI_i to Selected Gate 1 0 ns Selected Gate to Count Enable Level 6 0 ns Count Enable Hold Time 0 0 ns 12 2 ns Source Delay PFI to PFI_i 6 2 ns PFI_i to Selected Source 8 0ns 14 2 ns Tyo gt 14 2 ns 12 2 ns 2 0 ns M Series User Manual B 42 Output Delays Appendix B Timing Diagrams Refer to the Figure B 41 for the M Series counter timer circuitry Figure B 50 and Table B 34 show the output delays Selected Source X to a Out_o gt ty i lt gt PFI RTSI Counter n Internal Out 7 1 rt i os PFI RTSI Counter n Source Selected Gate X Us lt gt PFI RTSI y Counter n Gate gt lt Figure B 50 Output Delays Table B 34 Output Delays Timing Time Line Min ns Max ns tio 1 0 4 0 ty PFI 7 5 28 2 RTSI 6 5 18 0 tio PFI 8 5 322 RTSI 7 5 22 0 t3 PFI 7 5 28 7 RTSI 6 5 18 0 National Instruments Corporation B 43 M Series User Manual Appendix B Timing Diagrams Gating Modes Gating mode refers to how the counter timer uses the Gate input Some timing operations depend on the gating mode Depending on the application the counter timers either level gating mode or edge gating mode In NI DAQmx the counter timers use level gating mode for the following measureme
227. ddition the wires in the shielded cable that extend beyond the shield should be as short as possible CHS GND O Figure 3 3 Grounding a USB 62xx BNC Device through the CHS GND Screw Terminal M Series User Manual 3 8 ni com Chapter 3 Connector and LED Information PCI Express Device Disk Drive Power Connector NI PCle 625x Devices The disk drive power connector is a four pin hard drive connector on PCI Express devices that when connected increases the current the device can supply on the 5 V terminal When to Use the Disk Drive Power Connector M Series PCI Express devices without the disk drive power connector installed perform identically to other M Series devices for most applications and with most accessories For most applications it is not necessary to install the disk drive power connector However you should install the disk drive power connector in either of the following situations e You need more power than listed in the device specifications e You are using an SCC accessory without an external power supply such as the SC 2345 Refer to the specifications document for your device for more information about PCI Express power requirements and power limits Disk Drive Power Connector Installation Before installing the disk drive power connector you must install and set up the M Series PCI Express device as described in the DAQ Getting Started Guide Complete the following s
228. de In above level analog triggering mode shown in Figure 11 4 the trigger is generated when the signal value is greater than Level Analog Comparison Event Figure 11 4 Above Level Analog Triggering Mode M Series User Manual 11 4 ni com Chapter 11 Triggering e Analog Edge Triggering with Hysteresis Hysteresis adds a programmable voltage region above or below the trigger level that an input signal must pass through before the DAQ device recognizes a trigger condition and is often used to reduce false triggering due to noise or jitter in the signal Analog Edge Trigger with Hysteresis Rising Slope When using hysteresis with a rising slope you specify a trigger level and amount of hysteresis The high threshold is the trigger level the low threshold is the trigger level minus the hysteresis For the trigger to assert the signal must first be below the low threshold then go above the high threshold The trigger stays asserted until the signal returns below the low threshold The output of the trigger detection circuitry is the internal Analog Comparison Event signal as shown in Figure 11 5 Then signal must go above high threshold before y Comparison Event asserts Bea Ne dN ro 7 77 lt High threshold Hysteresis i Level ALT TJ b f 4 Low threshold First signal must Ta Level Hysteresis below low threshold Analog Comparis
229. devices It has individual bundles separating analog and digital signals Each differential analog input channel is routed on an individually shielded twisted pair of wires Analog outputs are also individually shielded e SHC68 68 Lower cost shielded cable with 34 twisted pairs of wire e RC68 68 Highly flexible unshielded ribbon cable Custom Cabling and Connectivity The CA 1000 is a configurable enclosure that gives user defined connectivity and flexibility through customized panelettes Visit ni com for more information about the CA 1000 Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more information about custom cabling solutions NI recommends that you use the SHC68 68 EPM cable however an SHC68 68 EP cable will work with M Series devices National Instruments Corporation A 29 M Series User Manual Appendix Device Specific Information NI 6225 The following sections contain information about the PCI PXI 6225 USB 6225 Screw Terminal and USB 6225 Mass Termination devices PCI PXI 6225 PCI PXI 6225 Pinout Figure A 14 shows the pinout of the PCI PXI 6225 For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information YA Note M Series devices may be used with most E Series accessories However some E Series accessories use different terminal names Refer to the M Series and E Series Pinout Comparis
230. drive each of these terminals with one particular internal timing signal 2 CTR 0 OUT PFI 12 P2 4 GPCTRO_OUT M Series devices can drive each terminal with the same signal as on E Series devices On M Series devices you 40 CTR 1 OUT PFI 13 P2 5 also can route many other internal timing signals to each GPCTR1_OUT terminal 45 EXT STROBE PFI 10 P2 2 On M Series devices you also can use these terminals as additional PFI inputs to drive internal timing signals 46 AI HOLD COMP PFI 11 P2 3 SCANCLK On M Series devices you also can use these terminals as digital I O signals Also refer to Chapter 8 PFI 3 PFI 9 CTR 0 GATE PFI 9 P2 1 As a PFI input the functionality of E Series and GPCTRO_GATE M Series devices is similar for these terminals 5 PFI 6 AO START PFI 6 P1 6 E Series devices can drive each of these terminals with TRIG WFTRIG one particular internal timing signal 6 PFI 5 AO SAMP CLK PFI 5 P1 5 M Series devices can drive each terminal with the same UPDATE signal as on E Series devices On M Series devices you also can route many other internal timing signals to each 10 PFI 1 AI REF TRIG PFI 1 P1 1 terminal TRIG2 On M Series devices you also can use these terminals as 37 PFI 8 CTR 0 SRC PFI 8 P2 0 digital I O signals GPCTRO_SOURCE 3 Also refer to Chapter 8 PFI 38 PFI 7 AI SAMP CLK PFI 7 P1 7 STARTSCAN 41 PFI 4 CTR 1 GATE PFI 4 P1 4 GPCTR1_GATE 42 PFI 3 CTR 1 SRC PFI 3 P1 3 GPCTR1_SOURCE 43 PFI 2 AI CONV CLK PFI
231. ds have a multiplexer on the input which permits the selection of one of many channels at a time A switching device with multiple inputs that sequentially connects each of its inputs to its output typically at high speeds in order to measure several signals with a single analog input channel National Instruments The driver software needed to use National Instruments DAQ devices and SCXI components Some devices use Traditional NI DAQ Legacy others use NI DAQmx G 12 ni com NI DAQmx NI PGIA non referenced signal sources NRSE 0 offset P PCI PCI Express PCIe Glossary The latest NI DAQ driver with new VIs functions and development tools for controlling measurement devices The advantages of NI DAQmx over earlier versions of NI DAQ include the DAQ Assistant for configuring channels and measurement tasks for your device for use in LabVIEW LabWindows CVI and Measurement Studio increased performance such as faster single point analog I O and a simpler API for creating DAQ applications using fewer functions and VIs than earlier versions of NI DAQ See instrumentation amplifier Signal sources with voltage signals that are not connected to an absolute reference or system ground Also called floating signal sources Some common example of non referenced signal sources are batteries transformers or thermocouples Non Referenced Single Ended mode All measurements are made with respect to a common
232. dware signal Software calls this hardware signal the Arm Start Trigger Internally software routes the Arm Start Trigger to the Counter n HW Arm input of the counter For counter output operations you can use it in addition to the start and pause triggers For counter input operations you can use the arm start trigger to have start trigger like behavior The arm start trigger can be used for synchronizing multiple counter input and output tasks When using an arm start trigger the arm start trigger source is routed to the Counter n HW Arm signal 7 31 M Series User Manual Chapter 7 Counters e Start Trigger For counter output operations a start trigger can be configured to begin a finite or continuous pulse generation Once a continuous generation has triggered the pulses continue to generate until you stop the operation in software For finite generations the specified number of pulses is generated and the generation stops unless you use the retriggerable attribute When you use this attribute subsequent start triggers cause the generation to restart When using a start trigger the start trigger source is routed to the Counter n Gate signal input of the counter Counter input operations can use the arm start trigger to have start trigger like behavior e Pause Trigger You can use pause triggers in edge counting and continuous pulse generation applications For edge counting acquisitions the counter stops counting edges
233. e 80 MHz RTSI lt 0 7 gt PXI_CLK10 PXI_STAR Onboard Oscillator i 10 MHz RefClk To RTSI lt 0 7 gt Output Selectors 80 MHz Timebase 8 o External Reference Clock PLL 4 200 20 MHz Timebase 100 kHz Timebase National Instruments Corporation Figure 9 1 M Series Clock Routing Circuitry M Series User Manual Chapter 9 Digital Routing and Clock Generation 80 MHz Timebase 20 MHz Timebase 100 kHz Timebase The 80 MHz Timebase can be used as the Source input to the 32 bit general purpose counter timers The 80 MHz Timebase is generated from the following sources e Onboard oscillator e External signal by using the external reference clock The 20 MHz Timebase normally generates many of the AI and AO timing signals The 20 MHz Timebase also can be used as the Source input to the 32 bit general purpose counter timers The 20 MHz Timebase is generated by dividing down the 80 MHz Timebase The 100 kHz Timebase can be used to generate many of the AI and AO timing signals The 100 kHz Timebase also can be used as the Source input to the 32 bit general purpose counter timers The 100 kHz Timebase is generated by dividing down the 20 MHz Timebase by 200 External Reference Clock M Series User Manual The external reference clock can be used as a source for the internal timebases 80 MHz T
234. e Refer to ni com for other accessory options including new devices A 160 ni com Appendix Device Specific Information SCC Accessories SCC provides portable modular signal conditioning to your DAQ system To connect your M Series device to an SCC module carrier such as the SC 2345 SC 2350 or SCC 68 use an SH68 68 EPM shielded cable Use Connector 0 of your M Series device to control an SCC module carrier SCC carriers can be used with Connector 1 with NI DAQ 7 4 and later Refer to the SCC Advisor available by going to ni com info and entering the info code rdscav for more information BNC Accessories You can use the SH68 68 EPM shielded cable to connect your DAQ device to BNC accessories such as the following e BNC 2110 Provides BNC connectivity to all analog signals some digital signals and spring terminals for other digital signals e BNC 2111 Provides BNC connectivity to 16 single ended analog input signals two analog output signals five DIO PFI signals and the external reference voltage for analog output BNC 2120 Similar to the BNC 2110 and also has a built in function generator quadrature encoder temperature reference and thermocouple connector BNC 2090A Desktop rack mountable device with 22 BNCs for connecting analog digital and timing signals You can use one BNC accessory with the signals on either connector of your M Series device You can use two BNC accessories
235. e line to AI GND through a resistor that is about 100 times the equivalent source impedance The resistor puts the signal path nearly in balance so that about the same amount of noise couples onto both connections yielding better rejection of electrostatically coupled noise This configuration does not load down the source other than the very high input impedance of the NI PGIA M Series Device o Al Floating F Signal V Source o Al R is about R ae 100 times o AL SENSE source o AI GND impedance of sensor Figure 4 5 Differential Connections for Floating Signal Sources with Single Bias Resistor 4 16 ni com Chapter 4 Analog Input You can fully balance the signal path by connecting another resistor of the same value between the positive input and AI GND as shown in Figure 4 6 This fully balanced configuration offers slightly better noise rejection but has the disadvantage of loading the source down with the series combination sum of the two resistors If for example the source impedance is 2 kQ and each of the two resistors is 100 kQ the resistors load down the source with 200 KQ and produce a 1 gain error LL Al e o O D Bias Resistors o So lt text see text of 2 nu A Instrumentation igna s Amplifier Source ol So aa Al t Lo a Measured Voltage ot so ra Bias Current ol S o Ret
236. e 4 12 summarizes all of the timing options provided by the analog input timing engine Also refer to the Clock Routing section of Chapter 9 Digital Routing and Clock Generation PFI RTSI PXI_STAR PFI RTSI Analog Comparison Event Seale Cock PXI STAR Ctr n Internal Output ECE i Al Sample Clock SW Pulse Analog Comparison Timebase Programmable Event Clock 20 MHz Timebase Divider 100 kHz Timebase PFI RTSI PXI_CLK10 PXI_STAR Analog Comparison Event Al Convert Clock e Ctr n Internal Output Al Convert Clock Timebase Programmable e Clock Divider Figure 4 12 Analog Input Timing Options National Instruments Corporation 4 25 M Series User Manual Chapter 4 Analog Input M Series devices use AI Sample Clock ai SampleClock and AI Convert Clock ai ConvertClock to perform interval sampling As Figure 4 13 shows AI Sample Clock ai SampleClock controls the sample period which is determined by the following equation 1 Sample Period Sample Rate Channel 0 Channel 1 Sample Period gt 7 lt Convert Period Figure 4 13 Interval Sampling AI Convert Clock controls the Convert Period which is determined by the following equation 1 Convert Period Convert Rate Typically this rate is the sampling rate for the task multiplied by the number of channels in the task 3 N
237. e KnowledgeBase product manuals step by step troubleshooting wizards thousands of example programs tutorials application notes instrument drivers and so on Registered users also receive access to the NI Discussion Forums at ni com forums NI Applications Engineers make sure every question submitted online receives an answer Standard Service Program Membership This program entitles members to direct access to NI Applications Engineers via phone and email for one to one technical support as well as exclusive access to on demand training modules via the Services Resource Center NI offers complementary membership for a full year after purchase after which you may renew to continue your benefits For information about other technical support options in your area visit ni com services or contact your local office at ni com contact Training and Certification Visit ni com training for self paced training eLearning virtual classrooms interactive CDs and Certification program information You also can register for instructor led hands on courses at locations around the world System Integration If you have time constraints limited in house technical resources or other project challenges National Instruments Alliance Partner members can help To learn more call your local NI office or visit ni com alliance E 1 M Series User Manual Appendix E Technical Support and Professional Services Declaration of Conformity
238. e appears on the Counter n Internal Output signal of the counter You can route the Start Trigger signal to the Gate input of the counter You can specify a delay from the Start Trigger to the beginning of the pulse You also can specify the pulse width The delay and pulse width are measured in terms of a number of active edges of the Source input After the Start Trigger signal pulses once the counter ignores the Gate input Figure 7 23 shows a generation of a pulse with a pulse delay of four and a pulse width of three using the rising edge of Source GATE H Start Trigger l source _ LIITU LT OUT Figure 7 23 Single Pulse Generation with Start Trigger Retriggerable Single Pulse Generation The counter can output a single pulse in response to each pulse on a hardware Start Trigger signal The pulses appear on the Counter n Internal Output signal of the counter 7 20 ni com Chapter 7 Counters You can route the Start Trigger signal to the Gate input of the counter You can specify a delay from the Start Trigger to the beginning of each pulse You also can specify the pulse width The delay and pulse width are measured in terms of a number of active edges of the Source input The counter ignores the Gate input while a pulse generation is in progress After the pulse generation is finished the counter waits for another Start Trigger signal to begin another pulse generati
239. e cece ceeeeeeeeeseeeeseeseeeaeeseeeaeeseees 6 4 Using an External Source iieu a o n 6 5 Routing DI Sample Clock to an Output Terminal 6 5 Digital Waveform Generation 6 5 DO Sample Clock Signal 6 5 Using an Internal Source wo eee cece cee eeeeeeeseeeeseeeeeseeseeeseeseees 6 6 Using an External Source esessseeseeseeseserserereeesrsessresreresesresessenseresss 6 6 Routing DO Sample Clock to an Output Terminal ee 6 7 L O Prot cton ts Aas ee AS ea Metab eh HR taal 6 7 Programmable Power Up States 6 7 DI Change D tection intense tre te num sn tn entente A oct 6 8 DI Change Detection Applications ss 6 9 Connecting Digital I O Signals ss 6 9 Getting Started with DIO Applications in Software 6 10 M Series User Manual viii ni com Contents Chapter 7 Counters Counter Input Appl ations ftinisensnissnennsn tenant Nine is 7 2 Counting Edges 5 228 lies nn RE E nn dents te 7 2 Single Point On Demand Edge Counting 0 eect 7 2 Buffered Sample Clock Edge Counting 0 eee eee eset eeees 7 3 Controlling the Direction of Counting 0 0 0 eee ee eee eee teeeeeeteees 7 4 Pulse Width Measurement ea a 7 4 Single Pulse Width Measurement 7 4 Buffered Pulse Width Measurement 7 5 Period Measurement 38e im ele Ne Sr nt en tees 7 6 Single Period Measurement 7 6 Buffered Period Measurement
240. e impact on your measurements you can perform software calibration on the analog trigger circuitry by configuring your task as normal and applying a known signal for your analog trigger Comparing the observed results against the expected results you can calculate the necessary offsets to apply in software to fine tune the desired triggering behavior 11 7 M Series User Manual Device Specific Information This appendix contains device pinouts specifications cable and accessory choices and other information for the following M Series devices NI 6220 NI 6221 NI 6224 NI 6225 NI 6229 NI 6250 NI 6251 NI 6254 NI 6255 NI 6259 NI 6280 NI 6281 NI 6284 NI 6289 To obtain documentation for devices not listed here refer to ni com manuals National Instruments Corporation A 1 M Series User Manual Appendix Device Specific Information NI 6220 PCI PXI 6220 Pinout Figure A 1 shows the pinout of the PCI PXI 6220 For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information ay Note M Series devices may be used with most E Series accessories However some E Series accessories use different terminal names Refer to the M Series and E Series Pinout Comparison section of Chapter 3 Connector and LED Information for more information M Series User Manual A 2 ni com Appendix Device Specific Information AIO Al GND
241. e switches are set properly e TBX 68 DIN rail mountable connector block You can use one screw terminal accessory with the signals on either connector of your USB 6225 Mass Termination device You can use two screw terminal accessories with one M Series device by using both connectors Cables Choosing a Cable for Connector 0 In most applications you can use the following cables with Connector 0 e SH68 68 EPM High performance cable with individual bundles separating analog and digital signals Each differential analog input channel is routed on an individually shielded twisted pair of wires Analog outputs are also individually shielded e R68 68 Highly flexible unshielded ribbon cable Choosing a Cable for Connector 1 In most applications you can use the following cables with Connector 1 e SH68 68 S Shielded cable with 34 twisted pairs of wire Each differential analog input channel on Connector 1 is routed on a twisted pair on the SH68 68 S cable e R68 68 Highly flexible unshielded ribbon cable 1 NI recommends that you use the SH68 68 S cable when the SCB 68 is connected to Connector 1 2 The SCC 68 only can be used with Connector 0 3 NI recommends that you use the SH68 68 EPM cable however an SH68 68 EP cable will work with M Series devices National Instruments Corporation A 43 M Series User Manual Appendix Device Specific Information Custom Cabling and Connectivity The CA 1000 is a configur
242. ebases synchronous to the external reference clock On PXI systems you also can synchronize devices to PXI_CLK10 In this application the PXI chassis acts as the initiator Each PXI module routes PXI_CLK10 to its external reference clock Another option in PXI systems is to use PXI_STAR The Star Trigger controller device acts as the initiator and drives PXI_STAR with a clock signal Each target device routes PXI_STAR to its external reference clock Once all of the devices are using or referencing a common timebase you can synchronize operations across them by sending a common start trigger out across the RTSI bus and setting their sample clock rates to the same value National Instruments Corporation 9 3 M Series User Manual Chapter 9 Digital Routing and Clock Generation Real Time System Integration RTSI Real Time System Integration RTS is a set of bused signals among devices that allows you to do the following e Use a common clock or timebase to drive the timing engine on multiple devices e Share trigger signals between devices Many National Instruments DAQ motion vision and CAN devices support RTSI nye Note RTSI is not supported on USB devices In a PCI PCI Express system the RTSI bus consists of the RTSI bus interface and a ribbon cable The bus can route timing and trigger signals between several functions on as many as five DAQ vision motion or CAN devices in the computer In a PXI PXI Express
243. ed as the external reference input for the AO circuitry the external offset for the AO circuitry or the analog trigger input These functions are not available on all devices Refer to the specifications for your device Note that this terminal is a no connect on some E Series and M Series devices 39 D GND PFI 15 P2 7 On E Series devices this is one of the D GND terminals On M Series devices this is the PFI 15 P2 7 terminal In NI DAQmx National Instruments has revised terminal names so they are easier to understand and more consistent among National Instruments hardware and software products This column shows the NI DAQmx terminal names Traditional NI DAQ Legacy terminal names are shown in parentheses Refer to Appendix D Upgrading from E Series to M Series for more information about the differences between these two device families National Instruments Corporation 3 5 M Series User Manual Chapter 3 Connector and LED Information 5 V Power Source The 5 V terminals on the I O connector supply 5 V referenced to D GND Use these terminals to power external circuitry Newer revision M Series devices have a traditional fuse to protect the supply from overcurrent conditions This fuse is not customer replaceable if the fuse permanently opens return the device to NI for repair Older revision M Series devices have a self resetting fuse to protect the supply from overcurrent conditions This f
244. eference point or return signal e The signal leads travel through noisy environments e Two analog input channels AI and AI are available for the signal DIFF signal connections reduce noise pickup and increase common mode noise rejection DIFF signal connections also allow input signals to float within the common mode limits of the NI PGIA Refer to the Using Differential Connections for Floating Signal Sources section for more information about differential connections When to Use Non Referenced Single Ended NRSE Connections with Floating Signal Sources Only use NRSE input connections if the input signal meets the following conditions e The input signal is high level greater than 1 V e The leads connecting the signal to the device are less than 3 m 10 ft DIFF input connections are recommended for greater signal integrity for any input signal that does not meet the preceding conditions National Instruments Corporation 4 13 M Series User Manual Chapter 4 Analog Input In the single ended modes more electrostatic and magnetic noise couples into the signal connections than in DIFF configurations The coupling is the result of differences in the signal path Magnetic coupling is proportional to the area between the two signal conductors Electrical coupling is a function of how much the electric field differs between the two conductors With this type of connection the NI PGIA rejects both the common mode noise
245. egins the DAQ device writes samples to the buffer After the DAQ device captures the specified number of pretrigger samples the DAQ device begins to look for the reference trigger condition If the reference trigger condition occurs before the DAQ device captures the specified number of pretrigger samples the DAQ device ignores the condition If the buffer becomes full the DAQ device continuously discards the oldest samples in the buffer to make space for the next sample This data can be accessed with some limitations before the DAQ device discards it Refer to the KnowledgeBase document Can a Pretriggered Acquisition be Continuous for more information To access this KnowledgeBase go to ni com info and enter the info code rdcanq M Series User Manual 4 36 ni com Chapter 4 Analog Input When the reference trigger occurs the DAQ device continues to write samples to the buffer until the buffer contains the number of posttrigger samples desired Figure 4 23 shows the final buffer Reference Trigger Pretrigger Samples l Complete Buffer Figure 4 23 Reference Trigger Final Buffer Using a Digital Source To use AI Reference Trigger with a digital source specify a source and an edge The source can be any of the following signals e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXI STAR The source also can be one of several internal signals on your DAQ device Refer to Device Routing in MAX in
246. el could be missed The other channels also could generate false triggers This behavior places some restrictions on using AI channels as trigger sources When you use an analog start trigger the trigger channel must be the first channel in the channel list When you use an analog reference or pause trigger and the analog channel is the source of the trigger there can be only one channel in the channel list Analog Trigger Actions The output of the analog trigger detection circuit is the Analog Comparison Event signal You can program your DAQ device to perform an action in response to the Analog Comparison Event signal The action can affect the following e Analog input acquisition e Analog output generation e Counter behavior Routing Analog Comparison Event to an Output Terminal You can route Analog Comparison Event out to any PFI lt 0 15 gt or RTSI lt 0 7 gt terminal National Instruments Corporation 11 3 M Series User Manual Chapter 11 Triggering Analog Trigger Types Configure the analog trigger circuitry to different triggering modes e Analog Edge Triggering Configure the analog trigger circuitry to detect when the analog signal is below or above a level you specify In below level analog triggering mode shown in Figure 11 3 the trigger is generated when the signal value is less than Level Analog Comparison Event Figure 11 3 Below Level Analog Triggering Mo
247. elected in a multiplexer those capacitors accumulate charge When the next channel for example channel 1 is selected the accumulated charge leaks backward through channel 1 If the output impedance of the source connected to channel 1 is high enough the resulting reading of channel 1 can be partially affected by the voltage on channel 0 This effect is referred to as ghosting If your source impedance is high you can decrease the scan rate to allow the NI PGIA more time to settle Another option is to use a voltage follower circuit external to your DAQ device to decrease the impedance seen by the DAQ device Refer to the KnowledgeBase document Decreasing the Source Impedance of an Analog Input Signal by going to ni com info and entering the info code rdbbis 2 Use Short High Quality Cabling Using short high quality cables can minimize several effects that degrade accuracy including crosstalk National Instruments Corporation 4 7 M Series User Manual Chapter 4 Analog Input M Series User Manual transmission line effects and noise The capacitance of the cable also can increase the settling time National Instruments recommends using individually shielded twisted pair wires that are 2 m or less to connect AI signals to the device Refer to the Connecting Analog Input Signals section for more information Carefully Choose the Channel Scanning Order Avoid Switching from a Large to a Small Input Range Switching from a ch
248. ement Studio Help For general help with programming in Measurement Studio refer to the NJ Measurement Studio Help which is fully integrated with the Microsoft Visual Studio NET help To view this help file in Visual Studio NET select Measurement Studio NI Measurement Studio Help To create an application in Visual C Visual C or Visual Basic NET follow these general steps 1 In Visual Studio NET select File gt New Project to launch the New Project dialog box 2 Find the Measurement Studio folder for the language you want to create a program in 3 Choose a project type You add DAQ tasks as a part of this step ANSI C without NI Application Software The NI DAQmx Help contains API overviews and general information about measurement concepts Select Start All Programs National Instruments NI DAQ NI DAQmx Help The NI DAQmx C Reference Help describes the NI DAQmx Library functions which you can use with National Instruments data acquisition devices to develop instrumentation acquisition and control applications Select Start All Programs National Instruments NI DAQ NI DAQm x C Reference Help NET Languages without NI Application Software With the Microsoft NET Framework version 1 1 or later you can use NI DAQmx to create applications using Visual C and Visual Basic NET without Measurement Studio You need Microsoft Visual Studio NET 2003 or Microsoft Visual Studio 2005 for the API documentation
249. ent Single semi period measurement is equivalent to single pulse width measurement Buffered Semi Period Measurement In buffered semi period measurement on each edge of the Gate signal the counter stores the count in a hardware save register A DMA controller transfers the stored values to host memory The counter begins counting when it is armed The arm usually occurs between edges on the Gate input So the first value stored in the hardware save register does not reflect a full semi period of the Gate input In most applications this first point should be discarded Figure 7 9 shows an example of a buffered semi period measurement Counter Armed GATE source LAL ALALELELELALALS Counter Value O 1 2 1 2 3 1 1 2 1 i 2 2 4 2 2 Buffer s 383 BI 26 i 1 1 2 Figure 7 9 Buffered Semi Period Measurement 7 8 ni com Chapter 7 Counters Note that if you are using an external signal as the Source at least one Source pulse should occur between each active edge of the Gate signal This condition ensures that correct values are returned by the counter If this condition is not met consider using duplicate count prevention described in the Duplicate Count Prevention section For information about connecting counter signals refer to the Default Counter Timer Pinouts section Frequency Measurement You can u
250. ent through the 5 V terminal s USB 622x 625x 628x Screw Terminal Devices To replace a broken fuse in the USB 62xx Screw Terminal complete the following steps 1 Power down and unplug the device 2 Remove the USB cable and all signal wires from the device M Series User Manual 3 10 ni com Chapter 3 Connector and LED Information 3 Loosen the four Phillips screws that attach the back lid to the enclosure and remove the lid 4 Replace the broken fuse while referring to Figure 3 5 for the fuse locations 1 T 2A 250V 5 x 20 mm Fuse 2 Littelfuse 0453002 Fuse on USB 628x Devices Figure 3 5 USB 62xx Screw Terminal Fuse Locations 5 Replace the lid and screws USB 622x 625x BNC Devices To replace a broken fuse in the USB 62xx BNC complete the following steps 1 Power down and unplug the device 3 Note Take proper ESD precautions when handling the device 2 Remove the USB cable and all BNC cables and signal wires from the device National Instruments Corporation 3 11 M Series User Manual Chapter 3 Connector and LED Information 1 T 2A 250V 5 x 20 mm Fuse Figure 3 6 USB 62xx BNC Fuse Location 3 Remove both end pieces by unscrewing the four sockethead cap screws with a 7 64 in hex wrench B Note The end pieces are attached using self threading screws Repeated s
251. enuates signals with frequencies above the cutoff frequency while passing with minimal attenuation signals below the cutoff frequency The cutoff frequency is defined as the frequency at which the output amplitude has decreased by 3 dB Lowpass filters attenuate noise and reduce aliasing of signals beyond the Nyquist frequency For example if the signal of interest does not have frequency components beyond 40 kHz then using a filter with a cutoff frequency at 40 kHz attenuates noise beyond the cutoff that is not of interest The cutoff frequency of the lowpass filter is also called the small signal bandwidth The specifications document for your DAQ device lists the small signal bandwidth On some devices the filter cutoff is fixed On other devices this filter is programmable and can be enabled for a lower frequency For example the NI 628x devices have a programmable filter with a cutoff frequency of 40 kHz that can be enabled If the programmable filter is not enabled the cutoff frequency is fixed at 750 kHz If the cutoff is programmable choose the lower cutoff to reduce measurement noise However a filter with a lower cutoff frequency increases the settling time of your device as shown in the specifications which reduces its maximum conversion rate Therefore you may have to reduce the rate of your AI Convert and AI Sample Clocks If that reduced sample rate is too slow for your application select the higher cutoff frequency Add
252. eping of the machine which is independent of any specific application Operating system functions include the saving of data file system handling of multiple programs at the same time multi tasking network interconnection printing and keyboard user interface interaction A method of triggering in which you simulate an analog trigger using software Also called conditional retrieval A parameter of signal sources that reflects current driving ability of voltage sources lower is better and the voltage driving ability of current sources higher is better 1 Hardware A property of an event that is synchronized to a reference clock 2 Software A property of a function that begins an operation and returns only when the operation is complete A synchronous process is therefore locked and no other processes can run during this time In NI DAQmx a collection of one or more channels timing and triggering and other properties that apply to the task itself Conceptually a task represents a measurement or generation you want to perform See terminal count M Series User Manual Glossary terminal terminal count tgh gsu t gw Timebase t out Traditional NI DAQ Legacy transducer trigger M Series User Manual An object or region on a node through which data passes The highest value of a counter Gate hold time Gate setup time Gate pulse width The reference signals for controlling
253. er Manual Contents Chapter 3 Connector and LED Information T O Connector Signal Descriptions 3 1 M Series and E Series Pinout Comparison 3 4 I V Power SOULCO sr inner stone seve cated re nn nine en in int 3 6 USB Chassis Grounds 8 cs ees men mn no Len NE et A hr 3 7 PCI Express Device Disk Drive Power Connector ss 3 9 When to Use the Disk Drive Power Connector ceeecceseeeeeeeeteeeeneeeaeeeaes 3 9 Disk Drive Power Connector Installation 3 9 USB Device Fuse Replacement ss sum men i eKA RR E E 3 10 RTSL Connector Pmouts intimement nant Rs terres 3 13 TEED Patterns sie ia na seine ni rl A red sr SE 3 14 Chapter 4 Analog Input Analog Input Ran ge naeron orn aaa E ee lands ae te NS 4 2 Analog Input Lowpass Filter icc Les redire den naar 4 4 Analog Input Ground Reference Settings ss 4 4 Configuring AI Ground Reference Settings in Software 4 6 Multichannel Scanning Considerations 0 0 cess eseeeeeeseeeseeeceeeeseesseeseeeeeseeeeeeneesees 4 7 Analog Input Data Acquisition Methods 4 10 Analog Input Triggering irene heie Eea rimes 4 11 Connecting Analog Input Signals ss 4 11 Connecting Floating Signal Sources sss 4 13 What Are Floating Signal Sources oo eee eeceeseeeseeseceeeeeeeseceenseeseseaeesees 4 13 When to Use Differential Connect
254. er is downloaded to the FIFO and regenerated from there Once the data is downloaded new data cannot be written to the FIFO To use FIFO regeneration the entire buffer must fit within the FIFO size The advantage of using FIFO regeneration is that it does not require communication with the main host memory once the operation is started thereby preventing any problems that may occur due to excessive bus traffic With non regeneration old data is not repeated New data must be continually written to the buffer If the program does not write new data to the buffer at a fast enough rate to keep up with the generation the buffer underflows and causes an error Analog Output Triggering Analog output supports two different triggering actions e Start trigger e Pause trigger An analog or digital trigger can initiate these actions All M Series devices support digital triggering but some do not support analog triggering To find your device s triggering options refer to the specifications document for your device Refer to the AO Start Trigger Signal and AO Pause Trigger Signal sections for more information about these triggering actions National Instruments Corporation 5 5 M Series User Manual Chapter 5 Analog Output Connecting Analog Output Signals AO lt 0 3 gt are the voltage output signals for AO channels 0 1 2 and 3 AO GND is the ground reference for AO lt 0 3 gt Figure 5 2 shows how to make AO connection
255. eration for information about the RTSI connector National Instruments Corporation 3 13 M Series User Manual Chapter 3 Connector and LED Information LED Patterns USB 622x 625x 628x Devices All variants of M Series USB devices have LEDs labeled ACTIVE and READY The ACTIVE LED indicates activity over the bus The READY LED indicates whether or not the device is configured Table 3 3 shows the behavior of the LEDs 3 Note USB 62xx BNC devices also have a POWER 5 V LED on the top panel The POWER 5 V LED indicates device power Table 3 3 LED Patterns POWER 5 V ACTIVE READY LED LED LED USB Device State Off Off Off The device is not powered On Off Off The device is powered but not connected to the host computer On Off On The device is configured but there is no activity over the bus On On On The device is configured and there is activity over the bus On Blinking On The POWER 5 V LED is available on USB 62xx BNC devices only M Series User Manual ni com Analog Input Figure 4 1 shows the analog input circuitry of M Series devices L Al lt 0 n gt 2 O 2 DIFF RSE Al Lowpass Cc 5 or NRSE Filter ADC Al FIFO Al Data AI SENSE Input Range AI GND Selection VA Al Terminal Configuration Selection Figure 4 1 M Series Analog Input Circuitry The main blocks
256. erence voltage for analog output National Instruments Corporation A 87 M Series User Manual Appendix Device Specific Information e BNC 2120 Similar to the BNC 21 10 and also has a built in function generator quadrature encoder temperature reference and thermocouple connector e BNC 2090A Desktop rack mountable device with 22 BNCs for connecting analog digital and timing signals You can use one BNC accessory with the signals on either connector of your M Series device You can use two BNC accessories with one M Series device by using both connectors Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks Use an SHC68 68 EPM shielded cable to connect an M Series device to a connector block such as the following e CB 68LP and CB 68LPR unshielded connector blocks e SCC 68 I O connector block with screw terminals general breadboard area bus terminals and four expansion slots for SCC signal conditioning modules e SCB 68 shielded connector block with temperature sensor e TBX 68 DIN rail mountable connector block e TB 2706 front panel mounted terminal block for PXI M Series devices You can use one screw terminal accessory with the signals on either connector of your M Series device You can use two screw terminal accessories with one M Series device by using both connectors RTSI Cables Use RTSI bus cables to connect timing and synchronization signals amo
257. eries devices can scan multiple channels at high rates and digitize the signals accurately However you should consider several issues when designing your measurement system to ensure the high accuracy of your measurements In multichannel scanning applications accuracy is affected by settling time When your M Series device switches from one AI channel to another AI channel the device configures the NI PGIA with the input range of the new channel The NI PGIA then amplifies the input signal with the gain for the new input range Settling time refers to the time it takes the NI PGIA to amplify the input signal to the desired accuracy before it is sampled by the ADC The specifications document for your DAQ device lists its settling time M Series devices are designed to have fast settling times However several factors can increase the settling time which decreases the accuracy of your measurements To ensure fast settling times you should do the following in order of importance 1 Use Low Impedance Sources To ensure fast settling times your signal sources should have an impedance of lt 1 kQ Large source impedances increase the settling time of the NI PGIA and so decrease the accuracy at fast scanning rates Settling times increase when scanning high impedance signals due to a phenomenon called charge injection Multiplexers contain switches usually made of switched capacitors When one of the channels for example channel 0 is s
258. erminal A 16 ni com Appendix A Device Specific Information USB 6221 BNC USB 6221 BNC Pinout Figure A 5 shows the pinout of the USB 6221 BNC For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information DIGITAL ANDTIMING 1 0 POWER 5 V NI USB 6221 PFI 0 P1 0 PFI 1 P1 1 PFI 2 P1 2 PFI 3 P1 3 8 Inputs 16 bit 250 kS s O Multifunction 1 0 with Correlated Digital 1 0 for USB DIGITAL AND TIMING 1 0 O PFI 4 P1 4 PFI 5 P1 5 PFI 6 P1 6 PFI 7 P1 7 USER 1 USER 2 ds A DS users 5 E v 2 ANALOG OUTPUT A00 A01 ANALOG INPUT PFI 9 P2 1 PFI 10 P2 2 PFI 11 P2 3 D GND PFI 12 P2 4 PFI 13 P2 5 PFI 14 P2 6 PFI 15 P2 7 D GND Floating Source FS Ground Ref Source GS Al 1 Al 1 D GND Al Al AI GND 1 1 F1 i 1 AI GND 1 i 1 AI SENSE 1 1 1 1 1 _ NI62211 1_ _ NI6221 NG CHS GND RE GE A CE EE NV NATIONAL D INSTRUMENTS Figure A 5 USB 6221 BNC Top Panel and Pinout National Instruments Corporation A 17 M Series User Manual Appendix Device Specific Information Table A 5 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Name CTR 0 SRC PFI 8 CTR 0 GATE PFI 9 CTR 0 AUX PFI 10 CTR 0 OUT PFI 12 CTR 0 A PFI 8 CTROZ PFI 9 CTROB PFI 10 CTR 1 SRC
259. erminals and four expansion slots for SCC signal conditioning modules e SCB 68 shielded connector block with temperature sensor e TBX 68 DIN rail mountable connector block M Series User Manual A 82 ni com Appendix Device Specific Information Cables In most applications you can use the following cables e SH68 68 EPM High performance cable with individual bundles separating analog and digital signals Each differential analog input channel is routed on an individually shielded twisted pair of wires Analog outputs are also individually shielded e R68 68 Highly flexible unshielded ribbon cable Custom Cabling and Connectivity The CA 1000 is a configurable enclosure that gives user defined connectivity and flexibility through customized panelettes Visit ni com for more information about the CA 1000 Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more information about custom cabling solutions USB 6251 Mass Termination LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6251 Mass Termination LEDs USB 6251 Mass Termination Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 3 Connector and LED Information for information about replacing the fuse on the USB 6251 Mass Termination NI recommends that you use the SH68 68 EPM cable however an SH68 68 EP cable will work with M Series dev
260. ers Frequency Output can be routed out to any PFI lt 0 15 gt or RTSI lt 0 7 gt terminal All PFI terminals are set to high impedance at startup The FREQ OUT signal also can be routed to DO Sample Clock and DI Sample Clock In software program the frequency generator as you would program one of the counters for pulse train generation For information about connecting counter signals refer to the Default Counter Timer Pinouts section Frequency Division The counters can generate a signal with a frequency that is a fraction of an input signal This function is equivalent to continuous pulse train generation Refer to the Continuous Pulse Train Generation section for detailed information For information about connecting counter signals refer to the Default Counter Timer Pinouts section Pulse Generation for ETS M Series User Manual In the equivalent time sampling ETS application the counter produces a pulse on the output a specified delay after an active edge on Gate After each active edge on Gate the counter cumulatively increments the delay between the Gate and the pulse on the output by a specified amount Thus the delay between the Gate and the pulse produced successively increases The increase in the delay value can be between 0 and 255 For instance if you specify the increment to be 10 the delay between the active Gate edge and the pulse on the output increases by 10 every time a new pulse is generated Su
261. es User Manual Appendix Device Specific Information Table A 18 Default NI DAQmx Counter Timer Pins Default Connector 0 Pin Number Counter Timer Signal Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 PFI 10 CTR 0 OUT 2 PFI 12 CTROA 37 PFI 8 CTROZ 3 PFI 9 CTROB 45 PFI 10 CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR 1 OUT 40 PFI 13 CTR 1 A 42 PFI 3 CTRIZ 41 PFI 4 CTR1IB 46 PFI 11 FREQ OUT 1 PFI 14 A Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later PCI PXI 6254 Specifications Refer to the M 625x Specifications for more detailed information about the PCI PXI 6254 device PCI PXI 6254 Accessory and Cabling Options This section describes some cable and accessory options for M Series devices with two 68 pin connectors such as the PCI PXI 6254 Refer to ni com for other accessory options including new devices M Series User Manual A 86 ni com Appendix Device Specific Information SCXI Accessories SCXI is a programmable signal conditioning system designed for measurement and automation applications To connect your M Series device to an SCXI chassis use the SCXI 1349 adapter and an SHC68 68 EPM cable Use Connector 0 of your M Series device to control SCXI NI DAQ 7 4 and l
262. es that the counter returns correct data for counter measurement in some applications where a slow or non periodic external source is used Refer to the Duplicate Count Prevention section of Chapter 7 Counters for more information How do I connect counter signals to my M Series device The Default Counter Timer Pinouts section of Chapter 7 Counters has information about counter signal connections M Series Installation Issues My M Series device is not detected by Measurement amp Automation Explorer MAX or the Windows 2000 NT XP operating system When using other devices such as E Series devices on the same PC they work fine What is the problem Appendix D Upgrading from E Series to M Series lists issues encountered when upgrading from E Series to M Series devices Customers also can refer to NI s KnowledgeBase at ni com kb and Developer Zone at ni com devzone for more updated troubleshooting tips and answers to frequently asked questions about M Series devices National Instruments Corporation C 3 M Series User Manual Upgrading from E Series to M Series The following KnowledgeBase and Developer Zone documents will help you overcome typical hurdles in upgrading from E Series to M Series devices National Instruments Corporation Major Differences Between E Series and M Series DAQ Devices KnowledgeBase lists the advantages of M Series over E Series and the functional differences and other difference
263. essories NI offers a variety of products to use with M Series devices including cables connector blocks and other accessories as follows e Shielded cables and cable assemblies and unshielded ribbon cables and cable assemblies e Screw terminal connector blocks shielded and unshielded e RTSI bus cables National Instruments Corporation 2 5 M Series User Manual Chapter 2 DAQ System Overview Custom Cabling e SCXI modules and accessories for isolating amplifying exciting and multiplexing signals with SCXI you can condition and acquire up to 3 072 channels e Low channel count signal conditioning modules devices and accessories including conditioning for strain gauges and RTDs simultaneous sample and hold circuitry and relays For more specific information about these products refer to ni com Refer to the Custom Cabling section of this chapter the Field Wiring Considerations section of Chapter 4 Analog Input and Appendix A Device Specific Information for information about how to select accessories for your M Series device NI offers cables and accessories for many applications However if you want to develop your own cable adhere to the following guidelines for best results e For AI signals use shielded twisted pair wires for each AI pair of differential inputs Connect the shield for each signal pair to the ground reference at the source e Route the analog lines separately from the digital li
264. essory options including new devices National Instruments Corporation A 47 M Series User Manual Appendix Device Specific Information SCXI Accessories SCXI is a programmable signal conditioning system designed for measurement and automation applications To connect your M Series device to an SCXI chassis use the SCXI 1349 adapter and an SHC68 68 EPM cable Use Connector 0 of your M Series device to control SCXI NI DAQ 7 4 and later supports SCX in parallel mode on Connector 1 Note When using Connector 1 in parallel mode with SCXI modules that support track and hold you must programmatically disable track and hold M Series User Manual You also can use an M Series device to control the SCXI section of a PXI SCXI combination chassis such as the PXI 1010 or PXI 1011 The M Series device in the rightmost PXI slot controls the SCXI devices No cables or adapters are necessary Refer to the SCXT Advisor available by going to ni com info and entering the info code rdscad for more information SCC Accessories SCC provides portable modular signal conditioning to your DAQ system To connect your M Series device to an SCC module carrier such as the SC 2345 SC 2350 or SCC 68 use an SHC68 68 EPM shielded cable Use Connector 0 of your M Series device to control an SCC module carrier SCC carriers can be used with Connector with NI DAQ 7 4 and later Refer to the SCC Advisor available by going to ni com info a
265. evice Specific Information Custom Cabling and Connectivity The CA 1000 is a configurable enclosure that gives user defined connectivity and flexibility through customized panelettes Visit ni com for more information about the CA 1000 Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more information about custom cabling solutions USB 6255 Mass Termination LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6255 Mass Termination LEDs USB 6255 Mass Termination Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 3 Connector and LED Information for information about replacing the fuse on the USB 6255 Mass Termination M Series User Manual A 104 ni com Appendix Device Specific Information NI 6259 The following sections contain information about the NI PCI PClIe PXI PXIe 6259 USB 6259 Screw Terminal USB 6259 BNC and USB 6259 Mass Termination devices NI PCI PCle PXI PXle 6259 NI PCI PCle PXI PXle 6259 Pinout Figure A 44 shows the pinout of the NI PCI PCle PXI PXIe 6259 The I O signals appear on two 68 pin connectors For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information 3 Note M Series devices may be used with most E Series accessories However some E Series accessories use different terminal names Re
266. f the M Series device That is ty specifies the minimum pulse width of a signal driving a PFI RTSI or PXI_STAR pin when that signal is internally routed to Counter n Gate Gate to Source Setup and Hold The counter can be modeled as a set of flip flops where the D input is Count Enable and the clock input is Selected Source as shown in Figure B 41 This section shows the setup and hold requirements for two different cases e A PFI pin drives Counter n Source and a different PFI pin drives Counter n Gate e The general case all other combinations of signals driving Source and Gate M Series User Manual B 40 ni com Appendix B Timing Diagrams Figure B 48 and Table B 32 show the setup and hold requirements at the PFI pins for the first case where a PFI pin drives Counter n Source and a different PFI pin drives Counter n Gate PFI Gate PFI Source tes teH i P lt gt lt Figure B 48 Gate to Source Setup and Hold Timing Diagram Table B 32 Gate to Source Setup and Hold Timing Synchronization Time Description Gating Mode Mode Min ns Max ns tgs Setup time from PFI Gate Edge External Source 12 3 to PFI Source Level External Source 8 3 tsu Hold time from PFI Gate Edge External Source 0 5 to PFI Source Level External Source 2 0 Figure B 49 and Table B 33 show the setup and hold requirements of the
267. featured in the M Series analog input circuitry are as follows e I O Connector You can connect analog input signals to the M Series device through the I O connector The proper way to connect analog input signals depends on the analog input ground reference settings described in the Analog Input Ground Reference Settings section Also refer to Appendix A Device Specific Information for device I O connector pinouts e Mux Each M Series device has one analog to digital converter ADC The multiplexers mux route one AI channel at a time to the ADC through the NI PGIA e Ground Reference Settings The analog input ground reference settings circuitry selects between differential referenced single ended and non referenced single ended input modes Each AI channel can use a different mode e Instrumentation Amplifier NI PGIA The NI programmable gain instrumentation amplifier NI PGIA is a measurement and instrument class amplifier that minimizes settling times for all input ranges The National Instruments Corporation 4 1 M Series User Manual Chapter 4 Analog Input NI PGIA can amplify or attenuate an AI signal to ensure that you use the maximum resolution of the ADC M Series devices use the NI PGIA to deliver high accuracy even when sampling multiple channels with small input ranges at fast rates M Series devices can sample channels in any order at the maximum conversion rate and you can individually program each chan
268. fer to the M Series and E Series Pinout Comparison section of Chapter 3 Connector and LED Information for more information National Instruments Corporation A 105 M Series User Manual Appendix Device Specific Information AIO Al GND AI9 Al2 Al GND Al 11 Al SENSE Al 12 AI5 AI GND Al 14 Al7 Al GND AO GND AO GND D GND PO 0 PO 5 D GND P0 2 PO 7 P0 3 PFI 11 P2 3 PFI 10 P2 2 D GND PFI 2 P1 2 PFI 3 P1 3 PFI 4 P1 4 PFI 13 P2 5 PFI 15 P2 7 PFI 7 P1 7 PFI 8 P2 0 D GND D GND jo 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25 58 24 57 23 56 22 55 21 54 20 53 19 52 18 51 17 50 16 49 15 48 14 47 13 46 12 45 11 44 10 43 42 41 40 39 38 37 36 35 Doll No AI 8 Al 1 Al GND Al 10 Al3 Al GND Al 4 Al GND Al 13 Al6 Al GND Al 15 AO 0 AO 1 APFI 0 PO 4 D GND PO 1 P0 6 D GND 5V D GND D GND PFI 0 P1 0 PFI 1 P1 1 D GND 5V D GND PFI 5 P1 5 PFI 6 P1 6 D GND PFI 9 P2 1 PFI 12 P2 4 PFI 14 P2 6 oO re ee Pe Pe oe Sa Sa O QO O oO TERMINAL 68 TERMINAL 35 TERMINAL 34 TERMINAL 1 TERMINAL 1 TERMINAL 34 TERMINAL 35 TERMINAL
269. filters 9 7 using as outputs 9 6 using terminals as timing input signals 9 6 S sample clock analog input internal timing B 15 edge counting 7 3 sample clock measurement 7 17 scanning speed 4 9 SCC 2 4 SCXI 2 4 self calibration 1 2 semi period measurement 7 8 buffered 7 8 M Series User Manual Index single 7 8 sensors 2 3 settings analog input ground reference 4 4 AO offset 5 2 AO reference selection 5 2 short high quality cabling 4 7 signal conditioning 2 3 options 2 4 signal descriptions 3 1 signal label USB screw terminal devices 1 3 signal routing RTSI bus 9 4 signal sources floating 4 13 ground referenced 4 20 Signal Stream USB 10 1 signals AI Convert Clock 4 30 AI Convert Clock Timebase 4 34 AI Hold Complete Event 4 35 AI Pause Trigger 4 38 AI Reference Trigger 4 36 AI Sample Clock 4 28 AI Sample Clock Timebase 4 30 AI Start Trigger 4 35 analog input 4 25 analog output 5 6 AO Pause Trigger 5 8 AO Sample Clock 5 10 AO Sample Clock Timebase 5 11 AO Start Trigger 5 7 Change Detection Event 6 8 connecting analog input 4 11 connecting analog output 5 6 connecting counter C 3 connecting digital I O 6 9 connecting PFI input 8 4 Counter n A 7 28 Counter n Aux 7 28 M Series User Manual 1 14 Counter n B 7 28 Counter n Gate 7 27 Counter n HW Arm 7 29 Counter n Internal Output 7 29 Counter n Source 7 26 Counter n TC 7 29 Counter n Up_Down 7 29
270. g Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later PCI PXI 6281 Specifications Refer to the NI 628x Specifications for more detailed information about the PCI PXI 6281 device PCI PXI 6281 Accessory and Cabling Options This section describes some cable and accessory options for M Series devices with one 68 pin connector such as the PCI PXI 6281 Refer to ni com for other accessory options including new devices National Instruments Corporation A 133 M Series User Manual Appendix Device Specific Information SCXI Accessories SCXI is a programmable signal conditioning system designed for measurement and automation applications To connect your M Series device to an SCXI chassis use the SCXI 1349 adapter and an SHC68 68 EPM cable You also can use an M Series device to control the SCXI section of a PXI SCXI combination chassis such as the PXI 1010 or PXI 1011 The M Series device in the rightmost PXI slot controls the SCXI devices No cables or adapters are necessary Refer to the SCXT Advisor available by going to ni com info and entering the info code rdscad for more information SCC Accessories SCC provides portable modular signal conditioning to your DAQ system To connect your M Series device to an SCC module carrier such as the SC 2345 SC 2350 or SCC 68 use an SHC68 68 EPM shielded cable Refer to the SCC Advisor available by going to ni com info and entering the
271. g increments and decrements for X1 encoding When channel A leads channel B the increment occurs on the rising edge of channel A When channel B leads channel A the decrement occurs on the falling edge of channel A ChA f ChB oder ee Counter Value 5X 6 X 7 A X 6 X5 Figure 7 14 X1 Encoding e X2 Encoding The same behavior holds for X2 encoding except the counter increments or decrements on each edge of channel A depending on which channel leads the other Each cycle results in two increments or decrements as shown in Figure 7 15 ChA DaS CRB Lea Ar Counter Value 5X6 X7 XB Yo oX X7 Ye XS Figure 7 15 X2 Encoding e X4 Encoding Similarly the counter increments or decrements on each edge of channels A and B for X4 encoding Whether the counter increments or decrements depends on which channel leads the other Each cycle results in four increments or decrements as shown in Figure 7 16 To Counter Value H0000000 DOUO0O0000 Figure 7 16 X4 Encoding ChA a nes ChB Channel Z Behavior Some quadrature encoders have a third channel channel Z which is also referred to as the index channel A high level on channel Z causes the counter to be reloaded with a specified value in a specified
272. g sections contain information about the PCI PXI 6255 USB 6255 Screw Terminal and USB 6255 Mass Termination devices PCI PXI 6255 PCI PXI 6255 Pinout Figure A 41 shows the pinout of the PCI PXI 6255 For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information YA Note M Series devices may be used with most E Series accessories However some E Series accessories use different terminal names Refer to the M Series and E Series Pinout Comparison section of Chapter 3 Connector and LED Information for more information M Series User Manual A 90 ni com Appendix Device Specific Information gy ON ALO 68 34 Als AI 71 1 135 AI79 AI GND 67 33 AI1 AI 78 2 36 A170 AI 9 66 32 AI GND AI 69 3 37 A177 AI 2 65 31 AI10 gt AI 68 4 38 A176 AI GND 64 30 A13 E AI 75 5 39 A167 AI 11 63 29 AI GND pe Be Al 66 6 40 A174 Al SENSE 62 28 Al4 us Ur AI 65 7 41 A173 AI 12 61 27 AI GND a gt 8 lt AI 72 8 42 A164 AI5 60 26 Al 13 o AI GND 9 43 AI GND AI GND 59 25 AI6 GG AI 55 10 44 ales Al 14 58 24 AI GND Al 54 11145
273. g signals some digital signals and spring terminals for other digital signals e BNC 2111 Provides BNC connectivity to 16 single ended analog input signals two analog output signals five DIO PFI signals and the external reference voltage for analog output A 152 ni com Appendix Device Specific Information e __ BNC 2120 Similar to the BNC 2110 and also has a built in function generator quadrature encoder temperature reference and thermocouple connector e __ BNC 2090A Desktop rack mountable device with 22 BNCs for connecting analog digital and timing signals You can use one BNC accessory with the signals on either connector of your M Series device You can use two BNC accessories with one M Series device by using both connectors Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks Use an SHC68 68 EPM shielded cable to connect an M Series device to a connector block such as the following e CB 68LP and CB 68LPR unshielded connector blocks e SCC 68 I O connector block with screw terminals general breadboard area bus terminals and four expansion slots for SCC signal conditioning modules e SCB 68 shielded connector block with temperature sensor e TBX 68 DIN rail mountable connector block e TB 2706 front panel mounted terminal block for PXI M Series devices You can use one screw terminal accessory with the signals on either connector of your M Series de
274. gain is determined by the analog input range as shown in Figure 4 2 Vins o Vin o Vm Vin Vin x Gain Instrumentation Amplifier Measured Voltage Figure 4 2 NI PGIA Table 4 2 shows how signals are routed to the NI PGIA Table 4 2 Signals Routed to the NI PGIA AI Ground Reference Signals Routed to the Positive Signals Routed to the Negative Settings Input of the NI PGIA Vin Input of the NI PGIA Vin RSE AI lt 0 79 gt AI GND NRSE AI lt 0 15 gt AI SENSE AI lt 16 79 gt AI SENSE 2 DIFF AI lt 0 7 gt AI lt 8 15 gt AI lt 16 23 gt AI lt 24 31 gt AI lt 32 39 gt AI lt 48 55 gt AI lt 64 71 gt AI lt 40 47 gt AI lt 56 63 gt AI lt 72 79 gt in NRSE mode On NI 6225 devices the reference for each AI lt 16 63 gt signal is AI SENSE 2 and each AI lt 64 79 gt signal is AI SENSE National Instruments Corporation 4 5 M Series User Manual Chapter 4 Analog Input For differential measurements AI 0 and AI 8 are the positive and negative inputs of differential analog input channel 0 For a complete list of signal pairs that form differential input channels refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information A Caution The maximum input voltages rating of AI signals with respect to ground and for signal pairs in differential mode wi
275. ger this error of 1 cycle becomes more significant Table 7 1 illustrates this point Table 7 1 Frequency Measurement Method 1 Task Equation Example 1 Example 2 Actual Frequency to Measure Fl 50 kHz 5 MHz Timebase Frequency Ft 80 MHz 80 MHz Actual Number of Timebase Ft F1 1600 16 Periods Worst Case Measured Number Ft F1 1 1599 15 of Timebase Periods Measured Frequency Ft F1 Ft F1 50 031 kHz 5 33 MHz Error Ft F1 Ft F1 F1 31 Hz 333 kHz Error Ft Ft F1 1 0 06 6 67 National Instruments Corporation Method 1b measuring K periods of F1 improves the accuracy of the measurement A disadvantage of Method 1b is that you have to take K 1 measurements These measurements take more time and consume some of the available PCI or PXI bandwidth Method 2 is accurate for high frequency signals However the accuracy decreases as the frequency of the signal to measure decreases At very low frequencies Method 2 may be too inaccurate for your application Another disadvantage of Method 2 is that it requires two counters if you cannot provide an external signal of M Series User Manual Chapter 7 Counters known width An advantage of Method 2 is that the measurement completes in a known amount of time e Method 3 measures high and low frequency signals accurately However it requires two counters Table 7 2 summarizes some of the differences in me
276. gnal conditioning in addition to plug in data acquisition DAQ devices Sensors and Transducers Sensors can generate electrical signals to measure physical phenomena such as temperature force sound or light Some commonly used sensors are strain gauges thermocouples thermistors angular encoders linear encoders and resistance temperature detectors RTDs To measure signals from these various transducers you must convert them into a form that a DAQ device can accept For example the output voltage of most thermocouples is very small and susceptible to noise Therefore you may need to amplify or filter the thermocouple output before digitizing it The manipulation of signals to prepare them for digitizing is called signal conditioning For more information about sensors refer to the following documents e For general information about sensors visit ni com sensors e Ifyou are using LabVIEW refer to the LabVIEW Help by selecting Help Search the LabVIEW Help in LabVIEW and then navigate to the Taking Measurements book on the Contents tab e Ifyou are using other application software refer to Common Sensors in the NI DAQm x Help or the LabVIEW Help in version 8 0 or later National Instruments Corporation 2 3 M Series User Manual Chapter 2 DAQ System Overview Signal Conditioning Options SCXI SCXI is a front end signal conditioning and switching system for various measurement devices including M Series devices
277. grounded signal source is incorrectly measured this difference can appear as measurement error Follow the connection instructions for grounded signal sources to eliminate this ground potential difference from the measured signal When to Use Differential Connections with Ground Referenced Signal Sources M Series User Manual Use DIFF input connections for any channel that meets any of the following conditions e The input signal is low level less than 1 V e The leads connecting the signal to the device are greater than 3 m 10 ft e The input signal requires a separate ground reference point or return signal e The signal leads travel through noisy environments e Two analog input channels AI and AI are available DIFF signal connections reduce noise pickup and increase common mode noise rejection DIFF signal connections also allow input signals to float within the common mode limits of the NI PGIA Refer to the Using Differential Connections for Ground Referenced Signal Sources section for more information about differential connections 4 20 ni com Chapter 4 Analog Input When to Use Non Referenced Single Ended NRSE Connections with Ground Referenced Signal Sources Only use non referenced single ended input connections if the input signal meets the following conditions e The input signal is high level greater than 1 V e The leads connecting the signal to the device are less than 3 m 10 ft e The i
278. h accuracy device synchronization with minimal latencies on each PXI slot Only devices in the PXI Star controller Slot 2 can set signal on this line For additional information concerning PXI star signal specifications and capabilities read the PXI Specification located at www pxisa org specs See PXI Express An encoding technique for a rotating device where two tracks of information are placed on the device with the signals on the tracks offset by 90 from each other This makes it possible to detect the direction of the motion The maximum and minimum parameters between which a sensor instrument or device operates with a specified set of characteristics This may be a voltage range or a frequency range 1 Displays as it comes in no delays 2 A property of an event or system in which data is processed and acted upon as it is acquired instead of being accumulated and processed at a later time 3 Pertaining to the performance of a computation during the actual time that the related physical process transpires so results of the computation can be used in guiding the physical process Referenced Single Ended configuration AlIl measurements are made with respect to a common reference measurement system or a ground Also called a grounded measurement system Real Time System Integration Real Time System Integration bus The National Instruments timing bus that connects DAQ devices directly by means of connectors on top of
279. h customized panelettes Visit ni com for more information about the CA 1000 Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more information about custom cabling solutions NI recommends that you use the SHC68 68 EPM cable however an SHC68 68 EP cable will work with M Series devices M Series User Manual A 64 ni com Appendix Device Specific Information NI 6251 The following sections contain information about the NI PCI PCle PXI PXIe 6251 USB 6251 Screw Terminal USB 6251 BNC and USB 6251 Mass Termination devices NI PCI PCle PXI PXle 6251 NI PCI PCle PXI PXle 6251 Pinout Figure A 28 shows the pinout of the NI PCI PCIe PXI PXIe 6251 For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information 3 Note M Series devices may be used with most E Series accessories However some E Series accessories use different terminal names Refer to the M Series and E Series Pinout Comparison section of Chapter 3 Connector and LED Information for more information National Instruments Corporation A 65 M Series User Manual Appendix Device Specific Information M Series User Manual AIO AI GND AI9 Al2 Al GND Al 11 Al SENSE Al 12 AI5 Al GND Al 14 Al7 Al GND AO GND AO GND D GND PO 0 PO 5 D GND PO 2 PO 7 P0 3 PFI PF 11 P2 3 10 P2 2 D GND PF PFI PF PFI PF
280. h one M Series device by using both connectors Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks Use an SHC68 68 EPM shielded cable to connect an M Series device to a connector block such as the following e CB 68LP and CB 68LPR unshielded connector blocks e SCC 68 I O connector block with screw terminals general breadboard area bus terminals and four expansion slots for SCC signal conditioning modules e SCB 68 shielded connector block with temperature sensor e TBX 68 DIN rail mountable connector block e TB 2706 front panel mounted terminal block for PXI M Series devices You can use one screw terminal accessory with the signals on either connector of your M Series device You can use two screw terminal accessories with one M Series device by using both connectors RTSI Cables Use RTSI bus cables to connect timing and synchronization signals among PCI devices such as M Series E Series CAN and other measurement vision and motion devices Since PXI devices use PXI backplane signals for timing and synchronization no cables are required 1 TB 2706 uses Connector 0 of your PXI device After a TB 2706 is installed Connector 1 cannot be used M Series User Manual A 28 ni com Appendix Device Specific Information Cables In most applications you can use the following cables e SHC68 68 EPM High performance cable designed specifically for M Series
281. has occurred Analog output G 2 ni com AO 0 AO 1 AO 2 AO 3 AO GND application arm ASIC asynchronous block diagram BNC Glossary Analog channel 0 output signal Analog channel 1 output signal Analog channel 2 output signal Analog channel 3 output signal Analog output ground signal A software program that creates an end user function The process of getting an instrument ready to perform a function For example the trigger circuitry of a digitizer is armed meaning that it is ready to start acquiring data when an appropriate trigger condition is met Application specific integrated circuit A proprietary semiconductor component designed and manufactured to perform a set of specific functions for a specific customer 1 Hardware A property of an event that occurs at an arbitrary time without synchronization to a reference clock 2 Software A property of a function that begins an operation and returns prior to the completion or termination of the operation Bit One binary digit either 0 or 1 Byte Eight related bits of data an eight bit binary number Also used to denote the amount of memory required to store one byte of data A pictorial description or representation of a program or algorithm Bayonet Neill Concelman A type of coaxial connector used in situations requiring shielded cable for signal connections and or controlled impedance applications National Instruments
282. he PCI PXI 6284 Refer to ni com for other accessory options including new devices National Instruments Corporation A 145 M Series User Manual Appendix Device Specific Information SCXI Accessories SCXI is a programmable signal conditioning system designed for measurement and automation applications To connect your M Series device to an SCXI chassis use the SCXI 1349 adapter and an SHC68 68 EPM cable Use Connector 0 of your M Series device to control SCXI NI DAQ 7 4 and later supports SCX in parallel mode on Connector 1 AY Note When using Connector 1 in parallel mode with SCXI modules that support track and hold you must programmatically disable track and hold M Series User Manual You also can use an M Series device to control the SCXI section of a PXI SCXI combination chassis such as the PXI 1010 or PXI 1011 The M Series device in the rightmost PXI slot controls the SCXI devices No cables or adapters are necessary Refer to the SCXT Advisor available by going to ni com info and entering the info code rdscad for more information SCC Accessories SCC provides portable modular signal conditioning to your DAQ system To connect your M Series device to an SCC module carrier such as the SC 2345 SC 2350 or SCC 68 use an SHC68 68 EPM shielded cable Use Connector 0 of your M Series device to control an SCC module carrier SCC carriers can be used with Connector 1 with NI DAQ 7 4 and later Refer to the SCC
283. he generation pauses as soon as the pause trigger is asserted If the source of your sample clock is the onboard clock the generation resumes as soon as the pause trigger is deasserted as shown in Figure 5 4 Pause Trigger Sample Clock Figure 5 4 AO Pause Trigger with the Onboard Clock Source If you are using any signal other than the onboard clock as the source of your sample clock the generation resumes as soon as the pause trigger is deasserted and another edge of the sample clock is received as shown in Figure 5 5 M Series User Manual 5 8 ni com Chapter 5 Analog Output Pause Trigger D ae Sample Clock i i Figure 5 5 AO PauseTrigger with Other Signal Source Using a Digital Source To use AO Pause Trigger specify a source and a polarity The source can be one of the following signals e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXI STAR The source also can be one of several other internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later for more information You also can specify whether the samples are paused when AO Pause Trigger is at a logic high or low level Using an Analog Source When you use an analog trigger source the samples are paused when the Analog Comparison Event signal is at a high level Refer to the Triggering
284. he timing delays and requirements of digital waveform acquisitions and digital waveform generations Digital Waveform Acquisition Timing To describe digital waveform acquisition timing delays and requirements refer to the circuitry shown in Figure B 37 In the figure PO PFI RTSI and PXI_STAR represent signals at connector pins of the M Series device The other named signals represent internal signals PFI_i RTSI_i gt PO or PXI_STAR_i DO Sample DO Waveform PFI RTSI Pe Generation FIFO Clock or PXI_STAR PFI Output Other Internal Signals Figure B 37 Digital Waveform Acquisition Timing Circuitry National Instruments Corporation B 31 M Series User Manual Appendix B Timing Diagrams Figure B 38 and Tables B 22 and B 23 describe the digital waveform acquisition timing delays and requirements Your inputs must meet the requirements to ensure proper behavior ty it gt i to b i lt p m PFI RTSI or PXI_STAR it it PFI_i RTSI_i _ _f 37 or PXI_STAR_i i i 1 tgs ity DI Sample Clock i ts te lt _ lt Po X ED it It POW S tie te oj lt gt lt gt PFI Output Figure B 38 Digital Waveform Acquisition Timing Delays M Series User Manual B 32 ni com Table B 22 DI Timing Delays Appendix B Timing Diagrams Time Fr
285. he width of pulse T to be N periods of F1 the frequency of F1 is N T Figure 7 12 illustrates this method Another option is to measure the width of a known period instead of a known pulse _ Width of Pulse T gt Pulse Pulse _ Gate 1 2 as N F1 Source F1 A 4 Pulse Width Width of _ _ NV Measurement Pulse F1 Frequency of F1 2 National Instruments Corporation Figure 7 12 Method 2 7 11 M Series User Manual Chapter 7 Counters M Series User Manual Method 3 Measure Large Range of Frequencies Using Two Counters By using two counters you can accurately measure a signal that might be high or low frequency This technique is called reciprocal frequency measurement In this method you generate a long pulse using the signal to measure You then measure the long pulse with a known timebase The M Series device can measure this long pulse more accurately than the faster input signal You can route the signal to measure to the Source input of Counter 0 as shown in Figure 7 13 Assume this signal to measure has frequency F1 Configure Counter 0 to generate a single pulse that is the width of N periods of the source input signal Signal to gt SOURCE OUT Measure F1 COUNTER 0 Signal of Known gt SOURCE OUT Frequency F2 COUNTER 1 L p GATE CTR_0_SOURCE Geer Signal to Measure
286. ices National Instruments Corporation A 83 M Series User Manual Appendix Device Specific Information NI 6254 PCI PXI 6254 Pinout Figure A 40 shows the pinout of the PCI PXI 6254 The I O signals appear on two 68 pin connectors For a detailed description of each signal refer to the 7 O Connector Signal Descriptions section of Chapter 3 Connector and LED Information Aya Note M Series devices may be used with most E Series accessories However some E Series accessories use different terminal names Refer to the M Series and E Series Pinout Comparison section of Chapter 3 Connector and LED Information for more information M Series User Manual A 84 ni com Appendix Device Specific Information AIO Al GND AI9 Al2 Al GND Al 11 Al SENSE Al 12 AI5 Al GND Al 14 Al7 Al GND NC NC D GND PO 0 PO 5 D GND PO 2 PO 7 P0 3 PFI 11 P2 3 PFI 10 P2 2 D GND PFI 2 P1 2 PFI 3 P1 3 PFI 4 P1 4 PFI 13 P2 5 PFI 15 P2 7 PFI 7 P1 7 PFI 8 P2 0 D GND D GND TERMINAL 68 TERMINAL 34 TERMINAL 1 TERMINAL 35 CONNECTOR 0 Al 0 15 ENG GE T ger 68 34 AI8 67 33 Al 1 66 32 Al GND 65 31 Al 10 64 30 Al3 63 29 Al GND 62 28 Al 4 61 27 Al GND 60 26 Al 13 59 25 Al6 58 24 Al GND 57 23 Al 15 56 22
287. ices Since PXI devices use PXI backplane signals for timing and synchronization no cables are required Cables In most applications you can use the following cables e SHC68 68 EPM Hicgh performance cable designed specifically for M Series devices It has individual bundles separating analog and digital signals Each differential analog input channel is routed on an individually shielded twisted pair of wires Analog outputs are also individually shielded e SHC68 68 Lower cost shielded cable with 34 twisted pairs of wire e RC68 68 Highly flexible unshielded ribbon cable Custom Cabling and Connectivity The CA 1000 is a configurable enclosure that gives user defined connectivity and flexibility through customized panelettes Visit ni com for more information about the CA 1000 Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more information about custom cabling solutions NI recommends that you use the SHC68 68 EPM cable however an SHC68 68 EP cable will work with M Series devices M Series User Manual A 110 ni com Appendix Device Specific Information USB 6259 Screw Terminal USB 6259 Screw Terminal Pinout Figure A 45 shows the pinout of the USB 6259 Screw Terminal For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information National Instruments Corporation A 111 M Series User Manual Appe
288. ies User Manual Appendix Device Specific Information SCC Accessories SCC provides portable modular signal conditioning to your DAQ system To connect your M Series device to an SCC module carrier such as the SC 2345 SC 2350 or SCC 68 use an SH68 68 EPM shielded cable Refer to the SCC Advisor available by going toni com info and entering the info code rdscav for more information BNC Accessories You can use the SH68 68 EPM shielded cable to connect your DAQ device to BNC accessories such as the following e BNC 2110 Provides BNC connectivity to all analog signals some digital signals and spring terminals for other digital signals e BNC 2111 Provides BNC connectivity to 16 single ended analog input signals two analog output signals five DIO PFI signals and the external reference voltage for analog output e BNC 2120 Similar to the BNC 2110 and also has a built in function generator quadrature encoder temperature reference and thermocouple connector e BNC 2090A Desktop rack mountable device with 22 BNCs for connecting analog digital and timing signals Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks Use an SH68 68 EPM shielded cable to connect an M Series device to a connector block such as the following e CB 68LP and CB 68LPR unshielded connector blocks e SCC 68 I O connector block with screw terminals general breadboard area bus t
289. ies User Manual Appendix B Timing Diagrams Output Timing The analog output timer has three possible trigger outputs Start Trigger Pause Trigger and Sample Clock The delays presented in this section assume a 200 pF load on PFI lines and a 50 pF load on RTSI lines Actual delays will vary with the actual load The two numbers given for each condition represent the variation from the best case and worst case terminals Start Trigger As an output the Start Trigger is routed as an asynchronous pulse The actual signal that gets routed is the Selected Start Trigger signal so there is no synchronous delay involved Routing Logic gt m RTSI PFI Selected Start Trigger D Q To Internal Logic Sync Sample Clock Timebase _ Figure B 31 Start Trigger Path tho Selected Start Trigger PFI RTSI Terminal i Figure B 32 Start Trigger Output Delay Timing Diagram Table B 19 Start Trigger Output Delay Timing Time From To Min ns Max ns ty Selected Start Trigger PFI 8 1 9 1 27 1 30 8 Selected Start Trigger RTSI 7 5 7 7 17 9 18 5 M Series User Manual B 28 ni com Appendix B Timing Diagrams Pause Trigger Pause Trigger is only output asynchronously and only to RTSI The actual signal being routed is Selected Pause The Pause Trigger output timing can be derived by adding the delay in
290. ies devices have up to 32 lines of bidirectional DIO signals National Instruments Corporation 8 3 M Series User Manual Chapter 8 PFI Connecting PFI Input Signals All PFI input connections are referenced to D GND Figure 8 2 shows this reference and how to connect an external PFI 0 source and an external PFI 2 source to two PFI terminals TL PFI 0 Z PFI 2 O PFI 0 PFI 2 Source Source D GND O 1 0 Connector M Series Device Figure 8 2 PFI Input Signals Connections PFI Filters You can enable a programmable debouncing filter on each PFI RTSI or PXI_STAR signal When the filters are enabled your device samples the input on each rising edge of a filter clock M Series devices use an onboard oscillator to generate the filter clock with a 40 MHz frequency ay Note NI DAQmx only supports filters on counter inputs The following is an example of low to high transitions of the input signal High to low transitions work similarly M Series User Manual 8 4 ni com Chapter 8 PFI Assume that an input terminal has been low for a long time The input terminal then changes from low to high but glitches several times When the filter clock has sampled the signal high on N consecutive edges the low to high transition is propagated to the rest of the circuit The value of N depends on the filter setting refer to Table 8 1
291. igger 4 38 AI Reference Trigger 4 36 AI Sample Clock 4 28 AI Sample Clock Timebase 4 30 Al Start Trigger 4 35 timing diagrams B 1 timing signals 4 25 triggering 4 11 troubleshooting C 1 analog output 5 1 circuitry 5 1 connecting signals 5 6 data generation methods 5 4 M Series User Manual 1 2 fundamentals 5 1 getting started with applications in software 5 12 glitches on the output signal 5 3 offset 5 2 reference selection 5 2 signals 5 6 AO Pause Trigger 5 8 AO Sample Clock 5 10 AO Sample Clock Timebase 5 11 AO Start Trigger 5 7 timing diagrams B 21 timing signals 5 6 trigger signals 5 5 triggering 5 5 troubleshooting C 3 analog source triggering 11 2 analog to digital converter 4 2 analog trigger 11 2 accuracy 11 7 actions 11 3 improving accuracy 11 7 analog window triggering 11 6 ANSI C documentation xix AO FIFO 5 1 AO offset 5 2 AO offset and AO reference selection settings 5 2 AO Pause Trigger signal 5 8 AO reference selection 5 2 AO Sample Clock 5 2 AO Sample Clock signal 5 10 AO Sample Clock Timebase signal 5 11 AO Start Trigger signal 5 7 ao PauseTrigger 5 8 ao SampleClock 5 10 ao StartTrigger 5 7 APFI terminals 11 2 applications counter input 7 2 counter output 7 19 ni com edge counting 7 2 arm start trigger 7 31 avoiding scanning faster than necessary 4 9 BNC connecting signals A 18 A 55 A 73 A 115 buffered edge counting 7 3 hardw
292. ilter clocks Figure 9 3 Filter Example Enabling filters introduces jitter on the input signal For the 125 ns and 6 425 us filter settings the jitter is up to 25 ns On the 2 56 ms setting the jitter is up to 10 025 us When a PFI input is routed directly to RTSI or a RTSI input is routed directly to PFI the M Series device does not use the filtered version of the input signal Refer to the KnowledgeBase document Digital Filtering with M Series and CompactDAQ for more information about digital filters and counters To access this KnowledgeBase go to ni com info and enter the info code rddfms PXI Clock and Trigger Signals PXI_CLK10 M Series User Manual PXI clock and trigger signals are only available on PXI PXI Express devices PXI_CLK10 is a common low skew 10 MHz reference clock for synchronization of multiple modules in a PXI measurement or control system The PXI backplane is responsible for generating PXI_CLK10 independently to each peripheral slot in a PXI chassis 9 8 ni com PXI Triggers PXI_STAR Trigger PXI_STAR Filters Chapter 9 Digital Routing and Clock Generation A PXI chassis provides eight bused trigger lines to each module in a system Triggers may be passed from one module to another allowing precisely timed responses to asynchronous external events that are being monitored or controlled Triggers can be used to synchronize the operation of several different PXI peripher
293. imebase 20 MHz Timebase and 100 kHz Timebase on an M Series device By using the external reference clock you can synchronize the internal timebases to an external clock The following signals can be routed to drive the external reference clock e RTSI lt 0 7 gt e PXICLKI10 e PXISTAR The external reference clock is an input to a Phase Lock Loop PLL The PLL generates the internal timebases 9 2 ni com Chapter 9 Digital Routing and Clock Generation 10 MHz Reference Clock The 10 MHz reference clock can be used to synchronize other devices to your M Series device The 10 MHz reference clock can be routed to the RTSI lt 0 7 gt terminals Other devices connected to the RTSI bus can use this signal as a clock input The 10 MHz reference clock is generated by dividing down the onboard oscillator Synchronizing Multiple Devices With the RTSI bus and the routing capabilities of M Series devices there are several ways to synchronize multiple devices depending on your application 3 Note RTSI is not supported on USB devices To synchronize multiple devices to a common timebase choose one device the initiator to generate the timebase The initiator device routes its 10 MHz reference clock to one of the RTSI lt 0 7 gt signals All devices including the initiator device receive the 10 MHz reference clock from RTSI This signal becomes the external reference clock A PLL on each device generates the internal tim
294. ine Min ns Max ns to7 Delay to Selected Sample Clock PFI 35 8 9 RTSI 3 4 8 6 STAR 2 8 5 9 tog Selected Sample Clock Setup time to Sync 1 5 Convert Clock Timebase t29 Selected Sample Clock Hold time to Sync 0 Convert Clock Timebase t30 Sync Convert Clock Timebase to Sample Clock 2 4 5 8 t31 Sample Clock to POUT PFI 2 4 5 5 RTSI 3 2 6 8 The AI timing engine also can export a signal related to the Sample Clock called AI_Sample_In_Progress This signal asserts with the Sample Clock and stays asserted until after the last convert of the sample It is useful for external simultaneous sample and hold signal conditioning Sample Clock Convert Clock i POUT top gt e tag gt lt lt Figure B 17 Al_Sample_In_Progress Timing Diagram Table B 9 Al_Sample_In_Progress Timing Time Description Line Min ns Max ns t32 Sample Clock to POUT as leading edge PFI 3 4 8 0 of AI_Sample_In_Progress RTSI 4 2 9 2 t33 Convert Clock to POUT as trailing edge PFI 5 4 12 4 of AI_Sample_In_Progress RTSI 6 2 13 6 National Instruments Corporation B 17 M Series User Manual Appendix B Timing Diagrams Pause Trigger The Pause Trigger signal can be used to pause the acquisition any time the signal deasserts It is generated from internal or external sources A multiplexer selects a signal from the _i bus its output is called Selected
295. ine as an output do not connect it to any external signal source ground or power supply e Ifyou configure a PFI or DIO line as an output understand the current requirements of the load connected to these signals Do not exceed the specified current output limits of the DAQ device NI has several signal conditioning solutions for digital applications requiring high current drive e If you configure a PFI or DIO line as an input do not drive the line with voltages outside of its normal operating range The PFI or DIO lines have a smaller operating range than the AI signals e Treat the DAQ device as you would treat any static sensitive device Always properly ground yourself and the equipment when handling the DAQ device or connecting to it Programmable Power Up States At system startup and reset the hardware sets all PFI and DIO lines to high impedance inputs by default The DAQ device does not drive the signal high or low Each line has a weak pull down resistor connected to it as described in the specifications document for your device NI DAQmx supports programmable power up states for PFI and DIO lines Software can program any value at power up to the PO P1 or P2 lines The PFI and DIO lines can be set as e A high impedance input with a weak pull down resistor default e An output driving a 0 e An output driving a 1 Refer to the NI DAQmx Help or the LabVIEW Help in version 8 0 or later for more information about set
296. ined connectivity and flexibility through customized panelettes Visit ni com for more information about the CA 1000 Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more information about custom cabling solutions NI recommends that you use the SHC68 68 EPM cable however an SHC68 68 EP cable will work with M Series devices M Series User Manual A 148 ni com Appendix Device Specific Information NI 6289 The following sections contain information about the PCI PXI 6289 USB 6289 Screw Terminal and USB 6289 Mass Termination devices PCI PXI 6289 PCI PXI 6289 Pinout Figure A 61 shows the pinout of the PCI PXI 6289 The I O signals appear on two 68 pin connectors For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information 3 Note M Series devices may be used with most E Series accessories However some E Series accessories use different terminal names Refer to the M Series and E Series Pinout Comparison section of Chapter 3 Connector and LED Information for more information National Instruments Corporation A 149 M Series User Manual Appendix Device Specific Information AIO Al GND AI9 AI2 AI GND Al 11 AI SENSE AI 12 AI5 Al GND Al 14 Al7 Al GND AO GND AO GND D GND PO 0 PO 5 D GND PO 2 PO 7 P0 3 PFI 11 P2 3 PFI 10 P2 2 D GND PFI 2 P1 2 PFI 3 P1 3 PFI
297. information about custom cabling solutions NI recommends that you use the SHC68 68 EPM cable however an SHC68 68 EP cable will work with M Series devices M Series User Manual A 130 ni com Appendix Device Specific Information NI 6281 The following sections contain information about the PCI PXI 6281 USB 6281 Screw Terminal and USB 6281 Mass Termination devices PCI PXI 6281 PCI PXI 6281 Pinout Figure A 57 shows the pinout of the PCI PXI 6281 For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information 3 Note M Series devices may be used with most E Series accessories However some E Series accessories use different terminal names Refer to the M Series and E Series Pinout Comparison section of Chapter 3 Connector and LED Information for more information National Instruments Corporation A 131 M Series User Manual Appendix Device Specific Information M Series User Manual AIO Al GND AI9 Al2 Al GND Al 11 Al SENSE Al 12 AI5 AI GND Al 14 Al7 Al GND AO GND AO GND D GND PO 0 P0 5 D GND P0 2 PO 7 P0 3 PFI 11 P2 3 PFI 10 P2 2 D GND PFI 2 P1 2 PFI 3 P1 3 PFI 4 P1 4 PFI 13 P2 5 PFI 15 P2 7 PFI 7 P1 7 PFI 8 P2 0 D GND D GND 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25
298. ing edge of the sample clock Figure 7 4 shows an example of buffered edge counting Notice that counting begins when the counter is armed which occurs before the first active edge on Gate Counter Armed Sample Clock Sample on Rising Edge i i SOURCE LP LFLEDELELFLA Counter Value 0 1 2 3 4 5 6 7 i 3 3 Buffer f 6 Figure 7 4 Buffered Sample Clock Edge Counting National Instruments Corporation 7 3 M Series User Manual Chapter 7 Counters Controlling the Direction of Counting In edge counting applications the counter can count up or down You can configure the counter to do the following e Always count up e Always count down e Count up when the Counter n B input is high count down when it is low For information about connecting counter signals refer to the Default Counter Timer Pinouts section Pulse Width Measurement In pulse width measurements the counter measures the width of a pulse on its Gate input signal You can configure the counter to measure the width of high pulses or low pulses on the Gate signal You can route an internal or external periodic clock signal with a known period to the Source input of the counter The counter counts the number of rising or falling edges on the Source signal while the pulse on the Gate signal is active You can calculate the pulse width by mult
299. ions with Floating Signal Sources 4 13 When to Use Non Referenced Single Ended NRSE Connections with Floating Signal SOULCES re nn naine er eee tn sn RCA ee 4 13 When to Use Referenced Single Ended RSE Connections with Floating Signal DOULCES EEE est 0 MM en MA nee nee ne tn TES 4 14 Using Differential Connections for Floating Signal Sources 4 15 Using Non Referenced Single Ended NRSE Connections for Floating Signal SOULCES serbe ar le Eau nn net et taser eee 4 18 Using Referenced Single Ended RSE Connections for Floating Signal Sources 4 19 Connecting Ground Referenced Signal Sources 4 20 What Are Ground Referenced Signal Sources 4 20 When to Use Differential Connections with Ground Referenced Signal Sources 4 20 When to Use Non Referenced Single Ended NRSE Connections with Ground Referenced Signal Sources ss 4 21 M Series User Manual vi ni com Contents When to Use Referenced Single Ended RSE Connections with Ground Referenced Signal Sources 4 21 Using Differential Connections for Ground Referenced Signal Sources 4 22 Using Non Referenced Single Ended NRSE Connections for Ground Referenced Signal SOUTCES art tetes diner nan Notaire Nes nine 4 23 Field Wiring Considerations iiiaio iaaa aaien aesa oE Tiani 4 24 Analog Input Timing Signals 4 25 AT Sample Clock Signal ssh seen aaan i 4 28 Using an Internal Source 4 28 Using an External Source
300. iplying the period of the Source signal by the number of edges returned by the counter A pulse width measurement will be accurate even if the counter is armed while a pulse train is in progress If a counter is armed while the pulse is in the active state it will wait for the next transition to the active state to begin the measurement Single Pulse Width Measurement With single pulse width measurement the counter counts the number of edges on the Source input while the Gate input remains active When the Gate input goes inactive the counter stores the count in a hardware save register and ignores other edges on the Gate and Source inputs Software then reads the stored count M Series User Manual 7 4 ni com Chapter 7 Counters Figure 7 5 shows an example of a single pulse width measurement Gare SOURCE Lp Le Counter Value 0 HW Save Register 2 Figure 7 5 Single Pulse Width Measurement Buffered Pulse Width Measurement Buffered pulse width measurement is similar to single pulse width measurement but buffered pulse width measurement takes measurements over multiple pulses The counter counts the number of edges on the Source input while the Gate input remains active On each trailing edge of the Gate signal the counter stores the count in a hardware save register A DMA controller transfers the stored values to host memory Figure 7 6 shows an
301. ital waveform generation timing delays and requirements we model the circuitry as shown in Figure B 39 In the figure PO PFI RTSI and PXI_STAR represent signals at connector pins of the M Series device The other named signals represent internal signals PFI_i RTSI_i gt Po or PXI_STAR_i DO Waveform DO Sample e Clock Generation FIFO PFI RTSI gt or PXI_STAR Other Internal PFI Output Signals Figure B 39 Digital Waveform Generation Timing Circuitry Figure B 40 and Tables B 24 and B 25 describe the digital waveform generation timing delays and requirements Your inputs must meet the requirements to ensure proper behavior to l lt gt thy ty lt gt a gt PFI RTSI CA E S or PXI_STAR 1 tie tie i PFI_i RTSI_i i 1 or PXI_LSTAR_i i tig 1 tig a a DO Sample Clock tig gt Po Y X 1 ts tie lt gt lt t gt PFI Output Figure B 40 Digital Waveform Acquisition Timing Delays M Series User Manual B 34 ni com Appendix B Table B 24 DO Timing Delays Timing Diagrams Time From To Min ns Max ns ti PFI PFLi 5 2 6 2 18 2 22 0 RTSI RTSLi 2 0 2 5 5 0 6 0 PXI_STAR PXI_STAR_i 1 5 3 5 ty3 PFI_i RTSI_i PXI_STAR_i DO Sample Clock 3 5 9 5 or other internal signal ti4 DO Sample Clock PO 7 5 27 5 tis DO Sam
302. ith an external Sample Clock analog output internal clock timing can be derived from Table B 13 Signal_i A gt ts Sync Sample Clock Timebase lp Sample Clock Timebase a Figure B 24 External Update Source Clock Insertions Timing Diagram National Instruments Corporation B 23 M Series User Manual Appendix B Timing Diagrams Table B 13 External Update Source Clock Insertions Timing Time From To Min ns Max ns t2 Signal_i Sample Clock Timebase 11 6 30 0 t3 Signal_i Sync Sample Clock Timebase 1 5 7 0 If the Sample Clock is being generated by dividing down the Sample Clock Timebase the analog output generation is timed from the output of the UI counter The signal Sample Clock Timebase can be an external signal When the analog output timing engine operates in this mode it is assumed that the source signal for the Sample Clock timebase is a free running clock so the Sync Sample Clock Timebase is the inverted version of Sample Clock Timebase Configuring the analog output timing engine for rising edge operation will cause the external signals to be synchronized on the falling edge of the Sample Clock Timebase which corresponds to the rising edge of Sync Sample Clock Timebase A Sync Sample Clock Timebase gt ts Sample Clock Timebase A Figure B 25 Sample Clock Timebase and the Sync Sample Clock Timeba
303. l 19 AI 10 31 AI2 Al 20 Al 28 AI3 30 AI GND Al 21 AI 29 AI GND 29 Al 11 Al 30 Al 22 Al4 28 Al SENSE Al 23 Al 31 Al GND 27 Al 12 Al 32 Al 40 Al 13 26 AI5 Al 41 Al 33 Al6 25 Al GND Al 34 Al 42 Al GND 24 Al 14 AI 35 Al 43 Al 15 23 AI7 AI GND AI SENSE 2 AO 0 22 AI GND Al 44 AI 36 AO 1 21 AO GND Al 37 Al 45 APFI 0 20 AO GND Al 38 Al 46 P0 4 19 D GND Al 47 Al 39 D GND 18 P0 0 Al 48 Al 56 PO 1 17 PO 5 AI 49 Al 57 PO 6 16 D GND AI 58 AI 50 D GND 15 PO 2 Al 51 AI 59 5V 14 PO 7 Al 52 Al 60 D GND 13 P0 3 Al 61 Al 53 D GND 12 PFI 11 P2 3 Al 54 Al 62 PFI 0 P1 0 11 PFI 10 P2 2 Al 55 AI 63 PFI 1 P1 1 10 D GND AI GND AI GND D GND 9 PFI 2 P1 2 Al 72 Al 64 5V 8 PFI 3 P1 3 Al 65 Al 73 D GND 7 PFI 4 P1 4 Al 66 Al 74 PFI 5 P1 5 6 PFI 13 P2 5 Al 75 Al 67 PFI 6 P1 6 5 PFI 15 P2 7 Al 68 Al 76 D GND 4 PFI 7 P1 7 AI 69 Al 77 PFI 9 P2 1 3 PFI 8 P2 0 Al 78 Al 70 PFI 12 P2 4 2 D GND AI71 Al 79 PFI 14 P2 6 1 D GND ee CONNECTOR 1 CONNECTOR 0 Al 16 79 Al 0 15 TERMINAL 68 TERMINAL 35 TERMINAL 68 TERMINAL 35 fo lo a lo TERMINAL 34 TERMINAL 1 TERMINAL 34 TERMINAL 1 Figure A 43 USB 6255 Mass Termination Pinout A 100 ni com Appendix Device Specific Information Table A 21 Default NI DAQmx Counter Timer Pins Default Connector 0 Pin Number Counter Timer Signal Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 PFI 10 CTR 0 OUT 2 PFI 12 CTROA 37 PFI 8 CTROZ 3 PFI 9 CTROB
304. l 32 Al 40 Al 13 26 AI5 Al 41 Al 33 Al6 25 Al GND Al 34 Al 42 Al GND 24 Al 14 AI 35 Al 43 Al 15 23 Al7 Al GND Al SENSE 2 AO 0 22 AI GND AI 44 AI 36 AO 1 21 AO GND Al 37 Al 45 NC 20 AO GND Al 38 Al 46 PO 4 19 D GND Al 47 AI 39 D GND 18 PO 0 AI 48 AI 56 PO 1 17 PO 5 AI 49 AI 57 P0 6 16 D GND Al 58 AI 50 D GND 15 P0 2 Al 51 AI 59 5V 14 P0 7 Al 52 AI 60 D GND 13 P0 3 Al 61 Al 53 D GND 12 PFI 11 P2 3 Al 54 Al 62 PFI 0 P1 0 11 PFI 10 P2 2 Al 55 Al 63 PFI 1 P1 1 10 D GND Al GND AI GND D GND 9 PFI 2 P1 2 Al 72 Al 64 5V 8 PFI 3 P1 3 AI 65 Al 73 D GND 7 PFI 4 P1 4 Al 66 Al 74 PFI 5 P1 5 6 PFI 13 P2 5 Al 75 Al 67 PFI 6 P1 6 5 PFI 15 P2 7 Al 68 Al 76 D GND 4 PFI 7 P1 7 AI 69 Al 77 PFI 9 P2 1 3 PFI 8 P2 0 Al 78 Al 70 PFI 12 P2 4 2 D GND Al 71 Al 79 PFI 14 P2 6 1 D GND Lo NC No Connect CONNECTOR 1 CONNECTOR 0 Al 16 79 Al 0 15 TERMINAL 68 TERMINAL 35 TERMINAL 68 TERMINAL 35 of a TERMINAL 34 TERMINAL 1 TERMINAL 34 TERMINAL 1 Figure A 16 USB 6225 Mass Termination Pinout M Series User Manual A 40 ni com Appendix Device Specific Information Table A 9 Default NI DAQmx Counter Timer Pins Default Connector 0 Pin Number Counter Timer Signal Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 PFI 10 CTR 0 OUT 2 PFI 12 CTROA 37 PFI 8 CTROZ 3 PFI 9 CTROB 45 PFI 10 CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR
305. l Output Signal e Counter n TC Signal e Frequency Output Signal In this section n refers to either Counter 0 or 1 For example Counter n Source refers to two signals Counter 0 Source the source input to Counter 0 and Counter 1 Source the source input to Counter 1 National Instruments Corporation 7 25 M Series User Manual Chapter 7 Counters Counter n Source Signal The selected edge of the Counter n Source signal increments and decrements the counter value depending on the application the counter is performing Table 7 3 lists how this terminal is used in various applications Table 7 3 Counter Applications and Counter n Source Application Purpose of Source Terminal Pulse Generation Counter Timebase One Counter Time Measurements Counter Timebase Two Counter Time Measurements Input Terminal Non Buffered Edge Counting Input Terminal Buffered Edge Counting Input Terminal Two Edge Separation Counter Timebase Routing a Signal to Counter n Source Each counter has independent input selectors for the Counter n Source signal Any of the following signals can be routed to the Counter n Source input e 80 MHz Timebase e 20 MHz Timebase e 100 kHz Timebase e RTSI lt 0 7 gt e PFI lt 0 15 gt e PXI_CLK10 e PXISTAR e Analog Comparison Event In addition Counter 1 TC or Counter Gate can be routed to Counter 0 Source Counter 0 TC or Counter 0 Gate can be routed to Counter 1 So
306. lacing the fuse on the USB 6259 Screw Terminal National Instruments Corporation A 113 M Series User Manual Appendix Device Specific Information USB 6259 BNC USB 6259 BNC Pinout Figure A 46 shows the pinout of the USB 6259 BNC For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information DIGITAL AND TIMING I O POWER 5 V PFI 0 P1 0 PFI 1 P1 4 PFI 2 P1 2 PFI 3 P1 3 16 Inputs NEUSE 6259 ORE DIGITAL AND TIMING 1 0 PFI 6 P1 6 PFI 7 P1 7 USER 1 USER 2 NAME NAME A A USER 1 fo aus user TT ee sv IM e ANALOG OUTPUT ro A00 AO A0 2 AO 3 Dan I m Sas IS ST ro OW ro ros N Pos ANALOG INPUT ocno Q CN cwo AIO All Al2 AI3 P04 i ro Po 16 me TL COO eos ono Ol PTD o ono eri sezo DM 20 23 ocno MI PIM o oxo PFI 12 P2 4 w io PFI 13 P2 5 Hi an PFI 14 P2 6 Hi 1 doi PFI 15 P2 7 fi Ht me P0 27 D enD i ees D enD hail mee weno mee aisense Q ULL Po 31 cHs ono A ieee INSTRUMENTS PINS TRUMER Figure A 46 USB 6259 BNC Top
307. les to connect timing and synchronization signals among PCI devices such as M Series E Series CAN and other measurement vision and motion devices Since PXI devices use PXI backplane signals for timing and synchronization no cables are required Cables In most applications you can use the following cables e SHC68 68 EPM High performance cable designed specifically for M Series devices It has individual bundles separating analog and digital signals Each differential analog input channel is routed on an individually shielded twisted pair of wires Analog outputs are also individually shielded e SHC68 68 Lower cost shielded cable with 34 twisted pairs of wire e RC68 68 Highly flexible unshielded ribbon cable Custom Cabling and Connectivity The CA 1000 is a configurable enclosure that gives user defined connectivity and flexibility through customized panelettes Visit ni com for more information about the CA 1000 Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more information about custom cabling solutions NI recommends that you use the SHC68 68 EPM cable however an SHC68 68 EP cable will work with M Series devices National Instruments Corporation A 135 M Series User Manual Appendix Device Specific Information USB 6281 Screw Terminal USB 6281 Screw Terminal Pinout Figure A 29 shows the pinout of the USB 6281 Screw Terminal For a detailed description of each signal
308. ls In general how the input and other internal signals get used to generate output signals such as the convert signal Output Timing Output timing refers to the timing parameters related to exporting signals internal to the device to a terminal for external use B 1 M Series User Manual Appendix B Timing Diagrams Figure B 1 is a simplified model of the M Series analog input timing engine i POUT m Selected Reference Trigger Reference Trigger Terminal gt e a D gt Terminal o i gt Start Tri POUT Terminal gt lt art Tigger gt gt Terminal Selected Start Trigger 5 POUT LS gt gt RTSI Terminal S Selected Pause Trigger i Se Pause Trigger and Other Counters Terminal Sl i gt Sample Clock Timebase rR and Such of Timer Core T Sync Sample Clock Timebase as POUT OH gt gt Terminal SI_TC y p_Al_Convert POUT Convert Clock Timebase ole SI2_TC Counter T Sync Convert Clock Timebase a Start D Terminal gt e 5 Selected Sample Clock Terminal at 6 D POUT M Series User Manual Figure B 1 M Series Analog Input Timing Engine The following signals are used in Figure B 1 and in the following sections e Terminal Refers to any device terminal such as PFI or RTSI These terminals are used as inputs and as outputs for signals
309. mebase and the Sample Clock Timebase timing level for synchronization to each clock Once the Convert Clock Timebase timing domain has received a valid Start Trigger the AI timing engine is ready to begin generating converts as soon as it receives a Sample Clock beginning of a sample Once the Sample Clock Timebase domain has received a valid Start Trigger the AI timing engine is ready to begin generating Sample Clocks M Series User Manual B 10 ni com Appendix B Timing Diagrams Terminal Selected Reference Trigger Reference Trigger Ss Terminal e Ji POUT Terminal Terminal o RTSI Selected Pause Trigger Terminal Le 99 e D Pause Trigger SI Start Terminal e lt SI f Sample Clock Timebase Gunter lt Block Sync Sample Clock Timebase OF gt e gt Terminal SI_TC y p_Al_Convert La SI2 Convert Clock Timebase Counter SI2_TC Block gt Sync Convert Clock Timebase 1 Start Selected Sample Clock Terminal Le gt D Terminal Figure B 9 Convert Clock Timebase Timing and the Analog Input Timing Engine si 1 hs m Selected Start Trigger i 1 TER tis gt it Sync Convert Clock Timebase W Co i ihe gt Start Trigger a t7 POUT Figure B 10 Convert Clock Timebase Timing Di
310. mentation Amplifier See channel A specification prepared by Microsoft Intel and other PC related companies that result in PCs with plug in devices that can be fully configured in software without jumpers or switches on the devices The technique used on a DAQ device to acquire a programmed number of samples after trigger conditions are met An instrument that provides one or more sources of AC or DC power Also known as power supply Parts per million The technique used on a DAQ device to keep a continuous buffer filled with data so that when the trigger conditions are met the sample includes the data leading up to the trigger condition A signal whose amplitude deviates from zero for a short period of time The time from the rising to the falling slope of a pulse at 50 amplitude A rugged open system for modular instrumentation based on CompactPCI with special mechanical electrical and software features The PXIbus standard was originally developed by National Instruments in 1997 and is now managed by the PXIbus Systems Alliance PCI Express eXtensions for Instrumentation The PXI implementation of PCI Express a scalable full simplex serial bus standard that operates at 2 5 Gbps and offers both asynchronous and isochronous data transfers G 14 ni com PXI_STAR PXIe Q quadrature encoder range real time RSE RTSI RTSI bus Glossary A special set of trigger lines in the PXI backplane for hig
311. mized panelettes Visit ni com for more information about the CA 1000 Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more information about custom cabling solutions NI recommends that you use the SHC68 68 EPM cable however an SHC68 68 EP cable will work with M Series devices M Series User Manual A 50 ni com Appendix Device Specific Information USB 6229 Screw Terminal USB 6229 Screw Terminal Pinout Figure A 18 shows the pinout of the USB 6229 Screw Terminal For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information National Instruments Corporation A 51 M Series User Manual Appendix Device Specific Information AIO AI 8 AI GND AI 1 AI9 AI GND Al2 Al 10 Al GND Al3 Al 11 Al GND Al SENSE Al GND AO 0 AO GND PO 7 PFI 0 P1 0 PFI 1 P1 1 PFI 2 P1 2 PFI 3 P1 3 PFI 4 P1 4 PFI 5 P1 5 PFI 6 P1 6 PFI 7 P1 7 SIT 17 Al4 49 1 Gl 18 Al 42 7 i 50 S S 19 AI GND ee 51 7 S 20 ALS TER 52 Gl 21 Al 13 NES 53 2 S 22 AI GND GND 54 Gl 23 Al6 AT 55 GI 24 Al 14 ES 56 25 AI GND 57 9 AI GND T 26 AI7 AI 19 58 T 27 Al15 Ap 59 28 Al GND 60 12 oo NG
312. mpleting the following steps 1 Launch MAX 2 Select My System Devices and Interfaces NI DAQmx Devices your device 3 Initiate self calibration using one of the following methods e Click Self Calibrate in the upper right corner of MAX e Right click the name of the device in the MAX configuration tree and select Self Calibrate from the drop down menu 3 Note You can also programmatically self calibrate your device with NI DAQmx as described in Device Calibration in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later Device Pinouts Refer to Appendix A Device Specific Information for M Series device pinouts Device Specifications M Series User Manual Refer to the specifications for your device the NMI 622x Specifications the NI 625x Specifications or the NI 628x Specifications available on the NI DAQ Device Document Browser or ni com manuals for more detailed information about M Series devices 1 2 ni com Chapter 1 Getting Started Device Accessories and Cables NI offers a variety of accessories and cables to use with your DAQ device Refer to Appendix A Device Specific Information or ni com for more information Applying the Signal Label to USB 62xx Screw Terminal Devices USB 622x 625x 628x Screw Terminal Devices The supplied signal label can be adhered to the inside cover of the USB 62xx Screw Terminal device with supplied velcro strips as shown in Figure 1 1
313. n event occurred 2 A computer signal indicating that the CPU should suspend its current task to service a designated activity G 10 ni com Loc IRQ kHz kS L LabVIEW LED lowpass filter LSB m M Series mass termination measurement measurement device MHz National Instruments Corporation G 11 Glossary Current output high Current output low See interrupt interrupt request line Kilohertz A unit of frequency 1 kHz 103 1 000 Hz 1 000 samples A graphical programming language Light Emitting Diode A semiconductor light source A filter that passes signals below a cutoff frequency while blocking signals above that frequency Least Significant Bit Meter An architecture for instrumentation class multichannel data acquisition devices based on the earlier E Series architecture with added new features USB or DAQPad devices where all signals flow through 68 pin connectors as opposed to screw terminal or BNC variants The quantitative determination of a physical characteristic In practice measurement is the conversion of a physical quantity or observation to a domain where a human being or computer can determine the value DAQ devices such as the M Series multifunction I O MIO devices SCXI signal conditioning modules and switch modules Megahertz A unit of frequency 1 MHz 10 Hz 1 000 000 Hz M Series User Manual Glossary micro u MIO MI
314. nalog Output Circuitry National Instruments Corporation A 75 M Series User Manual Appendix Device Specific Information Refer to the Connecting Analog Output Signals section of Chapter 5 Analog Output for more information Digital 1 0 and Timing 1 0 You can access digital I O and timing I O signals on the BNC connectors labeled PFI lt 0 7 gt P1 lt 0 7 gt Figure A 35 shows the DIO TIO circuitry on the USB 6251 BNC PFI x P1 x A D GND N7 Figure A 35 Digital 1 0 and Timing 1 0 Circuitry Refer to the Connecting Digital 1 0 Signals section of Chapter 6 Digital 1 0 and the Connecting PFI Input Signals section of Chapter 8 PFI for more information APFI You can access the analog programmable function interface signal on the BNC connector labeled APFI 0 Figure A 36 shows the APFI circuitry on the USB 6251 BNC o _ APF x Al GND N7 Figure A 36 Analog Programmable Function Interface Circuitry Refer to the Triggering with an Analog Source section of Chapter 11 Triggering for more information M Series User Manual A 76 ni com Appendix Device Specific Information USER 1 and USER 2 The USER 1 and USER 2 BNC connectors allow you to use a BNC connector for a digital or timing I O signal of your choice The USER 1 and USER 2 BNC connectors are routed internal to the USB 6251 BNC to the USER 1 and USER 2 screw terminals as shown in Figure
315. nc Sample Clock Timebase Bleek OF D gt Terminal SLTCy p_Al_Convert SI2 Convert Clock Timebase Counter SI2_TC Block Sync Convert Clock Timebase Start 1 tt Terminal gt 5 Selected Sample Clock Seb Terminal Figure B 13 Reference Trigger and the Analog Input Timing Engine toa gt Selected Reference Trigger gt i 1 tog aad t Sync Convert Clock Timebase 23 tas gt Reference Trigger tog i gt ta POUT Figure B 14 Reference Trigger Timing Diagram M Series User Manual B 14 ni com Table B 7 Reference Trigger Timing Appendix B Timing Diagrams Time Description Line Min ns Max ns too Delay to the Selected Reference Trigger PFI 3 6 8 9 RTSI 3 4 8 4 STAR 2 9 5 6 b3 Selected Reference Trigger Setup 1 5 to Sync Convert Clock Timebase tog Selected Reference Trigger Hold 0 to Sync Convert Clock Timebase tos Sync Convert Clock Timebase to 0 9 2 2 Reference Trigger t26 Reference Trigger to POUT PFI 0 8 2 3 RTSI 0 8 1 9 Sample Clock Sample Clock signals the start of a sample which in turn is a set of converts Sample Clock is generated from external or internal sources The main internal source is the terminal count TC of the SI counter that runs on the Sample Clock Timebase signal All the
316. nced signal sources Some common examples of floating signal sources are batteries transformers and thermocouples Frequency Output signal The number of alternating signals that occur per unit time Feet 1 A built in execution element comparable to an operator function or statement in a conventional language 2 A set of software instructions executed by a single line of code that may have input and or output parameters and returns a value when executed An unwanted signal excursion of short duration that is usually unavoidable See ground 1 A pin 2 An electrically neutral wire that has the same potential as the surrounding earth Normally a noncurrent carrying circuit intended for safety 3 A common reference point for an electrical system The physical components of a computer system such as the circuit boards plug in devices chassis enclosures peripherals and cables A form of triggering where you set the start time of an acquisition and gather data at a known position in time relative to a trigger signal M Series User Manual Glossary hysteresis VO impedance in instrument driver instrumentation amplifier interchannel delay interface interrupt interrupt request line M Series User Manual 1 Hertz The SI unit for measurement of frequency One hertz Hz equals one cycle per second 2 The number of scans read or updates written per second Lag between making a change
317. nd still allow for adequate settling time If the AI Sample Clock rate is too fast to allow for this 10 us of padding NI DAQmx chooses the conversion rate so that the AI Convert Clock pulses are evenly spaced throughout the sample With NI DAQm x 7 3 the driver chooses a conversion rate so the AI Convert Clock pulses are evenly spaced throughout the sample This allows for the maximum settling time between conversions To approximate simultaneous sampling manually increase the conversion rate To explicitly specify the conversion rate use AI Convert Clock Rate DAQmx Timing property node or function A Caution Setting the conversion rate higher than the maximum rate specified for your device will result in errors Using an Internal Source One of the following internal signals can drive AI Convert Clock e AT Convert Clock Timebase divided down e Counter n Internal Output A programmable internal counter divides down the AI Convert Clock Timebase to generate AI Convert Clock The counter is started by AI Sample Clock and continues to count down to zero produces an AI Convert Clock reloads itself and repeats the process until the sample is finished It then reloads itself in preparation for the next AI Sample Clock pulse Using an External Source Use one of the following external signals as the source of AI Convert Clock e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXI STAR e Analog Comparison Event an analog trigger
318. nd Clock Generation for more information about PXI clock and trigger signals PXI and PXI Express M Series User Manual NI PXI M Series devices can be installed in any PXI chassis and most slots of PXI Express hybrid chassis NI PXI Express M Series devices can be installed in any PXI Express slot in PXI Express chassis PXI specifications are developed by the PXI System Alliance www pxisa org Using the terminology of the PXI specifications some NI PXI M Series devices are 3U Hybrid Slot Compatible PXI 1 Peripheral Modules Refer to your device specifications to see if your PXI M Series device is hybrid slot compatible 3U designates devices that are 100 mm tall as opposed to the taller 6U modules Hybrid slot compatible defines where the device can be installed PXI M Series devices can be installed in the following chassis and slots e PXI chassis PXI M Series devices can be installed in any peripheral slot of a PXI chassis 10 2 ni com Chapter 10 Bus Interface e PXI Express chassis PXI M Series devices can be installed in the following PXI Express chassis slots PXI 1 slots Accepts all PXI modules PXI hybrid slots Accepts PXI modules that are hybrid slot compatible or PXI Express modules PXI Express slots Accepts PXI Express modules PXI 1 devices use PCI signaling to communicate to the host controller as opposed to PCI Express signaling Peripheral devices are installed in peripheral
319. nd RTSI represent the fastest and slowest terminal routing within the trigger group for a given condition maximum or minimum timing This difference can be useful when two external signals will be used together and the relative timing between the signals is important Selected Gate and Selected Source Delays Tables B 27 and B 28 show the timing for the Selected Source and Selected Gate internal signals Selected Source is used to clock the 32 bit counter Selected Gate drives the Gate Logic which generates the Counter Enable signal All internal counter timing is referenced to these two signals Any internal signal refers to signals with _i from the previous table or signals coming from another subsystem inside the M Series device It does not include internal timebases or the PXI_CLK10 PFI_i RTSIi or PXI_STAR_i Selected_Gate pit Figure B 43 Selected Gate Delays Timing Diagram Table B 27 Selected Gate Delays Timing Time From To Min ns Max ns ty PFI_i RTSI_i PXI_ STAR i or any internal signal Selected Gate 1 0 6 0 National Instruments Corporation B 37 M Series User Manual Appendix B Timing Diagrams PFI_i RTSL_i or PXI_LSTAR_i Selected_Source lt gt t3 13 Table B 28 Selected Source Delays Timing Figure B 44 Selected Sou
320. nd entering the info code rdscav for more information BNC Accessories You can use the SHC68 68 EPM shielded cable to connect your DAQ device to BNC accessories such as the following e BNC 2110 Provides BNC connectivity to all analog signals some digital signals and spring terminals for other digital signals e BNC 2111 Provides BNC connectivity to 16 single ended analog input signals two analog output signals five DIO PFI signals and the external reference voltage for analog output A 48 ni com Appendix Device Specific Information e __ BNC 2120 Similar to the BNC 2110 and also has a built in function generator quadrature encoder temperature reference and thermocouple connector e __ BNC 2090A Desktop rack mountable device with 22 BNCs for connecting analog digital and timing signals You can use one BNC accessory with the signals on either connector of your M Series device You can use two BNC accessories with one M Series device by using both connectors Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks Use an SHC68 68 EPM shielded cable to connect an M Series device to a connector block such as the following e CB 68LP and CB 68LPR unshielded connector blocks e SCC 68 I O connector block with screw terminals general breadboard area bus terminals and four expansion slots for SCC signal conditioning modules e SCB 68 shielded connector blo
321. ndex count enable delays B 38 counter gating modes B 44 counter input requirements B 39 counter output delays B 43 counter pin to internal signal delays B 36 counters B 36 digital I O B 31 digital waveform acquisition B 31 digital waveform generation B 34 gate pulse width input requirements B 40 gate to source setup and hold B 40 input timing verification B 26 internal analog output timing B 23 output timing B 28 pulse width input requirements B 39 quadrature encoder B 44 selected gate to count enable delays B 38 selected gate to selected source delays B 37 source period input requirements B 39 two pulse encoder B 44 timing output signals exporting using PFI terminals 8 2 training xx training and certification NI resources E 1 transducers 2 3 trigger 11 1 analog actions 11 3 arm start 7 31 pause 7 32 PXI 9 9 PXI_STAR 9 9 Star Trigger 9 9 start 7 32 triggering 11 1 analog accuracy 11 7 analog actions 11 3 analog edge 11 4 analog edge with hysteresis 11 5 analog input 4 11 analog input channels 11 3 M Series User Manual 1 16 analog types 11 4 analog window 11 6 APFI terminals 11 2 counter 7 31 digital waveform 6 3 with a digital source 11 1 with an analog source 11 2 troubleshooting analog input C 1 analog output C 3 counters C 3 installation C 3 NI resources E 1 two signal edge separation measurement 7 17 buffered 7 18 single 7 18 types of an
322. ndix Device Specific Information Al 4 Al 12 Al GND AI5 Al 13 Al GND Al6 Al 14 Al GND Al7 Al 15 Al GND APFI O AI GND AO 1 AO GND 22220222 AAAA AlO 1 A18 2 AIGND 3 Ald 4 AI9 5 AIGND 6 Al2 7 Al 10 8 AIGND 9 A13 10 AI 11 11 AIGND 12 AISENSE 13 AIGND 14 AO 0 15 AO GND 16 P0 0 Es S P0 1 66 S PO 2 67 S P0 3 68 P0 4 69 S PO 5 70 P06 71 PO 7 72 PFIO P1 0 73 N PFI 1 P1 1 74 PFI2 P12 75 S PFI 3 P1 3 76 S PFI 4 P1 4 77 S PFI 5 P1 5 78 S PFI 6 P1 6 79 S PFI 7 P1 7 80 PFI 8 P2 0 D GND PFI 9 P2 1 D GND PFI 10 P2 2 D GND PFI 11 P2 3 D GND PFI 12 P2 4 D GND PFI 13 P2 5 D GND PFI 14 P2 6 D GND PFI 15 P2 7 5V Al 16 33 Al 24 34 Al GND 35 Al 17 36 Al 25 37 AI GND 38 Al18 39 Al 26 40 Al GND 41 Al 19 42 Al 27 43 Al GND 44 AI SENSE 2 45 Al GND 46 AO 2 47 AO GND 48 Pos 97N P0 9 98 IS P010 99 IS P0 11 100 IS P0 12 101 IS P0 13 102 IS P0 14 103 IS P0 15 104 IS PO 16 1059 P0 17 106 IS P0 18 107 IS P0 19 108 IS P0 20 109 IS P0 21 110 IS P0 22 111 19 P0 23 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 Al 20 Al 28 Al GN
323. nel in a sample with a different input range A D Converter The analog to digital converter ADC digitizes the AI signal by converting the analog voltage into a digital number e AI FIFO M Series devices can perform both single and multiple A D conversions of a fixed or infinite number of samples A large first in first out FIFO buffer holds data during AI acquisitions to ensure that no data is lost M Series devices can handle multiple A D conversion operations with DMA interrupts or programmed I O Analog Input Range M Series User Manual Input range refers to the set of input voltages that an analog input channel can digitize with the specified accuracy The NI PGIA amplifies or attenuates the AI signal depending on the input range You can individually program the input range of each AI channel on your M Series device The input range affects the resolution of the M Series device for an AI channel Resolution refers to the voltage of one ADC code For example a 16 bit ADC converts analog inputs into one of 65 536 2 codes that is one of 65 536 possible digital values These values are spread fairly evenly across the input range So for an input range of 10 V to 10 V the voltage of each code of a 16 bit ADC is 10V 10V _ E oP 305u V M Series devices use a calibration method that requires some codes typically about 5 of the codes to lie outside of the specified range This calibration method improves
324. nes e When using a cable shield use separate shields for the analog and digital sections of the cable Failure to do so results in noise coupling into the analog signals from transient digital signals For more information about the connectors used for DAQ devices refer to the KnowledgeBase document Specifications and Manufacturers for Board Mating Connectors by going toni com info and entering the info code rdspmb Programming Devices in Software M Series User Manual National Instruments measurement devices are packaged with NI DAQ driver software an extensive library of functions and VIs you can call from your application software such as LabVIEW or LabWindows CVI to program all the features of your NI measurement devices Driver software has an application programming interface API which is a library of VIs functions classes attributes and properties for creating applications for your device 2 6 ni com Chapter 2 DAQ System Overview NI DAQ 7 3 and later includes two NI DAQ drivers Traditional NI DAQ Legacy and NI DAQmx M Series devices use the NI DAQm x driver Each driver has its own API hardware configuration and software configuration Refer to the DAQ Getting Started Guide for more information about the two drivers NI DAQmx includes a collection of programming examples to help you get started developing an application You can modify example code and save it in an application You can use examples
325. ng PCI devices such as M Series E Series CAN and other measurement vision and motion devices Since PXI devices use PXI backplane signals for timing and synchronization no cables are required 1 TB 2706 uses Connector 0 of your PXI device After a TB 2706 is installed Connector 1 cannot be used M Series User Manual A 88 ni com Appendix Device Specific Information Cables In most applications you can use the following cables e SHC68 68 EPM High performance cable designed specifically for M Series devices It has individual bundles separating analog and digital signals Each differential analog input channel is routed on an individually shielded twisted pair of wires Analog outputs are also individually shielded e SHC68 68 Lower cost shielded cable with 34 twisted pairs of wire e RC68 68 Highly flexible unshielded ribbon cable Custom Cabling and Connectivity The CA 1000 is a configurable enclosure that gives user defined connectivity and flexibility through customized panelettes Visit ni com for more information about the CA 1000 Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more information about custom cabling solutions NI recommends that you use the SHC68 68 EPM cable however an SHC68 68 EP cable will work with M Series devices National Instruments Corporation A 89 M Series User Manual Appendix Device Specific Information NI 6255 The followin
326. ng AI Ground Reference Settings in Software section for more information about the DAQ Assistant Field Wiring Considerations M Series User Manual Environmental noise can seriously affect the measurement accuracy of the device if you do not take proper care when running signal wires between signal sources and the device The following recommendations apply mainly to AI signal routing to the device although they also apply to signal routing in general Minimize noise pickup and maximize measurement accuracy by taking the following precautions e Use DIFF AI connections to reject common mode noise e Use individually shielded twisted pair wires to connect AI signals to the device With this type of wire the signals attached to the positive and negative input channels are twisted together and then covered with a shield You then connect this shield only at one point to the signal source ground This kind of connection is required for signals traveling through areas with large magnetic fields or high electromagnetic interference Refer to the NI Developer Zone document Field Wiring and Noise Considerations for Analog Signals for more information To access this document go to ni com info and enter the info code rdfwn3 4 24 ni com Chapter 4 Analog Input Analog Input Timing Signals In order to provide all of the timing functionality described throughout this section M Series devices have a flexible timing engine Figur
327. ning modules e SCB 68 shielded connector block with temperature sensor e TBX 68 DIN rail mountable connector block e TB 2706 front panel mounted terminal block for PXI M Series devices You can use one screw terminal accessory with the signals on either connector of your M Series device You can use two screw terminal accessories with one M Series device by using both connectors RTSI Cables Use RTSI bus cables to connect timing and synchronization signals among PCI devices such as M Series E Series CAN and other measurement vision and motion devices Since PXI devices use PXI backplane signals for timing and synchronization no cables are required TB 2706 uses Connector 0 of your PXI device After a TB 2706 is installed Connector 1 cannot be used National Instruments Corporation A 147 M Series User Manual Appendix Device Specific Information Cables In most applications you can use the following cables e SHC68 68 EPM Hich performance cable designed specifically for M Series devices It has individual bundles separating analog and digital signals Each differential analog input channel is routed on an individually shielded twisted pair of wires Analog outputs are also individually shielded e SHC68 68 Lower cost shielded cable with 34 twisted pairs of wire e RC68 68 Highly flexible unshielded ribbon cable Custom Cabling and Connectivity The CA 1000 is a configurable enclosure that gives user def
328. nout A 65 PCTI PClIe PXI PXIe 6259 pinout A 105 PCI PXI 6221 68 pin pinout A 7 PCI PXI 6225 pinout A 30 PCI PXI 6229 pinout A 45 PCI PXI 6255 pinout A 90 PCI PXI 6281 pinout A 131 PCI PXI 6289 pinout A 149 PCI 6221 37 pin pinout A 12 USB 6221 BNC pinout A 17 M Series User Manual 1 8 CG JSB 6221 Screw Terminal pinout A 15 JSB 6225 Mass Termination pinout A 39 JSB 6225 Screw Terminal pinout A 36 SB 6229 BNC pinout A 54 SB 6229 Screw Terminal pinout A 51 SB 6251 BNC pinout A 72 SB 6251 Mass Termination pinout A 79 JSB 6251 Screw Terminal pinout A 70 JSB 6255 Mass Termination pinout A 99 USB 6255 Screw Terminal pinout A 96 USB 6259 BNC pinout A 114 USB 6259 Mass Termination pinout A 121 USB 6259 Screw Terminal pinout A 111 USB 6281 Mass Termination pinout A 138 USB 6281 Screw Terminal pinout A 136 USB 6289 Mass Termination pinout A 158 USB 6289 Screw Terminal pinout A 155 I O protection 6 7 8 6 improving analog trigger accuracy 11 7 input signals using PFI terminals as 8 2 using RTSI terminals as 9 6 input timing analog input B 4 insertion of grounded channels between signal channels 4 8 installation hardware 1 1 NI DAQ 1 1 other software 1 1 troubleshooting C 3 instrument drivers NI resources E 1 instrumentation amplifier 4 1 interface bus 10 1 internal timing analog input B 5 interrupt request as a transfer method 10 4 COG es ee
329. nput signal can share a common reference point with other signals DIFF input connections are recommended for greater signal integrity for any input signal that does not meet the preceding conditions In the single ended modes more electrostatic and magnetic noise couples into the signal connections than in DIFF configurations The coupling is the result of differences in the signal path Magnetic coupling is proportional to the area between the two signal conductors Electrical coupling is a function of how much the electric field differs between the two conductors With this type of connection the NI PGIA rejects both the common mode noise in the signal and the ground potential difference between the signal source and the device ground Refer to the Using Non Referenced Single Ended NRSE Connections for Ground Referenced Signal Sources section for more information about NRSE connections When to Use Referenced Single Ended RSE Connections with Ground Referenced Signal Sources Do not use RSE connections with ground referenced signal sources Use NRSE or DIFF connections instead As shown in the bottom rightmost cell of Table 4 3 there can be a potential difference between AI GND and the ground of the sensor In RSE mode this ground loop causes measurement errors National Instruments Corporation 4 21 M Series User Manual Chapter 4 Analog Input Using Differential Connections for Ground Referenced Signal Sources Figure
330. ns for more detailed information about the USB 6255 Screw Terminal device USB 6255 Screw Terminal LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6255 Screw Terminal LEDs USB 6255 Screw Terminal Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 3 Connector and LED Information for information about replacing the fuse on the USB 6255 Screw Terminal A 98 ni com Appendix Device Specific Information USB 6255 Mass Termination USB 6255 Mass Termination Pinout Figure A 43 shows the pinout of the USB 6255 Mass Termination device For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information ay Note M Series devices may be used with most E Series accessories However some E Series accessories use different terminal names Refer to the M Series and E Series Pinout Comparison section of Chapter 3 Connector and LED Information for more information National Instruments Corporation A 99 M Series User Manual Appendix Device Specific Information M Series User Manual EN Al 24 Al 16 Al 8 34 AIO Al 17 Al 25 AI 1 33 AI GND Al 18 Al 26 Al GND 32 AI9 Al 27 A
331. ntable device with 22 BNCs for connecting analog digital and timing signals You can use one BNC accessory with the signals on either connector of your M Series device You can use two BNC accessories with one M Series device by using both connectors Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks Use an SH68 68 EPM shielded cable to connect an M Series device to a connector block such as the following e CB 68LP and CB 68LPR unshielded connector blocks e SCC 68 I O connector block with screw terminals general breadboard area bus terminals and four expansion slots for SCC signal conditioning modules e SCB 68 shielded connector block with temperature sensor e TBX 68 DIN rail mountable connector block A 124 ni com Appendix Device Specific Information You can use one screw terminal accessory with the signals on either connector of your M Series device You can use two screw terminal accessories with one M Series device by using both connectors Cables In most applications you can use the following cables e SH68 68 EPM High performance cable with individual bundles separating analog and digital signals Each differential analog input channel is routed on an individually shielded twisted pair of wires Analog outputs are also individually shielded e R68 68 Highly flexible unshielded ribbon cable Custom Cabling and Connectivity The CA 1000 is a configu
332. nter Filters sise etais fesait se 7 32 Prescaling onerosi a tnt MUR aay th a in has 7 34 Duplicate Count Prevention 7 34 Example Application That Works Correctly No Duplicate Counting 7 35 Example Application That Works Incorrectly Duplicate Counting 7 36 Example Application That Prevents Duplicate Count 7 36 When To Use Duplicate Count Prevention 0 eee eeeeeeeeeeeeees 7 37 Enabling Duplicate Count Prevention in NI DAQmx 7 37 Synchronization ModeS s 0 s isceseessscssassgsacdasesuadescsnctasssasiesans Sessaeestusetisassnees 7 37 80 MHz Source Mode 7 38 Other Internal Source Mode 0 eee eeeeceeseceeeceecnseeeeeeseeeesseeneees 7 39 External Source Mode 7 39 Chapter 8 PFI Using PFI Terminals as Timing Input Signals 00 eee eeeceeeeseceeetseeneeeseeseees 8 2 Exporting Timing Output Signals Using PFI Terminals ee eee eee eeeeeeeeees 8 2 Using PFI Terminals as Static Digital I Os 0 0 c ee ccsceseeseeesseesceseseeseseecseeseseesaeeees 8 3 Connecting PFI Input Signals ss ses 8 4 PEL Pilters ss ok es me linea ioe cane eects ie nectar ated 8 4 VO Protections seeen Scents does a a ended beens eee deen Late oie nen Dewees 8 6 Programmable Power Up States 8 6 M Series User Manual X ni com Contents Chapter 9 Digital Routing and Clock Generation Clock ROUTINE 3 rer lee ns been Penn eae ne 9 1 80 MHZ Timebase Essen
333. nts e Edge counting e Pulse width measurements e Two signal edge separation measurements All other measurements use edge gating mode Quadrature and Two Pulse Encoder Timing Counter n A Counter n B and Counter n Z described in the Counter n A Counter n B and Counter n Z Signals section of Chapter 7 Counters are used in position measurements using quadrature encoder or two pulse encoder counting modes Table B 35 shows the timing requirements for these signals Counter nA Ln ae P o 1 Ho i DE Counter n Z itis Hg Figure B 51 Quadrature and Two Pulse Encoder Timing Diagrams M Series User Manual B 44 ni com Appendix B Timing Diagrams Table B 35 Quadrature and Two Pulse Encoder Timing Time Description Min ns Max ns ti4 Counter n A Period 50 0 tis Counter n A Pulse Width 25 0 te Counter n B Period 50 0 ti7 Counter n B Pulse Width 25 0 tig Counter n Z Pulse Width 25 0 tig Delay from Counter n A to Counter n B 25 0 t20 Delay from Counter n B to Counter n A 25 0 The times in this table are measured at the pin of the M Series device For example t4 specifies the minimum period of a signal driving a PFI RTSI or PXI_STAR pin when that signal is internally routed to Counter n A Clock Generation Timing Diagrams Table B
334. o USER 1 BNC The designated space below each USER lt 1 2 gt BNC is for marking or labeling signal names USB 6259 BNC Specifications Refer to the NI 625x Specifications for more detailed information about the USB 6259 BNC device USB 6259 BNC LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6259 BNC LEDs USB 6259 BNC Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 3 Connector and LED Information for information about replacing the fuse on the USB 6259 BNC A 120 ni com Appendix Device Specific Information USB 6259 Mass Termination USB 6259 Mass Termination Pinout Figure A 55 shows the pinout of the USB 6259 Mass Termination device For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information ay Note M Series devices may be used with most E Series accessories However some E Series accessories use different terminal names Refer to the M Series and E Series Pinout Comparison section of Chapter 3 Connector and LED Information for more information National Instruments Corporation A 121 M Series User Manual Appendix M Series User Manual Device Specific Information Me Al8 34168 AIO Al 1 3
335. o connect an M Series device to a connector block such as the following National Instruments Corporation A 63 M Series User Manual Appendix Device Specific Information CB 68LP and CB 68LPR unshielded connector blocks e SCC 68 I O connector block with screw terminals general breadboard area bus terminals and four expansion slots for SCC signal conditioning modules e SCB 68 shielded connector block with temperature sensor e TBX 68 DIN rail mountable connector block e TB 2706 front panel mounted terminal block for PXI M Series devices RTSI Cables Use RTSI bus cables to connect timing and synchronization signals among PCI devices such as M Series E Series CAN and other measurement vision and motion devices Since PXI devices use PXI backplane signals for timing and synchronization no cables are required Cables In most applications you can use the following cables e SHC68 68 EPM High performance cable designed specifically for M Series devices It has individual bundles separating analog and digital signals Each differential analog input channel is routed on an individually shielded twisted pair of wires Analog outputs are also individually shielded e SHC68 68 Lower cost shielded cable with 34 twisted pairs of wire e RC68 68 Highly flexible unshielded ribbon cable Custom Cabling and Connectivity The CA 1000 is a configurable enclosure that gives user defined connectivity and flexibility throug
336. o connect your M Series device to an SCXI chassis use the SCXI 1349 adapter and an SHC68 68 EPM cable You also can use an M Series device to control the SCXI section of a PXI SCXI combination chassis such as the PXI 1010 or PXI 1011 The M Series device in the rightmost PXI slot controls the SCXI devices No cables or adapters are necessary Refer to the SCXT Advisor available by going to ni com info and entering the info code rdscad for more information SCC Accessories SCC provides portable modular signal conditioning to your DAQ system To connect your M Series device to an SCC module carrier such as the SC 2345 SC 2350 or SCC 68 use an SHC68 68 EPM shielded cable Refer to the SCC Advisor available by going to ni com info and entering the info code rdscav for more information BNC Accessories You can use the SHC68 68 EPM shielded cable to connect your DAQ device to BNC accessories such as the following e BNC 2110 Provides BNC connectivity to all analog signals some digital signals and spring terminals for other digital signals e BNC 2111 Provides BNC connectivity to 16 single ended analog input signals two analog output signals five DIO PFI signals and the external reference voltage for analog output e BNC 2120 Similar to the BNC 21 10 and also has a built in function generator quadrature encoder temperature reference and thermocouple connector e BNC 2090A Desktop rack mountable device with 2
337. of the signal The source can be any of the following signals e AI Sample Clock ai SampleClock e AT Convert Clock ai ConvertClock e AO Sample Clock ao SampleClock e Counter n Internal Output e Frequency Output e DI Change Detection Output 6 4 ni com Chapter 6 Digital I O Several other internal signals can be routed to DI Sample Clock through RTSI Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later for more information Using an External Source You can route any of the following signals as DI Sample Clock e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXI STAR e Analog Comparison Event an analog trigger You can sample data on the rising or falling edge of DI Sample Clock Routing DI Sample Clock to an Output Terminal You can route DI Sample Clock out to any PFI terminal The PFI circuitry inverts the polarity of DI Sample Clock before driving the PFI terminal Digital Waveform Generation You can generate digital waveforms on the Port 0 DIO lines The DO waveform generation FIFO stores the digital samples M Series devices have a DMA controller dedicated to moving data from the system memory to the DO waveform generation FIFO The DAQ device moves samples from the FIFO to the DIO terminals on each rising or falling edge of a clock signal DO Sample Clock You can configure each DIO signal to be an input a static output or a digital waveform generation output The
338. og box This icon denotes a note which alerts you to important information This icon denotes a caution which advises you of precautions to take to avoid injury data loss or a system crash When this symbol is marked on a product refer to the Read Me First Safety and Radio Frequency Interference for information about precautions to take Bold text denotes items that you must select or click in the software such as menu items and dialog box options Bold text also denotes parameter names Italic text denotes variables emphasis a cross reference or an introduction to a key concept Italic text also denotes text that is a placeholder for a word or value that you must supply Text in this font denotes text or characters that you should enter from the keyboard sections of code programming examples and syntax examples This font is also used for the proper names of disk drives paths directories programs subprograms subroutines device names functions operations variables filenames and extensions National Instruments Corporation XV M Series User Manual About This Manual Platform Text in this font denotes a specific platform and indicates that the text following it applies only to that platform Related Documentation Each application software package and driver includes information about writing applications for taking measurements and controlling measurement devices The following references to documents as
339. om To Min ns Max ns ts PFI PEL i 52 6 2 18 2 22 0 RTSI RTSLi 2 0 2 5 5 0 6 0 PXI_STAR PXI_STAR_i 1 5 3 5 ty PFI_i RTSI_i PXI_STAR_i DI Sample Clock 3 5 9 or other internal signal t7 PO PO_i 4 7 20 1 tg DI Sample Clock PFI output 8 0 29 8 to PFI output high PFI output low One period of Two periods of 80 MHz Timebase 80 MHz Timebase The delay ranges given for PFI and RTSI represent the fastest and slowest terminal routing within the trigger group for a given condition maximum or minimum timing This difference can be useful when two external signals will be used together and the relative timing between the signals is important When DI Sample Clock is routed to a PFI output pin the pulse width of the output is independent of the pulse width of the input The pulse width is specified in a number of periods of the 80 MHz Timebase Table B 23 DI Timing Requirements Time Requirement Condition Min ns Max ns ty PFI RTSI or PXI_STAR When used as DI Sample Clock NI 622x devices 1000 0 minimum period NI 625x 628x devices 100 0 ty PFI RTSI or PXI_STAR When used as DI Sample Clock 12 0 minimum pulse width ts Setup time from PO_i to 1 5 DI Sample Clock te Hold time from DI Sample 0 Clock to PO _i National Instruments Corporation B 33 M Series User Manual Appendix B Timing Diagrams Digital Waveform Generation Timing To describe dig
340. ompatible with several BNC accessories e BNC 2110 Provides BNC connectivity to all analog signals some digital signals and spring terminals for other digital signals e BNC 2111 Provides BNC connectivity to 16 single ended analog input signals two analog output signals five DIO PFI signals and the external reference voltage for analog output e BNC 2120 Similar to the BNC 2110 and also has a built in function generator quadrature encoder temperature reference and thermocouple connector e BNC 2090A Desktop rack mountable device with 22 BNCs for connecting analog digital and timing signals You can use the SH68 68 EPM shielded cable to connect Connector 0 of your DAQ device to BNC accessories Using a BNC Accessory with Connector 1 Connector 1 of your device is compatible with BNC 2115 BNC 2115 provides BNC connectivity to 24 of the differential 48 single ended analog input signals on Connector 1 You can use an SH68 68 S cable to connect to the BNC 2115 A 102 ni com Appendix Device Specific Information Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks Use an SH68 68 EPM shielded cable to connect an M Series device to a connector block such as the following e CB 68LP and CB 68LPR unshielded connector blocks e SCC 68 I O connector block with screw terminals general breadboard area bus terminals and four expansion slots for SCC signal conditi
341. on Figure 7 24 shows a generation of two pulses with a pulse delay of five and a pulse width of three using the rising edge of Source GATE Start Trigger M OUT SOURCE WU UUU oM Figure 7 24 Retriggerable Single Pulse Generation For information about connecting counter signals refer to the Default Counter Timer Pinouts section Pulse Train Generation Continuous Pulse Train Generation This function generates a train of pulses with programmable frequency and duty cycle The pulses appear on the Counter n Internal Output signal of the counter You can specify a delay from when the counter is armed to the beginning of the pulse train The delay is measured in terms of a number of active edges of the Source input You specify the high and low pulse widths of the output signal The pulse widths are also measured in terms of a number of active edges of the Source input You also can specify the active edge of the Source input rising or falling The counter can begin the pulse train generation as soon as the counter is armed or in response to a hardware Start Trigger You can route the Start Trigger to the Gate input of the counter National Instruments Corporation 7 21 M Series User Manual Chapter 7 Counters M Series User Manual You also can use the Gate input of the
342. on Event J Figure 11 5 Analog Edge Triggering with Hysteresis Rising Slope Example Analog Edge Trigger with Hysteresis Falling Slope When using hysteresis with a falling slope you specify a trigger level and amount of hysteresis The low threshold is the trigger level the high threshold is the trigger level plus the hysteresis National Instruments Corporation 11 5 M Series User Manual Chapter 11 Triggering For the trigger to assert the signal must first be above the high threshold then go below the low threshold The trigger stays asserted until the signal returns above the high threshold The output of the trigger detection circuitry is the internal Analog Comparison Event signal as shown in Figure 11 6 First signal must go above high threshold High threshold Level Hysteresis Hysteresis Levelt Hy is Then signal must go below low threshold G before Analog Comparison Event asserts Analog Comparison Event 27 Low threshold Level Figure 11 6 Analog Edge Triggering with Hysteresis Falling Slope Example e Analog Window Triggering An analog window trigger occurs when an analog signal either passes into enters or passes out of leaves a window defined by two voltage levels Specify the levels by setting the window Top value and the window Bottom value Figure 11 7 demonstrates a trigger that asserts when the signal enters the window
343. on section of Chapter 3 Connector and LED Information for more information M Series User Manual A 30 ni com Appendix Device Specific Information eet AIO 68 34 Als Al71 1 35 AI79 AI GND 67 33 Al4 AI 78 2 36 A170 AI9 66 32 AI GND AI 69 3 37 A177 AI 2 65 31 A110 re Al 68 4 38 A176 AI GND 6430 A13 c e AI 75 5 39 A167 Al 11 63 29 Al GND ce ee Al 66 6 40 A174 Al SENSE 62 28 Al4 nm Dr AI 65 7 41 A173 AI 12 61 27 AI GND 57 2 lt AI 72 8 42 A164 AIS 60 26 Al13 GS AI GND 9 43 AI GND AI GND 59 25 A16 AQA A155 10144 ales Al 14 58 24 AI GND AI 54 11 45 ale2 AI7 57 23 Al15 ea FE TERMINAL 35 AL61 12 46 A153 AI GND 56 22 AO0 AI 52 13 47 A160 AO GND 55 21 AO1 TERMINAL 34 TERMINAL1 Al54 14 48 Also AO GND 54 20 NC AI 58 15 49 also D GND 53 19 P0 4 AI 49 16 50 A157 P0 0 52 18 D GND Al 48 17 51 alse P0 5 51 17 Po Al 47 18 52 A139 D GND 50 16 Po 6 Al 38 19 53 A146 P0 2 49 15 D GND Al 37 20 54 Al 45 PO 7 48 14 5V AI 44 21155 A136 P0 3 47 13 D GND TERMINAL 1 TERMINALS AI GND 22 56 Al SENSE
344. onfigurable enclosure that gives user defined connectivity and flexibility through customized panelettes Visit ni com for more information about the CA 1000 Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more information about custom cabling solutions NI recommends that you use the SHC68 68 EPM cable however an SHC68 68 EP cable will work with M Series devices National Instruments Corporation A 69 M Series User Manual Appendix Device Specific Information USB 6251 Screw Terminal USB 6251 Screw Terminal Pinout Figure A 29 shows the pinout of the USB 6251 Screw Terminal For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information AIO 1 P0 0 Al 8 2 PO 1 Al GND 3 PO 2 Al 1 4 P0 3 Al 9 5 P0 4 Al GND 6 P0 5 Al 2 7 P0 6 Al 10 8 PO 7 AI GND 9 PFI 0 P1 0 AI3 10 PFI 1 P1 1 Al 11 11 PFI 2 P1 2 Al GND 12 PFI 3 P1 3 AISENSE 13 PFI 4 P1 4 Al GND 14 PFI 5 P1 5 AO 0 15 PFI 6 P1 6 AO GND 16 PFI 7 P1 7 5 2222222 A 22000A 2220000 O DDDDDO oO D DODODDODDDDODDODDO g PFI 8 P2 0 D GND PFI 9 P2 1 D GND PFI 10 P2 2 D GND PFI 11 P2 3 D GND PFI 12 P2 4 D GND PFI 13 P2 5 D GND PFI 14 P2 6 D GND PFI 15 P2 7 5V
345. ong time The input terminal then changes from low to high but glitches several times When the filter clock has sampled the signal high on N consecutive edges the low to high transition is propagated to the rest of the circuit The value of N depends on the filter setting refer to Table 7 5 Table 7 5 Filters Filtered Input N Filter Clocks Pulse Width Pulse Width Needed to Guaranteed to Guaranteed to Filter Setting Pass Signal Pass Filter Not Pass Filter 125 ns 5 125 ns 100 ns 6 425 us 257 6 425 us 6 400 us 2 56 ms 101 800 2 56 ms 2 54 ms Disabled Tar The filter setting for each input can be configured independently On power up the filters are disabled Figure 7 30 shows an example of a low to high transition on an input that has its filter set to 125 ns N 5 RTSI PFI or PXI_STAR Terminal Filtered input goes m high when terminal Filter Clock 1 1 2 3 4 1 2 3 4 5 is sampled high on 40 MHz five consecutive filter clocks National Instruments Corporation 7 33 Figure 7 30 Filter Example Enabling filters introduces jitter on the input signal For the 125 ns and 6 425 us filter settings the jitter is up to 25 ns On the 2 56 ms setting the jitter is up to 10 025 us When a PFI input is routed directly to RTSI or a RTSI input is routed directly to PFI the M
346. oning modules e SCB 68 shielded connector block with temperature sensor make sure the switches are set properly e TBX 68 DIN rail mountable connector block You can use one screw terminal accessory with the signals on either connector of your USB 6255 Mass Termination device You can use two screw terminal accessories with one M Series device by using both connectors Cables Choosing a Cable for Connector 0 In most applications you can use the following cables with Connector 0 e SH68 68 EPM High performance cable with individual bundles separating analog and digital signals Each differential analog input channel is routed on an individually shielded twisted pair of wires Analog outputs are also individually shielded e R68 68 Highly flexible unshielded ribbon cable Choosing a Cable for Connector 1 In most applications you can use the following cables with Connector 1 e SH68 68 S Shielded cable with 34 twisted pairs of wire Each differential analog input channel on Connector 1 is routed on a twisted pair on the SH68 68 S cable e R68 68 Highly flexible unshielded ribbon cable 1 NI recommends that you use the SH68 68 S cable when the SCB 68 is connected to Connector 1 2 The SCC 68 only can be used with Connector 0 3 NI recommends that you use the SH68 68 EPM cable however an SH68 68 EP cable will work with M Series devices National Instruments Corporation A 103 M Series User Manual Appendix D
347. op panel of the USB 6259 BNC AIO aS FS GS Figure A 47 FS GS Switch Figure A 48 shows the analog input circuitry on the USB 6259 BNC When the switch is set to the FS position AI x is grounded through a 0 1 UF capacitor in parallel with a 5 KQ resistor O e AI Xx O o AI x Aix Aix i oGS o GS i Floating Grounded i Source FS Source frs otpF 35kQ O4uF gt SSk i V7 AI GND 7 AI GND USB 62xx Device USB 62xx Device Figure A 48 Analog Input Circuitry A 116 ni com Appendix Device Specific Information e Single Ended Mode For each BNC connector that you use for two single ended channels set the source type switch to the GS position This setting disconnects the built in ground reference resistor from the negative terminal of the BNC connector allowing the connector to be used as a single ended channel as shown in Figure A 49 Ground Ref Source GS Figure A 49 Single Ended Channels When you set the source type to the GS position and configure the device for single ended input in software each BNC connector provides access to two single ended channels AI x and AI x 8 For example the BNC connector labeled AI 0 provides access to single ended channels AI 0 and AI 8 the BNC connector labeled AI 1 provides access to single ended channels AI and
348. or Signals Signal Name Reference Direction Description AI GND AI lt 0 79 gt Varies Input Analog Input Ground These terminals are the reference point for single ended AI measurements in RSE mode and the bias current return point for DIFF measurements All three ground references AI GND AO GND and D GND are connected on the device Analog Input Channels 0 to 79 For single ended measurements each signal is an analog input voltage channel In RSE mode AI GND is the reference for these signals In NRSE mode the reference for each AI lt 0 15 gt signal is AI SENSE the reference for each AI lt 16 63 gt and AI lt 64 79 gt signal is AI SENSE 2 For differential measurements AI 0 and AI 8 are the positive and negative inputs of differential analog input channel 0 Similarly the following signal pairs also form differential input channels lt AI 1 AI 9 gt lt AI 2 AI 10 gt lt AI 3 AI 11 gt lt AI 4 AI 12 gt lt AI 5 AI 13 gt lt AI 6 AI 14 gt lt AI 7 AI 15 gt lt AI 16 AI 24 gt lt AI 17 AI 25 gt lt AI 18 AI 26 gt lt AI 19 AI 27 gt lt AI 20 AI 28 gt lt AI 21 AI 29 gt lt AI 22 AI 30 gt lt AI 23 AI 31 gt lt AI 32 AI 40 gt lt AI 33 AI 41 gt lt AI 34 AI 42 gt lt AI 35 AI 43 gt lt AI 36 AI 44 gt lt AI 37 AI 45 gt lt AI 38 AI 46 gt lt AI 39 AI 47 gt lt AI 48 AI 56 gt lt AI 49 AI 57 gt lt AI 50 AI 58 gt
349. ore installing your DAQ device you must install the software you plan to use with the device Installing NI DAQmx The DAQ Getting Started Guide which you can download at ni com manuals offers NI DAQmx users step by step instructions for installing software and hardware configuring channels and tasks and getting started developing an application Installing Other Software If you are using other software refer to the installation instructions that accompany your software Installing the Hardware The DAQ Getting Started Guide contains non software specific information about how to install PCI PCI Express PXI PXI Express and USB devices as well as accessories and cables National Instruments Corporation 1 1 M Series User Manual Chapter 1 Getting Started Device Self Calibration NI recommends that you self calibrate your M Series device after installation and whenever the ambient temperature changes Self calibration should be performed after the device has warmed up for the recommended time period Refer to the device specifications to find your device warm up time This function measures the onboard reference voltage of the device and adjusts the self calibration constants to account for any errors caused by short term fluctuations in the environment Disconnect all external signals when you self calibrate a device You can initiate self calibration using Measurement amp Automation Explorer MAX by co
350. ormation about RSE connections 4 14 ni com Chapter 4 Analog Input Using Differential Connections for Floating Signal Sources It is important to connect the negative lead of a floating source to AI GND either directly or through a bias resistor Otherwise the source may float out of the maximum working voltage range of the NI PGIA and the DAQ device returns erroneous data The easiest way to reference the source to AI GND is to connect the positive side of the signal to AI and connect the negative side of the signal to AI GND as well as to AI without using resistors This connection works well for DC coupled sources with low source impedance less than 100 Q M Series Device o Al Floating m Signal V Source A ot Al Inpedance o Al GND CH Figure 4 4 Differential Connections for Floating Signal Sources without Bias Resistors National Instruments Corporation 4 15 M Series User Manual Chapter 4 Analog Input M Series User Manual However for larger source impedances this connection leaves the DIFF signal path significantly off balance Noise that couples electrostatically onto the positive line does not couple onto the negative line because it is connected to ground This noise appears as a DIFF mode signal instead of a common mode signal and thus appears in your data In this case instead of directly connecting the negative line to AI GND connect the negativ
351. orms on the Port 0 DIO lines The DI waveform acquisition FIFO stores the digital samples M Series devices have a DMA controller dedicated to moving data from the DI waveform acquisition FIFO to system memory The DAQ device samples the DIO lines on each rising or falling edge of a clock signal DI Sample Clock You can configure each DIO line to be an output a static input or a digital waveform acquisition input DI Sample Clock Signal M Series User Manual Use the DI Sample Clock di SampleClock signal to sample the PO lt 0 31 gt terminals and store the result in the DI waveform acquisition FIFO M Series devices do not have the ability to divide down a timebase to produce an internal DI Sample Clock for digital waveform acquisition Therefore you must route an external signal or one of many internal signals from another subsystem to be the DI Sample Clock For example you can correlate digital and analog samples in time by sharing your AI Sample Clock or AO Sample Clock as the source of your DI Sample Clock To sample a digital signal independent of an AI AO or DO operation you can configure a counter to generate the desired DI Sample Clock or use an external signal as the source of the clock If the DAQ device receives a DI Sample Clock when the FIFO is full it reports an overflow error to the host software Using an Internal Source To use DI Sample Clock with an internal source specify the signal source and the polarity
352. orting internal signals to external terminals so they can be used to trigger or time external devices These timing parameters include the selection multiplexer in each terminal plus the delay of the output driver Figures B 20 and B 21 and Table B 11 describe output timing The delays presented in this section assume a 200 pF load on PFI lines and a 50 pF load on RTSI lines Actual delays vary with the actual load National Instruments Corporation B 19 M Series User Manual Appendix B Timing Diagrams Terminal Selected Reference Trigger Reference Trigger 5 0 Terminal lt Start Trigger 7 Selected Start Trigger v WU WY v Terminal L Selected Pause Trigger ri Terminal i D Pause Trigger SI Start I 7 SI Sample Clock Timebase Counter L 7 Sync Sample Clock Timebase Bie or SI_TC y Convert Clock Timebase ee Counter if Sync Convert Clock Timebase Blook Start Selected Sample Clock Terminal e M Series User Manual Figure B 20 Output Timing and the Analog Input Timing Engine POUT to gt 1 1 He tao Terminal Figure B 21 Output Timing Diagram Table B 11 Output Timing Edge Line Min ns Max ns Rising Edge PFI 7 2 237 RTSI 5 6 14 0 Falling Edge PFI 7 5 25 9 RTSI 6 0 13
353. ote For a ground connection you can connect the shield of a shielded cable to the chassis ground lug depicted in Figure A 15 M Series User Manual A 36 ni com Appendix Device Specific Information AIO Al 1 Al2 Al3 Al4 Al GND AI5 Al 6 Al7 Al 16 Al 17 Al 18 Al GND Al SENSE AO GND AO 0 Al 49 AI 50 Al 51 Al 52 Al 53 Al 54 AI 55 Al GND Al 64 Al 65 Al 66 Al 67 Al 68 Al 69 Al 70 Al 71 iny Siz 48 Alig 3 2 9 S18 Als A120 34 IS 3l kai S19 4110 AI 21 35 IS 4 S x ane Al22 36 eS S22 81982 Hz calf 7 S AI32 39 8 e aie A133 40 9 CRE Alaa TTS 10 KI S26 A 24 A185 4 W 41 Kgl 127 A125 AI 36 43 IS 12 S28 Al 26 AIGND 44 9 13 I Sip 22 A GND AI 37 45 IS 14 I S 20 NC A138 46 I9 15 KS X SD ARENE A139 47 8 16 LS Alas v y 81 Al57 spj Jeiz mom 67 I S 834 59 PO 2 99 Ks 68 I S 84 A160 P0 3 100 Ks 69 KI SES A 61 P0 4 101 IS 70 SE A 62 PO 5 102 Ks 711 Kl S sz Al6s P0 6 403 S 72 ES T Al anp PO 7 104 Sy 73 Slaa PFIO P1 0 105 7418 47 PFI1 P1 1 106 S 75 ISI Sears PFI2 P1 2 107 S zS Gos alse PFI 3 P1 3 108 S ziS Sosa PFI 4 P1 4 109 IS 78 ISI Qos aise PFI 5 P1 5 110 S 79 S EEA PFI 6 P1 6 111 9 80 KSI PFI 7 P1 7 112 19 NC No
354. ote The sampling rate is the fastest you can acquire data on the device and still achieve accurate results For example if an M Series device has a sampling rate of 250 kS s this sampling rate is aggregate one channel at 250 kS s or two channels at 125 kS s per channel illustrates the relationship M Series User Manual 4 26 ni com Chapter 4 Analog Input Posttriggered data acquisition allows you to view only data that is acquired after a trigger event is received A typical posttriggered DAQ sequence is shown in Figure 4 14 The sample counter is loaded with the specified number of posttrigger samples in this example five The value decrements with each pulse on AI Sample Clock until the value reaches zero and all desired samples have been acquired Al Start Trigger Al Sample Clock Al Convert Clock Sample Counter Figure 4 14 Posttriggered Data Acquisition Example Pretriggered data acquisition allows you to view data that is acquired before the trigger of interest in addition to data acquired after the trigger Figure 4 15 shows a typical pretriggered DAQ sequence AI Start Trigger ai StartTrigger can be either a hardware or software signal If AI Start Trigger is set up to be a software start trigger an output pulse appears on the ai StartTrigger line when the acquisition begins When the AI Start Trigger pulse occurs the sample coun
355. ounter counts the number of rising or falling edges on the Source input occurring between an active edge of the Gate signal and an active edge of the Aux signal The counter then stores the count in a hardware save register and ignores other edges on its inputs Software then reads the stored count Figure 7 20 shows an example of a single two signal edge separation measurement Counter Armed i r Measured Interval AUX 4 GATE i SOURCE Counter Value 0 0 0 0 1 2 3 4 5 6 7 8 8 8 HW Save Register 8 Figure 7 20 Single Two Signal Edge Separation Measurement Buffered Two Signal Edge Separation Measurement Buffered and single two signal edge separation measurements are similar but buffered measurement measures multiple intervals The counter counts the number of rising or falling edges on the Source input occurring between an active edge of the Gate signal and an active edge of the Aux signal The counter then stores the count in a hardware save register On the next active edge of the Gate signal the counter begins another measurement A DMA controller transfers the stored values to host memory 7 18 ni com Chapter 7 Counters Figure 7 21 shows an example of a buffered two signal edge separation
356. ource as shown in Figure 7 35 Source A Synchronize Count Figure 7 35 80 MHz Source Mode 7 38 ni com Chapter 7 Counters Other Internal Source Mode In other internal source mode the device synchronizes signals on the falling edge of the source and counts on the following rising edge of the source as shown in Figure 7 36 A Synchronize Count Source Figure 7 36 Other Internal Source Mode External Source Mode In external source mode the device generates a delayed Source signal by delaying the Source signal by several nanoseconds The device synchronizes signals on the rising edge of the delayed Source signal and counts on the following rising edge of the source as shown in Figure 7 37 A Source Synchronize Delayed Source A Count Figure 7 37 External Source Mode National Instruments Corporation 7 39 M Series User Manual PFI M Series devices have up to 16 Programmable Function Interface PFI signals In addition M Series devices have up to 32 lines of bidirectional DIO signals Each PFI can be individually configured as the following e A Static digital input e A static digital output e A timing input signal for AI AO DI DO or counter timer functions e A timing output signal from AI AO DI DO or counter timer functions Each PFI input also has a programmable
357. phase of the quadrature cycle You can program this reload to occur in any one of the four phases in a quadrature cycle National Instruments Corporation 7 15 M Series User Manual Chapter 7 Counters M Series User Manual Channel Z behavior when it goes high and how long it stays high differs with quadrature encoder designs You must refer to the documentation for your quadrature encoder to obtain timing of channel Z with respect to channels A and B You must then ensure that channel Z is high during at least a portion of the phase you specify for reload For instance in Figure 7 17 channel Z is never high when channel A is high and channel B is low Thus the reload must occur in some other phase In Figure 7 17 the reload phase is when both channel A and channel B are low The reload occurs when this phase is true and channel Z is high Incrementing and decrementing takes priority over reloading Thus when the channel B goes low to enter the reload phase the increment occurs first The reload occurs within one maximum timebase period after the reload phase becomes true After the reload occurs the counter continues to count as before The figure illustrates channel Z reload with X4 decoding ChA _J _ oo ChB _i o o Chz i i 1 Max Timebase LIT LIT LIT LIT FT IL Counter Value 5Y TOGA i 2 3 X 4 A B Z 0 0 1 Figure 7 17 Channel
358. ple Clock PFI output 8 0 29 8 tis PFI output high PFI output low Two periods of Three periods of 80 MHz Timebase 80 MHz Timebase The delay ranges given for PFI and RTSI represent the fastest and slowest terminal routing within given condition maximum or minimum timing This difference can be useful when two external signals will be used together and the relative timing between the signals is important t When DO Sample Clock is routed to a PFI output pin the pulse width of the output is independent of the pulse width of the input The pulse width is specified in a number of periods of the 80 MHz Timebase he trigger group for a Table B 25 DO Timing Requirements Time Requirement Condition Min ms Max ms tio PFI RTSI or PXI_STAR When used as NI 622x devices 1000 0 minimum period DO Sample Clock NI 625x NI 628x devices 100 0 ty PFI RTSI or PXI_STAR minimum pulse width When used as DO Sample Clock 12 0 National Instruments Corporation B 35 M Series User Manual Appendix B Timing Diagrams Counters Timing Diagrams Input Delays This section describes input delays input requirements output delays gating modes and quadrature and two pulse encoder timing This section describes some of the timing delays of the counter timer circuit To describe delays of the counter timer we model the circuitry as shown in Figure B 41 In the figure
359. ppose you program your counter to generate pulses with a delay of 100 and pulse width of 200 each time it receives a trigger Furthermore suppose you specify the delay increment to be 10 On the first trigger your pulse delay will be 100 on the second it will be 110 on the third it will be 120 the process will repeat in this manner until the counter is disarmed The counter ignores any Gate edge that is received while the pulse triggered by the previous Gate edge is in progress 7 24 ni com Chapter 7 Counters The waveform thus produced at the counter s output can be used to provide timing for undersampling applications where a digitizing system can sample repetitive waveforms that are higher in frequency than the Nyquist frequency of the system Figure 7 29 shows an example of pulse generation for ETS the delay from the trigger to the pulse increases after each subsequent Gate active edge ome N i l our i y E D1 D2 D1 AD D3 D1 2AD Figure 7 29 Pulse Generation for ETS For information about connecting counter signals refer to the Default Counter Timer Pinouts section Counter Timing Signals M Series devices feature the following counter timing signals e Counter n Source Signal e Counter n Gate Signal e Counter n Aux Signal e Counter n Signal e CounternB Signal e CounternZ Signal e Counter n Up_Down Signal e Counter n HW Arm Signal e Counter n Interna
360. quency 3 Note NI DAQmx only supports filters on counter inputs The following is an example of low to high transitions of the input signal High to low transitions work similarly National Instruments Corporation 9 9 M Series User Manual Chapter 9 Digital Routing and Clock Generation Assume that an input terminal has been low for a long time The input terminal then changes from low to high but glitches several times When the filter clock has sampled the signal high on N consecutive edges the low to high transition is propagated to the rest of the circuit The value of N depends on the filter setting refer to Table 9 3 Table 9 3 Filters Filtered Input N Filter Clocks Pulse Width Pulse Width Needed to Guaranteed to Guaranteed to Filter Setting Pass Signal Pass Filter Not Pass Filter 125 ns 5 125 ns 100 ns 6 425 us 257 6 425 us 6 400 us 2 56 ms 101 800 2 56 ms 2 54 ms Disabled The filter setting for each input can be configured independently On power up the filters are disabled Figure 9 4 shows an example of a low to high transition on an input that has its filter set to 125 ns N 5 RTSI PFI or PXI_STAR Terminal Filtered input goes high when terminal Filter Clock 1 1 2 3 4 1 2 3 4 5 is sampled high on 40 MHz five consecutive filter i clocks
361. r s program is responsible for transferring data Each read or write call in the program initiates the transfer of data Programmed I O is typically used in software timed on demand operations Refer to the Analog Output Data Generation Methods section of Chapter 5 Analog Output for more information USB Devices The two primary ways to transfer data across the USB bus are USB Signal Stream and programmed I O USB Signal Stream USB Signal Stream is a method to transfer data between the device and computer memory using USB bulk transfers without intervention of the microcontroller on the NI device NI uses USB Signal Stream hardware and software technology to achieve high throughput rates and increase system utilization in USB devices Programmed I O Programmed I O is a data transfer mechanism where the user s program is responsible for transferring data Each read or write call in the program initiates the transfer of data Programmed I O is typically used in software timed on demand operations Refer to the Analog Output Data Generation Methods section of Chapter 5 Analog Output for more information 10 4 ni com Chapter 10 Bus Interface Changing Data Transfer Methods NI PCI PCle PXI PXle Devices On PCI PCI Express PXI and PXI Express M Series devices each measurement and acquisition circuit that is AI AO and so on has a dedicated DMA channel So in most applications all data transfers use DMA However NI
362. r ao PauseTrigger e Counter input signals for either counter Source Gate Aux HW_Arm A B Z e DI Sample Clock di SampleClock e DO Sample Clock do SampleClock Most functions allow you to configure the polarity of PFI inputs and whether the input is edge or level sensitive Exporting Timing Output Signals Using PFI Terminals M Series User Manual You can route any of the following timing signals to any PFI terminal configured as an output e AT Convert Clock ai ConvertClock e AT Hold Complete Event ai HoldCompleteEvent 8 2 ni com Chapter 8 PFI e AI Reference Trigger ai ReferenceTrigger e AI Sample Clock ai SampleClock e AI Start Trigger ai StartTrigger e AO Sample Clock ao SampleClock e AO Start Trigger ao StartTrigger e Counter n Source e Counter n Gate e Counter n Internal Output e Frequency Output e PXI STAR e RTSI lt 0 7 gt e Analog Comparison Event e Change Detection Event e DI Sample Clock di SampleClock e DO Sample Clock do SampleClock 3 Note Signals with a are inverted before being driven to a terminal that is these signals are active low Using PFI Terminals as Static Digital I Os Each PFI can be individually configured as a static digital input or a static digital output When a terminal is used as a static digital input or output it is called P1 x or P2 x On the I O connector each terminal is labeled PFI x P1 x or PFI x P2 x In addition M Ser
363. r Source is an external signal Prescaling is not available if the counter Source is one of the internal timebases 80MHzTimebase 20MHzTimebase or 100kHzTimebase Duplicate Count Prevention M Series User Manual Duplicate count prevention or synchronous counting mode ensures that a counter returns correct data in applications that use a slow or non periodic external source Duplicate count prevention applies only to buffered counter applications such as measuring frequency or period In such buffered applications the counter should store the number of times an external Source pulses between rising edges on the Gate signal 7 34 ni com Chapter 7 Counters Example Application That Works Correctly No Duplicate Counting Figure 7 32 shows an external buffered signal as the period measurement Source Rising Edge of Gate Counter detects rising edge of Gate on the next rising edge of Source Gate Source Counter Value __6 X7 X1 X2 X1 Buffer n 7 2 7 Figure 7 32 Duplicate Count Prevention Example On the first rising edge of the Gate the current count of 7 is stored On the next rising edge of the Gate the counter stores a 2 since two Source pulses occurred after the previous rising edge of Gate The counter synchronizes or samples the Gate signal with the Source signal so the counter does not detect a rising edge in the G
364. r a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information 3 Note M Series devices may be used with most E Series accessories However some E Series accessories use different terminal names Refer to the M Series and E Series Pinout Comparison section of Chapter 3 Connector and LED Information for more information National Instruments Corporation A 7 M Series User Manual Appendix Device Specific Information __ AIO 68 34 Als AI GND 67 33 Al1 AI9 66 32 AI GND AI 2 65 31 AI110 AI GND 64 30 A13 Ss Al 11 63 29 Al GND O7 AISENSE 62 28 Ala 2 AI 12 61 27 AI GND 6 AI15 60 26 A113 AI GND 59 25 AI6 Al 14 58 24 Al GND AI 7 57 23 A115 TERMINAL 68 TERMINAL 34 AI GND 56 22 AO0 AO GND 55 21 A01 AO GND 54 20 NC D GND 53 19 P0 4 P0 0 52 18 D GND P0 5 51 17 Pot D GND 50 16 P0 6 PO 2 49 15 D GND PO 7 48 14 45V P0 3 47 13 D GND PFI 11 P2 3 46 12 DGND TERMINAL 35 TERMINAL 1 PFI10 P2 2 45 11 PFI0 P1 0 D GND 44 10 PFI 1 P1 1 Q PFI 2 P1 2 43 9 D GND PFI 3 P1 3 42 8 45V PFI 4 P1 4 41 7 DGND PFI 13 P2 5 40 6 PFI5 P1 5 PFI 15 P2 7 39 5 PFI6 P1 6 PFI 7 P1 7 38 4 DGND PFI 8 P2 0 37 3 PFI9 P2 1
365. rable enclosure that gives user defined connectivity and flexibility through customized panelettes Visit ni com for more information about the CA 1000 Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more information about custom cabling solutions USB 6259 Mass Termination LED Patterns Refer to the LED Patterns section of Chapter 3 Connector and LED Information for information about the USB 6259 Mass Termination LEDs USB 6259 Mass Termination Fuse Replacement Refer to the USB Device Fuse Replacement section of Chapter 3 Connector and LED Information for information about replacing the fuse on the USB 6259 Mass Termination NI recommends that you use the SH68 68 EPM cable however an SH68 68 EP cable will work with M Series devices National Instruments Corporation A 125 M Series User Manual Appendix Device Specific Information NI 6260 PCI PXI 6280 Pinout Figure A 56 shows the pinout of the PCI PXI 6280 For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information AJA Note M Series devices may be used with most E Series accessories However some E Series accessories use different terminal names Refer to the M Series and E Series Pinout Comparison section of Chapter 3 Connector and LED Information for more information M Series User Manual A 126 ni com Appendix Device Specific Info
366. rack mountable device with 22 BNCs for connecting analog digital and timing signals You can use one BNC accessory with the signals on either connector of your M Series device You can use two BNC accessories with one M Series device by using both connectors Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks Use an SHC68 68 EPM shielded cable to connect an M Series device to a connector block such as the following e CB 68LP and CB 68LPR unshielded connector blocks e SCC 68 I O connector block with screw terminals general breadboard area bus terminals and four expansion slots for SCC signal conditioning modules e SCB 68 shielded connector block with temperature sensor e TBX 68 DIN rail mountable connector block e TB 2706 front panel mounted terminal block for PXI M Series devices You can use one screw terminal accessory with the signals on either connector of your M Series device You can use two screw terminal accessories with one M Series device by using both connectors TB 2706 uses Connector 0 of your PXI device After a TB 2706 is installed Connector 1 cannot be used National Instruments Corporation A 109 M Series User Manual Appendix Device Specific Information RTSI Cables Use RTSI bus cables to connect timing and synchronization signals among PCI PCI Express devices such as M Series E Series CAN and other measurement vision and motion dev
367. rce Delays Timing Diagram Time From To Min ns Max ns t3 PFI_i RTSI_i PXI_STAR_i or any internal signal Selected Source 8 0 21 0 20 MHz Timebase Selected Source 1 5 4 0 100 kHz Timebase Selected Source 1 5 4 0 80 MHz Timebase Selected Source 1 0 2 5 PXI_CLK10 Selected Source 1 0 3 5 Count Enable Delay Table B 29 shows timing for the internal Count Enable signal as shown in Figure B 41 Count Enable enables the 32 bit counter to count on the rising edge of the Selected Source signal The delays depend on both the synchronization mode and gating mode for the application Selected_Gate Count_Enable M Series User Manual Figure B 45 Count Enable Delays B 38 ni com Appendix B Table B 29 Selected Gate to Count Enable Delays Timing Diagrams Synchronization Time Mode Gating Mode Min ns Max ns t4 80 MHz Source Edge 0 5 5 0 Level 1 0 0 5 Other Internal Source Edge 1 2 Source Period 1 ns 1 2 Source Period 3 ns Level 1 2 Source Period 2 5 ns 1 2 Source Period 1 ns External Source Edge 7 5 22 0 Level 6 0 18 0 Input Requirements Refer to the Figure B 41 for the M Series counter timer circuitry Source Period and Pulse Width Figure B 46 and Table B 30 show the timing requirements for Counter n Source The requirements depend on the synchronization mode Counter n Source
368. rmation GND GND 11 SENSE 12 GND 14 gt gt gt gt gt gt gt gt gt gt gt gt GND C NC D GND PO 0 PO 5 D GND PO 2 PO 7 P0 3 PFI 11 P2 3 PFI 10 P2 2 D GND PFI 2 P1 2 PFI 3 P1 3 P P P P FI 4 P1 4 FI 13 P2 5 F1 15 P2 7 FI 7 P1 7 PFI 8 P2 0 D GND D GND we 68 34 67 33 66 32 65 31 64 30 63 29 62 28 61 27 60 26 59 25 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 D R N w N N N D Le XN D a A ao N Le o IDIw R Ia o o a GND 10 GND GND 13 GND 15 NC NC APFI 0 PO 4 D GND PO 1 P0 6 D GND 5V D GND D GND PFI 0 P1 0 PELETA D GND 5V D GND PFI 5 P1 5 PFI 6 P1 6 D GND PFI 9 P2 1 gt gt gt gt gt gt gt gt gt gt gt PFI 12 P2 4 PFI 14 P2 6 NC No Connect TERMINAL 68 O CONNECTOR 0 Al 0 15 TERMINAL 34 TERMINAL 35 Q4 TERMINAL 1 National Instruments Corporation Figure A 56 PCI PXI 6280 Pinout A 127 M Series User Manual Appendix Device Specific Information Table A 26 Default NI DAQmx Counter Timer Pins Coun
369. rminal pinout A 111 USB 6281 Mass Termination pinout A 138 USB 6281 Screw Terminal pinout A 136 USB 6289 Mass Termination pinout A 158 USB 6289 Screw Terminal pinout A 155 considerations for field wiring 4 24 for multichannel scanning 4 7 for PXI 10 2 continuous pulse train generation 7 21 controller DMA 10 1 controlling counting direction 7 2 conventions used in the manual xv count enable delay B 38 counter input and output 7 30 output applications 7 19 terminals default 7 30 Counter n A signal 7 28 Counter n Aux signal 7 28 Counter n B signal 7 28 Counter n Gate signal 7 27 Counter n HW Arm signal 7 29 Counter n Internal Output signal 7 29 Counter n Source signal 7 26 Counter n TC signal 7 29 Counter n Up_Down signal 7 29 Counter n Z signal 7 28 counter signals Counter n A 7 28 Counter n Aux 7 28 Counter n B 7 28 Counter n Gate 7 27 Counter n HW Arm 7 29 Counter n Internal Output 7 29 Counter n Source 7 26 ni com Counter n TC 7 29 Counter n Up_Down 7 29 FREQ OUT 7 30 Frequency Output 7 30 counters 7 1 cascading 7 32 connecting terminals 7 30 duplicate count prevention 7 34 edge counting 7 2 filters 7 32 generation 7 19 input applications 7 2 other features 7 32 output applications 7 19 prescaling 7 34 pulse train generation 7 21 retriggerable single pulse generation 7 20 simple pulse generation 7 19 single pulse generation 7 19 single pulse
370. rogramming of the DMA controller This process can take several milliseconds in some cases During this time data accumulates in the FIFO for future retrieval With a larger FIFO longer latencies can be tolerated In the case of analog output a FIFO permits faster update rates because the waveform data can be stored on the FIFO ahead of time This again reduces the effect of latencies associated with getting the data from system memory to the DAQ device A physical device or digital algorithm that selectively removes noise from a signal or emphasizes certain frequency ranges and de emphasizes others Electronic filters include lowpass band pass and highpass types Digital filters can operate on numeric data to perform equivalent operations on digitized analog data or to enhance video images A type of signal conditioning that allows you to filter unwanted frequency components from the signal you are trying to measure G 8 ni com floating floating signal sources FREQ OUT frequency ft function glitch GND ground H hardware hardware triggering National Instruments Corporation G 9 Glossary The condition where a common mode voltage exists or may exist between earth ground and the instrument or circuit of interest Neither the high nor the low side of a circuit is at earth potential Signal sources with voltage signals that are not connected to an absolute reference of system ground Also called non refere
371. round signal A serial connector Digital to Analog Converter An electronic device often an integrated circuit that converts a digital number into a corresponding analog voltage or current In the instrumentation world DACs can be used to generate arbitrary waveform shapes defined by the software algorithm that computes the digital data pattern which is fed to the DAC National Instruments Corporation G 5 M Series User Manual Glossary DAQ DAQ device DAQ STC2 data acquisition data transfer dB DC device M Series User Manual 1 Data acquisition The process of collecting and measuring electrical signals from sensors transducers and test probes or fixtures and inputting them to a computer for processing 2 Data acquisition The process of collecting and measuring the same kinds of electrical signals with A D and or DIO devices plugged into a computer and possibly generating control signals with D A and or DIO devices in the same computer A device that acquires or generates data and can contain multiple channels and conversion devices DAQ devices include plug in devices PCMCIA cards and DAQPad devices which connect to a computer USB or 1394 FireWire port SCXI modules are considered DAQ devices Data acquisition system timing controller chip The general concept of acquiring data as in begin data acquisition or data acquisition and control See also DAQ A technique for moving digital
372. s However some E Series accessories use different terminal names Refer to the M Series and E Series Pinout Comparison section of Chapter 3 Connector and LED Information for more information M Series User Manual A 60 ni com Appendix Device Specific Information National Instruments Corporation pod AIO 68 34 Al 8 AI GND 67 33 A11 Al 9 66 32 AI GND AI 2 65 31 Al 10 o Al GND 64 30 A13 So Al 11 63 29 Al GND O AI SENSE 62 28 A14 24 AI 12 61 27 AI GND 8 A15 60 26 Al 13 AI GND 59 25 A16 Al 14 58 24 AI GND AI7 57 23 Al 15 TERMINAL 68 TERMINAL 34 AI GND 56 22 NC NC 55 21 NC NC 54 20 APFIO D GND 53 19 P0 4 P0 0 52 18 D GND P0 5 51 17 Po D GND 50 16 Po 6 P0 2 49 15 D GND P0 7 48 14 5Vv P0 3 47 13 D GND PFI 11 P2 3 46112 benD TERMINAL 35 Rog TERMINAL 1 PFI 10 P2 2 45 11 PFI O P1 0 D GND 44 10 PFI4 P1 1 PFI 2 P1 2 43 9 D GND PFI 3 P1 3 42 8 45v PFI 4 P1 4 41 7 D GND PFI 13 P2 5 40 6 PFI5 P1 5 PFI 15 P2 7 39 5 PFI6 P1 6 PFI 7 P1 7 38 4 D GND PFI 8 P2 0 37 3 PFI9 P2 1 D GND 36 2 PFI 12 P2 4 D GND 35 1 PFI 14 P2 6 Se NC No Connect Figure A 27 PCI PXI 6250 Pinout A 61 M Series User M
373. s The Externally Powered USB M Series Panel M Series User Manual 1 5 National Instruments Corporation Chapter 1 Getting Started USB Device Security Cable Slot USB 622x 625x BNC Devices The security cable slot shown in Figure 1 3 allows you to attach an optional antitheft device to your USB device 3 Note The security cable is designed to act as a deterrent but may not prevent the device from being mishandled or stolen For more information refer to the documentation that accompanied the security cable Note The security cable slot on the USB 62xx BNC may not be compatible with all antitheft cables M Series User Manual 1 6 ni com DAQ System Overview Figure 2 1 shows a typical DAQ system which includes sensors transducers signal conditioning devices cables that connect the various devices to the accessories the M Series device programming software and PC The following sections cover the components of a typical DAQ system Sensors and Transducers 0001 Signal Conditioning Accessories Cables and DAQ Hardware DAQ Software Personal Computer or PXI PXI Express Chassis DAQ Hardware Figure 2 1 Components of a Typical DAQ System DAQ hardware digitizes signals performs D A conversions to generate analog output signals and measures and controls digital I O signals Figure 2 2 features components common to all M Series devices
374. s when the Analog Comparison Event signal is low and resumes when the signal goes high or vice versa Routing Al Pause Trigger Signal to an Output Terminal You can route AI Pause Trigger out to RTSI lt 0 7 gt Note Pause triggers are only sensitive to the level of the source not the edge Getting Started with Al Applications in Software 3 You can use the M Series device in the following analog input applications e Single point analog input e Finite analog input e Continuous analog input You can perform these applications through DMA interrupt or programmed I O data transfer mechanisms Some of the applications also use start reference and pause triggers Note For more information about programming analog input applications and triggers in software refer to the NJ DAQmx Help or the LabVIEW Help in version 8 0 or later M Series User Manual 4 38 ni com Analog Output Many M Series devices have analog output functionality M Series devices that support analog output have either two or four AO channels that are controlled by a single clock and are capable of waveform generation Refer to Appendix A Device Specific Information for information about the capabilities of your device Figure 5 1 shows the analog output circuitry of M Series devices AO 0 DACO AO FIFO m AO Data AO 2 DAC2 AO3 DAC3 CT LT AO Sample Clock AO Offset Selec
375. s between the two DAQ device families To access this KnowledgeBase go to ni com info and enter the info code rdmess Migrating an Application from E Series to M Series Developer Zone document highlights the main differences to remember when moving an application from E Series to M Series devices To access this document go to ni com info and enter the info code rde2m1 Using E Series Accessories with M Series Devices KnowledgeBase describes how to use 68 pin E Series accessories with M Series devices To access this KnowledgeBase go to ni com info and enter the info code rdea2m M Series or S Series Devices Are Not Detected During Installation on Some Computers KnowledgeBase describes the difference between M Series and E Series power rails and the PCI specification for the PCI bus and power rails and contains an up to date list of computers with power rails that do not support M Series devices To access this KnowledgeBase go to ni com info and enter the info code rdmseis D 1 M Series User Manual Technical Support and Professional Services Visit the following sections of the award winning National Instruments Web site at ni com for technical support and professional services National Instruments Corporation Support Technical support resources at ni com support include the following Self Help Technical Resources For answers and solutions visit ni com support for software drivers and updates a searchabl
376. s for Floating Signal Sources M Series User Manual It is important to connect the negative lead of a floating signals source to AI GND either directly or through a resistor Otherwise the source may float out of the valid input range of the NI PGIA and the DAQ device returns erroneous data Figure 4 8 shows a floating source connected to the DAQ device in NRSE mode M Series Device Al Floating Signal V o Source o AI SENSE SR Al GND Figure 4 8 NRSE Connections for Floating Signal Sources All of the bias resistor configurations discussed in the Using Differential Connections for Floating Signal Sources section apply to the NRSE bias resistors as well Replace AI with AI SENSE in Figures 4 4 4 5 4 6 4 18 ni com Chapter 4 Analog Input and 4 7 for configurations with zero to two bias resistors The noise rejection of NRSE mode is better than RSE mode because the AI SENSE connection is made remotely near the source However the noise rejection of NRSE mode is worse than DIFF mode because the AI SENSE connection is shared with all channels rather than being cabled in a twisted pair with the AI signal Using the DAQ Assistant you can configure the channels for RSE or NRSE input modes Refer to the Configuring AI Ground Reference Settings in Software section for more information about the DAQ Assistant Using Referenced Single Ended RSE Connections for Floating Signal Sour
377. s the analog output circuitry on the USB 6229 BNC a 7 AO GND VY Figure A 23 Analog Output Circuitry Refer to the Connecting Analog Output Signals section of Chapter 5 Analog Output for more information National Instruments Corporation A 57 M Series User Manual Appendix M Series User Manual Device Specific Information Digital 1 0 and Timing 1 0 You can access digital I O and timing I O signals on the BNC connectors labeled PFI lt 0 7 gt P1 lt 0 7 gt Figure A 24 shows the DIO TIO circuitry on the USB 6229 BNC PFI x P1 x 7 D GND VY Figure A 24 Digital 1 0 and Timing 1 0 Circuitry Refer to the Connecting Digital I O Signals section of Chapter 6 Digital I O and the Connecting PFI Input Signals section of Chapter 8 PFI for more information USER 1 and USER 2 The USER 1 and USER 2 BNC connectors allow you to use a BNC connector for a digital or timing I O signal of your choice The USER 1 and USER 2 BNC connectors are routed internal to the USB 6229 BNC to the USER 1 and USER 2 screw terminals as shown in Figure A 25 USER 1 BNC USER 2 BNC USER 1 e ea USER 2 e 4 nternal Connection D GND 5 V D GND P0 0 PO 1 Screw P0 2 Terminal PO 3 Block D GND PO 4 PO 5 PO 6 PO 7 D GND PFI 8 P2 0 Figure A 25 USER 1 and USER 2 BNC Connections A
378. s to the device L Analog Output Channels l Analog Output Channels ROS lt Channel o zhe Boe Channel 2 H Load V OUT Load V OUT ns nn Load V OUT Load V OUT 2 AO Channel 1 AOS Channel 3 Connector 0 AI 0 15 M Series Device Connector 1 Al 16 31 M Series Device Figure 5 2 Analog Output Connections Analog Output Timing Signals Figure 5 3 summarizes all of the timing options provided by the analog output timing engine PFI RTSI XX Le PXI_STAR PFI RTSI i RTS Analog Comparison Event AO Sample Clock PXL STAR Ctr n Internal Output e AO Sample Clock Analog Timebase Programmable o Clock 20 MHz Timebase Divider 100 kHz Timebase PXI_CLK10 P Figure 5 3 Analog Output Timing Options M Series User Manual 5 6 ni com Chapter 5 Analog Output M Series devices feature the following AO waveform generation timing signals e AO Start Trigger Signal e AO Pause Trigger Signal e AO Sample Clock Signal e AO Sample Clock Timebase Signal AO Start Trigger Signal Use the AO Start Trigger ao StartTrigger signal to initiate a waveform generation If you do not use triggers you can begin a generation with a software command Using a Digital Source To use AO Start Trigger specify a source and an edge The source can
379. scription of each signal refer to the 7 O Connector Signal Descriptions section of Chapter 3 Connector and LED Information Aya Note M Series devices may be used with most E Series accessories However some E Series accessories use different terminal names Refer to the M Series and E Series Pinout Comparison section of Chapter 3 Connector and LED Information for more information M Series User Manual A 24 ni com Appendix Device Specific Information ma fi AIO 68 34 Als P0 30 1 85 D GND Al GND 67 33 AI P0 28 2 36 D GND Al9 66 32 AI GND P0 25 3 37 P0 24 AI 2 65 31 Al10 a DGND 4 38 P0 23 AI GND 64 30 Als t 5 P0 22 5 39 Post Al 11 63 29 AI GND br be P0 21 6 40 Po 29 AISENSE 62 28 Al4 us Ze DGND 7 41 Po 20 Al 12 61 27 AIGND 6 5V 8 42 po19 Al5 60 26 AI113 9 D GND 9 43 Po 18 AI GND 59 25 AI6 QA po17 10 44 DGND Al 14 58 24 AI GND Po 16 11 45 Po 26 Al7 57123 Al15 TERMINAL 68 Le TERMINAL 35 D GND 12 146 P0 27 AI GND 56 22 NC iit al D GND 13 47 Po 11 NC 55 21 NC TERMINALS TEMA 5V 14 48 Po 15 NC 54 20 NC DGND 15 49 Po 10 D GND 53 19 P04 Po 14 16 50 DGND PO 0 52 18 DGND PO 9 17 51 Po13 PO 5 51 17 Pot D GND 18 52
380. se Timing Diagram Table B 14 Sample Clock Timebase and the Sync Sample Clock Timebase Timing Time From To Min ns Max ns t4 Signal_i Sample Clock Timebase 2 4 9 3 ts Signal_i Sync Sample Clock Timebase 2 4 9 3 M Series User Manual B 24 ni com Appendix B Timing Diagrams Start Trigger As an output the Start Trigger is routed as an asynchronous pulse The actual signal that gets routed is the Selected Start Trigger signal so there is no synchronous delay involved Signal_i D Q To Internal Logic Selected Start Trigger Sync Sample Clock Timebase Figure B 26 Start Trigger Input Delay Path nae eo ee Signal_i__ i Tian t no Selected Start Trigger op tg Sync Sample Clock Timebase Figure B 27 Start Trigger Timing Diagram Table B 15 Start Trigger Timing from Signal_i to Selected Start Trigger Time From To Min ns Max ns te Signal_i Selected Start Trigger 2 9 9 8 Table B 16 Start Trigger Setup and Hold Timing Time Parameter Min ns Max ns t7 Setup 1 5 tg Hold 0 Pause Trigger The analog output Pause Trigger can be used to pause an ongoing generation It is received on the rising edge of Sync Sample Clock Timebase National Instruments Corporation B 25 M Series User Manual Appendix B Timing Diagrams
381. se ssssssssssssrnenennneeeeessesesesesn xvi Chapter 1 Getting Started Installing NI DAQMK oiriin e e EE E E EEEE EAEE 1 1 Installing Other Software ss 1 1 Installins the Hardware seta Re een Monte dre se 1 1 Device Self Calibration 5 items nnint elcid Bech el ots eedvee es 1 2 Device Pino ts 23rs st a ER MT et nn Ter te dre Pr desde st 1 2 Device Specifications morani ea a ee ated eee A rer eas 1 2 Device Accessories and Cables se ren Served E E a E 1 3 Applying the Signal Label to USB 62xx Screw Terminal Devices 1 3 USB Cable S train Relief feet cde laces i ein E E lu EEEE AE E RETE hante ue 1 4 USB Device Panel Wall Mounting ss 1 5 USB Device Security Cable Slot aris areni nnie r dees das E coast dinde 1 6 Chapter 2 DAQ System Overview DAQ Hardware n A ERA E E E te 2 1 DAO STC2 and DAQ 6202 52e R E ER 2 2 Calibration Circuitry os iena ini Midd a ae a Meh 2 2 Signal Condit OM gs rss eur AL EM du nt Mesa 2 3 Sensors and Transducers saisine items 2 3 Signal Conditioning Options ss 2 4 SEXT EEE ne te Siler te ote ete a atin tok 2 4 SOC reas isons deeded EE E nn LE etes A Ge DE ian eases 2 4 OB SMES rm me sn nement a waa meee 2 5 Cables and ACCESSOTIES ninie ra a E couvaatans ovtaake E duane 2 5 Custom Cabling 2 53 naiidai MR hei ARR in Sco eases 2 6 Programming Devices in Software eee eceeseeseeseeseeeseseeeeseceeeseeaeceseesesesesaeenseeaeenaes 2 6 National Instruments Corporation v M Series Us
382. se the counters to measure frequency in several different ways You can choose one of the following methods depending on your application e Method 1 Measure Low Frequency with One Counter In this method you measure one period of your signal using a known timebase This method is good for low frequency signals You can route the signal to measure F1 to the Gate of a counter You can route a known timebase Ft to the Source of the counter The known timebase can be 80MHzTimebase For signals that might be slower than 0 02 Hz use a slower known timebase You can configure the counter to measure one period of the gate signal The frequency of F1 is the inverse of the period Figure 7 10 illustrates this method e Interval Measured gt Fi F1 Gate 1 2 3 a ds N Ft Source Ft 1 1 Single Period Period of F1 M Measurement Ft Frequency of F1 Figure 7 10 Method 1 National Instruments Corporation 7 9 M Series User Manual Chapter 7 Counters M Series User Manual Method 1b Measure Low Frequency with One Counter Averaged In this method you measure several periods of your signal using a known timebase This method is good for low to medium frequency signals You can route the signal to measure F1 to the Gate of a counter You can route a known timebase Ft to the Source of the counter The known timebase can be 80MHzTimebase
383. separating analog and digital signals Each differential analog input channel is routed on an individually shielded twisted pair of wires Analog outputs are also individually shielded SHC68 68 Lower cost shielded cable with 34 twisted pairs of wire e RC68 68 Highly flexible unshielded ribbon cable Choosing a Cable for Connector 1 In most applications you can use the following cables with Connector 1 e SHC68 68 Shielded cable with 34 twisted pairs of wire Each differential analog input channel on Connector 1 is routed on a twisted pair on the SHC68 68 cable e RC68 68 Highly flexible unshielded ribbon cable Custom Cabling and Connectivity The CA 1000 is a configurable enclosure that gives user defined connectivity and flexibility through customized panelettes Visit ni com for more information about the CA 1000 Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more information about custom cabling solutions NI recommends that you use the SHC68 68 EPM cable however an SHC68 68 EP cable will work with M Series devices National Instruments Corporation A 35 M Series User Manual Appendix Device Specific Information USB 6225 Screw Terminal USB 6225 Screw Terminal Pinout Figure A 15 shows the pinout of the USB 6225 Screw Terminal For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions section of Chapter 3 Connector and LED Information 3 N
384. signal analog signal analog trigger AO M Series User Manual Amperes the unit of electric current Analog to Digital Most often used as A D converter Alternating current A measure of the capability of an instrument or sensor to faithfully indicate the value of the measured signal This term is not related to resolution however the accuracy level can never be better than the resolution of the instrument Application development environment 1 Analog input 2 Analog input channel signal Analog input ground signal Analog input sense signal A signal whose amplitude can have a continuous range of values An input signal that varies smoothly over a continuous range of values rather than in discrete steps An output signal that varies smoothly over a continuous range of values rather than in discrete steps A signal representing a variable that can be observed and represented continuously A trigger that occurs at a user selected point on an incoming analog signal Triggering can be set to occur at a specific level on either an increasing or a decreasing signal positive or negative slope Analog triggering can be implemented either in software or in hardware When implemented in software LabVIEW all data is collected transferred into system memory and analyzed for the trigger condition When analog triggering is implemented in hardware no data is transferred to system memory until the trigger condition
385. signals 9 8 routing 9 1 CompactPCI using with PXI 10 3 configuring AI ground reference settings in software 4 6 connecting analog input signals 4 11 analog output signals 5 6 counter signals C 3 M Series User Manual Index digital I O signals 6 9 floating signal sources 4 13 ground referenced signal sources 4 20 PFI input signals 8 4 connections for floating signal sources 4 19 single ended for floating signal sources 4 19 single ended RSE configuration 4 19 connector information 3 1 NI 6220 pinout A 2 NI 6250 pinout A 60 NI 6254 pinout A 84 NI 6224 pinout A 24 NI 6280 pinout A 126 NI 6284 pinout A 143 PCI PCle PXI PX e 6251 pinout A 65 PCI PCle PXI PXIe 6259 pinout A 105 PCI PXI 6221 68 pin pinout A 7 PCI PXI 6225 pinout A 30 PCI PXI 6229 pinout A 45 PCI PXI 6255 pinout A 90 PCI PXI 6281 pinout A 131 PCI PXI 6289 pinout A 149 PCI 6221 37 pin pinout A 12 RTSI 3 13 USB 6221 BNC pinout A 17 USB 6221 Screw Terminal pinout A 15 USB 6225 Mass Termination pinout A 39 USB 6225 Screw Terminal pinout A 36 USB 6229 BNC pinout A 54 USB 6229 Screw Terminal pinout A 51 USB 6251 BNC pinout A 72 USB 6251 Mass Termination pinout A 79 USB 6251 Screw Terminal pinout A 70 USB 6255 Mass Termination pinout A 99 USB 6255 Screw Terminal pinout A 96 M Series User Manual USB 6259 BNC pinout A 114 USB 6259 Mass Termination pinout A 121 USB 6259 Screw Te
386. sources for Sample Clock are at the _i level and are selected using a multiplexer The output of this multiplexer is called Selected Sample Clock National Instruments Corporation B 15 M Series User Manual Appendix B Timing Diagrams Selected Reference Trigger Reference Trigger Terminal Le gt Terminal o Terminal gt Start Tigger gt Terminal Selected Start Trigger b O RTSI Terminal SL Selected Pause Trigger 9 D Pause Trigger SI Start Terminal Le Sl Sample Clock Timebase Counter o Sync Sample Clock Timebase Blook OF D gt Terminal D SI_TC j p_Al_Convert gt SI2 Convert Clock Timebase Counter 812 TC z Block Sync Convert Clock Timebase Start lected le CI Terminal Selected Sample Cloc Terminal Figure B 15 Sample Clock and the Analog Input Timing Engine i t27 Selected Sample Clock i 1 tog bo Sync Convert Clock Timebase Le OO itso gt Sample Clock _ _ S o 1 1 i POUT si Figure B 16 Sample Clock Timing Diagram M Series User Manual B 16 ni com Table B 8 Sample Clock Timing Appendix B Timing Diagrams Time Description L
387. sume you have NI DAQmx 8 7 1 or later and where applicable version 7 1 or later of the NI application software NI DAQmx for Windows The DAQ Getting Started Guide describes how to install your NI DAQmx for Windows software how to install your NI DAQmx supported DAQ device and how to confirm that your device is operating properly Select Start All Programs National Instruments NI DAQ DAQ Getting Started Guide The NI DAQ Readme lists which devices are supported by this version of NI DAQ Select Start All Programs National Instruments NI DAQ NI DAQ Readme The NI DAQmx Help contains general information about measurement concepts key NI DAQmx concepts and common applications that are applicable to all programming environments Select Start All Programs National Instruments NI DA Q NI DAQmx Help NI DAQmx for Linux M Series User Manual The DAQ Getting Started Guide describes how to install your NI DAQmx supported DAQ device and confirm that your device is operating properly The NI DAQ Readme for Linux lists supported devices and includes software installation instructions frequently asked questions and known issues The C Function Reference Help describes functions and attributes The NI DAQmx for Linux Configuration Guide provides configuration instructions templates and instructions for using test panels xvi ni com ai 3 About This Manual Note All NI DAQmx documentation for Linux is installed at
388. system the RTSI bus consists of the RTSI bus interface and the PXI trigger signals on the PXI backplane This bus can route timing and trigger signals between several functions on as many as seven DAQ devices in the system RTSI Connector Pinout PCI PCI Express Devices Figure 9 2 shows the RTSI connector pinout and Table 9 1 describes the RTSI signals M Series User Manual 9 4 ni com Chapter 9 Digital Routing and Clock Generation Terminal 34 Terminal 33 Terminal 1 Figure 9 2 M Series PCI PCI Express Device RTS Pinout Table 9 1 RTSI Signals RTSI Bus Signal Terminal RTSI 7 34 RTSI 6 32 RTSI 5 30 RTSI 4 28 RTSI 3 26 RTSI 2 24 RTSI 1 22 RTSI 0 20 Not Connected Do not connect 1 18 signals to these terminals D GND 19 21 23 25 27 29 31 33 National Instruments Corporation 9 5 M Series User Manual Chapter 9 Digital Routing and Clock Generation Using RTSI as Outputs RTSI lt 0 7 gt are bidirectional terminals As an output you can drive any of the following signals to any RTSI terminal e Al Start Trigger ai StartTrigger e Al Reference Trigger ai ReferenceTrigger e AT Convert Clock ai ConvertClock e Al Sample Clock ai SampleClock e AI Pause Trigger ai PauseTrigger e AO Sample Clock ao SampleClock e AO Start Trigger ao StartTrigger e AO Pause Trigger ao PauseTrigger e 10 MHz Reference Clock e
389. t AO Reference Select Figure 5 1 M Series Analog Output Circuitry The main blocks featured in the M Series analog output circuitry are as follows e DACs Digital to analog converters DACs convert digital codes to analog voltages e AO FIFO The AO FIFO enables analog output waveform generation It is a first in first out FIFO memory buffer between the computer and the DACs It allows you to download the points of a waveform to your M Series device without host computer interaction National Instruments Corporation 5 1 M Series User Manual Chapter 5 Analog Output e AO Sample Clock The AO Sample Clock signal reads a sample from the DAC FIFO and generates the AO voltage AO Offset and AO Reference Selection AO offset and AO reference selection signals allow you to change the range of the analog outputs AO Offset and AO Reference Selection M Series User Manual AO offset and AO reference selection allow you to set the AO range The AO range describes the set of voltages the device can generate The digital codes of the DAC are spread evenly across the AO range So if the range is smaller the AO has better resolution that is the voltage output difference between two consecutive codes is smaller Therefore the AO is more accurate The AO range of a device is all of the voltages between AO Offset AO Reference and AO Offset AO Reference The possible settings for AO reference depend
390. t has been carefully reviewed for technical accuracy In the event that technical or typographical errors exist National Instruments reserves the right to make changes to subsequent editions of this document without prior notice to holders of this edition The reader should consult National Instruments if errors are suspected In no event shall National Instruments be liable for any damages arising out of or related to this document or the information contained in it EXCEPT AS SPECIFIED HEREIN NATIONAL INSTRUMENTS MAKES NO WARRANTIES EXPRESS OR IMPLIED AND SPECIFICALLY DISCLAIMS ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE CUSTOMER S RIGHT TO RECOVER DAMAGES CAUSED BY FAULT OR NEGLIGENCE ON THE PART OF NATIONAL INSTRUMENTS SHALL BE LIMITED TO THE AMOUNT THERETOFORE PAID BY THE CUSTOMER NATIONAL INSTRUMENTS WILL NOT BE LIABLE FOR DAMAGES RESULTING FROM LOSS OF DATA PROFITS USE OF PRODUCTS OR INCIDENTAL OR CONSEQUENTIAL DAMAGES EVEN IF ADVISED OF THE POSSIBILITY THEREOF This limitation of the liability of National Instruments will apply regardless of the form of action whether in contract or tort including negligence Any action against National Instruments must be brought within one year after the cause of action accrues National Instruments shall not be liable for any delay in performance due to causes beyond its reasonable control The warranty provided herein does not cover damages defects malfunctions or service fail
391. t power up to the PO P1 or P2 lines The PFI and DIO lines can be set as e A high impedance input with a weak pull down resistor default e An output driving a 0 e An output driving a 1 Refer to the NI DAQmx Help or the LabVIEW Help in version 8 0 or later for more information about setting power up states in NI DAQmx or MAX 3 Note When using your M Series device to control an SCXI chassis DIO lines 0 1 2 and 4 are used as communication lines and must be left to power up in the default high impedance state to avoid potential damage to these signals M Series User Manual 8 6 ni com Digital Routing and Clock Generation The digital routing circuitry has the following main functions Clock Routing Manages the flow of data between the bus interface and the acquisition generation sub systems analog input analog output digital I O and the counters The digital routing circuitry uses FIFOs if present in each sub system to ensure efficient data movement Routes timing and control signals The acquisition generation sub systems use these signals to manage acquisitions and generations These signals can come from the following sources Your M Series device Other devices in your system through RTSI User input through the PFI terminals User input through the PXI_STAR terminal Routes and generates the main clock signals for the M Series device Figure 9 1 shows the clock routing circuitry of an M Series devic
392. t receives the correct number of AI Convert Clock pulses 4 32 ni com Chapter 4 Analog Input Similarly the device ignores all AT Convert Clock pulses until it recognizes an AI Sample Clock pulse Once the device receives the correct number of AI Convert Clock pulses it ignores subsequent AI Convert Clock pulses until it receives another AI Sample Clock Figures 4 18 4 19 4 20 and 4 21 show timing sequences for a four channel acquisition using AI channels 0 1 2 and 3 and demonstrate proper and improper sequencing of AI Sample Clock and AI Convert Clock Al Sample Clock Al Convert Clock 012 3 Sample 3 P4 0 123 Sample 1 0 1 23 Sample 2 Channel Measured q Figure 4 18 Al Sample Clock Pulses Are Gated Off Al Sample Clock Too Fast For Convert Clock Al Sample Clock Al Convert Clock 012 3 pig Sample 3 0123 Sample 1 012 3 pig Sample 2 Channel Measured lt D Figure 4 19 Al Convert Clock Too Fast For Al Sample Clock Al Convert Clock Pulses Are Gated Off Al Sample Clock Channel Measured Sample 1 Sample 2 Sample 3 Al Convert Clock
393. teps to install the disk drive power connector 1 Power off and unplug the computer 2 Remove the computer cover National Instruments Corporation 3 9 M Series User Manual Chapter 3 Connector and LED Information 3 Attach the PC disk drive power connector to the disk drive power connector on the device as shown in Figure 3 4 B Note The power available on the disk drive power connectors in a computer can vary For example consider using a disk drive power connector that is not in the same power chain as the hard drive 1 Device Disk Drive Power Connector 2 PC Disk Drive Power Connector Figure 3 4 Connecting to the Disk Drive Power Connector 4 Replace the computer cover and plug in and power on the computer 5 Self calibrate the PCI Express DAQ device in MAX by following the instructions in the Device Self Calibration section of Chapter 1 Getting Started ay Note Connecting or disconnecting the disk drive power connector can affect the analog performance of your device To compensate for this NI recommends that you self calibrate after connecting or disconnecting the disk drive power connector USB Device Fuse Replacement M Series USB devices have a replaceable T 2A 250V 5 x 20 mm fuse that protects the device from overcurrent through the power connector USB 6281 6289 Devices USB 628x devices also have a replaceable Littelfuse 0453002 F 2A 250V fuse that protects the device from overcurr
394. ter Timer Signal Default Pin Number Name CTR 0 SRC 37 PFI 8 CTR 0 GATE 3 PFI 9 CTR 0 AUX 45 PFI 10 CTR 0 OUT 2 PFI 12 CTROA 37 PFI 8 CTROZ 3 PFI 9 CTROB 45 PFI 10 CTR 1 SRC 42 PFI 3 CTR 1 GATE 41 PFI 4 CTR 1 AUX 46 PFI 11 CTR 1 OUT 40 PFI 13 CTR 1 A 42 PFI 3 CTRIZ 41 PFI 4 CTR 1B 46 PFI 11 FREQ OUT 1 PFI 14 3 Note For more information about default NI DAQmx counter inputs refer to Connecting Counter Signals in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later PCI PXI 6280 Specifications Refer to the M 628x Specifications for more detailed information about the PCI PXI 6280 device PCI PXI 6280 Accessory and Cabling Options This section describes some cable and accessory options for M Series devices with one 68 pin connector such as the PCI PXI 6280 Refer to ni com for other accessory options including new devices M Series User Manual A 128 ni com Appendix Device Specific Information SCXI Accessories SCXI is a programmable signal conditioning system designed for measurement and automation applications To connect your M Series device to an SCXI chassis use the SCXI 1349 adapter and an SHC68 68 EPM cable You also can use an M Series device to control the SCXI section of a PXI SCXI combination chassis such as the PXI 1010 or PXI 1011 The M Series device in the rightmost PXI slot controls the SCXI devices No cables or adapters are necessary Refer to the SCXT
395. ter is loaded with the number of pretriggered samples in this example four The value decrements with each pulse on AI Sample Clock until the value reaches zero The sample counter is then loaded with the number of posttriggered samples in this example three Al Start Trigger Al Reference Trigger n a Al Sample Clock Al Convert Clock Il Il Il ll i l 2 1 0 2 Scan Counter 3 Figure 4 15 Pretriggered Data Acquisition Example National Instruments Corporation 4 27 M Series User Manual Chapter 4 Analog Input If an AI Reference Trigger ai ReferenceTrigger pulse occurs before the specified number of pretrigger samples are acquired the trigger pulse is ignored Otherwise when the AI Reference Trigger pulse occurs the sample counter value decrements until the specified number of posttrigger samples have been acquired M Series devices feature the following analog input timing signals e Al Sample Clock Signal e Al Sample Clock Timebase Signal e AI Convert Clock Signal e AI Convert Clock Timebase Signal e AI Hold Complete Event Signal e AI Start Trigger Signal e AI Reference Trigger Signal e AI Pause Trigger Signal Al Sample Clock Signal M Series User Manual Use the AI Sample Clock ai SampleClock signal to initiate a set of measurements Your M Series device samples the AI signals of every channel in
396. terminals are configured as inputs by default Other Timing Requirements Your DAQ device only acquires data during an acquisition The device ignores AI Sample Clock when a measurement acquisition is not in progress During a measurement acquisition you can cause your DAQ device to ignore AI Sample Clock using the AI Pause Trigger signal A counter on your device internally generates AI Sample Clock unless you select some external source AI Start Trigger starts this counter and either software or hardware can stop it once a finite acquisition completes When using an internally generated AI Sample Clock you also can specify a configurable delay from AI Start Trigger to the first AI Sample Clock pulse By default this delay is set to two ticks of the AI Sample Clock Timebase signal When using an externally generated AI Sample Clock you must ensure the clock signal is consistent with respect to the timing requirements of AI Convert Clock Failure to do so may result in AI Sample Clock pulses that are masked off and acquisitions with erratic sampling intervals Refer to AI Convert Clock Signal for more information about the timing requirements between AI Convert Clock and AI Sample Clock National Instruments Corporation 4 29 M Series User Manual Chapter 4 Analog Input Figure 4 16 shows the relationship of AI Sample Clock to AI Start Trigger Al Sample Clock Timebase Al Start Trigger
397. th floating signal sources 4 15 using with ground referenced signal sources 4 22 when to use with floating signal sources 4 13 when to use with ground referenced signal sources 4 20 digital waveform acquisition 6 4 waveform generation 6 5 digital I O 6 1 block diagram 6 2 circuitry 6 2 connecting signals 6 9 DI change detection 6 8 digital waveform generation 6 5 getting started with applications in software 6 10 I O protection 6 7 programmable power up states 6 7 static DIO 6 2 timing diagrams B 31 triggering 11 1 waveform acquisition 6 4 waveform triggering 6 3 digital routing 9 1 digital signals Change Detection Event 6 8 connecting 6 9 DI Sample Clock 6 4 DO Sample Clock 6 5 digital source triggering 11 1 digital waveform M Series User Manual l 6 acquisition 6 4 generation 6 5 disk drive power PCI Express 3 9 disk drive power connector PCI Express devices 3 9 DMA 10 1 as a transfer method 10 4 changing data transfer methods 10 5 controllers 10 1 DO Sample Clock signal 6 5 do SampleClock 6 5 documentation conventions used in manual xv NI resources E 1 related documentation xvi double buffered acquisition 4 11 drivers NI resources E 1 duplicate count prevention 7 34 enabling in NI DAQmx 7 37 example 7 35 prevention example 7 36 troubleshooting C 3 E E Series differences from M Series D 1 migrating applications from D 1 pinout comparison versus M Series
398. th respect to each other are listed in the specifications document for your device Exceeding the maximum input voltage of AI signals distorts the measurement results Exceeding the maximum input voltage rating also can damage the device and the computer NI is not liable for any damage resulting from such signal connections AI ground reference setting is sometimes referred to as AI terminal configuration Configuring Al Ground Reference Settings in Software You can program channels on an M Series device to acquire with different ground references To enable multimode scanning in LabVIEW use NI DAQmx Create Virtual Channel vi of the NI DAQmx API You must use a new VI for each channel or group of channels configured in a different input mode In Figure 4 3 channel 0 is configured in differential mode and channel is configured in RSE mode Differential Y DAGmx Fi Dev aio v to Figure 4 3 Enabling Multimode Scanning in LabVIEW To configure the input mode of your voltage measurement using the DAQ Assistant use the Terminal Configuration drop down list Refer to the DAQ Assistant Help for more information about the DAQ Assistant To configure the input mode of your voltage measurement using the NI DAQmx C API set the terminalConfig property Refer to the NI DAQmx C Reference Help for more information M Series User Manual 4 6 ni com Chapter 4 Analog Input Multichannel Scanning Considerations M S
399. the devices for precise synchronization of functions National Instruments Corporation G 15 M Series User Manual Glossary sample counter scan scan interval scan rate SCC SCXI sensor signal conditioning signal source signals M Series User Manual Seconds Samples The clock that counts the output of the channel clock in other words the number of samples taken On devices with simultaneous sampling this counter counts the output of the scan clock and hence the number of scans One or more analog or digital input samples Typically the number of input samples in a scan is equal to the number of channels in the input group For example one pulse from the scan clock produces one scan which acquires one new sample from every analog input channel in the group Controls how often a scan is initialized is regulated by the AI Sample Clock signal Reciprocal of the scan interval Signal Conditioning Carriers A compact modular form factor for signal conditioning modules Signal Conditioning eXtensions for Instrumentation The National Instruments product line for conditioning low level signals within an external chassis near sensors so that only high level signals are sent to DAQ devices in the noisy PC environment A device that responds to a physical stimulus heat light sound pressure motion flow and so on and produces a corresponding electrical signal Primary characteristics of sensors
400. the NI DAQmx Help or the LabVIEW Help in version 8 0 or later for more information You also can specify whether the measurement acquisition stops on the rising edge or falling edge of AI Reference Trigger Using an Analog Source When you use an analog trigger source the acquisition stops on the first rising edge of the Analog Comparison Event signal Routing Al Reference Trigger Signal to an Output Terminal You can route AI Reference Trigger out to any PFI lt 0 15 gt or RTSI lt 0 7 gt terminal All PFI terminals are configured as inputs by default National Instruments Corporation 4 37 M Series User Manual Chapter 4 Analog Input Al Pause Trigger Signal 3 Use the AI Pause Trigger ai PauseTrigger signal to pause and resume a measurement acquisition The internal sample clock pauses while the external trigger signal is active and resumes when the signal is inactive You can program the active level of the pause trigger to be high or low Using a Digital Source To use AI Sample Clock specify a source and a polarity The source can be any of the following signals e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXI STAR The source also can be one of several other internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later for more information Using an Analog Source When you use an analog trigger source the internal sample clock pause
401. the device no external connections are required You cannot route an AO channel to be its own offset On NI 628x devices the AO reference of each analog output can be individually set to one of the following e 10V e 45V e APFI lt 0 1 gt e A0 lt 0 3 gt You can connect an external signal to APFI lt 0 1 gt to provide the AO reference You can route the output of one of the AO lt 0 3 gt signals to be the AO reference for a different AO lt 0 3 gt signal For example AO 0 can be routed to be the AO reference of AO 1 This route is done on the device no external connections are required You cannot route an AO channel to be its own reference The AO reference can be a positive or negative voltage If AO reference is a negative voltage the polarity of the AO output is inverted Minimizing Glitches on the Output Signal When you use a DAC to generate a waveform you may observe glitches on the output signal These glitches are normal when a DAC switches from one voltage to another it produces glitches due to released charges The largest glitches occur when the most significant bit of the DAC code National Instruments Corporation 5 3 M Series User Manual Chapter 5 Analog Output changes You can build a lowpass deglitching filter to remove some of these glitches depending on the frequency and nature of the output signal Visit ni com support for more information about minimizing glitches Analog Ou
402. the frequency generator circuit Using the Frequency Generator The frequency generator can output a square wave at many different frequencies The frequency generator is independent of the two general purpose 32 bit counter timer modules on M Series devices Figure 7 27 shows a block diagram of the frequency generator Frequency Output 20 MHz Timebase 2 Timebase Frequency Generator FREQ OUT 100 kHz Timebase Divisor 1 16 Figure 7 27 Frequency Generator Block Diagram The frequency generator generates the Frequency Output signal The Frequency Output signal is the Frequency Output Timebase divided by a number you select from to 16 The Frequency Output Timebase can be either the 20 MHz Timebase divided by 2 or the 100 kHz Timebase The duty cycle of Frequency Output is 50 if the divider is either 1 or an even number For an odd divider suppose the divider is set to D In this case Frequency Output is low for D 1 2 cycles and high for D 1 2 cycles of the Frequency Output Timebase Figure 7 28 shows the output waveform of the frequency generator when the divider is set to 5 Frequency Output Timebase FREQ OUT Divisor 5 Figure 7 28 Frequency Generator Output Waveform National Instruments Corporation 7 23 M Series User Manual Chapter 7 Count
403. thods of measuring frequency Table 7 2 Frequency Measurement Method Comparison Measures High Measures Low Number of Number of Frequency Frequency Counters Measurements Signals Signals Method Used Returned Accurately Accurately 1 1 1 Poor Good 1b 1 Many Fair Good 2 lor2 1 Good Poor 3 2 1 Good Good For information about connecting counter signals refer to the Default Counter Timer Pinouts section Position Measurement You can use the counters to perform position measurements with quadrature encoders or two pulse encoders You can measure angular position with X1 X2 and X4 angular encoders Linear position can be measured with two pulse encoders You can choose to do either a single point on demand position measurement or a buffered sample clock position measurement You must arm a counter to begin position measurements M Series User Manual Measurements Using Quadrature Encoders The counters can perform measurements of quadrature encoders that use X1 X2 or X4 encoding A quadrature encoder can have up to three channels channels A B and Z e X1 Encoding When channel A leads channel B in a quadrature cycle the counter increments When channel B leads channel A in a quadrature cycle the counter decrements The amount of increments and decrements per cycle depends on the type of encoding X1 X2 or X4 ni com Chapter 7 Counters Figure 7 14 shows a quadrature cycle and the resultin
404. ting from improper signal connections 1 For some PXI M Series devices there are two variants one that will work in PXI hybrid slots and one that supports local bus for SCXI control when the device is in the right most slot Refer to the device specifications for more information National Instruments Corporation 10 3 M Series User Manual Chapter 10 Bus Interface Data Transfer Methods M Series User Manual NI PCI PCle PXI PXle Devices The three primary ways to transfer data across the PCI bus are direct memory access DMA interrupt request IRQ and programmed I O Direct Memory Access DMA DMaA is a method to transfer data between the device and computer memory without the involvement of the CPU This method makes DMA the fastest available data transfer method NI uses DMA hardware and software technology to achieve high throughput rates and increase system utilization DMA is the default method of data transfer for PCI PCIe PXI PXIe devices Interrupt Request IRQ IRQ transfers rely on the CPU to service data transfer requests The device notifies the CPU when it is ready to transfer data The data transfer speed is tightly coupled to the rate at which the CPU can service the interrupt requests If you are using interrupts to transfer data at a rate faster than the rate the CPU can service the interrupts your systems may start to freeze Programmed I O Programmed I O is a data transfer mechanism where the use
405. ting power up states in NI DAQmx or MAX National Instruments Corporation 6 7 M Series User Manual Chapter 6 Digital 1 0 B Note When using your M Series device to control an SCXI chassis DIO lines 0 1 2 and 4 are used as communication lines and must be left to power up in the default high impedance state to avoid potential damage to these signals DI Change Detection You can configure the DAQ device to detect changes in the DIO signals Figure 6 3 shows a block diagram of the DIO change detection circuitry Enable P0 0 Synch Ea Enable Change Detection Event i P0 31 Synch Enable Re Enable Figure 6 3 DI Change Detection 3 Note DI change detection is supported by NI DAQmx 8 0 and later You can enable the DIO change detection circuitry to detect rising edges falling edges or either edge individually on each DIO line The DAQ devices synchronize each DI signal to 80MHzTimebase and then sends the signal to the change detectors The circuitry ORs the output of all enabled change detectors from every DI signal The result of this OR is the Change Detection Event signal M Series User Manual 6 8 ni com Chapter 6 Digital I O The Change Detection Event signal can do the following e Drive any RTSI lt 0 7 gt PFI lt 0 15 gt or PX
406. to an Output Terminal You can route Counter n Z out to RTSI lt 0 7 gt 7 28 ni com Chapter 7 Counters Counter n Up_Down Signal Counter n Up_Down is another name for the Counter n B signal Counter n HW Arm Signal The Counter n HW Arm signal enables a counter to begin an input or output function To begin any counter input or output function you must first enable or arm the counter In some applications such as buffered semi period measurement the counter begins counting when it is armed In other applications such as single pulse width measurement the counter begins waiting for the Gate signal when it is armed Counter output operations can use the arm signal in addition to a start trigger Software can arm a counter or configure counters to be armed on a hardware signal Software calls this hardware signal the Arm Start Trigger Internally software routes the Arm Start Trigger to the Counter n HW Arm input of the counter Routing Signals to Counter n HW Arm Input Any of the following signals can be routed to the Counter n HW Arm input e RTSI lt 0 7 gt e PFI lt 0 15 gt e AIT Reference Trigger ai ReferenceTrigger e AI Start Trigger ai StartTrigger e PXI STAR e Analog Comparison Event Counter Internal Output can be routed to Counter 0 HW Arm Counter 0 Internal Output can be routed to Counter 1 HW Arm Some of these options may not be available in some driver software Counter n Internal Output
407. top it once a finite generation completes When using an internally generated AO Sample Clock you also can specify a configurable delay from AO Start Trigger to the first AO Sample Clock pulse By default this delay is two ticks of AO Sample Clock Timebase 5 10 ni com Chapter 5 Analog Output Figure 5 6 shows the relationship of AO Sample Clock to AO Start Trigger AO Sample Clock Timebase AO Start Trigger i AO Sample Clock Delay From Start Trigger Figure 5 6 AO Sample Clock and AO Start Trigger AO Sample Clock Timebase Signal The AO Sample Clock Timebase ao SampleClockTimebase signal is divided down to provide a source for AO Sample Clock You can route any of the following signals to be the AO Sample Clock Timebase signal e 20 MHz Timebase e 100 kHz Timebase e PXI CLKI10 e PFI lt 0 15 gt e RTSI lt 0 7 gt e PXI STAR e Analog Comparison Event an analog trigger AO Sample Clock Timebase is not available as an output on the I O connector You might use AO Sample Clock Timebase if you want to use an external sample clock signal but need to divide the signal down If you want to use an external sample clock signal but do not need to divide the signal then you should use AO Sample Clock rather than AO Sample Clock Timebase National Instruments Corporation 5 11 M Series User Manual Chapter 5 Analog Output Getting Started
408. tput Data Generation Methods M Series User Manual When performing an analog output operation you either can perform software timed or hardware timed generations Software timed generations With a software timed generation software controls the rate at which data is generated Software sends a separate command to the hardware to initiate each DAC conversion In NI DAQmx software timed generations are referred to as on demand timing Software timed generations are also referred to as immediate or static operations They are typically used for writing a single value out such as a constant DC voltage Hardware timed generations With a hardware timed generation a digital hardware signal controls the rate of the generation This signal can be generated internally on your device or provided externally Hardware timed generations have several advantages over software timed acquisitions The time between samples can be much shorter The timing between samples can be deterministic Hardware timed acquisitions can use hardware triggering Hardware timed operations can be buffered or non buffered A buffer is a temporary storage in computer memory for to be generated samples Non buffered In non buffered acquisitions data is written directly to the DACs on the device Typically hardware timed non buffered operations are used to write single samples with good latency and known time increments between them
409. triggering For more information about triggering compatibility refer to the specifications document for your device Triggering with a Digital Source Your DAQ device can generate a trigger on a digital signal You must specify a source and an edge The digital source can be any of the PFI RTSI or PXI_STAR signals The edge can be either the rising edge or falling edge of the digital signal A rising edge is a transition from a low logic level to a high logic level A falling edge is a high to low transition Figure 11 1 shows a falling edge trigger 5V Digital Trigger OV Falling Edge Initiates Acquisition Figure 11 1 Falling Edge Trigger National Instruments Corporation 11 1 M Series User Manual Chapter 11 Triggering You also can program your DAQ device to perform an action in response to a trigger from a digital source The action can affect the following e Analog input acquisition e Analog output generation e Counter behavior e Digital waveform acquisition and generation Triggering with an Analog Source Some M Series devices can generate a trigger on an analog signal To find your device triggering options refer to the specifications document for your device Figure 11 2 shows the analog trigger circuit Analog Input e PGIA ADC Channels e gt Al Circuitry Analog Comparison Analog Event Mux Trigger gt AO Circuitry APFI lt 0 1 gt
410. ts Corporation G 7 Glossary Differential mode An analog input mode consisting of two terminals both of which are isolated from computer ground whose difference is measured An input circuit that actively responds to the difference between two terminals rather than the difference between one terminal and ground Often associated with balanced input circuitry but also may be used with an unbalanced source The capability of an instrument to generate and acquire digital signals Static digital I O refers to signals where the values are set and held or rarely change Dynamic digital I O refers to digital systems where the signals are continuously changing often at multi MHz clock rates A representation of information by a set of discrete values according to a prescribed law These values are represented by numbers A TTL level signal having two discrete levels A high and a low level Digital input output Direct Memory Access A method by which data can be transferred to from computer memory from to a device or memory on the bus while the processor does something else DMA is the fastest method of transferring data to from computer memory Performs the transfers between memory and I O devices independently of the CPU Software unique to the device or type of device and includes the set of commands the device accepts A standard architecture for instrumentation class multichannel data acquisition devices A technique
411. tterns A 78 National Instruments Corporation Index pinout A 72 specifications A 78 USB cable strain relief 1 5 USB 6251 Mass Termination accessory options A 81 cabling options A 81 fuse replacement A 83 LED patterns A 83 pinout A 79 specifications A 8 1 USB cable strain relief 1 4 1 5 1 6 USB 6251 Screw Terminal fuse replacement A 71 LED patterns A 71 pinout A 70 signal label 1 3 specifications A 71 USB cable strain relief 1 4 1 5 1 6 USB 6255 USB cable strain relief 1 4 1 5 1 6 USB 6255 Mass Termination A 90 accessory options A 101 cabling options A 101 fuse replacement A 104 LED patterns A 104 pinout A 99 specifications A 101 USB cable strain relief 1 4 1 5 1 6 USB 6255 Screw Terminal A 90 fuse replacement A 98 LED patterns A 98 pinout A 96 signal label 1 3 specifications A 98 USB 6259 BNC cable management 1 5 connecting signals A 115 fuse replacement A 120 LED patterns A 120 pinout A 114 M Series User Manual Index specifications A 120 USB cable strain relief 1 5 USB 6259 Mass Termination accessory options A 123 cabling options A 123 fuse replacement A 125 LED patterns A 125 pinout A 121 specifications A 123 USB cable strain relief 1 4 1 5 1 6 USB 6259 Screw Terminal fuse replacement A 113 LED patterns A 113 pinout A 111 signal label 1 3 specifications A 113 USB cable strain relief 1
412. uch as the following e CB 68LP and CB 68LPR unshielded connector blocks e SCC 68 I O connector block with screw terminals general breadboard area bus terminals and four expansion slots for SCC signal conditioning modules e SCB 68 shielded connector block with temperature sensor e TBX 68 DIN rail mountable connector block e TB 2706 front panel mounted terminal block for PXI M Series devices RTSI Cables Use RTSI bus cables to connect timing and synchronization signals among PCI devices such as M Series E Series CAN and other measurement vision and motion devices Since PXI devices use PXI backplane signals for timing and synchronization no cables are required Cables In most applications you can use the following cables e SHC68 68 EPM High performance cable designed specifically for M Series devices It has individual bundles separating analog and digital signals Each differential analog input channel is routed on an individually shielded twisted pair of wires Analog outputs are also individually shielded e SHC68 68 Lower cost shielded cable with 34 twisted pairs of wire e RC68 68 Highly flexible unshielded ribbon cable Custom Cabling and Connectivity The CA 1000 is a configurable enclosure that gives user defined connectivity and flexibility through customized panelettes Visit ni com for more information about the CA 1000 Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more
413. uire and analyze measurement data in LabVIEW including common measurements measurement fundamentals NI DAQmx key concepts and device considerations The Data Acquisition book of the LabWindows CVI Help contains measurement concepts for NI DAQmx This book also contains Taking an NI DAQmx Measurement in LabWindows CVI which includes step by step instructions about creating a measurement task using the DAQ Assistant In LabWindows CVI select Help Contents then select Using LabWindows CVI Data Acquisition The NI DAQmx Library book of the LabWindows CVI Help contains API overviews and function reference for NI DAQmx Select Library Reference NI DAQm x Library in the LabWindows CVI Help Measurement Studio M Series User Manual If you program your NI DAQmx supported device in Measurement Studio using Visual C Visual C or Visual Basic NET you can interactively create channels and tasks by launching the DAQ Assistant from MAX or from within Visual Studio NET You can generate the configuration code based on your task or channel in Measurement Studio Refer to the DAQ Assistant Help for additional information about generating code You also can create channels and tasks and write your own applications in your ADE using the NI DAQmx API xviii ni com About This Manual For help with NI DAQmx methods and properties refer to the NI DAQmx NET Class Library or the NI DAQmx Visual C Class Library included in the NJ Measur
414. unter 0 Up_Down E Counter 0 Z Counter 1 Counter 1 Source Counter 1 Timebase J Counter i Gale Counter 0 Internal Output Counter 1 Aux A Counter 1 HW Arm F Counter 1 A Counter 0 TC Counter 1 B Counter 1 Up_ Down Counter 1 Z Input Selection Muxes Frequency Generator X Frequency Output Timebase Freq Out National Instruments Corporation Figure 7 1 M Series Counters 7 1 M Series User Manual Chapter 7 Counters The counters have seven input signals although in most applications only a few inputs are used For information about connecting counter signals refer to the Default Counter Timer Pinouts section Counter Input Applications Counting Edges M Series User Manual In edge counting applications the counter counts edges on its Source after the counter is armed You can configure the counter to count rising or falling edges on its Source input You also can control the direction of counting up or down The counter values can be read on demand or with a sample clock Single Point On Demand Edge Counting With single point on demand edge counting the counter counts the number of edges on the Source input after the counter is armed On demand refers to the fact that software can read the counter contents at any time without disturbing the counting process Figure 7 2 shows an example of single point edge counting Counter Armed
415. unter Armed LILALALATATLATAT AT AT 1 2 1 2 3 1 2 3 1 2 2 Discard 3 B Discard 3 2 Discard 3 Figure 7 8 Buffered Period Measurement Note that if you are using an external signal as the Source at least one Source pulse should occur between each active edge of the Gate signal This condition ensures that correct values are returned by the counter If this condition is not met consider using duplicate count prevention described in the Duplicate Count Prevention section For information about connecting counter signals refer to the Default Counter Timer Pinouts section National Instruments Corporation 7 7 M Series User Manual Chapter 7 Counters Semi Period Measurement M Series User Manual In semi period measurements the counter measures a semi period on its Gate input signal after the counter is armed A semi period is the time between any two consecutive edges on the Gate input You can route an internal or external periodic clock signal with a known period to the Source input of the counter The counter counts the number of rising or falling edges occurring on the Source input between two edges of the Gate signal You can calculate the semi period of the Gate input by multiplying the period of the Source signal by the number of edges returned by the counter Single Semi Period Measurem
416. urce Some of these options may not be available in some driver software M Series User Manual 7 26 ni com Chapter 7 Counters Routing Counter n Source to an Output Terminal You can route Counter n Source out to any PFI lt 0 15 gt or RTSI lt 0 7 gt terminal All PFIs are set to high impedance at startup Counter n Gate Signal The Counter n Gate signal can perform many different operations depending on the application including starting and stopping the counter and saving the counter contents Routing a Signal to Counter n Gate Each counter has independent input selectors for the Counter n Gate signal Any of the following signals can be routed to the Counter n Gate input e RTSI lt 0 7 gt e PFI lt 0 15 gt e AT Reference Trigger ai ReferenceTrigger e AI Start Trigger ai StartTrigger e AT Sample Clock ai SampleClock e AI Convert Clock ai ConvertClock e AO Sample Clock ao SampleClock e DI Sample Clock di SampleClock e DO Sample Clock do SampleClock e PXI STAR e Change Detection Event e Analog Comparison Event In addition Counter 1 Internal Output or Counter 1 Source can be routed to Counter 0 Gate Counter 0 Internal Output or Counter 0 Source can be routed to Counter 1 Gate Some of these options may not be available in some driver software Routing Counter n Gate to an Output Terminal You can route Counter n Gate out to any PFI lt 0 15 gt or RTSI lt 0 7 gt terminal All PFIs are
417. ures caused by owner s failure to follow the National Instruments installation operation or maintenance instructions owner s modification of the product owner s abuse misuse or negligent acts and power failure or surges fire flood accident actions of third parties or other events outside reasonable control Copyright Under the copyright laws this publication may not be reproduced or transmitted in any form electronic or mechanical including photocopying recording storing in an information retrieval system or translating in whole or in part without the prior written consent of National Instruments Corporation National Instruments respects the intellectual property of others and we ask our users to do the same NI software is protected by copyright and other intellectual property laws Where NI software may be used to reproduce software or other materials belonging to others you may use NI software only to reproduce materials that you may reproduce in accordance with the terms of any applicable license or other legal restriction Trademarks National Instruments NI ni com and LabVIEW are trademarks of National Instruments Corporation Refer to the Terms of Use section on ni com legal for more information about National Instruments trademarks FireWire is the registered trademark of Apple Computer Inc Other product and company names mentioned herein are trademarks or trade names of their respective companies Members
418. urn e Paths 4 gl So Input Multiplexers 1 0 Connector 0 e X Al SENSE Al GND V M Series Device Configured in DIFF Mode Figure 4 6 Differential Connections for Floating Signal Sources with Balanced Bias Resistors Both inputs of the NI PGIA require a DC path to ground in order for the NI PGIA to work If the source is AC coupled capacitively coupled the NI PGIA needs a resistor between the positive input and AI GND If the source has low impedance choose a resistor that is large enough not to significantly load the source but small enough not to produce significant input offset voltage as a result of input bias current typically 100 KQ to Mational Instruments Corporation 4 17 M Series User Manual Chapter 4 Analog Input 1 MQ In this case connect the negative input directly to AI GND If the source has high output impedance balance the signal path as previously described using the same value resistor on both the positive and negative inputs be aware that there is some gain error from loading down the source as shown in Figure 4 7 M Series Device AC Coupling AC Coupled l AR Floating Signal Vs Source o Al o Al SENSE Al GND Figure 4 7 Differential Connections for AC Coupled Floating Sources with Balanced Bias Resistors O Using Non Referenced Single Ended NRSE Connection
419. use resets automatically within a few seconds after the overcurrent condition is removed For more information about the self resetting fuse and precautions to take to avoid improper connection of 5 V and ground terminals refer to the KnowledgeBase document Self Resetting Fuse Additional Information by going to ni com info and entering the info code pptc USB 6281 6289 Devices All USB 628x devices have a user replaceable socketed fuse to protect the supply from overcurrent conditions When an overcurrent condition occurs check your cabling to the 5 V terminals and replace the fuse as described in the USB Device Fuse Replacement section A Caution Never connect the 5 V power terminals to analog or digital ground or to any other voltage source on the M Series device or any other device Doing so can damage the device and the computer NI is not liable for damage resulting from such a connection The power rating on most devices is 4 75 to 5 25 VDC at 1 A Refer to the specifications document for your device to obtain the device power rating 3 Note NI PCle 625x Devices M Series PCI Express devices supply less than 1 A of 5 V power unless you use the disk drive power connector Refer to the PCI Express Device Disk Drive Power Connector section for more information AA Note The NI 6221 37 pin device does not have a 5 V terminal M Series User Manual 3 6 ni com Chapter 3 Connector and LED Information USB Chassis Ground U
420. vice You can use two screw terminal accessories with one M Series device by using both connectors RTSI Cables Use RTSI bus cables to connect timing and synchronization signals among PCI devices such as M Series E Series CAN and other measurement vision and motion devices Since PXI devices use PXI backplane signals for timing and synchronization no cables are required TB 2706 uses Connector 0 of your PXI device After a TB 2706 is installed Connector 1 cannot be used National Instruments Corporation A 153 M Series User Manual Appendix Device Specific Information Cables In most applications you can use the following cables e SHC68 68 EPM High performance cable designed specifically for M Series devices It has individual bundles separating analog and digital signals Each differential analog input channel is routed on an individually shielded twisted pair of wires Analog outputs are also individually shielded e SHC68 68 Lower cost shielded cable with 34 twisted pairs of wire e RC68 68 Highly flexible unshielded ribbon cable Custom Cabling and Connectivity The CA 1000 is a configurable enclosure that gives user defined connectivity and flexibility through customized panelettes Visit ni com for more information about the CA 1000 Refer to the Custom Cabling section of Chapter 2 DAQ System Overview for more information about custom cabling solutions NI recommends that you use the SHC68
421. while the external trigger signal is low and resumes when the signal goes high or vice versa For continuous pulse generations the counter stops generating pulses while the external trigger signal is low and resumes when the signal goes high or vice versa When using a pause trigger the pause trigger source is routed to the Counter n Gate signal input of the counter Other Counter Features Cascading Counters Counter Filters You can internally route the Counter n Internal Output and Counter n TC signals of each counter to the Gate inputs of the other counter By cascading two counters together you can effectively create a 64 bit counter By cascading counters you also can enable other applications For example to improve the accuracy of frequency measurements use reciprocal frequency measurement as described in the Method 3 bullet in the Frequency Measurement section You can enable a programmable debouncing filter on each PFI RTSL or PXI_STAR signal When the filters are enabled your device samples the input on each rising edge of a filter clock M Series devices use an onboard oscillator to generate the filter clock with a 40 MHz frequency B Note NI DAQmx only supports filters on counter inputs M Series User Manual 7 32 ni com Chapter 7 Counters The following is an example of low to high transitions of the input signal High to low transitions work similarly Assume that an input terminal has been low for a l
422. with AO Applications in Software You can use an M Series device in the following analog output applications e Single point on demand generation e Finite generation e Continuous generation e Waveform generation You can perform these generations through programmed I O interrupt or DMA data transfer mechanisms Some of the applications also use start triggers and pause triggers 3 Note For more information about programming analog output applications and triggers in software refer to the NI DAQmx Help or the LabVIEW Help in version 8 0 or later M Series User Manual 5 12 ni com Digital 1 0 M Series devices contain up to 32 lines of bidirectional DIO signals on Port 0 In addition M Series devices have up to 16 PFI signals that can function as static DIO signals M Series devices support the following DIO features on Port 0 e Up to 32 lines of DIO e Direction and function of each terminal individually controllable e Static digital input and output e High speed digital waveform generation e High speed digital waveform acquisition e DI change detection trigger interrupt National Instruments Corporation 6 1 M Series User Manual Chapter 6 Digital I O Figure 6 1 shows the circuitry of one DIO line Each DIO line is similar The following sections provide information about the various parts of the DIO circuit DO Waveform Generation FIFO DO Sample Clock Stati
423. with one M Series device by using both connectors Screw Terminal Accessories National Instruments offers several styles of screw terminal connector blocks Use an SH68 68 EPM shielded cable to connect an M Series device to a connector block such as the following e CB 68LP and CB 68LPR unshielded connector blocks e SCC 68 I O connector block with screw terminals general breadboard area bus terminals and four expansion slots for SCC signal conditioning modules e SCB 68 shielded connector block with temperature sensor e TBX 68 DIN rail mountable connector block National Instruments Corporation A 161 M Series User Manual Appendix Device Specific Information You can use one screw terminal accessory with the signals on either connector of your M Series device You can use two screw terminal accessories with one M Series device by using both connectors Cables In most applications you can use the following cables __ SH68 68 EPM High performance cable with individual bundles separating analog and digital signals Each differential analog input channel is routed on an individually shielded twisted pair of wires Analog outputs are also individually shielded e R68 68 Highly flexible unshielded ribbon cable Custom Cabling and Connectivity The CA 1000 is a configurable enclosure that gives user defined connectivity and flexibility through customized panelettes Visit ni com for more information about the CA 1000
424. xternal it is considered to be a free running clock In this case the Sync Convert Clock Timebase is the inverted version of the Convert Clock Timebase signal The idea is to use the falling edge of the original signal to synchronize external signals before the rising edge of the Convert Clock Timebase occurs after polarity selection This case is the one described in this section e When Convert Clock Timebase is not going to be divided by the SI2 counter in the case of an external convert signal this signal is assumed to be not free running and highly irregular In this case Sync Convert Clock Timebase is selected to be the actual external signal and Convert Clock Timebase is a delayed version of the external signal This delay is long enough so that external signals can be synchronized with Sync Convert Clock Timebase and used by Convert Clock Timebase For timing diagrams and parameters for this case refer to the Convert Clock section M Series User Manual Appendix B Timing Diagrams The second level of timing is the sample level Basically converts are grouped in sets called samples and the timing of the samples can be independent from the timing of the converts The M Series device can use a timebase to generate the sample timing This timebase is called Sample Clock Timebase This signal can be internal for example an internal timebase or external Either way the signal gets divided in the SI counter and used to generate S
425. y dividing it down using the SI2 counter If the SI2 counter is used it is assumed that a reliable free running clock is being used Refer to the AI Timing Clocks section for the timing relationship between Convert Clock Timebase and Sync Convert Clock Timebase If the SI2 counter is not being used external convert case the Convert Clock Timebase is assumed to be not free running and the relationship between the Convert Clock Timebase and the Sync Convert Clock Timebase is an asynchronous delay Whether the SI2 counter is used or not the timing parameters in the generation of Convert Clock are the same starting at the Convert Clock Timebase signal Selected Reference Trigger Reference Trigger Terminal Se Ce Terminal Terminal Start Trigger Terminal D Selected Start Trigger Selected Pause Trigger TSI Terminal gt La Pause Trigger SI Start Terminal SI Sample Clock Timebase Counter g Sync Sample Clock Timebase Block Terminal _Al_Convert SI2 TC Convert Clock Timebase Counter Sync Convert Clock Timebase boas tt Terminal Selected Sample Clock oD Terminal M Series User Manual Figure B 6 Convert Clock and the Analog Input Timing Engine B 8 ni com Appendix B Timing Diagrams

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