CME-Atom User Manual - Diamond Systems Corporation
Contents
1. Signal Name Signal Function Direction IDE_D 0 15 Bidirectional data to from IDE device 1 0 IDE_ A 0 2 Address lines to IDE device O IDE_IOW I O write line to IDE device O Data latched on trailing rising edge IDE_IOR I O read line to IDE device O IDE_REQ IDE Device DMA Request l It is asserted by the IDE device to request a data transfer IDE_ACK IDE Device DMA Acknowledge O IDE_CS1 IDE Device Chip Select for 1F0h to 1FFh range O IDE CS3 IDE Device Chip Select for 3F0h to 3FFh range O IDE_IORDY IDE device I O ready input l IDE RESET Reset output to IDE device O IDE_IRQ Interrupt request from IDE device IDE_CBLID Input from off module hardware indicating the type of IDE cable being I used High indicates a 40 pin cable used for legacy IDE modes Low indicates that an 80 pin cable with interleaved grounds is used Such a cable is required for Ultra DMA 66 100 and 133 modes CME Atom User Manual 1 3 www diamondsystems com Page 26 4 2 2 PCI Bus Interface DIAMOND SYSTEMS This set of pins implements the module s PCI expansion bus For further information regarding the functions of the PCI bus signals refer to the PCI Bus Specification available from the PCI Special Interest Group http www pcisig com specifications Signal Name Signal Function Direction PCI_AD 0 31 PCI bus multiplexed address and data lines UO PCI_C BE 0 32. D1 C1 D2 C2 D3 C3 D4 C4 D5 C5 D6 C6 D7 C7 D8 C8 D9 C9 D10 C10 D11 C11 D12 C12 D13 C13 D14 C14 D15 C15 D16 C16 D17 C17 D18 C18 D19 C19 D20 C20 D21 C21 D22 C22 D23 C23 D24 C24 D25 C25 D26 C26 D27 C27 D28 C28 D29 C29 D30 C30 D31 C31 D32 C32 D33 C33 D34 C34 D35 C35 CME Atom User Manual 1 3 GND IDE_D7 IDE_D6 IDE_D3 IDE_D15 IDE_D8 IDE_D9 IDE_D2 IDE_D13 IDE_D1 GND IDE_D14 IDE_IORDY IDE_IOR PCI_PME PCI_GNT2 PCI_REQ2 PCI_GNT1 PCI_REQ1 PCI_GNTO GND PCI_REQ0 PCI_RESET PCI_AD0 PCI_AD2 PCI_AD4 PCI_AD6 PCI_AD8 PCI_AD10 PCI_AD12 GND PCI_AD14 PCI_C BE1 PCI_PERR PCI_LOCK www diamondsystems com PCI_FRAME PCI_AD16 PCI_AD18 PCI_AD20 PCI_AD22 GND PCI_AD24 PCI_AD26 PCI_AD28 PCI_AD30 PCI_IRQC PCI_IRQD PCI_CLKRUN PCI_M66EN PCI_CLK GND NC NC NC NC NC TYPE2 NC NC GND NC NC RSVD RSVD NC NC GND NC NC GND D36 C36 D37 C37 D38 C38 D39 C39 D40 C40 D41 C41 D42 C42 D43 C43 D44 C44 D45 C45 D46 C46 D47 C47 D48 C48 D49 C49 D50 C50 D51 C51 D52 C52 D53 C53 D54 C54 D55 C55 D56 C56 D57 C57 D58 C58 D59 C59 D60 C60 D61 C61 D62 C62 D63 C63 D64 C64 D65 C65 D66 C66 D67 C67 D68 C68 D69 C69 D70 C70 PCI_DEVSEL PCI_IRDY PCI_C BE2 PCI_AD17 PCI_AD19 GND PCI_AD21 PCI_AD2
3. 5 4 6 POST Code Checkpoints The POST code checkpoints are the largest set of checkpoints during the BIOS pre boot process The following table describes the type of checkpoints that may occur during the POST portion of the BIOS Checkpoint Description 03 Disable NMI Parity video for EGA and DMA conirollers Initialize BIOS POST Runtime data area Also initialize BIOS modules on POST entry and GPNV area Initialized CMOS as mentioned in the Kernel Variable wCMOSFIags 04 Check CMOS diagnostic byte to determine if battery power is OK and CMOS checksum is OK Verify CMOS checksum manually by reading storage area If the CMOS checksum is bad update CMOS with power on default values and clear passwords Initialize status register A Initializes data variables that are based on CMOS setup questions Initializes both the 8259 compatible PICs in the system 05 Initializes the interrupt controlling hardware generally PIC and interrupt vector table 06 Do R W test to CH 2 count reg Initialize CH 0 as system timer Install the POSTINT1Ch handler Enable IRQ 0 in PIC for system timer interrupt Traps INT1Ch vector to POSTINT1ChHandlerBlock 07 Fixes CPU POST interface calling pointer 07 Fixes CPU POST interface calling pointer 08 Initializes the CPU The BAT test is being done on KBC Program the keyboard controller command byte is being done after Auto detection of KB MS using AMI KB 5 CU Earl
4. DIAMOND SYSTEMS CORPORATION CME Atom COM Express 1 0 Computer On Module based on Intel Atom Z530P Z510PT CPU Revision Date Comment 1 0 02 08 10 Initial Release 1 1 03 02 10 Corrections to product model names and specs 1 2 05 24 10 Addition of subsystem detail to block diagram 1 3 11 29 10 Corrections to COM Express connector information Copyright 2010 FOR TECHNICAL SUPPORT Diamond Systems Corporation PLEASE CONTACT 1255 Terra Bella Ave Mountain View CA 94043 USA support diamondsystems com Tel 1 650 810 2500 Fax 1 650 810 2525 www diamondsystems com DIAMOND SYSTEMS CONTENTS IMPORTANT SAFE HANDLING INFORMATION sse ee kk kk keka kr ka kr Ka kr Ka kk KA kk KA kk KA KA KA KA KAKA KARA KARA KRA 3 Ts INTRODUC TION xxzx gt gt ape epoeAeee e mmoeeyy rbrbr 4 Tt ACCU Ss otc ace oie xure uuu Kin kral a cee dud sate aa ale d ala a Sea ae du RA Xw Gra kaka ec E aps 4 2 FUNCTIONAL OVERVIEW u uu k di dek erka dae d k l koka aaia Can n qaqa qas qaa laqasqa p la sae ad b n pa R L 6 W R lt e c 2 Rr n cd E _ aJ Hx 6 2 2 Board Dimensions Mounting Holes and Connectors n 7 2 3 Bus and Interface Connector Summasry Eke ek kek ka kk kk kk Ka kk KA KA KAKA KAKA KARA KAKA KARA KRA 9 2 4 COM Express Bus Cornnectors kk dada U uu aak aka keley week kak aa k we a sa aa l n nea aie ka
5. Gigabit Ethernet Controller 0 Media Dependent Interface VO GBEO_MDI 0 3 Differential Pairs 0 1 2 3 GBEO_ACT Gigabit Ethernet Controller 0 activity indicator OD GBEO_LINK Gigabit Ethernet Controller 0 link indicator OD GBEO_LINK100 Gigabit Ethernet Controller 0 100 Mbit sec link indicator OD GBEO_LINK1000 Gigabit Ethernet Controller 0 1000 Mbit sec link indicator op GBEO_CTREF Reference voltage for carrier board Ethernet channel 0 REF magnetics center tap 4 1 3 AC97 Audio High Definition Audio These pins provide connections to the high definition audio interface Signal Name Signal Function Direction AC_RST Reset output to AC97 CODEC O AC_SYNC 48kHz fixed rate sample synchronization signal to the O CODEC s AC_BITCLK 12 228 MHz serial data clock generated by the external UO CODEC s AC_SDOUT Serial TDM data output to the CODEC O AC_SDIN 0 2 Serial TDM data inputs from up to 3 CODECs CME Atom User Manual 1 3 www diamondsystems com Page 18 4 1 4 PCI Express These pins provide connections to the PCI Express interface and card DIAMOND SYSTEMS Signal Name Signal Function Direction PCIE_TX 0 3 PCI Express Differential Transmit Pairs 0 through 3 O PCIE TX 0 3 PCIE_RX 0 3 PCI Express Differential Receive Pairs 0 through 3 l PCIE_RX 0 3 PCIE_CLK_REF PCI Express Clock Reference l EXCD_CPPE 0 1 PCI Express Card l EXCD_RST 0 1 PCI Express Card reset 41 5
6. BIOS Beep Sounds B x4xkisaluaasoaa nln n dan dikakan y k k yaaa aa s nda da tances w n nan Kn A d n lue kk aw aa aeaa 14 4 INTERFACE GONNECTOR DETAILS uuu uu uuu aaa da asan da ska a b n ad na ya nin aia anan n kak ck Wa g KA yu n k aaa 15 4 1 COMI ExpiesS AB Go hl6 0l0L i k x4dsu d adul kan dklkkan d lana ka a da sandi ana n n a wanda nya an a aad n aa aa aeaa 16 4 1 1 Se 18 4 1 2 Gigabit Ethernet LAN J 4241 carl l lan dikana aeaa karak iaa daa kaya iaaa bk Ki KA c keke al k l 18 4 1 3 AC97 Audio High Definition Audio kk kk kk kk kk kr ka kr KA kr A kk KA KA KA A KA KA KA KA KAKA KAR 18 4124 SED N rrr rrrzzgdgdddggggk xxma 19 AMID T E u uwa e helyaye ay sena yk yasin ya kalas ka et ike OE ahen qv W dkan M k a EE Ak kel ee AA Ewen eleke ka kew 19 4 1 6 General Purpose Inputs and Outputs GPIO Elii kk ek kk ek kk k kk kk kk kk KAR 19 4 1 7 Power and System Managemetr t U KAKA KAK KAKA 20 4 1 8 LVDS Flat Panel u ura u Haniy l ne n land ake aaia kalan ia a VA Vana k eh da ik f aye ata kla access any aA e kk k k k aa k d 21 41 9 EPO INEA E Xeeee ee oe AbDbDDDDDDRDRrR MXX BdBmrE www 21 41 10 Analog VGA CRT s n uuu aaa naran dk anonanse d na bad aw ba kel da ku de abay de ie dewa ad doza aia a 22 SEBR P E E L i i aa EE asisqa a
7. Floppy Controller Serial Port1 Port2 Address Serial Port2 Mode Parallel Port Address Parallel Port Mode Parallel Port IRQ Restore on AC Power Loss by IO e Hardware Health Configuration Settings for System CPU Temperature 1 CPU System Fan Speed Vcore CPU voltage 5 0V 3 3V 12 0V 5Vsb VBAT standby and battery voltage e ACPI Configuration Settings for Suspend mode e AHCI Configuration Settings for AHCI Ports e APM Configuration Settings for Power Management APM Video Power Down Mode Hard Diks Power Down Mode Suspend Time Out Keyboard amp PS 2 Mouse Power Button Mode Advanced Resume Event Controls CME Atom User Manual 1 3 www diamondsystems com Page 12 3 4 3 DIAMOND SYSTEMS MPS Configuration Settings for MPS Revision multi processor version control USB Configuration Settings for Legacy USB Support USB 2 0 Controller Mode BIOS EHCI Hand Off USB Mass Storage Reset Delay Emulation Type floppy hard drive Remote Access Configuration Settings for Remote Access Serial port number Base Address IRQ PCI PnP Settings Menu This menu allows you to select configuration options for the following 3 4 4 Clear NVRAM Plug amp Play O S PCI Latency Timer Allocate IRQ to PCI VGA IRQ3 IRQ15 DMA Channel 0 DMA Channel 7 Reserved Memory Size Boot Settings Menu This menu allows you to select configuration options for the following 3 4 5 Boot Device Pr
8. PCI bus byte enable lines active low UO PCI_DEVSEL PCI bus Device Select UO PCI_FRAME PCI bus Frame conirol line UO PCI_IRDY PCI bus Initiator Ready control line UO PCI_TRDY PCI bus Target Ready conirol line UO PCI_STOP PCI bus STOP control line UO PCI PAR PCI bus parity UO PCI_PERR Parity Error UO PCI_REQ 0 3 PCI bus master request input lines l PCI_GNT 0 3 PCI bus master grant output lines O PCI RESET PCI Reset output O PCI _LOCK PCI Lock control line UO PCI_SERR System Error SERR may be pulsed active by any PCI UO device that detects a system error condition PCI_PME PCI Power Management Event PCI peripherals drive l PME to wake system from low power states S1 S5 PCI_CLKRUN Bidirectional pin used to support PCI clock run protocol for IO mobile systems PCI_IRQ A D PCI interrupt request lines PCI_CLK PCI 33MHz clock output O PCI _M66EN Pull down strap CME Atom User Manual 1 3 www diamondsystems com Page 27 E piamond SYSTEMS 5 APPENDIX SYSTEM RESOURCES REFERENCE 5 1 BIOS Memory Mapping Address Device Description 00000h 9FFFFh DOS Kernel Area A0000h BFFFFh EGA and VGA Video Buffer 128KB C0000h CFFFFh EGA VGA ROM DO000h DFFFFh Adaptor ROM E0000h FFFFFh System BIOS 5 2 I O Port Address Map Each peripheral device in the system is assigned a set of I O port addresses which also becomes the identity of the device The following table lis
9. 00MHz FSB gons voce D Intel Gigabit P US15WPT Ethernet Ethernet System Controller R E s s 1GB or 2GB pciext aie Switch 6 PCle x1 lanes PCle PCI Bridge BIOS Embedded 12C Flash Controller Figure 1 Functional Block Diagram c UJ CME Atom User Manual 1 3 www diamondsystems com Page 6 jp Awono SYSTEMS 2 2 Board Dimensions Mounting Holes and Connectors The two diagrams below show the mechanical dimensions of the CME Atom s board outline and five mounting holes as well as the position of all connectors on both the top and bottom sides of the board Unit mm Figure 2 Board Layout Top CME Atom User Manual 1 3 www diamondsystems com Page 7 Q p Awono SYSTEMS D110 ummonni D 1 O G 110 S T H Q00 AONE YN KONONO AOA C1 B110 T 2 B1 A11 ppp A1 Figure 3 Board Layout Bottom CME Atom User Manual 1 3 www diamondsystems com Page 8 DIAMOND SYSTEMS 2 3 Bus and Interface Connector Summary The CME Atom has two 2x110 pin interface connectors as listed in the tables below which are defined in accordance with the PICMG COM Express Specification Signal functions relating to all of the module s interface connectors are discussed in greater detail in Section 4 of this document 2 4 COM Express Bus Connectors Connector Location Pins Function USB GigE PCI Express AC97 audio SATA LVDS COMX AB Bottom 2x110 LPC VGA CRT LAN TV Out power and ground interfaces and s
10. 1 3 www diamondsystems com Page 30 DIAMOND SYSTEMS 2 Parity error in base memory first 64KB block 3 Base memory read write test error 4 Motherboard timer not operational 5 Processor error 6 8042 Gate A20 test error cannot switch to protected mode 7 General exception error processor exception interrupt error 8 Display memory error system video adapter 9 AMIBIOS ROM checksum error 10 CMOS shutdown register read write error 5 4 3 Troubleshooting Post BIOS Beep Codes Number of Beeps Description 1 2 or3 Reseat the memory or replace with known good modules 4 7 9 11 Fatal error indicating a serious problem with the system Consult your system manufacturer Before declaring the motherboard beyond all hope eliminate the possibility of interference by a malfunctioning add in card Remove all expansion cards except the video adapter If beep codes are generated when all other expansion cards are absent consult your system manufacturer s technical support If beep codes are not generated when all other expansion cards are absent one of the add in cards is causing the malfunction Insert the cards back into the system one at a time until the problem If the system video adapter is an add in card replace or reset the video adapter If the video adapter is an integrated part of the system board the board may be faulty CME Atom User Manual 1 3 www diamond
11. 3 PCI_C BE3 PCI_AD25 PCI_AD27 PCI_AD29 PCI_AD31 PCI_IRQA PCI_IRQB GND FIXED NC NC TYPEO NC NC TYPE1 NC NC GND NC NC RSVD RSVD NC NC RSVD NC NC GND Page 24 NC NC NC NC NC GND IDE_CBLID NC NC GND NC NC RSVD GND NC NC GND NC NC GND D71 C71 D72 C72 D73 C73 D74 C74 D75 C75 D76 C76 D77 C77 D78 C78 D79 C79 D80 C80 D81 C81 D82 C82 D83 C83 D84 C84 D85 C85 D86 C86 D87 C87 D88 C88 D89 C89 D90 C90 CME Atom User Manual 1 3 NC NC NC NC NC GND RSVD NC NC GND NC NC RSVD GND NC NC GND NC NC GND NC D91 C91 NC D92 C92 GND D93 C93 NG D94 C94 NG D95 C95 GND D96 C96 NG D97 C97 NG D98 C98 NG D99 C99 GND D100 C100 NG D101 C101 NG D102 C102 GND D103 C103 VCC_12V D104 C104 VCC_12V D105 C105 VCC_12V D106 C106 VCC_12V D107 C107 VCC_12V D108 C108 VCC_12V D109 C109 GND D110 C110 www diamondsystems com DIAMOND SYSTEMS NC NC GND NC NC GND RSVD NC NC GND NC NC GND VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V GND Page 25 IDE Note IDE currently is not supported on the CME Atom DIAMOND SYSTEMS
12. Bootblock recovery portion of the BIOS Checkpoint Description E0 Initialize the floppy controller in the super I O Some interrupt vectors are initialized DMA controller is initialized 8259 interrupt controller is initialized L2 cache is enabled E9 Set up floppy controller and data Attempt to red from floppy EA Enable ATAPI hardware Attempt to read from ARMD and ATAPI CDROM EB Disable ATAPI hardware Jump back to checkpoint E9 EF Read error occurred on media Jump back to checkpoint EB FO Search for pre defined recovery file name in root directory F1 Recovery file not found F2 Start reading FAT table and analyze FAT to find the clusters occupied by the recovery file F3 Start reading the recovery file cluster by cluster F5 Disable L1 cache FA Check the validity of the recovery file configuration to the current configuration of the flash part FB Make flash write enabled through chipset and OEM specific method Detect proper flash part Verify that the found flash part size equals the recovery file size F4 The recovery file size does not equal the found flash part size FC Erase the flash part FD Program the flash part FF The flash has been updated successfully Make flash write disabled Disable ATAPI hardware Restore CPUID value back into register Give control to F000 ROM at F000 FFF0h CME Atom User Manual 1 3 www diamondsystems com Page 33 DIAMOND SYSTEMS
13. Both key sequence and OEM specific method is checked to determine if BIOS recovery is forced If BIOS recovery is necessary control flows tocheckpoint EO Seed Bootblock Recovery Code Checkpoints section of document for more information D7 Restore CPUID value back into register The Bootblock Runtime interface module is moved to system memory and control is given to it Determine whether in memory D8 The Tuntime module is uncompressed into memory CPUID information is stored in memory D9 Store the Uncompressed pointer for future use in PMM Copying Main BIOS into memory Leaves all RAM below 1MB Read Write including E000 and F000 shadow areas but closing SMRAM DA Restore CPUID value back into register Give control to BIOS POS ExecutePOSTKernel See POST Code Checkpoints section of document for more information DC System is saking from ACPI S3 state E1 E8 OEM memory detection configuration error This range is reserved for chipset vendors EC EE amp system manufacturers The error associated with this value may be different from one platform to be next CME Atom User Manual 1 3 www diamondsystems com Page 32 5 4 5 DIAMOND SYSTEMS Bootclock Recovery Code Checkpoints The Bootblock recovery code gets control when the BIOS determines that a BIOS recovery needs to occur because the user has forced the update or the BIOS checksum is corrupt The following table describes the type of checkpoints that may occur during the
14. IE_RX3 B58 A58 PCIE_TX3 PWR_OK B24 A24 SUS_S5 PCIE_RX3 B59 A59 PCIE_TX3 NC B25 A25 NC GND B60 A60 GND NC B26 A26 NC PCIE_RX2 B61 A61 PCIE_TX2 WDT B27 A27 NC PCIE_RX2 B62 A62 PCIE_TX2 NC B28 A28 ATA ACT GPO3 B63 A63 GPI1 AC_SDIN1 B29 A29 AC_SYNC PCIE_RX1 B64 A64 PCIE_TX1 AC_SDIN0 B30 A30 AC_RST PCIE_RX1 B65 A65 PCIE_TX1 GND B31 A31 GND WAKE0 B66 A66 GND SPKR B32 A32 AC_BITCLK NC B67 A67 GPI2 12C_CK B33 A33 AC_SDOUT PCIE_RX0 B68 A68 PCIE_TX0 I2C_DAT B34 A34 NC PCIE_RX0 B69 A69 PCIE_TX0 THRM B35 A35 THRMTRIP GND B70 A70 GND CME Atom User Manual 1 3 www diamondsystems com Page 16 NC NC NC NC NC NC NC NC LVDS_BKLT_EN GND NC NC LVDS_BKLT_CTRL VCC_5V_SBY VCC_5V_SBY VCC_5V_SBY VCC_5V_SBY RSVD VGA_RED GND B71 A71 B72 A72 B73 A73 B74 A74 B75 A75 B76 A76 B77 A77 B78 A78 B79 A79 B80 A80 B81 A81 B82 A82 B83 A83 B84 A84 B85 A85 B86 A86 B87 A87 B88 A88 B89 A89 B90 A90 CME Atom User Manual 1 3 LVDS_A0 LVDS_A0 LVDS_A1 LVDS_A1 LVDS_A2 LVDS_A2 LVDS_VDD_EN LVDS_A3 LVDS_A3 GND LVDS_A_CK LVDS_A_CK LVDS_I2C_CK LVDS_I2C_DAT GPI3 NC KBD_A20GATE PCIE0_CK_REF PCIE0_CK_REF GND VGA_GRN VGA_BLU VGA_HSYNC VGA_VSYNC VGA_l2C_CK VGA
15. M gets control at various times during BIOS POST to initialize different system buses The following table describes the main checkpoints where the DIM module is accessed Checkpoint Description 2A Initialize different buses and perform the following functions Reset Detect and Disable function 0 Static Device Initialization function Boot Output Device Initialization function 2 Function 0 disables all device nodes PCI devices and PnP ISA cards It also assigns PCI bus numbers Function 1 initializes all static devices that include manual configured onboard peripherals memory and I O decode windows in PCI PCI bridges and noncompliant PCI devices Static resources are also reserved Function 2 searches for and initializes any PnP PCI or AGP video devices Initialize different buses and perform the following functions Boot Input Device Initialization function 3 IPL Device Initialization function 4 General Device Initialization function 5 Function 3 searches for and configures PCI input devices and detects if system has standard keyboard controller Function 4 searches for and configures all PnP and PCI boot devices Function 5 configures all onboard peripherals that are set to an automatic configuration and configures all remaining PnP and PCI devices While control is in the different functions additional checkpoints are output to port 80h as a word value to identify the routines under execution The lo
16. SATA These pins carry the Serial ATA signals Signal Name Signal Function Direction SATAO_TX Serial ATA or SAS Channel 0 transmit differential pair O SATA0_TX SATAO_RX Serial ATA or SAS Channel 0 receive differential pair SATAO_RX SATA2_TX Serial ATA or SAS Channel 2 transmit differential pair O SATA2_TX SATA2_RX Serial ATA or SAS Channel 2 receive differential pair l SATA2_RX ATA_ACT ATA parallel and serial or SAS activity indicator O 4 1 6 General Purpose Inputs and Outputs GPIO These pins carry four general purpose input lines and four general purpose outputs Signal Name Signal Function Direction GPO 0 3 General purpose output pins O GPI 0 3 General purpose input pins l CME Atom User Manual 1 3 www diamondsystems com Page 19 4 1 7 Power and System Management These pins support various power management and control functions DIAMOND SYSTEMS Signal Name Signal Function Direction PWRBTN Power button to bring system out of S5 soft off active on rising edge SYS_RESET Reset button input l CB_RESET Reset output from module to carrier board O PWR_OK Power OK from main power supply l SUS_STAT Indicates imminent suspend operation used to notify LPC O devices SUS_S3 Indicates system is in Suspend to RAM state O SUS_S4 Indicates system is in Suspend to Disk state O SUS_S5 Indicates system is in Soft Off state Also known as O PS_ON and can be use
17. _l2C_DAT NC NC NC GND VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V GND www diamondsystems com DIAMOND SYSTEMS B91 A91 RSVD B92 A92 RSVD B93 A93 GPOO B94 A94 RSVD B95 A95 RSVD B96 A96 GND B97 A97 VCC_12V B98 A98 VCC_12V B99 A99 VCC_12V B100 A100 GND B101 A101 VCC_12V B102 A102 VCC_12V B103 A103 VCC_12V B104 A104 VCC_12V B105 A105 VCC_12V B106 A106 VCC_12V B107 A107 VCC_12V B108 A108 VCC_12V B109 A109 VCC_12V B110 A110 GND Page 17 DIAMOND SYSTEMS 4 1 1 USB signals These pins provide connections to the board s eight USB channels For further information regarding the functions of the USB signals listed above refer to the USB 2 0 Specification available from the USB Implementers Forum http www usb org Signal Name Signal Function Direction USB 0 7 USB differential pairs data channels 0 through 7 UO USB 0 7 USB_0_1_OC USB over current sense USB channels 0 and 1 l USB 2 3 _OC USB over current sense USB channels 2 and 3 l USB_4 5_OC USB over current sense USB channels 4 and 5 l USB_6_7_OC USB over current sense USB channels 6 and 7 l Gigabit Ethernet LAN These pins provide connections to the GigE LAN interface Signal Name Signal Function Direction GBEO_MDI 0 3
18. cates the start of an LPC cycle O LPC_DRQ 0 1 LPC serial DMA request LPC_SERIRQ LPC serial interrupt UO LBC CLK LPC clock output O CME Atom User Manual 1 3 www diamondsystems com Page 21 4 1 10 Analog VGA CRT DIAMOND SYSTEMS These pins carry video and timing data for graphical display on a TV device as indicated Signal Name Signal Function Direction VGA RED Red for monitor Analog DAC output designed to drive a O 37 5 Ohm equivalent load VGA GRN Green for monitor Analog DAC output designed to drive a O 37 5 Ohm equivalent load VGA BLU Blue for monitor Analog DAC output designed to drive a O 37 5 Ohm equivalent load VGA_HSYNC Horizontal sync output to VGA monitor O VGA VSYNC Vertical sync output to VGA monitor O VGA_I2C_CK DDC clock line 12C port dedicated to identify VGA monitor O capabilities VGA_l2C_DAT DDC data line UO 4 1 11 TV Out These pins carry the composite video out signals Signal Name Signal Function Direction TV_DAC_A TVDAC Channel A Output supports the following O Composite video CVBS Component video Chrominance Pb analog signal S Video not used TV_DAC_B TVDAC Channel B Output supports the following O Composite video not used Component video Luminance Y analog signal S Video Luminance analog signal TV DAC C TVDAC Channel C Output supports the following O Composite video not used Component Chrominance Pr analog signal S Video Chrominance a
19. d be left unconnected GND B1 A1 GND USB7 B36 A36 USB6 GBEO_ACT B2 A2 GBEO_MDI3 USB7 B37 A37 USB6 LPC_FRAME B3 A3 GBEO_MDI3 USB 4 5 OC B38 A38 USB 6 7 OC LPC_ADO B4 A4 GBEO_LINK100 USB5 B39 A39 USB4 LPC_AD1 B5 A5 GBE0_LINK1000 USB5 B40 A40 USB4 LPC_AD2 Be A6 GBE0_MDI2 GND B41 A41 GND LPC_AD3 B7 A7 GBEO_MDI2 USB3 B42 A42 USB2 NC Bs A8 GBEO_LINK USB3 B43 A43 USB2 NC B9 A9 GBEO_MDI1 USB_0_1_OC B44 A44 USB 2 3 OC LPC_CLK B10 A10 GBEO_MDI1 USB1 B45 A45 USB0 GND B11 A11 GND USB1 B46 A46 USB0 PWRBTN B12 A12 GBE0_MDI0 EXCD1_PERST B47 A47 VCC_RTC SMB_CK B13 A13 GBE0_MDI0 EXCD1_CPPE B48 A48 EXCD0_PERST SMB_DAT B14 A14 GBE0_CTREF SYS_RESET B49 A49 EXCD0_CPPE SMB_ALERT B15 A15 SUS_S3 CB_RESET B50 A50 LPC_SERIRQ SATA1_TX B16 A16 SATA0_TX GND B51 A51 GND SATA1_TX B17 A17 SATA0_TX NC B52 A52 NC NC B18 A18 SUS S4 NC B53 A53 NC SATA1_RX B19 A19 SATA0_RX GPO1 B54 A54 GPIO SATA1_RX B20 A20 SATA0_RX PCIE_RX4 B55 A55 PCIE_TX4 GND B21 A21 GND PCIE_RX4 B56 A56 PCIE_TX4 NC B22 A22 NC GPO2 B57 A57 GND NC B23 A23 NC PC
20. d to control an ATX power supply WAKE0 PCI Express wake up signal l WAKE1 General purpose wake up signal l BATLOW Indicates that external battery is low l THRM Input from off module temp sensor indicating an over temp situation THERMTRIP Active low output indicating that the CPU has entered O thermal shutdown SMB_CK System Management Bus bidirectional clock line UO SMD DAT System Management Bus bidirectional data line UO SMB_ALERT System Management Bus Alert l CME Atom User Manual 1 3 www diamondsystems com Page 20 4 1 8 LVDS Flat Panel These pins carry data for graphical display on an LVDS panel as indicated DIAMOND SYSTEMS Signal Name Signal Function Direction LVDS_A 0 3 LVDS Channel A differential pairs O LVDS_A 0 3 LVDS_A CK LVDS Channel A differential clock O LVDS A CK LVDS_B 0 3 LVDS Channel B differential pairs O LVDS_B 0 3 LVDS_B_CK LVDS Channel B differential clock O LVDS B CK LVDS_VDD_EN LVDS panel power enable O LVDS_BKLT_EN LVDS panel backlight enable O LVDS_BKLT_CTRL LVDS panel backlight brightness control O LVDS_I2C_CK 12C clock output for LVDS display use O LVDS_I2C_DAT l2C data line for LVDS display use UO 4 1 9 LPC Interface These pins carry the Low Pin Count LPC interface signals as indicated Signal Name Signal Function Direction LPC_AD 0 3 LPC multiplexed address command and data bus UO LPC_FRAME LPC frame indi
21. dal 4a ka w WA 9 3 GETTING START ED g 2 uuu SI Maa gedan kad ulasan Ku k a b b k a a dipe Ke a Qaqa uhaqqa aiaa 10 3 1 COM Express Development KitlS kek kk ek kk ek kk ka kk a kk KA kk KA KA KA KA KA KA KARA KA A KAKA KAKA KARA KAK KAKA 11 g2 Preparing the Hardware y III A A A du e enk a kad e ek A kene RA 11 3 9 Booting the System axan u uu daa ena k kene n n aa cake Kele e dek vacine Ve ae cev Wn a Waaa vee dead alive de a R Weha HEW W wek 12 9 4 BIOS Setup Utility cecair iieiaei ka kane nda K kaca e neyene dek yak Wae dek eerie seed needed 12 3 4 1 Main Set p N Do a aiaa aa aeaa aad iaa aiamaa i i M Mb22 naz 12 3 4 2 Advanced Setup Men er ennaii eksa n ak aa ee inka n e ua weka kaka n da Ra aana aa 12 9 4 3 PCGIPnP Settinge Menu Av yad S y k ka ak ayak W rek ies u daka adden da ie iiaia 13 34 4 Boot Settings GT 13 3 4 5 Security Settings M mU 4x155 442xk a xila L e dek kaye duba eka kane nda a ee E ra e a 13 3 4 6 Chipset Settings Men c lady kla klan kik ua aaa pn enda RW a aaa v na ena w k n da ka keka ra a 13 94 7 EXILIS gt x gt P PD PNpN N p p p p p D D er r r r cr cr FKKEFERERERNReRNRNRNRXEAEEEE KK Sa eet eed 14 9 5 Operating System Drivers uu uu uuu uu uu 4 kasen k lan e Ran addaa kan den k naa ya Wak deka poet di uan a n e aaa ka bias 14 9 0
22. diately as evidenced by BIOS messages on the connected display You can use the BIOS Setup utility and install an operating system on the boot drive just as you would on a normal desktop PC 3 4 BIOS Setup Utility The BIOS Setup utility program is used for specifying the system configurations and settings The BIOS ROM of the system stores the Setup utility When you turn on the computer the BIOS is immediately activated The following menus options are available Main Setup Menu Advanced Setup Menu PCI PnP Setup Menu Boot Setup Menu Security Setup Menu Chipset Setup Menu Exit Use the left right arrow keys to highlight a particular configuration screen from the top menu bar or use the down arrow key to access and configure the information in the menus which are described below 3 4 1 Main Setup Menu This menu allows you to select configuration options for the following e System Time e System Date 3 4 2 Advanced Setup Menu This menu allows you to select configuration options for the following e CPU Configuration Settings for Hardware Prefetcher Adjacent Cache Line Prefetch Cache L1 amp L2 Max CPUID Value Limit Vanderpool Technology Core Multi Processing and Intel SpeedStep Tech e Mass Storage Configuration Settings for hard drives Primary Secondary Master Slave e Floppy Configuration Settings for the type of floppy drive installed on the system e Super lO Configuration Settings for Onboard
23. e for initialization Initialize language and font modules for ADM Activate ADM module 33 Initializes the silent boot module Set the window for displaying text information 37 Displaying sign on message CPU information setup key message and any OEM specific information 38 Initializes different devices through DIM See DIM Code Checkpoints section of document for more information USB controllers are initialized at this point 39 Initializes DMAC 1 amp DMAC 2 3A Initialize RTC date time 3B Test for total memory installed in the system Also Check for DEL keys to limit memory test Display total memory in the system 3C Mid POST initialization of chipset registers 40 Detect different devices Parallel ports serial ports and Coprocessor in CPU etc successfully installed in the system and update the BDA EBDA etc 52 Updates CMOS memory size from memory found in memory test Allocates memory for Extended BIOS Data Area from base memory Programming the memory hole or any kind of implementation that needs an adjustment in system RAM size if needed 60 Initializes NUM LOCK status and programs the KBD typematic rate 75 Initialize Int 13 and prepare for IPL detection 78 Initializes IPL devices controlled by BIOS and option ROMs 7C Generate and write contents of ESCD in NVRam 84 Log errors encountered during POST 85 Display errors to theuser and gets the user response for error 87 Execute BIOS setup if needed req
24. iamond s COM Express development kits provide standardized I O connectors for quick and easy access to nearly all system interfaces They also feature a variety of expansion slots and sockets for flexible system expansion The kits which include both generic models and application oriented baseboards in various form factors also generally extend the COM Express module s functionality by adding Ethernet and serial ports solid state media sockets and more Additionally the kits typically include an comprehensive set of interface cables drivers for Linux and Windows operation and full documentation 3 2 Preparing the Hardware If it is not already installed on the baseboard carefully plug the CME Atom into the baseboard s COM Express bus connectors Place the heatsink or heat spreader supplied with the CME Atom on top of the module carefully positioning it so that its mounting holes line up with those of the module Then affix the module and heatsink to the baseboard using the provided hardware Connect a USB keyboard USB mouse monitor and mass storage devices to the appropriate connectors on the baseboard Refer to the baseboard s User Manual for peripheral compatibility and interface cabling considerations CME Atom User Manual 1 3 www diamondsystems com Page 11 DIAMOND SYSTEMS 3 3 Booting the System Power up the display then power up the system power supply The CME Atom module should begin its boot up sequence imme
25. iority Hard Disk Drives Removable Drives Quick Boot Bootup Num Lock LAN Boot Function Security Settings Menu This menu allows you to select configuration options for the following 3 4 6 Supervisor Password amp User Password Boot Sector Virus Protection Chipset Settings Menu This menu allows you to select configuration options for the following North Bridge Chipset Configuration Settings for Boots Graphic Adapter Priority Internal Graphic Mode Select Video Function Configuration DVMT Mode and Memory Boot Display CRT LVDS Flat Panel Type TV Standard Spread Spectrum Clock CME Atom User Manual 1 3 www diamondsystems com Page 13 DIAMOND SYSTEMS e South Bridge Chipset Configuration Settings for USB Function active ports USB 2 0 Controller HDA Controller SLP_S4 Min Assertion Width Onboard LAN1 3 4 7 Exit This selection saves changes and exits the BIOS Setup Utility 3 5 Operating System Drivers Drivers for Windows XP and Linux 2 6 if required are included on the Software and Documentation CD that is provided along with the CME Atom or in its Development Kit To locate the CME Atom module s software drivers on the CD view the index html file in the CD s root directory locate Computer on Modules and then click on CME Atom This software is also available for download from Diamond s website 3 6 BIOS Beep Sounds List Post BIOS Beep Codes Number of Beeps Descriptio
26. kek KAKA KAKA KARA KARA KAKA KAKA KARA 31 5 4 4 Bootblock Initialization Code Checkpoints Ek keke k kek kek KAKA KAKA KAKA KAKA KRA 32 5 4 5 Bootclock Recovery Code Checkpoints kk kk kek kek kek KAKA KAKA KAKA KAKA KAKA KAKA KRA 33 5 4 6 POST Code Checkpoints kk keka k ka kaka k KE KA HEKA HEKE HEKE HEKE KE KA KA KA KA KE KA A KAKA KANA KAKA 34 5 4 7 DIM Code Checkpoint EL kk kk kk kk kk kk Ka kr KA kk KA A KA A KA KA KA A KA A KA A KAKA KAKA KAKA KAK KAKA A AKA 37 5 4 8 ACPI Runtime Checkpoint kk kk kk ek kk k kk KA kk KA kk KA KA KAKA KAKA KAKA KARA KAKA KAKA KAKA KA 38 CME Atom User Manual 1 3 www diamondsystems com Page 2 DIAMOND SYSTEMS IMPORTANT SAFE HANDLING INFORMATION WARNING ESD Sensitive Electronic Equipment Observe ESD safe handling procedures when working with this product Always use this product in a properly grounded work area and wear appropriate ESD preventive clothing and or accessories Always store this product in ESD protective packaging when not in use Safe Handling Precautions The CME Atom contains numerous I O connectors that connect to sensitive electronic components This creates many opportunities for accidental damage during handling installation and connection to other equipment The list here describes common causes of failure found on boards returned to Diamond Systems fo
27. n 1 Memory refresh timer error 2 Parity error in base memory first 64KB block 3 Base memory read write test error 4 Motherboard timer not operational 5 Processor error 6 8042 Gate A20 test error cannot switch to protected mode 7 General exception error processor exception interrupt error 8 Display memory error system video adapter 9 AMIBIOS ROM checksum error 10 CMOS shutdown register read write error More BIOS information is included in the Appendix CME Atom User Manual 1 3 www diamondsystems com Page 14 DIAMOND SYSTEMS 4 INTERFACE CONNECTOR DETAILS This section describes the functions available on the COM Express AB and CD interface connectors Note The COM Express specification is available from the PICMG organization http www picmg org The COM Express Tutorial and COM Express Design Guide are available for download from the PICMG organization COM Express website located at http www picmg org v2interna COMExpress htm CME Atom User Manual 1 3 www diamondsystems com Page 15 DIAMOND SYSTEMS 4 1 COM Express AB Connector The 2x110 pin high density COM Express AB connector implements the board s USB PCI Express SATA LVDS LPC AC97 audio VGA CRT LAN power and ground interfaces and system and power management as indicated in the table below Further information regarding each of these signal groups follows the table Note Pins designated NC shoul
28. n ACPI mode AA System is running in APIC mode 01 02 03 04 05 Entering sleep state S1 S2 S3 S4 or S5 10 20 30 40 50 Waking from sleep state S1 S2 S3 S4 or S5 Note Checkpoints may differ between different platforms based on system configuration Checkpoints may change due to vendor requirements system chipset or option ROMs from add in PCI devices CME Atom User Manual 1 3 www diamondsystems com Page 38
29. nalog signal CME Atom User Manual 1 3 www diamondsystems com Page 22 4 1 12 Miscellaneous Signals These pins carry the 12C bus plus a number of utility signals DIAMOND SYSTEMS Signal Name Signal Function Direction l2C_CK General purpose 12C port clock output O l2C_DAT General purpose l2C port data I O line UO SPKR Output for audio enunciator the speaker in PC AT O systems BIOS_DISABLE Module BIOS disable input l WDT Output indicating that a watchdog time out event has O occurred KBD_RST Input to module from optional external keyboard l controller that can force a reset KBD_A20GATE Input to module from optional external keyboard l controller CME Atom User Manual 1 3 www diamondsystems com Page 23 4 2 COM Express CD Connector DIAMOND SYSTEMS The 210 pin high density COM Express CD connector implements IDE PCI bus and power and ground signals as indicated in the table below Note Pins designated NC should be left unconnected additionally IDE currently is not supported on the CME Atom GND IDE_D5 IDE_D10 IDE_D11 IDE_D12 IDE_D4 IDE_D0 IDE_REQ IDE_IOW IDE_ACK GND IDE_IRQ IDE_A0 IDE_A1 IDE_A2 IDE_CS1 IDE_CS3 IDE_RESET PCI_GNT3 PCI_REQ3 GND PCI_AD1 PCI_AD3 PCI_AD5 PCI_AD7 PCI_C BE0 PCI_AD9 PCI_AD11 PCI_AD13 PCI_AD15 GND PCI_PAR PCI_SERR PCI_STOP PCI_TRDY
30. on the low power high performance Intel Atom processor clocked at up to 1 6GHz The module is equipped with up to 2GB of soldered on DDR2 SDRAM and provides interfaces for high resolution CRTs and LVDS interfaced LCDs gigabit Ethernet SATA drives USB peripherals and audio Additionally the CME Atom offers a high degree of system expansion flexibility via the presence of both PCI Express and PCI buses on its COM Express 1 0 compliant baseboard interface connectors 1 1 Features e Processor o CME Z530 1 6GHz Intel Atom Z530P CPU 400MHz FSB 1MB L2 cache o CME Z510 1 1GHz Intel Atom Z510PT CPU 400MHz FSB 1MB L2 cache e Chipset Intel Poulsbo US15WPT e Soldered on RAM o CME Z530 2GB DDR2 533MHz SDRAM o CME Z510 1GB DDR2 533MHz SDRAM e Graphics o Based on integrated Intel Graphics Media Accelerator 500 o Provides two display interfaces VGA RGB at up to 2048 x 1536 resolution Single channel 24 bit LVDS e Audio o AC 97 link o Mic in line in out signals e USB interfaces 8 USB 2 0 ports e Networking 10 100 1000Mbps Ethernet Intel 82574IT controller e Mass storage interface o SATA port supports one device Primary Master 150MB s max data rate o USB mass storage devices supported in BIOS and OSes e Keyboard mouse USB keyboard mouse devices supported in BIOS and OS e Other o PC speaker interface o Watchdog timer with 1 255 levels reset o 8 bit programmable digital I O port o 12C SMBus serial bu
31. ows the IRQ used by the devices on board IRQ Level Function IRQ 00 System Timer IRQ 01 Standard 101 102 Key or Microsoft Natural PS 2 Keyboard IRQ 02 VGA and Link to Secondary PIC IRQ 03 Communications Port COM2 IRQ 04 Communications Port COM1 IRQ 05 PCI Device IRQ 06 Standard floppy disk controller IRQ 07 Parallel Port IRQ 08 System CMOS real time clock IRQ 09 Microsoft ACPI Compliant System IRQ 10 PCI Device IRQ 11 PCI Device CME Atom User Manual 1 3 www diamondsystems com Page 29 DIAMOND SYSTEMS IRQ 12 PS 2 Compatible Mouse IRQ 13 PFY exception IRQ 14 Primary IDE Channel IRQ 15 PCI Device 5 4 BIOS Beep Codes This section contains BIOS codes and troubleshooting information 5 4 1 Boot Block Beep Codes Number of Beeps Description 1 Insert diskette in floppy drive A 2 AMIBOOT ROM file not found in root directory of diskette in A 3 Insert next diskette if multiple diskettes are used for Recovery 4 Flash Programming successful 5 Floppy read error 6 Keyboard controller BAT command failed 7 No Flash EPROM detected 8 Floppy controller failure 9 Boot Block BIOS checksum error 10 Flash Erase error 11 Flash Program error 12 AMIBOOT ROM file size error 5 4 2 Post BIOS Beep Codes Number of Beeps Description 1 Memory refresh timer error CME Atom User Manual
32. r repair This information is provided as a source of advice to help you prevent damaging your Diamond or any vendors embedded computer boards ESD damage This type of damage is almost impossible to detect because there is no visual sign of failure or damage The symptom is that the board simply stops working because some component becomes defective Usually the failure can be identified and the chip can be replaced To prevent ESD damage always follow proper ESD prevention practices when handling computer boards Damage during handling or storage On some boards we have noticed physical damage from mishandling A common observation is that a screwdriver slipped while installing the board causing a gouge in the PCB surface and cutting signal traces or damaging components Another common observation is damaged board corners indicating the board was dropped This may or may not cause damage to the circuitry depending on what is near the corner Most of our boards are designed with at least 25 mils clearance between the board edge and any component pad and ground power planes are at least 20 mils from the edge to avoid possible shorting from this type of damage However these design rules are not sufficient to prevent damage in all situations A third cause of failure is when a metal screwdriver tip slips or a screw drops onto the board while it is powered on causing a short between a power pin and a signal pin on a component This can cau
33. se overvoltage power supply problems described below To avoid this type of failure only perform assembly operations when the system is powered off Sometimes boards are stored in racks with slots that grip the edge of the board This is a common practice for board manufacturers However our boards are generally very dense and if the board has components very close to the board edge they can be damaged or even knocked off the board when the board tilts back in the rack Diamond recommends that all our boards be stored only in individual ESD safe packaging If multiple boards are stored together they should be contained in bins with dividers between boards Do not pile boards on top of each other or cram too many boards into a small location This can cause damage to connector pins or fragile components Power supply wired backwards Our power supplies and boards are not designed to withstand a reverse power supply connection This will destroy each IC that is connected to the power supply In this case the board will most likely will be unrepairable and must be replaced A chip destroyed by reverse power or by excessive power will often have a visible hole on the top or show some deformation on the top surface due to vaporization inside the package Check twice before applying power CME Atom User Manual 1 3 www diamondsystems com Page 3 DIAMOND SYSTEMS 1 INTRODUCTION The CME Atom is a highly integrated computer on module COM based
34. ses e Three system expansion buses o PCI Express 6 PCle x1 lanes o PCI Bus 4 32 bit PCI bus masters o LPC bus CME Atom User Manual 1 3 www diamondsystems com Page 4 DIAMOND SYSTEMS e Power o 12VDC main power 5VDC standby power o Power requirement 9W idle 13W loaded preliminary o Real time clock backup 2 0 to 3 6 VDC tbd e Operating environment o Operating temperature range CME Z530 40 C to 85 C CME Z510 20 C to 71 C o Oto 90 operating humidity non condensing e Dimensions o COM Express compliant form factor o 4 9 x 3 7 inches 125 x 95 mm e Weight 2 8 oz 79 g e Software o BIOS AMI PnP flash BIOS o Operating systems supported Windows XP Vista Linux 2 6 Note The COM Express specification is available from the PICMG organization http Avww picmg org The COM Express Tutorial and COM Express Design Guide are available for download from the PICMG organization COM Express website located at http www picmg org v2internal COMExpress htm CME Atom User Manual 1 3 www diamondsystems com Page 5 DIAMOND SYSTEMS 2 FUNCTIONAL OVERVIEW 2 1 Block Diagram Figure 1 shows the CME Atom functional blocks buses and peripheral interface signals LVDS LCD AC 97 link audio 8 USB 2 0 ports SMBus GPIO 8 bit GPIO lt n Controller SDVO SDVO VGA VGA DAC Intel Atom Processor Z530P or Z510P T oo Controller PCle x1 PATA PATA SATA SATA E 4
35. systems com Page 31 DIAMOND SYSTEMS 5 44 Bootblock Initialization Code Checkpoints Checkpoint Description Before DO If boot block debugger is enabled CPU cache as RAM functionality is enabled at this point Stack will be enabled from this point DO Early Boot Strap Processo BSP initialization like microcode update frequency and other CPU cirtical initialization Early chipset initialization is done D1 Early super I O initialization is done including RTC and keyboard controller Serial port is enabled at this point if needed for debugging NMI is deisabled Perfrom keyboard controller BAT test Save power on CPUID value in scretch CMOS Go to flat mode with 4GB limit and GA20 enabled D2 Verify the boot block checksum System will hang here if checksum is bad D3 Disable CACHE before memory detection Execute full memory sizing module If memory sizing module not executed start memory refresh and do memory sizing in Boot block code Do additional chipset initialization Reenabled CACHE Verify that flat mode is enabled D4 Test base 512KB memory Adjust policies and cache first 8MB Set stack D5 Bootblock code is copied from ROM to lower system memory and control is given to it BIOS now executes out of RAM Copies compressed boot block code to memory in right segments Copies BIOS from ROM to RAM for faster access Perfroms main BIOS checksum and updates recovery status accordingly D6
36. ts the I O port addresses used Note IDE currently is not supported on the CME Atom Address Device Description 0000h 0000Fh DMA Controller 0080h 009Fh DMA Controller 00COh OODFh DMA Controller 0020h 0021h Programmable Interrupt Controller 00AO0h 00A1h Programmable Interrupt Controller 0040h 0043h System Timer 0044h 0047h System Timer 0060h 0064h Keyboard Controller 0070h 0073h System CMOS Real Time Clock OOFOh OOFFh Math Co Processor 01FOh 01F7h Primary IDE 0274h 0277h ISAPNP Read Data Port 0279h OA79h ISAPnP Configuration 02F8h 02FFh COM_2 If use 0378h 037Ah Parallel Port If use CME Atom User Manual 1 3 www diamondsystems com Page 28 DIAMOND SYSTEMS 03B0h 03BFh MDA MGA 03C0h 03CFh EGA VGA 03D4h 03D9h CGA CRT register 03F0h 03F7h Floppy Diskette 03F6h 03F6h Primary IDE 03F8h 03FFh COM _1 If use 0400h 041F South Bridge SMB 04D0h 04D1h IRQ Edge level control ports 0500h 053Fh South Bridge GPIO 0800h 087Fh ACPI OA00h 0A07h PME 0A10h 0A17h Hardware Monitor OCF8h PCI Configuration address OCFCh PCI Configuration Data 5 3 Interrupt Request IRQ Lines Peripheral devices use interrupt request lines to notify CPU for the service required The following table sh
37. uested Check boot password if installed 8C Late POST initialization of chipset registers 8D Build ACPI tables if ACPI is supported 8E Program the peripheral parameters Enable Disalbe NMI as selected 90 Initialization of system management interrupt by invoking all handlers CME Atom User Manual 1 3 www diamondsystems com Page 35 Ea n EEE IDI DB kLLTLTT__k_ M 7pprrrra Q p Awono SYSTEMS A1 Lian up work needed before booting to OS A2 Takes care of runtime image preparation for different BIOS modules Fill the free area in F000h segment with 0FFh Initializes the Microsoft IRQ Routing Table Prepares the runtime language module Disables the system configuration display if needed A4 Initialize runtime language module Display boot option popup menu A7 Displays the system configuration screen if enabled Initialize the CPU s before boot which includes the programming of the MTRR s A9 Wait for userinput at config display if needed AA Uninstall POST INT1Ch vector and INT09h vector AB Prepare BBS for Int 19 boot Init MP tables AC End of POST initialization of chipset registers De initializes the ADM module B1 Save system context for ACPI Prepare CPU for OS boot including final MTRR values 00 Passes control to OS Loader typically INT 19h CME Atom User Manual 1 3 www diamondsystems com Page 36 DIAMOND SYSTEMS 5 4 7 DIM Code Checkpoints The Device Initialization Manager DI
38. w byte value indicates the main POST Code Checkpoint The high byte is divided into two nibbles and contains two fields The details of the high byte of these checkpoints are as follows HIGH BYTE XY The upper nibble X indicates the function number that is being executed X can be from 0 to 7 0 func 0 disable all devices on the BUS concerned 2 func 2 output device initialization on the BUS concerned 3 func 3 input device initialization on the BUS concerned 4 func 4 IPL device initialization on the BUS concerned 5 func 5 general device initialization on the BUS concerned 6 func 6 error reporting for the BUS concerned 7 func 7 add on ROM initialization for all BUSes CME Atom User Manual 1 3 www diamondsystems com Page 37 DIAMOND SYSTEMS 8 func 8 BBS ROM initialization for all BUSes The lower nibble Y indicates the BUS on which the different routines are being executed Y can be from 0 to 5 0 Generic DIM Device Initialization Manager 1 On board System devices 2 ISA devices 3 EISA devices 4 ISA PnP devices 5 PCI devices 5 4 8 ACPI Runtime Checkpoints ACPI checkpoints are displayed when an ACPI capable operating system either enters or leaves a sleep state The following table describes the type of checkpoints that may occur during ACPI sleep or wake events Checkpoint Description AC First ASL check point Indicates the system is running i
39. y CPU Init Start Disable Cache Init Local APIC C1 Set up boot strap processor Information C2 Set up boot strap processor for POST C5 Enumerate and set up application processors C6 Re enable cache for boot strap processor C7 Early CPU Init Exit 0A Initializes the 8042 compatible Key Board Controller 0B Detects the presence of PS 2 mouse 0C Detects the presence of Keyboard in KBC port 0E Testing and initialization of different Input Devices Also update the Kernel Variables Traps the INT09h vector so that the POST INT09h handler gets control for IRQ1 Uncompress all available language BIOS logo and Silent logo modules 13 Early POST initialization of chipset registers 20 Relocate System Management Interrupt vector for all CPU in the system 24 Uncompress and initialize any platform specific BIOS modules GPNV is initialized at this checkpoint CME Atom User Manual 1 3 www diamondsystems com Page 34 DIAMOND SYSTEMS 2A Initializes different devices through DIM See DIM Code Checkpoints section of document for more information 2C Initializes different devices Detects and initializes the video adapter installed in the system that have optional ROMs 2E Initializes all the output devices 31 Allocate memory for ADM module and uncompress it Give control to ADM modul
40. yawaqapasquaqaquakunaaasqawiaqaqaawaka qaqaq qiqusqan sassa EE 22 4142 Miscellaneous Signals d u uU ayak yak aakk al nad ua asa asawa c ka kn addien iiaiai na daka nia W 23 4 2 COM Express CD Connector u uuu aaa sasssaawiaqasaguqka ne ana k ri wa ke kad k ak da k ke yok k diken A ba a ewd zw ka v kana ka 24 4 2 1 DE Keya r eyane de nee k yad dan el na bene ned bid sa ey ke kax k re kwe id coh dct wed asa a keyay kr sant eet wed ad by GG wad kad pani d s nan kev 26 422 PCI Sa eo e o c brIDrIr DIDIDDIbErEBEBIrBdmre aooeeee___ mm 27 5 APPENDIX SYSTEM RESOURCES REFERENCE ek kk kk kk KE KAKA KAKA KA KK A KA KA KA A KA A KA KA KAKA KA 28 5 1 BIOS Memory Mapping seer seer eee 28 52 VO Port Address Mapsissa ke dlnya n diyan e ented aadi ak n wa d da bira e yad axa ka a b w kk badana d da benk 28 5 3 Interrupt Request IRQ Lines sss 29 BA BIOS Beep CodeS cinniri naian ae di keka k aA g laz ya bien ka k kend kad dan k a sae aka gala k wad exit Ba deal qala d dka kan 30 5 4 1 Boot Block Beep Codes ssiri L x la be kk sada A Wa del ka ka sa pak A we cak wa daya kad d k ke key sa R Web ek a ed 30 54 22 Post BIOS Beep Codes U UU kak ka yk akele sk aeaieie ad a kid dx k ku a aza X wae be ya a kala 30 5 4 3 Troubleshooting Post BIOS Beep Codes kk kk kk kek
41. ystem and power management COMX CD Bottom 2x110 32 bit PCI bus and power and ground signals CME Atom User Manual 1 3 www diamondsystems com Page 9 DIAMOND SYSTEMS 3 GETTING STARTED This section of the CME Atom User Manual covers basic hardware setup power connection system boot up and initial software configuration First time CME Atom users normally receive the product in conjunction with one of Diamond s Development Kits which provide everything needed to ensure rapid application development Important Safe Handling Information WARNING ESD Sensitive Electronic Equipment Observe ESD safe handling procedures when working with this product Always use this product in a properly grounded work area and wear appropriate ESD preventive clothing and or accessories Always store this product in ESD protective packaging when not in use Please refer to page 3 of this manual Important Safe Handling Information for further details CME Atom User Manual 1 3 www diamondsystems com Page 10 jp Awono SYSTEMS 3 1 COM Express Development Kits To facilitate evaluation and development Diamond s COM Express are normally supplied in conjunction with one of Diamond s COM Express development kits pictured below This approach increases project efficiency and reduces risks by providing a known good environment for rapid application development ATX form factor COM Express Development Kit The baseboards in D
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