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AP32288 - XMC1000/XMC4000 - Capture Compare Unit 8

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2. Service CI Period Shadow Register ds id 4 Servi F attern Request Lines Request o Period Register i Control Generation DMA Lines 2 Active m z z Passive 2x Compl Outputs Slicey amp Timer 16 bit Control Status Bits Reset Power youre x Prescaler E Compare Shadow Reg 1 2 Input Matrix Control Floating F unction Control Clock Control Prescaler Compare Register 1 2 ee Shadow Reg CR1Sy CR1y Shadow Reg CR2Sy CR2y DEV CCUS8 00 Basics Slice Compare vsd Figure7 Timer Slice Compare Registers and PWM related Blocks y 0 3 PRy Period Y Compare 1 TRy or o 2 CR1y CR2y Y Y Y Y Dead Time 1y Dead Time 2y DEV CCUS8 00 Basics Slice Compare principle 0 vsd Figure8 Basic Blocks for Symmetric Asymmetric PWM generation with Dead Time Application Note 11 V1 0 2015 07 infi Capture Compare Unit 8 CCUS8 1 AP32288 In Ineon Introduction to the CCUS Basic Features Dead Time Timer TRy Control Counting Scheme Edge Aligned S Bit ccs LME Center Aligned tatus Bit CCST1 Direction Control Control J m Up Down Compare Mode AA CCSTi amp DTRin CCU8xOUTyO p set clear Output Symmetric p Asymmetric L Modulation TI CCST1 amp DTR1 CCU8xOUTy1 Compare PM
3. R XMC CCU8 SLICE EVENT 0 R XMC CCU8 SLICE EVENT 0 R XMC CCU8 SLICE EVENT 0 XMC CCU8 SLICE EVENT 0 START CLEAR El PTR XMC CCU8 SLICE StartConfig SLIC XMC CCU8 SLICE START MO DE TIMER XMC CCU8 SLICE EVENT 0 START CLEAR XMC CCU8 SLICE StartConfig SLIC E2 PTR XMC CCU8 SLICE START MO DE TIMER XMC CCU8 SLICE EVENT 0 START CLEAR Enable events XMC CCU8 SLICE EnableEvent SLIC EO PTR XMC CCU8 SLICE EnableEvent SLIC EO PTR Connect period match event t XMC CCU8 SLICE SetInterruptNode XMC CCU8 SLICE IRQ ID PI o SRO SLICEO Application Note 47 XMC CCU8 SLICE IRQ ID PERIOD MATCH XMC CCU8 SLICE IRQ ID ONE MATCH PTR ERIOD MATCH XMC CCU8 SLICE SR ID 0 E V1 0 2015 07 Capture Compare Unit 8 CCU8 AP32288 Infineon Multi Phase Output Pattern Generation Connect one match event to SR1 XMC CCU8 SLICE SetInterruptNode SLICEO PTR XMC CCU8 SLICE IRQ ID ON Fl Set NVIC priority T MATCH XMC CCU8 SLICE SR ID 1 NVIC SetPriority CCU80 0 IROn 63U NVIC SetPriority CCU80 1 IRQn 63U Enable IRQ NVIC EnableIRQ CCU80 0 IRQn NVIC EnableIRQ CCU80 1 IR
4. Timer Compare Capture Free Running Mode Fdge Aligned Mode Time Measurement Option Reset Gate Symmetric or Asymmetric PWM Period eno Period 4 a A Interrupt Interrupt Interrui eum ds un Capture Capture Compare 1 1 1 Register 1 Interrupt 0 a gt teman gt Co tt a E Time ernatives i N Time 3 Reset Clear L ae 2 X X em Gate Input l PWM i 1 to t 1 1 N l 1 NET e Counter Compare Single Shot Option Up Down Count Control Center Aligned Mode Symmetric or Asymmetric PWM Count aee ay E se cers A Period AL N OS Interrupt 6 Asymmetric Interrupt 5 i T Compare Level Il 4 1 1 i C S tri 3 i gg me m ymmetric 2 i l 1 i Y 0 0 i 0 i Time Y TNN Time z Time Count Input 1 MUU PWM i l iteru t to period Mn xm Sr i Ta a Xx pos 3 Start Stop DEV CCUS8 00 Counting Schemes Basics vsd Figure2 Basic Functions of each Timer Slice 1 3 The Comound CAPCOMS System Each CCU8x has four 16 bit timer slices CC8y y 3 0 which can be concatenated up to 64 bit A slice has e lTimer e 4Capture registers e 1Period register 2Compare registers Both the Period and Compare registers have shadow registers Each slice can work independently in different modes but they can also be synchronized even to other CCU8 slices They perform multi channel multi phase pattern generation with parallel updates Applicati
5. Start the CCU8 timer XMC CCU8 SLICE StartTimer SLICEO PTR Application Note 36 V1 0 2015 07 Capture Compare Unit 8 CCU8 i AP32288 n n eon Multi Phase Output Pattern Generation 3 Multi Phase Output Pattern Generation 3 1 Introduction The CAPCOM8 is a multi purpose timer unit for signal monitoring conditioning and Pulse Width Modulation PWM signal generation It is designed with repetitive structures with multiple timer slices that have the same base functionality The internal modularity of CCU8 translates into a software friendly system for fast code development and portability between applications The following image shows the main function blocks of one ofthe four CC8y slices on a CCU8x CCU8x xz0 1 Service Period Shadow Register Edge a a 4 Service A enter attern Request Lines Request o Period Register Align Control Generation Lines 2 i DMA 2 Single ina 2x Compl Outputs Slice y amp Timer 16 bit Shot Control Status Bits 0 3 ti Reset Power T Compare Shadow Reg 1 2 Deam Input Matrix Control Prescaler Function Control ieseh d N by 16 External Clock Control Event Sources Shadow Reg CR1Sy Shadow Reg CR2Sy CR1y CR2y DEV CCU8 01 Compare Basics Slice vsd Figure 19 Timer Slice Compare Registers and PWM related Blocks y 0 3 PRy Period Y Compare 1 p TRy a d 2 CR1y C
6. Period Match ISR Handler void CCU80 0 IRQHandler void XMC CCU8 SLICE ClearEvent SLICEO PTR XMC CCU8 SLICE IRQ ID PERIOD MATCH Application specific code One Match ISR Handler void CCU80 1 IRQHandler void XMC CCU8 SLICE ClearEvent SLICEO PTR XMC CCU8 SLICE IRQ ID ONE MATCH Application specific code 3 2 7 Main Function Implementation Before the start and execution of timer slice software for the first time the CCU8 must be initialized appropriately using the following sequence e Clock setup Ensure clock frequency is set at 120 MHz XMC SCU CLOCK Init amp clock config e Enable clock enable prescaler block and configure global control Enable CCU8 module XMC_CCU8_Init MODULE PTR XMC_CCU8 SLICE MCMS ACTION TRANSFER PR CR Application Note 46 V1 0 2015 07 Capture Compare Unit 8 CCU8 AP32288 Infineon Multi Phase Output Pattern Generation Start the prescaler XMC CCU8 StartPrescaler MODULE Ensure fCCU reaches CCU80 PTR XMC CCU8 SetModuleClock MODULE PTR XMC CCU8 CLOCK SCU e Configure Slice s Functions Interrupts and Start up Configure CCU8x CC8y slice as timer XMC CCU8 SLICE CompareInit SLIC EO PTR XMC CCU8 SLICE CompareInit SLIC El PTR XMC CCU8 SLICE CompareInit SLIC E2 PTR Set period match value of
7. i i I I NE I l I I I 1 One Match OMUS l L 3 Falling edge transition for dead time on Channel 1 is configured to 100ns This is configured on all 3 slices OUTO1 PO 2 4 Period Match Event occurs An ISR can be triggered to update the duty cycle Calculation of the new duty cycle value depends on the selected motor control algorithm used in the application CCU80 CC81 OUT10 P0 4 OUT11 PO 1 5 One Match Event occurs An ISR can be triggered to restart all the slices if the slices are previously connected in monoshot mode In this example this ISR is not required as the slices are all in continuous mode CCU80 CC82 OUT20 P0 3 For this example Compare value for Channel 1 are assigned duty cycle of 3096 6096 and 8096 In an actual application these are usually assigned based on the selected algorithm OUT21 P0 0 SCU GSC80 Figure26 Example CCUS Initialization for 3 Phase Motor Drive Application Note 41 V1 0 2015 07 Capture Compare Unit 8 CCU8 1 AP32288 In Ineon Multi Phase Output Pattern Generation 3 2 1 Theory of Operation Space Vector Modulation SVM is an algorithm for the control of the CCU8 PWM modulation It is used to control 3 phase motors by modulating the voltage and duty cycle A three leg voltage source motor contains six
8. 0 boundaryl 0 he Initialization data of a VADC group XMC VADC GROUP CONFIG t g group handle XMC_VADC_CONVMODE_12BIT 3U XMC_VADC_CONVMODE_12BIT classO0 conversion mode standard sample time std conv conversion mode emux sampling phase emux channel 3U classl conversion mode standard sample time std conv conversion mode emux XMC VADC CONVMODE 12BIT 3U XMC VADC CONVMODE 12BIT sampling phase emux channel 3U arbitration round length arbiter mode boundaryO0 boundaryl emux config emux mode Stce usage emux coding 0x0U XMC VADC GROUP ARBMODE ALWAYS 1000U 4000U Starting external channel connected channel he Identifier of the hardware group XMC VADC GROUP t g group identifier VADC GROUP PTR Channel configuration data XMC VADC CHANNEL CONFIG t g channel handle channel priority input class lower boundary select upper boundary select alias channel bfl Application Note 1U Boundary 0 Boundary 1 XMC VADC GROUP EMUXMODE SWCTRL 0 XMC VADC GROUP EMUXCODE BINARY 0 0 XMC VADC CHANNEL CONV GROUP CLASS1 XMC VADC CHANNEL BOUNDARY GROUP BOUNDO XMC VADC CHANNEL BOUNDARY GROUP BOUNDI uint8 t 1 0 23 V1 0 2015 07 Capture Compare Unit 8 CCU8 1 AP32288 In Ineon Dynamic Control of Timer Functions on External Ev
9. PO 5 2 Similar to 1 an ADC queue conversion is triggered A Channel event does occur as the ADC result is within the boundary set VADC GOCH1 ADC_INBOUND 3 In the ADC Channel Event ISR a variable ADC_INBOUND is set This is used as a marker that an ADC conversion has occurred Queue Conversion Channel Event 4 In the Period Match Event ISR POTENTIOMETER compare value for channel 1 CV1 is P14 1 4000 updated if ADC_INBOUND 1 Once updated ADC INBOUND is cleared 1000 Figure15 Example Triggering an ADC conversion to change CCU8 Duty Cycle Application Note 19 V1 0 2015 07 infi Capture Compare Unit 8 CCUS8 1 AP32288 In Ineon Dynamic Control of Timer Functions on External Events 2 2 2 Deriving the Period and Compare Values The clock relationship between fpwm fici and fecug is calculated as shown below e fecug is the frequency of the CCU8 peripheral clock It is the input to the PWM module e fia is the timer resolution used to increment a timer counter Each timer slice supports a dedicated prescaler value selector In this example the default prescaler factor 0 is used This results in a prescaler value of 1 and a timer resolution of 8 33 ns e In order for fpwm frequency of the PWM signal to be 24 kHz the CCU8_CC80 PRS register is loaded with value 4999 Timer frequency fecik Le Period value CCU8ccgo PRS rom 1 Compare v
10. Compare DTR2 i Channel 2 n i SJ le Geers E DTE CCU8xOUTy2 Output set clear Modulation CCST2 amp DTR2n CCU8xOUTy3 Status Bit 2 cesta l Control ccsr2 L T Dead Time frak fock Control DEV_CCU8_01_Compare_DeadTime_principle vsd Application Note 39 V1 0 2015 07 Capture Compare Unit 8 CCU8 1 AP32288 In Ineon Multi Phase Output Pattern Generation Figure24 Dead Time Generation Principle 3 1 1 CCU8 Shadow Transfer for Coherent Signal Pattern Update All CAPCOM8 timers in any slice configuration are assured coherent update by hardware of all relevant timer function parameters The values in shadow registers are updated on a global preset request simultaneously to all function registers at a Period Match or One Match 3 1 2 The Global Shadow Transfer Set Enable Register The Global register GCSS contains all the enable flags that have to be set by software to selectively activate the targeted Shadow Transfer Requests It can be cleared by hardware after the transfer The real time correctness that can be achieved with these logic operations is essential for safe power switching 3 1 3 Shadow Transfer of Compare Register values The compare values that are targeted for an update operation have to be written into both the CC8yCR1S CR2S shadow registers and the corresponding Slice Transfer Set Enable bits For example SySE in GCSS must be preset at the latest within the clock cycle of Period Match in Edge Alig
11. MATLAB of MathWorks Inc MAXIM of Maxim Integrated Products Inc MICROTEC NUCLEUS of Mentor Graphics Corporation MIPI of MIPI Alliance Inc MIPS of MIPS Technologies Inc USA muRata of MURATA MANUFACTURING CO MICROWAVE OFFICE MWO of Applied Wave Research Inc OmniVision of OmniVision Technologies Inc Openwave of Openwave Systems Inc RED HAT of Red Hat Inc RFMD of RF Micro Devices Inc SIRIUS of Sirius Satellite Radio Inc SOLARIS of Sun Microsystems Inc SPANSION of Spansion LLC Ltd Symbian of Symbian Software Limited TAIYO YUDEN of Taiyo Yuden Co TEAKLITE of CEVA Inc TEKTRONIX of Tektronix Inc TOKO of TOKO KABUSHIKI KAISHA TA UNIX of X Open Company Limited VERILOG PALLADIUM of Cadence Design Systems Inc VLYNQ of Texas Instruments Incorporated VWORKS WIND RIVER of WIND RIVER SYSTEMS INC ZETEX of Diodes Zetex Limited Last Trademarks Update 2014 07 17 www infineon com Edition 2015 07 Published by Infineon Technologies AG 81726 Munich Germany 2015 Infineon Technologies AG All Rights Reserved Do you have a question about any aspect of this document Email erratum infineon com Document reference AP32288 Legal Disclaimer THE INFORMATION GIVEN IN THIS APPLICATION NOTE INCLUDING BUT NOT LIMITED TO CONTENTS OF REFERENCED WEBSITES IS GIVEN AS A HINT FOR THE IMPLEMENTATION OF THE INFINEON TECHNOLOGIES COMPONENT ONLY AND
12. 0U arbiter clock divider 1U class0 conversion mode standard sample time std conv conversion mode emux sampling phase emux channel classl conversion mode standard sample time std conv conversion mode emux sampling phase emux channel hy data reduction control 0U wait for read mod true vent gen enabl false boundaryO QU boundaryl 0U he Initialization data of a VADC group XMC VADC GROUP CONFIG t g group handle group num VADC GROUP ID class0 Application Note 32 XMC VADC CONVMODE 12BIT 3U XMC VADC CONVMODE 12BIT 3U XMC VADC CONVMODE 12BIT 3U XMC VADC CONVMODE 12BIT 3U V1 0 2015 07 Capture Compare Unit 8 CCU8 AP32288 Infineon Dynamic Control of Timer Functions on External Events conversion mode standard sample time std conv conversion mode emux sampling phase emux channel classl conversion mode standard sample time std conv conversion mode emux sampling phase emux channel arbitration round length O0xOU arbiter mode 1000U 4000U boundaryO boundaryl d emux mode emux config Stce usage emux coding sStarting external channel connected channel n Identifier of the hardware group XMC VADC CONVMODE 12BIT 3U XMC VADC CONVMODE 12BIT 3U XMC VADC CONVMODE FASTCOMPARE 3U XMC VADC CONVMODE 12BIT 3U XMC VADC GROUP ARBMO
13. Application Note V1 0 2015 07 Capture Compare Unit 8 CCUS AP32288 Infineon Introduction to the CCUS Basic Features 3 Feedback Sensor Event monitoring and Revolution by Capture Count and Position Interface facilities POSIF Multi Signal Pattern on Output Pins created by parallel Multi Channel Control 5 Drive amp Motor Control with Multi Phase System Phase Adjustment and Trap Handling 6 3 Level PWM for Inverters and Direct Torque Control DTC of AC Motors and High Precision Synchronous Motors 7 External Events Control of Timer Input Functions by requests from external system units e Dithering PWM or period for DC Level precision Reduced EMI Fractional Split of Reriods into Micro Step 9 Auto Adjusting Time Base by Floating Prescaler for adaption of time measurement to a wide range of dynamics The same use cases are illustrated in the following figure Parallel Control of Output Pins by single pattern Stall Detection via BEMF Bipolar Stepper with Micro Steps 1 v afl d PWM2 Polarity2 Asymm Comp 2 Asymm PWM2 1 2 z 3 Simple Time Base Single Shots in PFC amp SMPS Quadrature Encoder Interrupt Request on the Period Match Comprehensive Single Shots Handling Event Counting Synchronize on External Event Control Up Down Counting sel o Revolution Monitoring E i LD Velocity on Tick Velo
14. Control of Timer Functions on External Events SysSpll config k div 4U Syspll config mode XMC SCU CLOCK SYSPLL MODE NORMAL SysSpll config clksrc XMC SCU CLOCK SYSPLLCLKSRC OSCHP enable oschp true enable osculp false calibration mode XMC SCU CLOCK FOFI CALIBRATION MODE FACTORY fstdby clksrc XMC SCU HIB STDBYCLKSRC OSI fsys clksrc XMC SCU CLOCK SYSCLKSRC PLL fsys clkdiv 1U fcpu clkdiv 1U fccu clkdiv 1U fperipheral clkdiv 1U XMC Capture Compare Unit 8 CCU8 Configuration for SLICEO XMC CCU8 SLICE COMPARE CONFIG t SLICE config timer mode uint32 t XMC CCU8 SLICE TIMER COUNT MODE EA monoshot uint32 t false shadow xfer clear uint32 t OU dither timer period uint32 t OU dither duty cycle uint32 t OU mcm chl enable uint32 t false mcm ch2 enable uint32 t false Slice status uint32 t XMC CCU8 SLICE STATUS CHANNEL 1 prescaler mode uint32 t XMC CCU8 SLICE PRESCALER MODE NORMAL passive level out0 uint32 t XMC CCU8 SLICE OUTPUT PASSIVE LEVEL LOW passive level outl uint32 t XMC CCU8 SLICE OUTPUT PASSIVE LEVEL LOW passive level out2 uint32 t XMC CCU8 SLICE OUTPUT PASSIVE LEVEL LOW passive level out3 uint32 t XMC CCU8 SLICE OUTPUT PASSIVE LEVEL LOW asymmetric pwm uint32 t OU invert outO0 uint32 t OU invert outl uint32 t 1U invert out2 uin
15. PASSIVE ACTIVE Level Control The PASSIVE ACTIVE state of a slice s internal output CCUxSTy status bit CC8yST is controlled by the compare level and the External Modulation Mode The CC8yPSL Passive Active bit PSL controls whether the external output pin state CCU8xOUTy for example the PWM should be Passive Low Active High or vice versa 1 10 How to Start a Timer 1 10 1 Initialization Sequence Before the start and execution of timer slice software for the first time the CCU8 must be initialized appropriately using the following sequence e Apply Reset e Release Reset e Enable Clock e Enable Prescaler Block e Configure Global Control e Configure Slice s Functions Interrupts and Start up Application Note 13 V1 0 2015 07 infi Capture Compare Unit 8 CCUS8 1 AP32288 In Ineon Introduction to the CCUS Basic Features 1 10 2 Start up Enable In the last part of the CCU8 Initialization Sequence the startup value s for a specific Compare Channel Status ofthe Timer Slice s could be configured by the respective GCSS SyTS bit After that the default IDLE mode has to be removed from the Timer Slice s in the GIDLC register and then Start or Global Start can be initiated 1 10 3 Start Timer Running There are two ways to start a timer e Directly by software setting the Timer Run Bit Set TRBS e Indirectly by hardware when a specific event occurs in an external unit as determined by the Top Level Connection Matrix o
16. Project includes include xmc ccu8 h include lt xmc_gpio h gt include lt xmc_scu h gt Project Macro definitions for CCU8 define MODULE PTR CCU80 define MODULE NUMBER 0U define SLICEO PTR CCU80 CC80 define SLICEO NUMBER 0U define SLICEO0 OUTPUT00 PO 5 define SLICEO OUTPUTO1 PO 2 define SLICE1 PTR CCU80 CC81 define SLICE1 NUMBER 1U define SLICE1 OUTPUT10 PO 4 define SLICE1 OUTPUTI11 PO 1 define SLICE2 PTR CCU80 CC82 define SLICE2 NUMBER 2U define SLICE2 OUTPUT20 PO 3 define SLICE2 OUTPUT21 PO 0 3 2 5 XMC Lib Peripheral Configuration Structure XMC System Clock Unit SCU Configuration XMC Clock configuration structure XMC SCU CLOCK CONFIG t clock config SysSpll config n div 80U SySpll config p div 2U SysSpll config k div 4U Syspll config mode XMC SCU CLOCK SYSPLL MODE NORMAL Syspll config clksrc XMC SCU CLOCK SYSPLLCLKSRC OSCHP enable oschp true enable osculp false calibration mode XMC SCU CLOCK FOFI CALIBRATION MODE FACTORY fstdby clksrc XMC SCU HIB STDBYCLKSRC OSI fsys clksrc XMC SCU CLOCK SYSCLKSRC PLL fsys clkdiv 1U fcpu clkdiv 1U fccu clkdiv 1U fperipheral clkdiv 1U XMC Capture Compare Unit 8 CCU8 Configuration for the 3 Slices XMC CCU8 SLICE COMPARE CONFIG t SLICE config Application Note 44
17. be configured correctly in order to avoid shoot through between l 2 E E A high side and low side transistor within the motor e Dead Time l Gate e gt Driver U PWM 1A 1 1 LS PWM 1B PWM 1B LF SE ee ee ee MK E F 100 200ns toons Example l Is switch is turned off Dead Time jising edge 200ns _ 9 Dead Time falling edge 100ns Figure 27 Controlling the Switching using PWM 3 2 2 Deriving the Period and Compare Values The counting mode has been set to center aligned mode and the clock relationship between fpyy fici and fccug is calculated as shown below e fecug is the frequency of the CCU8 peripheral clock It is the input to the PWM module Application Note 42 V1 0 2015 07 infi Capture Compare Unit 8 CCUS8 1 AP32288 In Ineon Multi Phase Output Pattern Generation fy is the timer resolution used to increment a timer counter Each timer slice supports a dedicated prescaler value selector In this example the default prescaler factor is 0 This results in a prescaler value of 1 and a timer resolution of 8 33 ns e fpwm the frequency of the PWM signal is 10 kHz Given that it is in center aligned mode the actual slice frequency is two times the PWM signal frequency because it consists of the count up to period match and count down to one match Hence the frequency is on the count up to the CCU8_CC80 The PRS register is loaded with valu
18. bits For example SySE in GCSS must be preset before Period Match in Edge Aligned Mode or Period One Match in Center Aligned Mode Beside the Compare CR1 CR2 values there are also the the timer Period register PR and the PWM Active Passive control bit PSL that can be updated simultaneously on the SySE flag Dithering or Floating Prescaler values are able to get a simultaneous update via the SyDSE and SyPSE request flags Application Note 12 V1 0 2015 07 Capture Compare Unit 8 CCU8 1 AP32288 In Ineon Introduction to the CCU8 Basic Features Shadow TrAnsfer on One Match and REquest is Shadow TrAnsfer No Shadow No Shadow on Period Match Transfer since Transfer since and REquest is No request No request cleared by HW is q cleared by HW Timer CC8y CC80CR18 10 CC80CR18 20 CC80CR2S 20 CC80CR2S 80 CC81CRI1S 30 CC81CRIS 60 SySE 1 COBOCRT TO SySE 1 CC80CR1 20 CC80CR2 20 CC80CR2 80 CC81CR1 30 CC81CR1 60 Shadow transfer mechanism Coherent update of compare registers by HW SW can write asynchronously to the timer state After all values are updated the shadow transfer is requested by setting SySE At every Period Match or One Match event the HW can perform the transfer and clears the request DEV_CCU8_00_Shadow_Transfer_with_Compare_Registers vsd Figure 10 Basic Shadow Transfer Mechanism for Compare Register Values 1 9 3 CCUS Output State and Output Pin
19. g queue handle req src priority uint8 t 3U Highest Priority 3 Lowest 0 conv start mode XMC VADC STARTMODE WFS external trigger bool false External trigger enabled trigger edge XMC VADC TRIGGER EDGE NONE gate signal XMC VADC REQ GT A timer mode bool false No timer mode Queue Entry XMC VADC QUEUE ENTRY t g queue entry channel num CHANNEL NUMBER refill needed true Refill is needed generate interrupt false Interrupt generation is needed false External trigger is required external trigger 2 3 5 Main Function Implementation Before the start and execution of timer slice software for the first time the CCU8 must be initialized appropriately using the following sequence e Clock setup Ensure clock frequency is set at 120 MHz XMC SCU CLOCK Init amp clock config e Enable clock enable prescaler block and configure global control Enable CCU8 module XMC CCU8 Init MODULE PTR XMC CCU8 SLICE MCMS ACTION TRANSFER PR CR Get the slice out of idle mode XMC CCU8 EnableClock MODULE PTR SLICEO NUMBER Start the prescaler XMC CCU8 StartPrescaler MODULE PTR e Configure Slice s Functions Interrupts and Start up Configure CCU8x CC8y slice as timer XMC CCU8 SLICE CompareInit SLICEO PTR amp SLICE config S
20. the timer XMC CCU8 SLICE SetTimerPeriodMa XMC CCU8 SLICE SetTimerPeriodMa XMC CCU8 SLICE SetTimerPeriodMa tch SLIC amp SLICE config amp SLICE config amp SLICE config EO PTR 5999U tch SLIC El PTR 5999U tch SLIC E2 PTR 5999U Set timer compare match value for channel 1 80 60 30 Duty Cycle XMC_CCU8 SLICE SetTimerCompareMatch SLI CEO PTR XMC CCU8 SLICE COMPARE CHANNEL 1 1200U XMC CCU8 SLICE SetTimerCompareMatch SLI CEl PTR XMC CCU8 SLICE COMPARE CHANNEL 1 24000 XMC CCU8 SLICE SetTimerCompareMatch SLI CE2 PTR XMC CCU8 SLICE COMPARE CHANNEL 1 4200U Transfer value from shadow timer registers to actual timer registers XMC CCU8 EnableShadowTransfer MODULE PT XMC CCU8 EnableShadowTransfer MODULE PT XMC CCU8 EnableShadowTransfer MODULE PT Configure events XMC CCU8 SLICE ConfigureEvent S amp SLICE eventO config XMC CCU8 SLICE ConfigureEvent S jICEO PT JOE Bm amp SLICE eventO config XMC CCU8 SLICE ConfigureEvent S jICE2 PT amp SLICE eventO0 config XMC CCU8 SLICE StartConfig SLIC XMC CCU8 SLICE START MO EO PTR DE TIMER R XMC CCU8 SHADOW TRANSFER SLICE 0 R XMC CCU8 SHADOW TRANSFER SLICE 1 R XMC CCU8 SHADOW TRANSFER SLICE 2
21. value of 4000 4000 i 4 The trap exit is configured to be Shoo ore d bir Cie i EE DE synchronized with the PWM period of the trap state and exited automatically The CCU80 OUTOO and CCU80 0UTO2 are enabled Figure16 Example Generating a CCUS Trap with ADC Fast Compare 2 3 1 Theory of Operation With the limit checking feature of VADC on XMC series every digital conversion result can be automatically compare to an Upper and a Lower Boundary value A channel event can be generated when the result of a conversion is inside or outside of a user defined band enabling a service request to only be issued under certain pre defined conditions depending on the boundary definition This feature supports automatic range monitoring and minimizes the CPU load by issuing CCU8 TRAP service requests only under certain predefined conditions The boundary flags exist to monitor if a value has crossed the activation boundary These flags can be represented as a change in the bitfield BFLy of the Boundary Flag Register GxBFL and can act as a trigger signal for CCU8 TRAP to protect the hardware Application Note 28 V1 0 2015 07 Capture Compare Unit 8 CCU8 1 AP32288 In Ineon Dynamic Control of Timer Functions on External Events Compare value e Compare Signal Results below the e Results above the reference value reference value O VADC_Fast_Compare_BF jp
22. 7 Initial Version Application Note 49 V1 0 2015 07 Trademarks of Infineon Technologies AG AURIX C166 CanPAK CIPOS CIPURSE CoolGaN CoolMOS CoolSET CoolSiC CORECONTROL CROSSAVE DAVE DI POL DrBLADE EasyPIM EconoBRIDGE EconoDUAL EconoPACK EconoPIM EiceDRIVER eupec FCOS HITFET HybridPACK ISOFACE IsoPACK i Wafer MIPAQ ModSTACK my d NovalithiIC OmniTune OPTIGA OptiMOS ORIGA POWERCODE PRIMARION PrimePACK PrimeSTACK PROFET PRO SIL RASIC REAL3 ReverSave SatRIC SIEGET SIPMOS SmartLEWIS SOLID FLASH SPOC TEMPFET thinQ TRENCHSTOP TriCore Other Trademarks Advance Design System ADS of Agilent Technologies AMBA ARM MULTI ICE KEIL PRIMECELL REALVIEW THUMB uVision of ARM Limited UK ANSI of American National Standards Institute AUTOSAR of AUTOSAR development partnership Bluetooth of Bluetooth SIG Inc CAT iq of DECT Forum COLOSSUS FirstGPS of Trimble Navigation Ltd EMV of EMVCo LLC Visa Holdings Inc EPCOS of Epcos AG FLEXGO of Microsoft Corporation HYPERTERMINAL of Hilgraeve Incorporated MCS of Intel Corp IEC of Commission Electrotechnique Internationale IrDA of Infrared Data Association Corporation ISO of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION
23. AN CCU4x USIC ADC CCU8x or SCU Pin Connections are given by the Top Level Interconnect matrix and the CC8yINS P A Input Select vector and Function Select by the CC8yCMC register A CC8y internal event is also regarded as External Event This means a CC8y can control itself by its own events 2 1 3 Selection of External Events Control of Input Functions There are 11 Timer Input Functions such as Start the Timer controlable by external events via 3 selectable input lines with configurable source event profile conditions to the Timer Slices CC8y y 0 3 of a CCU8x unit for Start Stop Capture0 3 Gate Up Down Load Count Bit Override Trap and Modulate Output control The Input Functions are due to their nature controlled by either event edge or event level signals 2 1 4 Extended Slice Input Functions There are some Extended Input Functions in the CC8yTC register for the options Flush Start Flush Stop or just Flush the timer and for an Extended Capture Mode option that via a read access register ECRD setup simplifies administration of capture registers and full flags when more than one slice is used in Capture mode Select Select Select External Considered CC8y External EVENT z Event Event Input EVENT z Control Source Edge or Level Function Source Inputs E g CCU8xINy A Edge signal to start the timer GPIO CUBXINY B Edge signal to stop t
24. D PS Init actu Ps int Pr tente SCU Control Connect ME modulate Dither E T 279 x lt period gt 1 fccu lt PSIV gt 0 15 DEV_CCU8 00 Use Cases vsd Figure 4 Some Features and Use Cases 1 9 characterizing an CAPCOM Unit CCU Features 1 5 Additional CCU8 Features Features Operation Application Note V1 0 2015 07 Capture Compare Unit 8 CCUS AP32288 Introduction to the CCUS Basic Features Features Cinfineon Operation Single Shot If a slice is set in Timer Single Shot Mode CC8yTC TSSM the Timer and its Run Bit TRB is cleared by the Period One match that occurs next to when the TSSM bit was set As a result the timer stops running Timer Concatenation Any timer slice can be concatenated with an adjacent timer slice by setting CC8yTC TCE 1 Dithering PWM It can be used with very slow control loops that cannot update the period compare values in a fast manner The precision can be maintained on long runs Dithering Period Time Micro ticks can be used in the Interpolation between sensor pulses to achieve higher precision position monitoring Floating Prescaler By changing of the timer clock frequency periodically no compare capture event the dynamic range is autonomously adapted to any time length External Modulation The output pin signal of a slice is modulated by external events Output State Override An external input signal source can override a s
25. DE ALWAYS Boundary 0 Boundary 1 XMC OU XMC_ OU OU VADC GROUP EMUXMODE SWCTRL VADC GROUP EMUXCODE BINARY XMC VADC GROUP t g group identifier VADC GROUP PTR Channel configuration data XMC VADC CHANNEL CONFIG t g channel handle channel priority 1U input class lower boundary select upper boundary select alias channel boundary flag output chO 1 event gen criteria alternate referenc result reg number uint8 t Sync conversion false result alignment R XMC VADC CHANNEL CONV GROUP CLASS XMC VADC CHANNEL BOUNDARY GROUP BOUNDO XMC VADC CHANNEL BOUNDARY GROUP BOUNDI uint8 t 1 XMC VADC CHANNEL EVGEN COMPHIGH XMC VADC CHANNEL REF INTREF ES R EG NUMBER Sync Feature disabled XMC VADC RESULT ALIGN RIGHT use global result false broken wire detect channel false broken wire detect false n Result configuration data XMC VADC RESULT CONFIG t g result handle post processing mode XMC VADC DMM REDUCTION MODE data reduction control 0 part of fifo false No FIFO wait for read mod false WES Application Note 33 V1 0 2015 07 Capture Compare Unit 8 CCU8 1 AP32288 In Ineon Dynamic Control of Timer Functions on External Events vent gen enabl false No result event Queue hardware configuration data XMC VADC QUEUE CONFIG t
26. ENT_PWM result ADC _ INBOUND Lz 2 2 6 Main Function Implementation Before the start and execution of timer slice software for the first time the CCU8 must be initialized appropriately using the following sequence e Clocksetup Ensure clock frequency is set at 120 MHz XMC SCU CLOCK Init amp clock config e Enable clock enable prescaler block and configure global control Enable CCU8 module XMC CCU8 Init MODULE PTR XMC CCU8 SLICE MCMS ACTION TRANSFER PR CR Start the prescaler XMC CCU8 StartPrescaler MODULE PTR Ensure fCCU reaches CCU80 XMC CCU8 SetModuleClock MODULE PTR XMC_CCU8 CLOCK SCU Application Note 25 V1 0 2015 07 Capture Compare Unit 8 CCU8 1 AP32288 n n eon Dynamic Control of Timer Functions on External Events Configure Slice s Functions Interrupts and Start up Configure CCU8x CC8y slice as timer XMC CCU8 SLICE CompareInit SLICEO PTR amp SLICE config Set period match value of the timer XMC CCU8 SLICE SetTimerPeriodMatch SLICEO PTR 49990 Set timer compare match value for channel 1 50 duty XMC CCU8 SLICE SetTimerCompareMatch SLICEO PTR XMC CCU8 SLICE COMPARE CHANNEL 1 25000 Set timer compare match value for channel 2 50 duty XMC CCU8 SLICE SetTimerCompareMatch SLICEO PTR XMC CCU8 SLICE COMPARE CHANNEL 2 25000 Transfer value from shadow timer registers to actual t
27. FI CALIBRATION MODE FACTORY g n div 80U g p div 2U g k div 4U L config mode XMC SCU CLOCK SYSPLL MODE NORMAL config clksrc XMC SCU CLOCK SYSPLLCLKSRC OSCHP true le osculp false fstdby clksrc XMC SCU HIB STDBYCLKSRC OSI fsys clksrc fsys clkdiv fcpu clkdiv fccu clkdiv fperipheral he XMC SCU CLOCK SYSCLKSRC PLL 1U 1U 1U clkdiv 1U XMC Capture Compare Unit 8 CCU8 Configuration for SLICEO XMC_CCU8_SLICE_COMPARE_CONFIG_t SLICE_config Application Note 21 Infineon V1 0 2015 07 Capture Compare Unit 8 CCU8 1 AP32288 n n eon Dynamic Control of Timer Functions on External Events timer mode uint32 t XMC CCU8 SLICE TIMER COUNT MODE EA monoshot uint32 t false shadow xfer clear uint32 t OU dither timer period uint32 t OU dither duty cycle uint32 t OU mcm chl enable uint32 t false mcm ch2 enable uint32 t false Slice status uint32 t XMC CCU8 SLICE STATUS CHANNEL 1 prescaler mode uint32 t XMC CCU8 SLICE PRESCALER MODE NORMAL passive level out0 uint32 t XMC CCU8 SLICE OUTPUT PASSIVE LEVEL LOW passive level outl uint32 t XMC CCU8 SLICE OUTPUT PASSIVE LEVEL LOW passive level out2 uint32 t XMC CCU8 SLICE OUTPUT PASSIVE LEVEL LOW passive level out3 uint32 t XMC CCU8 SLICE OUTPUT PASSIVE LEVEL LOW asymmetric pwm uint32 t OU invert o
28. IER YER Pe Rec ERR e EE PEERS 13 1 10 2 Start up Enable uiri e ret RO EE HUP REER S EEUU ERE YDG 14 1 10 3 Start Timer RUDNINE seinieni C M M 14 1 10 4 Global St rt oF CCUS i ee etti eerte e roe rte e t ee i seri ae ee Fate aE 14 1 10 5 Global Start of the CCU4 and CCU8 CAPCOM Units esseesseeeeeeeee eene nnn nnns 14 2 Dynamic Control of Timer Functions on External Events ee ecce eee e eee e eene eene nnne 16 2 1 IntrOGQUICEIOD cs riore tore c REESE EY Eee FUENTE EVER ERN RAT EFE EARN a E TS 16 2 1 1 External Control Basics eroe Pear eerte ER HER ERE ER ER FIOR AERE ERR RIS RI 16 2 1 2 Selection of External Events Control Sources ener ene 17 2 1 3 Selection of External Events Control of Input Functions eese 17 2 1 4 Extended Slice Input Functions esses seen eene nnne e E ntis irse 17 2 1 5 External Control by Timer Events eene enne nennen iE a bi enne nnns ens 17 2 1 6 Top Level Control of Event Request to from a Timer Slice eese 18 2 2 Example Use Case Triggering an ADC Conversion to change CCU8 Duty Cycle 19 2 2 2 Deriving the Period and Compare Values csccsssesceseessesscesecseeescesecsseesessecaeeneesecesecseeeneeaeenes 20 2 2 3 Macro and variable Settings csccssssccssessssscssesseeeecesecseeeeesecseseeessecaseessseeceaeeseeseceaesaeeeneeaeeats 21 2 2 4 XMC Lib Peripheral Configuration SEFU CLUFe i
29. Infineon XMC1000 XMC4000 32 bit Microcontroller Series for Industrial Applications Capture Compare Unit 8 CCU8 AP32288 Application Note About this document Scope and purpose This application note provides a brief introduction to the key features of the Capture Compare Unit CCU8 module and some typical application examples It also provides hints for users who wish to use the CCU8 to develop motor control applications with XMC microcontroller family Intended audience This document is intended for engineers who are familiar with the XMC microcontrollers Applicable Products e XMC1000 e XMC4000 e DAVE References The User s Manual can be downloaded from http www infineon com XMC DAVE and its resources can be downloaded from http www infineon com DAVE V1 0 1 2015 07 infi Capture Compare Unit 8 CCUS8 1 AP32288 In Ineon Table of Contents Table of Contents ADOUE this document eT EEA 1 Table Of Contents iicccsecccsssecscesssesvedevscecsccassscscadescdsesassseecevesssessecsesecascoescedesescecdesssessccessneddadsseeestaeses 2 1 Introduction to the CCU8 Basic Features ssscssscsssccsscccsccssscccsccesccesccescccesscesscesseeeees 4 1 1 CCUR LEE 4 1 2 Basic Timer FUNCTIONS roc etre ler EE E T ER E e TEE EE T EE e Era ei EN E EE 4 1 3 The Comound CAPCOM8 SV Stein csisassecsstancitcnsweienasnennsdaseunntcanbarenecnslanenunncaurannpusisiisanabeiecreenduc
30. MOSFET or IGBTs which act as switches The switches connected to the positive supply rail are called high side switches HS and the switches connected to the negative rail of the power supply are called low side switches LS The switches are controlled by PWM inputs It must be ensured that both switches in the same leg are not turned on atthe same time or else the DC supply would be shorted By switching the high side and low side switches on and off there are eight possible states These states should not cause cross current but msut allow a current following to and from the motor Controlling the Switching using PWM In the figure a three leg voltage source motor contains six MOSFET or IGBTs which act as switches The switches are connected to positive supply rail are called high side switches HS and the switches connected to the negative rail of the power supply are called low side switches LS These switches must be controlled to ensure that no time are both switches in the same leg turned on or else the DC supply would be shorted By switching the high side and low side switches on and off there are eight possible states These states should not cause cross current but allow a current to flow to and from the motor P M 1 e Dead Time Configuration PWM 1A HS Depending on the hardware used the deadtime must
31. Qn Deadtime initialisation XMC CCU8 SLICE DeadTimeInit SLIC EO El XMC CCU8 SLICE DeadTimeInit SLIC E2 XMC CCU8 SLICE DeadTimeInit SLIC Initializes the GPIO XMC GPIO Init SLICEO0 OUTPUTOO amp XMC GPIO Init SLICEO OUTPUTO1 amp XMC GPIO Init SLICEl OUTPUT10 amp XMC GPIO Init SLICEl OUTPUT11 amp XMC GPIO Init SLICE2 OUTPUT20 amp XMC GPIO Init SLICE2 OUTPUT21 amp e Start Timer Running on external start event Get the slice out of idle mod XMC CCU8 EnableClock MODULE PTR XMC CCU8 EnableClock MODULE PTR XMC CCU8 EnableClock MODULE PTR OU OU OU OU OU OU e S S S PTR amp SLICE dt config _PTR amp S PTR amp SLICE dt config ICE dt config UT strong sharp config TPUT strong sharp config TPUT strong sharp config UT strong soft config UT strong sharp config TPUT strong soft config x7 ICEO NUMBER ICEl NUMBER ICE2 NUMBER Start the PWM on a rising edge on SCU GSC80 XMC SCU SetCcuTriggerHigh XMC SCU CCU TRIGGER CCU80 Application Note 48 V1 0 2015 07 Capture Compare Unit 8 CCU8 AP32288 Cinfineon Revision History 4 Revision History Current Version is V1 0 2015 07 Page or Reference Description of change V1 0 2015 0
32. R2y Y Y Y Y Dead Time 1y Dead Time 2y DEV CCUS8 01 Compare Principle Blocks vsd Figure 20 Two Compare Channels Principle Blocks Application Note 37 V1 0 2015 07 Capture Compare Unit 8 CCUS AP32288 Cinfineon Multi Phase Output Pattern Generation y 0 3 PRy Period CCU8xSTyA e CCST1 Compare 1 M TRy Did CCST2 C CCU8xSTyB CR1y CR2y Dead Time 1y Dead Time 2y STOS Default 0 CCST1 CCST2 CCU8xSTy CCST1 amp CCST2 x DEV CCUS8 01 Compare Principle Blocks Status Bits vsd Figure 21 Two Compare Channels Status Bits Asymmetric Compare The benefit of shadow transfers on both Period Match and performed in center aligned mode by software In addition One Match allows an asymmetric compare to be the CCU8x slice offers two compare registers CC8yCR1 CR2 and the aggregated shadow registers CC8yCR1S CR2S These allow asymmetric compare to be performed by hardware only Asymm PWM ys 0 3 A Timer TRy Period PRy 2 Asymm Comp 2 CR2y _ CR2y gt CR1y Symm Compare 4 xd aa DLE o NE ERE Asymm Comp 1 i l m ME E time I I 1 i 1 I i I I DEV CCU8 01 Compare Asymmetric PWM Center Aligned vsd Figure 22 Application Note 38 Symmetric P
33. SHALL NOT BE REGARDED AS ANY DESCRIPTION OR WARRANTY OF A CERTAIN FUNCTIONALITY CONDITION OR QUALITY OF THE INFINEON TECHNOLOGIES COMPONENT THE RECIPIENT OF THIS APPLICATION NOTE MUST VERIFY ANY FUNCTION DESCRIBED HEREIN IN THE REAL APPLICATION INFINEON TECHNOLOGIES HEREBY DISCLAIMS ANY AND ALL WARRANTIES AND LIABILITIES OF ANY KIND INCLUDING WITHOUT LIMITATION WARRANTIES OF NON INFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS OF ANY THIRD PARTY WITH RESPECT TO ANY AND ALL INFORMATION GIVEN IN THIS APPLICATION NOTE Information For further information on technology delivery terms and conditions and prices please contact the nearest Infineon Technologies Office www infineon com Warnings Due to technical requirements components may contain dangerous substances For information on the types in question please contact the nearest Infineon Technologies Office Infineon Technologies components may be used in life support devices or systems only with the express written approval of Infineon Technologies if a failure of such components can reasonably be expected to cause the failure of that life support device or system or to affect the safety or effectiveness of that device or system Life support devices or systems are intended to be implanted in the human body or to support and or maintain and sustain and or protect human life If they fail it is reasonable to assume that the health of the user or other persons may be endangered
34. SVM is an algorithm for the control of pulse width modulation PWM outputs It is most commonly used to drive 3 phase motor drive Based upon the angle sector and amplitude it decides which outputs need to be active and the duration duty cycle for which they should be in the active state In this example based on the XMC4500 3 slices of CCU8 are configured to generate 6 PWM outputs that can be used to connect to gate switches For the purposes of illustration the frequency of the PWM generated by the3 slices is set to 20 kHz and compare values are initialized to 3096 6096 and 8096 of the Slice period value On Slice 0 2 interrupt events period match and one match are configured and user application code can be added to these routines SLICE Configuration XMC4500 Period System Clock 120 MHz 30 PWM Frequency 10 kHz Mode Center aligned CV1 6096 8076 1 SCU GSC80 is connected to the input of Event O for all 3 Slices of Period Match CCU80 This is to allow them to start at the same time It is set high by writing PMUS t to the CCUCON SFR This starts all 3 slices of the CCU80 80 81 82 timers on an external start event on Event 0 CCUS80 CC80 2 Rising edge transition for dead time t j I i i I I Ly l on Channel 1 is configured to 200ns 2 This is configured on all 3 slices OUTOO P0 5
35. V1 0 2015 07 Capture Compare Unit 8 CCU8 AP32288 Infineon Multi Phase Output Pattern Generation XMC CCUS8 he n mcm chl enable ncm ch2 enable Slice status timer mode monoshot prescaler mode asymmetric pwm invert outO0 invert outl invert out2 invert out3 SLICE shadow xfer clear dither timer period dither duty cycle passive level outO passive level outl passive level out2 passive level out3 prescaler initval float limit dither limit timer concatenation uint32 t XMC CCU8 SLICE TIMER COUNT MODE CA uint32 t XMC CCU8 SLICE TIMER REPEAT MODE REPEAT 0U OU 0U uint32 t XMC CCU8 SLICE PRESCALER MODE NORMAL 0U 0U uint32 t XMC CCU8 SLICE STATUS CHANNEL 1 uint32 t XMC CCU8 SLICE OUTPUT PASSIVE LEVEL LOW uint32 t XMC CCU8 SLICE OUTPUT PASSIVE LEVEL LOW uint32 t XMC CCU8 SLICE OUTPUT PASSIVE LEVEL LOW uint32 t XMC CCU8 SLICE OUTPUT PASSIVE LEVEL LOW QU QU 1U QU 1U QU QU QU 0U mapped input edge level duration XMC CCU8 SLICE EVENT CONFIG t SLICE eventO0 config INPUT H Connected to SCU GSC80 XMC CCU8 SLICE EVENT EDGE SENSITIVITY RISING EDGE XMC CCU8 SLICE EVENT LEVEL SENSITIVITY ACTIVE LOW XMC CCU8 SLICE EVENT FILTER DISABLED Dead time configurat
36. WM signal generation It is designed with repetitive structures with multiple timer slices that have the same base functionality The internal modularity of CCU8 translates into a software friendly system for fast code development and portability between applications The following image shows the main function blocks of one of the four CC8y slices on a CCU8x CCU8x x 0 1 Service eeeyiess Period Shadow Register Edge Modula ius UE 4 Servi enter tion attern Request Lines Request Period Register Align Control Generation Lines Active Single 2x Compl Outputs Slice y E Timer 16 bit Shot ss Status Bit Reset Power y 0 8 7 Prescaler Compare Shadow Reg 1 2 Input Matrix Control Floating Gc 44 PWM 1 2 3 x Input Function Control Prescaler i H BWM Selector y 16 External Clock Control Compare Register 1 2 PWM 1 2 Event SOUrGeS Asymmetr Dead time 4 x Capture DEV_CCU8_00_Basics_Slice vsd Figure1 The Timer Slice Block Diagram 1 2 Basic Timer Functions Each timer slice can handle all the basic modes and the typical options illustrated in the figure below Application Note 4 V1 0 2015 07 Capture Compare Unit 8 CCU8 AP32288 Infineon Introduction to the CCUS Basic Features
37. WM and Asymmetric PWM Center Aligned Mode V1 0 2015 07 Capture Compare Unit 8 CCUS AP32288 Infineon Multi Phase Output Pattern Generation Timer TRy Period PRy Asymm Comp 2 CR2y CR1y Symm Compare Asymm Comp 1 PRy gt CR2y gt CR1y Symmetric PWM Asymm PWM y 0 3 Phase Shift time DEV_CCU8_01_Compare_Asymmetric_PWM_Edge_Aligned vsd Figure 23 Symmetric PWM and Asymmetric PWM Edge Aligned Mode Dead Time Generation Each CAPCOMB timer slice offers two interdependent 8 bit Dead time Counters that can generate independent dead time values for rising transitions and falling transitions in the two compare channels This can be used to prevent a short circuit in the power stage Dead Time Control Timer TRy Counting Scheme Edge Aligned cesi 1 f Center Aligned Status Bit 1 CESTI Direction Control Control J m Up Down Compare Mode e s CCSTi a DTA ea GESKORINO Symmetric u pu Asymmetric Modulation To CCST1 amp DTR1 CCU8xOUTy1 Compare r BT i Channel 1 i sel Dead Time Active Passive Set Clear Generator 1 Control External Events Timer TRy ERE Control ontro Multi Channel Dead Time oniro a set clear DTR trigger DT2Rise DT2Fall Generator 2 i DTF trigger l
38. al to be 24 kHz the CCU8_CC80 PRS register is loaded with the value 4999 i fecu Timer frequency fag Period value CCU8cceo PRS E 1 fewm Compare value CCU8ccgo CRS 1 DC PRS 1 Table 2 Calculated Prescaler factor Period and Compare Values Type Calculated value Prescaler factor 2 0 Period 24 kHz frequency 4999 Compare value 50 DC 2500 At initialization CV1 CV2 2 3 3 Macro and variable Settings XMC Lib Project includes include lt xmc_ccu8 h gt include lt xmc_gpio h gt include lt xmc_scu h gt include lt xmc_vadc h gt Project Macro definitions for CCU8 define MODULE PTR CCU80 define MODULE NUMBER 0U define SLICEO PTR CCU80 CC80 define SLICEO NUMBER 0U define SLICEO OUTPUTOO PO 5 define SLICEO OUTPUTO2 PO 10 Project Macro definitions for ADC define RES REG NUMBER 0 define CHANNEL NUMBER 1U define VADC GROUP PTR VADC GO P14 1 define VADC GROUP ID 0 define IRQ PRIORITY 10U define FAST COMPARE VAL 40000 2 3 4 XMC Lib Peripheral Configuration Structure XMC System Clock Unit SCU Configuration XMC Clock configuration structure XMC SCU CLOCK CONFIG t clock config Syspll config n div 80U SySpll config p div 2U Application Note 30 V1 0 2015 07 Capture Compare Unit 8 CCU8 1 AP32288 n n eon Dynamic
39. alue CCU8ccgo CRS 1 DC PRS 1 Table 1 Calculated Prescaler factor Period and Compare Values Type Calculated value Prescaler value 2 20 Period 1Hz frequency 4999 Compare value 85096 DC 2500 At initialization CV1 CV2 Application Note 20 V1 0 2015 07 Capture Compare Unit 8 CCU8 AP32288 Dynamic Control of Timer Functions on External Events 2 2 3 include include include include Macro and variable Settings XMC Lib Project includes xmc c xmc g xmc s xmc v cu8 h pio h cu h adc h Project Macro definitions for CCU8 define define define define define M M S S S ODULE PTR CCU80 ODULE NUMBER OU ICEO_ PTR CCU80 CC80 ICEO NUMBER 0U ICEO_OUTPUTOO PO 5 Project Macro definitions for ADC define define define define define RES REG NUMBER 0 CHANNEL NUMBER 1U VADC GROUP PTR VADC GO P14 1 VADC GROUP ID 0 IRQ PRIORITY 100 Project Variables Definition volatile uintl16 t CURRENT PWM volatile bool ADC INBOUND 1 2 2 4 XMC C XMC Lib Peripheral Configuration Structure XMC System Clock Unit SCU Configuration lock configuration structure XMC SCU CLOCK CONFIG t clock config Syspll Syspll SySpll Syspll SySpll confi confi confi enable oschp enabl calibration mode XMC SCU CLOCK FO
40. and other action providers The Event Request Unit ERU1 together with the Top Level Interconnect matrix can combine control and link event signals according to user defined request to action event patterns such as invoke I O states Time Windowing etc Slice CC8y External EVENT 0 Select External Event Source Select Considered Slice Event Input Edge or Level Event 0 Control Matrix Select EVENT 0 Control Function Edge signal to start the timer Edge signal to stop the timer Edge signal to capture into reg 0 amp 1 Edge signal to capture into reg 2 amp 3 Level signal to gate the timer clock Level signal to up down count direction Edge signal to load the Timer Edge signal to count events Status bit override with an input value Level signal to trap for fail safe op Level signal to modulate the output Source Inputs uo GRENA X GPIO CGUBXINY Saai SCUBXINY E X POSIF CCUBXINY F 2 GCUBXINY H X cc RV xINy bid CCU8xINy K eh CCUGINY M xINy Bouse CCUBxINy N SCU CCUBxINy O CCU8xINy P z 0 2 External EVENT 1 Event 1 Control Matrix EVENT 1 Control External EVENT 2 Event 2 Control Matrix EVENT 2 Control ag CCU8xGPy0 1 2 Concatenation Logic Excluded PRy t Timer TRy rd CR1y CR2
41. city on Time Stamp alh a t UN Tick Compare eal Ton i Toft K Roe Se Sees OR y mS I Ip i i Vin EH pi o Vout HH 1 L D pd T Sc POSKF CCUAB Event 4 A 5 6 Multi Channel Control Multi Phase Control 3 Level PWM 3 Phase Motor Control N Phase Power Supplies Asymmetric PWM for Phase Shift Trap Compare 3 Compare 1 PWM 3 PWM 1 For Higher Resolution EMC quality amp Efficiency DW 7 Event Controlled Timer Functions Synchronous Control of Timers by other Units 8 Dithering EMI Reduction by spectrum broadening Fractional Period Time Division into Micro Ticks 9 Auto Adjusting Time Base Adaption to unknown measurement dynamics Reduction of the SW read activities p au nee ao i uad DC Level average precision from 16 to 20 bits Floating Prescaler Mode individual in All Timers Sources Select Edge or Level Select E g How to achieve an average value of 28 9H A timer count Capture GPIO J by a Buck Converter with 200 kHz sampling patios event ERU1 D rate performing 10 bit DC Level on average timer POSIF capture 0 1 CAN Ig Heeres no A g ou CCU4x a up down n L T 2T 4T lt timer gt lt period t gt x 81 T 2T Pt USIC o load mer C coun ae Sear override bit PWM j o
42. e 5999 1 fecus Timer frequency ftcik Peciar Period value GUB cas PRS L 1 2 fpwM Compare value CCU8ccg0 CRS 1 DC PRS 1 Table 3 Calculated Prescaler factor Period and Compare Values Type Calculated value Prescaler factor 2 I Period 20 kHz frequency 5999 Compare value 80 Duty Cycle 1200 Compare value 26096 Duty Cycle 2400 Compare value 23096 Duty Cycle 4200 3 2 3 Deriving the Dead Time The dead time for the rising edge and falling edge is calculated as shown below fy is the timer resolution used to increment a timer counter Each timer slice supports a dedicated prescaler value selector In this example a prescaler value of 1 and a timer resolution of 8 33 ns is used e DTCCisthe divider factor for the prescaler clock configuration of the dead time counter It supports divider factor on fia of 1 2 4 8 faci is the frequency ofthe deadtime clock generator ftcik Dead time clock factk mm Dead time counter DTxR DTxF Desired Dead time fci Table4 Calculated Dead Time Values Type Calculated value DTCC prescaler divider factor 1 DT1R Rise value for dead time of 200ns on channel 1 24 DT1F Fall value for dead time of 100ns on channel 1 12 Application Note 43 V1 0 2015 07 Capture Compare Unit 8 CCU8 1 AP32288 In Ineon Multi Phase Output Pattern Generation 3 2 4 Macro and variable Settings XMC Lib
43. ents vent gen criteria XMC VADC CHANNEL EVGEN INBOUND alternate referenc XMC VADC CHANNEL REF INTREF result reg number uint8 t RES REG NUMBER Sync conversion false Sync Feature disabled result alignment XMC VADC RESULT ALIGN RIGHT use global result false broken wire detect channel false broken wire detect false be Result configuration data XMC VADC RESULT CONFIG t g result handle post processing mode XMC VADC DMM REDUCTION MODE data reduction control 0 part of fifo false No FIFO wait for read mod false WES vent gen enabl false No result event be Queue hardware configuration data XMC VADC QUEUE CONFIG t g queue handle req src priority uint8 t 3U Highest Priority 3 Lowest 0 conv start mode XMC VADC STARTMODE WFS external trigger bool true External trigger enabled trigger signal XMC CCU 80 SR2 trigger edge XMC VADC TRIGGER EDGE RISING gate signal XMC VADC REQ GT A timer mode bool false No timer mode be Queue Entry XMC VADC QUEUE ENTRY t g queue entry channel num CHANNEL NUMBER refill needed true Refill is needed generate interrupt false Interrupt generation is needed external trigger true External trigger is required 2 2 5 Interr
44. enwennnasinens 5 1 4 CCU USE CISSE I 6 1 5 Additional CCUS Features 2 5 tete ere Ere hts esate e DERE EO re de E ES T 1 6 CCUR Input Control sse ttr rare i Re Ee EYE Se Pere EUR Ee PEU PES E PELE E coscevetevagedsbeesueeee 8 1 6 1 Synchronized Control of CAPCOM Units on External Events eese 8 1 6 2 External Control Basics seite tr rre te IEEE FUE E EEEE E 9 1 6 3 External Everits Control iot eerte ee c bere bee C EE EEEE 9 1 6 4 External Event So rces ia uoswen re ee RP REHGIIERUP UNO ETE E EET O E RN aans 9 1 6 5 External Event Input Functions ccesccseessesecsceescesecsessessecsecssesecsaecssesesecaeeenecsecaeesseeseaeeneeas 9 1 7 edic T K 9 1 8 CCUS Output Control nre ert eee FEE FE ENERO IR RE ETRURIAE ETUR 10 1 8 1 External Control by Timer Events eee eene enne enne nete then enne nnns ens 10 1 8 2 Top Level Control of Event Request to from a Timer Slice 10 1 9 Compare BASICS ee Hd ei pu etes eae reete leder eire RE PEE Ee edd a iE N eE 11 1 9 1 CCUS Shadow Transfers uio io er RE HE HP EHE EREEPE RETE assa 12 1 9 2 Shadow Transfer of Compare Register values ccscisiseseccssevivasivenaieasscsweeshoovescaysavivecseoadeveseoesiesios 12 1 9 3 CCU8 Output State and Output Pin PASSIVE ACTIVE Level Control esee 13 1 10 Howto Start TIImel aie tet rhe eh v vr ER EU E ERE reece YER eR reus 13 1 10 1 Initialization SequedllCe uere rere eterne ER E
45. et period match value of the timer XMC CCU8 SLICE SetTimerPeriodMatch SLICEO PTR 49990 Set timer compare match value for channel 1 50 duty Application Note 34 V1 0 2015 07 Capture Compare Unit 8 CCU8 1 AP32288 n n eon Dynamic Control of Timer Functions on External Events XMC CCU8 SLICE SetTimerCompareMatch SLICEO PTR XMC CCU8 SLICE COMPARE CHANNEL 1 2500 Set timer compare match value for channel 2 50 duty XMC CCU8 SLICE SetTimerCompareMatch SLICEO PTR XMC CCU8 SLICE COMPARE CHANNEL 2 2500 Transfer value from shadow timer registers to actual timer registers XMC CCU8 EnableShadowTransfer MODULE PTR XMC CCU8 SHADOW TRANSFER SLICE 0 Configure events Trap exit is synchronized to PWM signal XMC CCU8 SLICE TrapConfig SLICEO PTR XMC CCU8 SLICE TRAP EXIT MODE AUTOMATIC 1U XMC CCU8 SLICE ConfigureEvent SLICEO0 PTR XMC CCU8 SLICE EVENT 2 amp TRAP config Enable events Trap XMC CCU8 SLICE EnableEvent SLICEO PTR XMC CCU8 SLICE IRQ ID EVENT2 XMC CCU8 SLICE EnableTrap SLICEO PTR uint32 t XMC CCU8 SLICE OUTPUT 0 XMC CCU8 SLICE OUTPUT 2 Initializes the GPIO XMC GPIO Init SLICEO OUTPUTOO amp OUTPUT strong sharp config XMC GPIO Init SLICEO OUTPUTO2 amp OUTPUT strong soft config e Configure ADC Queue Settings Initia
46. f External Events Control for CAN ADC USIC IO CCU4 8 ERU1 POSIF and so on 1 10 4 Global Start of CCU8 There is a way to get a synchronized start of CAPCOM Units both for CCU4x and CCU8x To achieve a synchronized start of both CAPCOM Units CCU4x and CCU8x use either e Aglobal start by software with the CCUx Global Start Control bits in the CCUCON Global Start Control register e Aglobalstart by hardware indirectly with External Events Control using the CC8yINS and CC8yCMC registers 1 10 5 Global Start of the CCU4 and CCU8 CAPCOM Units The Global Start command enables timers to be started independently of the CAPCOM unit they belong to The global start means that the timers are synchronized and all timing can be controlled in parallel with many different kinds of generated output patterns Application Note 14 V1 0 2015 07 Capture Compare Unit 8 CCU8 1 AP32288 In Ineon Introduction to the CCUS Basic Features CCUCON ee 1 SHE R CC40INS Select Considered Source Event Profiles CC40CMC This mechanism allows synchronous start of different timer slices within one CCU but also different slices from different CCUs DEV CCUS 00 StartTimer vsd Figure 11 External Event Control with Global Start Command Application Note 15 V1 0 2015 07 Capture Compare Unit 8 CCU8 AP32288 Infineon Dynamic Control of Timer Functions on Externa
47. fier amp g queue handle Configure a channel belonging to the aforesaid conversion kernel XMC VADC GROUP Channellnit g group identifier CHANNEL NUMBER amp g channel handle Configure a result resource belonging to the aforesaid conversion kernel XMC VADC GROUP ResultInit g group identifier RES REG NUMBER amp g result handle Set priority of NVIC node meant to be connected to Kernel Request source event NVIC SetPriority VADCO G0 0 IRQn IRQ PRIORITY Connect RS Event to the NVIC nodes XMC VADC GROUP ChannelSetEventInterruptNode g group identifier CHANNEL NUMBER XMC VADC SR GROUP SRO Enable IRQ NVIC EnableIRQ VADCO G0 0 IRQn Enable the analog converters XMC VADC GROUP SetPowerMode g group identifier XMC VADC GROUP POWERMODE NORMAL Perform calibration of the converter XMC VADC GLOBAL StartupCalibration VADC Add the channel to the queue XMC VADC GROUP QueueInsertChannel g group identifier g queue entry e Start Timer Running Get the slice out of idle mode XMC CCU8 EnableClock MODULE PTR SLICEO NUMBER Start the timer XMC CCU8 SLICE StartTimer SLICEO PTR Application Note 27 V1 0 2015 07 Capture Compare Unit 8 CCU8 1 AP32288 In Ineon Dynamic Control of Timer Functions on External Events 2 3 Example Use Case Generating a CCU8 TRAP with ADC Fast Com
48. g Figure 17 Boundary Flag in Fast Compare Mode The TRAP functionality allows the PWM outputs to react on the state of an input pin This functionality can be used to switch off the power devices if the TRAP input becomes active When a TRAP condition is detected at the selected input pin both the Trap Flag and the Trap State bit are set to 18 The Trap State is entered immediately by setting the CCU8xOUTy into the programmed PASSIVE state Timer CCtrap 5 Zero i Match TRPS E2AS TRPSE 1 CCU8x OUTy Figure 18 Trap Synchronization with PWM signal Compare Value It is also possible to synchronize the exiting of the TRAP state with the PWM signal as shown in Figure 18 This function is enabled when the bitfield CC8yTC TRPSE 18 2 3 2 Deriving the Period and Compare Values The clock relationship between fpwm fici and fecug is calculated as shown below e fugis the frequency of the CCU8 peripheral clock It is the input to the PWM module e fic is the timer resolution used to increment a timer counter Each timer slice supports a dedicated prescaler value selector In this example the default prescaler factor 0 This results in a prescaler value of 1 and a timer resolution of 8 33 ns Application Note 29 V1 0 2015 07 Capture Compare Unit 8 CCU8 AP32288 Dynamic Control of Timer Functions on External Events Infineon e In order for fpwm frequency of the PWM sign
49. he timer ERU1 CCU8xINy D Edge signal to capture into reg 0 amp 1 PRy POSIF CCUBKINY E Edge signal to capture into reg 2 amp 3 o CAN CCU8xINy G Level signal to gate the timer clock CCU4x CCUBXINy H Level signal to up down count direction Timer TRy USIC CCU8xINy J Edge signal to load the Timer CU8xINy K Ed ignal t nt event ADC CCU8xINy L ge signal to count events CCU8x CCU8xINy M Status bit override with an input value CRty CR2y CCU8xINy N Level signal to trap for fail safe op SCU CCU8xINy O CCU8xINy P Level signal to modulate the output z 0 2 Concatenation Logic Excluded DEV_CCU8_04_External_Events_Control_Principle vsd Figure 13 Principle Block Diagram illustrating External Event Control of a CCU8y Timer Slice 2 1 5 External Control by Timer Events A timer event can either trigger external actions via the Top Level Interconnect matrix or request for an Interrupt Each CAPCOM8 has four Service Request Lines and each slice has a dedicated output signal CC8ySR 3 0 selectable to a line via CC8ySRS This means timer slice events can request for direct peripheral actions or request an interrupt Application Note 17 V1 0 2015 07 Capture Compare Unit 8 CCU8 AP32288 Dynamic Control of Timer Functions on External Events 2 1 6 Top Level Control of Event Request to from a Timer Slice Infineon Top Level control also means conditional control of events requests between a slice
50. i DTRin Channel 1 DTR trigger DTF trigger DTHR DTiF i cigar Dead Time Active Passive Set Clear Generator 1 Control A External Events Timer TRy Switch fDcik Control Control Dead Time Multi Channel Control set clear DT2Rise DT2Fall Generator 2 DTR trigger DTF 7 Compare mgger DTR2n Channel 2 i XT L DT MS CCU8xOUTy2 t Output set clear Modulation CCST2 amp DTR2n CCU8xOUTy3 DEV CCUS8 00 Basics DeadTime principle vsd Status Bit 2 Contro aS LL Dead Time fteik fockk Control Figure9 Dead Time Generation Principles 1 9 1 CCUS8 Shadow Transfers Whatever the slice configuration whatever level of complexity whatever the signal patterns all the timer function parameters of the CAPCOMA timers are assured coherent update by hardware They are updated from values in the shadow registers that on a global preset request are transferred simultaneously to all function registers at a Period Match or One Match 1 9 2 Shadow Transfer of Compare Register values There is one global register GCSS carrying all enable flags that have to be preset by software to selectively activate the targeted Shadow Transfer Requests It is also cleared by hardware after the transfer to achieve total real time correctness The compare values that are targeted for an update operation have to be written into the CC8yCR1S CR2S shadow registers AND the corresponding Slice Transfer Set Enable
51. imer registers XMC CCU8 EnableShadowTransfer MODULE PTR XMC CCU8 SHADOW TRANSFER SLICE 0 Configure events Enable events Period Match and Compare Match Ch2 XMC CCU8 SLICE EnableEvent SLICEO PTR XMC CCU8 SLICE IRQ ID PERIOD MATCH XMC CCU8 SLICE EnableEvent SLICEO PTR XMC CCU8 SLICE IRQ ID COMPARE MATCH UP CH 2 Connect event to SRO and SR2 XMC CCU8 SLICE SetInterruptNode SLICEO PTR XMC CCU8 SLICE IRQ ID PERIOD MATCH XMC CCU8 SLICE SR ID 0 XMC CCU8 SLICE SetInterruptNode SLICEO PTR XMC CCU8 SLICE IRO ID COMPARE MATCH UP CH 2 XMC CCU8 SLICE SR ID 2 Eri T Configure NVIC Set priority NVIC SetPriority CCU80 0 IROn 63U Enable IRQ NVIC EnableIRQ CCU80 0 IRQn Initializes the GPIO XMC GPIO Init SLICEO OUTPUTOO amp OUTPUT strong sharp config Configure ADC Queue Settings Initialize the VADC global registers XMC VADC GLOBAL Init VADC amp g global handle Configure a conversion kernel XMC VADC GROUP Init g group identifier amp g group handle Configure the queue request source of the aforesaid conversion kernel Application Note 26 V1 0 2015 07 Capture Compare Unit 8 CCU8 1 AP32288 n n eon Dynamic Control of Timer Functions on External Events XMC VADC GROUP QueueInit g group identi
52. ion structure XMC CCU8 SLICE DEAD TIM i nable dead time channell nable dead time channel2 channell st path channell inv st path channel2 st path channel2 inv st path div channell st rising edg CONFIG t SLICE dt config counter channell st falling edge counter channel2 st rising edg counter channel2 st falling edge counter Application Note 1U OU TU 1U 0U 0U uint32 t XMC CCU8 SLICE DTC DIV 1 24U 200ns 12U 100ns 0U 0ns OU 0ns 45 V1 0 2015 07 Capture Compare Unit 8 CCU8 1 AP32288 In Ineon Multi Phase Output Pattern Generation XMC GPIO Configuration Configuration for A2 class pads Port0 2 0 3 0 4 0 5 XMC GPIO CONFIG t OUTPUT strong sharp config XMC GPIO MODE OUTPUT PUSH PULL ALT3 output level XMC GPIO OUTPUT LEVEL LOW output strength XMC GPIO OUTPUT STRENGTH STRONG SHARP EDGE mode h Configuration for Al class pads Port0 0 0 1 XMC GPIO CONFIG t OUTPUT strong soft config mode XMC GPIO MODE OUTPUT PUSH PULL ALT3 output level XMC GPIO OUTPUT LEVEL LOW output strength XMC GPIO OUTPUT STRENGTH STRONG SOFT EDGE h 3 2 6 Interrupt Service Routine Function Implementation The CCU80 interrupt handler function for period match or one match event In the interrupt routine the specific application code can be added as needed
53. k Level signal to up down count direction Edge signal to load the Timer Edge signal to count events Status bit override with an input value Level signal to trap for fail safe op Level signal to modulate the output EventO Detect O N Inputs 3 Events Control Connect Matrix Multi Channel Pattern Generation 2x Compl Outputs Status Bit Input Matrix Function Control by 16 External Event Sources PRy i Timer TRy ME CR1y CR2y DEV CCUS8 00 Basics External Events Control Komplex vsd Figure 12 Timer Slice Input Functions Control on External Events via the System Interconnect Matrix An external event control request can be an edge or level event signal from a peripheral unit or a GPIO It can be linked to the CCU8xCC8y slice s input selection stages via a comprehensive matrix A slice with any of its 3 Application Note 16 V1 0 2015 07 infi Capture Compare Unit 8 CCUS8 1 AP32288 In Ineon Dynamic Control of Timer Functions on External Events events setup detects a considered source event input profile and can be function controlled remotely this way 2 1 2 Selection of External Events Control Sources CCU8xCC8y Input Functions can be linked to external trigger requests from sources such as GPIO ERU POSIF C
54. l Events 2 Dynamic Control of Timer Functions on External Events 2 1 Introduction The External Events Control distribution to CCUs including CCU8 allows for advanced applications with synchronized timer control For example in Motor Drive and Power Control such as 3 Level Inverters requiring 12 synchronized PWMs 2 1 1 External Control Basics A slice can have its input functions controlled by external sources The external source s active mode s and input function s should be mapped to the 3 inputs of the slice in the CC8yINS and CC8yCMC registers Function mode extending alternatives can be added by selections in the CC8yTC Timer Slice Control register CCU8x xz0 1 Service DOR Period Shadow Register Edge Modula Request Lines tems g Period Register Si cta DMA Lines Active Slice y 8 Timer 16 bit Shot ad Reset Power y 0 3 x Asymmetr Dead time Control Prescaler M v pm Clock Control Prescaler 1 PWM 1 2 Selector END Event Source Select External Event Sources Up to 3 Events Profile Selectable Edge or Level Function of Inputs Select Timer Input Functions that may be controlled by the Events 0 1 or 2 Edge signal to start the timer Edge signal to stop the timer Edge signal to capture into reg 0 amp 1 Edge signal to capture into reg 2 amp 3 Level signal to gate the timer cloc
55. lice s status bit CC8yST on an edge event by other external input signal source Multi Channel Control The output state of Timer Slices PWM signal s can be controlled in parallel by a single pattern External Load Each slice of CCU8 allows the user to select an external signal as the trigger for reloading the timer value with current compare period register value Trap Function The function forces PWM output into a predefined state preset in the active passive PSL bit This allows the power device to be safely switched off 1 6 CCUS Input Control 1 6 1 Synchronized Control of CAPCOM Units on External Events External Events Control distribution to CCUs including CCU8 allows for synchronized timer control in advanced applications For example in Motor Drive and Power Control where 3 Level Inverters might require 12 synchronized PWM The limits are the realizable topography or timing pattern complexity range Application Note 8 V1 0 2015 07 Capture Compare Unit 8 CCU8 1 AP32288 In Ineon Introduction to the CCUS Basic Features 1 6 2 External Control Basics A slice can have its input functions controlled by external sources The external source s active mode s and input function s should be mapped to the3 inputs ofthe slice in the CC8yINS and CC8yCMC registers Function mode extension alternatives can be added by selections in the CC8yTC Timer Slice Control register 1 6 3 External Even
56. lize the VADC global registers XMC VADC GLOBAL Init VADC amp g global handle Configure a conversion kernel XMC VADC GROUP Init g group identifier amp g group handle Configure the queue request source of the aforesaid conversion kernel XMC VADC GROUP QueueInit g group identifier amp g queue handle Configure a channel belonging to the aforesaid conversion kernel XMC VADC GROUP Channellnit g group identifier CHANNEL NUMBER amp g channel handle Configure a result resource belonging to the aforesaid conversion kernel XMC VADC GROUP ResultInit g group identifier RES REG NUMBER amp g result handle Enable the analog converters XMC VADC GROUP SetPowerMode g group identifier XMC VADC GROUP POWERMODE NORMAL Set Group Fast Compare value XMC VADC GROUP SetResultFastCompareValue g group identifier RES REG NUMBER XMC VADC RESULT SIZE t FAST COMPARE VAL I cal Perform calibration of the converter XMC VADC GLOBAL StartupCalibration VADC Application Note 35 V1 0 2015 07 Capture Compare Unit 8 CCU8 1 AP32288 In Ineon Dynamic Control of Timer Functions on External Events Add the channel to the queue XMC VADC GROUP QueueInsertChannel g group identifier g queue entry e Start Timer Running Get the slice out of idle mode XMC CCU8 EnableClock MODULE PTR SLICEO NUMBER
57. lue registers split into 2 pairs that capture on the selected event control input CaptO or Capt1 according to 2 possible pair schemes either as 2 pairs for different events respectively to CaptO and Capt1 or cascaded for the same event via Capt1 CCU8x x 0 1 Service CC8y Period Shadow Register Edge ns al 4 Service A enter attern Request Lines Request o Period Register Align Control Generation Lines 3 DMA o Single E 2x Compl Outputs Slice y S Timer 16 bit Shot Control Status Bit Reset Power Y0 x Asymmetr Dead time Input Matrix Prescaler lt Compare Shadow Reg 1 2 A Control Floating PWM 1 2 3 x Input Function ED mpare Register 1 2 Selector y 16 External Clock Control Prescaler Compare Register 1 PWM 1 2 Event Sources DEV CCUS8 00 Basics Slice Capture vsd Figure5 Timer Slice with four Capture Registers Application Note 9 V1 0 2015 07 Capture Compare Unit 8 CCU8 1 AP32288 In Ineon Introduction to the CCU8 Basic Features Capture reg 3 Capture reg 2 Capture Inputs P 9 p g CCycapt Full Full Empty Capture on T8 Different ecua y CCycapt0 Capture Trigger Distribution amp Full Flag Handling Logic Capture reg 1 Capture reg 0 Capture reg 3 Capture reg 2 Capture Input CCycapt1 y Capture Trigge
58. n Control gt Active 2 Single Passive 8 Timer T82 IH Shot Control x Asymmetr Dead time lt Compare Shadow CR1S2 2S2 PWM 1 2 3x Input 431 CR12 CR22 PWM 1 2 Selector CC83 CC83SR 3 0 Slice y y 3 CC83PSC Timer Concatenation MCI1 3 0 PS1 CCU80MCSS CCU8xOUT1 3 0 CCU808T1 1A 1B Input Matrix CCUS8O0IN1 P A Multi Channel MCI2 3 0 PS2 CCU80MCSS CCU8xOUT2 3 0 Period Shadow PRS3 Edge Modula PR8 Center tion o 3 Align Control 2 Active 2 Single Passive d Timer T83 Shot Control x Asymmetr Dead time E Compare Shadow CR1S3 2S3 I ee PWM 1 2 3 x Input CR13 CR23 H PWM 1 2 Selector CCU80ST2 2A 2B Input Matrix CCUS80IN2 P A Interface to the System Top Level Interconnect Matrix Multi Channel MCI3 3 0 PS3 CCU80MCSS CCUS8XxOUTS 3 0 CCUS80STS3 3A 3B Input Matrix CCU8O0IN3 P A DEV CCUS8 00 Slices vsd Figure 3 1 4 CCUS Use Cases The Capture Compare unit basic system of CAPCOM8 Here are some typical example use cases that demonstrate the various capabilities of the CAPCOM timer slices of the CCU8 1 Simple Time Base with synchronization option by external events control 2 Power Conversion System PFC SMPS using Single Shot Mode
59. ned Mode or Period One Match in Center Aligned Mode 3 1 4 Compound Shadow Transfers Besides the Compare CR values there is also the timer Period register PR and the PWM output Active Passive control bit PSL that are updated simultaneously on the SySE flag The Dithering or Floating Prescaler values can also be simultaneous updated via the SyDSE and SyPSE request flags Shadow Transfer No Shadow No Shadow Shadow Transfer on Period Match on One Match and REquest is cleared by HW Transfer since Transfer since and REquest is No request No request cleared by HW Timer CC8y CC80CR18S 10 CC80CR1S 20 CC80CR2S 20 CC80CR2S 80 CC81CR18 30 CCBOCRI 10 CC81CR18 60 CC80CR2 20 CC81CR1 30 CC80CR1 20 CC80CR2 80 CC81CR1 60 Shadow transfer mechanism Coherent update of compare registers by HW SW can write asynchronously to the timer state After all values are updated the shadow transfer is requested by setting SySE At every Period Match or One Match event the HW can perform the transfer and clears the request DEV_CCU8_12_Multi_Channel_Mode_Shadow_Transfer_with_Compare_Registers vsd Figure 25 The Shadow Transfer Mechanism Center Aligned Mode Application Note 40 V1 0 2015 07 Capture Compare Unit 8 CCU8 1 AP32288 In Ineon Multi Phase Output Pattern Generation 3 2 Example Use Case CCUS Initialization for 3 Phase Motor Drive Space vector modulation
60. on Note V1 0 2015 07 Capture Compare Unit 8 CCU8 AP32288 Infineon Introduction to the CCUS Basic Features The CAPCOM8 RACK CCU81 CC80 CCU80rccag 4 Service Request Lines Slice y y 0 Prescaler Floating Prescaler Period Shadow Register Edge Modula A z t tion o Period Register Align Control 5 Active Q i Single Passive amp Timer T80 IS Shot Control x Asymmetr Dead time Compare Shadow Reg 1 2 PWM 1 2 3x Input Compare Register 1 2 PWM 1 2 Selector Timer Concatenation CC81 CC81SR 3 0 Slice y y 1 CC81PSC Period Shadow PRS1 PR1 Timer T81 AE Multi Channel Patterns Update Transfer Request 2x Compl Outputs Status Bits 0 OA OB Input Matrix Function Control Modula tion Control 4 x Capture Compare Shadow CR1S1 2S1 Active Passive Control PWM 1 2 CR11 CR21 d PWM 1 2 Dead time 3 x Input Selector Timer Concatenation CC82 CC82SR 3 0 Slice y y 2 CC82PSC by 16 External Event Sources Multi Channel Period Shadow PRS2 con Modula enter tion o PR2 Alig
61. pare All applications are defined with a set of operating conditions so that they function normally The usual way to achieve this is to monitor certain signals for example input voltages feedback current to ensure that the application is functioning within the boundary conditions set In this example based on XMC4500 we are using the VADC fast compare mode to monitor a signal input voltage to ensure that it does not exceed the upper boundary limits of 4000 that has been set Once this happens a boundary flag is set The boundary flag is used as an input for an external trap event Once the external trap event is triggered the output signals CCU80 OUTOO and CCU80 OUTO2 are set to passive output state The trap exit condition selected allows the trap to be exited automatically by hardware once the signal input voltage is within the boundary again CCU80 CC80 Period CV1 CV2 SLICE Configuration XMC4500 System Clock 120 MHz Frequency 24 kHz CV1 50 Duty Cycle CV2 50 Duty Cycle Mode Edge aligned Counting up CCU80 OUTOO CCUS80 OUTO2 1 ADC is set to Fast Compare Mode The boundary flag BFL reflects the result of the comparisons BFL is set Event 2 E2AS when it is above the fast comparevalue of 4000 VADC GOCH1 ADC BFL H2 On BFL a trap event is triggered and the PWM OUTOO is set to passive level POTENTIOMETER P14 1 3 BFL 0 when it goes below the fast compare
62. r Distribution amp Full Flag Handling Logic Full pend Full Empty Empty T8y gt CC8yC3V gt CC8yC2V Capture neu a on Same Event D eem and Edge Ly gt CC8yC gt CC8yCO Full Empty m gt Capture Trigger Distribution amp Full Flag Handling Logic Capture reg 1 Capture reg 0 DEV CCUS8 00 Capture Logic vsd Figure6 Basic Capture Mechanism setup in two possible scheme alternatives 1 8 CCU8 Output Control 1 8 1 External Control by Timer Events Atimer event can trigger external actions via the Top Level Interconnect matrix or on request for an Interrupt Each CAPCOM8 has four Service Request Lines and each slice has a dedicated output signal CC8ySR 3 0 selectable to a line by CC8ySRS This mean timer slice events can request direct peripheral actions or an interrupt 1 8 2 Top Level Control of Event Request to from a Timer Slice Top Level control also means conditional control of event requests between a slice and other action providers The Event Request Unit ERU1 and the Top Level Interconnect matrix can combine control and link event signals according to user defined request to action event patterns For example invoke I O states Time Windowing etc Application Note 10 V1 0 2015 07 Capture Compare Unit 8 CCU8 1 AP32288 n n eon Introduction to the CCUS Basic Features 1 9 Compare Basics CCU8x xz0 1
63. t32 t OU invert out3 uint32 t 1U prescaler initval uint32 t OU float limit uint32 t OU dither limit uint32 t OU timer concatenation uint32 t OU XMC CCU8 SLICE EVENT CONFIG t TRAP config mapped input XMC CCU8 SLICE INPUT I VADC GOBFLO edge XMC CCU8 SLICE EVENT EDGE SENSITIVITY NONE level XMC CCU8 SLICE EVENT LEVEL SENSITIVITY ACTIVE HIGH duration XMC CCU8 SLICE EVENT FILTER DISABLED Application Note 31 V1 0 2015 07 Capture Compare Unit 8 CCU8 AP32288 Infineon Dynamic Control of Timer Functions on External Events XMC GPIO Configuration Configuration for A2 class pads Port0 5 XMC GPIO CONFIG t OUTPUT strong sharp config mode XMC GPIO MODE OUTPUT PUSH PULL ALT3 output level XMC GPIO OUTPUT LEVEL LOW output strength XMC GPIO OUTPUT STRENGTH STRONG SHARP EDGE be Configuration for Al class pads Port0 10 XMC GPIO CONFIG t OUTPUT strong soft config mode XMC GPIO MODE OUTPUT PUSH PULL ALT3 output level XMC GPIO OUTPUT LEVEL LOW output strength XMC GPIO OUTPUT STRENGTH STRONG SOFT EDGE he XMC VADC Configuration Initialization data of VADC Global resources XMC VADC GLOBAL CONFIG t g global handle disable sleep mode control false clock config analog clock divider 3U msb conversion clock
64. ts Control An external event control request can be an edge or level event signal from a peripheral unit or a GPIO It can be linked to the CCU8xCC8y slices input selection stages via a comprehensive matrix A slice with any of its 3 events setups detects a considered source event input profile can be function controlled remotely this way 1 6 4 External Event Sources CCU8xCC8y Input Functions can be linked to external trigger requests from sources such as GPIO ERU POSIF CAN CCU4x USIC ADC CCU8x or SCU Pin Connections are given by the Top Level Interconnect matrix and the CC8yINS P A Input Select vector The CC8yCMC register is used for the function selection 1 6 5 External Event Input Functions There are 11 Timer Input Functions such as Start the Timer for example controllable by external events via 3 selectable input lines with configurable source event profile conditions to the Timer Slices CC8y y 0 3 of a CCU8x unit for Start Stop Capture0 3 Gate Up Down Load Count Bit Override Trap and Modulate Output control There are also some Extended Input Functions in the register CC8yTC for Extended Start Stop with Flush Start Flush Stop or Flush or Extended Capture Mode Together with a read access register ECRD these simplifyadministration of capture registers and full flags when more than one slice is used in Capture mode 1 7 Capture Basics Each CAPCOMB CCU8x has 4 timer slices Each slice has 4 capture va
65. ui oerte rrr rri eg n nri Ee rha PEn eO PEE TEN PR EN NnrU CERO 21 2 2 5 Interrupt Service Routine Function Implementation essere enne 24 2 2 6 Main Function Implementation sees eene ener nnn nennen ensis enne enis 25 2 3 Example Use Case Generating a CCU8 TRAP with ADC Fast Compare sse 28 2 3 1 Theon oFOpetation nitet etheeteietrasPreete Get et PRI De esee Ehe e EET EREMO CeRENR 28 Application Note 2 V1 0 2015 07 Capture Compare Unit 8 CCU8 1 AP32288 In Ineon Table of Contents 2 3 2 Deriving the Period and Compare Values vi icccisessisessssoncsteavsiscsurasevsensenscuvenssbscadtesewcansaxvescbvennoaveas 29 2 3 3 Macro and variable Settings cscessssscssessssscsssesececssecseeecesecseseeeesecaeeesesseceaeeseeseeeaecsesenesaeeaes 30 2 3 4 XMC Lib Peripheral Configuration Structure s ssssssssssssesesessssesrerssssssressssesesesesserrersrsssesenssese 30 2 3 5 Main Function Implementation csccssssssssscssssessecesecseesecesecseeesessecseeesesseceaeeaeeeceaecaeeeeesaeenes 34 3 Multi Phase Output Pattern Generation eee ee ee eee eee ee eee eese these eee eee sees este esee eee o ce 37 3 1 PREY CLIO NONE eats nests ET T D D E EEE RNE SEES 37 3 1 1 CCU8 Shadow Transfer for Coherent Signal Pattern Update sss 40 3 1 2 The Global Shadow Transfer Set Enable Register sess 40 3 1 3 Shadow Transfer of Compare Register
66. upt Service Routine Function Implementation The CCU80 interrupt handler function to update the duty cycle on channel 1 at every period match event Interrupt handler Period Match Interrupt Updates the PWM frequency as long as ADC conversion within boundary limits set void CCU80 0 IRQHandler void Acknowledge Period Match event XMC CCU8 SLICE ClearEvent SLICEO PTR XMC CCU8 SLICE IRQ ID PERIOD MATCH Application Note 24 V1 0 2015 07 Capture Compare Unit 8 CCU8 1 AP32288 In Ineon Dynamic Control of Timer Functions on External Events Set up new PWM value if ADC INBOUND XMC_CCU8 SLICE SetTimerCompareMatch SLICEO PTR XMC CCU8 SLICE COMPARE CHANNEL 1 CURRENT PWM XMC CCU8 EnableShadowTransfer MODULE PTR XMC CCU8 SHADOW TRANSFER SLICE 0 ADC INBOUND 0 The VADC interrupt handler function generates a channel event when the value is within the boundary limit defined Interrupt handler Channel Interrupt this is entered if the boundary set is in boundary limits set void VADCO GO 0 IROHandler void XMC VADC RESULT SIZE t result Read the result register result XMC VADC GROUP GetResult g group identifier RES REG NUMBER Clear result event XMC VADC GROUP ChannelClearEvent g group identifier CHANNEL NUMBER Set marker for PWM duty cycle update if ADC INBOUND CURR
67. utO0 uint32 t OU invert outl uint32 t 1U invert out2 uint32 t OU invert out3 uint32 t 1U prescaler initval uint32 t OU float limit uint32 t OU dither limit uint32 t OU timer concatenation uint32 t OU he XMC GPIO Configuration Configuration for A2 class pads Port0 5 XMC GPIO CONFIG t OUTPUT strong sharp config mode XMC GPIO MODE OUTPUT PUSH PULL ALT3 output level XMC GPIO OUTPUT LEVEL LOW output strength XMC GPIO OUTPUT STRENGTH STRONG SOFT EDGE XMC VADC Configuration Initialization data of VADC Global resources XMC VADC GLOBAL CONFIG t g global handle disable sleep mode control false clock config analog clock divider 3U OU arbiter clock divider 1U class0O conversion mode standard XMC VADC CONVMODE 12BIT sample time std conv 3U XMC VADC CONVMODE 12BIT sampling phase emux channel 3U classl msb conversion clock conversion mode emux Application Note 22 V1 0 2015 07 Capture Compare Unit 8 CCU8 AP32288 Infineon Dynamic Control of Timer Functions on External Events conversion mode standard sample time std conv conversion mode emux XMC VADC CONVMODE 12BIT 3U XMC_VADC_CONVMODE_12BIT sampling phase emux channel 3U data reduction control 0 wait for read mod true vent gen enabl false boundaryO
68. values eese enne 40 3 1 4 Compound Shadow Titan sens accesos S rHoE E pup DR IH REI PUN REEE PIER HOUR M Doer pda RE 40 3 2 Example Use Case CCU8 Initialization for 3 Phase Motor Drive eee 41 3 2 1 Theory of Operatiori 3 croi e Ere recreo Pe ut nad ee Eae Ie ERE CE RETE eve deals 42 3 2 2 Deriving the Period and Compare Values ccccsssscesesssesscesecseesseeseceeeesesseceaeeseeseeesecseeeneeaeenes 42 3 2 3 Dering the Dead TNA erireisid ERRARE VERE A QR EUR esiis Si iant 43 3 2 4 Macro and variable Settings ssssssssssesseseeeeeeee eese enne enne nn nennen nnne teen enne nennen 44 3 2 5 XMC Lib Peripheral Configuration Structure ssesssssssssssesesessssesrerssssssressssesesesesssrerstsssesenessese 44 3 2 6 Interrupt Service Routine Function Implementation eerte 46 3 2 7 Main Function Implementation ccsccssesssssscseeseesscesceseesscesecseesscesecseeeseeseceaeeeeeecesessesenseaeenes 46 4 Revision HIStOLy i oe eee o se e reo arae Pe Ea va ep e Eee ope Eee E ER SE Sa SEN EP NR ERE REESE S SERE SES EE EE REN SEHR PER SO ri PEN PATE 49 Application Note 3 V1 0 2015 07 Capture Compare Unit 8 CCU8 i AP32288 n n eon Introduction to the CCUS Basic Features 1 Introduction to the CCU8 Basic Features 1 1 CCUS Basics The CAPCOM8 is a multi purpose timer unit for signal monitoring conditioning and Pulse Width Modulation P
69. y DEV CCUS8 04 External Events Control Implementation vsd Figure 14 Block Diagram of the External Event Control Implementation Application Note 18 V1 0 2015 07 infi Capture Compare Unit 8 CCUS8 1 AP32288 In Ineon Dynamic Control of Timer Functions on External Events 2 2 Example Use Case Triggering an ADC Conversion to change CCU8 Duty Cycle In this example the CCU80 80 slice is configured in edge aligned mode with frequency 24 kHz and a 5096 duty on both channel 1 and 2 Each compare match event on channel 1 triggers an ADC Queue Conversion An ADC channel event is triggered if the conversion result is within the set boundary limits Upper boundary 4000 Lower boundary 1000 In the ADC channel event the ADC conversion result is saved and a software variable ADC_INBOUND is set This is used as a marker that an ADC conversion has occurred During a period match event if ADC INBOUND is set the duty cycle on channel 2 is updated This example is based on XMC4500 CCU80 CC80 Period SLICE Configuration XMC4500 System Clock 120 MHz Frequency 24 kHz CV1 updated based on ADC CV2 50 Duty Cycle Mode Edge aligned Counting up CV1 CV2 CMU2S 81 Compare Match while counting up on compare channel 2 triggers an ADC queue conversion A Channel event does not occur as the ADC result does is not within the boundary set PMUS CCU80 OUTOO

AP32288 - XMC1000/XMC4000 - Capture Compare Unit 8

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