JSP for LatticeMico32 User Manual v1.6.1
Contents
1. March 2008 12 ORIGIN OxXXXXXXXX Length YYYYYYYY XXXXXXXX The SRAM Start Address YYYYYYYY The SRAM Size 5 2 Installing the Exception Handler and Interrupt Handler 5 2 1 Installing the Exception Handler In the JSP there are two types of exception handlers 1 System exception handler 2 Task exception handler The following diagram lists the system exceptions in the LatticeMico32 Exception ID Condition Reset O0 Raised when the processor s reset pin is asserted Breakpoint 1 Raised when either a break instruction is executed or when a hardware breakpoint is triggered InstructionBusError 2 Raised when an instruction fetch fails typically due to the requested address being invalid Watchpoint 3 Raised when a hardware watchpoint is triggered DataBusError 4 Raised when a data access fails typically due to either the requested address being invalid or the type of access not being allowed DivideByZero 5 Raised when an attempt is made to divide by zero Interrupt 6 Raised when one of the processor s interrupt pins is asserted providing that the corresponding field in the interrupt mask IM CSR is set and the global interrupt enable flag IE IE is set SystemCall 7 Raised when a scall instruction is executed Note Users cannot install the system interrupt exception handler It will be installed automatically If the user attem2. read only data rodata ALIGN 4 _frodata _frodata_rom LOADADDR rodata rodata rodata gnu linkonce r March 2008 21 rodatal _erodata gt ebr read write data data ALIGN 4 _fdata data data gnu linkonce d datal SORT CONSTRUCTORS _gp ALIGN 16 0 7 0 sdata sdata gnu linkonce s _edata gt ebr bss bss ALIGN 4 _fbss dynsbss sbss sbss gnu linkonce sb scommon dynbss bss bss gnu linkonce b COMMON ALIGN 4 _ebss PROVIDE end gt sram first location in stack is highest address in PROVIDE fstack ORIGIN sram LENGTH sram 4 stabs debugging sections stab 0 Cstab stabstr 0 stabstr stab excl 0 stab excl stab exclstr 0 stab exclstr stab index 0 stab index stab indexstr 0 stab indexstr comment 0 comment DWARF debug sections Symbols in the DWARF debugging sections are relative to the beginning of the section so we begin them at DWARF 1 March 2008 22 debug 0 debug Jine 0 line GNU DWARF 1 extensions debug srcinfo 0 debug srcinfo debug sfnames 0 debug_sfnames DWARF 1 1 and DWARF 2 debug aranges 0 debug aranges debug pubnames 0 de
3. March 2008 3 2 The Software Environment Before you can build applications the software environment must be ready Here is a checklist for you to check the readiness of your software environment 1 The LatticeMico32 Development Tools are installed 2 The JSP source code and the hardware dependence code for LatticeMico32 are available 3 The hardware dependent code for LatticeMico32 is placed in the directory jspconfig 4 The C compiler is installed It can be one among the following three Microsoft Visual C 6 0 GCC BCC 5 The configurator is built If not follow the next steps to build the configurator If the Microsoft Visual C 6 0 is installed 1 Enter the directory jsp cfg vc project 2 Open the file configurator dsw with the Microsoft Visual C 6 0 3 Click the menu command build and select the option Batch Build 4 Select all projects to be built When completd the file cfg exe is generated in the directory jsp cfg If the GCC is installed 1 Enter the directory jsp cfg 2 Run the file Makefile If the BCC is installed 1 Enter the directory jsp cfg 2 Run the file Makefile bcc 4 How to Program Build and Debug Applications 4 Program Applications The Application source code composes of two parts 1 The configuration file cfg 2 The C file c and the include file h The file names of the C file and the configuration file must be th
4. read only data rodata ALIGN 4 frodata _frodata_rom LOADADDR rodata rodata rodata gnu linkonce r rodatal _erodata gt sram read write data data ALIGN 4 _fdata data data gnu linkonce d datal SORT CONSTRUCTORS _gp ALIGN 16 0 7 0 sdata sdata gnu linkonce s _edata gt sram bss bss ALIGN 4 _fbss March 2008 24 dynsbss sbss sbss gnu linkonce sb scommon dynbss bss bss gnu linkonce b COMMON ALIGN 4 _ebss PROVIDE end gt sram first location in stack is highest address in ram PROVIDE fstack ORIGIN sram LENGTH sram 4 stabs debugging sections stab 0 Cstab stabstr 0 stabstr stab excl 0 stab excl stab exclstr 0 stab exclstr stab index 0 stab index stab indexstr 0 stab indexstr comment 0 comment DWARF debug sections Symbols in the DWARF debugging sections are relative to the beginning of the section so we begin them at DWARF 1 debug 0 debug Jine 0 line GNU DWARF 1 extensions debug srcinfo 0 debug srcinfo debug sfnames 0 debug_sfnames DWARF 1 1 and DWARF 2 debug aranges 0 debug_aranges debug pubnames 0 debug pubnames DWARF 2 debug
5. Click Save and dismiss the Save Design panel 9 Click Exit 10 In the Project Navigator double click Generate Bitstream Data 6 4 How to Program the OS image jsp bin and the boot loader image boot bin to the flash Using the example project CFIFlashProgrammer include in the LatticeMico32 system to write the flash Following is the steps gt For details about the board refers to LatticeMico32 DSP Development board users guide and LatticeMico32 DSP Development Kit user s Guide for LatticeECP2 March 2008 18 Stepl Open the mico32 development system and build up one new project by click the menu File New Mico32 Managed Make Project Wizard and select the CFIFlashProgrammer in the option Select Project Templates File Edit LS rch Run 0 Ej iac c SS Tes has ene Cm T C C Projects 23 M New Project sj AEE outline 222 GI c An outline is not available Mico32 Managed Make Project Wizard EES Test 8 9 Binaries Mico32 Managed Make Project Wizard Setting A Includes EG uart E e uart c Project Name m S boot S 8 359 boot elf nonebe 19 9 boot o nonebe Location C ispTOOLS7_O examples Browse E n uart o nonebe i Makefile Select Target Hardware B M MSB System Browse Select Project Templates m Description This template demons
6. generated bitstream to the FPGA then the application is working 2 Flash External SRAM In this case you need to program a boot loader that loads the image from the flash to the external SRAM March 2008 15 The following example steps describe the flow facility 0x02000000 OS Image Run Externel SRAM jsp bin 0x2000000 0x20FFFFF Ox020FFFFF 0x04000000 Boot loader boot bin Flash 0x4000000 OxA1FFFFF 0x04080000 OS Image Store jsp bin Figure3 Image Distribution Chart Step 1 Build the OS image Because the OS image runs in the external SRAM The start address and length in the link file config lm32 ECP2 Im32elf 1d should be equal to that of the external SRAM Details refer to the Appendix6 6 About how to build the OS image refer to the Section 4 2 Build Applications Step 2 Program a boot loader that copy the OS image from the flash to the external SRAM After copying is complete the boot loader jumps to the external SRAM and continue to run The boot loader source code can be found in the directory src boot In the header file boot h the parameters are defined SRAM START ADDRESS The SRAM start address In the above example it s 002000000 SRAM SIZE The size of the SRAM In the above example it s 0x00100000 FLASH OS ADDRESS The start address where the OS image was stored in the flash The above example it s 0x040800
7. sns dpn Reference Dispatching Pending State C Language Yes ref sys Reference System State C Language No 2 9 Interrupt Management Functions Name Description API Implemented DEF_INH Define Interrupt Handler Static Yes def_inh Define Interrupt Handler C Language No ATT_ISR Attach Interrupt Service Routine Static No cre_isr Create Interrupt Service Routine C Language No acre_isr Create Interrupt Service Routine ID Number C Language No Automatic Assignment del_isr Delete Interrupt Service Routine C Language No ref_isr Reference Interrupt Service Routine State C Language No dis_int Disable Interrupt C Language Yes ena_int Enable Interrupt C Language Yes chg_ixx Change Interrupt Mask C Language No get_ixx Reference Interrupt Mask C Language No 2 10 Service Call Management Functions Name Description API Implemented DEF_SVC Define Extended Service Call Static No def svc Define Extended Service Call C Language No cal svc Invoke Service Call C Language No 2 11 System Configuration Management Functions Name Description API Implemented March 2008 DEF EXC Define CPU Exception Handler Static Yes def exc Define CPU Exception Handler C Language No ref cfg Reference Configuration Information C Language No ref ver Reference Version Information C Language No ATT INI Attach Initialization Routine Static Yes 3 Building the Development Environment 3 The Hardware Platform Before you can build ap
8. 00 OS IMAGE SIZE The size of the OS image It can be gotten from the OS image file March 2008 16 jsp bin The OS image jsp bin was stored from the address 0x4080000 in the flash The size of the image can be gotten from the OS image file jsp bin In the example the flash address is from 0x4000000 to 0x41 FFFFF If the flash address or size is changed the corresponding link file src boot boot ld need to be modified About how to build the boot loader image you can run the LatticeMico32 System SDK Shell firstly Then enter the directory src boot and type the command in the shell then boot bin generates under the src boot Step 3 Program the boot loader image boot bin and the OS image jsp bin to the flash Details please refer to Appendix6 4 Step 4 After successfully write the boot bin and jsp bin to the flash open the Hyper Terminal and set it correctly then Reset or re power_up the evaluation board the application is working March 2008 17 6 Appendix 6 1 Tested Boards List The porting JSP was tested on the following three board details please refer to the release package JSP for 1m32 v1 2 test e ECP2 LatticeMico32 DSP development board e ECP2M PCI express platform evaluation board e LatticeSC communications platform evaluation board 6 2 Example Platform Map The example platform is based on the LatticeMico32 DSP Development Board ECP2 Refer to the following tables for
9. 008 cre alm Create Alarm Handler C Language No acre alm Create Alarm Handler ID Number Automatic C Language No Assignment del alm Delete Alarm Handler C Language No sta alm Start Alarm Handler Operation C Language No stp alm Stop Alarm Handler Operation C Language No ref alm Reference Alarm Handler State C Language No Overrun Handlers Name Description API Implemented DEF Define Overrun Handler Static No def ovr Define Overrun Handler C Language No sta ovr Start Overrun Handler Operation C Language No stp ovr Stop Overrun Handler Operation C Language No ref ovr Reference Overrun Handler State C Language No 2 8 System State Management Functions Name Description API Implemented rot rdq Rotate Task Precedence C Language Yes irot rdq Rotate Task Precedence C Language Yes get tid Reference Task ID in the RUNNING State C Language Yes iget tid Reference Task ID in the RUNNING State C Language Yes loc cpu Lock the CPU C Language Yes iloc cpu Lock the CPU C Language Yes unl cpu Unlock the CPU C Language Yes iunl cpu Unlock the CPU C Language Yes dis dsp Disable Dispatching C Language Yes ena dsp Enable Dispatching C Language Yes sns ctx Reference Contexts C Language Yes sns loc Reference CPU State C Language Yes sns dsp Reference Dispatching State C Language Yes
10. Language Yes ref mpf Reference Fixed Sized Memory Pool State C Language No Variable Sized Memory Pools Name Description API Implemented CRE MPL Create Variable Sized Memory Pool Static No cre mpl Create Variable Sized Memory Pool C Language No acre mpl Create Variable Sized Memory Pool ID C Language No Number Automatic Assignment del mpl Delete Variable Sized Memory Pool C Language No get mpl Acquire Variable Sized Memory Block C Language No pget mpl Acquire Variable Sized Memory Block C Language No Polling tget mpl Acquire Variable Sized Memory Block with C Language No Polling rel mpl Release Variable Sized Memory Block C Language No ref mpl Reference Variable Sized Memory Pool State C Language No 2 7 Time Management Functions System Time Management Name Description API Implemented set tim Set System Time C Language Yes get tim Reference System Time C Language Yes isig tim Supply Time Tick C Language Yes Cyclic Handlers Name Description API Implemented CRE CYC Create Cyclic Handler Static Yes cre cyc Create Cyclic Handler C Language No acre cyc Create Cyclic Handler ID Number Automatic C Language No Assignment del cyc Delete Cyclic Handler C Language No sta cyc Start Cyclic Handler Operation C Language Yes stp cyc Stop Cyclic Handler Operation C Language Yes ref cyc Reference Cyclic Handler Operation C Language No Alarm Handlers Name Description API Implemented CRE ALM Create Alarm Handler Static No March 2
11. Lattice Semiconductor Corporation JSP for LatticeMico32 User Manual Version 1 6 March 2008 Table of Contents TABLE OF CONTENTS ee eee ergo bra pee e aee TETEE AREN Ea 2 L OVERVIEW 3 2 SYSTEM FUNCTIONS 3 2 1 TASK MANAGEMENT FUNCTIONS eerte hehehe nennen ee n ret sene rete ar een eas 3 2 2 TASK DEPENDENT SYNCHRONIZATION FUNCTIONS eee eee nenne 3 2 3 TASK EXCEPTION HANDLING 4 2 4 SYNCHRONIZATION AND COMMUNICATION FUNCTIONS eee 4 2 5 EXTENDED SYNCHRONIZATION AND COMMUNICATION FUNCTIONS 5 2 6 MEMORY POOL MANAGEMENT FUNCTIONS eee 6 2 TIME MANAGEMENT FUNCTIONS eere 6 2 8 SYSTEM STATE MANAGEMENT FUNCTIONS ssssecsecccccesssscseccccccceesseescescesees 7 2 9 INTERRUPT MANAGEMENT FUNCTIONS cccssecccccssscceesececceeesccsessucesseusessesees 7 2 10 SERVICE CALL MANAGEMENT FUNCTIONS ccccccccccccssssscescccccscessseeccescesensnees 7 2 11 SYSTEM CONFIGURATION MANAGEMENT FUNCTIONS ect 7 3 BUILDING THE DEVELOPMENT ENVIRONMEN T cccccccssssssssssssccccsses 8 3 1 THE HARDWARE PLATFORM 8 3 1 1 The HOST eite coe tee tr ret eee e deste vaste ree stet oc eds 3 1 2 The TARGEE idt et detect tite 8 3 2 THE SOFTWARE ENVIRONMENT cc
12. TASK PRIORITY STACK SIZE NULL include systask timer cfg include systask serial cfg Step 2 Create the file hello world c and copy the following content into the file This file defines the main body of the task Jeno en e AER E heltosworldig s ii oen Xf include t services h include kernel jsp kernel h void hello world task VP INT exinf for syslog printf Hello World n NULL sys puto _syscall dly_tsk 2 Step 3 Create the file hello_world h and copy the following content into the file ifndef HELLO_WORLD_H define HELLO_WORLD_H include t services h define TASK PRIORITY 5 define STACK SIZE 512 ifndef MACRO ONLY extern void hello world task VP INT exinf The macro TASK ID does not need to be defined It will be generated automatically in the build process The macro TA HLNG is defined in the file jsp include kernel h Refer to the uITRON4 0 Specification for more information about the task macro definition March 2008 10 4 2 4 3 Build Applications Before build the link file config lm32 ECP2 lm32elf 1d should be ready it decided by the image storage format Appendix6 5 and 6 6 lists two kinds of link file for the hello world example the following steps show you how to build applications Step 1 Copy the C file include file and the configuration file to the destination
13. bug pubnames DWARF 2 debug info 0 debug info gnu linkonce wi debug abbrev 0 debug abbrev debug line 0 debug line debug frame 0 debug frame debug str 0 debug str debug_loc 0 debug loc debug macinfo 0 debug macinfo SGI MIPS DWARF 2 extensions debug weaknames 0 debug weaknames debug funcnames 0 debug funcnames debug typenames 0 debug typenames debug varnames 0 debug varnames 6 6 Link file for store the image in flash and run in the sram Id Im32elf ld v 1 14 2007 07 27 11 28 44 honda Exp OUTPUT_FORMAT elf32 1m32 ENTRY reset This section defines memory attributes name origin length for the platform sram ORIGIN 0x02000000 LENGTH 1048576 SECTIONS code boot boot gt sram text ALIGN 4 _ftext text stub text gnu linkonce t gnu warning March 2008 23 KEEP init KEEP fini Exception handlers eh frame hdr KEEP eh_frame gcc except table Constructors and destructors KEEP crtbegin o ctors KEEP EXCLUDE FILE crtend o ctors KEEP SORT ctors KEEP ctors KEEP crtbegin o dtors KEEP EXCLUDE FILE crtend o dtors KEEP SORT dtors KEEP dtors KEEP jcr _etext gt sram 0
14. ccsssssceccccccssessssccescecseesssceccessesseussaesceseesees 9 4 HOW TO PROGRAM BUILD AND DEBUG APPLICATIONS 9 4 1 PROGRAM APPLICATIONS sscssccccccccesssssceccccccesesssscceccceseessssceeceesesseuaesesceseesees 9 4 2 BUILDiIAPPLIGA TIONS Poet ete ober ee eie docte e eeu eio ee e Eee eee dede 11 4 3 DEBUG APPEICATIONS t eterni a pha cR Pete deve 11 5 ADVANCED ISSUES ecco eireiee eH Ye eae es 12 5 1 CONFIGURATION ON DIFFERENT PLATFORMS 12 5 2 INSTALLING THE EXCEPTION HANDLER AND INTERRUPT HANDLER 13 5 2 1 Installing the Exception Handler eene 13 5 2 2 Installing the Interrupt Handler essent 14 5 2 3 OL eee im exerce i SI en e Deed 15 6 gt APPENDIX deem 18 6 1 TESTED BOARDS LIST 18 6 2 EXAMPLE PLATFORM 18 6 3 INITIALIZING THE MEMORY COMPONENT sssssseeccccccsssscseccecceseussssescceseeaes 18 6 4 How TO PROGRAM THE OS IMAGE JSP BIN AND THE BOOT LOADER IMAGE BOOT BIN TO THE EEASH Lien eat ei ee ere as dee qud 18 6 5 LINK FILE FOR STORE AND RUN THE IMAGE IN THE INTERNAL MEMORY 20 6 6 LINK FILE FOR STORE THE IMAGE IN FLASH AND RUN IN THE SRAM 23 March 2008 2 Overview The user manual describes how to develop a
15. directory The destination directory can be set as the jsp or the subdirectory under the jsp such as jsp test Step 2 Open the LatticeMico32 System Shell and enter the destination directory in the shell Step 3 Run the following command in the shell if the destination directory is jsp if the destination directory is jsp test The related directory in the application code should be modfied accordingly Five files kernel id h kernel cfg c kernel chk c Makefile depend and offset h will be generated Step 5 Run the following command in the shell This step generates the file jsp exe and jsp bin If some modification was made to the application code please go to run Step 4 and Step5 Debug Applications The following steps show you how to debug applications Step 1 Open the LatticeMico32 System shell and type the following command in the shell the shell Step 2 Open another LatticeMico32 System shell and enter the destination directory type the following command to enter the GDB debug environment Step 3 Enter the GDB debug environment and link to the target board by entering the following command in the GDB debug environment March 2008 11 Step 4 Load the image to the target board by entering the following command in the GDB debug environment Step 5 The application can be debugged now Refer to the GDB User Manual for details of the GDB usage 5 Advanced Issues 5 1 Configuratio
16. e flashprog bin copy the boot bin to the CFIFlashProgrammer project root directory and rename the boot bin to flashprog bin then open the flashprog txt and modify the two lines the first line was modified to 0x04000000 according to the Figure3 the second line was updated to 768 bytes according to the size of the boot bin Step6 Go to Step4 Repeat the step5 step6 and step4 can write many images to the target flash many times as you like 6 5 Link file for Store and Run the image in the internal memory Id Im32elf ld v 1 14 2007 07 27 11 28 44 honda Exp OUTPUT FORMAT elf32 1m32 March 2008 20 ENTRY reset This section defines memory attributes name origin length for the platform ebr ORIGIN 0x00100000 LENGTH 32768 sram ORIGIN 0x00200000 LENGTH 1048576 SECTIONS code boot boot gt ebr text ALIGN 4 _ftext text stub text gnu linkonce t gnu warning KEEP init KEEP fini Exception handlers eh frame hdr KEEP eh_frame gcc except table Constructors and destructors KEEP crtbegin o ctors KEEP EXCLUDE FILE crtend o ctors KEEP SORT ctors KEEP ctors KEEP crtbegin o dtors KEEP EXCLUDE_FILE crtend o dtors KEEP SORT dtors KEEP dtors KEEP jcr etext ebr 20
17. e same In the configuration file the function can only be invoked with API that is marked Static in the function tables introduced in the previous sections Configuration information is usually defined in the file and includes the following sections Task ID Task Attribute Task Start address Task Initial Priority Task Stack Size Exception Handler Interrupt Handler 3 The JSP source code can be downloaded from the TOPPERS JSP official web http www toppers jp en index html March 2008 9 In the C file you can write the main body of those tasks that are defined in the configuration file The macro used for the configuration file is defined in the include file Also the function definition about the task must be included in the include file Insert the definition of the task function between the line ifndef MACRO ONLY and the line endif in the include file The following example helps you understand it better The example when implemented prints the string Hello World to the UART every 2 seconds To implement the example follow these steps Step 1 Create a configuration file with the name hello world cfg Copy the following content into the configuration file e e es ay hello world cfg define MACRO ONLY include hello world h INCLUDE hello_world h CRE TSK TASK ID TA HLNG TA ACT NULL hello world task
18. el flg Delete Eventflag C Language No set flg Set Eventflag C Language Yes iset flg Set Eventflag C Language Yes clr fig Clear Eventflag C Language Yes wai flg Wait for Eventflag C Language Yes pol fig Wait for Eventflag Polling C Language Yes twai flg Wait for Eventflag with Timeout C Language Yes ref flg Reference Eventflag Status C Language No Data Queues Name Description API Implemented CRE DTQ Create Data Queue Static Yes cre dtq Create Data Queue C Language No acre dtq Create Data Queue ID Number Automatic C Language No Assignment del dtq Delete Data Queue C Language No snd dtq Send to Data Queue C Language Yes psnd dtq Send to Data Queue Polling C Language Yes March 2008 2 5 ipsnd dtq Send to Data Queue Polling C Language Yes tsnd dtq Send to Data Queue with Timeout C Language Yes fsnd dtq Forced Send to Data Queue C Language Yes ifsnd dtq Forced Send to Data Queue C Language Yes rcv dtq Receive from Data Queue C Language Yes prcv dtq Receive from Data Queue Polling C Language Yes trev_dtq Receive from Data Queue with Timeout C Language Yes ref_dtq Reference Data Queue State C Language No Mailboxes Name Description API Implemented CRE MBX Create Mailbox Static Yes cre mbx Create Mailbox C Language No acre mbx Create Mai
19. info 0 debug info gnu linkonce wi debug abbrev 0 debug abbrev debug line 0 debug line debug frame 0 debug frame debug str 0 debug str debug_loc 0 debug loc debug macinfo 0 debug macinfo SGI MIPS DWARF 2 extensions debug weaknames 0 debug weaknames debug funcnames 0 debug funcnames debug typenames 0 debug typenames debug varnames 0 debug varnames March 2008 25 Page 8 Y F Zhao1 Group the diagram Page 14 Y F Zhao2 The diagram is not grouped Group the diagram
20. is 32 March 2008 14 5 2 3 In the JSP for LatticeMico32 the timer have occupied two interrupt numbers Therefore the interrupt number left for the user is 30 The default interrupt number of the timer is 0 The default interrupt number of the UART is 1 In the JSP for LatticeMico32 the interrupt handler of low priority tasks can be preempted by that of a high priority task Smaller interrupt number means higher interrupt priority Add the following definition in the configuration file to install the system exception handler DEF INH INHNO DEV TA HLNG dev intr handler INHNO DEV Device Interrupt Number dev intr routine Interrupt handler for the device Boot As mentioned before the storage component can be one of the following components 1 Internal RAM only In this case before building the images the starting address and size in the link file should be modified details please refer to the Appendix6 5 then build the OS image refer to the Section 4 2 Build Applications About how to program the binary file to the Internal RAM refer the following example steps Step1 Open the LatticeMico32 System Cygwin Shell and enter the test destination directory Step2 Run the following command in the shell bin to verilog EB width 4 jsp bin EBR mem Step3 Use the generated memory initialization file EBR mem to initialize EBR in FPGA Details see the Appendix6 3 Step4 Use the ispVM download the
21. lbox ID Number Automatic C Language No Assignment del mbx Delete Mailbox C Language No snd mbx Send to Mailbox C Language Yes rcv mbx Receive from Mailbox C Language Yes prev_mbx Receive from Mailbox Polling C Language Yes trev_mbx Receive from Mailbox with Timeout C Language Yes ref_mbx Reference Mailbox State C Language No Extended Synchronization and Communication Functions Mutexes Name Description API Implemented CRE_MTX Create Mutex Static No cre_mtx Create Mutex C Language No acre_mtx Create Mutex ID Number Automatic C Language No Assignment del_mtx Delete Mutex C Language No loc_mtx Lock Mutex C Language No ploc_mtx Lock Mutex Polling C Language No tloc_mtx Lock Mutex with Timeout C Language No unl_mtx Unlock Mutex C Language No ref_mtx Reference Mutex State C Language No Message Buffers Name Description API Implemented CRE_MBF Create Message Buffer Static No cre_mbf Create Message Buffer C Language No acre_mbf Create Message Buffer ID Number C Language No Automatic Assignment del mbf Delete Message Buffer C Language No snd mbf Send to Message Buffer C Language No psnd mbf Send to Message Buffer Polling C Language No tsnd mbf Send to Message Buffer with Timeout C Language No rcv mbf Receive from Message Buffer C Language No prev_mbf Receive from Message Buffer Polling C Language No trcv mbf Receive from Message Buffer with Timeout C Language No ref mbf Reference Message Buffer State C Language No Rendezvous Na
22. me the file name jsp bin to flashprog bin 2 Create one text file named flashprog txt in project root directory the content of the text file as following 0x4080000 31764 March 2008 19 Step4 Select the Run gt Run in the LatticeMico32 system GUI A window named Run will show and double click the mico32 hardware set the Project and C C Application in the tab Main Click the button Run the console terminal shows you the flash write is done Following is the captured picture Debug crtOram S Eclipse Platform File Edit Refactor Navigate Project Tools Run Window Help Ey Bacice Debug 18 crtoram s 2 B flashprog txt CFIFlashPrgmr c O 2 LatticeMico32 C startup code Redist ribution and use in source binary forms with or without T Tasks terminated cfi flash 1 mico32 hardware Im32 elf gdb 08 2 29 r6 01 Transfer rate 29618 bits sec 510 bytes write Info Flash programmer does not back up flash data as default Info To enable backup prior to erasing writing to flash please define FLASH PROGRAMMER SAVE DATA preprocessor definition and recompile FlashProgrammer programming flash with new data 31764 total bytes at offset 0x80000 lerasing sector at offset 0 80000 done erasing affected sectors starting to write total 31764 bytes Note each dot represents 4096 bytes Step5 Delete th
23. me Description API Implemented CRE POR Create Rendezvous Port Static No cre por Create Rendezvous Port C Language No acre por Create Rendezvous Port ID Number C Language No Automatic Assignment del por Delete Rendezvous Port C Language No cal por Call Rendezvous Port C Language No tcal por Call Rendezvous Port with Timeout C Language No March 2008 _ Accept Rendezvous C Language No pacp por Accept Rendezvous Polling C Language No tacp por Accept Rendezvous with Timeout C Language No fwd por Forward Rendezvous C Language No rpl rdv Terminate Rendezvous C Language No ref por Reference Rendezvous Port State C Language No ref rdv Reference Rendezvous State C Language No 2 6 Memory Pool Management Functions Fixed Sized Memory Pools Name Description API Implemented CRE MPF Create Fixed Sized Memory Pool Static Yes cre mpf Create Fixed Sized Memory Pool C Language No acre mpf Create Fixed Sized Memory Pool ID Number C Language No Automatic Assignment del mpf Delete Fixed Sized Memory Pool C Language No get mpf Acquire Fixed Sized Memory Block C Language Yes pget mpf Acquire Fixed Sized Memory Block Polling C Language Yes tget mpf Acquire Fixed Sized Memory Block with C Language Yes Timeout rel mpf Release Fixed Sized Memory Block C
24. n on Different Platforms Because the SOC System on Chip can be modified the platform may accordingly have different configurations Here is a list of possible different configurations 1 The clock of the target CPU is variable 2 The target board UART baud rate used to communicate with the PC is different from the default 3 The UART registers start address or Timer registers start address of the target board is different from the default 4 The target board SRAM start address or size is different from the default The configuration of the target board can be found in the header file Ssp config Im32 ECP2 1m32 h Here is an example of the header file 1m32 h define MICO32 CPU CLOCK HZ 25000000 define DEFAULT UART BAUDRATE 115200 define TIMER BASE REG 0x80000100 define UART1 BASE REG 0x80000180 ee bso SS ahh Se ee te When the following configuration of the target board is different from the default you can modify the corresponding definition in the file Im32 h CPU Clock UART Baud rate UART Registers Start Address Timer Registers Start Address If the SRAM start address or size needs to be modified you can edit the link file Ssp config Im32 ECP2Um32elf Id Here is an example of the link file lm32elf ld MEMORY sram ORIGIN 0x00100000 LENGTH 131072
25. plications the hardware platform must be established In general the embedded hardware platform composes of two parts the HOST and the TARGET The following diagram illustrates the basic composition of the hardware platform Target Board 3 1 1 HOST TARGET Figurel System development platform The HOST Here are the steps that needs to be accomplished on the host 1 Build the JSP kernel image for the target LatticeMico32 Development Board 2 Download the JSP kernel image to the target board through the JTAG port 3 Observe that the debug information are displayed on the target board through the UART port The TARGET On the target side run the image Send the information to the host or receive the input from the host through the UART port Make sure that the following components are included in the target board Timer UART Storage Component Internal RAM External SRAM FLASH There are two possible configurations of the storage component If the internal RAM is large enough to accommodate the kernel image the storage component will be the internal RAM only Otherwise the image must be stored in the flash and run in an external SRAM In this case the storage component must include the external SRAM and the flash For more details on how to build the platform refer to LatticeMico32 Development Kit User s Guide for LatticeECP LatticeMico32 Development Kit User s Guide for LatticeECP2
26. pplications on the JSP kernel for the LatticeMico32 The TOPPERS JSP is a royalty free open source embedded real time operation system developed by the TOPPERS Project JSP is an acronym for Just Standard Profile and as the name shows is implemented in accordance with the pITRON4 0 specification standard profile regulation The LatticeMico32 is a configurable 32 bit soft processor core for Lattice Field Programmable Gate Array FPGA devices By combining a 32 bit wide instruction set with 32 general purpose registers the LatticeMico32 provides the performance and flexibility suitable for a wide variety of markets including communications consumer computer medical industrial and automotive With separate instruction and data buses this Harvard architecture processor allows for single cycle instruction execution as the instruction and data memories can be accessed simultaneously Additionally the LatticeMico32 uses a Reduced Instruction Set Computer RISC architecture thereby providing a simpler instruction set and faster performance This manual is targeted to the software programmers who are interested in developing JSP applications for the LatticeMico32 2 System Functions The JSP system functions are listed in the following tables And C library is not be implemented 2 Task Management Functions Name Description API Implemented CRE TSK C
27. pts to replace the system interrupt exception handler with a customized handler it will prevent the system interrupt handler to be properly installed March 2008 13 Task 5 2 2 The following diagram describes the relationship between the system exception handler and task exception handler Figure2 Task Exception Handler Y F Zhao ll dq QU d ce System Exception Handler Exception Occurs The system exception handler 15 only one to handle all system exceptions Whereas each task owns an independent task exception handler When an exception occurs during task running the system exception handler be executed first After the system exception handler has finished execution the task exception handler of the current running task starts to run For the JSP add the following definition in the configuration file to install the system exception handler DEF EXC SYS EXC ID TA HLNG sys exc handler SYS EXC ID System Exception ID Sys exc handler System exception handler name that must be implemented in the C file Add the following definition in the configuration file to attach the task exception handler to the task DEF TEX TASK ID TA HLNG tsk exc routine TASK ID Task ID attached tsk exc routine Task exception handler name that must be implemented in the C file Installing the Interrupt Handler In the LatticeMico32 system the maximum interrupt number
28. reate Task Static Yes cre tsk Create Task C Language No acre tsk Create Task ID Number Automatic C Language No Assignment del tsk Delete Task C Language No act tsk Activate Task C Language Yes iact_tsk Activate Task C Language Yes can_act Cancel Task Activation Requests C Language Yes sta_tsk Activate Task with a Start Code C Language No ext_tsk Terminate Invoking Task C Language Yes exd_tsk Terminate and Delete Invoking Task C Language No ter_tsk Terminate Task C Language Yes chg_pri Change Task Priority C Language Yes get_pri Reference Task Priority C Language Yes ref_tsk Reference Task State C Language No ref_tst Reference Task State Simplified Version C Language No 2 2 Task Dependent Synchronization Functions Name Description API Implemented slp_tsk Put Task to Sleep C Language Yes tslp_tsk Put Task to Sleep with Timeout C Language Yes wup_tsk Wakeup Task C Language Yes iwup_tsk Wakeup Task C Language Yes For details on system functions refer to the uITRON4 0 Specification In the JSP the functions defined in the uITRON4 0 Specification are implemented March 2008 3 can wup Cancel Task Wakeup Requests C Language Yes rel wai Release Task from Waiting C Language Yes irel wai Release Task from Waiting C Language Yes sus tsk Suspend Ta
29. settings of the platform memory map Boot from Flash Component From End Size byte Interrupt Number External Sram 0x02000000 0x020FFFFF 0x00100000 N A Flash 0x04000000 OxO5FFFFFF 0x02000000 N A Timer 0x80000100 0x8000017F 0x00000080 0 Uart 0x80000180 0x800001FF 0x00000080 T Boot from Internal RAM EBR Component From End Size byte Interrupt Number EBR 0x00100000 0x00107FFF 0x00008000 N A External Sram 0x00200000 0x002FFFFF 0x00100000 N A Timer 0x80000100 0x8000017F 0x00000080 0 Uart 0x80000180 0x800001FF 0x00000080 1 6 3 Initializing the Memory Component Now you load the memory initialization file into a placed and routed FPGA bitstream To implement the mem file in an ispLEVER design 1 In ispLEVER double click Place amp Route Design 2 In the Project Navigator toolbar choose Tools Memory Initialization Tool or click or double click Memory Initialization in the Processes for Current Source window of the Project Navigator 3 Click Load browse to the ncd file or type its name in the File Name box and click Open 4 In the EBR Memories in Design panel select OCM ram where OCM is the name of the on chip memory component from the LatticeMico32 platform 5 Ensure that Memory Format is set to HEX 6 In the Memory File box browse to and select the on chip memory initialization mem file created by LatticeMico32 7 Click Apply Change 8
30. sk C Language Yes rsm tsk Resume Suspended Task C Language Yes frsm tsk Forcibly Resume Suspended Task C Language Yes dly tsk Delay Task C Language Yes 2 3 Task Exception Handling Functions Name Description API Implemented DEF TEX Define Task Exception Handling Routine Static Yes def tex Define Task Exception Handling Routine C Language No ras tex Raise Task Exception Handling C Language Yes iras tex Raise Task Exception Handling C Language Yes dis tex Disable Task Exceptions C Language Yes ena fex Enable Task Exceptions C Language Yes sns tex Reference Task Exception Handling State C Language Yes ref tex Reference Task Exception Handling State C Language No 2 4 Synchronization and Communication Functions Semaphores Name Description API Implemented CRE SEM Create Semaphore Static Yes cre sem Create Semaphore C Language No acre sem Create Semaphore ID Number Automatic C Language No Assignment del sem Delete Semaphore C Language No sig sem Release Semaphore Resource C Language Yes isig sem Release Semaphore Resource C Language Yes wai sem Acquire Semaphore Resource C Language Yes pol sem Acquire Semaphore Resource Polling C Language Yes twai sem Acquire Semaphore Resource with Timeout C Language Yes ref sem Reference Semaphore State C Language No Eventflags Name Description API Implemented CRE FLG Create Eventflag Static Yes cre flg Create Eventflag C Language No acre flg Create Eventflag ID Number Automatic C Language No Assignment d
31. trates programming CFI flash device The time taken to program the flash depends on the amount of data and can be rather slow for large data over JTAG connection This template supports those CFI flash devices DD that are supported by LatticeMico32 CFI flash Exin driver It serves as a starting point to zi customize flash programming solutions Applicable preprocessor definitions FLASH PROGRAMMER SAVE DATA Writable Smart Insert Step2 Build the project successfully and the elf file is generated Step3 Two files flashprog bin and flashprog txt should be added to the project root directory flashprog bin The image you want to write to the flash Binary data must be contained in a binary file named flashprog bin and binary datafile containing the data for programming must be a multiple of 4 bytes flashprog txt a text file must contain two lines the first line must contain the absolute flash address where the data needs to be programmed and the second line must contain the size of image to program specified as bytes Flash address where the binary data want to be programmed is expected to be aligned on a word 4 bytes boundary For example According to the Figure3 assume to program the OS image jsp bin to the flash address 0x04080000 file size is 31764 bytes 1 Copy the jsp bin to the CFIFlashProgrammer project root directory and rena
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