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EVBUM2132 - ON Semiconductor

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1. basic voltage waveforms demonstrate the operation of the converter at specific conditions Figure 6 shows in top trace the gate driver voltage and in bottom trace primary switch s drain voltage at full load Tek Run Trig d l00V EJEA oops ENI oe 5 00 V Figure 6 Gate Driver and Drain Voltage at Full Load Figure 7 shows the same measurement points as in Figure 6 but at medium load condition when the first valley of the drain voltage is being skipped Tek Run Trig d a sini ETEA OE Ei Chr F Figure 7 Gate Driver and Drain Voltage at Medium Load Figure 8 is the same as previous measurements but for light load condition when two valleys are skipped Tek Run novsinnscinnseiocssinosnsesniosnsisensisonsionses mienen SE ETE E E E N AE E A TE DN E TEE DAN ES DE A TEA PAA TER BE OOI E TA T ei mares men IF 100 V Learned OOS A chi f 5 00V Figure 8 Gate Driver and Drain Voltage at Light Load The cycle skipping operation when the output load is very light is depicted in Figure 9 Tek STOP H mininin ral i ETE iz nal an Figure 9 Gate Driver and Drain Voltage during the Cycle Skipping at Very Light Load The waveforms during overload condition is depicted in Figure 10 Tek Stop eee a ee 2 34 PRE aR TEET 2E LEE A DE OY EN SA AR TEE EE OR Ca Pt TY SO vO SA BW CAR RO SR hannah cna 5 00 V GE 200mvV 4 Figure 10 Gate Driver and Drain Voltage during the Ov
2. A 52 5 mm2 The N67 ferrite material allows to use maximum operating flux density Brae 023 The number of turns for the primary winding is n Vbuk min ton _ 255 4 18 10 8 P Bmax Ae 0 25 52 5 10 6 eq 9 80 turns The primary inductance can be calculated as follows V bulk mi 255 Ly m toy 4 18 107 p lok ON 0 635 eq 10 1 68 mH The Ay factor of the transformer s core can be calculated as follows L 10 3 np 80 C13 1nF Y1 10 L2 bat Fei 15 uH Mg C7 C8 oe 4 7 nF 470 uF oa 713 T2 4 23N z i e 3 os Se IRF2807 e 470 C6 s 1nF R7 100 3 Q2 Q3 BC238 BC238 STP4NB80 apart Q4 BC308 R5 1 5 ISO1 4 PC817 IC2 TL431BILP Figure 1 Schematic Diagram of the QR 24 W AC DC Converter with NCP1207 and Synchronous Rectifier http onsemi com 2 NCP1207AADAPGEVB Since skin effect and eddy currents play a significant role in the Flyback topology at given switching frequency the Litz wire is used It consists of 4 wires each with diameter 0 12 mm To reduce the leakage inductance the primary winding is split to two windings each with half number of turns The secondary winding is inserted between those halves primary windings This is well known as a sandwich arrangement For an output voltage of 12 V the number of turns of the secondary winding can be calculated accounting for synchronous rectifier as follows Vs 1 max Mp 12 1 0 34 80
3. NCP1207AADAPGEVB Implementing NCP1207 in QR 24 W AC DC Converter with Synchronous Rectifier Evaluation Board User s Manual Introduction The NCP1207 is a controller dedicated for driving the current mode free running quasi resonant Flyback offline converter This converter is designed for consumer products like notebooks offline battery chargers consumer electronics DVD players set top boxes TVs etc The growing interest for EMI pollution reduction efficiency improvement and maximum safety has been taken into account while designing the NCP1207 By implementing the NCP1207 one can build a power supply that can meet all those requirements This can be achieved with help of the following NCP1207 main features e Current mode Control Cycle by cycle primary current observation is helping to prevent any significant primary overcurrent which would cause transformer s core saturation and consequent serious power supply failure e Critical Mode Quasi resonant Operation Prevents the converter operation in Continuous Conduction Mode in any input and output condition It is provided by the zero crossing detection of the auxiliary winding s voltage By addition of the reasonable delay the switch turn on instant can be shifted to the minimum valley of drain voltage This improves EMI noise and efficiency Dynamic Self supply Ensures IC proper operation in applications where the output voltage varies during ope
4. ORMATION LITERATURE FULFILLMENT Literature Distribution Center for ON Semiconductor P O Box 5163 Denver Colorado 80217 USA Phone 303 675 2175 or 800 344 3860 Toll Free USA Canada Fax 303 675 2176 or 800 344 3867 Toll Free USA Canada Email orderlit onsemi com N American Technical Support 800 282 9855 Toll Free ON Semiconductor Website www onsemi com USA Canada Europe Middle East and Africa Technical Support Phone 421 33 790 2910 Japan Customer Focus Center Phone 81 3 5817 1050 Order Literature http www onsemi com orderlit For additional information please contact your local Sales Representative EVBUM2132 D
5. Sna Nerea 0 34 255 7 3 8 turns The secondary winding is again made with Litz wire It consists in 24 wires featuring a diameter of 0 22 mm Using the above number of turns the auxiliary winding derived Ns eq 12 5 _ Vaux Vwo _ 2 1 AUX V p 8 67 9 turns A single wire of 0 15 mm diameter was used for the auxiliary winding The windings arrangement of the transformer is the following 1 Auxiliary 2 1st Half Primary 3 Secondary 4 2nd Half Primary eq 13 Primary Current Control Primary current control path consist in the sensing resistor R5 skipping resistor R4 and pin 3 of the IC named CS The maximum voltage threshold on CS pin is about 1 V The value of the current sense resistor R5 is therefore given by R StH may 1 ppk The skipping resistor R4 value together with the internal 200 uA current source gives the skipping voltage level It is decided to set the skipping level to 20 of the maximum primary current In this case the skipping voltage is 0 2 V The value of the skipping resistor R4 is then 1 57 Q 1 50 0 635 e918 Vos skip _ 0 2 R ee 4 J 200 10 6 1Q eq 15 Demagnetization Detection and OVP The transformer demagnetization sensing is based on the zero crossing detection of the auxiliary winding s voltage For this purpose the zero crossing detector built in the NCP1207 is connected to pin 1 Resistor R1 limits the current flowing thr
6. angement can be seen in Figure 3 The keep all high frequency current loop and high voltage areas board size is 97 5 x 44 mm ON Semiconductor pp 24W AC DC Power Supply Figure 3 Printed Circuit Board Layout Silkscreen Component Side http onsemi com 5 NCP1207AADAPGEVB Practical Results corresponding graphical representation of the Table 3 can be One of the most important parameters considered during seen in Figure 4 Table 4 lists similar results for the the converter design is the overall power conversion maximum specified input voltage of 339 VDC Figure 5 efficiency For this reason the synchronized output rectifier again helps to see the results belonging to Table 4 The was utilized Table 3 lists the measured results for converter no load power consumption measured at 255 VDC input working at minimum specified input voltage 255 VDC The voltage is about 275 mW and at 339 VDC is about 385 mW Table 3 POWER CONVERSION EFFICIENCY Table 4 POWER CONVERSION EFFICIENCY AT 255 VDC INPUT VOLTAGE AT 339 VDC INPUT VOLTAGE ee E 0 a o o D AA P 7tT tt tt pi7T tt pf pt tT te tT tT te et EFFICIENCY Q gt O Z WW QO L L Li 0 5 10 15 20 25 OUTPUT POWER W OUTPUT POWER W Figure 4 Power Conversion Efficiency at 255 VDC Figure 5 Power Conversion Efficiency at 339 VDC Input Voltage Input Voltage http onsemi com 6 NCP1207AADAPGEVB The following pictures of the
7. eq 19 17860 Q 18 kQ The resistor R10 ensures the minimum current supply of 1 0 mA for TL431 in case of the converter operation near to the maximum output power when current flowing through the LED diode within the Optocoupler ISO1 is close to zero The threshold voltage of the LED being around 1 0 V the value of R10 is R Vie i 1 kQ eq 20 lTL431 1 The resistor R9 limits the current flowing through the LED in case the voltage across the output terminal of the TL431 is at its minimum e g 2 5 V Considering the nominal output voltage 12 V and a maximum LED current of 10 mA the value of R9 is Vout a VieD Viasi Fs OU St LED max eq 21 2S 25 S oe 850 Q 1 kQ Resistor R11 together with capacitors C11 C12 creates a Pole Zero compensation circuit of the feedback loop Their values are result of feedback loop response measurements and adjustments on the board Since NCP1207 allows a direct Optocoupler connection the ISO1 is connected without any pull up resistor to Pin 2 Capacitor C5 bypasses any high frequency current pick up Primary Switch Snubber Network Since any standard snubber will generate losses a different approach has been used in this design To cope with voltage spikes the primary switch has been rated for a 800 V BVgss The snubber capacitor C7 is located on the secondary side This capacitor has two functions The first purpose is to create together with secondary lea
8. er load http onsemi com 7 NCP1207AADAPGEVB Detailed view of the burst pulse during overload can be seen in Figure 11 This figure clearly demonstrates the The load regulation of the output voltage for load step change from 100 to 10 and vise versa can be seen in operation of the internal soft start block Figure 12 Tek Prevyu T Tek Stop ir a aE a 2 SF Besgetencecieaet 35 bi 1 aiene od les e a a te aa es E e a a ay aa aae Gas ee a E a a Bias a a E Ge eon Thee nienia aniani chal soov ao al ch i r pele a a nin Par aera ere aera eres O vijat eine x ain TN i F ii PTIT Figure 11 Detailed View of the Burst Pulse Figure 12 Load Regulation ON Semiconductor and On are registered trademarks of Semiconductor Components Industries LLC SCILLC SCILLC owns the rights to a number of patents trademarks copyrights trade secrets and other intellectual property A listing of SCILLC s product patent coverage may be accessed at www onsemi com site pdf Patent Marking pdf SCILLC reserves the right to make changes without further notice to any products herein SCILLC makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does SCILLC assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation
9. kage inductance the resonant tank Similarly the primary resonant circuit consists of the primary leakage inductance and associated parasitic capacitances The resonant frequency of the secondary resonant circuit is approximately two times higher than resonant frequency of the primary resonant circuit This frequency difference efficiently decreases the voltage spike on the primary The second function of C7 is to protect the secondary switch from voltage spikes Table 1 BILL OF MATERIALS ao pome e fowo o e ows o C o omean o fer fares vane c C 10 13 mooo oam C PHO ee sor se LOY D1 D2 D3 u 0m Common ode o hon SSS for a ISO1 a i ee o eer C E R4 R9 R10 mo emesen OO Table 2 T2 TRANSFORMER SPECIFICATIONS Ferrite Epcos Siemens R10 Material Core N30 Primary 1 turn See Picture Heat Winding resisting plastic insulated wire copper 0 5 mm diameter Secondary Winding 22 turns enameled wire copper 0 3 mm diameter For winding beginnings see the application schematic http onsemi com 4 NCP1207AADAPGEVB PCB Layout Proper printed circuit board layout is essential for good as small as possible to avoid both magnetic and electric operation of the whole converter It also influences the EMI radiation signature in both conducted and radiated measurements An example of the layout can be seen in Figure 2 It is important to ensure good grounding technique and The component arr
10. l to Pour 24 k j e 3 Pin 7 0 87 27 6 W eq 3 The average value of input current at minimum input voltage is Pin _ 27 6 _ liN AVG Vo 255 108 mA eq 4 Taking into account the absence of a clamping network the suitable reflected primary winding voltage for 800 V rated MOSFET switch is Vik 800 V V V bulk max spike eq 5 800 339 330 131 V Publication Order Number EVBUM2132 D NCP1207AADAPGEVB Using calculated Flyback voltage the maximum duty cycle can be calculated Vitbk E 131 Omax V V 131 255 fbk T V bulk min i eq 6 0 339 0 34 The following equation determines peak primary current 2 lin ava _ 2 108 10 3 tt lipk Sna 0 34 635 mA eq 7 The maximum switching frequency at minimum input voltage is 70 kHz Taking into account Quasi Resonant QR and valley switching operation of the NCP1207 the QR time interval from the instant of the total core demagnetization to the valley of switch s drain voltage needs to be taken into account when calculating the switch max ON time interval Using QR time of 2 us appropriate for 70 kHz switching frequency the ON time can be calculated as follows 1 rE tan na 6 ae 0 34 ton SW 4 177 us 4 18 us eq 8 10 uF 25 V D1 1N4148 R2 39 k NCP1207 IC1 D2 1N4148 The EF25 core for transformer was selected It has cross section area
11. ough the pin 1 voltage clamps Also this resistor together with capacitor C4 delays the zero voltage crossing event It helps to tune the turn on instant when the drain voltage is in the valley Resistor R1 has also another function Together with the internal resistor divider the comparator and its voltage reference it forms an overvoltage protection circuit Pin 1 includes a 30 k resistor internally connected to ground If the voltage on that pin reaches roughly 7 2 V an overvoltage latch is triggered and converter operation is blocked until input supply plug is disconnected The value of resistor R1 then can be calculated as follows V 3 _CC max _ R 30 10 7D r eq 16 30 10 18 3 1 34 6 kQ 39 kQ The value of the delaying capacitor C4 is a result of tuning process on the real board Synchronous Rectifier The synchronous rectifier consists in the following basic blocks the sensor of the secondary current the gate driver and the MOSFET switch A current transformer T2 senses the output rectifier current The current transformer has its primary winding located in series with the secondary switch within the secondary current loop Resistor R6 loads the secondary winding of the current transformer The resistor R6 converts the current into a voltage That voltage is filtered and limited by capacitor C6 and diode D3 It then goes to the gate driver which consists in transistors Q2 Q3 and Q4 and pull do
12. ration like battery chargers The DSS also supplies the IC when the overvoltage event is being latched and converter operation is stopped Overvoltage Protection By sampling the plateau voltage on the auxiliary winding the NCP1207 enters into latched fault condition whenever the overvoltage is detected The controller stays fully latched until the Vcc decreases below 4 0 V e g when the user unplugs the power supply from the mains outlet and re plugs it The OVP threshold can be adjusted externally Semiconductor Components Industries LLC 2012 August 2012 Rev 2 ON Semiconductor http onsemi com EVAL BOARD USER S MANUAL e Over load Protection by continuously monitoring the feedback loop activity NCP1207 enters hiccup operation as soon as the power supply is overloaded As soon as overload condition disappears the NCP resumes operation The 24 W AC DC Adaptor Board Specification The adaptor has following maximum and performance ratings Output Power 24W Output Voltage 12 VDC Minimum Input Voltage 180 VAC Maximum Input Voltage 240 VAC Maximum Switching Frequency 70 kHz The schematic diagram of the adaptor can be seen in Figure 1 Transformer Design The bulk capacitor voltage than can be calculated Voulk min Vac mn V2 180 2 255 VDC eq 1 Vbuk max Vac max V2 240 2 339 VDC eq 2 The requested output power is 24 W Assuming 87 efficiency the input power is equa
13. special consequential or incidental damages Typical parameters which may be provided in SCILLC data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s technical experts SCILLC does not convey any license under its patent rights nor the rights of others SCILLC products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application Buyer shall indemnify and hold SCILLC and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part SCILLC is an Equal Opportunity Affirmative Action Employer This literature is subject to all applicable copyright laws and is not for resale in any manner PUBLICATION ORDERING INF
14. wn resistor R8 For the current transformer the ring core R10 was selected It features a cross section area A 7 83 mm The N30 magnetic allows to use a maximum operating flux density of Bmax 0 2 T The appropriate number of turns than can easily be wound on that core is around 20 The maximum demagnetization time of the converter s transformer can be calculated as follows t Nces se Bmax Ae Z 20 0 2 7 82 10 oap V 0 7 clamp eq 17 45 us This value is bigger than maximum operating demagnetization time It means that the current transformer has enough freedom to work properly even if the converter is overloaded or during the start up sequence when the demagnetization time is longer due to a lower output voltage Feedback Loop The feedback loop is based on the secondary side to ensure good output voltage regulation The control circuit is based on a TL431 that has an internal reference voltage of 2 5 V The output voltage of the converter is divided by the resistors R12 and R13 The resistor divider output voltage is compared with the internal reference voltage of the TL431 http onsemi com 3 NCP1207AADAPGEVB With regard to TL431 input leakage current the resistor divider s current of 500 uA was selected The resistor R12 then can be calculated as follows V Rio TL431 _ L3 divider 500 The value of the upper resistor R13 of the divider is V TL431 5kQ 4 7 kQ eq 18 1

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