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SOM-A255F series user`s manual V1.00

1. ek mek NININ AJOIN N Q1 NIN NIO N CO o pulling o pulling o pulling o pulling o pulling alo BH o 2 BO B B2 B3 B4 B5 B6 G0 GT G2 GS a _ 805 _ G6 N Z o pulling Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 o pulling o pulling o pulling o pulling o pulling CO N i CO Co Eee Eom O O O O R in 24 bit TFT mode No pulling O R in 24 bit TFT mode No pulling O R in 24 bit TFT mode JNopulling O R in 24 bit TFT mode Nopulling N C just float this pin N C just float this pin Flat Panel TFT Vertical Sync STN No pulling this output connects to the Vertical Frame Pulse For TFT displays Sync input of the LCD panel For STN displays this output connects to the Frame Clock input of the LCD panel This output indicates the start of a new frame of pixels The panel needs to reset its line pointers to of the screen 197 LP HSYNC Flat Panel TFT Vertical Sync STN Frame Pulse For TFT displays this output connects to the Vertical Sync input of the LCD panel For STN displays this output connects to the Frame Clock input of the LCD panel This output indicates the start of a new frame of pixels The panel needs to reset its line pointers to the top of the screen GND P Ground 198
2. No pulling this input indicates the end of the current capture field and the beginning of the next one The state of VPVSYNC capture field is ODD VPHREF is High on Pixel Clock VPCLK is the reference clock for data on the ZN 31 0 video pixel bus No pulling 2 2 function description 2 2 1 System Bus Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 oystem Bus includes PXA255 address bus data bus memory control signals and GPIOs System Bus enters CSB by X1 In order to make sure that system bus signals have perfect electrical waves System Bus signals are driven by buffers to enhance signals performance PXA255 The buffers signals direction control is control by CPLD on SOM A255x module 2 2 2 COM SOM A255x series SOM A2552 SOM A2558 SOM A255F all support 5 x RS 232 ports 3 full function FF RS 232 ports 1x 2 wire RX TX RS 232 and 1x 3 wire RX TX RTS RS 232 port COM port function assignments are as following gt COM1 FF RS 232 gt COM2 FF RS 232 gt COMS FF RS 232 gt COMBA 2 wire RX TX RS 232 gt COMB 3 wire RX TX RTS RS 232 All RS 232 ports are TTL levels According to user target CSB demand user could define COM5 as 3 wire RX TX RTS RS 232 port or pass through RS 485 transceiver to act as RS 485 function User could references Advantech SOM A255x series CSB design guide to design the COMBS 2 2 3 U
3. Multimedia I O Peripheral System Control 10 100 BASE T Ethernet PCMCIA CF Slots 2 or Audio Codec 4 wire T S S W Reset IDE 2 amp Smart Card 2 TTL LCD lac ese CRT USB Device Suspend Resume TV out USB Host OTG 2 Power Control UART for RS 232 RS 485 5 X2 SOM A200 I O Bus PS 2 KB amp MS 5 Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 design SOM A200 is Advantech RISC ultra low power series SOM architecture The following block diagram is the SOM A200 architecture Based on SOM A200 architecture to design SOM A255x series have two kinds of PCB form factors e SOM A2552 amp SOM A2558 series 6mm x 68mm x 6 8mm e SOM A255F series 6mm x 102mm x 6 8mm SOM A255F benefit The SOM A255F series are very compact 68mm x102mm x 6 8mm and highly integrated system module SOM A255F series products have a standardized form factor and standardized connectors DDR SODIMM Memory Connector and two 100 pin board to board connectors that carry a specified set of signals This standardization allows users to create application specified Customer Solution Board CSB which can accept a variety of present and future SOM A series modules SOM A255F series include popular amp common peripheral functions such as serial ports Ethernet USB etc The CSB designer can optimize exactly how each of these functions is physically implemented Connectors can be
4. current address is a valid 16 bit wide I O address PCMCIA CF slot 0 IO Select 16 Pull high with Acknowledge from the PCMCIA 10Kohm card that the current address is a valid 16 bit wide I O address nSA PWR ON System suspend wakeup input pin Pull high with Falling edge triggered 10Kohm nBATT FALT AIT 78 nSA SKTO CD 2 nSA SKTO IOI S16 10Kohm SA_SKTO VCC nSA SKT1 IOI S16 Main Battery Fault Signals that Pull high with main battery is low or removed 100Kohm Assertion causes PXA255 processor to enter sleep mode or force an Imprecise Data Exception which cannot be masked PXA255 processor will not recognize a e Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 sre event while this signal is mE asserted Minimum assertion time for nBATT_FAULT is 1 ms bd lacs METRI software reset input pin Erie al Mil edge triggered 10Kohm nVDD FALT VDD Fault Signals that the main Pull high with power source is going out of 100Kohm regulation AVDD FAULT causes the PXA255 processor to enter sleep mode or force an Imprecise Data Exception which cannot be masked nVDD FAULT is ignored after a wakeup event until the power supply timer completes approximately 10 ms Minimum assertion time for nVDD FAULT is 1 ms nRESET OUT Reset Out Asserted when No pulling nRESET is asserted and deasserts after nRESET is deasserted but before the first inst
5. placed precisely where they are needed for the application on a baseboard designed to optimally fit the system configuration and layout A CSB design may be used with a range of SOM A255F series modules This flexibility can be used to differentiate products at various price performance points or to design future proof systems that have a built in upgrade path The modularity of an SOM A255F solution also insures against obsolescence as computer technology continues to evolve A properly designed SOM A255F CSB can be used with several successive generations of SOM A255F modules An SOM A255F CSB design thus has many of the advantages of a custom computer board design but delivers better obsolescence protection greatly reduced engineering effort and faster time to market Based embedded platform integrates both low level hardware and software design and is always agreed to require heavy R amp D resources huge development effort risk as well as long time to market lead time Moreover the fast develop RISC SoC technology and short product life that has been challenging System Integrators how to make a right product development approach while foreseeing the huge advantage amp benefit by adopting RISC base solution SOM A255F series are an innovate platform architecture of WinCE NET ready complete functional system in a low profit module with SODIMM 200 pin unified I O ready bus interface that is designed to fit into application specifi
6. 2 11 Zoom Video ZV port SOM A255F amp SOM A2552 series ZV port comes from SM501 a Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 SOM A2558 series don t support the function ZV Port can interface with video decoders such as NTSC PAL decoders MPEG 2 decoders and JPEG Codec The ZV Port supports resolutions up to 1280x1024 It directly accepts digitized RGB or YUV signals and does not accept analog signals In 16 bit mode the ZV 15 8 signals are the most significant eight video pixel inputs In 8 bit mode these signals are not used In 16 bit mode the ZV 7 0 signals are the least significant eight video pixel inputs In 8 bit mode these signals are the only eight video pixel inputs About how to wire the ZV port with NTSC PAL decoders please check Advantech SOM A255x series CSB design guide 2 2 12 System Reset Interface SOM A255x series all supply 3 kinds of System reset interface as following gt nRESET hardware reset input pin The pin is pulled high in SOM A255F The pin is triggered by signal falling edge gt nSW RESET software rest input pin The pin is pulled high in SOM A255F The pin is triggered by signal falling edge gt nSA PWR ON Suspend wake up pin The pin is pulled high in SOM A255F The pin is triggered by signal falling edge 2 2 13 Buzzer Control Interface SOM A255x series all support this function Buzzer out control signal is design
7. CSB otatic chip selects Chip selects to static memory devices such as ROM Pull hiah EZPIBBUEUCSA and Flash Individually nBUF_CS4 rie can be used with variable latency I O 100Kohm devices Advantech default use this pin as d Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 companion chip chip select pin nBUF CS4 pin is used for EVA C210 on SOM A255F amp SOM A2552 series If no special application Advantech strongly suggest user to open this pin in CSB otatic chip selects Chip selects to static memory devices such as ROM and Flash Individually programmable in the memory configuration registers nBUF CS3 can be used with variable latency I O devices Advantech uses the pin as memory block About detail description please reference SOM A255x series Memory and Interrupt Map Static chip selects Chip selects to static memory devices such as ROM and Flash Individually programmable in the memory configuration registers nBUF CS5 can be used with variable latency I O devices Advantech default uses the pin as chip select pin Pull high with 100Kohm A47 nBUF CS3 B Pull high with 100Kohm no special application Advantech strongly suggest user to open this oin in CSB the DMA Controller that an external device requires a DMA transaction If user wants to design a controller in CSB with DMA mode please check Pull low with ae risc a
8. DC 5 0V DC in Back up power source for RTC amp oYS VC Input DC Operating Conditions Input DC Operating Conditions 0 0 0 00 0 vi neu High Voltage all standard ee ee input and I O pins 0 8 VCC VCC NEN 75 Lai input and I O pins VSS 0 2 VCC vou Quee High Voltage all standard uuu ww output and I O pins VCC 0 1 VCC VOL Output Low Voltage all standard we na output and I O pins VSS VSS 0 4 1 2 3 Power Consumption In WinCE O S environment SOM A255F series products have 3 kinds of operating model e Normal mode I O and system all work well All components on SOM A55x are powered e Idle mode I O and system all work well except backlight control circuit In order to do power saving LCD backlight control circuit will disable the LCD backlight inverter e Suspend mode all devices are no powered except SDRAM RTC real time clock amp some CPU PXA255 power pins In Suspend mode SOM A255x series are only powered by BAT VCC pin Li ion 3 0V coin battery from CSB If user doesn t design coin battery to power BAT VCC pin then Suspend mode doesn t work on SOM A55x series products About detail power consumption of every SOM A255x series please contact with ae risc advantech com tw Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 Chapter 2 Assignments and Descriptions 2 1 Connector Locations X2 SOM 2001 O Bus Figure SOM A255F se
9. connector Pin Out Table X3 connector for PCI ZV port MMC interface and Misc function e B1 PCIADO 10 PCladdress dataO No pulling A1 PCIAD 10 PCladdress data No pulling B2 PCIAD2 IO PCladdress data2 No pulling A2 PCIAD3 IO PCladdress data3 No pulling P aC B3 IO AS IO B4 IO A4 IO nCBEO Cl bus command and bytes No pulling A5 IO B6 IO AG IO IO O Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 B8 PCICLKO ig PCI bus clock output Typical period 31 2ns Bad i NN enable signal B9 nINTD _ PCI bus interrupt D Nopullng A9 nINNTC PCI bus interruptC Nopulling B10 GND P Grund o J A10 nINTB PPClbusinteruptB Nopulling B11 nINTA PCI bus interrupt A Nopulling A11 nGNT3 O PCI bus grant signal No pulling B12 nREQ3 PCI bus request signal No pulling A12 nGNT2 O PCI bus grant signal No pulling B13 nREQ2 PCI bus request signal No pulling A13 nGNT O PCI bus grant signal No pulling B14 nREQi PCI bus request signal No pulling Ai4 GND J P Grund J J O B15 PCIAD31 _ IO PCI address data 31 No pulling A15 PCIAD3
10. many types of LCD kits for users to reduce their developing effort The LCD kit include the following items e LCD e Inverter e Cables includes LCD signals cable Inverter signals cable e Document The LCD kit installation guide Advantech supply the following LCD kits for user to choose e LCD A057 STQ1 0 Optional item 5 7 STN QVGA LCD kit The kit includes 5 7 STN QVGA LCD NAN YA LCBFBTB61M23 4 wires resistive T S inverter cables and installation guide SOM A2552 amp SOM A255F series don t support 320 240 STN panel in this moment if user have this kind of requirement please contact with ae risc advanch com tw or advantech regional sales for further support e LCD A064 TTV1 0 Optional item 6 4 TFT VGA LCD kit The kit includes 6 4 TFT VGA LCD kit PRIMEVIEW PDO64VT2 4 wires resistive T S inverter cables and installation guide All SOM A255x series support this LCD kit in reference image LCD A104 TTS1 0 Optional item 10 4 TFT SVGA LCD kit The kit includes 10 4 TFT SVGA LCD AUO G104SNO3v2 4 wires resistive T S inverter cables and installation guide Only SOM A255F amp SOM A2552 series can support this LCD out mode LCD A150 TTX2 0 Optional item 15 TFT XGA LCD kit The kit includes 15 TFT XGA LCD AUO M150XNO7 4 wires resistive T S inverter cables and installation guide Only SOM A255F amp SOM A2552 series can support this LCD out mode SOM A255F series design in kit SOM ADK255
11. of Intel PXA 255 32 bit SoC and SMI SM 501 VGA controller SOM A255F is perfect for Multimedia mobility battery powered great heavy display base embedded Internet appliance or so called smart embedded devices SOM A255F series Design highlight WinCE NET ready platform as functional system engine Triple Chip integration offers full SBC level functionality on a 68 mm x 102 mm x 6 8 mm compact sized module with 64 128 MB SDRAM fl ash on board Ultra low power platform with additional high performance graphic controller without embedded SDRAM offers high mobility fanless operation multimedia and dual monitor display advantages OS ready package for Windows CE NET Linux Installation Windows CE NET 4 2 BSP ready Local bus AMI Bus comprehensive I O interfaces such as Ethernet PS 2 ports USB Host and PCI I F support Boot option by onboard Flash or CFC makes easy maintenance and cost savings Design in Kit Package available for complete design in support Optional RISC CE Builder assist with customer image development SOM A200 architecture SOM A255x series are based on Advantech SOM A200 architecture to SBI System Bus Interface PCI Slot 3 Video in MMC SD SPI X1 SBI 100 pin B2B Connector X3 Feature Ext Bus 100 pin B2B Connector COMPANION SOM A200 Series Processor Companion Chip1 Optional Companion Chip2 Optional MAMMA 68 102 mm RTC Watchdog Networking Storage
12. or the internal memory controller clock divided by al Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 2 At reset all clock pins are free running at the divide by 2 clock speed and may be turned off via free running control register bits in the memory controller The memory also provides control lO Select 16 Acknowledge from the Pull hiah PCMCIA card that the current Ma address is a valid 16 bit wide I O 100Kohm pin Advantech default function is used as matrix Keypad IRQ The pin directly connects to PXA255 GPIO2 L13 pin If user No pulling doesnt use the matrix key pad function use can use this pin as Advantech use this pin to control display chip as IRQ function The pin is not available for CSB design of SOM A2552 amp SOM A255F SOM A2552 amp SOM A255F user must float this pin This pin is directly connected to SoC PXA255 GPIO3 K14 nBUF lOIS16 B40 jnBUF_PWE H KEYPAD IRQ DISPLAY_IR No pulling For SOM 255F is PXA_GPIO 7 B42 NC No connection Just float this pin Advantech default function is used as external 16C950 solution IC IRQ The pin directly connects to PXA255 Eo GPIO10 F7 pin If user doesn t No pulling design 16C950 on CSB to expand COM function user could use this pin as GPIO B43 LAN1_IRQ Advantech default function is used No pulling mn v RISG GPIO pin The pin directly co
13. provide In order to keep the system bus signals well every address lines and data lines are driven by buffers Buffers signals direction controls are implemented by CPLD X2 SODIMM 200 connector Most I O functions fog in X2 X2 includes PCMCIA CF T S Audio system reset control SOM system power input pins I2C USB host USB client RS 232 ports RS 485 port LCD out CRT out and PS 2 ports Every I O functions will be described in the following content in detail X3 Feature Extension connector Advantech SOM A series products use dual chip or triple chip design concepts The companion chip s I O function will come out through the X3 In SOM A255F series PCI SD MMC amp ZV zoom video I F are included in X3 ADVANTECH SOM A200 is a powerful and helpful architecture for users to implement a RISC system There are three types of interfaces One is SO DIMM 200 gold finger interface and two 100 pin B2B connectors Pin Definition JP1 PXA255 JTAG pin header Pin type P DC power pin or system ground pin digital input pin O digital output pin IO bidirectional pin Al analog input pin a Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 AO analog output pin no function SODIMM 200 Pin Out Table X2 Typ Description Default state e 1 SA SKT DO AIO PCMCIA CF data 0 No pulling No pulling No pulling No pulling No pulling No pulling No pulli
14. release memory map of available memory block and available GPIOs These are fully enough to users to develop their own carrier board Your ePlattorm Partner A D N T EC H User s Manual for Advantech SOM A255F series module V1 00 1 2 System Specifications The following table is SOM A255F series functional specifications SOM A255F standard product specification table Intel XScale PXA255 400 MHz p MHz Advantech Advantech EVA C210 Advantech EVA C210 SMI SM501 without 8MB embedded SDRAM With Without 8MB embedded SDRAM Share with system memory o ee T6B2AN28BMB 28 MB IDEE OO 100 pin B2B conn wi buffer drive 100 pin B2B conn the conn Include PCI ZV amp SD MMC I F 3x Full RS 232 TTL 1x 2 wires RS 232 TTL 1x 3 wires for RS 232 or RS 485 Din PONDUUCE ot HoPEMDU date pe Ix kCh memoymode kCh memoymode mode R XUSBOien S O wo PS 2 ports for keyboard amp mouse o S SM501 24 bit LCD interface resolution up to 1280 1024 o0 Y 0 0 AC 97 codec output Support Mic in Line in Line out speaker out 1 8 H W Reset S W Reset Suspend Wake LN I F Expre RISG Yes Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 WinCE NET Linux By customer request 0 60 C Optional for 10 60 C amp 20 80 C Ps Reconfiguration Option co
15. 0 _ IO PCladdress data 30 No pulling B16 PCIAD12 IO PCladdress data 12 1 No pulling A16 PCIAD13__ IO PCladdress data 3 No pulling B17 PCIADi4 IO PCladdress data 14 No pulling A17 PCIAD15 IO PCladdress data15 1 No pulling B18 GND J P Grund J J bad nCBE1 uo Fel bus command and bytes No pulling enable signal B19 PAR IO PCI bus parity bit 1 Nopulling A19 GND P Grund J B20 nSERR O POlbus system error signal No pulling A20 nPERR O PCI bus parity error signal No pulling B21 nSTOP O PCI bus stop signal No pulling A21 nDEVSEL IO PCI bus device select signal No pulling B22 nTRDY O PCI bus target ready signa No pulling A22 nIRDY O PCI bus initiator ready signal No pulling B23 nFRAME O PCI bus cycle frame signal No pulling enable signal B24 _PCIAD16__ IO PCladdress datai6 No pulling A24 PCIADi7 IO PCI address data 17 No pulling B25 PCIAD18 IO PCI address data 18 No pulling A25 PCIAD19 IO PCladdress data 19 No pulling B26 PCIAD20 _ IO PCI address data 20 No pulling A26 PCIAD21 IO PCI address data 21 No pulling B27 PCIAD22 IO PCladdress data 22 No pulling A27 PCIAD23 _ IO PCI address data 23 No pulling B28 PCIAD24 IO PCI address data 24 No pul
16. 6 video pixel ZV6 input for YUV 4 2 2 mode or V 6 video pixel input for YUV 4 2 2 mode 16 bit G O video pixel input for No pulling RGB 5 6 5 mode U 5 video pixel ZN5 input for YUV 4 2 2 mode or V 5 video pixel input for YUV 4 2 2 mode 16 bit B 4 video pixel input for No pulling RGB 5 6 5 mode U 4 video pixel ZV4 input for YUV 4 2 2 mode or V 4 video pixel input for YUV 4 2 2 mode B46 ZV3 16 bit B 3 video pixel input for No pulling RGB 5 6 5 mode U 3 video pixel input for YUV 4 2 2 mode or V 3 video pixel input for YUV 4 2 2 a Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 a 16 bit B 2 video pixel input for No pulling RGB 5 6 5 mode U 2 video pixel input for YUV 4 2 2 mode or V 2 video pixel input for YUV 4 2 2 mode ZV2 SUEEM 12C bus 4 71Kohm B Horizontal Sync A falling or rising No pulling edge on this input indicates the ee end of the current scan line and the beginning of the next B47 16 bit B 1 video pixel input for No pulling RGB 5 6 5 mode U 1 video pixel ZV 1 input for YUV 4 2 2 mode or V 1 video pixel input for YUV 4 2 2 mode A47 16 bit B O video pixel input for No pulling RGB 5 6 5 mode U 0 video pixel ZVO input for YUV 4 2 2 mode or V 0 video pixel input for YUV 4 2 2 mode B48 TV in control serial data Pull high with Spey input output I2C bus A48 TV in control serial clock output l
17. Brightness amp Contrast Control interface SOM A2552 amp SOM A255F series LCD out interface comes from SM501 SOM A2552 amp SOM A255F LCD out supports 24 bit and resolution up to 1024 768 SOM A2552 amp SOM A255F supports both active and passive LCD displays SOM A2558 series LCD out function comes from SoC PXA255 SOM A2558 LCD out supports 16 bit and resolution up to 800 600 mn s ISG Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 The LCD signals are 3 3V level in X2 If users CSB want to drive 5V level panel users could design buffers on CSB to translate LCD signals level User could refer Advantech SOM A255x series CSB design guide Advantech design LCD brightness control circuit amp LCD contrast control circuit on SOM A255x series modules STN LCD panel needs contrast control signals In X2 LCD contrast control signals are nVCONR INC VCONR CS and VCONR UnbD The control signals are based on DALLAS DS1804 NV Trimmer Potentiometer to design Users could check the Advantech SOM A255x series CSB design guide to know how to wire User could check to know how to control Brightness control signals are used to control the LCD backlight inverter lamp current In X2 LCD brightness control signals are nVBRIR INC VBHRIR CS and nVBRIR_UnD The control signals are based on DALLAS DS1804 NV Trimmer Potentiometer to design Users could check the Advantech SOM A255x serie
18. DDR9 O SoC PXA255 system address 9 No pulling _ B5 ADDR8 O SoC PXA255 system address 8 No pulling _ A5 ADDR24 O SoC PXA255 system address 24 No pulling B6 ADDR25 O SoC PXA255 system address 25 No pulling _ Memory output enable pin Connect to the output enables of memory No pulling devices to control data bus drivers B7 ADDR20 O SoC PXA255 system address 20 No pulling Memory write enable Connect to the A7 write No pulling enables of memory devices B8 ADDR22 O SoC PXA255 system address 22 No pulling Read Write for static interface Ed iin 0 Stal that the current transaction No pulling is a read or write Ground J P Grond nd with Ground Latency I O Ready pin BUF RDY Notifies the memory controller when an external bus device is ready to 100Kohm transfer data B10 DATA15 IO SoCPXA255systemdata 15 No pulling _ A10 DATA14 IO SoCPXA255systemdata 14 No pulling _ B11 DATA13 IO SoCPXA255systemdata 18 No pulling _ A11 DATA12 IO SoCPXA255systemdata 12 No pulling _ B12 DATA11 IO SoC PXA255 system data 11 No pulling A12 DATA10 IO SoC PXA255 system data 10 No pulling B13 DATA9 IO SoCPXA255systemdata9 No pulling A13 DATA8 IO SoCPXA255systemdata8 No pulling _ B14 DATA31 IO SoCPXA255system data 31 No pulling _ aC Pull high You
19. F B00 is not included any LCD kit If user needs LCD kit to evaluate please order your suitable size LCD kit Risc CE Builder SOM A255x series all support the Advantech optional RISC CE Builder by developers can manage the BSP for their own platform development thru a friendly users interface over the web RISC CE Builder Solution is constituted by two parts Web Image Builder and CE TUner Web Image Builder offers developers an online image building mechanism through a friendly user interface to remotely conduct low level software and platform customization integration for their target application without Knowing using Microsoft Platform Builder The image building machine links to Advantech s Board Support Package BSP library so developers can leverage Advantech s low level software solution database m Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 CE TUner is a powerful value added system utility tool suit for developers easily and simply develop validate and upgrade their own SW platform solution CE Tuner helps users fine tune their target SW image for optimized performance verify settings and platform tests before the production image is certified RISC CE Builder is not included in Design in kit If you need more information about it please contact with ae risc advanch com tw or advantech regional sales for further support SOM A255F Block diagram SOM A255F se
20. Flat Panel Display Enable This No pulling signal is used as a data enable when the pixel clock needs to latch pixel data SHCLK Flat Panel Pixel Clock The active No pulling edge of FPCLK is programmable The LCD panel uses this clock when loading pixel data into its Line Shift register This signal connects to the TXCLK input of the L VDS transmitter i 100 pin B2B connector Pin Out Table X1 connector For AMI interface Tl rr e o lt lt No pulling Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 inti Default No Sims Type Description ate Static chip selects Chip selects to static memory devices such as ROM and Flash Individually programmable in the memory configuration registers This pin can Pull high nBUF CS2 be used with variable latency I O with 100K devices NBUF_CS2 directly connect Ata to SoC PXA255 nCS2 User could use this pin as chip select pin to control the solution IC on carrier board This pin is reserved for user to use A1 ADDR15 O SoC PXA255 system address 15 No pulling _ B2 ADDR14 O SoC PXA255 system address 14 No pulling _ A2 ADDRi3 O SoC PXA255 system address 13 No pulling B3 ADDH12 O SoC PXA255 system address 12 No pulling _ A3 ADDHi1 O SoC PXA255 system address 11 No pulling _ B4 ADDR10 O SoC PXA255 system address 10 No pulling _ A4 A
21. Low power high performance 32 bit Intel XScale core based CPU 200 300 and 400 MHz The SoC is ARM Architecture v 5TE compliant 0 18p process for high core speeds at low power Intel Media Processing Technology including 40 bit accumulator and 16 bit SIMD to enhance audio video decode performance In power field Low Power and Turbo modes enables enhanced optimal battery life 32 KB data and 32 KB instruction caches 2 KB Mini data cache for streaming data About PXA255 I O expansion function Integrated Memory and PCMCIA Compact Flash Controller with 100 MHz Memory Bus 16 bit or 32 bit ROM Flash SRAM six banks 16 bit or 32 bit SDRAM SMROM four banks as well as PCMCIA and Compact Flash for added functionality and expandability System Control Module includes 17 dedicated general purpose interruptible I O ports real time clock watchdog and interval timers power management controller interrupt controller reset controller and two on chip oscillators Peripheral Control Module offers 16 channel configurable DMA controller integrated LCD controller with unique DMA for fast color screen support Bluetooth I F serial ports including IrDA 12C 12S AC97 three UARTs 1 Full H W flow control SPI and enhanced SSP USB end point interface and MMC SD Card Support for expandable memory and I O functionality About Intel PXA255 SoC detail information user could visit Intel web site for more Enhance Graphic Chip SMI SM501 introduct
22. SB 1 1 Host SOM A255F amp SOM A2558 series supports 2 USB host ports SOM A2552 series supports 1 USB host port The USB host ports on the SOM A255x are USB 1 1 compatible The default Windows CE NET and Linux on board support USB keyboards mice and mass storage devices User could check the SOM A255x series verified compatible peripherals list to know the verified compatible peripherals If user wants to connect other devices it may take customization on the Windows CE 2 2 4 USB 1 1 client The USB client port on the SOM A255x is USB 1 1 compatible USB client connector is used to communicate with master device ex PC for ActiveSync About SOM A255x series ActiveSync installation please reference to Installation Guide Advantech RISC platform with Microsoft ActiveSync 3 7 2 2 5 T S a Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 SOM A255x series supports 4 wires X X Y Y resistive T S interface 2 2 6 PCMCIA CF All SOM A255x series supports 2 PCMCIA interface I F or 2 CF I F or 1 PCMCIA amp 1 CF I F User could check SOM A255x Series Carrier Board Design Guide to know how to design the I F PCMCIA CF I F power control circuit is designed on SOM module so PCMCIA CF I F is hot swappable Advantech strongly suggest user to design one CF or one PCMCIA slot on user s target carrier board even user doesn t need this port in target product Advant
23. T ECH User s Manual for Advantech SOM A255F series module V 1 00 2 2 17 PCI I F Thru X3 SOM A2558 amp SOM A255F could support 4 channels PCI device controllers on CSB The PCI clock is 33 MHz PCI I F comes from Advantech EVA C210 I O enhancement chip The PCI I F feature is as followings Compatible with PCI specification version 2 2 92 bit data bus interface Built in PCI bus arbiter Supports up to 3 individual external bus master devices Support PCI Bus Controller FPCI to PCI slave I O read write memory read write configuration read write cycle PCI Bus master support all disconnect types Master Abort Target Abort Target Retry Disconnect with data Disconnect without data SOM A2552 series don t support PCI I F
24. The pin connects to SoC PXA255 GPIO45 Ground pin 100Kohm pin 100Kohm 100Kohm 100Kohm UART2 Transmit signal pin If user Pull high with doesn t need UART2 function user 100Kohm could use this pin as GPIO The pin connects to SoC PXA255 LP UART2_TXD GPIO43 UART3_RXD UARTS Receive signal pin If user Pull high with doesn t need UARTS function user 100Kohm could use this pin as GPIO The pin connects to SoC PXA255 GPIO46 UART2 DCD UART3_DSR UART2_RXD UART2 Receive signal pin If user Pull high with doesn t need UART2 function user 100Kohm could use this pin as GPIO The UARTS3 RTS pin connects to SoC PXA255 GPIO42 pin 100Kohm UART2_CTS UART2 Clear to Send signal pin If Pull high with user doesn t need UART2 function 100Kohm user could use this pin as GPIO pin connects to SoC PXA255 GPIO47 mare o a Sarena SOS pin 100Kohm Tuam T nares Bae 100Kohm Bie cial liana 100Kohm mmm lili signal pin 100Kohm The pin connects to SoC PXA255 GPIO44 RISCZ Express UARTS Transmit signal pin If user Pull high with doesn t need UARTS function user 100Kohm could use this pin as GPIO The e N Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 T wem T punica paras 100Kohm m wann RT OSH suu ce 100Kohm 7 uc T gentibus tais iara pin 100Kohm ume v treason gan 100Kohm Mis URL aT 100Kohm ar wars o gar hesieseii Mum o
25. Your ePlatform Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V1 00 User s Manual Of Advantech RISC SOM A255F Series Module System Module with ntel XScale PXA255 processor SMI SM501 Graphic chip amp Advantech EVA C210 I O enhance chip with Windows CE NET Released Version V 1 00 Released Date May 19 2004 Advantech Co Ltd RISG Risc Embedded Computing Division E X pr ess http www advantech com risc Your ePlatform Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 ABSTRACT This manual describes the SOM A255F series module functions Copyright This document is copyrighted 2003 All rights are reserved The original manufacturer reserves the right to make improvements to the products described in this document at any time without notice No part of this document may be reproduced copied translated or transmitted in any form or by any means without the prior written permission of the original manufacturer Information provided in this document is intended to be accurate and reliable However the original manufacturer assumes no responsibility for its use nor for any infringements upon the rights of third parties that may result from such use Acknowledgements IBM PC AT PS 2 and VGA are trademarks of International Business Machines Corporation Intel is trademark of Intel Corporation Microsoft Windows CE NET is a registered tradem
26. ark of Microsoft Corp All other product names or trademarks are properties of their respective owners For more information on this and other Advantech products please visit our website atl http www advantech com http www advantech com risc For technical support and service for please visit our support website atl http eservice advantech com tw eservice Or directly mail to Advantech RISC platform application engineer AE RISC advantech com tw Advantech RISC SOM design in member can login in the Advantech SOM Design in Zone for professional amp real time technical support amp service http risc designin advantech com tw PS The RISC design in zone web portal is only for SOM design in member only 5 Your ePlatform Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 Revision Histor V1 00 2004 05 19 1 Official released version For 9696255201 9696255801 9696255F01 amp 9696255F 12 T SC Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 Chapter 1 SOM A255F series Architecture 1 1 Introduction The SOM A255F is WinCE ready compact size module platform with SBC function level functionality that is emphasis at high performance VGA capability that offers Ultra low power consumption with comprehensive l Os SXGA LCD Dual Display Analogy VGA in out put Audio Interface into a compact 68x102x6 8mm size module By the integration
27. bits in the memory controller The memory controller also provides control register bits for clock division and deassertion of each SDCLK pin SDCLK 2 1 control register assertion bits are always deasserted upon reset SDRAM and or Synchronous Static No pulling Memory clock enable Connect to For BUF SDCKE the clock enable pins of SDRAM It is SOM 255F 1 deasserted during sleep is BUF SDCKE 1 is always deasserted BUF_SDC upon reset The memory controller KE1 Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V1 00 provides control register bits for deassertion GND P Grud hz2 ADDED 6 Soc PXADES Spem address No paling B23 ADDR1 O SoC PXA255 system address 1 No pulling A23 ADDR2 O SoC PXA255 system address 2 No pulling B24 ADDR3 O _ SoC PXA255 system address 3 No pulling A24 ADDRA O jSoCPXA255system address 4 No pulling B25 ADDR5 O SoC PXA255 system address 5 No pulling A25 ADDR6 O _ SoC PXA255 system address 6 No pulling B26 ADDR7 O SoC PXA255 system address 7 No pulling A26 ADDR16 O SoC PXA255 system address 16 No pulling B27 ADDRi7 O SoC PXA255 system address 17 No pulling A27 ADDR18 O SoC PXA255 system address 18 No pulling B28 ADDR19 O SoC PXA255 system address 19 No pulling A28 ADDR21 O SoC PXA255 system addre
28. dvantech com tw first with 1Kohm If use doesn t want to use this pin as DMA REQ use could use the pin as GPIO The pin connects to SoC PXA255 GPIO19 Memory Controller alternate bus master request Allows an external device to request the system bus from the Memory Controller If user wants to design a controller in CSB with 1Kohm with this pin function please check with ae risc advantech com tw first If use doesn t want to use this pin as a Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 DMA_REQ use could use the pin as GPIO The pin connects to SoC PXA255 GPIO14 Channel 1 DMA acknowledge Notifies an external device that it has been acknowledged the DMA controller If user wants to design a controller in CSB with DMA mode DMA ACK1 please check with No pulling ae risc advantech com tw first If use doesn t want to use this pin as DMA ACK use could use the pin as GPIO The pin connects to SoC PXA255 GPIO22 Memory Controller grant Notifies an external device that it has been granted the system bus If user wants to design a controller in CSB MBGNT with this pin function please check with ae risc advantech com tw first with 1Kohm If use doesn t want to use this pin as MBGNT use could use the pin as GPIO The pin connects to SoC PXA255 GPIO13 3 6864 MHz clock Output from As amesa O Gasa Mitzossilato Ne puling 100 pin B2B
29. ech platform always use CF or PCMCIA slot to be system S W upgrading port If user doesn t design 1 CF or PCMCIA slot on carrier board user will run into trouble when user wants to upgrade image boot loader amp boot logo 2 2 7 SD MMC All SOM A255x series supports 1 slot SD MMC port The Multi Media Card MMO is a low cost data storage and communication media The MMC controller in the SOM A255x is compliant with The Multi Media Card System Specification Version 2 1 The only exception is one and three byte data transfers are not supported SD MMC I F in SOM A255x only support 1 bit memory mode not support I O mode 2 2 8 Audio AC 97 Codec on board All SOM A255x uses Realtek ALC202 AC97 audio Codec on SOM module SOM A255x series provides mono microphone in stereo line in and stereo line out interface If users want to drive speakers users could follow the Advantech SOM A255x series CSB design guide to design the audio amplifier on CSB 2 2 9 CRT out SOM A255F amp SOM A2552 series supplies CRT out I F which resolution is up to 1024 768 CRT out function comes from SM501 CRT out signals are all analog signals user must follow the analog signals layout rules SOM A2558 series doesn t support CRT out function but user could design CRT out solution IC on CSB to add the function on SOM A2558 platform About detail implement way please check Advantech SOM A255x series CSB design guide 2 2 10 LCD TTL interface w LCD
30. ed User Solution Board CSB with easy risk less robust fast implementation approach Dual expansion interface and Pre select Embedded OS also are well integrated on module OS Board Support Package BSP and advantech own develop system utility amp tools are also supported for an easy design in business philosophy SOM A255F series is designed for High computing graphic amp I O expansion platforms a Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 Mobile multimedia and battery powered device platforms with large display amp multi I D expansion demands Wireless broadband terminals Smart display devices Security surveillance platforms with digital or analog video input output SOM A255F series design in package The Design in Kit package provides developer complete reference design in suit for application evaluation development and own User Solution Board CSB development It contains the needed information documentation and tools for starting their hands on work as the followings items Target SOM SOM A255F 440B0 SOM A255F standard version board SOM A255x series Reference Carrier Board RCB Sample CSB for developer reference The board can be used in SOM A255x series board SOM A255x means SOM A2552 SOM A2558 and SOM A255F 64MB compact flash card the CF card is empty without any file inside SOM A255x series support CD includes sample image amp b
31. ed to control the buzzer on off status If users want to design buzzer on CSB to be reminding or alarm system user could reference Advantech SOM A255x series CSB design guide If users want to control the buzzer users can check the memory map to do it 2 2 14 System Management Bus SM Bus interface SOM A255x series SM Bus is implemented by PXA255 I2C bus If users CSB is powered by battery pack with SM bus battery gauge IC then users could connect the SOM A255x SM Bus to battery pack to monitor battery status SOM A255x series SM bus directly support TI BQ2040 gas gauge IC 2 2 15 Power input SOM A255x needs 3 3V amp 5V DC power inputs The power sources 3 3V 5V must always be supplied even in system sleep mode SOM A255x power management is completely implemented on itself users CSB doesn t need to control the power supply to SOM A255x 2 2 16 Back up power input If user want to keep the real time clock RTC works well in power off mode user should connect the coin battery positive pin to BAT VCC in X2 directly The back up power pin BAT VCO is the only power source to supply RTC power when SOM A255x system power 3 3V 5V is off The coin battery must be 3 0V Li ion coin type The coin battery charging circuit is designed on SOM A255x so user shouldn t and needn t design the charging circuit on CSB If users don t need RTC function in CSB just let the BAT VCC pin open d Your ePlattorm Partner AD AN
32. en users enter the layout procedure user could follow the 1 drawing to place the connector SOM A255F series PCB form factor is 68mm 102mm 6 8mm The 2 drawing shows the PCB thickness limitation The component side height is 2 8mm and the solder side maximum height is 3 00mm and the PCB thickness is 1 00mm The 3 drawing shows allied mechanical data of SOM A255F series board and CSB Users could see that the matting height is 3 00mm and the solder side maximum height of SOM A255F is also 3 00mm So Advantech Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 don t suggest users to place any components between SOM module and CSB in layout stage It could be short Most users will question the height of SOM structure product Does product be too thick based on SOM structure product User could see the answer in the 3 mechanical drawing Maximum height of SOM module allied with CSB is 5 20mm One port USB 1 1 host connector height is 8 37mm 1 DB 9 RS 232 connector is 12 53mm 1 type II CF slot is 8 72mm So this is the answer If users want to use any standard I O connector on CSB then SOM structure is not the maximum height maker The maximum highness is decided by I O connector not SOM structure 1 2 2 Power System Requirement SOM A255F Operating DC value table Symbol Description Min Typ SYS nad SOM system DC 3 3V DC in a power source 3 3 SOM system
33. ion The SM501 is a Mobile System on a Chip MSOC M device This robust device delivers high performance video and 2D operation providing a solution for embedded markets The SM501 also contains a wide variety of I Os such as analog RGB and digital LCD Panel interfaces an 8 bit parallel interface USB UART IrDA Zoom Video AC97 or I2S SSP PWM and I2C interfaces These built in functionalities help to reduce overall system cost Additional programmable GPIO bits can be used to interface to external devices as well About SMI SM501 display chip detail information user could visit SMI web site for more Enhance I O chip Advantech EVA C210 introduction The Advantech EVA C210 Companion Chip is a companion chip to the Intel PXA255 processor based on XScale technology It provides a variety of functions suitable for use in a high performance computer system The integrated on chip functions include Companion to Intel amp PXA255 processor System Bus Interface SBI to AHB Wrapper Shared Memory Controller supports SDRAM Two PS 2 ports are provided for use with keyboards and mice SC Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 Real Time Clock RTC with calendar function C Controller UART Controller with auto flow control function for RS485 16550 compatible UART Provide up to 32 bits of General Purpose I O GPIO Two independent 16 bit Timers T
34. ling A28 PCIAD25 IO PCI address data 25 No pulling B29 PCIAD26 IO PCladdress data 26 No pulling A29 PCIAD27 __ IO PCI address data 27 No pulling al Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 N C float this pin N C float this pin ooo N C float this pin N C float this pin N C flotthispn J N C flotthispn J N C flotthispn J N C float this pin ooo SD MMC interface card detect pin Pull high with If user doesn t need MMC SD 100Kohm function user could use this pin as GPIO The pin connects to SoC PXA255 GPIO12 MMC clock Clock signal for the No pulling MMC Controller If user doesn t need MMC SD function user could use this pin as GPIO The pin connects to SoC PXA255 GPIO6 Chip select pin for MMC controller No pulling For If user doesn t need MMC SD SOM 255F is function user could use this pin as MMCCSO nMMCD MMCLK MMDAT3 MMCCSO GPIO The pin connects to SoC PXA255 GPIO8 Multimedia Card Command Pull high with 10Kohm Pull high with 10Kohm For MMCMD N C N C N C N C C oo N Multimedia Card Data pin SOM 255F is MMCDAT No connection Just float this pin N C For SOM 255F is Reserved C No connection Just float this pin N C For C A37 SOM 255F is Reserved No connecti
35. lumn provide users many choices means no option If standard product SOM A255F 440B0 s spec doesn t fit user s requirement user could contact with Advantech for SOM A255F reconfiguration Advantech SOM A255x series have wide temperature products About detail product information user could visit website htip Awww advantech com tw epc phoenix User also could contact with ae risc advanch com tw or advantech regional sales for further information SOM A255F 440B0 is off the shelf standard product Advantech welcome SOM A255F re configuration demand Users could base on the column of SOM A255F spec to re configurate userized SOM A255F Reconfiguration Option column provide users many choices means no option If standard product SOM A255F 440B0 s spec doesn t fit user s requirement user could contact with Advantech for SOM A255F reconfiguration e ISG Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 1 2 1 Mechanical Specification Following figure shows the mechanical drawing of SOM A255F series 14 92 Limit High in solder Side SOM Board Dimension T Matting Connector on CSB ua f RISC SOM o i Matting High i CSB E Board Matting Dimension Units mm The above figure shows the SOM A255F mechanical drawing Users could follow the above figure to implement the layout procedure 1 drawing shows the SOM A255F module PCB mechanical data Wh
36. lways be SYS VCC3P3 i SYS VCC powered by DC 5V even in sleep mode SYS VCC3P3 SOM system DC power 3 3V input pin SYS VCC should always be powered by DC 3 3V even in sleep mode wc VCC SMBUS CLK System Management Bus clock Pull high with SoC PXA255 2C bus l SMBUS_DAT neni The pin is implemented by SoC 4 7Kohm PXA255 2C bus SYS VCC3P3 SOM system DC power 3 3V input pin SYS VCC should always be powered by DC 3 3V even in sleep mode USB CP IO USB Client Positive pin Nopuling EE VCC3P3 SOM system DC power 3 3V input Powered pin SYS VCC should always be powered by DC 3 3V even in sleep mode USB CN O USB Client Negative pn No pulling E VCC3P3 SOM system DC power 3 3V moal pin SYS_VCC should always be powered by DC 3 3V even in sleep mode bibo ind Commen control signals User can use the pin to control buzzer power pin e LINK_5V USB client link status indicator pin Pull low with When the pin is high it means 100Kohm USB client port has been olugged in USB device a al SOM system DC power 3 3V input pin SYS VCC should always be powered by DC 3 3V even in sleep mode System Management Bus data pin Pull high with Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 UART2 RTS UART2 Request to Send signal Pull high with pin If user doesn t need UART2 100Kohm function user could use this pin as GPIO
37. ng No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling No pulling 2 SA SKT D8 IO PCMCIA CF data 8 SA SKT D1 CMCIA CF data 1 SA SKT D9 CMCIA CF data 9 SA SKT D2 CMCIA CF data 2 SA SKT D10 CMCIA CF data 10 SA SKT D3 CMCIA CF data 3 SA SKT D11 CMCIA CF data 1 1 SA SKT D4 CMCIA CF data 4 SA SKT D12 CMCIA CF data 12 SA SKT D5 CMCIA CF data 5 SA SKT D13 CMCIA CF data 13 SA SKT D6 CMCIA CF data 6 SA SKT D14 CMCIA CF data 14 SA SKT D7 CMCIA CF data 7 SA SKT D15 CMCIA CF data 15 SA SKT A14 CMCIA CF address 14 SA SKT A15 CMCIA CF address 15 SA SKT A12 CMCIA CF address 12 SA SKT A13 CMCIA CF address 13 SA SKT A10 CMCIA CF address 10 SA SKT A11 CMCIA CF address 11 SA SKT A8 CMCIA CF address 8 SA SKT A9 CMCIA CF address 9 SA SKT A6 CMCIA CF address 6 SA SKT A7 CMCIA CF address 7 SA SKT A4 CMCIA CF address 4 SA SKT A5 CMCIA CF address 5 SA SKT A2 CMCIA CF address 2 SA SKT A3 CMCIA CF address 3 SA SKT AO CMCIA CF address 0 SA SKT A1 CMCIA CF address 1 SA SKT A16 CMCIA CF address 16 SA SKT A17 CMCIA CF address 17 SA SKT A18 CMCIA CF address 18 SA SKT A19 CMCIA CF address 19 SA SKT A20 CMCIA CF address 20 SA SKT A21 CMCIA CF addres
38. nnects to PXA255 GPIO7 G15 pin This GPIO pin is available for user to use PXA_GP7 Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 D12 pin If user doesn t design the other LAN chip on CSB to expand LAN function user could use is pin as GPIO Advantech default function is used as external USB host solution IC IRQ The pin directly connects to PXA255 GPIO27 B9 pin If user USE ne design the other USB NODIS solution chip on CSB to expand USB host function user could use this pin B44 C954 IRQ A16 pin If user doesn t No pulling design 16C950 on CSB to expand COM function user could use this GPIO pin The pin directly connects to PXA255 GPIO81 F16 pin Ti No puting GPIO pin is available for user to use GPIO pin The pin directly connects to PXA255 GPIO82 E16 pin This No pulling GPIO pin is available for user to use GPIO pin The pin directly connects GPIO pin is available for user to use GPIO pin The pin directly connects GPIO pin is available for user to use Static chip selects Chip selects to static memory devices such as ROM and Flash Individually programmable in the memory configuration registers nBUF_CS1 Pull high nBUF CS1 can be used with variable latency I O with devices Advantech default uses this 100Kohm pin as storage flash chip select pin If no special application Advantech strongly suggest user to open this bin in
39. on Just float this pin N C For SOM 255F is Reserved N C For SOM 255F is Reserved l N C For SOM 255F is Reserved 16 bit R 4 video pixel input for No pulling RGB 5 6 5 mode or Y 7 video pixel input Nc No connection Just float this pin ZV15 No connection Just float this pin I C2 e CO Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 for YUV 4 2 2mode 16 bit R 3 video pixel input for No pulling HGB 5 6 5 mode or Y 6 video pixel input for YUV 4 2 2 mode 16 bit R 2 video pixel input for No pulling HGB 5 6 5 mode or Y 5 video pixel input for YUV 4 2 2 mode 16 bit R 1 video pixel input for No pulling HGB 5 6 5 mode or Y 4 video pixel input for YUV 4 2 2 mode 16 bit R O video pixel input for No pulling HGB 5 6 5 mode or Y 3 video pixel input for YUV 4 2 2 mode ZV14 ZV13 ZV12 ZV11 I2 fi 1 16 bit G 5 video pixel input for ZV10 RGB 5 6 5 mode or Y 2 video pixel input for YUV 4 2 2 mode an G 4 video pixel input for ZV9 RGB 5 6 5 mode or Y 1 video pixel input for YUV 4 2 2 mode 1 16 bit G 3 video pixel input for ZV8 RGB 5 6 5 mode or Y 0 video pixel input for YUV 4 2 2 mode 16 bit G 2 video pixel input for No pulling RGB 5 6 5 mode U 7 video pixel ZV7 input for YUV 4 2 2 mode or V 7 video pixel input for YUV 4 2 2 mode 16 bit G 1 video pixel input for No pulling RGB 5 6 5 mode U
40. onnect the pin to DS1804 2 pi CRT G AO The Green CRT output No pulling 160 VBRIR CS One of LCD inverter backlight No pulling brightness control signals VBHRIR C3 is used be chip select pin Advantech suggests to connect the pin to DS1804 7 162 CRT B AO The blue CRT output No pulling nVCONR INC signals nVCONR INC is used be increase decrease Wiper Control pin Advantech suggests to connect the pin to DS1804 1 pin 164 CRT HSYNC AO Horizontal sync for the CRT VCONR CS One of STN LCD contrast control No pulling signals VCONR CS is used be chip select pin Advantech suggests to connect the pin to DS1804 7 pin CRT VSYNC AO Vertical sync for the CRT o pulling 167 VCONR UnD One of STN LCD contrast control No pulling signals VCONR UnD is used be CRT SDA Up Down Control Advantech suggests to connect the pin to 2 pin DS180 Reserved for future use User can Pull high with connect the pin to CRT 12C data 4 71Kohm pin or just float it CRT CLK Reserved for future use User can Pull high with connect the pin to CRT 12C clock 4 71Kohm pin or just float it O BOin 24 bit TFT mode JNopulling O Bin24 bit TFT mode No pulling O bi No oO oO oO O o oO oO CO oO O LO o N O N r pulling B in 24 bit TFT mode Nopulling B in 24 bit TFT mode Nopulling B in 24 bit TFT mode No pulling o pulling o pullinc
41. oot loader manuals amp datasheets SOM A255x series CSB design guide S W utility upgrade utility testing utility SOM A255x series WinCE 4 2 BSP amp SDK Application note Testing Set It is designed for sample CSB or user own CSB mass production test It includes H W testing tools RS232 loop back testing tool ADAM 4520 for RS485 testing null MODEM cable JTAG cable USB ActiveSync cable Audio cable RS232 cable and RS485 cable SIN testing Utility Advantech developed testing Utility Testing process will be implemented by S W testing Utility and H W testing tools Document User s manual of SOM A255x series testing kit User can base on the documents to know how to implement testing process Software Development Tools Software tools is the complete package for user developed their target image to align with their target CSB and applications BSP Binary Board Support Package of target SOM Design in Kit User can integrate their target WinCE platform in components amp Apps amp drivers SDK For user target Apps development Reference Image Reference Image for the selected model of SOM Bootloader Bootloader for the SOM A255x series board d Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 Upgrade Utility User can use Upgrade utility to upgrade boot logo image amp bootloader Except the Design in package Advantech also supply
42. pin 100Kohm E UART1 TXD UART1 Transmit signal pin Pull high with 100Kohm UART1 DTR UART1 Data Terminal Ready Pull high with signal pin 100Kohm GND P Ground T mmm bir mune Mum 100Kohm d NN negative pin nLINK LED Link LED amp Activity LED Pull high with Active states indicate the good link 10Kohm for 10Mbps and 100Mbps operations It is also an active LED function when transmitting or receiving data Active states see LED configuration OP2 power up reset latch input This pin is used to control the forced or advertised operating mode of the DM9161 according to the Table A The value is latched into the DM9161 registers at power up reset BM BASE T transmit DataNNo pulling oositive pin nSPEED LED opeed LED Active states indicate Pull high with the 100Mbps mode Active states see LED configuration When bit 6 of Register 16 is set high it controls the SPEED LED as 100Base TX SD signal output For debug only OP1 power up reset latch input This pin is used to control the forced or advertised operating mode of the DM9161 according to the Table A The value is latched into the DM9161 registers at power up reset Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 136 GND P Grund bo 137 VDD ENA LCD power control signal User No pulling can use this pin to control the LCD logic power MOS switch to achieve powe
43. r ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 A14 DATA30 IO SoCPXA255systemdata 30 No pulling _ B15 DATA29 IO SoCPXA255systemdata 29 No pulling _ A15 DATA28 IO SoC PXA255 systemdata28 No pulling B16 DATA27 IO SoC PXA255 systemdata27 No pulling A16 DATA26 IO SoCPXA255systemdata 26 No pulling _ B17 DATA25 IO SoCPXA255systemdata25 No pulling _ EIL pur SDRAM RAS Connect to the row sse QBU SDRA co siis strobe RAS pins for No paling banks of SDRAM SDRAM CS for bank 0 Connect to dm SDCS the chip select CS pin for SDRAM No pullin For the PXA255 processor Peres nBUF SDCSO can be Hi Z munda dua nme BUF DQMO Connect to the data output mask No pulling enables DQM for SDRAM BUF_DQM2 Connect to the data output mask No pulling enables DQM for SDRAM DE n itt wo BUF_DQM3 Connect to the data output mask No pulling enables DQM for SDRAM PCMCIA wait input Driven low by Pull high the PCMCIA card to extend the nBUF_PWAIT with length of the transfers to from the 100Kohm PXA255 processor SDRAM Clock 1 Connect SDCLK 1 to the clock pins of SDRAM in bank pairs 0 1 They are driven by either the internal memory controller clock or the internal memory controller clock divided by 2 At reset all clock pins are free running BUF SDCLK at the divide by 2 clock speed and N o pulling 1 may be turned off via free running control register
44. r saving ee BASE T receive data No pulling negative pin NM ENA STN LCD VEE power control No pulling signal User can use this pin to control STN LCD VEE power MOS switch to achieve power saving BM dei E negative pin neal LCD back light inverter power No pulling control signal User can use this pin to control the LCD backlight inverter to achieve power saving 142 USB_N1 10 USB host porti D data line No pulling 143 USB N2 10 USB host port2 D data line Nopulling 144 USB P1 10 USB host porti D data line No pulling 445 USB P2 IO USB host port D data line No pulling 146 NC N C just float this pin L IN C just float this pin float this pin Sane ilii ae 100Kohm _ Term eene RT 100Kohm eS Nd signal pin 100Kohm Umum o eei ERU 100Kohm mmm o eren S 100Kohm CE mer opw ERU 10Kohm fel mers opro 10Kohm we eer eem d 10Kohm BUS EN d 10Kohm nVBRIR INC One of LCD inverter backlight No pulling brightness control Signals nVBRIR INC is used to increase or decrease Wiper Control Advantech suggests to connect the oin to DS1804 1 CRTR The red CRT output EAE A nVBRIR_UnD O One of LCD inverter backlight No pulling Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 brightness control signals nVBRIR_UnD is used be Up Down Control Advantech suggests to c
45. ries bases on triple Chips design concept SoC Intel XScale PXA255 Graphic chip SMI SM501 and Advantech I O enhancement chip EVA C210 The Block diagram is as following Hardware Reset Software Reset Sleep Resume 2 pin RS 232 Ful funcion RS 232 To X2 bus To X2 bus To X2 bus pers TTL Level COM4 EVA C210 To X2 bus COMI To X2 bus T aB 16 32 64MB 39 64 128MB M Systems c 2 pin RS232 RS 485 MB NOR Flas SDRAM NAND Flash th AEC Full function RS 232 Op TTL Level COM2 To X2 bus 10 100 BASE Ethernet PHY on Board Full function RS 232 To X2 bus TTL Level COM3 To X2 bus AC 97 Codec on Board To X2 bus nte One USB 1 1 Client Port Processor 10 Ae bus m 3V 65 mAH Rechargeable Coin Battery To X2 bus 4 wire Resistive T S Interface W T S Controller To X2 bus 24 bit LCD interface for 3 3V 5V panel To X2 bus Watchdog Time 8MB SDRA SM Bus for Battery Monitor To X2 bus AMI 120 Buffer Control DC Power Input 5V Input To X2 bus 3 3V Input Two PCMCIA CF Slots Adjustable LCD To X2 bus gt Contrast and 5V Inverter Interface X1 bus system Local bus AMI bus Brightness Voltage To X2 bus X2 bus SOM 200 T O bus X3 bus Feature extension bus Exp RISG Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 SoC Intel XScale PXA255 introduction Intel XScale PXA255 processor is continuing the advance in handheld multimedia functionality PXA255 is
46. ries component side JP1 CPU JTAG port X1 AMI Bus X2 SOM 200 I O Bus X3 Feature Ext Bus JP2 CPLD JTAG port Figure SOM A255F series solder side SOM Connector vendor table Connector vendor PN AMI bus X1 Matsushita electric works AXK600335 LTD SOM R200 X2 Standard Golden finger 200 pin Feature extension bus Matsushita electric works AXK600335 X3 LTD PXA255 JTAG pin header SOM CPLD JTAG port PS JP1 amp JP2 are 2 00 mm 6 1 pin headers CSB Mating Connector table Connector vendor PN AMI bus Matsushita electric works AXK500135 LTD X1 SODIMM 200 X2 QUASAR SYSTEM INC CA0075 200N31 Feature extension bus Matsushita electric works AXK500135 X3 LTD RISG Express Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 Advantech RISC SOM A200 ultra low power series SOM A2552 SOM A2558 and SOM A255F all follow the same pin definition in X1 X2 and X3 So users could design their own CSB to be compatible with all advantech RISC ultra low power series SOM easily In this way users CSB will be powerful upgrade capability amp option choice X1 AMI bus AMI bus connector is PXA255 ARM bus It includes complete system address lines data lines GPIOs for interrupt source and Chip select pins nCS Users could use this bus to extend any other IC controller on CSB to implement the function which SOM modules not
47. right channel nSA SKT1 CD Hu CMCIA CF slot 0 card detect pin No pulling LINEOUT L AO Audio line Out left channel E P L 57 nSA SKTO CD pie slot 1 card detect pin No pulling 1 AC97 LINEIN dal tons line input right channel R AC97 LINEIN lali line input left channel nSA SKTO CE bd aptid slot 0 card enable pin No pulling 1 MIC IN Al First Microphone input nSA SKT1 CE slot 1 card enable pin No pulling 2 2 EI GND P Ground s al L i Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 SA SKT1 VCC CMCIA CF slot 1 power pin DEREN B P nSA SKTO VS PCMCIA CF slot 0 voltage sense Pull high with 1 pin 1 10Kohm 7 nSA SKT1 VS PCMCIA CF slot 1 voltage sense Pull high with 1 pin 1 10Kohm nSA SKTO CE PCMCIA CF slot 0 card enable pin No pulling 2 2 SA SKT1 RDY PCMCIA CF slot 1 ready pin Pull high with 10Kohm 2 in 2 o N N 10Kohm pin 2 10Kohm 2 pin 2 10Kohm Go 10Kohm PCMCIA CF slot 1 reset pin 10Kohm P 4 SA SKT1 RST 5 nSA SKTO W AIT E 76 uer Anus ME AA slot 1 card detect pin No pulling 2 2 i 77 nSA SKT1 W PCMCIA CF slot 1 wait signals Pull high with Driven low by the PCMCIA card to 10Kohm extend the length of the transfers to from the PXA255 processor PCMCIA CF slot 0 card detect pin No pulling 2 IO Select 16 input Acknowledge Pull high with from the PCMCIA card that the
48. ruction fetch nRESET OUT is also asserted for soft reset events sleep watchdog reset or GPIO reset P Grund J4A J 3 A4 PWR EN Power Enable for the power Pull high with remove power to the core because the system is entering mode 3 0V li ion coin battery abnormally and causes a reset When nRESET is driven high the processor starts execution from OND supply output When negated it 100Kohm signals the power supply to nRESET System hardware reset input pin Pull high with Falling edge triggered Hard reset 10Kohm input Level sensitive input used to start the processor from a known address Assertion causes the current instruction to terminate i B address 0 nRESET must remain low until the power supply is stable and the internal 3 6864 MHz oscillator has stabilized System DC input indicator pin Pull low with When the pin is low it means 1Kohm system is powered by external DC power source If user target device is not power by battery use could S Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V1 00 use this pin as GPIO The pin pC connects to SoC PXA255 GPIO16 SOM system DC power 5V input pin SYS_VCC should always be powered by DC 5V even in sleep mode SOM system DC power 3 3V input pin SYS_VCC should always be powered by DC 3 3V even in sleep mode SOM system DC power 5V input pin SYS_VCC should a
49. s 21 SA SKT A22 CMCIA CF address 22 nSA SKT IOR N N N C3 7 x Ege pa fs Pe fed fad flied ne ae need ee a Sg o o O G Qc 38 i Cg Oo gt 3 o P Oo Q Q O O c space al Your ePlattorm Partner AD ANT ECH User s Manual for Advantech SOM A255F series module V 1 00 41 SA SKT A24 IO PCMCIA CF address 24 No pulling XP Al 4 wires resistive touch screen No pulling signals X Position Input nSA SKT WE PCMCIA write enable output No pulling Performs writes to PCMCIA memory and to PCMCIA attribute space Also used as the write enable signal for Variable Latency I O eM anas Ye Postiontnput o signals Y Position Input nSA SKT IOW PCMCIA I O write signal output No pulling Performs write transactions to PCMCIA I O space Io 4 wires resistive touch screen signals X Position Input 47 nSA SKT RE PCMCIA Register select output No pulling G Indicates that the target address on a memory transaction is attribute space Has the same timing as the address bus IN 4 wires resistive touch screen signals Y Position Input 49 SA SKT A23 IO PCMCIA CF address 23 No pulling 50 GND P Grund b 51 SA SKT A25 IO PCMCIA CF address 25 No pulling down control nSA SKT OE PCMCIA output enable output No pulling imd Reads from PCMCIA memory and to PCMCIA attribute space LINEOUT R AO Audio line Out
50. s CSB design guide to know how to wire User could check appendix about SOM A255F memory map to know how to control If user wants to connect CSB to LVDS type LCD user could reference Advantech SOM A255x series CSB design guide to design LVDS Transmitter on CSB SOM A255x series only support 1 channel LVDS LCD panel The sample images of SOM A2552 SOM A255F series could support 4 kinds of display modes e 320x240 TFT In SOM A2552 amp SOM A255F module user CAN T verify the performance by Advantech LCD kit LCD A057 STQ1 0 Because SOM A2552 amp SOM A255F supports 320x240 TFT mode but LCD A057 STQ1 0 is 320x240 STN panel e 640x480 TFT user could verify the performance by Advantech LCD kit LCD A064 TTV1 0 e 800x600 TFT user could verify the performance by Advantech LCD kit LCD A104 TTS1 0 e 1024x768 TFT user could verify the performance by Advantech LCD kit LCD A150 TTX2 0 Except 320x240 TFT mode user could verify the LCD out function by Advantech LCD kit Advantech LCD kit LCD A057 STQ1 0 is 320x240 STN type LCD not TFT type so user couldn t verify the 320x240 TFT function by sample images The sample images of SOM A2558 series could support 4 kinds of display modes e 320x240 STN User can use Advantech LCD kit LCD A057 STQ1 0 to evaluate the LCD out performance of SOM A2558 platform 640x480 TFT User can use Advantech LCD kit LCD A064 TTV1 0 to evaluate the LCD out performance of SOM A2558 platform 2
51. ss 21 No pulling ADDR23 O SoC PXA255 system address 23 No pulling DATAO IO SoC PXA255 system data0 No pulling DATA1 IO SoC PXA255 system data 1 No pulling DATA2 IO SoC PXA255 system data2 No pulling DATA3 IO SoCPXA255system data 3 No pulling A31 DATA4A IO SoCPXA255systemdata 4 No pulling B32 DATAS IO SoCPXA255systemdata5 No pulling A32 DATAG6 IO SoCPXA255systemdata6 No pulling B33 DATA7 IO SoCPXA255systemdata7 No pulling A33 DATA16 IO SoC PXA255 system data 16 No pulling B34 DATA17 IO SoC PXA255 system data 17 No pulling A34 DATA18 IO SoCPXA255 system data 18 No pulling B35 DATA19 IO SoC PXA255 system data 19 No pulling A35 DATA20 IO SoC PXA255 system data 20 No pulling B36 DATA21 IO SoCPXA255system data21 No pulling A36 DATA22 IO SoCPXA255 system data 22 No pulling BMILLN AG Cg SDRAM CAS Connect to the REF address strobe CAS No puling for all banks of SDRAM SDRAM CS for banks 2 Connect to ue SDCS the chip select CS pins for SDRAM No pullin For the PXA255 processor nSDCSO puring can be Hi Z Nsdcs1 3 cannot BUF DQM1 Connect to the data output mask No pulling enables DQM for SDRAM SDRAM Clock 2 Connect BUF SDCLK 2 to the clock pins of BUF SDCLK SDRAM in bank pairs 2 3 They are ooun 2 driven by either the internal memory P controller clock
52. wo ports USB Host Controllers with PHY which are compliant with USB Spec Rev 1 1 PCI Bus Controller FPCI which is compliant with PCI Spec Rev 2 2 One port Ethernet 10 100 MAC Controller Interrupt Controller Power Management Unit with Normal Sleep Deep Sleep mode and Power off mode 93 3V power supply with 3V 5V tolerant 256 BGA package System Memory SOM A255F SDRAM can be configured as 4 8 16 32 64 128 256MB Users can base on their requirement to reconfigure the SDRAM size There are two functions Flash on SOM A255F series One is Boot Flash the other is Storage Flash Boot Flash is 1MB NOR flash In standard SOM A255F series product Advantech will pre install the WinCE bootloader in it Storage Flash is used to save image amp user APs Storage Flash size is also reconfigurable The Storage Flash is M system Flash Storage Flash size could be 0 16 32 64 MB SOM A255F series have Multiple boot options through the on board Flash or Compact Flash Card CFC for easy maintain and cost saving If Storage Flash is OMB that means user should put the image in Compact Flash Card CPLD SOM A255F series have one CPLD on board The CPLD take charges of the following function e System memory assignments e O control e RTC control Base on Advantech policy Advantech won t release the CPLD code to user In fact when user designs their own target carrier board they don t need to know the CPLD code Advantech will

SOM-A255F series user`s manual V1.00

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