PCL 836 Multifunction counter timer and digital I/O add on card for
Contents
1. rn PWM function control logic PWM PWM base clock out Counter 3 PWM cycle period negative period Cycle period Example Config PWM output 1 1 Write the value to BASE 18H for setting counter 0 PWM mode 2 Program the counter 0 in 8254 operating mode 5 3 Program counter 0 value for PWM negative period 4 Write the value 03H to 21 for setting counter 3 in PWM mode 5 Program the counter 3 in 8254 operating mode 2 6 Program counter 3 value for PWM one cycle period T Program the Fout 0 in 8254 operating mode 2 for PWM base clock 8 Program the Fout 0 output frequency value Program in C outportb BASE 18 0x03 Set counter 0 in PWM mode Chapter 4 Operation 15 16 outportb BASE 11 0x3A outportb BASE 08 OxFAJ outportb BASE 08 0x00 outportb BASE 21 0x03 outportb BASE 15 0x34 outportb BASE 08 outportb BASE 08 0x03 outportb BASE 03 0x34 outportb BASE 00 0x0A outportb BASE 00 0x00 Set counter 0 in 8254 operating mode 5 Set low byte value for PWM negative period Set high byte value for PWM negative period Set counter 3 in PWM mode Set counter 3 in 8254 operating mode 2 Set low byte value for PWM a cycle period Set high byte value for PWM a cycle period Set Fout 0 in 8254 operating mode 2 for PWM base clock Set Fout 0 frequency value in low byte Set Fout 0 frequency value in hig2. PCL 836 Multifunction counter timer and digital I O add on card for PC XT AT and compatibles Copyright This documentation is copyrighted 1997 by Advantech Co Ltd rights are reserved Advantech Co Ltd reserves the right to make improvements in the products described in this manual at any time without notice No part of this manual may be reproduced copied translated or transmitted in any form or by any means without the prior written permission of Advantech Co Ltd Information provided in this manual is intended to be accurate and reliable However Advantech Co Ltd assumes no responsibility for its use nor for any infringe ments of the rights of third parties which may result from its use Acknowledgments PC LabCard is a trademark of Advantech Co Ltd IBM and PC are trademarks of International Business Machines Corporation brand and product names appearing in this document are registered trade marks or trademarks of their respective holders No 2003836010 2nd Edition Printed in Taiwan May 1997 Contents Introduction re 1 1 1 Introduction incanta 2 1 2 Key Features Uis 2 L3 AppIICatIOBS vate peter nega st uude en eer ete nei in 2 1 4 Specifications 3 1 5 Block Diasrami ao etur To aset taa capa en aka 4 5 Z 1 Imtial Inspectioli arnie 6 2 2 Switch and Jumper Settings esse 6 2 3
3. Hardware installation is now complete Proceed to install the software driver PCL 836 User s Manual CHAPTER Register Structure and Format 3 1 I O Port Address 12 The PCL 836 uses 32 consecutive addresses in the PC I O address space The base or start address BASE is selected by the DIP switch SW1 Each device on the PCL 836 has its own I O location as follows PC AT users should note that all ports are 8 bits one byte wide and should perform byte oriented read write operations rather than word 16 bits operations When performing consecutive byte transfers to the same I O port on the PC AT the PC AT Technical Reference Manual recommends the following coding in assembly language This is required to allow sufficient recovery time for the AT I O circuit OUT IO ADDR AL write low byte JMP NEXT delay NEXT MOV AL AH fetch high byte OUT IO_ADDR AL write high byte PCL 836 User s Manual PCL 836 1 Port Address Address Read O Bigiaiputandouiput D O low byte low byte Counter lock input mode Frequency output enablerdisable Note N U not used 8254 chip and chip 2 are clock generators 8254 chip 3 and chip 4 are counters Chapter 3 Register Structure and Format 3 9 Counter control register format 5 18 23 07 06 05 04 D3 02 01 DO Counter
4. 30 PCL 836 Software Driver 31 Function call descriptions eese eere eere 32 D eviceOp n Red E AR LE alan 32 DeviceGlose nen Tre RE DR 33 CounterGonti es nme 34 CounterEventStart 35 CounterEventRead 36 CounterEreqstart oc 3e eet 37 edid eto ipee t ote 38 CounterPulseStart edes 39 CounterReSet oett euet e eu epe ces 40 FreqQutSt art nre nea ete i ae ee e Pe Ee tnde 4l EreqOutReset eee 42 DioReadPortByte aaa 43 DioWritePortByt nananana 44 Di R adBit hehe tee rete det eher ter tate uns 45 DIO WIE Bit et t ecd ee EQ e 46 DioGetCurrentDOB yte 47 DioGetCurrentDOBit a 48 Introduction CHAPTER 1 1 Introduction The PCL 836 is a multifunction counter timer and digital I O add on card for IBM PC XT AT and compatibles It provides six 16 bit down counters a 10 MHz crystal oscillator timebase with divider and general purpose 16 bit TTL input and output ports Four Intel 8254 or compatible counter timer chips are used for all counting and timing functions 1 2 Key Features 6 independent 16 bit counters 10 MHz maximum input frequency 10 MHz on board timebase Binar
5. these problems Chapter 1 General Information 3 1 5 Block Diagram 1 Im LO i IFF EH ACT 26 REVAL AMI 4 PCL 836 User s Manual Installation CHAPTER 2 1 Initial Inspection 2 9 You should find PCL 836 card and this user s manual inside shipping container The PCL 836 has been inspected and tested both physically and electronically before shipment It should be free of marks and scratches and in perfect working order upon receipt Check the unit for any signs of shipping damage when unpacking If there is any damage to the unit or if it fails to meet specifications notify our service department or your local sales representative immediately Call the carrier and retain the shipping carton and packing material for inspection by the carrier We will arrange to repair or replace the unit Remove the PCL 836 interface card from its protective packaging Keep the anti vibration package Whenever you are not using the card store it in the package for protection Discharge any static electricity that may have built up within your body by touching an unpainted surface on the back of your computer system before you handle the board You should avoid contact with materials that create static electricity such as plastic vinyl and Styrofoam The board should be handled only by the edges to avoid static electric discharge that could damage the integ
6. 00 5 1 SCO 2 M1 MO BCD Legend SC1 amp SCO Select counter 1 5 0 Counter 0 0 0 0 1 1 1 0 2 1 1 ead back command 18 PCL 836 User s Manual RW1 amp RWO Select the Read Write operation RW1 RWO Operation 0 0 counter latch 0 1 Read Write LSB 1 0 Read Write MSB 1 1 Read Write LSB first then MSB M2 MI and Select the operating mode 2 1 MO Mode 0 interrupts terminal count 1 programmable one shot 3 Square wave rate generator 4 Software triggered strobe gt lt lt 0 1 0 2 Rate generator 1 0 1 5 Hardware triggered strobe BCD Select binary or BCD counting BCD Type 0 Binary counter 16 bits 1 Binary coded decimal BCD counter If the module is set to be binary the count can be any number from up to 65535 If the module is set to be BCD binary coded decimal the count can set as any number from 0 to 9999 If both SC1 and SCO bits are set to 1 the counter control register is in read back command The data format of the control register then becomes BASE D7 D6 05 04 03 02 01 00 1 1 CNT STA C2 C1 C0 X Chapter 5 Programmable Timer Counter 19 20 Legend 0 latch count of selected counter s STA 0 latch status of selected counter s C2 C1 and Select counter for a read back operation C2 1 select counter 2 1 sele
7. 1 Write 01H to BASE 18H to enable counter 0 digital noise filter 2 Program counter 0 in 8254 operating mode 2 3 Program Fout 0 in 8254 operating mode 2 4 Set the Fout frequency value Chapter 4 Operation 13 program in C outportb BASE 18 0x01 Enable counter 0 digital filter outportb BASE 11 0x34 Set counter 0 in 8254 operating mode2 outportb BASE 03 0x34 Set Fout 0 in 8254 operating mode 2 outportb BASE 00 0x0A Set Fout frequency value in low byte outportb BASE 00 0x00 Set Fout 0 frequency value in high byte The filter sample clock Fout 10 MHz 10 1 MHz The filter sample clock is 1 MHz and the period is 1 us thus 1x7 7 us The minimum clock input high low period must be gt 7 ps For more detailed information about how to program the digital noise filter refer to the example program on the utility disk 14 PCL 836 User s Manual 4 3 Pulse width modulation PWM function The PWM function is very widely used in today s applications The PCL 836 provides 3 PWM output channels When the PWM function is enabled the PCL 836 will combine two counters as a PWM channel and the counter in chip 3 must be programmed in mode 5 the counter in chip 4 must be programmed in mode 2 and the counter in chip 1 must be programmed in mode 3 The PWM period and duty cycle are decided by the value we assign to the counters in chip 3 chip 4 and chip 1 Ko Clock In Counter 0 Out PWM negative period
8. Connector Pin Assignments ecce ee eeee eren 8 2 4 Hardware Installation 10 Register Structure and Format 11 3 1 Port Address 12 PCL 836 Port Address 13 3 2 Counter control register format BASE 18 23 14 3 3 Digital Input Output cec eere eere eee eer enue 15 oir n 17 4 1 Counter modes 18 4 2 Digital noise filter cer ecce ee eere eee enee 19 4 3 Pulse width modulation PWM function 21 5 6 Programmable Timer Counter 23 5 1 The Intel 8254 24 5 2 Counter Read Write and Control Registers 24 5 3 Counter Operating Modes ee eere 27 5 3 1 Mode 0 Stop on terminal 27 5 3 2 Mode 1 Programmable 27 5 3 3 Mode 2 Rate generator sese 27 5 3 4 Mode 3 Square wave 28 5 3 5 Mode 4 Software triggered strobe 28 5 3 6 Mode 5 Hardware triggered strobe 28 5 4 Counter operations ce ee eee e esee etes esee s ee enus 29 5 4 1 Read Write Operation 29 5 4 2 Counter read back command sss 29 5 4 3 Counter latch operation
9. Lost base address 5 Invalid counter channel 8 Invalid frequency range Example error code CounterConfig 3 5 0 1000 Enables the filter function and the maximum input frequency is 1 kHz error_code CounterConfig 3 5 0 0 Disables filter function PCL 836 User s Manual CounterEventStart This function starts the counter counting Prototype ULONG CounterEventStart USHORT DeviceNumber USHORT Counter Parameters DeviceNumber The board number of PCL 836 from 0 9 Counter The counter number of PCL 836 from 0 5 Returned value 0 Success 1 Invalid device number 4 Lost base address 5 Invalid counter channel Example error code CounterEventStart 3 5 Chapter 6 PCL 836 Software Driver 29 CounterEventRead This function returns the counter value Prototype ULONG CounterEventRead USHORT DeviceNumber USHORT Counter USHORT Overflow ULONG Count Parameters DeviceNumber The board number of PCL 836 from 0 9 Counter The counter number PCL 836 from 0 5 Overflow The status of counter overflow 1 for 32 bit counter overflow otherwise Count The counter value Returned value 0 Success 1 Invalid device number 4 Lost base address 5 Invalid counter channel Example error code CounterEventRead 3 5 amp Overflow amp Count 30 PCL 836 User s Manual CounterFreqStart This function configures the specified counter for frequency measure ment then starts the f
10. ULONG DioGetCurrentDOByte USHORT DeviceNumber USHORT Port USHORT Value Parameters DeviceNumber Board number of PCL 836 from 0 9 Port Port number of PCL 836 from 0 1 Value 8 bit digital data of specified output port Returned value 0 Success 1 Invalid device number 4 Lost base address 6 Invalid input parameter 9 Invalid port channel Example error code DioGetCurrentDOByte 3 0 amp Value Chapter 6 PCL 836 Software Driver 41 42 DioGetCurrentDOBit This function returns digital output data from the specified digital I O port Prototype ULONG DioGetCurrentDOBit USHORT DeviceNumber USHORT Port USHORT Bit USHORT State Parameters DeviceNumber Board number of PCL 836 from 0 9 Port Port number of PCL 836 from 0 1 Bit 8 bit digital data of specified output port 0 7 State Bit data from the specified port Returned value 0 Success 1 Invalid device number 4 Lost base address 6 Invalid input parameter 9 Invalid port channel Example error_code DioGetCurrentDOBit 3 0 5 amp State Prosoft 095 934 0636 4 095 934 0640 BBS 095 336 9500 Web http www prosoft ru E mail root prosoftmpc msk su 117313 81 819 395 3790 PCL 836 User s Manual 3439 49 3459
11. following trigger The current count can be read at any time without affecting the one shot pulse The one shot is retriggerable thus the output will remain low for the full count after any rising edge at the gate input 5 3 3 Mode 2 Rate generator The output will be low for one period ofthe input clock The period from one output pulse to the next equals the number of input counts in the counter register If the counter register is reloaded between output pulses the present period will not be affected but the subse quent period will reflect the value The gate input when low will force the output high When the gate input goes high the counter will start from the initial count Therefore the gate input can be used to synchronize the counter When this mode is set the output will remain high until the count register is loaded and the output can also be synchronized by software Chapter 5 Programmable Timer Counter 21 22 5 3 4 Mode 3 Square wave generator Mode 3 is similar to mode 2 except that the output will remain high until one half of the count has been completed for even numbers and will go low for the other half of the count This is accomplished by decreasing the counter by two on the falling edge of each clock pulse When the counter reaches the terminal count the state of the output is changed the counter is reloaded with the full count and the whole process is repeated If the count is odd and the output i
12. 14 GND 5V CN2 DOI DO3 DOS DO7 DO9 DO13 0015 GND 12V DI3 DI5 DI7 DI9 DI11 DI13 DI15 GND 12V Chapter 1 General Information 9 9 4 Hardware Installation 10 Warning TURN OFF your PC power supply whenever installing or removing the PCL 836 or connecting and disconnecting cables Installing the card in your computer 1 Turn off the computer and all peripheral devices such as printers and monitors 2 Disconnect the power cord and any other cables from the back of the computer Turn the system unit so he back of the unit faces you 3 Remove the system unit cover see your computer user s guide if necessary 4 Locate the expansion slots at the rear of the unit and choose an unused slot 5 Remove the screw that secures the expansion slot cover to the system unit Save the screw to secure the interface card retaining bracket 6 Carefully grasp the upper edge of the PCL 836 card Align the hole in the retaining bracket with the hole on top of the expansion slot and align the gold striped edge connector with the expansion slot Socket Press the board firmly into the socket 7 Replace the screw in the expansion slot retaining bracket 8 Attach necessary accessories DB 37 pin cable or connector adapter etc to the interface card according to your application require ments 9 Replace the system unit cover Connect the cables you removed in step 2 Turn on the computer
13. 5 014 013 D6 D5 04 D3 DI15DI14DI13DI12DI11 D7 D6 05 D4 D3 007 D06 005 004 D6 D5 04 D3 DO15 DO14 DO13 0012 0011 3 Register D2 012 D2 D110 D2 D02 D2 DO10 un E D01 DO9 Structure and Format DO DIO DO 018 DO DOO DO DO8 15 16 PCL 836 User s Manual Operation CHAPTER 4 1 The PCL 836 is a multifunction counter timer and digital I O add on card for IBM PC XT AT and compatibles There are four 8254 counter chips and 16 channels of TTL input output on board and each 8254 counter chip has 3 multifunction counters Two counter chips chip 1 and chip 2 are for the digital noise filter s sampling clock or frequency out and the others chip 3 and chip 4 are for the counters For each counter clock input pin in chip 3 and chip 4 the PCL 836 features Schmitt trigger and a digital noise filter for noise immunity Counter modes 12 The PCL 836 has six multifunction counters Users can program each counter in a different mode for their applications Event counter Digital one shot Programmable rate generator Square wave generator etc For more information about programming the 8254 counter chip refer to chapter 5 or consult 8254 chip product documentation Counters 0 and 2 are located in 454 chip 3 and counters 3 4 and 5 are located in 8254 chip 4 PCL 836 User s Manual 4 9 Digital noise filter Noise
14. 8 PCL 836 User s Manual DioReadBit This function returns the bit state of digital input from the specified digital I O port Prototype ULONG DioReadBit ULONG DeviceNumber USHORT Port USHORT Bit USHORT State Parameters DeviceNumber The board number of PCL 836 from 0 9 Port The port number of PCL 836 from 0 1 Bit The bit number from 0 7 State The bit data read from the specified port 0 or 1 Return value 0 Success 1 Invalid device number 4 Lost base address 6 Invalid Input parameter 9 Invalid port channel Example error code DioReadBit 3 0 5 amp State Chapter 6 PCL 836 Software Driver 39 DioWriteBit This function writes the bit state of digital output to the specified digital I O port Prototype ULONG DioWriteBit ULONG DeviceNumber USHORT Port USHORT Bit USHORT State Parameters DeviceNumber The board number of PCL 836 from 0 9 Port The port number of PCL 836 from 0 1 Bit The bit number from 0 7 State The bit data read from the specified port O or 1 Returned value 0 Success 1 Invalid device number 4 Lost base address 6 Invalid input parameter 9 Invalid port channel Example error code DioWriteBit 3 0 5 1 Note The previous state of the digital port should be stored with the configuration data 40 PCL 836 User s Manual DioGetCurrentDOByte This function returns the digital output data from the specified digital I O port Prototype
15. Invalid counter channel 6 Invalid input parameter 8 Invalid frequency range Example error code CounterPulseStart 3 1 0 5 0 01 Chapter 6 PCL 836 Software Driver 33 34 CounterReset This function resets the counter to power on state Prototype ULONG CounterReset USHORT DeviceNumber USHORT Counter Parameters DeviceNumber The board number of PCL 836 from 0 9 Counter The counter number PCL 836 from 0 5 Returned value 0 Success 1 Invalid device number 4 Lost base address 5 Invalid counter number Example error code CounterReset 3 5 PCL 836 User s Manual FreqOutStart This function configures the specified counter for frequency output then starts freqrency output Prototype ULONG tart USHORT DeviceNumber USHORT Counter FLOAT Fout Parameters DeviceNumber The board number of PCL 836 from 0 9 Counter The counter number of PCL 836 from 0 5 Fout The frequency of output in Hz from 153 Hz SMHz Returned value 0 Success 1 Invalid device number 4 Lost base address 5 Invalid counter number 8 Invalid frequency range Example error_code FreqOutStart 3 5 10000 Chapter 6 PCL 836 Software Driver 35 36 FreqOutReset This function stops the frequency from the specified counter Prototype ULONG FreqOutReset USHORT DeviceNumber USHORT Counter Parameters DeviceNumber The board number of PCL 836 from 0 9 Counter The count
16. X X X X X 0 0 clock without digital filter X X X X X 0 1 External clock with digital filter X X X X X X 1 0 clock X X X X X X 1 1 PWM mode D2 controls the external clock D2 0 count the positive edge D2 1 count the negative edge External clock without digital filter In this mode the counter s clock input direct input from connector and the maximum input frequency can be up to 10 MHz External clock with digital filter In this mode the counter s clock input is passed through the digital filter and the maximum input frequency depends upon the filter clock Internal clock In this mode the counter s clock input is connected to chip 1 or 2 Fout PWM mode In this mode the counter is configured for PWM function Frequency output control register BASE 24 D7 D6 D5 D4 D3 D2 D1 DO X X Fout6 Fout5 Fout4 Fout2 Fout 1 Control the frequency output Dn 0 frequency output is off 3 state Dn 1 Frequency output is on 14 PCL 836 User s Manual 3 3 Digital Input Output The PCL 836 suffers 16 bits of TTL compatible digital input and output These digital input output ports are at address BASE 16 and 17 The data format of each port is as following Read Operation Base Address 16 D I low byte Base Address 17 D I high byte Write Operation Base Address 16 D O low byte Base Address 17 D O high byte Chapter D6 D5 04 DI7 016 01
17. ct counter 1 1 select counter 0 If SC1 and SCO are both set to 1 and STA is set to 0 the counter read write register selected by C2 to CO contains a return status byte The data format of the counter read write register then becomes 07 06 05 04 03 02 01 00 OUT NC RW1 2 1 MO BCD Legend OUT Counter output current state NC Null count indicates when the last count written to the counter register has been loaded into the counting element PCL 836 User s Manual 5 3 Counter Operating Modes 5 3 1 Mode 0 Stop on terminal count The output will initially be low after setting this mode of operation After the count is loaded into the selected count register the output will remain low and the counter will count When the terminal count is reached the output will go high and remain high until the selected counter is reloaded with the mode or a new count is loaded The counter continues to decrement after terminal count has been reached Rewriting acounter register during counting generates the following results 1 Write the first byte stops the current counting 2 Writing the second byte starts the new count 5 3 2 Mode 1 Programmable One Shot The output will go low on the count following the rising edge of the gate input The output will go high on the terminal count If a new count value is loaded while the output is low it will not affect the duration of the one shot pulse until the
18. er number PCL 836 from 0 5 Returned value 0 Success 1 Invalid device number 4 Lost base address 5 Invalid counter number Example error code FreqOutReset 3 5 PCL 836 User s Manual DioReadPortByte This function reads the current digital input value from the specified digital I O port Prototype ULONG DioReadPortByte USHORT DeviceNumber USHORT Port USHORT Value Parameters DeviceNumber The board number of PCL 836 from 0 9 Port The port number of PCL 836 from 0 1 Value The data of digital input Returned value 0 Success 1 Invalid device number 4 Lost base address 9 Invalid port channel Example error code DioReadPortByte 3 0 amp Value Chapter 6 PCL 836 Software Driver 37 DioWritePortByte This function writes digital output data to the specified digital port Prototype ULONG DioWritePortByte USHORT DeviceNumber USHORT Port USHORT Mask USHORT State Parameters DeviceNumber The board number of PCL 836 from 0 9 Port The port number of PCL 836 from 0 1 Mask Specifies which bit s of data should be sent to the digital output port and which bits remain unchanged State New digital logic state Returned value 0 Success 1 Invalid device number 4 Lost base address 5 Invalid counter number Example error code DioWritePortByte 3 0 OxOF State Note The previous state of the digital port should be stored with the configuration data 3
19. er of PCL 836 from 0 9 BaseAddress The base address of PCL 836 Returned value 0 success 1 Invalid base address 2 Invalid device number 3 Device is busy Example error_code DeviceOpen 3 0x200 note 1 The user has to call the DeviceOpen function before the other functions 2 After the I O operations have been done the user has to call DeviceClose to close this device PCL 836 User s Manual DeviceClose This function resets the PCL 836 to default status Prototype ULONG DeviceClose USHORT DeviceNumber Parameters DeviceNumber The board number of the PCL 836 from 0 9 Returned value 0 Success 1 Invalid device number 4 Lost base address Example error code DeviceClose 3 Chapter 6 PCL 836 Software Driver 27 28 CounterConfig This function configures the counter mode of a specified counter Prototype USHORT CounterConfig USHORT DeviceNumber USHORT Counter USHORT CounterEdge FLOAT MaxInFreq Parameters DeviceNumber The board number of PCL 836 from 0 9 Counter The counter number PCL 836 from 0 5 CounterEdge The count edge 0 for positive edge 1 for negative edge MaxInFreq The maximum input frequency of the counter The driver will automatically set the filter clock according to fMaxInFreq If fMaxInFreq is set to Zero the driver will disable the filter function The maximum frequency is 312 kHz Returned value 0 Success 1 Invalid device number 4
20. h byte The PWM base clock Fout 0 10Mhz 10 1Mhz For instance if the Fout 0 is programmed as a 1 mHz clock output and the counter 0 value is 250 the counter 3 value is 1000 then The period of the PWM output will be 1000 X 1us 1000 The negative period will be 250 X 1us 250 us For complete example program please reference the demo program in the utility disk PCL 836 User s Manual CHAPTER Programmable Timer Counter 5 1 The Intel 8954 The PCL 836 uses 4 Intel 8254 programmable interval timer counters The 8254 is a very popular timer counter device consisting of three independent 16 bit down counters Each counter has a clock input control gate and an output It can be programmed to have a count from 2 up to 65535 5 9 Counter Read Write and Control Registers The 8254 programmable interval timer uses four registers for each chip The functions of each register are as follows BASE 0 4 8 12 Counter 0 Read Write BASE 1 5 9 13 Counter 1 Read Write BASE 2 6 10 14 Counter 2 Read Write BASE 3 7 11 15 Counter Control Word Since the 8254 counter uses a 16 bit structure each section of read write data is split into the least significant byte LSB and the most significant byte MSB It is important to ensure that your read write operations are in pairs and to keep track of the byte order The data format of the control register is BASE D7 D6 D5 D4 D3 D2 D1
21. ice routine and enabled the 8259 mask register for the level selected It is not possible to set up an interrupt service routine using BASIC and it is usually necessary to use assembly language Chapter 1 General Information 7 2 3 Connector Pin Assignments There is one DB 37 connector and two 20 pin male connectors on the PCL 836 The connector CN3 is a counter I O interface while the connector CN1 and CN2 are digital output and digital input respective ly CNI Digital output CN2 Digital input CN3 Counter signals and interrupt The following diagrams illustrate the pin assignment of each connec tor Legend GATE Gate of counter CLK Input of counter clock OUT Output of counter PWM PWM out Fout Frequency out DO Digital output DI Digital input INTEN Interrupt enable INT Interrupt input GND Ground Connector CN3 Counter signals and Interrupt Signals N GATEO 24 o 2 o ETS GND GATE1 o 9 SO o 9 GNR GATE2 o eT our o 55 GATE3 o 77 0013 J 9 GND 28 0014 GATE4 10 o 29 5 9 GATES 12 9 30 OUTS5 INT 131 9 H pwmo 14 9 H2 INTEN PWM2 o9 EMMI Fouto 18 o 9 3 H5 Fouti FOUT2 17 18 5 o 36 FOUTS 19 gem FOUTS 8 PCL 836 User s Manual Connector CNI Digital Output DIO DI2 DI4 DI6 DIS DI10 DI12 DI
22. immunity is the most important requirement for reliable counter operation The PCL 836 conditions the clock input signals with a Schmitt trigger and a programming digital filter This filter reduces dips and spikes by sampling the clock input with a programmable filter sampling clock The filter output waveforms change only when an input has the same value for seven consecutive sampling edges The filter thus rejects noise or pulses shorter than seven sampling clock periods You can optimize noise immunity by selecting a lower sampling frequency that is compatible with the highest input rate that you expect For high speed clock input users can disable the digital filter for their applications Each counter has its own noise filter Users can program different filter sampling rates for different clock event inputs When the noise filter is enabled the 8254 s chip 1 and chip 2 have to set it in square wave mode to provide the digital noise filter s sampling clock Counter Digital lock i t noise Counter filter Filter sampling clock PUL UU UUUUUI Filter sampleing clock input lt lt noise Counter clock input before filter noise be filtered E Counter clock input after filter Example Enable the PCL 836 counter 0 digital noise filter
23. ite registers have separate addresses and each control byte specifies the counter that it applies to through SC1 and SCO no instructions on the operating sequence are required Any programming sequence following the 8254 convention is acceptable There are three types of counter operation read load LSB read load MSB and read load LSB followed by MSB It is important to ensure your read write operations are in pairs and to keep track of the byte order 5 4 9 Counter read back command The 8254 counter read back command allows users to check the count value programmed mode and the current states of the OUT pin and Null Count flag of the selected counter s The command is written into the control word register and has the format shown in section 5 2 The read back command may be used to latch multiple counter output latches by setting the CNT bit 0 and selecting the desired counter s The single command is functionally equivalent to several counter latch commands one for each counter latched The read back command can also be used to latch status information of selected counter s by setting the STA bit 0 Status must be latched to be read the status of a counter is accessed by a read from that counter The counter status format is shown in section 5 2 Chapter 5 Programmable Timer Counter 23 24 5 4 3 Counter latch operation Itis often desirable to read the value of a counter without disturbing the count in progress Usual
24. ly the method used is the counter latch com mand method which allows the user to read the latched count value of the selected counter The 8254 supports the counter latch operation in two ways The first way is to set the RW1 and RWO to be 0 0 which latches the count of the selected counter in a 16 bit hold register The second approach is by performing a latch operation under the read back command by setting the SC1 and SCO to be 1 1 and CNT 0 This method has the advantage of operating several counters at the same time A subse quent read operation on the selected counter will retrieve the held value PCL 836 User s Manual CHAPTER PCL 836 Software Driver The utility disk that came with your PCL 836 card includes some C library files These libraries were developed using Turbo C and you should be able to develop your own C applications using these files The source code for the programming library can also be found on the floppy disk This enables you to recompile the libraries using any C compiler though some modifications may be necessary Function call descriptions 26 This section gives detailed descriptions of the functions available in the library files DeviceOpen This function sets the device number and base address of the PCL 836 This enables the use of multiple PCL 836 cards Prototype ULONG DeviceOpen USHORT DeviceNumber USHORT BaseAd dress Parameters DeviceNumber The board numb
25. rated circuits on the PCL 836 Switch and Jumper Settings There is one DIP switch SW1 and one jumper 7 1 on the PCL 836 for the selection of the I O address and interrupt level Switch name SW1 The DIP switch SW1 is used to set base I O address Set the switch position to ON for logic 0 and to OFF for logic 1 The various base address settings are illustrated as follows PCL 836 User s Manual I O address switch position Hex 1 2 3 4 5 AQ A8 A7 A6 A5 2001 0 0 0 0 2201 0 0 0 1 240 1 0 0 1 0 2801 0 1 0 0 3E01 1 1 1 1 Factory setting Chose a base address that is not in use by another I O device A conflict with another device using the same I O location will usually cause the PCL 836 and other devices to malfunction The factory setting address is hex 240 which is usually reserved free as it is reserved for the PC prototype board Jumper name JP1 IRQ X 15 12 11 10 7 6 5 4 3 2 QUO OO OO oO OO OQ OO The jumper JP1 is for selecting the interrupt level Avoid using a level that is being used by another device The interrupt is enabled by setting the Interrupt Enable CN3 pin 32 to logic low The positive edge on the Interrupt input CN3 pin 13 will then generate an interrupt if the 8259 interrupt controller on the system board is enabled Using the interrupt implies that the user has installed an interrupt service routine interrupt vectors to the serv
26. requency measurement Prototype ULONG CounterFreqStart USHORT DeviceNumber USHORT Counter Parameters DeviceNumber The board number of PCL 836 from 0 9 Counter The counter number of PCL 836 from 0 5 Returned value 0 Success 1 Invalid device number 4 Lost base address 5 Invalid channel number Example error code CounterFreqStart 3 5 Chapter 6 PCL 836 Software Driver 31 CounterFreqRead This function reads the frequency measurement Prototype ULONG CounterFreqRead USHORT DeviceNumber USHORTCounter USHORT FreqLevel FLOAT Freq Parameters DeviceNumber The board number of PCL 836 from 0 9 Counter The counter number of PCL 836 from 0 5 FreqLevel Hz 0 1Hz 65 kHz MAX10kHz 650 kHz 2 MAX100kHz 6500 kHz Freq The frequency value Returned value 0 Success 1 Invalid device number 4 Lost base address 5 Invalid counter number Example error code CounterFreqRead 3 5 MAXI 65 kHz amp Freq 32 PCL 836 User s Manual CounterPulseStart This function starts the pulse width modulation PWM output Prototype ULONG CounterPulseStart USHORT DeviceNumber USHORT Counter float Period float UpCycle Parameters DeviceNumber The board number of PCL 836 from 0 9 Counter The counter number of PCL 836 from 0 2 Period The total period in ms UpCycle The first 1 2 cycle length in ms Returned value 0 Success 1 Invalid device number 4 Lost base address 5
27. s high the first clock pulse after the count is loaded decrements the count by 1 Subsequent clock pulses decrement the count by 2 After time out the output goes low and the full count is reloaded The first clock pulse following the reload decrements the counter by 3 Subsequent clock pulses decrement the count by two until time out then the whole process is repeated In this way if the count is odd the output will be high for N 1 2 counts and low for N 1 2 counts 5 3 5 Mode 4 Software triggered strobe After the mode is set the output will be high When the count is loaded the counter will begin counting On terminal count the output will go low for one input clock period and will then go high again If the count register is reloaded during counting the new count will be loaded on the next CLK pulse The count will be inhibited while the GATE input is low 5 3 6 Mode 5 Hardware triggered strobe The counter will start counting after the rising edge of the trigger input and will go low for one clock period when the terminal count is reached The counter is retriggerable PCL 836 User s Manual 5 4 Counter operations 5 4 1 Read Write Operation For each counter the type of read write operation operating mode and counter type must all be properly specified in the control byte and the control byte must be written before the initial count is written Since the control byte register and all three counter read wr
28. y or BCD counting Programmable frequency output Complex duty cycle outputs One shot or continuous outputs 16 bit TTL digital input 16 bit TTL digital output Jumper selectable interrupt level 1 3 Applications Event counting for pulse output devices Programmable frequency synthesis Coincidence alarms Frequency measurements F V conversion amp pulse accumulation Period and pulse duration measurement Time delay measurement Periodic interrupt generation PCL 836 User s Manual 1 4 Specifications Programmable Counters Counters Six independent 16 bit counters Modes Three programmable counter modes Programmable digital noise filter 1 6 usec to 52 428 msec Usable pins Clock Gate and Out for each counter Programmable time based output 153 Hz to 5 MHz 3 independent PWM outputs Input Output TTL compatible Interrupt IRQ 2 3 4 5 6 7 10 11 12 15 Jumper select Digital Input Output 16 TTL input Channels Logical level 0 0 8 V max Logical level 1 2 4 V min 16 TTL output Channels Logical level 0 0 5 V max 8 0 mA Logical level 1 2 4 V min 0 4 mA General Connector 37 pin D SUB connector for counter I O 20 pin male flat cable connector for digital I O Dimension 185 mm x 100 mm The PCL 836 generates high frequency signals which may cause EMI Electromagnetic Interference problems Use of Advantech s shielded 37 pin D SUB cable or another well shielded cable avoids
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