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MVME162PA-344SE user manual

1. Optional 2 0 Via P2 and Ethernet SCSI Transition Module Transceiver Peripherals VMEbus Connections Connections A32 24 D64 32 16 08 Via P2 and Via P2 and A A Master Slave Transition Modules Transition Modules n EIA 232 E Q Transceivers Y IndustryPack Y Y vov VMEchip2 vO 82596CA 53C710 pod 785230 VMEbus 4 Channels Ethernet SCSI Serial EPROM Interface Controller Coprocessor Controller Socket IP2 MCECC MC2 AA Dag Chip Chip Chip 1 oe Functions Functions Functions Petra ASIC MC68040 MC68LC040 M48T58 or S ESME Battery Backed MC68060 MC68LCO60 ye Cono 8KB RAM Clock MPU 1 4 8 16 Parity 4 8 16 32MB DRAM Memory ECC DRAM Array Memory Array 512KB SRAM Memory Array Configuration Dependent Emulations w Battery 2498 0003 1 2 Figure 4 1 MVME162P4 Block Diagram 4 5 www motorola com computer literature http Functional Description Data Bus Structure The local bus on the 162 4 is a 32 bit synchronous bus that is based on the MC68040 bus and which supports burst transfers and snooping The various local bus master and slave devices use the local bus to communicate The local bus is arbitrated by priority type the priority of the local bus masters from highest to lowest is 82596 LAN 53C710 SC
2. 712M TRANSITION MODULE PORT 4 TO MODEM DB25 Jf9 TXD 2 25 TXD4 THD RXD 2 26 RXD4 LY PXD oia RIS 2 27 54 RIS CTS 2 29 54 Ua CTS ows DTR 2 DTR4 lt gt OTR 2 1 DCD4 gt DCD ong 4 pine RIXC P2A32 4 piu i5 TRXC 2 28 TRXC4 TO TERMINAL BAG 8 H PIN 24 P2 CABLE o 12 PIN7 o 5K o o o J15 o o MVME712M EIA 232 D DTE CONFIGURATION TO MODEM NOTE WITH DTE MODULE THE RECEIVE CLOCK OF 85230 ON B INTERFACE MUST BE PROGRAMMED AS INPUT TO PREVENT BUFFER CONTENTION SIM05 FRONT PANEL 285230 EIA 232 D DTE DB25 PORT TXD PORT2 TXD B PIN2 RXD lt k pina RTS RIS D gt PIN4 CTS amp PINS D DTR pin go DCD lt A PINS Ke ie DSR PING MVME 162P4 EIA 232 D DTE CONFIGURATION xe TO MODEM RXC e 21 e PIN 15 1 21 ret pi 17 17 e PIN24 PIN7 10970 01 3 6 9704 Figure 1 3 EIA 232 D Connections to MVME712M Sheet 3 of 6 http www motorola com computer literature 1 31 Hardware Preparation and Installation 712M TRANSITION
3. 712M TRANSITION MODULE PORT 4 TO MODEM 0825 P2 A25 TXD4 ule TXD o o PIN2 RXD 2 26 4 ds RXD ping RTS 2 27 54 d RTS CTS P2 A29 CTS4 2475 CTS ons DTR P2 A30 DTR4 eu DTR pin oo DCD 2 1 DCD4 DCD o o DSR pine RTXC P2 A32 RTXC4 TXC TO TERMINAL SE PIN S TRXC 2 28 TRXC4 ia Sina lt gt PIN24 P2 CABLE lt gt 412V gt 5 PIN7 5K s gt J15 o o o o o O MVME712M EIA 232 D DTE CONFIGURATION TO MODEM 06 285230 EIA 232 D DCE B PORT 5 f lt RTS CTS lt f B lt TXC ime vv RXC B AL 88V 1 2 P NOTE WITH DCE MODULE AND MVME 712 JUMPERED AS TO TERMINAL THE CLOCKS TXC AND RXC ARE THE WRONG DIRECTION THE CLOCKS ARE BOTH OUTPUTS THEY SHOULD BOTH BE INPUTS FRONT PANEL DB25 TXD PORT2 PIN2 RXD PINS 4 CTS PIN 5 PAIN PIN 20 DCD PIN8 DSR MVME 162P4 EIA 232 D DCE CONFIGURATION me e TO TERMINAL PIN 15 RXC PIN 17 1090 24 PIN 7 v 10970 01 6 6 9704 Figure 1 3 EIA 232 D Connections to MVME712M Sheet 6 of 6 1 34 Computer Group Literature Center Web Site Installation Instruc
4. ENV Parameter and Options Default Meaning of Default Local SCSI Bus Reset on N No local SCSI bus reset on debugger startup Debugger Startup Y N Local SCSI Bus Negotiations A Asynchronous negotiations Type A S N Industry Pack Reset on Debugger Y IP modules are reset on debugger startup Startup Y N Ignore CFGA Block on a Hard Y Configuration Area CFGA Block contents Disk Boot Y N are disregarded at boot hard disk only Auto Boot Enable Y N N Auto Boot function is disabled Auto Boot at power up only Y N Y Auto Boot is attempted at power up reset only Auto Boot Controller LUN 00 Specifies LUN of disk tape controller module currently supported by the Bug Default is 0 Auto Boot Device LUN 00 Specifies LUN of disk tape device currently supported by the Bug Default is 0 Auto Boot Abort Delay 15 The time in seconds that the Auto Boot sequence will delay before starting the boot The delay gives you the option of stopping the boot by use of the Break key The time span is 0 255 seconds Auto Boot Default String You may specify a string filename to pass on Y NULL String String to the code being booted Maximum length is 16 characters Default is the null string ROM Boot Enable Y N N ROMboot function is disabled ROM Boot at power up only Y ROMboot is attempted at power up only Y N ROM Boot Enable search of N VMEbus address space will not be accessed by VMEbus Y N
5. 712M TRANSITION MODULE PORT 4 TO MODEM 0825 TXD 2 25 TXD4 y TXD o o PIN2 RXD P2 A26 RXD4 a 8 ping RTS 2 27 RTS4 BIS CTS P2 A29 CTS4 PEN CTS N5 DTR P2 A30 DTR4 p DCD P2 A31 DCD4 D n DCD ong o o DSR pine RTXC P2 A32 RTXC4 TXC TO TERMINAL PNAS TRXC P2 A28 TRXC4 Hs lan TXCO PIN 24 P2 CABLE Li s gt EN 4 Y T e J15 o MVME712M EIA 232 D CONFIGURATION TERMINAL NOTES 1 WITH DTE MODULE AND MVME 712 JUMPERED AS TO TERMINAL THE CLOCKS TXC AND RXC ARE THE WRONG DIRECTION THE CLOCKS ARE BOTH INPUTS THEY SHOULD BOTH BE OUTPUTS 2 WITH DTE MODULE THE RECEIVE CLOCK OF 85230 ON B INTERFACE MUST BE PROGRAMMED AS INPUT TO PREVENT BUFFER CONTENTION 5 05 FRONT PANEL 285230 EIA 232 D DB25 B PORT TXD PORT2 TXD B PIN2 RXD lt pna RTS RTS PIN4 1 CTS amp PINS B DTR Pin 20 xg DCD PINs KG Ac DSR PING MVME 162P4 EIA 232 D DTE CONFIGURATION TO MODEM BRO 35 24 x pints 1 2 sv RXC o rl PIN 17 7 gt PIN 24 PIN7 10970 01 5 6 9704 Figure 1 3 EIA 232 D Connections to MVME712M Sheet 5 of 6 http www motorola com computer literature 1 33 Hardware Preparation and Installation
6. MODULE 4 TO MODEM DB25 Jt9 TXD P2A25 4 TXD PIN2 RXD P2 A26 RXD4 47s XD oua RTS P2 A27 RTS4 RIS CTS P2 A20 CTS4 ons DTR 2 DTR4 lt gt OTR DCD P2 A31 DCD4 DCD ong BY PSR ping RIXC _ 2 2 RTXC4 TRXC P2 A28 TRXC4 TO TERMINAL BN lJ J18 TXCO H PIN 24 P2 CABLE ET PN T o o o J15 o 5 06 285230 EIA 232 D DCE B PORT D RXD lt RTS D CTS lt DTR gt D DCD amp TXC ls AL 5V B 12252 o o D MVME712M EIA 232 D DCE CONFIGURATION TO TERMINAL FRONT PANEL DB25 TXD PIN2 EN PIN 3 RTS 4 CTS PINS PIN 20 DCD PINS Beh PING Xe PIN 15 RXC PIN 17 ee PIN 24 J17 amp PIN 7 Y PORT2 MVME 162P4 EIA 232 D DCE CONFIGURATION TO TERMINAL 10970 01 4 6 9704 Figure 1 3 EIA 232 D Connections to MVME712M Sheet 4 of 6 1 32 Computer Group Literature Center Web Site Installation Instructions
7. 162 4 VME Embedded Controller Installation and Use V162P4A IH2 Edition of November 2000 Copyright 2000 Motorola Inc rights reserved Printed in the United States of America Motorola and the Motorola logo are registered trademarks of Motorola Inc MC68040 M and MC68060 are trademarks of Motorola Inc IndustryPack and IP are trademarks of GreenSpring Computers Inc other products mentioned in this document are trademarks or registered trademarks of their respective holders Safety Summary The following general safety precautions must be observed during all phases of operation service and repair of this equipment Failure to comply with these precautions or with specific warnings elsewhere in this manual could result in personal injury or damage to the equipment The safety precautions listed below represent warnings of certain dangers of which Motorola is aware You as the user of the product should follow these warnings and all other safety precautions necessary for the safe operation of the equipment in your operating environment Ground the Instrument To minimize shock hazard the equipment chassis and enclosure must be connected to an electrical ground If the equipment is supplied with a three conductor AC power cable the power cable must be plugged into an approved three contact electrical outlet with the grounding wire green yellow reliably connected to an electrical ground safety
8. A 4 APPENDIXB Troubleshooting E p EE B 1 APPENDIX C Network Controller Data Network Controller Modules Supported esee C 1 APPENDIXD Disk Tape Controller Data Controler Modules Supportell sed pe ere pepe aee anini D 1 Peroli D 2 TOT Commend 2 ueteres sents eR shies se bx pape apre bU Rd D 5 APPENDIX E Related Documentation EDT 1 E 2 3 List of Figures Figure 1 1 MVMBIO2ZP Board Layout 1 6 Figure 1 2 Serial Interface Module Connector Side ees 1 9 Figure 1 3 EIA 232 D Connections to MVME712M Sheet 1 of 6 1 29 Figute 1 4 530 Connections Sheet 1 of 2 cesser rere rne 1 35 Figure 1 5 422 CODEBOCIORS aridi erae e peste 1 37 Figure 2 1 MVME162P4 Firmware System Startup sess 2 3 Figure 4 1 MVMEIG2P4 Block iei oes ipo bibe 4 5 xi xii List of Tables Table COV ere s ioi diete 1 1 Table 1 2 MVME162P4 Configuration Lus toes ret ptr cased toes neta pto 1 5 Table 1 2 Serial Interface Module Part Numbers ec
9. J22 jumpers 4 8 J23 jumper 1 14 J25 serial connector 4 19 J6 connector 4 20 jumper headers EPROM size selection J23 1 14 J1 system controller selection 1 7 2 5 J14 IP bus clock 1 8 2 5 J16 Flash memory write protection 2 9 J16 SP 1 clock 2 7 J17 SP 2 clock 2 7 J19 IP bus strobe 1 13 2 7 J22 SRAM backup power 1 13 2 7 4 8 J23 EPROM size selection 2 7 J24 Flash memory write protection 2 7 J24 Flash write protection 1 15 4 11 serial port 1 clock J16 1 12 serial port 2 clock J17 1 12 jumper headers location of 1 5 jumpers backplane 1 24 L LAN controller modules supported C 1 interface 4 16 LEDs light emitting diodes 2 1 4 20 local bus 4 18 bus arbiter 4 19 bus timeout 4 18 resources for the processor 4 17 Local Area Network LAN interface 4 16 location monitors processor 1 27 logical unit number LUN see CLUN or DLUN LUN logical unit number see CLUN or DLUN M MC2 DRAM size switch 53 1 15 MC2 sector registers 1 17 MC680x0 MC68LCOx0 MPU 4 6 MC68xx0x0 cache memory 4 6 MCECC memory model 1 16 1 22 memory controller emulations MC1 MC2 1 20 1 21 memory options 4 7 memory requirements firmware 3 3 microprocessor options 4 6 modifying switch settings 1 22 MPU options 4 6 MVME162Bug documentation E 1 MVME162P4 as network controller C 1 board specifications A 1 cooling requirements A 2 EMC regulatory compliance A 4 features 4 1 I O interfaces 4 12
10. Table B 1 Troubleshooting MVME162P4 Boards Condition Possible Problem Try This VI The board has failed one or more of the tests listed above and cannot be corrected using the steps given A There may be some fault in the board hardware or the on board debugging and diagnostic firmware 1 Document the problem and return the board for service 2 Phone 1 800 222 5640 TROUBLESHOOTING PROCEDURE COMPLETE 4 Computer Group Literature Center Web Site Network Controller Data C Network Controller Modules Supported The 162Bug firmware supports the following VMEbus network controller modules The default address for each module type and position is shown to indicate where the controller must reside to be supported by 162Bug The controllers are accessed via the specified CLUN and DLUNS listed here The CLUN and DLUNS are used in conjunction with the debugger commands NBH NBO NIOP NIOC NIOT NPING and NAB they are also used with the debugger system calls NETRD NETWR NETFOPN NETFRD NETCFIG and NETCTRL Controller CLUN DLUN Address Interface Type Type MVME162FX 00 00 FFF46000 Ethernet MVME376 02 00 FFFF1200 Ethernet MVME376 03 00 FFFF1400 Ethernet MVME376 04 00 FFFF 1600 Ethernet MVME376 05 00 FFFF5400 Ethernet MVME376 06 00 FFFF5600 Ethernet MVME376 07 00 FFFFA40 Ethernet 0
11. A user interface or debug diagnostics monitor that accepts commands from the system console terminal When using 162Bug you operate out of either the debugger directory or the diagnostic directory If youare in the debugger directory the debugger prompt 162 Bug is displayed and you have all of the debugger commands at your disposal If you are in the diagnostic directory the diagnostic prompt 162 Diag gt is displayed and you have all of the diagnostic commands at your disposal as well as all of the debugger commands Because 162Bug is command driven it performs its various operations in response to user commands entered at the keyboard When you enter a command 162Bug executes the command and the prompt reappears However if you enter a command that causes execution of user target code for example GO then control may or may not return to 162Bug depending on the outcome of the user program 3 2 Computer Group Literature Center Web Site 162Bug Implementation If you have used one or more of Motorola s other debugging packages you will find the CISC 162Bug very similar Some effort has also been made to improve the consistency of interactive commands For example delimiters between commands and arguments may be commas or spaces interchangeably 162Bug Implementation Physically 162Bug is contained in a 28 0165 Flash memory chip providing 512KB 128K longwords of storage Optionally the 162Bug
12. EIA Standard Configuration Part Number Model Number EIA 232 D DTE 01 W3846B SIMMO5 DCE 01 W3865B SIMM06 EIA 530 DTE 01 W3868B SIMMO7 DCE 01 W3867B SIMMOS EIA 485 01 W3002F SIMMO09 or EIA 422 DTE or DCE Removal of Existing SIM AN Caution 1 Each serial interface module is retained by two 4 40 x 316 1 Phillips head screws in opposite corners Exception SIMMOO is retained by one Phillips head screw in the center of the module Remove the screw s and store them in a safe place for later use 2 Grasp opposite sides of the SIM and gently lift straight up Avoid lifting the SIM by one side only as the connector can be damaged on the SIM or the main board 3 Place the SIM in a static safe container for possible reuse Computer Group Literature Center Web Site Preparing the Board Installation of New SIM 1 Observe the orientation of the connector keys on SIM connector J1 and MVME162P4 connector J15 Turn the SIM so that the keys line up and place it gently on connector J15 aligning the mounting hole s at the SIM corners or center with the matching standoff s on the MVME162P4 2 Gently press the top of the SIM to seat it on the connector If the SIM does not seat with gentle pressure recheck the orientation If the SIM connector is oriented incorrectly the mounting hole s will not line up with the standoff s N Do not attempt to force the SIM into place if it is oriented incorre
13. LAN activity Lights when the LAN controller is functioning as local bus master FUSE LED DS6 green Fuse OK Indicates that 5 Vdc 12Vdc and 12Vdc power is available to the LAN and SCSI interfaces and IP connectors SCSI LED DS7 green SCSI activity Lights when the SCSI controller is functioning as local bus master VME LED 058 green VME activity Lights when the board is using the VMEbus or being accessed from the VMEbus Initial Conditions After you have verified that all necessary hardware preparation has been done that all connections have been made correctly and that the installation is complete you can power up the system Applying power to the system as well as resetting it triggers an initialization of the MVME162P4 s MPU hardware and firmware along with the rest of the system The Flash resident firmware initializes the devices on the MVME162P4 board in preparation for booting the operating system The firmware is shipped from the factory with a set of defaults appropriate to the board In most cases there is no need to modify the firmware configuration before you boot the operating system For specifics in this regard refer to Chapter 3 and to the user documentation for the MVME162Bug firmware Computer Group Literature Center Web Site Applying Power Applying Power When you power up or when you reset the system the firmware executes some self checks and proce
14. eese E 1 Table E 2 Manufacturers 2 Table E 3 Related Specillealbols ferai 3 xiii xiv About This Manual MVME162P4 VME Embedded Controller Installation and Use provides instructions for hardware preparation and installation a board level hardware overview and firmware related general information and startup instructions for the MVME162P 244 and 344 series of embedded controllers known collectively as the MVMEI62P4 because they are equipped with the Petra chip and accommodate up to four IP modules The Petra chip that distinguishes MVME162P4 embedded controllers is an application specific integrated circuit ASIC which combines the functions previously covered by the MC2 chip the IP2 chip and the MCECC chip in a single ASIC As of the publication date the information presented in this manual applies to the following MVME162P4 models Model Number Characteristics MVME162P 244L 25MHz 68LC040 16MB SDRAM 2 SIO 4 DMA IP MVME162P 244LE 25MHz 68LC040 16MB SDRAM 2 SIO 4 DMA IP Ethernet MVME162P 244LSE 25MHz 68LC040 16MB SDRAM 2 SIO 4 DMA IP SCSI Ethernet MVME162P 344 32MHz 68040 16MB SDRAM 2 SIO 4 DMA IP MVME162P 344S 32MHz 68040 16MB SDRAM 2 SIO 4 DMA IP SCSI MVME162P 344E 32MHz 68040 16MB SDRAM 2 SIO 4 DMA IP Ethernet MVME162P 344SE 32 68040 16MB SDR
15. Dangerous voltages capable of causing death are present in this equipment Use extreme caution when handling testing and adjusting 2 Remove the chassis cover as instructed in the user s manual for the equipment Remove the filler panel from the card slot where you are going to install the MVME162P4 If you intend to use the MVME162P4 as system controller it must occupy the leftmost card slot slot 1 The system controller must be in slot 1 to correctly initiate the bus grant daisy chain and to ensure proper operation of the IACK daisy chain driver If you do not intend to use the MVME162P4 as system controller it can occupy any unused double height card slot Slide the MVME162P4 into the selected card slot Be sure the module is seated properly in the P1 and P2 connectors on the backplane Do not damage or bend connector pins Secure the MVME162P4 in the chassis with the screws provided making good contact with the transverse mounting rails to minimize RF emissions Install the MVMET712 series transition module in the front or the rear of VME chassis To install an MVME712M which has double wide front panel you may need to shift other modules in the chassis On the chassis backplane remove the INTERRUPT ACKNOWLEDGE IACK and BUS GRANT BG jumpers from the header for the card slot occupied by the MVME162P4 Computer Group Literature Center Web Site Installation Instruct
16. Define the general control requirements for the IP modules Bits IP Register Address 31 24 D 23 16 C FFFBC01A 15 08 B 019 07 00 FFFBC018 IP D C B A Interrupt 0 Control 00000000 Define the interrupt control requirements for the IP modules channel 0 Bits IP Register Address 3124 D FFFBC016 23 16 C 14 15 08 B 12 07 00 A 10 3 20 Computer Group Literature Center Web Site Modifying the Environment IP D C B A Interrupt 1 Control 00000000 Define the interrupt control requirements for the IP modules channel 1 Bits IP Register Address 31 24 D 017 23 16 C 015 15 08 B 013 07 00 011 IN If you have specified environmental parameters that will cause an overlap condition a warning message will appear Caution before the environmental parameters are saved in NVRAM The important information about each configurable element in the memory map is displayed showing where any overlap conditions exist This allows you to quickly identify and correct an undesirable configuration before it is saved If an undesirable configuration already exists you may wish to restore the factory defaults with env d CR http www motorola com computer literature 162Bug Firmware ENV warning example W
17. 1 13 SRAM Backup Power Source 1 13 1 14 Flash Write 2 1 15 MECZ DRAM m EET 1 15 General Purpose Readable Switch S4 Pin 5 eese 1 17 DMA Snoop Control 55 Pins 1 2 S 1 18 IP Reset Moded455 1 19 Flash Write Enable Mode 855 Pin 4 rtr 1 20 MCECC DREAM nas MER UU 1 21 vii Tis tale Est cue oS 1 22 IP Installation on the MY MEJTO2DP34 1 23 BIVNIESO2PSE D stallatufi 2 SURFER CIERTO DR UE PRU De ER ER 1 23 System Consider ANIONS e osos oco e Sra ds S EP ERR bre 1 26 SERERE BOCA UERSUM M ME 1 28 CHAPTER 2 Startup and Operation Ina MEINEM II MEM 2 1 Front Panel Switches and Tdi Gatos 2 1 Con BOUES AEAHE ME MR M AM EM C EE 2 2 APPIE FOWE LPS 2 3 luco p iuri qr E 2 4 Dimenge np e BOAN eae 2 5 Pind 2 9 PM EE 2 10 2 11 the Syste 2 12 2 12 2 13 2 14 Diagnostic er europe R 2 14 3 162Bug Firmware Ipsis 3 1 P c a e 3 1 1628100 DInplemental
18. After power up you can reconfigure the baud rate of the debug port by using the 162Bug Port Format PF command Whatever the baud rate some form of hardware handshaking either XON XOFF or via the RTS CST line is desirable if the system supports it If you get garbled messages and missing characters you should check the terminal to make sure that handshaking is enabled If you have equipment such as a host computer system and or a serial printer to connect to the other EIA 232 D port connectors marked SERIAL PORT on the MVME712x transition module connect the appropriate cables and configure the port s as detailed in Step 12 above After power up you can reconfigure the port s by programming the 162 4 785230 Serial Communications Controller SCC or by using the 162Bug PF command Power up the system 162Bug executes some self checks and displays the debugger prompt 162 Bug gt if the firmware is in Board mode However if the ENV command has placed 162Bug in System mode the system performs a self test and tries to autoboot Refer to the ENV and MENU commands Table 3 2 If the confidence test fails the test is aborted when the first fault 1s encountered If possible an appropriate message is displayed and control then returns to the menu Before using the MVME162P4 after the initial installation set the date and time using the following command line structure 162 Bug SET mmddyyhhmm lt CAL gt
19. GCSR global control status registers 1 27 general purpose readable switch 4 1 17 global bus timeout 1 26 global control status registers GCSR 1 27 grounding 4 grounding strap use of 1 3 H handshaking hardware 2 8 hard disk drive D 3 hardware features 4 1 initialization 2 3 interrupts 4 18 preparation 1 1 high temperature operation A 3 humidity relative A 1 I O interfaces 4 12 IACK interrupt acknowledge signal 1 24 indicators 2 1 IndustryPack IP interface functions 4 15 modules installation 1 23 signals 5 1 IndustryPack modules base addresses of 3 19 configuration 3 20 configuring 3 19 general control register 3 20 memory size 3 20 initial conditions 2 4 installation board 1 23 SIMs 1 11 transition modules 1 24 installation considerations 1 26 interconnect signals 5 1 interrupt acknowledge signal IACK 1 24 interrupt control registers 3 20 interrupt functions 4 13 Interrupt Stack Pointer ISP 3 4 interrupts hardware 4 18 IOT command parameters D 5 IP IndustryPack bus clock header J14 1 8 bus strobe select header J19 1 13 2 7 controller emulations IP1 IP2 1 19 reset signal 4 16 IP2 interface function 4 15 IP32 CSR bit IP bus clock 1 8 ISP Interrupt Stack Pointer 3 4 J J15 connector SIM selection 1 9 J16 jumpers 1 12 J17 jumpers 1 12 J18 serial connector 4 19 J19 jumper 1 13 http www motorola com computer literature IN 3 lt moz lt moz Index
20. Master Address Translation Select 00000000 This register defines which bits of the address 4 are significant A logical 1 indicates significant address bits logical 0 is non significant Default is 0 Master Control 4 00 Defines the access characteristics for the address space defined with this master address decoder Default is 00 Short I O VMEbus A16 Enable Y Yes Enable the Short I O Address Decoder Y N Short I O VMEbus A16 Control 01 Defines the access characteristics for the address space defined with the Short I O address decoder Default is 01 Computer Group Literature Center Web Site Modifying the Environment Table 3 3 ENV Command Parameters Continued ENV Parameter and Options Default Meaning of Default F Page VMEbus A24 Enable Y Yes Enable the F Page Address Decoder Y N F Page VMEbus A24 Control 02 Defines the access characteristics for the address space defined with the F Page address decoder Default is 02 ROM Access Time Code 04 Defines the ROM access time The default is 04 which sets an access time of five clock cycles of the local bus Flash Access Time Code 03 Defines the Flash access time The default is 03 which sets an access time of four clock cycles of the local bus MCC Vector Base 05 Base interrupt vector for the component VMEC2 Vector Base 1 06 specified Default MC2chip 05 VMEchip2 VMEC2 Vector Base
21. etc Memory Search Delay Enable N No delay before the Bug begins its search for a Y N work page Memory Search Delay Address FFFFD20F Default address is FFFFD20F This is the 62 4 GCSR GPCSRO as accessed through VMEbus A16 space it assumes the MVMEI62P4 GRPAD group address and BDAD board address within group switches are set to on This byte wide value is initialized to FF by MVME162P4 hardware after a System or Power On reset In a multi 162P4 environment where the work pages of several Bugs reside in the memory of the primary first MVME162P4 the non primary CPUs will wait for the data at the Memory Search Delay Address to be set to 00 01 or 02 refer to the Memory Requirements section in Chapter 3 for the definition of these values before attempting to locate their work page in the memory of the primary CPU Memory Size Enable Y N Y Memory is sized for Self Test diagnostics Memory Size Starting Address 00000000 Default Starting Address is 0 Memory Size Ending Address 00100000 Default Ending Address is the calculated size of local memory Computer Group Literature Center Web Site Modifying the Environment Table 3 3 ENV Command Parameters Continued ENV Parameter and Options Default Meaning of Default Note Memory Configuration Defaults The default configuration for Dynamic RAM mezzanine boards will position the mezzanine with the l
22. 2 07 Vector 1 06 VMEchip2 Vector 2 07 VMEC2 GCSR Group Base D2 Specifies group address FFFFXX00 in Short Address I O for this board Default 02 VMEC2 GCSR Board Base 00 Specifies base address SFFFFD2XX in Short Address I O for this board Default 00 VMEbus Global Time Out Code 01 Controls VMEbus timeout when the MVME162P4 is system controller Default 01 64 us Local Bus Time Out Code 02 Controls local bus timeout Default 02 256 us VMEbus Access Time Out Code 02 Controls the local bus to VMEbus access timeout Default 02 32 ms Configuring the IndustryPacks ENV asks the following series of questions to set up IndustryPack modules IPs on MVME162P4s The MVMEIX2P4 VME Embedded Controller Programmer s Reference Guide describes the base addresses and the IP register settings Refer to that manual for information on setting base addresses and register bits http www motorola com computer literature 162Bug Firmware IP A Base Address IP B Base Address IP C Base Address IP D Base Address 00000000 00000000 00000000 00000000 Base address for mapping IP modules Only the upper 16 bits are significant IP D C B A Memory Size 00000000 Define the memory size requirements for the IP modules Bits IP Register Address 31 24 D FFFBCOOF 23 16 C FFFBCOOB 15 08 B FFFBCOOD 07 00 A FFFBCOOC IP D C B A General Control 00000000
23. 50 28 28 50 50 50 50 Precomp Cylinder 50 28 28 50 50 50 50 Reduced Write Current 50 28 28 50 50 50 50 Cylinder Step Rate Code 0 0 0 0 0 0 0 Single Double DATA D D D D D D D Density Single Double TRACK D D D D D D D Density Single Equal in all Track S E E E E E E Zero Density Slow Fast Data Rate 5 5 5 5 Other Characteristics Number of Physical Sectors 0A00 0280 0200 05 0 0960 0B40 1680 Number of Logical Blocks 09 8 0500 05 0 0840 12 0 1680 2000 100 in size Number of Bytes in Decimal 653312 327680 368460 737280 1228800 1474560 2949120 Media Size Density 5 25 DD 5 25 DD 5 25 DD 3 5 DD 525 HD 3 5 HD 3 5 ED Notes 1 numerical parameters are in hexadecimal unless otherwise noted 2 The DSDD5 type floppy is the default setting for the debugger http www motorola com computer literature D 5 Disk Tape Controller Data D 6 Computer Group Literature Center Web Site Related Documentation MCG Documents The Motorola Computer Group publications listed below are referenced in this manual You can obtain paper or electronic copies of MCG publications by Contacting your local Motorola sales office Visiting MCG s World Wide Web literature site http www motorola com computer literature Table E 1 Motorola Computer Group Documents Motorola Publication Number MVME1X2P4 VME Embedded Controller Programmer s V1X2PFXA
24. At the command line prompt type in When prompted to Update Non Volatile RAM type in When prompted to Reset Local System type in After the clock speed is displayed immediately within You may need to use the enfg command see your board Run the selftests by typing in The system may indicate that it has passed all the self env d CR This restores the default parameters for the debugger environment y CR y CR five seconds press the Return key CR BREAK to exit to the System Menu Then enter 3 for to System Debugger and Return 3 CR Now the prompt should be 162 Diag Debugger Manual to change clock speed and or Ethernet Address and then later return to CR and step 3 st CR The tests take as long as 10 minutes depending on RAM size They are complete when the prompt returns The onboard self test is a valuable tool in isolating defects tests Or it may indicate a test that failed If neither happens enter de CR Any errors should now be displayed If there are any errors go to step VI If there are no errors go to step V V The debugger is in system mode and the board autoboots or the board has passed self tests A No apparent problems troubleshooting is done No further troubleshooting steps are required http www motorola com computer literature B 3 Troubleshooting
25. B 2 DCE data circuit terminating equipment 4 13 debugger commands 3 6 firmware 162Bug 3 9 prompt 3 5 default baud rate 2 8 device LUN DLUN C 1 D 2 diagnostic facilities 2 14 dimensions base board A 1 direct access devices D 4 direct memory access DMA 4 15 directories switching 2 14 disk tape controller modules supported D 1 DLUN device LUN C 1 D 2 DMA direct memory access 4 15 DRAM dynamic RAM base address 1 26 options 4 7 E EIA 232 D connection diagrams 1 29 ports 2 7 SIM part numbers 1 10 EIA 485 EIA 422 connection diagrams 1 37 EIA 530 connection diagrams 1 35 EIA 530 V 36 SIM part numbers 1 10 EMC regulatory compliance A 4 ENV command parameters 3 11 environmental parameters 3 9 EPROM 3 3 and Flash memory 4 11 size select header J23 1 14 socket 4 11 EPROM Flash selection S4 1 17 IN 2 Computer Group Literature Center Web Site ESD electrostatic discharge precautions against 1 3 ESDI Winchester hard drive D 3 Ethernet controller modules supported C 1 interface 4 16 station address 4 16 extended addressing 1 26 F features hardware 4 1 firmware 2 2 directories 3 5 documentation E 1 Flash memory 3 3 4 11 Flash write protect header J24 1 15 4 11 flexible diskettes controller data D 2 floppy diskettes D 4 floppy drives disk tape controller D 2 D 3 forced air cooling A 2 front panel switches and indicators 2 1 functional description 4 1 fuses 1 27 G
26. Do not charge a Always check proper polarity To remove the battery from the board carefully pry the battery from its socket Before installing a new battery ensure that the battery pins are clean Note the battery polarity and press the battery into the socket When the battery is in the socket no soldering is required 4 10 Computer Group Literature Center Web Site Functional Description EPROM and Flash Memory The MVME162P4 implementation includes 1MB or 2MB Flash memory Flash memory is a single Intel device 28 0165 on the MVME162P4 organized in a 1MB x 8 or 2Mb x 8 configuration For information on programming Flash refer to the Intel documents listed under Manufacturer s Documents in the Related Documentation appendix The Flash write enable signal is controlled by A bit in the Flash Access Time Control register in the Petra ASIC A board level configuration jumper J24 and configuration switch S5 segment 4 which determine the status of Flash write protection on the board Refer to the MVMEIX2P4 VME Embedded Controller Programmer s Reference Guide for specifics The EPROM location is a standard JEDEC 32 pin PLCC capable of 4 Mbit densities organized as a 512 Kb x 8 device The setting of a configuration switch line GPI3 segment 5 54 allows reset code to be fetched either from Flash memory S4 segment 5 set to OFF or from lt 54 segment 5 set to ON Note that M
27. This board was loaded with one GreenSpring IP Dual P T module position A and three GreenSpring IP 488 modules positions B C and D One 25W load board was installed adjacent to each side of the board under test The exit air velocity was approximately 200 LFM between the MVME162P4 and the IP Dual P T module Under these conditions a 10 C rise between the inlet and exit air was observed At 70 C exit air temperature 60 C inlet air the junction temperatures of devices on the MVME162P4 were calculated from the measured case temperatures and did not exceed 100 C For elevated temperature operation perform similar measurements and calculations to determine the actual operating margin for your specific environment To facilitate elevated temperature operation 1 Position the MVME162P4 in the chassis to allow for maximum airflow over the component side of the board 2 Do not place boards with high power dissipation next to the MVMEI62P4 3 Use low power IP modules only The preferred locations for IP modules are position A J4 and J5 and position D J29 and J30 http www motorola com computer literature A 3 A Specifications A EMC Regulatory Compliance The MVME162P4 was tested without IndustryPacks in an EMC compliant chassis and meets the requirements for Class B equipment Compliance was achieved under the following conditions Shielded cables on all external I O ports Cable shields connected
28. When the MVME162P4 board is enclosed in a chassis and the front panel is not visible this connector enables you to extend the reset abort and LED functions to the control panel of the system where they remain accessible Table 5 2 Remote Reset Connector J6 Pin Assignments 5 LANLED PI2VLED SCSILED VMELED No connection RUNLED STSLED FAILSTAT No connection SCONLED ABORTSW RESETSW GND GND GPIO1 GPIO2 GPIO3 No connection GND http www motorola com computer literature 5 3 Pin Assignments Serial Port Module Connector J15 Port B of the 785230 serial communications controller on the MVME162P4 board is configurable via serial interface modules SIMs that are installed at connector J15 The serial interface modules currently available are listed and described in Chapter 2 The pin assignments for J15 are listed in the following table Table 5 3 Serial Port Module Connector Pin Assignments 12V GND DBPINI DBPIN14 TXDB TXCB RXDB LTXDB LTXCB LRXDB DBPIN16 DTRB RXCB CTSB LRTSB LRXCB LCTSB 12VMODULE DBPIN18 DSRB DBPIN19 RTSB DCDB LDTRB LDCDB DBPIN21 DBPIN9 DBPIN22 DBPINIO DBPIN23 DBPINII TXCOB LTRXCB DBPIN12 DBPIN25 DBPIN13 GND GND 5V 5V 5 4 Computer Group Literature Center Web Site Serial Port 2 Connector J18 Serial Port 2 Connector J18 DB25 socket connector located on
29. of the Rights in Technical Data clause at DFARS 252 227 7013 Nov 1995 and of the Rights in Noncommercial Computer Software and Documentation clause at DFARS 252 227 7014 Jun 1995 Motorola Inc Computer Group 2900 South Diablo Way Tempe Arizona 85282 Contents About This Manual Summary Of CHANGES e xvi EUR xvi Comments and Suggesllofls xvii Conventions Used in This Nlanual one oc tec o He Ek pe xviii CHAPTER 1 Hardware Preparation and Installation ib EROR oo ecc E E ERA 1 1 i meri P 1 1 Overview of Installation Procedure hte a rire 1 1 1 2 Candehnes for coo eiie peter 1 2 ESD Precaution 1 3 Preparing the naa bL muni hier 1 4 Con Ural ion m M 1 5 VME System Controller Viae esteem ERR PAR FUREEREER ATA PARA NER EER FERE ERU 1 7 dare uad 1 8 SIM Selechon for Serial Port B L9 1 9 Removal of BIN eet e Ee 1 10 Installatiom ot New SIM NN MR FUMUS HOMINEM 1 11 Senat Port Console Clock TIO orsin U 1 12 1 12 E
30. software programmable hardware interrupts 4 18 software readable switch S4 1 17 specifications MVME162P4 1 related E 3 SRAM static RAM backup power source selection J22 1 13 battery options 4 9 options 4 8 startup overview 1 1 startup problems solving B 1 static variable space firmware 3 4 storage temperature A 1 streaming tape drive D 4 switch settings modifying 1 22 switches 2 1 switching directories 2 14 system considerations 1 26 console setup 2 7 terminal configuration 2 4 input output control 3 5 tick timers 4 17 timeout global bus 1 26 local bus 4 18 transition boards and serial interfaces 4 13 4 14 4 15 troubleshooting procedures B 1 TX and RX clocks serial port 1 4 13 serial port 2 4 14 types of reset 2 12 U user configurable switches 1 17 V vibration tolerance operating A 1 VMEbus connectors 4 19 interface 4 12 signals 5 6 VMEchip2 ASIC 4 12 logic duplicated in Petra ASIC 4 7 W watchdog timers 4 18 Winchester hard drive D 3 controller function 2 5 X controller jumper J1 1 7 XON XOFF handshaking 2 8 reset 2 12 startup 2 3 Z System Fail SYSFAIL signal 2 11 785230 serial communications controller T SCC 2 8 temperature operating A 1 storage A 1 IN 6 Computer Group Literature Center Web Site
31. 1 4 If the MVME162Bug firmware is not installed seven bits are user definable 1 segments 1 4 and segments 6 8 Note Switch segment 5 GPI3 is reserved to select either the Flash memory map switch set to ON or the EPROM memory map switch set to OFF GPI3 is not user definable 162 BUG Installed default User Code Installed USER DEFINABLE USER DEFINABLE USER DEFINABLE USER DEFINABLE USER DEFINABLE USER DEFINABLE USER DEFINABLE USER DEFINABLE ON FLASH OFFZEPROM ON FLASH OFF EPROM REFER TO DEBUG MANUAL REFER TO DEBUG MANUAL REFER TO DEBUG MANUAL REFER TO DEBUG MANUAL REFER TO DEBUG MANUAL REFER TO DEBUG MANUAL Flash Selected factory configuration 2735 0004 http www motorola com computer literature 1 17 Hardware Preparation and Installation IP DMA Snoop Control S5 Pins 1 2 Segments 1 and 2 of switch S5 define the state of the snoop control bus when an IP DMA controller is local bus master As shown in Table 1 4 S5 segment controls Snoop Control signal 1 on the MC680x0 processor 55 segment 2 controls Snoop Control signal 0 Setting a segment to ON produces a logical 0 setting it to OFF produces a logical 1 S5 ON OFF Ww Snoop inhibited factory configuration 2736 0004 1 3 S5 varies in function according to the type of processor installed For MVME162P4 boards with an MC68040 processor setting segments 1 and 2 of switch S5 to OFF or leaving both segments set to ON the fa
32. 4 have been dropped as well October 2000 In the descriptions of the MC2 and MCECC DRAM size switches on pages 1 15 and 1 21 the importance of executing env d after modifying switch settings has been emphasized Overview of Contents Chapter 1 Hardware Preparation and Installation provides unpacking instructions hardware preparation guidelines and installation instructions for the MVME162P4 VME Embedded Controller Chapter 2 Startup and Operation provides information on powering up the MVME162P4 VME Embedded Controller after its installation in a system and describes the functionality of the switches status indicators and ports Chapter 3 62Bug Firmware describes the basics of 162Bug and its architecture describes the monitor interactive command portion of the firmware in detail and gives information on using the debugger and special commands Chapter 4 Functional Description describes the MVME162P4 VME Embedded Controller on a block diagram level Chapter 5 Pin Assignments summarizes the pin assignments for the various groups of interconnect signals on the MVME162P4 Appendix A Specifications lists the general specifications for the MVME162P4 Embedded Controller Subsequent sections of the appendix detail cooling requirements and EMC regulatory compliance Appendix B Troubleshooting includes simple troubleshooting steps to follow in the event that you have difficulty with your MVME
33. EIA 530 Connections Sheet 1 of 2 http www motorola com computer literature 1 35 Hardware Preparation and Installation P2 CONNECTOR TXD B TXD A RXD B RXD A RTS B RTS CTS B CTS DTR B DTR A 0008 P2 C22 2 31 162P4 530 DCE CONFIGURATION DSA P2 A22 P2 A20 TO TERMINAL TXC_B TXC_A P2 C24 axe B P2432 panas TXCO B 2 25 Le P2 C20 2 21 2 18 2 25 2 19 2 26 2 19 P2 A27 P2 C26 P2 A29 P2 A23 P2 A30 5 08 FRONT PANEL EIA 530 DCE DB 25 285230 NC o PIN 1 B PORT PORT o PIN 14 2 PIN2 TXD gt D PIN 16 lt 2 PIN 19 RTS D Lori PIN CTS B CTS a HR A PINI8 4 PINS Uwe PIN 23 DTR D BNO o PIN 10 a pep g PINS 2 PIN 22 TXC DSR_A D gt PIN6 RXC gt D TxA PIN 12 45V 2 PIN 15 1 i RXC_B 9 17 o PIN f R pus TXCO A 45V w D o PIN 25 NC o PIN 18 NC o 21 y PIN 7 10971 01 2 2 9704 Figure 1 4 EIA 530 Connections Shee
34. GPI3 switch segments 5 8 Table 2 2 describes the bit assignments on S4 Configure header J1 as appropriate for the desired system controller functionality always system controller never system controller or self regulating on the MVME162P4 Header J14 configures the IP bus clock for either 8MHz or the processor bus clock speed 25MHz or 32MHz for the MC68040 and MC68LC040 The factory configuration has a jumper installed on J14 pins 1 2 denoting an 8MHz clock Verify that this setting is appropriate for your application http www motorola com computer literature 2 5 Startup and Operation Table 2 2 Software Readable Switches Bit No GPIO S4 Segment 8 Function When set to 1 high instructs the debugger to use local static RAM for its work page variables stack vector tables etc When set to 1 high instructs the debugger to use the default setup operation parameters in ROM instead of the user setup operation parameters in NVRAM The effect is the same as pressing the RESET and ABORT switches simultaneously This feature can be helpful in the event the user setup is corrupted or does not meet a sanity check Refer to the ENV command description for the Flash ROM defaults GPD Reserved for future use GPI3 When set to 0 low informs the debugger that it is executing out of Flash memory When set to 1 high it informs the debugger that it is executing out of
35. Modem to CSO RESET Cold Warm Reset RL Read Loop RM Register Modify RS Register Set SD Switch Directories SET Set Time and Date SYM Symbol Table Attach NOSYM Symbol Table Detach SYMS Symbol Table Display Search T Trace TA Terminal Attach TC Trace on Change of Control Flow TIME Display Time and Date TM Transparent Mode TT Trace to Temporary Breakpoint VE Verify S Records Against Memory VER Display Revision Version WL Write Loop 3 8 Computer Group Literature Center Web Site Modifying the Environment Modifying the Environment You can use the factory installed debug monitor 162Bug to modify certain parameters contained in the MVME162P4 s Non Volatile RAM NVRAM also known as Battery Backed Up RAM BBRAM The Board Information Block in NVRAM contains various entries that define operating parameters of the board hardware Use the 162Bug command CNFG to change those parameters Use the 162Bug command ENV to change configurable 162Bug parameters in NVRAM The CNFG and ENV commands are both described in the Debugging Package for Motorola 68K CISC CPUs User s Manual Refer to that manual for general information about their use and capabilities The following paragraphs present supplementary information on CNFG and ENV that is specific to the 162Bug firmware along with the parameters that you can modify with the ENV command CNFG Configure Board Information Block Use this command to display and
36. PG Reference Guide MVME162Bug Diagnostics User s Manual V162DIAA UM Debugging Package for Motorola 68K CISC CPUs User s 68KBUGI D Manual Parts 1 and 2 68KBUG2 D Single Board Computers SCSI Software User s Manual SBCSCSI D MVME712M Transition Module and P2 Adapter Board VME712MA IH Installation and Use MVME712 12 MVME712 13 MVME712A MVME712A D MVME712AM and MVME712B Transition Modules and LCP2 Adapter Board User s Manual SIMMOO Serial Interface Module Installation Guide SIMMO9A IH To locate and view the most up to date product information in PDF or HTML format visit http www motorola com computer literature Related Documentation Manufacturers Documents For additional information refer to the following table for manufacturers data sheets or user s manuals As a further help sources for the listed documents are also provided Please note that in many cases the information is preliminary and the revision levels of the documents are subject to change without notice Table E 2 Manufacturers Documents Publication Document Title and Source Number M68000 Family Reference Manual M68000FR MC68040 Microprocessor User s Manual M68040UM Literature Distribution Center for Motorola Telephone 1 800 441 2447 FAX 602 994 6430 or 303 675 2150 E mail Idcformotorola hibbertco com Web http www mot com SPS 82596CA Local Area Network Coprocessor Data Sheet 290218 82596CA Local Area Network
37. QIC 02 streaming tape drive D 4 R regulatory compliance A 4 related specifications E 3 relative humidity A 1 remote control status connector J6 4 20 5 3 RESET switch 4 20 resetting the system 2 1 2 12 RF emissions minimizing 1 24 4 ROMboot process 2 10 S safety procedures 1 4 SCC serial communications controller 2 8 SCSI common command set CCS devices D 2 D 4 controller 53C710 4 17 direct access devices D 2 interface 4 17 sequential access devices D 2 termination 4 17 terminator configuration 4 17 terminator power 1 27 SD command 2 14 SDRAM synchronous DRAM options 4 7 sequential access devices D 4 serial communication parameters 2 4 communications controller SCC 2 8 communications interface 1 28 4 12 communications interface port 1 signals 5 6 communications interface port 2 signals 5 5 connectors 4 19 interfaces and transition boards 4 15 serial interface modules SIMs connector 5 4 considerations for transition modules 4 15 installation 1 11 model numbers 4 13 part numbers 1 10 removal 1 10 selection 1 9 serial port 2 MVME712M 4 13 4 14 http www motorola com computer literature IN 5 lt moz xXmoz Index serial ports 2 7 Set Bug Operating System Environment ENV firmware command 3 11 setting date and time 2 8 B 2 shielded cables A 4 SIMs serial interface modules 1 9 size of base board A 1 slave address decoders VMEbus 3 16 snoop control 1 18
38. ROMboot ROM Boot Abort Delay 00 The time in seconds that the ROMboot sequence will delay before starting the boot The delay gives you the option of stopping the boot by use of the Break key The time span is 0 255 seconds ROM Boot Direct Starting FF800000 First location tested when the Bug searches for Address a ROMboot module 3 12 Computer Group Literature Center Web Site Modifying the Environment Table 3 3 ENV Command Parameters Continued ENV Parameter and Options Default ROM Boot Direct Ending Address FFDFFFFC Meaning of Default Last location tested when the Bug searches for a ROMboot module Network Auto Boot Enable Y N N Network Auto Boot function is disabled Network Auto Boot at power up Y only Y N Network Auto Boot is attempted at power up reset only Network Auto Boot Controller 00 LUN Specifies LUN of a disk tape controller module currently supported by the Bug Default is 0 Network Auto Boot Device LUN 00 Specifies LUN of a disk tape device currently supported by the Bug Default is 0 Network Auto Boot Abort Delay 5 The time in seconds that the Network Boot sequence will delay before starting the boot The delay gives you the option of stopping the boot by use of the Break key The time span is 0 255 seconds Network Autoboot Configuration 00000000 Parameters Pointer NVRAM The address where the network interface configuration parameter
39. Vdc is available When MVME712M module is used the yellow DS1 LED on the MVME712M illuminates when LAN power is available signifying that the fuse is good If the Ethernet transceiver fails to operate check fuse F3 The MVME162P4 provides SCSI terminator power through a 1A fuse F1 located on the P2 Adapter Board or LCP2 Adapter Board If the fuse is blown the SCSI device s may function erratically or not at all When the P2 Adapter Board is used with an MVME712M and the SCSI bus is connected to the MVME712M the green DS2 LED on the MVME712M front panel illuminates when SCSI terminator power is available If the green DS2 LED flickers during SCSI bus operation check P2 Adapter Board fuse F1 If a solid state fuse opens you will need to remove power for several minutes to let the fuse reset to a closed or shorted condition http www motorola com computer literature 1 27 Hardware Preparation and Installation Serial Connections The MVME162P4 uses a Zilog 785230 serial port controller to implement the two serial communications interfaces Each interface supports a CTS DCD RTS and DTR control signals a TXD and RXD transmit receive data signals TXC and RXC synchronous clock signals The 785230 supports synchronous SDLC HDLC and asynchronous protocols The MVME162P4 hardware supports asynchronous serial baud rates of 110b s to 38 4Kb s For additional information on the MVME162P4 serial communications
40. by typing lt CTRL gt S III Debug prompt A Debugger 1 Disconnect all power from your system 162 Bug gt does EPROM Flash not appear at powerup and the board does not autoboot may be missing B The board may need to be reset 2 Check that the proper debugger device is installed 3 Set switch S4 segment 5 to ON This enables use of the EPROM instead of the Flash memory 4 Reconnect power 5 Restart the system by double button reset press the RESET and ABORT switches at the same time release RESET first wait seven seconds then release ABORT 6 If the debug prompt appears go to step IV or step V as indicated If the debug prompt does not appear go to step VI IV Debug prompt 162 Bug gt appears at powerup but the board does not A The initial debugger environment parameters may be set incorrectly 1 Start the onboard calendar clock and timer Type set mmddyyhhmm lt CR gt where the characters indicate the month day year hour and minute The date and time will be displayed toboot SEDEM B There may be some fault in the Performing the next step env d will board hardware change some parameters that may affect Caution your system s operation continues B 2 Computer Group Literature Center Web Site Solving Startup Problems Table B 1 Troubleshooting MVME162P4 Boards Condition IV Continued Possible Problem Try This 2
41. configure the Board Information Block which resides within the NVRAM The board information block contains various elements that correspond to specific operational parameters of the MVME162P4 board Note that although no memory mezzanine is present on MVME X2P4 series boards the on board memory is modeled as such for backward compatibility The board structure for the MVME162P4 is as follows 162 Bug gt enfg Board PWA Serial Number Board Identifier Artwork PWA Identifier PU Clock Speed Ethernet Address 0001AF000000 Local SCSI Identifier Parity Memory Mezzanine Artwork Identifier Parity Memory Mezzanine PWA Serial Number http www motorola com computer literature 3 9 162Bug Firmware Static Memory Mezzanine Artwork PWA Identifier Static Memory Mezzanin PWA Serial Number ECC Memory Mezzanine 1 Artwork PWA Identifier ECC Memory Mezzanine 41 PWA Serial Number ECC Memory Mezzanine 2 Artwork PWA Identifier ECC Memory Mezzanine 2 PWA Serial Number i Serial Port 2 Personality Artwork Identifier Serial Port 2 Personality Module Serial Number IndustryPack A Board Identifier y IndustryPack A PWA Serial Number IndustryPack A Artwork PWA Identifier IndustryPack B Board Identifier y IndustryPack PWA Serial Number
42. four IP modules connect to the MVME162P4 by four pairs of 50 pin connectors Four additional 50 pin connectors behind the front panel are for external connections to IP signals Pin assignments for the connectors on the MVME162P4 are listed Chapter 5 http www motorola com computer literature 4 19 Functional Description Remote Status and Control The remote status and control connector J6 is a 20 pin connector located behind the front panel of the MVME162P4 It provides system designers with flexibility in accessing critical indicator and reset functions When the board is enclosed in a chassis and the front panel is not visible this connector allows the Reset Abort and LED functions to be extended to the control panel of the system where they are visible Alternatively this allows a system designer to construct a RESET ABORT LED panel that can be located remotely from the MVME162P4 4 20 Computer Group Literature Center Web Site Pin Assignments Connector Pin Assignments This chapter summarizes the pin assignments for the following groups of interconnect signals on the MVMEI62P4 Connector Location Table IndustryPack C D connectors 14 58 7 10 11 Table 5 1 J20 21 27 J26 29 30 Remote Reset connector J6 Table 5 2 Serial port module connector J15 Table 5 3 Serial Port 2 connector J18 Table 5 4 Serial Port 1 connector J25 Table 5 5 VMEbus connector P1 Table
43. ground at the power outlet The power jack and mating plug of the power cable meet International Electrotechnical Commission IEC safety standards and local electrical regulatory codes Do Not Operate in an Explosive Atmosphere Do not operate the equipment in any explosive atmosphere such as in the presence of flammable gases or fumes Operation of any electrical equipment in such an environment could result in an explosion and cause injury or damage Keep Away From Live Circuits Inside the Equipment Operating personnel must not remove equipment covers Only Factory Authorized Service Personnel or other qualified service personnel may remove equipment covers for internal subassembly or component replacement or any internal adjustment Service personnel should not replace components with power cable connected Under certain conditions dangerous voltages may exist even with the power cable removed To avoid injuries such personnel should always disconnect power and discharge circuits before touching components Use Caution When Exposing or Handling a CRT Breakage of a Cathode Ray Tube CRT causes a high velocity scattering of glass fragments implosion To prevent CRT implosion do not handle the CRT and avoid rough handling or jarring of the equipment Handling of a CRT should be done only by qualified service personnel using approved safety mask and gloves Do Not Substitute Parts or Modify Equipment Do not install substitute parts o
44. in response to commands that you enter at the keyboard When the 162 Bug prompt appears on the terminal screen the debugger is ready to accept debugger commands When the 162 Diag gt prompt appears on the screen the debugger is ready to accept diagnostics commands To switch from one mode to the other enter SD Switch Directories To examine the commands in the directory that you are currently in use the Help command HE What you key in is stored in an internal buffer Execution begins only after the carriage return is entered This allows you to correct entry errors if necessary with the control characters described in the Debugging Package for Motorola 68K CISC CPUs User s Manual Chapter 1 After the debugger executes the command you have entered the prompt reappears However if the command causes execution of user target code for example GO then control may or may not return to the debugger depending on what the user program does For example if a breakpoint has been specified then control returns to the debugger when the breakpoint is encountered during execution of the user program Alternatively the user program could return to the debugger by means of the System Call Handler routine RETURN described in the Debugging Package for Motorola 68K CISC CPUs User s Manual Chapter 5 A debugger command is made up of the following parts The command name either uppercase or lowercase e g MD or md A port
45. installation 1 23 programming information E 1 regulatory compliance A 4 MVME320 disk tape controllers D 2 MVME323 disk tape controller D 3 MVME327A disk tape controller D 3 MVME328 disk tape controller D 4 MVME350 controller D 4 MVME374 network controller C 1 MVME376 network controller C 1 MVME712M installation 1 24 N network boot process 2 11 network controller modules C 1 non volatile RAM NVRAM 3 9 3 11 no VMEbus interface option 4 7 4 11 4 18 operating parameters 3 9 operating temperature A 1 option fields in firmware command 3 6 IN 4 Computer Group Literature Center Web Site P P1 and P2 connectors 4 19 5 6 parameters ENV command 3 11 parity DRAM emulations 1 16 part numbers SIM 1 10 Petra ASIC Abort switch interrupt 4 12 control of BBRAM and clock 4 11 control of Flash access time 4 11 IP bus Strobe signal 1 13 2 7 4 16 IP2 function 1 8 4 15 LAN coprocessor support 4 17 local bus timeout function 4 18 logic duplicated in VMEchip2 4 7 MC2 function 1 15 1 17 2 5 4 13 MCECC function 1 21 memory controller emulations 4 7 programmable tick timers 4 17 SCSI controller support 4 17 SRAM control 4 9 watchdog timer 4 18 pin assignments connector 5 1 port number s debugger command 3 5 power requirements 1 powering up the board 2 1 power save mode 4 9 preparing the board 1 1 processor bus structure 4 6 cache memory 4 6 location monitors 1 27 programmable tick timers 4 17 Q
46. joel Jo F1 S6 S4 S3 55 131 3 49 27 49 27 4 s s 3 4 3 49 27 49 27 E jo mmm mmm gt J20 lods J29 lo TOT one HAS S7 6 7 49 1 49 1 E J24 50 J8 2 J3 50 2 18 29 1 EB 49 1 50 d 2 pen 2 ns J26 2 r rn F2 DS2 DS4 DS6 DS8 n J6 1 1 rJ rJ DS1 DS3 DS5 DS7 Ji 2 E I LT 2646 0005 Figure 1 1 MVME162P4 Board Layout Computer Group Literature Center Web Site 1 6 Preparing the Board VME Syste m Controller J1 MVME162P4 board is factory configured in automatic system controller mode with a jumper across J1 pins 2 3 In this configuration the MVME162P4 determines whether it is the system controller by its position on the bus If the board is located in the first slot from the left it configures itself as the system controller When the board is operating as system controller the SCON LED is turned on If you want the MVME162P4 to function as system controller in all cases move the jumper to pins 1 2 If the MVME162P4 is not to be system controller under any circumstances remove the jumper from J1 Note MVMEIO2PA4 boards without the optional VMEbus interface 1 with no VMEchip2 ASIC the jumper may be installed or removed with no effect on normal operation J1 J1 J1 1 2 3 1 2 3 1 2 3 25623 System Controller Au
47. number if the command is set up to work with more than one port Any required arguments as specified by the command Atleast one space before the first argument Precede all other arguments with either a space or comma http www motorola com computer literature 3 5 162Bug Firmware One or more options Precede an option or a string of options with a semicolon If no option is entered the command s default option conditions are used Debugger Commands The 162Bug debugger commands are summarized in the following table The commands are described in detail in the Debugging Package for Motorola 68K CISC CPUs User s Manual Table 3 2 Debugger Commands Command Description AB Automatic Bootstrap Operating System NOAB No Autoboot AS One Line Assembler BC Block of Memory Compare BF Block of Memory Fill BH Bootstrap Operating System and Halt BI Block of Memory Initialize BM Block of Memory Move BO Bootstrap Operating System BR Breakpoint Insert NOBR Breakpoint Delete BS Block of Memory Search BV Block of Memory Verify CM Concurrent Mode NOCM No Concurrent Mode CNFG Configure Board Information Block CS Checksum DC Data Conversion DMA DMA Block of Memory Move DS One Line Disassembler DU Dump S records ECHO Echo String ENV Set Environment to Bug Operating System Computer Group Literature Center Web Site Debugger Comm
48. space defined with this slave address decoder Default is 0000 Master Enable 1 Y N Y Yes set up and enable Master Address Decoder 1 Master Starting Address 1 02000000 Base address of the VMEbus resource that is accessible from the local bus Default is the end of calculated local memory unless memory is less than 16MB then this register is always set to 01000000 Master Ending Address 1 EFFFFFFF Ending address of the VMEbus resource that is accessible from the local bus Default is the end of calculated memory Master Control 1 0 Defines the access characteristics for the address space defined with this master address decoder Default is 0D Master Enable 2 Y N N Do not set up and enable Master Address Decoder 2 Master Starting Address 2 00000000 address of the VMEbus resource that is accessible from the local bus Default is 00000000 Master Ending Address 2 00000000 Ending address of the VMEbus resource that is accessible from the local bus Default is 00000000 Master Control 2 00 Defines the access characteristics for the address space defined with this master address decoder Default is 00 Master Enable 3 Y N Depends on Yes set up and enable Master Address calculated Decoder 3 This is the default if the board size of local contains less than 16MB of calculated RAM RAM Do not set up and enable the Master Address Decoder 3 This is the default for boards containin
49. the PROM GPI4 Open to your application GPI5 Open to your application GPI6 Open to your application GPI7 N A Open to your application You may configure Port B of the Z85230 serial communications controller with a serial interface module SIM which you install at connector J15 on the MVME162P4 board Five serial interface modules are available EJA 232 D DTE 51 05 EIA 232 D DCE 5 06 EIA 530 DTE SIMM07 EIA 530 DCE 5 08 EIA 485 or 422 DTE or DCE all with SIMMO9 For information on removing and or installing a SIM refer to Chapter 1 Computer Group Literature Center Web Site Bringing up the Board 5 Headers J16 and J17 configure serial ports 1 and 2 to drive or receive clock signals provided by the TXC and RXC signal lines The 162 is factory configured for asynchronous communication it comes with no jumpers on J16 or J17 Refer to the instructions in Chapter 1 if your application requires configuring ports 1 and 2 for synchronous communication 6 Header J19 enables or disables the IP bus strobe function on the MVME162P4 The factory configuration puts no jumper on J19 disabling the Strobe signal to the Petra IP2 chip disconnected Verify that this setting is appropriate for your application 7 The jumpers on header J22 establish the SRAM backup power source on the MVME162P4 The factory co
50. the controller does not and the tape happens to be at load point the necessary command sequences Attach and Rewind cannot be given to the controller and the autoboot will not succeed As shipped from the factory 162Bug occupies the first quarter of Flash memory This leaves the remainder of the Flash memory and the socket XUI available for your use Note You may wish to contact your Motorola sales office for assistance in using these resources The ROMboot function is configured enabled via the command refer to Chapter 3 and is executed at power up optionally also at reset 2 10 Computer Group Literature Center Web Site Bringing up the Board You can also execute the ROMboot function via the RB command assuming there is valid code in the memory devices or optionally elsewhere on the board or VMEbus to support it If ROMboot code is installed a user written routine is given control if the routine meets the format requirements One use of ROMboot might be resetting the SYSFAIL line on an unintelligent controller module The NORB command disables the function For a user s ROMboot module to gain control through the ROMboot linkage four conditions must exist Power has just been applied but the command can change this to also respond to any reset Your routine is located within the MVME162P4 Flash PROM memory map but the ENV command can change this to any other portion
51. within the volume ID of the media specified is loaded into RAM and control passes to it If you want to gain control without Network Boot during this time however you can press the BREAK key or use the software ABORT or RESET switches Network Auto Boot is controlled by parameters contained in the NIOT and ENV commands These parameters allow the selection of specific boot devices systems and files and allow programming of the Boot delay Refer to the ENV command description in Chapter 3 for more details Restarting the System You can initialize the system to a known state in three different ways Reset Abort and Break Each method has characteristics which make it more suitable than the others in certain situations A special debugger function is accessible during resets This feature instructs the debugger to use the default setup operation parameters in ROM instead of your own setup operation parameters in NVRAM To activate this function you press the RESET and ABORT switches at the same time This feature can be helpful in the event that your setup operation parameters are corrupted or do not meet a sanity check Refer to the ENV command description in Chapter 3 for the ROM defaults Reset Powering up the MVME162P4 initiates a system reset You can also initiate a reset by pressing and quickly releasing the RESET switch on the MVME162P4 front panel or reset the board in software 2 12 Computer Group Literature Center
52. 12 serial Congnunicalous AO PPS Rete 4 12 THidustryPack Interiaces 4 15 Bihiertet oirean 4 16 VN 4 17 BEL Toti iioii oie te bI Ee DU GR IRde ER M 4 17 Local 4 17 Programmable Tick Tagen uisi ot n e 4 17 Watchdog TINET 4 18 Software Programmable Hardware 4 18 Local Bus 4 18 Local Bus AUDITOR Ce ret EE C HR PHA M ape o 4 19 ri m 4 19 Remote Staris and Cotto IEEE II p Ruso abd 4 20 CHAPTER 5 Pin Assignments Connector Pin tirando M 5 1 Industry Fack A B C DE OBDECDODRI d east 5 1 Remote Reser Orme 5 3 senal Port Module Connector J L5 5 4 eral Porto Cone SP TES or 5 5 senal Port Console Connector J23 5 6 5 6 APPENDIXA Specifications Board Species S 1 Cooling S enrere A 2 Special Considerations for Elevated Temperature Operation A 3 EMC Regulatory uud eser tab RE Spo HU Lr EA
53. 162P4 Embedded Controller Appendix C Network Controller Data describes the VMEbus network controller modules that are supported by the 162Bug firmware Appendix D Disk Tape Controller Data describes the VMEbus disk tape controller modules that are supported by the 162Bug firmware Appendix E Related Documentation provides all documentation related to the MVMEI62P4 Comments and Suggestions Motorola welcomes and appreciates your comments on its documentation We want to know what you think about our manuals and how we can make them better Mail comments to Motorola Computer Group Reader Comments DW164 2900 S Diablo Way Tempe Arizona 85282 You can also submit comments to the following e mail address reader comments mcg mot com In all your correspondence please list your name position and company Be sure to include the title and part number of the manual and tell how you used it Then tell us your feelings about its strengths and weaknesses and any recommendations for improvements xvii Conventions Used in This Manual The following typographical conventions are used in this document bold is used for user input that you type just as it appears it is also used for commands options and arguments to commands and names of programs directories and files italic is used for names of variables to which you assign values Italic is also used for comments in screen displays and examples and to i
54. 4 that affect these parameters appears in your MVMEIX2P4 VME Embedded Controller Programmer s Reference Guide Listed and described below are the parameters that you can configure using ENV The default values shown are those that were in effect when this document was published Note In the event of difficulty with the MVME162P4 you may wish to use env d lt CR gt to restore the factory defaults as a troubleshooting aid see Appendix B Configuring the 162Bug Parameters The parameters that can be configured using ENV are Table 3 3 ENV Command Parameters ENV Parameter and Options Default Meaning of Default Bug or System environment B S B Bug mode Field Service Menu Enable Y N N Do not display field service menu Remote Start Method Switch B Use both methods Global Control and Status G M B N Register GCSR in the VMEchip2 and Multiprocessor Control Register MPCR in shared to pass and execute cross loaded programs Probe System for Supported I O Y Accesses will be made to the appropriate Controllers Y N system buses e g VMEbus local MPU bus to determine presence of supported controllers Negate VMEbus SYSFAIL N Negate VMEbus SYSFAIL after successful Always Y N completion or entrance into the bug command monitor http www motorola com computer literature 162Bug Firmware Table 3 3 ENV Command Parameters Continued
55. 5 6 VMEbus connector P2 P2 Table 5 7 The tables in this chapter furnish pin assignments only For detailed descriptions of the interconnect signals consult the support information for the MVME162P4 available through your Motorola sales office IndustryPack A B C D Connectors Up to four IndustryPack IP modules may be installed on the MVME162P4 For each IP module there are two 50 pin plug connectors on the board Module A J4 5 Module B J10 11 Module C 720 21 Module D J29 30 5 1 Pin Assignments For external cabling to the IP modules four 50 pin IDC connectors module A J8 module B J7 module C J27 module D J26 are provided behind the MVME162P4 front panel The pin assignments are the same for both types of connector Table 5 1 IndustryPack Interconnect Signals GND CLK RESET IPDO IPDI IPD2 IPD3 IPD4 IPD5 IPD6 IPD7 IPD8 IPD9 IPD10 IPDII IPD12 IPD13 IPD14 IPD15 BS BS1 12V 12V T5V GND GND 5V R W IDSEL DMAREQO MEMSEL DMAREQI INTSEL DMACK IOSEL No Connection IPAI DMAEND IPA2 ERROR IPA3 INT REQO 4 INT REQI 5 5 6 ACK No Connection GND 5 2 Computer Group Literature Center Web Site Remote Reset Connector J6 Remote Reset Connector J6 MVME162P4 has a 20 pin connector J6 mounted behind the front panel
56. AM 2 SIO 4 DMA IP SCSI Ethernet If the part number of your board includes a PA for example MVME162PA 244L your board is equipped with a second generation Petra ASIC All other particulars of the board remain the same This manual is intended for anyone who designs OEM systems adds capability to an existing compatible system or works in a lab environment for experimental purposes A basic knowledge of computers and digital logic is assumed To use this manual you may also wish to become familiar with the publications listed in the Related Documentation section in Appendix E XV Summary of Changes This is the second edition of MVME162P4 Installation and Use It supersedes the June 2000 edition and incorporates the following updates Date October 2000 Description of Change In the description of the snoop control switch on page 1 18 entries in the table concerning boards equipped with the MC68060 processor have been corrected October 2000 Several jumper drawings and configuration descriptions in Chapters 1 and 2 have been updated to reflect the current board layout and shipping configuration October 2000 Drawings pertaining to MVME712A AM 12 13 series transition boards have been deleted from the illustrations of serial connections at the end of Chapter 1 as those boards are out of production References to them in the Serial Communications Interface section of Chapter
57. ARNING Memory MAP Overlap Condition Exists S Address E Address Enable Overlap Typ Memory MAP Nam 00000000 SFFFFFFFF Yes Yes aster Local Memory Dynamic RAM SFFEO00000 SFFE7FFFF Yes Yes aster Static RAM 01000000 SEFFFFFFF Yes Yes aster VMEbus Master 1 00000000 00000000 No No aster VMEbus Master 2 00000000 SOOFFFFFF Yes Yes aster VMEbus Master 3 00000000 00000000 No No aster VMEbus Master 4 F0000000 SFF7FFFFF Yes Yes aster VMEbus Pages A24 A32 5 0000 SFFFFFFFF Yes Yes aster VMEbus Short I O A16 SFF800000 SFFBFFFFF Yes Yes aster Flash PROM SFFF00000 SFFFEFFFF Yes Yes aster Local I O 00000000 00000000 No No aster Industry Pack A 00000000 00000000 No No aster Industry Pack B 00000000 00000000 No No aster Industry Pack C 00000000 00000000 No No aster Industry Pack D 00000000 00000000 No No Slave VMEbus Slave 1 00000000 00000000 No No Slave VMEbus Slave 2 3 22 Computer Group Literature Center Web Site Functional Description Introduction This chapter describes the 162 4 embedded controller on a block diagram level The Summary of Features provides an overview of the MVME162P4 followed by a detailed description of several blocks of circuitry Figure 4 1 shows a block diagram of the overall board architecture Detailed descriptions of other 162 4 blocks including programmable registers in the ASICs and peripheral chips can be foun
58. C For example the following command line starts the real time clock and sets the date and time to 10 37 a m September 7 2000 2 8 Computer Group Literature Center Web Site Bringing up the Board 162 Bug SET 0907001037 The board s self tests and operating systems require that the real time clock be running Note you wish to execute the debugger out of Flash and Flash does not contain 162Bug you may copy the EPROM version of 162Bug to Flash memory To copy the EPROM version of 162Bug to Flash memory first verify that a jumper is in place on J24 to enable Flash writes set switch S4 segment 5 to ON make sure that 162Bug is in Bug mode Then copy the EPROM contents to Flash memory with the PFLASH command as follows 162 Bug PFLASH FF800000 80000 FFA00000 Then remove the jumper from J24 if you wish to disable subsequent Flash writes and slide switch S4 segment 5 back to OFF 162Bug always executes from memory location FF800000 the setting of S4 determines whether that location is in or Flash Autoboot Autoboot is a software routine included in the 162Bug Flash EPROM to provide an independent mechanism for booting operating systems The autoboot routine automatically scans for controllers and devices in a specified sequence until a valid bootable device containing a boot media is found or the list is exhausted If a valid bootable device is found a boot from that device is started The controll
59. Caution information in Chapter 1 If one of the jumpers is set to select the battery a battery must be present on the MVME162P4 The SRAM may malfunction if inputs to the CR2032 are left unconnected The SRAM is controlled by the Petra MC2 sector and the access time is programmable Refer to the description of the Petra MC2 emulation in the MVMEIX2P4 VME Embedded Controller Programmer s Reference Guide for more detail About the Battery The power source for the onboard SRAM is a coin type Panasonic CR2032 device or equivalent with two lithium cells The battery is socketed for easy removal and replacement Small capacitors are provided so that the battery can be quickly replaced without data loss The service life of the battery is very dependent on the ambient temperature of the board and the power on duty cycle The lithium battery supplied on the MVME162P4 should provide at least two years of backup time with the board powered off and with an ambient temperature of 40 C If the power on duty cycle is 50 the board is powered on half of the time the battery lifetime is four years At lower ambient temperatures the backup time is correspondingly longer If you intend to place the board in storage putting the 48 58 in power save mode by stopping the oscillator will prolong battery life This is especially important at high ambient temperatures To enter power saving mode execute the 162Bug PS command refer to Debugger Commands
60. Coprocessor User s Manual 296853 28F016SA Flash Memory Data Sheet 209435 Intel Corporation Web http developer intel com design SYM 53C710 was 53C710 SCSI I O Processor Data Manual NCR53C710DM SYM 53C710 was NCR 53C710 SCSI I O Processor Programmer s Guide NCR53C710PG Symbios Logic Inc 1731 Technology Drive Suite 600 San Jose CA 95110 NCR Managed Services Center Telephone 1 800 262 7782 Web http www lsilogic com products symbios M48T58 B TIMEKEEPER and 8K x 8 Zeropower RAM Data Sheet M48T58 SGS Thomson Microelectronics Group Marketing Headquarters or nearest Sales Office 1000 East Bell Road Phoenix Arizona 85022 Telephone 602 867 6100 Web http www st com stonline books E 2 Computer Group Literature Center Web Site Related Specifications Table E 2 Manufacturers Documents Continued Publication Document Title and Source Number 785230 Serial Communications Controller Product Brief Z85230pb pdf Zilog Inc 210 Hacienda Avenue Campbell CA 95008 6609 Web http www zilog com products Related Specifications For additional information refer to the following table for manufacturers data sheets or user s manuals As a further help sources for the listed documents are also provided Please note that in many cases the information is preliminary and the revision levels of the documents are subject to change without notice Table E 3 Rela
61. EIA 485 422 interface six tick timers with watchdog timer s an EPROM socket 1 or 2MB Flash memory one Flash device four IndustryPack IP interfaces with DMA optional SCSI bus interface with DMA and an optional VMEbus interface local bus to VMEbus VMEbus to local bus with A16 A24 A32 D8 D16 D32 bus widths and a VMEbus system controller Implementation Input Output I O signals on the MVME162P4 are routed to the VMEbus P2 connector The main board is connected through a P2 adapter board and cables to the transition boards MVME162P4 supports the MVME712M and MVME712B series of transition boards referred to in this manual as MVME712x unless separately specified The MVME712x transition boards provide configuration headers serial port drivers and industry standard connectors for various I O devices Although MVME712x series transition boards were originally designed to support MVME167 boards they lend themselves readily to the MVMEI62P4 application as long as you keep a few special considerations in mind refer to the section on the Serial Communications Interface later in this chapter for details The connection for the serial ports on the MVME162P4 is also implemented with two DB25 connectors on the front panel In addition the panel has cutouts for routing of flat cables to the optional IndustryPack modules http www motorola com computer literature 4 3 Functional Description AS
62. FF5000 05 FFFF5100 Controller Notes 1 If an MVME162P4 with an SCSI port is used the MVME162P4 module has CLUN 0 2 For MVME162P4s the first MVME320 has CLUN 11 the second MVME320 has CLUN 12 Disk Tape Controller Data Default Configurations Note SCSI Common Command Set CCS devices are the only ones tested by Motorola Computer Group CISC Embedded Controllers 7 Devices Controller LUN Address Device LUN Device Type 0 XXXXXXXX 00 SCSI Common Command Set CCS which 10 may be any of these 20 Fixed direct access 30 Removable flexible direct access 40 TEAC style CD ROM 50 Sequential access 60 20 4 Devices Controller LUN Address Device LUN Device Type 11 SFFFFB000 0 Winchester hard drive 1 Winchester hard drive 12 FFFFACOO 2 5 1 4 DS DD 96 TPI floppy drive 3 5 1 4 DS DD 96 TPI floppy drive D 2 Computer Group Literature Center Web Site Default Configurations MVME323 4 Devices Controller LUN Address Device LUN Device Type 8 FFFFA000 0 ESDI Winchester hard drive 1 ESDI Winchester hard drive 9 FFFFA200 2 ESDI Winchester hard drive 3 ESDI Winchester hard drive MVME327A 9 Devices Controller LUN Address Device LUN Device Type 2 FFFFA600 00 SCSI Common Command Set 10 CCS which may be any of these 3 SFFFFA700 20 Fixed direct access 30 Removable flexible direct acces
63. ICs The following ASICs are used on the MVME162P4 VMEchip2 ASIC VMEbus interface Provides two tick timers a watchdog timer programmable map decoders for the master and slave interfaces and a VMEbus to from local bus DMA controller as well as a VMEbus to from local bus non DMA programmed access interface a VMEbus interrupter a VMEbus system controller a VMEbus interrupt handler and a VMEbus requester Processor to VMEbus transfers are D8 D16 or D32 VMEchip2 DMA transfers to the VMEbus however are D16 D32 DI6 BLT D32 BLT or D64 MBLT Petra ASIC Combines the functions previously covered by the MC2 chip the MCECC chip and the IP2 chip in a single ASIC MC2 function Provides a parity DRAM emulation Also supplies four tick timers and interfaces to the LAN chip SCSI chip serial port chip BBRAM EPROM Flash and SRAM MCECC function Provides an ECC DRAM emulation 1 2 function Provides control and status information for up to four single wide or two double wide IndustryPack modules that can be plugged into the MVME162P4 main board Block Diagram The block diagram in Figure 4 1 on page 4 5 illustrates the MVME162P4 s overall architecture Functional Description This section contains a functional description of the major blocks on the MVME162P4 4 4 Computer Group Literature Center Web Site Functional Description DB 25 Front Panel
64. MEchip2 ASIC VME I O VMEbus P2 connector Two EIA 232 D EIA 530 EIA 422 or EIA 425 configurable serial ports Serial I O via front panel and transition module Ethernet Optional Ethernet transceiver interface via DB15 connector on transition module IP interface Four IndustryPack interface channels via 3M connectors behind front panel SCSIIO Optional SCSI interface with DMA via P2 or LCP2 adapter board VMEbus interface VMEbus system controller functions VMEbus to local bus interface A24 A32 D8 D16 D32 block transfer D8 D16 D32 D64 Local bus to VMEbus interface A16 A24 A32 D8 D16 D32 VMEbus interrupter VMEbus interrupt handler Global Control Status Register GCSR for interprocessor communications for fast local memory VMEbus transfers A16 A24 A32 D16 D32 D64 Processor and Memory The MVME162P4 is based on the MC68040 MC68LC040 microprocessor The boards are built with 16MB or 32MB synchronous DRAM SDRAM Various versions of the MVME162P4 may have the SDRAM configured to model IMB 4MB 8MB or 16MB of parity protected DRAM or 4MB 8MB 16MB or 32MB of ECC protected DRAM Computer Group Literature Center Web Site Summary of Features boards are available with 512KB of SRAM with battery backup time of day clock with battery backup an optional Ethernet transceiver interface two serial ports with 232 or EIA 530 or
65. MHz IndustryPack clock selection jumper selectable and one programmable timebase strobe which is connected to the four interfaces Refer to the IP2 programming model in the MVMEIX2P4 VME Embedded Controller Programmer s Reference Guide for details of the IP interface Refer to Chapter 5 for the pin assignments of the IP connectors http www motorola com computer literature 4 15 Functional Description Notes MVME162P4 boards do not monitor power supply 5 Vdc power and assert IP reset if the power falls too low Instead IP reset is handled by the162Bug firmware s ENV command as described in Chapter 3 The IP reset is also driven active by the power up reset signal Two IP modules plugged into the same MVME162P4 board can not use the Strobe signal unless the jumper is removed from J19 This will disconnect the Strobe output from the Petra IP2 ASIC Ethernet Interface The MVME162P4 uses the Intel 82596CA LAN coprocessor to implement the optional Ethernet transceiver interface The 82596 accesses local RAM using DMA operations to perform its normal functions Because the 82596 has small internal buffers and the VMEbus has an undefined latency period buffer overrun may occur if the DMA is programmed to access the VMEbus Therefore the 82596 should not be programmed to access the VMEbus Every MVME162P4 that is built with an Ethernet interface is assigned Ethernet Station Address The address is 0001 AFOxxxxx
66. MVME374 10 00 000000 Ethernet MVME374 11 00 FF100000 Ethernet MVME374 12 00 FF200000 Ethernet MVME374 13 00 FF300000 Ethernet MVME374 14 00 FF400000 Ethernet MVME374 15 00 FF500000 Ethernet 1 Network Controller Data C 2 Computer Group Literature Center Web Site Disk Tape Controller Data Controller Modules Supported The following VMEbus disk tape controller modules are supported by the 162Bug The default address for each controller type is First Address The controller can be addressed by First CLUN during execution of the BH BO or IOP commands or during execution of the DSKRD or DSKWR TRAP 15 calls Note that if another controller of the same type is used the second one must have its address changed by its onboard jumpers and or switches so that it matches Second Address and can be called up by Second CLUN Controller T First First Second Second UTE S MES CLUN Address CLUN Address CISC Embedded Controller 00 Note 1 20 Winchester Floppy 11 Note 2 FFFFBO000 12 Note 2 FFFFACOO Controller MVME323 ESDI Winchester 08 FFFFA000 09 FFFFA200 Controller MVME327A SCSI Controller 02 FFFFA600 03 FFFFA700 MVME328 SCSI Controller 06 FFFF9000 07 FFFF9800 MVME328 SCSI Controller 16 FFFF4800 17 FFFF5800 MVME328 SCSI Controller 18 FFFF7000 19 FFFF7800 MVME350 Streaming Tape 04 FF
67. N IndustryPack B Artwork PWA Identifier IndustryPack C Board Identifier IndustryPack C PWA Serial Number IndustryPack Artwork PWA Identifier IndustryPack D Board Identifier IndustryPack D PWA Serial Number ii IndustryPack D Artwork PWA Identifier 162 Bug The parameters that are quoted are left justified character strings padded with space characters and the quotes are displayed to indicate the size of the string Parameters that are not quoted are considered data strings and data strings are right justified The data strings are padded with zeros if the length is not met The Board Information Block is factory configured before shipment There is no need to modify block parameters unless the NVRAM is corrupted Refer to the MVME162P VME Embedded Controller Programmer s Reference Guide for the actual location and other information about the Board Information Block Refer to the Debugging Package for Motorola 68K CISC CPUs User s Manual for a description and examples Computer Group Literature Center Web Site Modifying the Environment ENV Set Environment Use the ENV command to view and or configure interactively all 162Bug operational parameters that are kept in Non Volatile RAM NVRAM Refer to the Debugging Package for Motorola 68K CISC CPUs User s Manual for a description of the use of ENV Additional information on registers in the MVME162P
68. N OFF OFF 32MB OFF ON ON 64MB Note For the MCECC memory model to be enabled the 2 emulation must be disabled You disable the MC2 memory model by setting the MC2 DRAM size select switch S3 to 110 Off Off On Refer to MC2 DRAM Size 53 for further details The factory default setting for 56 is 16MB On Off On If you modify the switch settings you will need to execute env d CR so that the firmware recognizes the new memory defaults Installation Instructions This section covers a Installation of IndustryPacks IPs on the MVME162P4 Installation of the MVME162P4 in a VME chassis System considerations relevant to the installation Ensure that an EPROM device is installed as needed Before installing IndustryPacks ensure that the serial ports and all header jumpers and configuration switches are set as appropriate Computer Group Literature Center Web Site Installation Instructions IP Installation on the MVME162PA MVME162P4 accommodates up to four IndustryPack IP modules Install the IP modules on the MVME162P4 as follows 1 Each IP module has two 50 pin connectors that plug into two corresponding 50 pin connectors on the MVME162P4 14 15 J10 J11 J20 J21 129 730 See Figure 2 1 for the MVME162P4 connector locations Orient the IP module s so that the tapered connector shells mate properly Plug a into connectors J4 and J5 plug IP_b into J10 and J11 Pl
69. ON ON 4MB OFF ON OFF 8MB OFF OFF ON Disabled OFF OFF OFF 16 Notes As shown in the preceding table the Petra MC2 interface supports parity DRAM emulations up to 16MB For sizes beyond 16MB it is necesary to use the MCECC memory model For access to the MCECC registers you must first disable the MC2 interface by setting S3 to 001 Off Off On Further details on selecting the MCECC emulation can be found under MCECC DRAM Size S6 If you modify the switch settings you will need to execute env d CR so that the firmware recognizes the new memory defaults Computer Group Literature Center Web Site Preparing the Board General Purpose Readable Switch S4 Pin 5 Switch S4 is similar in function to the general purpose readable jumper headers found on earlier MVME162 172 series boards S4 provides eight software readable switch segments These switches can be read as bits in a register at address FFF4202C the MC2 General Purpose Inputs register in the Petra ASIC refer to the Programmer s Reference Guide for details Bit GPI7 is associated with switch segment 1 bit GPIO is associated with switch segment 8 The bit values are read as a 0 when the switch is on and as a 1 when the switch is off The MVME162P4 is shipped from the factory with S4 set to all 05 all switches set to ON as diagrammed below If the MVME162Bug firmware is installed four bits are user definable 1 switch segments
70. Petra MC2 function the MC2 emulation can handle up to four Z85230 chips Refer to the 785230 data sheet listed listed under Manufacturer s Documents in the Related Documentation appendix and to the MC2 programming model in MVMEIX2P4 VME Embedded Controller Programmer s Reference Guide for information MVME162P4 Serial Port 1 Port A on the 785230 is interfaced as DCE data circuit terminating equipment with the ELA 232 D interface and is routed to 1 The DB25 connector marked SERIAL PORT 1 CONSOLE on the front panel of the MVME162P4 SERIAL PORT 1 CONSOLE is 232 D DCE port Note This port be connected to the TX and RX clocks which may be present on the DB25 connector These connections are made via jumper header J16 on the MVME162P4 board The TXC and RXC clock lines are not available on the MVME712x transition modules 2 The DB25 connector marked SERIAL PORT 2 on the front panel of the MVME7 12M transition module if used SERIAL PORT 2 can be configured as an EIA 232 D DTE or DCE port via jumper headers J16 and J17 Figure 1 3 sheets 1 and 2 in Chapter 1 illustrates the two configurations available for Port A when the MVME162P4 is used with an MVME712M MVME162P4 Serial Port 2 The configuration of port B on the Z85230 is determined via a Serial Interface Module SIM which is installed at connector J15 on the MVME162P4 board Five SIMs are available http www motorola com computer liter
71. SI VMEbus and MPU As a general rule any master can access any slave not all combinations pass the common sense test however Refer to the MVMEIX2P4 VME Embedded Controller Programmer s Reference Guide and to the user s guide for each device to determine its port size data bus connection and any restrictions that apply when accessing the device Microprocessor MVME162P4 models may be ordered with an MC68040 or MC68LC040 microprocessor The MC68040 has on chip instruction and data caches and a floating point processor floating point coprocessor is the major difference between the MC68040 and MC68LC040 Refer to the MC68040 user s manual for more information MC68xx040 Cache The MVME162P4 local bus masters VMEchip2 processor 53C710 SCSI controller and 82596 Ethernet controller have programmable control of the snoop caching mode The IP DMA local bus master s snoop control function is governed by the settings of switch S5 segments 1 and 2 refer to IP DMA Snoop Control S5 Pins 1 2 on page 1 18 S5 determines the value of the snoop control signal for all IP DMA transfers This includes the IP DMA which executes when the DMA control registers are updated while the IP DMA is operating in command chaining mode The MVME162P4 local bus slaves that support the snoop caching mode are defined in the Local Bus Memory section of MVMEIX2P4 VME Embedded Controller Programmer s Reference Guide 4 6 Comput
72. Site Preparing the Board IP Bus Strobe J19 Some IP bus implementations make use of the Strobe signal pin AA19 on the Petra ASIC as an input to the IP modules from the Petra IP2 sector Other IP interfaces require that the strobe be disconnected With a jumper installed between J19 pins 1 2 a programmable frequency source is connected to the Strobe signal on the IP bus for details refer to the Petra IP2 chip programming model in the Programmer s Reference Guide If the jumper is removed from J19 the strobe line is available for a sideband type of messaging between IP modules The Strobe signal is not connected to any active devices on the board but it may be connected to a pull up resistor J19 J19 2 2 1 1 Strobe disconnected IP Strobe connected Factory configuration SRAM Backup Power Source J22 Header J22 determines the source for onboard static RAM backup power on the MVME162P4 In the factory configuration VMEbus 5V standby voltage serves as primary and secondary power source the onboard battery is disconnected The backup power configurations available for onboard SRAM through header J22 are illustrated in the following diagram Note For MVME162P4s without the optional VMEbus interface i e without the VMEchip2 ASIC you must select the onboard battery as the backup power source http www motorola com computer literature 1 13 Hardware Pre
73. VME162P4 models ordered without the VMEbus interface are shipped with Flash memory blank the factory uses the VMEbus to program the Flash memory with debugger code To use the debugger firmware be sure that configuration switch 54 is set for the memory map Refer to chapters 1 and 3 for further details Battery Backed Up RAM and Clock An M48T58 RAM and clock chip is used on the MVME162P4 This chip provides a time of day clock oscillator crystal power fail detection memory write protection 8KB of RAM and a battery one 28 package The clock provides seconds minutes hours day date month and year in BCD 24 hour format Corrections for 28 29 leap year and 30 day months are made automatically No interrupts are generated by the clock Although the M48T58 is 8 bit device the interface provided by the Petra chip supports 8 16 and 32 bit accesses to the 48 58 Refer http www motorola com computer literature 4 11 Functional Description to the description of the Petra MC2 function in the MVMEIX2P4 VME Embedded Controller Programmer s Reference Guide and to the 48 58 data sheet for detailed programming guidance and battery life information VMEbus Interface and VMEchip2 The VMEchip2 ASIC provides the local bus to V MEbus interface the VMEbus to local bus interface and the DMA controller functions of the local VMEbus The VMEchip2 also provides the VMEbus system controller function
74. VME162P4 waits forever for the VMEbus cycle to complete This will cause the system to lock up There is only one situation in which the system might lack this global bus timeout when the MVME162P4 is not the system controller and there is no global bus timeout elsewhere in the system Multiple MVME162P4s may be installed in a single VME chassis In general hardware multiprocessor features are supported Note If you are installing multiple MVME162P4s in an MVME945 chassis do not install MVME162P4 in slot 12 The height of the IP modules may cause clearance difficulties in that slot position Computer Group Literature Center Web Site Installation Instructions Other MPUs on the VMEbus can interrupt disable communicate with and determine the operational status of the processor s One register of the GCSR global control status register set in the VMEchip2 ASIC includes four bits that function as location monitors to allow one MVME162P4 processor to broadcast a signal to any other MVME162P4 processors eight registers of the GCSR set are accessible from any local processor as well as from the VMEbus The following circuits are protected by solid state fuses that open during overload conditions and reset themselves once the overload 15 removed IndustryPack 45V F1 Remote reset connector 5 F2 LAN AUI 12V a IndustryPack 12V F5 The FUSE LED illuminates to indicate that 12
75. Web Site Restarting the System Abort For details on resetting the MVME162P4 board through software refer to the MVMEIX2P4 Embedded Controller Programmer s Reference Guide Both cold and warm reset modes are available By default 162Bug is in cold mode During cold resets a total system initialization takes place as if the MVME162P4 had just been powered up static variables including disk device and controller parameters are restored to their default states The breakpoint table and offset registers are cleared The target registers are invalidated Input and output character queues are cleared Onboard devices timer serial ports etc are reset and the two serial ports are reconfigured to their default state During warm resets the 162Bug variables and tables are preserved as well as the target state registers and breakpoints Note that when the MVME162P4 comes up in a cold reset 162Bug runs in Board mode Using the Environment ENV or MENU commands can make 162Bug run in System mode Refer to Chapter 3 for specifics You will need to reset your system if the processor ever halts or if the 162Bug environment is ever lost vector table is destroyed stack corrupted etc Aborts are invoked by pressing and releasing the ABORT switch on the MVME162P4 front panel When you invoke an abort while executing a user program running target code a snapshot of the processor state is stored in the tar
76. act your sales representative Notice While reasonable efforts have been made to assure the accuracy of this document Motorola Inc assumes no liability resulting from any omissions in this document or from the use of the information obtained therein Motorola reserves the right to revise this document and to make changes from time to time in the content hereof without obligation of Motorola to notify any person of such revision or changes Electronic versions of this material may be read online downloaded for personal use or referenced in another document as a URL to the Motorola Computer Group website The text itself may not be published commercially in print or electronic form edited translated or otherwise altered without the permission of Motorola Inc It is possible that this publication may contain reference to or information about Motorola products machines and programs programming or services that are not available in your country Such references or information must not be construed to mean that Motorola intends to announce such Motorola products programming or services in your country Limited and Restricted Rights Legend If the documentation contained herein is supplied directly or indirectly to the U S Government the following notice shall apply unless otherwise agreed to in writing by Motorola Inc Use duplication or disclosure by the Government is subject to restrictions as set forth in subparagraph b 3
77. ammer s Reference Guide An onboard battery supplies VCC to the SRAM when main power is removed The worst case elapsed time for battery protection is 200 days The SRAM arrays are not parity protected The battery backup function for the onboard SRAM is provided by a coin type Panasonic CR2032 device or equivalent that supports primary and secondary power sources In the event of a main board power failure the CR2032 checks power sources and switches to the source with the higher voltage If the voltage of the backup source is lower than two volts the CR2032 blocks the second memory cycle this allows software to provide an early warning to avoid data loss Because the second access may be blocked during a power failure software should do at least two accesses before relying on the data The MVME162P4 provides jumpers J22 that allow either power source of the backup battery to be connected to the VMEbus 5 STDBY pin or to one cell of the onboard battery For example the primary system 4 8 Computer Group Literature Center Web Site Functional Description backup source may be a battery connected to the VMEbus 5 STDBY pin and the secondary source may be the onboard battery If the system source should fail or the board 15 removed from the chassis the onboard battery takes over For proper SRAM operation some jumper combination must be installed N on the Backup Power Source Select header refer to the jumper
78. and ensure proper operation of the MVME162P4 you may need to reconfigure hardware to some extent before installing the module Most options on the MVME162P4 are under software control By setting bits in control registers after installing the module in a system you can modify its configuration The MVME162P4 registers are described in Chapter 3 under Set Environment and or in the MVMEIX2P4 Embedded Controller Programmer s Reference Guide as listed in Related Documentation in Appendix E Some options though are not software programmable Such options are either set by configuration switches or are controlled through physical installation or removal of header jumpers or interface modules on the base board 1 4 Computer Group Literature Center Web Site Preparing the Board MVME162P4 Configuration Figure 1 1 illustrates the placement of the jumper headers connectors configuration switches and various other components on the MVME162P4 Manually configurable jumper headers and configuration switches on the MVME162P4 are listed in the following table Table 1 2 MVME162P4 Configuration Settings Function Factory Default VME System Controller J1 on page 1 7 2 3 IP Bus Clock J14 on page 1 8 1 2 SIM Selection for Serial Port B J15 on page 1 9 5 06 Serial Port 1 Console Clock 716 on page 1 12 No Jumpers Serial Port 2 Clock J17 on page 1 12 No Jumper
79. ands Table 3 2 Debugger Commands Continued Command Description GD Go Direct Ignore Breakpoints GN Go to Next Instruction GO Go Execute User Program GT Go to Temporary Breakpoint HE Help IOC I O Control for Disk IOI I O Inquiry IOP I O Physical Direct Disk Access IOT I O Teach for Configuring Disk Controller IROM Interrupt Request Mask LO Load S records from Host MA Macro Define Display NOMA Macro Delete MAE Macro Edit MAL Enable Macro Expansion Listing NOMAL Disable Macro Expansion Listing MAW Save Macros MAR Load Macros MD Memory Display MENU Menu MM Memory Modify MMD Memory Map Diagnostic MS Memory Set MW Memory Write NAB Automatic Network Boot Operating System NBH Network Boot Operating System and Halt NBO Network Boot Operating System NIOC Network I O Control NIOP Network I O Physical NIOT Network I O Teach NPING Network Ping OF Offset Registers Display Modify PA Printer Attach http www motorola com computer literature 162Bug Firmware Table 3 2 Debugger Commands Continued Command Description NOPA Printer Detach PF Port Format NOPF Port Detach PFLASH Program FLASH Memory PS Put Into Power Save Mode for Storage RB ROMboot Enable NORB ROMboot Disable RD Register Display REMOTE Connect the Remote
80. argest memory size to start at the address selected with the ENV parameter Base Address of Dynamic Memory The Base Address parameter defaults to 0 The smaller sized mezzanine will follow immediately above the larger in the memory map If mezzanines of the same size and type are present the first closest to the board is mapped to the selected base address If mezzanines of the same size but different type parity and ECC are present the parity type will be mapped to the selected base address and the ECC type mezzanine will follow The SRAM does not default to a location in the memory map that is contiguous with Dynamic RAM Base Address of Dynamic 00000000 Beginning address of Dynamic Memory Memory Parity and or ECC type memory Must be a multiple of the Dynamic Memory board size starting with 0 Default is 0 Size of Parity Memory 00100000 The size of the Parity type dynamic RAM mezzanine if any The default is the calculated size of the Dynamic memory mezzanine board Size of ECC Memory Board 0 00000000 The size of the first ECC type memory mezzanine The default is the calculated size of the memory mezzanine Size of ECC Memory Board 1 00000000 size of the second ECC type memory mezzanine The default is the calculated size of the memory mezzanine Base Address of Static Memory 00000 The beginning address of SRAM The default is FFE00000 for the onboard 128KB SRAM or E1000000 for the 2MB SRAM mezzanine I
81. ature 4 13 Functional Description SIMM05 DTE with EIA 232 D interface SIMM06 DCE with EIA 232 D interface SIMM07 DTE with EIA 530 interface SIMMOS DCE with EIA 530 interface SIMMO09 EIA 485 interface or DCE or DTE with ELA 422 interface Port B is routed via the SIM to 1 The DB25 connector marked SERIAL PORT 2 on the front panel of the MVME162P4 SERIAL PORT 2 will be EIA 232 D DCE or DTE port or an EIA 530 DCE or DTE port or an EIA 485 port or an EIA 422 DCE or DTE port depending upon which SIM is installed Note Port B is factory configured for asynchronous communication For synchronous communication this port can be connected to the TX and RX clocks which may be present on the DB25 connector These connections are made via jumper header J17 on the MVME162P4 board The TxC and RxC clock lines are available at the MVME712M SERIAL PORT 4 port via header J15 but are not available on the other MVME712x transition modules 2 The DB25 connector marked SERIAL PORT 4 on the front panel of the MVME712M transition module if used SERIAL PORT 4 can be configured as an EIA 232 D DTE or DCE port via jumper headers J18 and J19 on the MVME712M Figure 1 3 sheets 3 through 6 in Chapter 1 illustrates the four configurations available for Port B when the MVME162P4 is used with an MVMETI2M Note that the port configurations shown in Figure 1 3 sheets 5 and 6 are not recommended for synchronous applica
82. cludes a set of hardware diagnostics for testing and troubleshooting the MVME162P4 To use the diagnostics switch directories to the diagnostic directory If you are in the debugger directory you can switch to the diagnostic directory with the debugger command Switch Directories SD The diagnostic prompt 162 Diag gt appears Refer to the Debugging Package for Motorola 68K CISC CPUs User s Manual for complete descriptions of the diagnostic routines available and instructions on how to invoke them Note that some diagnostics depend on restart defaults that are set up only in a particular restart mode The documentation for such diagnostics includes restart information 2 14 Computer Group Literature Center Web Site 162Bug Firmware Introduction The 162Bug firmware is the layer of software just above the hardware The firmware supplies the appropriate initialization for devices on the MVME162P4 board upon power up or reset This chapter describes the basics of 162Bug and its architecture describes the monitor interactive command portion of the firmware in detail and gives information on using the debugger and special commands A list of 162Bug commands appears at the end of the chapter For complete user information about 162Bug refer to the Debugging Package for Motorola 68K CISC CPUs User s Manual and to the MVME162Bug Diagnostics User s Manual listed under Related Documentation 162Bug Overview The firmware for th
83. ctly 3 Place the one or two 4 40 x 9 16 Phillips head screw s that you previously removed or that were supplied with the new SIM into the one center or two opposite corner mounting hole s Turn the screw s into the standoff s but do not overtighten Caution The signal relationships and signal connections in the various serial configurations available for ports A and B are illustrated in Figures 1 3 through 1 6 http www motorola com computer literature 1 11 Hardware Preparation and Installation Serial Port 1 Console Clock J16 The MVME162P4 is shipped from the factory with the SERIAL PORT 1 CONSOLE header configured for asynchronous communications 1 jumpers removed To select synchronous communications for the SERIAL PORT 1 CONSOLE connection install jumpers across pins 1 2 and pins 3 4 J16 J16 4 3 4 3 2 1 2 1 Internal Clock External Clock Factory configuration Serial Port 2 Clock J17 The MVME162P4 is shipped from the factory with the SERIAL PORT 2 header configured for asynchronous communications 1 jumpers removed To select synchronous communications for the SERIAL PORT 2 connection install jumpers across pins 1 2 and pins 3 4 J17 J17 4 3 4 3 2 1 2 1 Internal Clock External Clock Factory configuration 1 12 Computer Group Literature Center Web
84. ctory configuration inhibits snooping Enabling snooping requires one of two possible ON OFF combinations according to the operation desired MVME172P4 boards with an MC68060 processor have different snoop functionality The following table lists the snoop operations represented by the settings of S5 with both types of processor For further details refer to the MC68040 or MC68060 microprocessor user s manuals listed in the Related Documentation appendix Table 1 4 Switch S5 Snoop Control Encoding 5 1 55 2 Requested Snoop Operation Sen 4860 MC68040 MC68060 On On Snoop disabled Snoop enabled On Off Source dirty sink byte word longword Snoop disabled Off On Source dirty invalidate line Snoop enabled Off Off Snoop disabled Reserved Snoop disabled Computer Group Literature Center Web Site Preparing the Board IP Reset Mode S5 Pin 3 Segment 3 of switch S5 defines the IP controller model IP1 or IP2 to be emulated when the board comes up With S5 segment 3 set to ON the factory configuration the board initializes in IP2 mode With S5 segment 3 set to OFF the board initializes in IPI mode S5 OFF IP2 reset mode factory configuration 2736 0004 2 3 In IP2 mode IP resets occur only in response to a direct software write or to a power up reset the IP reset control bit is not self clearing mode the IP reset control bit clears itself afte
85. d 2 Check that the board is securely installed in its backplane or chassis 3 Check that all necessary cables are connected to the board per this manual 4 Check for compliance with System Considerations as described in this manual 5 Review the Installation and Startup procedures as described in this manual They include a step by step powerup routine Try it B If the LEDs are lit the board may be in the wrong slot 1 For VMEmodules the processor module controller should be in the first leftmost slot 2 Also check that the system controller function on the board is enabled per this manual C The system console terminal may be configured incorrectly Configure the system console terminal as described in this manual B 1 Troubleshooting Table B 1 Troubleshooting MVME162P4 Boards Condition II There is a display on the terminal but input from the keyboard has no effect Possible Problem A The keyboard may be connected incorrectly Try This Recheck the keyboard connections and power B Board jumpers or switches may be configured incorrectly Verify the settings of the board jumpers and configuration switches as described in this manual C You may have invoked flow control by pressing a HOLD or PAUSE key or Press the HOLD or PAUSE key again If this does not free up the keyboard type in lt CTRL gt Q
86. d in the MVMEIX2P4 Embedded Controller Programmer s Reference Guide part number V1X2PFXA PG Refer to that manual for a functional description of the MVME162P4 in greater depth Summary of Features The following table summarizes the features of the MVME162P4 embedded controller Table 4 1 MVME162P4 Features Feature Microprocessor Description MVME162P4 25MHz or 32MHZ MC68040 or MC68LC040 processor Form factor 6U VMEbus Memory 16 32MB synchronous DRAM SDRAM configurable to emulate 1 4 8 16MB parity protected DRAM or 4 8 16 32MB ECC protected DRAM 512KB SRAM with battery backup Flash memory MVME162P4 One Intel 28F016SA 1MB or 2MB 8 bit Flash device EPROM One 32 pin JEDEC standard PLCC EPROM socket with 512Kb x 8 density Real time clock 8KB NVRAM with RTC battery backup and watchdog function SGS Thomson 48 58 4 1 Functional Description Table 4 1 MVME162P4 Features Continued Feature Switches Description RESET and ABORT switches on front panel Status LEDs Eight Board Fail FAIL CPU Status STAT CPU Activity RUN System Controller SCON LAN Activity LAN Fuse Status FUSE SCSI Activity SCSI VME Activity VME Four 32 bit tick timers and watchdog timer in Petra ASIC Timers Two 32 bit tick timers and watchdog timer in VMEchip2 ASIC Interrupts Eight software interrupts on versions with V
87. dded controller s D 1 CLUN controller LUN C 1 D 1 command identifier firmware 3 5 command line input firmware 3 5 commands firmware CNFG Configure Board Information Block 3 9 ENV Set Bug Operating System Environment 3 11 compatibility backward 3 9 IN 1 xXmoz Index conductive chassis rails EMC compliance 4 configurable items MVME162P4 board 1 5 configuration switches S3 Flash Write Enable mode 2 7 S3 MC2 DRAM size 1 15 2 7 S4 EPROM Flash selection 2 9 3 3 S4 general purpose readable switch 1 17 S4 software readable switch 2 5 S5 IP DMA snoop control 2 7 S5 IP reset mode 2 7 5 pin 3 IP reset mode 1 19 5 pin 4 Flash write enable 1 20 4 11 5 pins 1 2 IP DMA snoop control 1 18 56 MCECC DRAM size 1 21 2 7 configuration switches location of 1 5 Configure Board Information Block CNFG firmware command 3 9 configuring 162Bug parameters 3 11 hardware 2 5 IndustryPack modules 3 19 IP base addresses 3 19 VMEbus interface 3 16 connection diagrams EIA 232 D 1 29 EIA 530 1 35 connector pin assignments 5 1 connectors 4 19 IndustryPack IP 1 23 console port 2 7 control status registers 1 27 controller LUN CLUN C 1 D 1 controller modules disk tape D 1 controller modules network C 1 cooling requirements A 2 CSR bit IP32 IP bus clock 1 8 D data bus structure MVME162P4 4 6 data circuit terminating equipment DCE 4 13 data sheets E 2 date and time setting 2 8
88. dress and the local address to differ The value in this register is the base address of the local resource that is associated with the starting and ending address selection from the previous questions Default is 0 Slave Address Translation Select 1 00000000 This register defines which bits of the address are significant A logical 1 indicates significant address bits logical 0 is non significant Default is 0 Slave Control 1 03FF Defines the access restriction for the address space defined with this slave address decoder Default is 03FF Slave Enable 2 Y N N Do not set up and enable Slave Address Decoder 2 Slave Starting Address 2 00000000 Base address of the local resource that is accessible by the VMEbus Default is 0 Slave Ending Address 2 00000000 Ending address of the local resource that is accessible by the VMEbus Default is 0 Slave Address Translation Address 2 00000000 Works the same as Slave Address Translation Address 1 Default is 0 Computer Group Literature Center Web Site Modifying the Environment Table 3 3 ENV Command Parameters Continued ENV Parameter and Options Default Meaning of Default Slave Address Translation Select 00000000 Works the same as Slave Address Translation 2 Select 1 Default is 0 Slave Control 2 0000 Defines the access restriction for the address
89. e SIM that is installed at connector J15 on the board Five serial interface modules are available 3 EIA 232 D DCE and DTE EIA 530 DCE and DTE 3 EIA 485 EIA 422 DCE or DTE You can change Port B from an EIA 232 D to an EIA 530 interface or to an EIA 485 EIA 422 interface or vice versa by mounting the appropriate serial interface module Port B is routed via the SIM at J15 to the 25 pin DB25 front panel connector marked SERIAL PORT 2 For the location of SIM connector J15 on the MVME162P4 refer to Figure 1 1 Figure 1 2 illustrates the secondary side bottom of a serial interface module showing the J1 connector which plugs into SIM connector J15 on the MVMEI62P4 Figure 1 3 sheets 3 6 Figure 1 4 and Figure 1 5 illustrate the seven configurations available for Port B SECONDARY SIDE 1568 9502 Figure 1 2 Serial Interface Module Connector Side http www motorola com computer literature 1 9 Hardware Preparation and Installation For the part numbers of the serial interface modules refer to Table 1 2 The part numbers are ordinarily printed on the primary side top of the SIMs but may be found on the secondary side in some versions If you need to replace an existing serial interface module with a SIM of another type go to Removal of Existing SIM below If there is no SIM on the main board skip to nstallation of New SIM Table 1 2 Serial Interface Module Part Numbers
90. e M68000 based 68K series of board and system level products has a common genealogy deriving from the Bug firmware currently used on all Motorola M68000 based CPUs The M68000 firmware version implemented the MVME162P4 MC68040 or MC68LC040 based embedded controller is known as MVME162Bug or 162Bug It includes diagnostics for testing and configuring IndustryPack modules 162Bug is a powerful evaluation and debugging tool for systems built around MVME162P4 CISC based microcomputers Facilities are available for loading and executing user programs under complete operator control for system evaluation The 162Bug firmware provides a high degree of functionality user friendliness portability and ease of maintenance 3 1 162Bug Firmware 162Bug includes Commands for display and modification of memory Breakpoint and tracing capabilities A powerful assembler disassembler useful for patching programs A self test at power up feature which verifies the integrity of the system In addition the TRAP 15 system calls make various 162Bug routines that handle I O data conversion and string functions available to user programs 162Bug consists of three parts command driven user interactive software debugger described in this chapter It is referred to here as the debugger or 162Bug command driven diagnostic package for the MVME162P4 hardware referred to here as the diagnostics
91. ed using the NCR 53C710 SCSI I O controller Support functions for the 53C710 are provided by the Petra MC2 sector Refer to the NCR 53C710 user s guide and to the description of the MC2 function in the MVMEIX2P4 VME Embedded Controller Programmer s Reference Guide for detailed programming information SCSI Termination It is important that the SCSI bus be properly terminated at both ends In the case of the MVME162P4 sockets are provided for terminators the P2 or LCP2 adapter board If the SCSI bus ends at the adapter board termination resistors must be installed on the adapter board 5 power to the SCSI bus TERM power line and termination resistors is supplied through a fuse located on the adapter board Local Resources The MVME162P4 includes many resources for the local processor These include tick timers software programmable hardware interrupts a watchdog timer and a local bus timeout Programmable Tick Timers Six 32 bit programmable tick timers with 115 resolution are available two in the VMEchip2 ASIC and four in the Petra MC2 chip The tick timers may be programmed to generate periodic interrupts to the processor Refer http www motorola com computer literature 4 17 Functional Description to the VMEchip2 and Petra MC2 descriptions in the MVMEIX2P4 VME Embedded Controller Programmer s Reference Guide for detailed programming information Watchdog Timer A watchdog timer function is provided in bot
92. eds to the hardware initialization The system startup flows in a predetermined sequence following the hierarchy inherent in the processor and the MVME162P4 hardware The figure below charts the flow of the basic initialization sequence that takes place during system startup STARTUP Y INITIALIZATION Y POST Y BOOTING Y MONITOR Power up reset initialization Initialization of devices on the MVME162P4 module system Power On Self Test diagnostics Firmware configured boot mechanism if so configured Default is no boot Interactive command driven on line debugger when terminal connected Figure 2 1 MVME162P4 Firmware System Startup http www motorola com computer literature 2 3 Startup and Operation 2 Checklist Before you power up the MVME162P4 system be sure that the following conditions exist 1 Jumpers and or configuration switches on the MVMEI62P4 Embedded Controller and associated equipment are set as required for your particular application The MVME162P4 board is installed and cabled up as appropriate for your particular chassis or system as outlined in Chapter 1 The terminal that you plan to use as the system console is connected to the console port serial port 1 on the MVME162P4 module The terminal is set up as follows Eight bits per character One stop bit per character Pa
93. er Group Literature Center Web Site Functional Description Note As outlined in Table 1 4 the snoop capabilities of the MC68xx040 processor differ from those of the MC68xx060 used on MVME172P4 series boards Application software must take these differences into account No VMEbus Interface Option In support of possible future configurations in which the MVME162P4 might be offered as an embedded controller without the VMEbus interface certain logic in the VMEchip2 has been duplicated in the Petra chip For the location of the overlapping logic refer to Chapter 1 in the MVMEIX2P4 VME Embedded Controller Programmer s Reference Guide As long as the VMEchip2 ASIC is present the redundant logic is inhibited in the Petra chip The enabling signals for these functions are controlled by software and Petra chip hardware initialization Memory Options DRAM The following memory options are available on the different versions of MVMEI62P4 boards MVME162P4 boards are built with 16MB or 32MB synchronous DRAM SDRAM Depending on build options chosen at the time of manufacture various versions of the MVME162P4 have the SDRAM configured to model 1MB 4MB 8MB or 16MB of parity protected DRAM or 4MB 8MB 16MB or 32MB of ECC protected DRAM The SDRAM memory array itself is always a single bit error correcting and multi bit error detection memory irrespective of which interface model you use to access the SDRAM When the MC2 parity me
94. er scanning sequence goes from the lowest controller Logical Unit Number LUN detected to the highest LUN detected Controllers devices and their LUNs are listed in Appendix D At power up Autoboot is enabled and provided that the drive and controller numbers encountered are valid the following message is displayed upon the system console Autoboot in progress To abort hit BREAK http www motorola com computer literature 2 9 Startup and Operation Caution ROMboot A delay follows this message so that you can abort the Autoboot process if you wish Then the actual I O begins the program designated within the volume ID of the media specified is loaded into RAM and control passes to it If you want to gain control without Autoboot during this time however you can press the BREAK key or use the ABORT or RESET switches on the front panel The Autoboot process is controlled by parameters contained in the ENV command These parameters allow the selection of specific boot devices and files and allow programming of the Boot delay Refer to the ENV command description in Chapter 3 for more details Although you can use streaming tape to autoboot the same power supply must be connected to the tape drive the controller and the MVME162P4 At power up the tape controller will position the streaming tape to the load point where the volume ID can correctly be read and used However if the MVME162P4 loses power but
95. f only 2MB SRAM is present it defaults to address 00000000 Size of Static Memory 00080000 size of the SRAM type memory present The default is the calculated size of the onboard SRAM or an SRAM type mezzanine http www motorola com computer literature 3 15 162Bug Firmware Table 3 3 ENV Command Parameters Continued ENV Parameter and Options Default Meaning of Default ENV asks the following series of questions to set up the VMEbus interface for the MVME162 series modules You should have a working knowledge of the VMEchip2 as given in the MVME1X2P4 VME Embedded Controller Programmer s Reference Guide in order to perform this configuration Also included in this series are questions for setting ROM and Flash access time The slave address decoders are used to allow another VMEbus master to access a local resource of the MVME162P4 There are two slave address decoders set They are set up as follows Slave Enable 1 Y N Y Yes set up and enable Slave Address Decoder 1 Slave Starting Address 1 00000000 Base address of the local resource that is accessible by the VMEbus Default is the base of local memory 0 Slave Ending Address 1 000FFFFF Ending address of the local resource that is accessible by the VMEbus Default is the end of calculated memory Slave Address Translation Address 1 00000000 This register allows the VMEbus ad
96. firmware be loaded and executed in a single 27 040 installed in socket XUI The executable code is checksummed at every power on or reset firmware entry and the result which includes a precalculated checksum contained in the memory devices is tested for an expected zero Users are cautioned against modification of the memory devices unless precautions for re checksumming are taken Note MVME162P4 boards ordered without the VMEbus interface are shipped with Flash memory blank the factory uses the VMEbus to program the Flash memory with debugger code To use the 162Bug package be sure that switch S4 segment 5 is configured to select the EPROM memory map If you subsequently wish to run the debugger from Flash memory you must first initialize Flash memory with the PFLASH command then reconfigure S4 Refer to Step 15 Note under Bringing up the Board on page 2 5 for further details http www motorola com computer literature 3 3 162Bug Firmware Memory Requirements The program portion of 162Bug is approximately 512KB of code consisting of download debugger and diagnostic packages contained entirely in Flash memory or in EPROM The 162Bug firmware executes from address FF800000 whether in Flash or EPROM If you set switch S4 segment 5 to ON the address spaces of the Flash and EPROM are swapped For MVME162P 244 and 344 series boards 162 4 the factory ship configuration except in the n
97. for 8 usec 64 usec 256 usec or infinity The local bus timer does not operate during VMEbus bound cycles VMEbus bound cycles are timed by the VMEbus access timer and the VMEbus global timer Refer to the 4 18 Computer Group Literature Center Web Site Functional Description VMEchip2 and Petra MC2 descriptions in the MVMEIX2P4 Embedded Controller Programmer s Reference Guide for detailed programming information The access timer logic is duplicated in the VMEchip2 and Petra MC2 ASICs Because the local bus timer in the VMEchip2 can detect an offboard access and the Petra MC2 local bus timer cannot the timer in the VMEchip2 ASIC is used in all cases except for versions of the MVME162P4 which do not include the VMEbus interface i e boards ordered with a VMEbus Interface option Local Bus Arbiter The local bus arbiter implements a fixed priority see Table 4 2 Table 4 2 Local Bus Arbitration Priority Device Priority Note LAN 0 Highest Industry Pack DMA 1 SCSI 2 VMEbus 3 Next Lowest MC680x0 MC68LC0x0 4 Lowest Connectors The MVME162P4 has two 96 position DIN connectors and P2 rows A B C and P2 row B provide the VMEbus interconnection P2 rows A and C provide the connection to the SCSI bus serial ports and Ethernet The serial ports on the MVME162P4 are also connected to two 25 pin DB 25 female connectors J18 and J25 on the front panel The
98. g at least 16MB of calculated RAM http www motorola com computer literature 162Bug Firmware Table 3 3 ENV Command Parameters Continued ENV Parameter and Options Default Meaning of Default Master Starting Address 3 00000000 address of the VMEbus resource that is accessible from the local bus If enabled the value is calculated as one more than the calculated size of memory If not enabled the default is 00000000 Master Ending Address 3 00000000 Ending address of the VMEbus resource that is accessible from the local bus If enabled the default is 00FFFFFF otherwise 00000000 Master Control 3 00 Defines the access characteristics for the address space defined with this master address decoder If enabled the default is 3D otherwise 00 Master Enable 4 Y N N Do not set up and enable Master Address Decoder 4 Master Starting Address 4 00000000 address of the VMEbus resource that is accessible from the local bus Default is 0 Master Ending Address 4 00000000 Ending address of the VMEbus resource that is accessible from the local bus Default is 0 Master Address Translation 00000000 This register allows the VMEbus address and Address 4 the local address to differ The value in this register is the base address of the VMEbus resource that is associated with the starting and ending address selection from the previous questions Default is 0
99. ge temperature 40 C to 485 C Relative humidity 5 to 90 noncondensing Vibration operating 2 Gs RMS 20Hz 2000Hz random Altitude operating 5000 meters 16 405 feet Physical dimensions base board only Height Double high VME board 9 2 in 233 mm Front panel width 0 8 in 20 mm Front panel height 10 3 in 262 mm Depth 6 3 in 160 mm Specifications A Cooling Requirements The Motorola MVME162P4 VME Embedded Controller is specified designed and tested to operate reliably with an incoming air temperature range from 0 to 55 C 32 to 131 F with forced air cooling of the entng1 Coll eda A 2 Computer Group Literature Center Web Site Cooling Requirements Special Considerations for Elevated Temperature Operation N Caution The following information is for users whose applications for the MVME162P4 may subject it to high temperatures MVME162P4 uses commercial grade devices Therefore it can operate in an environment with ambient air temperatures from 0 C to 70 C Several factors influence the ambient temperature seen by components on the MVME162P4 Among them are inlet air temperature air flow characteristics number types and locations of IP modules power dissipation of adjacent boards in the system etc A temperature profile of the MVME162P4 MVME162P xxx was developed in an MVME945 12 slot VME chassis
100. get registers This characteristic makes aborts most appropriate for terminating user programs that are being debugged If a program gets caught in a loop for instance aborts should be used to regain control The target PC register contents etc help to pinpoint the malfunction Pressing and releasing the ABORT switch generates a local board condition which may interrupt the processor if enabled The target registers reflecting the machine state at the time the ABORT switch was pressed are http www motorola com computer literature 2 13 Startup and Operation Break displayed on the screen Any breakpoints installed in your code are removed and the breakpoint table remains intact Control returns to the debugger Pressing and releasing the BREAK key on the terminal keyboard generates a power break Breaks do not produce interrupts The only time that breaks are recognized is while characters are being sent or received by the console port A break removes any breakpoints in your code and keeps the breakpoint table intact If the function was entered using SYSCALL Break also takes a snapshot of the machine state This machine state is then accessible to you for diagnostic purposes In many cases you may wish to terminate a debugger command before its completion for example during the display of a large block of memory Break allows you to terminate the command Diagnostic Facilities The 162Bug package in
101. h the Petra MC2 chip and the VMEchip2 ASIC When the watchdog timer is enabled it must be reset by software within the programmed interval or it times out The watchdog timer can be programmed to generate a SYSRESET signal a local reset signal or a board fail signal if it times out Refer to the VMEchip2 and Petra MC2 descriptions in the MVMEIX2P4 VME Embedded Controller Programmer s Reference Guide for detailed programming information The watchdog timer logic is duplicated in the VMEchip2 and Petra MC2 ASICs Because the watchdog timer function in the VMEchip2 is a superset of that function in the Petra MC2 chip system reset function the timer in the VMEchip2 is to be used in all cases except for versions of the MVME162P4 which do not include the VMEbus interface 1 e boards ordered with a No VMEbus Interface option Software Programmable Hardware Interrupts The VMEchip2 ASIC supplies eight software programmable hardware interrupts These interrupts allow software to create a hardware interrupt Refer to the VMEchip2 description in the MVMEIX2P4 VME Embedded Controller Programmer s Reference Guide for detailed programming information Local Bus Timeout The MVME162P4 provides timeout functions in the VMEchip2 ASIC and the Petra MC2 chip for the local bus When the timer is enabled and a local bus access times out a Transfer Error Acknowledge TEA signal is sent to the local bus master The timeout value is selectable by software
102. ication P2 Row B supplies the base board with power with the upper 8 VMEbus address lines and with an additional 16 VMEbus data lines P2 rows A and C are not used in the MVME162P4 implementation The pin assignments for Pland P2 are listed in Table 5 6 and Table 5 7 respectively 5 6 Computer Group Literature Center Web Site VMEbus Connectors P1 P2 Table 5 6 VMEbus Connector P1 Pin Assignments VBBSY VD8 1 1 VBCLR VD9 2 VD2 VACFAIL VD10 3 VD3 VBGINO 11 4 4 VBGOUTO 12 5 VD5 VBGINI VDI3 6 VD6 VBGOUTI 14 7 VD7 VBGIN2 VD15 8 GND VBGOUT2 GND 9 VSYSCLK VBGIN3 VSYSFAIL 10 GND VBGOUT3 VBERR 11 1 VBRO VSYSRESET 12 VDSO VBRI VLWORD 13 VWRITE VBR2 VAMS 14 GND VBR3 VA23 15 VDTACK VAMO VA22 16 GND VAMI VA21 17 VAS VAM2 VA20 18 GND VAM3 VA 19 VIACK GND 20 VIACKIN Not Used VA 21 VIACKOUT Not Used VA 22 VAM4 GND VA 23 VAT VIRQ7 VA 24 VIRQ6 VA 25 VAS VIRQ5 VA 26 VA4 VIRQ4 VA 27 VIRQ3 VA 28 VIRQ2 29 VIRQI 30 P5VSTDBY 31 5V 32 http www motorola com computer literature Pin Assignments Table 5 7 VMEbus Connector P2 Pin Assignment 1 1 2 2 3 Not Used 3 4 VA24 4 5 VA25 5 6 VA26 6 7 VA27 12 7 8 VA28 No Connectio
103. in Chapter 3 or its equivalent application specific command When restoring the board to service execute the 162Bug SET command set mmddyyhhmm after installation to restart the oscillator and initialize the clock http www motorola com computer literature 4 9 Functional Description Warning The MVME162P4 is shipped with the battery disconnected 1 with VMEbus 5V standby voltage selected as both primary and secondary power source In order to use the battery as a power source whether primary or secondary it is necessary to reconfigure the jumpers on J22 before installing the board Refer to SRAM Backup Power Source J22 on page 1 13 for available jumper configurations The power leads from the battery are exposed on the solder side of the board The board should not be placed on a conductive surface or stored in a conductive bag unless the battery is removed Lithium batteries incorporate inflammable materials such as lithium and organic solvents If lithium batteries are mistreated or handled incorrectly they may burst open and ignite possibly resulting in injury and or fire When dealing with lithium batteries carefully follow the precautions listed below in order to prevent accidents Do not short circuit Do not disassemble deform or apply excessive pressure Do not heat or incinerate Do not apply solder directly Do not use different models or new and old batteries together
104. interface refer to the Z85230 Serial Communications Controller Product Brief listed under Manufacturer s Documents in the Related Documentation appendix For additional information on the EIA 232 D interface refer to the EJA 232 D Standard The following figures illustrate the signal relationships and signal connections in the various serial configurations available for ports A and B Computer Group Literature Center Web Site Installation Instructions 712M TRANSITION MODULE PORT 2 TO MODEM DB25 J27 TXD P2027 Pas TD one RXD P2 028 AXD2 RTS P2 029 RTS2 van RIS ona CTS P2 030 2 a crs eius DTR P2 C31 DTR2 van DTR poo DCD P2 032 DCD2 47s Ded one R pine P2 CABLE TXC pin ts RXC TO TERMINAL J16 o PIN 24 12V 9 PIN7 5K o MVME 712M EIA 232 D DTE CONFIGURATION TO MODEM FRONT PANEL 285230 0825 A PORT PORT 1 xp 5 PO pine RXD RXD Al PINS RIS D gt RTS pina ers ls lt A CIS pns DTR DTR B PIN 20 lt DCD 5 DSR MVME162P4 EIA 232 D DCE CONFIGURATION TAE scope xb TO TERMINAL RXC fe D PIN 15 3 4 gt BXC pin 47 TXCO 15 ok amp PIN 24 J26 PIN7 v 10970 01 1 6 9704 Figu
105. ions Note Some VME backplanes e g those310se31owpitto tM http www motorola com computer literature 1 25 Hardware Preparation and Installation System Considerations The MVME162P4 draws power from VMEbus backplane connectors P1 and P2 P2 is also used for the upper 16 bits of data in 32 bit transfers and for the upper 8 address lines in extended addressing mode The MVME162P4 may not operate properly without its main board connected to VMEbus backplane connectors P1 and P2 Whether the MVME162P4 operates as a VMEbus master or VMEbus slave it is configured for 32 bits of address and 32 bits of data A32 D32 However it handles A16 or A24 devices in the address ranges indicated in the VMEchip2 chapter of the Programmer s Reference Guide D8 and or D16 devices in the system must be handled by the MC680x0 MC68LCOxO software For specifics refer to the memory maps in the Programmer s Reference Guide The MVME162P4 contains shared onboard DRAM whose base address is software selectable Both the onboard processor and offboard VMEbus devices see this local DRAM at base physical address 00000000 as programmed by the MVME162Bug firmware This may be changed via software to any other base address Refer to the Programmer s Reference Guide for more information If the MVME162P4 tries to access offboard resources in a nonexistent location and is not system controller and if the system does not have a global bus timeout the M
106. l Oli CARE RUE EORR 3 3 Memory T a EEO 3 4 Using V6 2 Bi nicsen ENE ENTR RA 3 5 Hiis I 3 6 3 9 Configure Board Information Block sess 3 9 ENY 3 11 Configuring the 1628102 Parameters Ee ad 3 11 Coste me the Industry 2 3 19 viii 4 Functional Description 0070 coo Ir ERR v T S SPOTE POR VIE EO MD EOD 4 1 SUDO OC POSU 4 1 Processor and p MER pua 4 2 TO upon gro i e 4 3 n 4 4 lOO 4 4 Funcional 4 4 Dara Bus SIS 4 6 4 6 PSA 5 M pP 4 6 No VMEBbus Int tiace OPON 4 7 hou Engin m 4 7 DRAM 4 7 SRAM M an 4 8 About the Battery e 4 9 EPROM and Flash Memory 4 11 Battery Backed Up and 4 11 NVMEEbus Interface and vine 4 12 Isaia D Ra A 4
107. lace of DRAM The MVME162P4 s 16 32MB shared SDRAM is configurable to emulate either of the following memory models 1 4MB 8MB or 16MB shared parity protected DRAM 4 8MB 16MB or 32MB ECC protected DRAM The two memory controllers modeled in the Petra ASIC duplicate the functionality of the parity memory controller found in MC2 ASICs as well as that of the single bit error correcting double bit error detecting memory controller found in MCECC ASICs Board firmware will initialize the memory controller as appropriate If the Petra ASIC is supporting MVME1 X2P4 functionality firmware will enable the parity MC2 memory controller model If the Petra ASIC is supporting MVME1X2P2 functionality firmware will enable either the parity or the MCECC memory controller model depending on the board configuration Board configuration is a function of switch settings and resistor population options 3 comes into play in the MC2 memory controller model S3 is a four segment slide switch whose lower three segments establish the size of the parity DRAM segment 4 is not used Refer to the illustration and table below for specifics http www motorola com computer literature 1 15 Hardware Preparation and Installation OFF MC2 DRAM SIZE 16MB factory configuration 2734 0004 Table 1 3 MC2 DRAM Size Settings S3 S3 S3 MC2DRAM Segment 1 Segment 2 Segment 3 Size ON ON ON OFF
108. mory controller interface is used to access the SDRAM single bit errors are undetectable to users and multi bit errors are defined to be parity errors Firmware will initialize the memory controller to maintain backward compatibility with MVME162FX or LX products If the Petra ASIC is supporting MVMEI62FX functionality the parity memory controller model will be enabled by default If the Petra ASIC is supporting http www motorola com computer literature 4 7 Functional Description SRAM MVMEI62LX functionality firmware will enable either the parity or the ECC memory controller model depending on board configuration The board configuration is a function of switch settings and resistor population options User code can modify Petra register settings to operate in either mode User code can also modify map decoder switch settings to enable the maximum amount of memory available The minimum SDRAM configuration is 16MB For specifics on SDRAM performance and for detailed programming information refer to the chapters on MC2 and MCECC memory controller emulations in the MVMEIX2P4 VME Embedded Controller Programmer s Reference Guide The MVME162P4 implementation includes a 512KB SRAM static RAM option SRAM architecture is single non interleaved SRAM performance is described in the section on the SRAM memory interface in the chapter on the MC2 memory controller emulation in the 2 4 VME Embedded Controller Progr
109. n 8 9 VA29 No Connection 9 0 VA30 No Connection 10 1 VA31 No Connection 11 2 GND No Connection 12 3 45V No Connection 13 4 VD16 No Connection 14 5 VD17 No Connection 15 6 DC VD18 No Connection 16 7 REQ VDI9 No Connection 17 8 OI VD20 DBPIN14 18 9 DBPIN16 VD21 DBPIN 19 20 DSRB VD22 DBPIN 20 21 DBPIN21 VD23 DBPIN 21 22 DBPIN22 GND DBPIN 22 23 DBPIN23 VD24 DBPINII 23 24 TXCOB VD25 DBPIN12 24 25 TXDB VD26 DBPIN25 28 26 RXDB VD27 DBPIN13 26 27 RTSB VD28 RXDA 27 28 RXCB VD29 TXDA 28 29 CTSB VD30 CTSA 29 30 DTRB VD3I RTSA 30 31 DCDB GND DCDA 31 32 TXCB 5V DTRA 32 5 8 Computer Group Literature Center Web Site Specifications Board Specifications The following table lists the general specifications for the MVME162P4 VME embedded controller The subsequent sections detail cooling requirements and EMC regulatory compliance A complete functional description of the MVME162P4 boards appears in Chapter 4 Specifications for the optional IndustryPack modules can be found in the documentation for those modules Table A 1 MVME162P4 Specifications Power requirements with EPROM without IPs Characteristics Specifications 5Vdc 5 2 04 typical 2 5 maximum 12 Vdc 5 100 mA maximum 12 Vdc 5 100 mA maximum Operating temperature 0 C to 55 C exit air with forced air cooling refer also to Cooling Requirements and Special Considerations for Elevated Temperature Operation Stora
110. nfiguration uses VMEbus 5V standby voltage as the primary and secondary power source the onboard battery is disconnected Verify that this configuration is appropriate for your application 8 The EPROM size select header J23 should be jumpered between pins 2 3 This sets it up for a 4Mbit x 8 EPROM density the factory default 9 Header J24 defines the state of Flash memory write protection The factory configuration has the jumper installed allowing writes to Flash Verify that this setting is appropriate for your application 10 Verify that the settings of configuration switches 53 MC2 DRAM size 55 IP snoop control IP Reset mode and Flash Write Enable mode and 56 MCECC DRAM size are appropriate for your memory controller emulation 11 Refertothe setup procedure for your particular chassis or system for details concerning the installation of the MVME162P4 12 Connectthe terminal to be used as the 162Bug system console to the default EIA 232 D port at Serial Port 1 on the front panel of the MVME162P4 or Serial Port 2 on the MVMET712x series transition module For other connection options refer to Serial Connections in Chapter 1 Set the terminal up as follows http www motorola com computer literature 2 7 Startup and Operation Note 13 14 15 Eight bits per character One stop bit per character Parity disabled no parity Baud rate 9600 baud the power up default
111. nt Employing Serial Binary Data Interchange EIA 232 D Global Engineering Documents Suite 400 1991 M Street NW Washington DC 20036 Telephone 1 800 854 7179 Telephone 303 397 7956 Web http global ihs com ANSU EIA 232 D Standard E 4 Computer Group Literature Center Web Site Index Numerics 162Bug disk tape controller data D 1 firmware 3 9 implementation 3 3 network controller data C 1 overview 3 1 stack space 3 4 27C040 EPROM 3 3 53C710 SCSI controller 4 17 82596CA LAN coprocessor 4 16 A abort process 2 13 ABORT switch 4 20 aborting program execution 2 1 address data configurations 1 26 addressing modes 1 26 altitude operating A 1 ambient air temperature effect on cooling A 2 arbitration priority 4 19 arguments firmware command 3 5 autoboot process 2 9 autojumpering VME backplane 1 25 backplane jumpers 1 24 backward compatibility 3 9 battery 4 9 battery precautions 4 10 baud rate default 2 8 BBRAM battery backed up RAM and clock 3 9 4 11 BG bus grant signal 1 24 block diagram 162 4 4 4 board architecture 4 1 configuration 1 4 connectors 4 19 dimensions A 1 features 4 1 installation 1 23 preparation 1 1 storage preparation for 4 9 booting the system 2 9 2 10 2 11 BREAK key 2 14 break process 2 14 bus grant BG signal 1 24 C cable connections 1 25 cables I O ports A 4 cache memory 4 6 chassis grounding A 4 CISC embe
112. ntroduce new terms courier is used for system output for example screen displays reports examples and system prompts Enter Return or CR CR represents the carriage return or Enter key CTRL represents the Control key Execute control characters by pressing the Ctrl key and the letter simultaneously for example Ctrl d A character precedes a data or address parameter to specify the numeric format as follows Specifies a hexadecimal character Ox Specifies hexadecimal number Specifies a binary number amp Specifies a decimal number An asterisk following a signal name for signals that are level significant denotes that the signal is true or valid when the signal is low An asterisk following a signal name for signals that are edge significant denotes that the actions initiated by that signal occur on high to low transition xviii Hardware Preparation and Installation Introduction This chapter provides unpacking instructions hardware preparation guidelines and installation instructions for the MVME162P4 Embedded Controller Hardware preparation of the MVME712 series transition modules compatible with this board is described in separate manuals Getting Started This section supplies an overview of startup procedures applicable to the MVME162P4 Equipment requirements directions for unpacking and ESD precautions that you should take complete the section Ove
113. o VMEbus case has switch S4 segment 5 set to OFF 162Bug operating out of Flash The 162Bug initial stack completely changes 8KB of SRAM memory at addresses FFEOCO000 through FFEODFFF at power up or reset Table 3 1 Memory Offsets with 162Bug 4 8 16 32MB synchronous DRAM SDRAM Appears 00000000 FFE00000 as parity memory at 1 8 16MB ECC at 32MB onboard SRAM Type of Memory Present Default DRAM Default SRAM Base Address Base Address The synchronous DRAM can be modeled as ECC or parity type as indicated above The 162Bug firmware requires 2KB of NVRAM for storage of board configuration communication and booting parameters This storage area begins at FFFC16F8 and ends at FFFC1EF7 162Bug requires a minimum of 64KB of contiguous read write memory to operate The ENV command controls where this block of memory is located Regardless of where the onboard RAM is located the first 64KB is used for 162Bug stack and static variable space and the rest is reserved as user space Whenever the MVME162P4 is reset the target PC 15 initialized to the address corresponding to the beginning of the user space and the target stack pointers are initialized to addresses within the user space with the target Interrupt Stack Pointer ISP set to the top of the user space 3 4 Computer Group Literature Center Web Site Using 162Bug Using 162Bug 162Bug is command driven it performs its various operations
114. of the onboard memory or even offboard VMEbus memory The ASCII string BOOT is found in the specified memory range Your routine passes a checksum test which ensures that this routine was really intended to receive control at powerup For complete details on using the ROMboot function refer to the Debugging Package for Motorola 68K CISC CPUs User s Manual Network Boot Network Auto Boot is a software routine in the 162Bug Flash EPROM which provides a mechanism for booting an operating system using a network local Ethernet interface as the boot device The Network Auto Boot routine automatically scans for controllers and devices in a specified sequence until a valid bootable device containing boot media is found or until the list is exhausted If a valid bootable device is found a boot from that device is started The controller scanning sequence goes from the lowest controller Logical Unit Number LUN detected to the highest LUN detected Refer to Appendix C for default LUNs http www motorola com computer literature 2 11 Startup and Operation At power up Network Boot is enabled and provided that the drive and controller numbers encountered are valid the following message is displayed upon the system console Network Boot in progress To abort hit BREAK After this message there is a delay to let you abort the Auto Boot process if you wish Then the actual I O is begun the program designated
115. ontra tees 1 10 Table 1 3 MC2 DRAM Size Suing erre bipe rino tiep S pet 1 16 Table 1 4 Switch 55 Snoop Control Encoding oreet teintes 1 18 Table 1 3 MCECC DRAM Size Seung 1 22 Table 2 1 MY ME162P4 Front Panel Controls eret rco ibas 2 1 Table 2 2 Sottware Readable Switch s 2 6 Table 3 1 Memory Offsets with 16245 3 4 Table 2 Debugger Commands Aa 3 6 Table 3 3 ENY Command Paravieters iei kasa i 3 11 Tabel Ps Foaie deci 4 1 Table 4 2 Local Bus Arbitration Priority Liu tases sass sauce ase assed paso 4 19 Table 5 1 IndustryPack Interconnect ene ege 5 2 Table 5 2 Remote Reset Connector J6 Pin Assignments eee 5 3 Table 5 3 Serial Port Module Connector Pin Assignments sees 5 4 Table 5 4 Serial Connector J18 Pm Assiprnmetnts oce enr e eae 5 5 Table 5 5 Serial Connector J25 Pin Assiptm ents u esser krepe in 5 6 Table 5 6 VMEbus Connector Pin Assignments iue eret e toten 5 7 Table 5 7 VMEbus Connector P2 Pin Assignment ones ettet 5 8 Table A T SpeciHcatiUMS A 1 Table B 1 Troubleshooting MVME162P4 Boards B 1 Table E 1 Motorola Computer Group Documents
116. paration and Installation Removing all jumpers may temporarily disable the SRAM Do not remove all jumpers from J22 except for storage Caution J22 J22 J22 iH 6 5 6 5 2 1 2 1 Primary Source Onboard Battery Backup Power Disabled Primary Source VMEbus 5V STBY Secondary Source Onboard Battery For storage only Secondary Source VMEbus 5V STBY Factory configuration J22 J22 o 5 6 2 1 Primary Source VMEbus 5V STBY Primary Source Onboard Battery Secondary Source Onboard Battery Secondary Source VMEbus 5V STBY EPROM Size J23 Header J23 selects the EPROM size The MVME162P4 is factory configured for a AMbit EPROM J23 J23 1 1 8Mbit EPROM 4Mbit EPROM Factory configuration 1 14 Computer Group Literature Center Web Site Preparing the Board Flash Write Protection J24 When the Flash write enable jumper is installed factory configuration Flash memory can be written to via the normal software routines When the jumper is removed Flash memory is not writable J24 J24 2 2 1 1 Flash Write Protected Flash Write Enabled Factory configuration MC2 DRAM Size S3 MVME1X2P4 boards use SDRAM Synchronous DRAM in p
117. r after 1msec interval IP resets may occur in response to a software write a power up reset or a local bus reset For details refer to the Programmer s Reference Guide listed in Related Documentation in Appendix E http www motorola com computer literature 1 19 Hardware Preparation and Installation Flash Write Enable Mode S5 Pin 4 Segment 4 of switch S5 defines the Flash memory controller model 1 or MC2 to be emulated when enabling or disabling Flash memory accesses the MVME162P4 board With S5 segment 4 set to ON the factory configuration the board initializes in MC2 mode With 5 segment 4 set to OFF the board initializes in MC1 mode S5 OFF MC2 Flash write enable mode factory configuration 2736 0004 3 3 In MC2 mode writes to Flash memory are enabled or inhibited by a control bit at memory location FFF42042 With the control bit set to 1 Flash memory is write enabled In mode writes to Flash memory are enabled by a memory access to any location in the range FFFCC000 FFFCFFF Writes to Flash memory are disabled by a memory access to any location in the range FFFC8000 FFFCBFFF For details refer to the Programmer s Reference Guide listed in Related Documentation in Appendix E 1 20 Computer Group Literature Center Web Site Preparing the Board MCECC DRAM Size S6 MVME1X2P4 boards use SDRAM Synchronous DRAM in place of DRAM The MVME162P4 s 16 32MB
118. r perform any unauthorized modification of the equipment Contact your local Motorola representative for service and repair to ensure that all safety features are maintained Observe Warnings in Manual Warnings such as the example below precede potentially dangerous procedures throughout this manual Instructions contained in the warnings must be followed You should also employ all other safety precautions which you deem necessary for the operation of the equipment in your operating environment caution when handling testing and adjusting this equipment and its Warning components To prevent serious injury or death from dangerous voltages use extreme Flammability Motorola PWBs printed wiring boards are manufactured with a flammability rating of 94V 0 by UL recognized manufacturers Caution EMI Caution This equipment generates uses and can radiate electromagnetic energy It may cause or be susceptible to electromagnetic interference if not installed and used with adequate EMI protection Lithium Battery Caution This product contains a lithium battery to power the clock and calendar circuitry Caution Attention Vorsicht Danger of explosion if battery is replaced incorrectly Replace battery only with the same or equivalent type recommended by the equipment manufacturer Dispose of used batteries according to the manufacturer s instructions Il y a danger d explosion s il y a remplacement inco
119. re 1 3 EIA 232 D Connections to MVME712M Sheet 1 of 6 http www motorola com computer literature 1 29 Hardware Preparation and Installation 712M TRANSITION MODULE PORT2 TO MODEM DB25 J27 TXD P2 C27 TXD2 TXD one RXD P2 C28 RXD2 Pn RXD pma RTS P2 C29 RTS2 gt BTS nia CTS 2 30 CTS2 X3 CTS ons DTR P2 C31 DTR2 lan DIF DCD 2 32 002 lt gt DCD one 4 DSR ping P2 CABLE piu t5 TO TERMINAL PES ege J16 PIN 24 12V ene gt PIN 7 o T o o o o MVME 712M EIA 232 D DTE CONFIGURATION TO MODEM FRONT PANEL 285230 DB25 PORT D PO J pine RXD amp PIN 3 B PIN4 CTS xt CTS pns B DTR pin 20 DCD x PINS 5 PING RXC D PO pints 3 4D pi 47 il lt pin 24 Figure 1 3 PORT 1 MVME162P4 EIA 232 D DCE CONFIGURATION TO TERMINAL 10970 01 1 6 9704 EIA 232 D Connections to MVME712M Sheet 2 of 6 1 30 Computer Group Literature Center Web Site Installation Instructions
120. rity disabled no parity protection Baud rate 9600 baud the default baud rate of many serial ports at power up Any other device that you wish to use such as a host computer system and or peripheral equipment is cabled to the appropriate connectors After you complete the checks listed above you are ready to power up the system 2 4 Computer Group Literature Center Web Site Bringing up the Board Bringing up the Board Caution The MVME162P4 comes with MVME162Bug firmware installed For the firmware to operate properly with the board you must follow the steps below Inserting or removing boards with power applied may damage board components Turn all equipment power OFF Refer to MVMEI62P4 Configuration on page 1 5 and verify that jumpers and switches are configured as necessary for your particular application 1 Configuration switch S4 on the MVME162P4 contains eight segments which all affect the operation of the firmware They are read as a register at location FFF4202C in the Petra MC2 sector The MVMEIX2P4 VME Embedded Controller Programmer 5 Reference Guide has additional information on the Petra MC2 emulation The bit values are read as a 0 when the corresponding switch segment is set to ON or as a 1 when that segment is set to OFF The default configuration for S4 has S4 set to all 0 all switch segments set to ON The 162Bug firmware reserves defines the four lower order bits GPIO to
121. rrect de la batterie Remplacer uniquement avec une batterie du m me type ou d un type quivalent recommand par le constructeur Mettre au rebut les batteries usag es conform ment aux instructions du fabricant Explosionsgefahr bei unsachgem Dem Austausch der Batterie Ersatz nur durch denselben oder einen vom Hersteller empfohlenen Typ Entsorgung gebrauchter Batterien nach Angaben des Herstellers CE Notice European Community Motorola Computer Group products with the CE marking comply with the EMC Directive 89 336 EEC Compliance with this directive implies conformity to the following European Norms EN55022 Limits and Methods of Measurement of Radio Interference Characteristics of Information Technology Equipment this product tested to Equipment Class B EN50082 1 1997 Electromagnetic Compatibility Generic Immunity Standard Part 1 Residential Commercial and Light Industry System products also fulfill EN60950 product safety which is essentially the requirement for the Low Voltage Directive 73 23 EEC Board products are tested in a representative system to show compliance with the above mentioned requirements A proper installation in a CE marked system will maintain the required EMC safety performance In accordance with European Community directives a Declaration of Conformity has been made and is on file within the European Union The Declaration of Conformity is available on request Please cont
122. rview of Installation Procedure The following table lists the things you will need to do to use this board and tells where to find the information you need to perform each step Be sure to read this entire chapter including all Cautions and Warnings before you begin Table 1 1 Startup Overview What you need to do Refer to Unpack the hardware Guidelines for Unpacking on page 1 2 Reconfigure jumpers or switches Preparing the Board page 1 4 on the MVME162P4 board as necessary Ensure that IP modules are IP Installation on page 1 23 properly installed on the MVME162P4 board Install the MVME162P4 boardin MVME162P4 Installation on page 1 23 a chassis Connect a display terminal Serial Connections on page 1 28 1 1 Hardware Preparation and Installation Table 1 1 Startup Overview Continued What you need to do Refer to Connect any other equipment you Connector Pin Assignments in Chapter 5 will be using For more information on optional devices and equipment refer to the documentation provided with the equipment Power up the system Applying Power on page 2 3 Troubleshooting Solving Startup Problems on page B 1 Note that the firmware initializes Bringing Up the Board on page 2 5 and tests the board You may also wish to obtain the 62 Firmware User s Manual listed in the Related Documentation appendix Initiali
123. s 40 TEAC style 50 CD ROM 60 Sequential access 80 Local floppy drive 81 Local floppy drive http www motorola com computer literature D 3 Disk Tape Controller Data 28 14 Devices Controller LUN Address Device LUN Device Type 6 FFFF9000 00 SCSI Common Command Set 08 CCS which may be any of these 10 Removable flexible direct access 7 FFFF9800 18 TEAC style 20 CD ROM 28 Sequential access 16 FFFF4800 30 40 Same as above but these 48 will only be available if 17 FFFF5800 50 the daughter card for the 58 second SCSI channel is present 18 FFFF7000 60 68 70 19 FFFF7800 MVME350 1 Device Controller LUN Address Device LUN Device Type 4 FFFF5000 0 QIC 02 streaming tape drive 5 FFFF5 100 D 4 Computer Group Literature Center Web Site IOT Command Parameters IOT Command Parameters The following table lists the proper IOT command parameters for floppies used with boards such as the MVME328 and MVME162P4 Floppy Types and Formats Parameter pspps PCXT8 PCXT9 PCXT9 3 PCAT PS2 SHD Sector Size 0 128 1 256 2 512 3 1024 4 2048 5 4096 1 2 2 2 2 2 2 Block Size 0 128 1 256 2 512 3 1024 4 2048 5 4096 1 1 1 1 1 1 1 Sectors Track 10 8 9 9 12 24 Number of Heads 2 2 2 2 2 Number of Cylinders
124. s IP Bus Strobe J19 on page 1 13 No Jumper SRAM Backup Power Source J22 on page 1 13 1 3 2 4 EPROM Size J23 on page 1 14 2 3 Flash Write Protection J24 on page 1 15 Jumper On MC2 DRAM Size 53 on page 1 15 Off Off Off General Purpose Readable Switch S4 Pin 5 on page 1 17 On IP DMA Snoop Control S5 Pins 1 2 on page 1 18 On On IP Reset Mode S5 Pin 3 on page 1 19 On Flash Write Enable Mode S5 Pin 4 on page 1 20 On MCECC DRAM Size S6 on page 1 21 On Off On J3 is a PLD programming header for lab or factory use It has no user function http www motorola com computer literature 1 5 Hardware Preparation and Installation FAIL STAT Qoo o o o o IO Gan 000000000000 000000000000 SERIAL PORT 2 SERIAL PORT 1 CONSOLE P1 P2 on A32 F5 1 A32 B32 832 Se C32 I C32 Pi XU1 2 49 27 49 27 49 27 49 27 eel oL
125. s Refer to the VMEchip2 description in the MVMEIX2P4 VME Embedded Controller Programmer s Reference Guide for detailed programming information Note that the Abort switch logic in the VMEchip2 is not used The GPI inputs to the VMEchip2 which are located at FFF40088 bits 7 0 are not used Instead the Abort switch interrupt is integrated into the Petra MC2 sector at location FFF42043 The GPI inputs are integrated into the Petra MC2 sector at location FFF4202C bits 23 16 Interfaces The MVME162P4 provides onboard I O for many system applications The I O functions include serial ports IndustryPack IP interfaces and optional interfaces for LAN Ethernet transceivers and SCSI mass storage devices Serial Communications Interface The MVME162P4 uses a Zilog Z85230 serial port controller to implement the two serial communications interfaces Each interface supports CTS DCD RTS and DTR control signals as well as the TXD and RXD transmit receive data signals and TXC RXC synchronous clock signals The Z85230 sypports synchronous SDLC HDLC and asynchronous protocols The MVME162P4 hardware supports asynchronous serial baud rates of 110b s to 38 4Kb s 4 12 Computer Group Literature Center Web Site Functional Description The Z85230 supplies an interrupt vector during interrupt acknowledge cycles The vector is modified based upon the interrupt source within the 785230 Interrupt request levels are programmed via the
126. s are to be saved in these are the parameters necessary to perform an unattended network boot Memory Search Starting Address 00000000 Where the Bug begins to search for a work page a 64KB block of memory to use for vector table stack and variables This must be a multiple of the debugger work page modulo 10000 64KB In a multi controller environment each 162 4 board could be set to start its work page at a unique address to allow multiple debuggers to operate simultaneously Memory Search Ending Address 00100000 Top limit of the Bug s search for a work page If no 64KB contiguous block of memory is found in the range specified by Memory Search Starting Address and Memory Search Ending Address parameters the bug will place its work page in the onboard static RAM on the MVME162P4 Default Memory Search Ending Address is the calculated size of local memory http www motorola com computer literature 162Bug Firmware Table 3 3 ENV Command Parameters Continued ENV Parameter and Options Memory Search Increment Size Default Meaning of Default 00010000 Multi CPU feature used to offset the location of the Bug work page This must be a multiple of the debugger work page modulo 10000 64K B Typically Memory Search Increment Size is the product of CPU number and size of the Bug work page Example first CPU 0 0 x 10000 second CPU 10000 1 x 10000
127. shared SDRAM is configurable to emulate either of the following memory models 1 4MB 8MB or 16MB shared parity protected DRAM 4MB 8MB 16MB or 32M B ECC protected DRAM The two memory controllers modeled in the Petra ASIC duplicate the functionality of the parity memory controller found in MC2 ASICs as well as that of the single bit error correcting double bit error detecting memory controller found in MCECC ASICs Board firmware will initialize the memory controller as appropriate If the Petra ASIC is supporting MVME1 X2P4 functionality firmware will enable the parity MC2 memory controller model If the Petra ASIC is supporting MVME1X2P2 functionality firmware will enable either the parity or the MCECC memory controller model depending on the board configuration Board configuration is a function of switch settings and resistor population options S6 comes into play in the MCECC memory controller model S6 is a four segment slide switch whose lower three segments establish the size of the ECC DRAM segment 4 is not used Refer to the illustration and table below for specifics S6 ON OFF 16MB MCECC DRAM factory configuration 2737 0004 http www motorola com computer literature 1 21 Hardware Preparation and Installation Table 1 5 MCECC DRAM Size Settings S6 S6 S6 MCECC Segment 1 Segment 2 Segment 3 DRAM Size ON ON 4MB ON ON OFF 8MB ON OFF ON 16MB O
128. t 2 of 2 1 36 Computer Group Literature Center Web Site Installation Instructions P2 CONNECTOR TXD B P2 C18 TXD A P2 A25 RXD B P2 A19 RXD A P2 A26 P2024 TXC_A P2 A32 RXC_B P2 C21 RXC A P2 A28 SIMM09 EIA 485 EIA 422 FRONT PANEL 285230 DB 25 B PORT MES TXD B PORT PIN 14 2 TD D TXD A PIN 2 RXD R RXD B PIN 16 D i RXD A e PIN3 lt i 3 Je TXC B 94 PIN 12 RXC D TXC A PIN 15 lt R RXC B PIN 9 D i RXC A PIN 17 R DTR I DRIVER RECEIVER Fo2 CONTROLLER RTS gt REFER TO INSTALLATION MANUAL 1566 9501 Figure 1 5 EIA 485 EIA 422 Connections http www motorola com computer literature 1 37 Hardware Preparation and Installation 1 38 Computer Group Literature Center Web Site Startup and Operation Introduction This chapter provides information on powering up the MVME162P4 Embedded Controller after its installation in a system and describes the functionality of the switches status indicators and I O ports For programming information consult the MVMEIX2P4 VME Embedded Controller Programmer s Reference Guide Front Panel Switches and Indicators There are
129. tective wrapper place the board flat on a grounded static free surface component side up Do not slide the board over any surface If no ESD station is available you can avoid damage resulting from ESD by wearing an antistatic wrist strap available at electronics stores Place the strap around your wrist and attach the grounding end usually a piece of copper foil or an alligator clip to an electrical ground An electrical ground can be a piece of metal that literally runs into the ground such as an unpainted metal pipe or a metal part of a grounded electrical appliance An appliance is grounded if it has a three prong plug and is plugged into a three prong grounded outlet You cannot use the chassis in which you are installing the 162 4 itself as a ground because the enclosure is unplugged while you work on it http www motorola com computer literature 1 3 Hardware Preparation and Installation Warning Turn the system s power off before you perform these procedures Failure to turn the power off before opening the enclosure can result in personal injury or damage to the equipment Hazardous voltage current and energy levels are present in the chassis Hazardous voltages may be present on power switch terminals even when the power switch is off Never operate the system with the cover removed Always replace the cover before powering up the system Preparing the Board To produce the desired configuration
130. ted Specifications Publication Document Title and Source Number VME64 Specification ANSI VITA 1 1994 VITA VMEbus International Trade Association 7825 E Gelding Drive Suite 104 Scottsdale AZ 85260 Telephone 602 951 8866 Web http www vita com NOTE An earlier version of the VME specification is available as Versatile Backplane Bus VMEbus ANSI IEEE Institute of Electrical and Electronics Engineers Inc Standard 1014 1987 Publication and Sales Department 345 East 47th Street New York New York 10017 21633 Telephone 1 800 678 4333 http www motorola com computer literature E 3 Related Documentation Table E 3 Related Specifications Continued Document Title and Source OR Microprocessor system bus for 1 to 4 byte data Bureau Central de la Commission Electrotechnique Internationale 3 rue de Varemb Geneva Switzerland Publication Number IEC 821 BUS ANSI Small Computer System Interface 2 SCSI 2 Draft Document X3 131 198X Revision 10c Global Engineering Documents 15 Inverness Way East Englewood CO 80112 5704 X3 131 198X Rev 10c IndustryPack Logic Interface Specification Revision 1 0 VITA VMEbus International Trade Association 7825 E Gelding Drive Suite 104 Scottsdale AZ 85260 Telephone 602 951 8866 Web http www vita com ANSI VITA 4 1995 Interface Between Data Terminal Equipment and Data Circuit Terminating Equipme
131. the front panel of the MVME162P4 provides the interface to Serial Port 2 The pin assignments for the connector are as follows Table 5 4 Serial Connector J18 Pin Assignments 1 DBPIN1 DBPIN14 2 TXDB TXCB 3 RXDB DBPIN16 4 RTSB RXCB 5 CTSB DBPIN18 6 DSRB DBPIN19 7 GND DTRB 8 DCDB DBPIN21 9 DBPIN9 DBPIN22 10 DBPIN10 DBPIN23 11 DBPIN11 TXCOB 12 DBPIN12 DBPIN25 DBPIN13 http www motorola com computer literature 5 5 Pin Assignments Serial Port 1 Console Connector J25 DB25 socket connector located on the front panel of the MVME162P4 provides the interface to Serial Port 1 The pin assignments for the connector are as follows Table 5 5 Serial Connector J25 Pin Assignments No Connection No Connection TXDA TXCA RXDA No Connection RTSA RXCA CTSA No Connection DSRA No Connection GND DTRA DCDA No Connection oO CO NT DW Nm AJ WwW N No Connection No Connection No Connection No Connection No Connection TXCOA No Connection No Connection 13 No Connection VMEbus Connectors P1 P2 Two three row 96 pin DIN type connectors P1 and P2 supply the interface between the base board and the VMEbus P1 provides power and VME signals for 24 bit addressing and 16 bit data Its pin assignments are set by the IEEE P1014 1987 VMEbus Specif
132. tions P2 CONNECTOR TXD B TXD A RXD B RXD A RTS B RTS CTS B CTS A DTR B DTR A DCD B DCD A DSR B DSR A MVME 162 4 EIA 530 DTE CONFIGURATION TXC B TO MODEM TXC B RXC A TXCO B TXCO A TM A RLA P2 C18 P2 A25 P2 A19 P2 A26 P2 C19 P2 A27 P2 C26 P2 A29 P2 A23 P2 A30 P2 C22 P2 A31 P2 A22 P2 A20 P2 C24 P2 A32 P2 C21 P2 A28 P2 C23 P2 A24 P2 C25 P2 C20 2 21 SIM07 FRONT PANEL EIA 530 DTE DB 25 285230 NC PIN 1 B PORT TXD B PORT PIN 14 2 PIN2 TXD gt D TXD RXD B A PIN 16 R g RIS B RTS D RISA PIN 19 4 CTS B CISA PIN 13 PINS CTS R g DTR_B DTR D DTR A 71 23 20 DCD B DCD je R ow DCD PIN 10 PIN8 DSR B TXC um lt lt A DSR A pe B 4 lt PIN 12 1 15V 5 ME i ping c RXC A PIN17 TXCO B D a PIN 11 PIN 24 TM A NC e PIN 25 45V LL A o e PIN18 5V RL_A PIN21 PIN7 10971 01 1 2 9704 Figure 1 4
133. tions because of the incorrect clock direction Figure 1 4 sheets 1 and 2 shows an MVME162P4 with the two configurations available with ELA 530 SIMs Figure 1 5 shows an MVMEI62P4 with the configuration available with the EIA 485 EIA 422 SIM 4 14 Computer Group Literature Center Web Site Functional Description Do not connect serial data devices to the equivalent ports on the MVME712M transition module and the MVME162P4 Caution front panel at the same time This could result in simultaneous transmission of conflicting data Do not connect peripheral devices to Port 1 Port 3 or the Centronics printer port on the MVME712M transition module In the EIA 232 D case Caution none of these ports are connected any MVME162P4 circuits In the EIA 530 case attempting to use these ports would produce certain connections with the potential to damage the MVME162P4 or the peripherals When using an EIA 530 SIM or an EIA 485 EIA 422 SIM do not connect N the MVME162P4 to an MVME712x transition board Neither the P2 Caution adapter nor the transition boards support the EIA 530 EIA 485 or EIA 422 signals IndustryPack IP Interfaces The IP2 function in the Petra ASIC on the MVME162P4 supports four IndustryPack IP interfaces these are accessible from the front panel The IP2 function also includes four DMA channels one for each IP or two for each double wide IP 32 or 30MHz 32 MHz for MC68LC0x0 or 30 MHz for MC680x0 or 8
134. to System Controller Not System Controller factory configuration http www motorola com computer literature 1 7 Hardware Preparation and Installation IP Bus Clock J14 JN Header J14 selects the speed of the IP bus clock The IP bus clock speed may be 8MHz or it may be set synchronous to the processor bus clock 25MHz or 32MHz for the MC68040 and MC68LC040 The default factory configuration has a jumper installed on pins 1 2 denoting an 8MHz clock If the jumper is installed on J14 pins 2 3 the IP bus clock speed matches that of the processor bus clock 25 32MHz allowing the IP module to pace the MPU Whether the setting is 8 2 or the processor bus clock speed all IP ports operate at the same speed The setting of the IP32 bit in the Control Status registers Petra IP2 sector register at offset 1D bit 0 must correspond to that of the jumper The bit Caution is cleared 0 for 8MHz or set 1 to match the processor bus clock speed If the jumper and the CSR bit are not configured the same the board may not run properly J14 J14 1 2 3 1 2 8 mmm Bus Clock 8MHz Bus Clock Proc Bus Clock Factory configuration from MPU Bus Clock 1 8 Computer Group Literature Center Web Site Preparing the Board SIM Selection for Serial Port B J15 Port B of the MVME162P4 785230 serial communications controller is configurable via a serial interface modul
135. to chassis ground via metal shell connectors bonded to a conductive module front panel Conductive chassis rails connected to chassis ground This provides the path for connecting shields to chassis ground Front panel screws properly tightened All peripherals EMC compliant For minimum RF emissions it is essential that the conditions above be implemented Failure to do so could compromise the FCC compliance of the equipment containing the module The MVME162P4 is a board level product and meant to be used in standard VME applications As such it is the responsibility of the OEM to meet the regulatory guidelines as determined by its application 4 Computer Group Literature Center Web Site Troubleshooting Solving Startup Problems In the event of difficulty with your MVME162P4 VME embedded controller try the simple troubleshooting steps on the following pages before calling for help or sending the board back for repair Some of the procedures will return the board to the factory debugger environment The board was tested under these conditions before it left the factory The self tests may not run in all user customized environments Table B 1 Troubleshooting MVME162P4 Boards Condition I Nothing works no display on the terminal Possible Problem A If the RUN or FUSE LED is not lit the board may not be getting correct power Try This Make sure the system is plugge
136. two switches ABORT and RESET and eight LEDs FAIL STAT RUN SCON LAN FUSE SCSI and VME located on the MVME162P4 front panel Table 2 1 MVME162P4 Front Panel Controls Control Indicator Abort Switch ABORT Function Sends an interrupt signal to the processor The interrupt is normally used to abort program execution and return control to the debugger firmware located in the MVME162P4 Flash memory The interrupter connected to the Abort switch is an edge sensitive circuit filtered to remove switch bounce Reset Switch RESET Resets all onboard devices Also drives a SYSRESET signal if the MVME162P4 is system controller SYSRESET signals may be generated by the Reset switch a power up reset a watchdog timeout or by a control bit in the Local Control Status Register LCSR in the VMEchip2 ASIC For further details refer to Chapter 4 Functional Description FAIL LED 251 red Board failure Lights if a fault occurs on the MVME162P4 board STAT LED DS2 amber CPU status Lights if the processor enters a halt condition RUN LED DS3 green CPU activity Indicates that one of the local bus masters is executing a local bus cycle Startup and Operation Table 2 1 MVME162P4 Front Panel Controls Control Indicator SCON LED 054 green Function System controller Lights when the VMEchip2 ASIC is functioning as VMEbus system controller LAN LED DS5 green
137. ug IP c into J20 and J21 plug IP d into J29 and J30 If a double sized IP is used plug IP ab into J4 J5 J10 and J11 plug IP cd into J20 J21 J29 and J30 2 Four additional 50 pin connectors J7 J8 J26 and J27 are provided behind the MVME162P4 front panel for external cabling connections to the IP modules There is a one to one correspondence between the signals on the cabling connectors and the signals on the associated IP connectors i e J8 has the same IP_a signals as J4 J7 has the same IP_b signals as J10 J27 has the same IP c signals as J20 and J26 has the same IP d signals as J29 Connect user supplied 50 pin cables to J7 J8 J26 and J27 as needed Because of the varying requirements for each different kind of IP Motorola does not supply these cables Bring the IP cables out the narrow slots in the MVME162P4 front panel and attach them to the appropriate external equipment depending on the nature of the particular IP s MVME162P4 Installation With EPROM SIM and IP modules installed and headers or switches properly configured proceed as follows to install the MVME162P4 in a VME chassis 1 Turn all equipment power OFF and disconnect the power cable from the AC power source http www motorola com computer literature 1 23 Hardware Preparation and Installation Caution Warning Inserting or removing modules while power is applied could result in damage to module components
138. where is the unique 5 nibble number assigned to the board 1 every MVME162P4 has a different value for xxxxx Each board has an Ethernet Station Address displayed on a label attached to the VMEbus P2 connector In addition the six bytes including the Ethernet address are stored in the BBRAM configuration area That is 0001 is stored in the BBRAM The upper four bytes 0001 AFOx are read at SFFFCIF2C the lower two bytes xxxx are read at FFFC1F30 The MVME162 debugger has the capability to retrieve or set the Ethernet address If the data in BBRAM is lost use the number on the label on backplane connector P2 to restore it The Ethernet transceiver interface is located on the MVME162P4 main board and the industry standard DB15 connector is located on the MVME712x transition board 4 16 Computer Group Literature Center Web Site Functional Description Support functions for the 82596CA LAN coprocessor are provided by the Petra MC2 sector Refer to the 82596 user s guide and to the description of the MC2 function in the MVMEIX2P4 VME Embedded Controller Programmer s Reference Guide for detailed programming information SCSI Interface MVME162P4 may have provision for mass storage subsystems through the industry standard SCSI bus These subsystems may include hard and floppy disk drives streaming tape drives and other mass storage devices The optional SCSI interface is implement
139. ze the system clock Using 162Bug Debugger Commands on page 3 6 Examine and or change Using 162Bug Modifying the Environment on page 3 9 environmental parameters Program the board as needed for Programmer s Reference Guide listed in the Related your applications Documentation appendix Equipment Required The following equipment is necessary to complete an MVME162P4 system system enclosure System console terminal Operating system and or application software Disk drives and or other I O and controllers Guidelines for Unpacking Note Ifthe shipping carton is damaged upon receipt request that the carrier s agent be present during the unpacking and inspection of the equipment Unpack the equipment from the shipping carton Refer to the packing list and verify that all items are present Save the packing material for storing and reshipping of equipment 1 2 Computer Group Literature Center Web Site Getting Started Avoid touching areas of integrated circuitry static discharge can damage circuits Caution ESD Precautions This section applies to all hardware installations you may perform that involve the MVME162P4 board Motorola strongly recommends the use of an antistatic wrist strap and a conductive foam pad when you install or upgrade the board Electronic components can be extremely sensitive to ESD After removing the board from the chassis or from its pro

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