TE0630 Spartan-6 FPGA Industrial Micromodule
Contents
1. 6 4 J5 Pin out J5 pin Net Type FPGA pin Net J5 pin Type FPGA pin Net Length Length mm mm i 2 3 4 5 6 MR SYS 7 8 RESET SYS 9 10 RESET SYS 11 12 13 T2 19 97 14 U1 10 26 15 T1 18 91 16 U3 11 74 17 V15 18 18 18 V1 9 72 19 AA2 16 26 20 V2 10 03 21 AB2 15 23 22 Y1 9 21 23 GND 24 25 V2_10_01_N DIO AB6 10 68 26 Y2 8 73 27 V2 10_01_ P DIO AA6 12 54 28 AB3 6 68 29 V2_10_02 P DIO Y7 13 32 30 Y3 8 38 31 V2_IO_02_N DIO AB7 11 56 32 AB4 6 65 33 U8 8 41 34 AA4 7 51 35 36 37 V2 10_03_N DIO AB8 12 43 38 Y4 8 41 39 V2 10_03_ P DIO AA8 13 01 40 V2_IO_10_P DIO W6 9 20 41 AB12 12 62 42 V2 10_10_N DIO Y6 8 31 43 D D e a 44 e 45 AB11 11 34 46 V2_IO_11_N DIO Y8 8 09 47 Y11 12 64 48 V2_10_11_P DIO W9 9 10 49 V2_10_04_P DIO W15 14 63 50 V2_lO_12_P DIO Y9 8 40 ol V2_10_04_N DIO Y16 12 42 52 V2_10_12_N DIO AB9 6 60 53 54 55 V2_10_05_N DIO U14 17 21 56 AB10 7 26 57 V2_10_05 P DIO T14 18 75 58 AA10 8 16 59 V2_l10_06 P DIO AA14 12 39 60 V2_10_13 P DIO W11 11 39 61 V2_10_06_N DIO AB14 11 34 62 V2_10_13_N DIO Y10 10 30 65 V2_10_07_N DIO AB15 11 87 66 V2_10_14_N DIO Y12 9 80 67 V2_IO_07_P DIO Y15 13 55 68 V2_IO_14_P DIO W12 10 80 69 V2_10_08 P DIO AA16 12 61 70 V2_10_15 P DIO Y13 10 20 71 V2_IO_08_N DIO AB16 11 72 72 V2 10_15_N DIO AB13 8 40 75 V2_IO_09_N DIO AB18 11 91 76 V2 10_16_N DIO Y14 9 72 772. ary electronic TTA UM TE0630 v 0 21 3 July 2013 Features High density plug in Xilinx Spartan 6 module e USB 2 0 interface with high speed 480 Mbit s data rate Large SPI Flash for configuration and user data accessible via FPGA JTAG and USB interfaces e Large DDR3 SDRAM e FPGA configuration via SPI JTAG or USB 3 high efficiency on board switch mode DC DC converters Power supply from B2B connector carrier board or USB connector Flexible expansion via high density shockproof B2B connectors Most user I Os on B2B connectors routed as LVDS pairs Evenly spread supply pins for good signal integrity e Industrial temperature grade available upon request Low cost versatile and ruggedized design e Small size 1 39 www trenz electronic de frenz TE0630 Spartan 6 FPGA Industrial Micromodule User Manual Trenz Electronic GmbH Specifications FPGA XC6SLX45 75 100 150 2CSG484C 1 e USB controller CY7C68013A 56LT XC 1 e Non volatile memory 64 Mbit SPI Flash for configuration and user data Volatile memory 1 Gb x 16 DDR3 SDRAM Up to 110 FPGA user I O e Supply voltage range 4 0 V 5 5 V 1 user push button e 4 user LEDs e 2 user DIP switches Dimensions 40 5 mm x 47 5 mm TEO630 Spartan 6 FPGA Industrial Micromodule UM TE0630 v 0 21 3 July 2013 Table of Contents 1 Techical Spec NCANONS een ee EEE 4 ET EGUE ORDUO ee E EES Ea eR 4 EAE iE Ea E E
3. 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 2 Detailed Description UM TE0630 v 0 21 3 July 2013 2 9 DDR3 SDRAM TEO630 is equipped with a 1 Gb 128 MB DDR3 SDRAM chip DDR3 memory is connected to FPGA bank 1 2 10 USB Controller 12 39 TEO630 is equipped with a Cypress EZ USB FX2 controller to provide a high speed USB 2 0 interface The controller uses 4 interfaces See chapter 2 1 Block Diagram USB interface to USB connector e C interface to EEPROM SPI interface to FPGA and Flash FIFO interface to FPGA The I C interface connects the USB controller to the EEPROM chip which stores vendor ID and device ID See chapter 2 14 DIP Switch for available options The SPI interface id used to communicate with the FPGA and to access the SPI serial Flash chip The FIFO interface provides a high speed communication channel with the FPGA The interface can transfer up to 48 MB s burst rate FPGA pin out information can be found in Table 7 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 2 Detailed Description UM TE0630 v 0 21 3 July 2013 Signal name FPGA pin FDO J6 FD1 H8 FD2 H5 FD3 H6 FD4 G7 FD5 G8 FD6 F8 FD7 A3 24MHZ1 G3 PAO INTO D1 PA1 INT1 D2 PA2 SLOE C1 PA3 WU E4 PA4 FIFOADDRO B1 PAS FIFOADDR1 C3 PA6 PKTEND B2 PA7 FLAGD SLCS A2 RDY1 SLWR M3 RDYO SLRD M4
4. A E ee er 4 2 Veiled Sy NOU i ee sen een Renee 5 ENDE lee 0 BD 101 2 1 EOE AE EE OEE EEAO EAT E A ANAA gt EEE ee Eee 5 Fe Vy VOR BEE 5 ae LC Onee GER wcecse testa ten ose AEE 5 2 29 OM board Power Ralls nern ae ee 6 2 2 4 Power on Reset ee ans eeeinrearee T Po aS eNe E lc E I O SEAE O A TE EEA EE EE E TE 8 2 4 Board to board CORE een 9 ZELDA O e EEES 10 PASUA EE N E E E EAE O EA AE E a ee een 11 E EEFE ON a E een Te 11 DS ee ee EA A A AAA EEA EEA 11 LEOR LED 2 1 i AE EE AE E aS 12 FON E EEA EE EE PENNE E E E A EE E E 12 PAES ee ES e Ee ie PEA AOE A A ESA A AE E A A AT E T 13 L LET AA A ee EA 13 ZI PIE aE E p A EIO een 14 CE a R Er 14 2 15 Board revisions and assembly VALIANMS ccecccseccceeeceeeeeeeeeeeeseeeseeceeceeeeeseeeseeseeseeeeeeaes 14 IE WEOE een ee 15 3 1 Mer MAIC Ch OW AMIN Y sessirnir ninr Ee L a ERN A UNE RER 15 3 2 mel a IE II DD es en ee ee ee enn ae eee eee re ae eee 19 b IVC SONA El latency cere ae en en ee ee Eee ee 17 4 IE FPGA IIIT 11 1 SIE EEE eesent EE OENE 17 ee ne IG O 1 SEEN ENGER tn cdenceneeupulaaieisneabscmimaienleecarninnelarets 18 ASIEN EOS IT ee en ee een 18 4 4 EZ USB FX2 Firmware Programming ernennen 18 4 5 EZ USB FX2 EEPROM POON ING neueren 19 SUS 29 eI ee STA ON aanraai aaien iR AEE E RE i 21 Se IS pe ee pores nee ee 21 a EE A E ae ian earns E ie rors NEN essere naa UN E E 24 6 B2B Connectors Pin DESCNDUGIS anne 26 TFR Ba 21 Peen E BEE E E E E NEON E E 2 rg De
5. CTL2 FLAGC E3 CTL1 FLAGB E1 CTLO FLAGA F3 IFCLK N4 Table 7 USB controller interface FPGA pin out 2 11 Clock Oscillators Two clock oscillators are installed on the TEO630 Clock oscillator U10 generates a 24 MHz clock signal for the FPGA and the USB controller This clock signal is used for synchronous communication between FPGA and USB controller Clock oscillator U11 generates a 100 MHz clock signal used as a main system clock in FPGA designs See Table 8 for pin out information Signal Frequency FPGA pin 24MHZ1 24 MHz G3 SYSCLK 100 MHz AA12 Table 8 Clock signals pin out 2 12 LEDs TEO630 is equipped with four active high LEDs See Table 9 for details 3 Oscillator frequency can be changed by user request Contact Trenz Electronic for details 13 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 2 Detailed Description UM TE0630 v 0 21 3 July 2013 Signal name FPGA pin U LED1 F1 D3 U LED2 F2 D5 U_LED3 J4 D6 U LED4 K8 D7 Table 9 LEDs pin out 2 13 Push Button TEO630 module is equipped with one active high push button signal is set to logical 1 when button is pressed Table 10 show push button connection details Signal name FPGA pin PB PB R7 S5 Table 10 Push button pin out 2 14 DIP Switch On board 4xDIP switch S1 used for system and user settings Switch 1 S1A is used to connect the USB controller to the 1 C serial EE
6. OF OS E6 Download 96 bytes addr 8 4e BB Ol OC ES 52 29 FS SZ ES 83 34 FS 85 EO ZZ 50 06 ES 5 SZ Fe ES ZZ BR FE 06 E93 5 SZ F8 EF Fe ES SZ 9 F5 BZ ES 83 34 FS 83 Ed 93 Fe F8 BE 01 Ob ES SZ 29 FS BZ ES 83 34 FS 83 ES FO ZZ 50 06 ES 5 BZ C8 F ZZ BR FE OS ES 5 SZ CH Fz ZZ EB SF FS FO EA SE 42 FO ES OD 47 FO ES 9C 45 FO fe e 5051 Reser 00 Downloading file C TEOSO0 ush iic Downloading 4096 bytes to addr 0 Downloading 1331 bytes to addr 1000 Download Successful 5427 bytes dowloaded After that EEPROM will contain right VID PID To apply changes reconnect USB cable 5 USB Drivers Installation To provide convenient interface from host computer to TEQ630 module USB driver should be installed to operating system There is 2 drivers to work with TEO630 module Generic driver which work with default controller configuration e Dedicated driver which works with custom FX2 firmware Generic driver used only for initial USB microcontroller programming and not needed for normal work flow Most TE0630 users need to install only dedicated driver see chapter 5 2 Dedicated Driver 5 1 Generic Driver 21 39 Most users don t need this driver this driver used only for initial USB microcontroller programming which was already done for all supplied TEO630 modules If the USB microcontroller Cypress EZ ESB FX2 driver is not installed on the host computer then the easiest way to do it is the following e disconnect the mo
7. Status BATCH setPreference pref SpiBbyteSwap AUTO CORRECTION BATCH CMD setPreference pref AutoInfer TRUE BATCH CMD setPreference pref SvfPlayDisplayComments FALSE Select mcs file to program Select SPI Flash type corresponding to your module type and revision W Select Attached SPI BPI Select the PROM attached to FPGA SPI PROM MI5P32 Right click on Flash image and select Program from menu 36 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule Appendix A Indirect SPI Programming using IMPACT UM TE0630 v 0 21 3 July 2013 ip Gk Vene Dipa Deg Wion hep MBXHBRU Reel ami ew Right click device to select operations H Gel Boundary Scan Create PROM File PROM File Format Verify GI WebTalk Data EB Erase Blank Check Readback Get Device Checksum Assign New Configuration File Available Operations are Program mp Verify Set Programming Properties m Erase Set Erase Properties Blank Check Edit Attached Flash Properties Readback EIER PER ee ee Get Device Checksum WJ INFO iMPACT A CFI file is not detected To ensure correct and safe conf a Please make sure a CFI file is present in the same directory as the PROM or regenerate the PROM file with the latest software 2 Boundary Scan Device 1 FPGA xc3s1200e Device 1 Attached FLASH M25P3 Design Specific Erase Before Programming A
8. V2_10_09 P DIO AA18 12 57 78 V2_10_16 P DIO W14 10 72 Table 22 J5 connector pin out 29 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 6 B2B Connectors Pin Descriptions UM TE0630 v 0 21 3 July 2013 6 5 Signal Integrity Considerations Traces of differential signals pairs are routed symmetrically as symmetric pairs Traces of differential signals pairs are NOT routed with equal length For applications where traces length has to be matched or timing differences have to be compensated Table 21 and Table 22 list the trace length of I O signal lines measured from FPGA balls to B2B connector pins Traces of differential signals pairs are routed with a differential impedance between the two traces of 100 ohm Single ended traces are routed with 60 ohm impedance An electronic version of these pin out tables are available for download from the Trenz Electronic support area of the web site 7 Related Materials and References The following documents provide supplementary information useful with this user manual 7 1 Data Sheets e Winbond W25Q64BV product overview http www winbond com tw hq enu ProductAndSales ProductLines FlashMe mory SerialFlash W25Q64BV htm Xilinx DS160 Xilinx Spartan 6 Family overview http www xilinx com support documentation data_sheets ds160 pdf Cypress EZ USB FX2 Controller datasheet http www cypress com mpn CY C68013A 56LT XC 7 2 User Guides Xilin
9. chapter 5 2 Dedicated driver installation The FPGA on the TE0630 can be configured by SPI Flash or by JTAG connector 4 1 JTAG FPGA Configuration Programming using JTAG interface provide convenient and fast way to test FPGA project FPGA configuration programmed this way is volatile and lost 17 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 4 Module Configuration UM TE0630 v 0 21 3 July 2013 after reset or power cycle 4 2 SPI FPGA Configuration The bit stream for the FPGA is stored in the SPI Flash To use this bit stream source FPGA configuration option is set to Master Serial SPI See 2 8 SPI Flash for additional information SPI Flash can be programmed in several ways Direct programming by USB controller usually done by Firmware Upgrade Tool Indirect SPI programming via FPGA pins controlled by JTAG can be done using Xilinx IMPACT See Appendix A Indirect SPI Programming using IMPACT Direct SPI programming by FPGA using an SPI core FPGA project should contain SPI interface core and software to work with it In SPI Flash mode the FPGA s internal oscillator generates the configuration clock frequency The FPGA provides this clock on its CCLK output pin driving the PROM s Slave Clock input pin The FPGA begins configuring using its lowest frequency setting If so specified in the configuration bitstream the FPGA increases the CCLK frequency to the specified setting for
10. system detects new hardware and starts the hardware assistant and answer the hardware assistant questions as shown in the following example www trenz electronic de TEO630 Spartan 6 FPGA Industrial Micromodule 5 USB Drivers Installation 25 39 Assistent fiir das Suchen never Hardware Willkommen Mit diesem Assistenten konnen Sie Software fur die folgende Hardwarekomponente installieren DemeSoft USB Device la Falls die Hardwarekomponente mit einer CD 4 oder Diskette geliefert wurde legen Sie diese jetzt ein Wie mochten Sie vorgehen Software automatisch installieren empfohlen Sottware vor einer Liste oder bestimmten Guelle installieren fur fortgeschrittene Benutzer klicken Sie auf Weiter um den Yorgang fortzusetzen Assistent f r das Suchen neuer Hardware Wahlen Sie die Such und Installationsoptionen eS versenden Sie die Kontrollk stchen um die Standardsuche zu erweitern oder einzuschranken Lokale Pfade und Wechselmeden sind in der Standardsuche mit einbegnffen Der zutreffendste Treiber wird installiert Wechselmedien durchsuchen Diskette CD Folgende Quelle ebenfalls durchsuchen CATEOS00 driver v Nicht suchen sonder den zu installierenden Treiber selbst w hlen Verwenden Sie diese Option um einen Ger tetreiber aus einer Liste zu w hlen Es wird nicht garantiert dass der von Ihnen gew hlte Treiber der Hardware am besten entspricht Hardwareinstallat
11. the remainder of the configuration process The maximum frequency is specified using the ConfigRate bitstream generator option The maximum frequency supported by the FPGA configuration logic depends on the timing for the SPI Flash device For TEO630 SPI Flash PROM use ConfigRate 12 or lower This options are set graphically in Xilinx ISE Software Project Navigator by selecting the following Generate Programming File gt Process Properties gt Configuration Options gt Configuration Rate gt 12 or lower 4 3 eFUSE programming To program eFUSE at TE0630 module follow the steps below e Connect 2 5V power rail to 3 3V power rail It can be done on B2B connector see 6 B2B Connectors Pin Descriptions Or if module connected to baseboard better to short power rails on baseboard e Program eFUSE using JTAG cable and iMPACT software Disconnect 2 5V and 3 3V power rails 4 4 EZ USB FX2 Firmware Programming 18 39 TE0630 module supplied with already programmed FX2 firmware so this procedure is not needed for normal work flow This procedure is required only if custom firmware used or to restore firmware If the EEPROM has never been programmed before virgin module Switch 1 S1A can be switched to EEPROM to ON state See chapter 2 14 DIP Switch for details The USB microcontroller will detect an empty EEPROM and www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 4 Module Configuration UM TE0630
12. them to ground with 10 nF 100 nF capacitors FPGA I O banks power supply Spartan 6 architecture organizes I Os into four I O banks see Table 1 for supply voltage used for each bank VCCIOO voltage can be configured in 3 ways 2 5V When resistor R103 is populated and resistor R102 is not populated 3 3V When R103 is not populated and resistor R102 is populated www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 2 Detailed Description UM TE0630 v 0 21 3 July 2013 e External supply When R103 is not populated and R102 is not populated In this case external supply source have to be connected to pins 1 2 3 4 of JA B2B connector Others options of VCCIOO power supply are not supported and can damage the FPGA See Figure 4 to locate R102 and R103 on PCB Figure 4 R102 and R103 location Supply Voltage BO VCCIOO B1 1 5V B2 3 3V B3 3 3V Table 1 FPGA banks VCCIO power supply Note that some of Spartan 6 I O types are partially compatible so pins of compatible types can be used as inputs for signal of other type See Spartan 6 FPGA SelectlO Resources page 38 for detailed information 2 2 4 Power on Reset During power on the RESET line is first asserted Thereafter the supply voltage supervisor monitors the power supply rail 3 3V and keeps the RESET line active low as long as the supply rail remains below the threshold voltage 2 93 volt An i
13. trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 2 Detailed Description UM TE0630 v 0 21 3 July 2013 Signal name FPGA pin Table 12 Board revision pins To define low zero level BR pin connected to ground rail to define high one level BR pin left float open These pins should be configured with pullup option in user design See Table 12 for current list of board revisions BR3 BR2 BR1 BRO 0 0 0 0 00 Initial revision Table 13 Board revisions Module assembly variant encoded using AV 3 0 pins Signal name FPGA pin AVO Y20 AV1 R15 AV2 R16 AV3 R17 Table 14 Assembly variants pins To define low zero level AV pin connected to ground rail through zero resistor to define high one level AV pin left float open These pins should be configured with pullup option in user design Available module assembly variants listed in Table 15 AV3 AV2 AV1 AVO 0 0 0 0 Base assembly variant Table 15 Module assembly variants 3 TE0300 compatibility TEO630 module designed to be compatible with TEO300 board by main mechanical and electrical characteristics 3 1 Mechanical compatibility Both modules have the same board dimensions TEQ630 mount holes and B2B connectors locations are match with TE0300 See chapter 1 2 Dimensions for detailed information TEO300 and TEO630 uses same B2B connectors types In chapter 2 4 Board to board Connectors
14. v 0 21 3 July 2013 will provide its default vendor ID and device ID to the USB host If the EEPROM has been programmed before EEPROM not empty S1A must be switched to OFF The USB microcontroller will detect a missing EEPROM and will provide its default vendor ID and device ID to the USB host 4 5 EZ USB FX2 EEPROM Programming TEO630 module supplied with already programmed EEPROM so this procedure is not needed for normal work flow This procedure is required only if custom firmware used or to restore firmware First of all check that Switch 1 S1A is actually switched to EEPROM The USB EEPROM can be programmed by opening the dedicated software Cypress USB Console double click the CyConsole exe file in the 1st_program CyConsole folder T Cypress USB Console File Options Help N el H Selected Script Select Device ae 4 USB Device Cypress Generic USB Device Device Properties Control Endpt fers Other Endpt fers Misc VendarlD O 046 4 ProductiD 08613 Manufacturer Product Seral Number Subclass OFF Frotocol OFF bedDevice 024001 Device Configurations 1 0x01 080 O32 100 mA Configuration Interfaces 4 Alt Setting 0 OxFF Wendor OxFF OxFF 0 OFF Yerdor OFF OFF 0 OeFF Yerdor OFF OFF Interface Endpoints 0 Max Pkt Size Click Options gt EZ USB Interface to Open EZ USB Interface window 19 39 www trenz electronic de TEO630
15. you can find B2B connectors part numbers and main characteristics 3 2 Electrical compatibility TEO300 and TE0630 have similar power requirements and matched power input pins User signals to B2B connectors routed as differential pairs and single 15 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 3 TEO300 compatibility UM TE0630 v 0 21 3 July 2013 ended lines Differences in pin types shown in Table 16 not listed signals have same or compatible type Connector Pin TE0300 pin name TE0300 Type TE0630 pin name TEO0630 Type J4 5 B3_L01_P DIO J4 7 B3_L01_N DIO J4 9 B3_L02 P DIO J4 11 B3_L02_N DIO J4 17 BO L24 N DIO J4 19 BO L24 P DIO VOJON DO J4 6 B3 LO7_P DIO J4 8 B3 LO7_N DIO J4 10 B3_L03_N DIO J4 12 B3_L03 P DIO J5 13 B3_L22 P DIO J5 15 B3 L22 N DIO J5 19 B3_L20 P DIO J5 21 B3_L20 N DIO J5 16 B3 L21 N DIO J5 18 B3_L21_P DIO J5 20 B3_L23 N DIO J5 22 B3_L23 P DIO J5 32 B2 LO6 P DIO J5 34 B2 LO6_N J5 41 J5 49 v2_lO 24 P J5 51 V2 10 24 N DIO Table 16 TE0300 and TE0630 pin types differences see Table 17 for pin types definitions Type colour code Description Unrestricted general purpose differential user l O pin Unrestricted general purpose user l O pin Unrestricted general purpose differential user I O pin This pin also ca
16. 1_N DIO A5 5 14 20 V0O_IO 12 N DIO A7 10 95 21 VO_IO_01_P DIO C5 6 84 22 V0O_10 12 P DIO C7 12 30 25 Vo_IO_02 N DIO C6 727 26 Vo_IO_13_N DIO A8 10 41 27 VO_IO_02 P DIO D6 8 16 28 Vo_IO_13_P DIO B8 11 74 29 Vo_lO_03_P DIO D7 7 93 30 Vo_IO_14_ N DIO AQ 10 40 31 Vo_IO_03_ N DIO C8 7 21 32 Vo_IO_14_P DIO c9 12 81 33 34 35 Vo_IO_04_P DIO D9 9 34 36 M7 21 84 37 Vo_IO_04_N DIO D8 10 08 38 C12 12 96 39 B12 6 00 40 D11 13 32 41 A12 05 01 42 A10 10 97 43 D D 44 B10 11 84 45 C11 7 93 46 47 A11 10 76 48 Vo_IO_15_N DIO A15 11 79 49 Vo_lO_05_P DIO C13 7 20 50 Vo_IO_15_P DIO C15 13 66 51 Vo_IO_05_ N DIO A13 6 11 52 M8 26 06 53 54 55 Vo_IO_06_P DIO D10 12 84 56 Vo_IO_16_P DIO B16 12 98 57 Vo_IO_06_ N DIO C10 13 09 58 VO_IO_16_N DIO A16 10 96 59 Vo_lO_07_P DIO F10 16 22 60 Vo_IO_17_P DIO C17 16 33 61 Vo_IO_07_ N DIO E10 15 43 62 Vo_IO_17_N DIO A17 13 51 65 Vo_IO_08_ N DIO A14 8 21 66 VO_IO_18_P DIO B18 15 19 67 vo_IO_08_P DIO B14 9 11 68 Vo_IO_18_N DIO A18 13 77 69 Vo_IO_09 N DIO C14 9 40 70 E18 71 vo_IO_09_P DIO D15 9 40 72 E14 75 Vo_IO_10_ N DIO C16 9 65 76 D14 gt 77 Vo_IO_10_P DIO D17 9 58 78 E16 TEO630 Spartan 6 FPGA Industrial Micromodule 6 B2B Connectors Pin Descriptions UM TE0630 v 0 21 3 July 2013
17. 6SLX75 XC6SLX100 XC6SLX150 chip Temperature grade options Module can be ordered in commercial or in extended from 25 C to 85 C temperature grade 1 2 Dimensions Figure 1 shows main module dimensions from top view Li sn u ui top view te a D Li e u of i ik N N lt 3 25 3 25 lel 22 25 47 50 Figure 1 Module dimensions in mm Mounting hole diameter is 3 2 mm 1 Contact Trenz Electronic support for availability 4 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 2 Detailed Description UM TE0630 v 0 21 3 July 2013 2 Detailed Description EEPROM 24 MHz 1Gb 128MB 24LC126 clock DDR3 SDRAM 16 2 1 Block Diagram USB pe User O USB MCU Cypress EZ USB CY7C68013A Xilinx FPGA opartan 6 LX XC6SLX45 75 100 150 100 MHz SPI Flash dock 64 Mbit system user 18x2 15 54 User 1 0 z 2xDIP 4xLED PB seri Figure 2 TE0630 block diagram 2 2 Power Supply The module can be powered by B2B connector J5 or the USB connector If both power supplies are available the B2B connector power supply takes precedence disabling the USB power supply automatically 2 2 1 Supply from B2B Connector The B2B connector power supply requires a single nominal 5 V DC power supply The power is usually supplied to the module through the 5 V contacts 5Vb2b of B2B connector J5 see chapter 6 4 J5 Pin out The recommended minimum supply voltage is 4 V The maxi
18. PROM When S1A is ON serial 1 C EEPROM is connected to the USB controller when switch is OFF the USB controller is disconnected from the EEPROM Turn S1A off when programming the USB EEPROM storing the USB vendor ID and device ID This will force the USB controller to provide its default vendor ID and device ID Switch 2 S1B is used to control DC DC converters When switch is OFF converters are controlled by the USB controller When switch is ON converters are enabled regardless of USB controller actions At start up the USB controller switches off 1 2V 1 5V and 2 5V power rails and starts up the module in low power mode After enumeration the USB controller firmware switches the 1 2V 1 5V and 2 5V power rails on if enough current is available from the USB bus Switches 3 S1C and 4 S1D can be used as user switches Switches are active low Pull up resistors should be defined in user constrains file UCF to use this switches in FPGA design See Table 11 for details Signal name FPGA pin Switch lO L61 N 1 AB21 S1C IO L63 N 1 AA22 S1D Table 11 DIP switch pin out 2 15 Board revisions and assembly variants To determine PCB revision and assembly variant from FPGA TE0630 have dedicated user signals which can be read by user core Board revision coded in 4 bits BR 3 0 4 Zero resistor R90 not populated by default short this switch and connect EEPROM regardless of S1A position 14 39 www
19. S Family USB Universal Host Controller 2832 f Intel R ICHS Family USB Universal Host Controller 2834 lg Intel R ICHE Family USB Universal Host Controller 2835 Intel R ICHS Family USB2 Enhanced Host Controller 2836 Intel R ICHS Family USB2 Enhanced Host Controller 2834 lS USB Root Hub E USE Root Hub gt USE Root Hub gt USB Root Hub 6 B2B Connectors Pin Descriptions This section describes how the various pins on B2B connectors J4 and J5 are connected to TEO630 on board components There are four main signal types connected to B2B connectors e FPGA users signals USB signals Power signals System reset signals 26 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 6 B2B Connectors Pin Descriptions UM TE0630 v 0 21 3 July 2013 6 1 Pin Labelling FPGA user signals connected to B2B connectors are characterized by the Vx_lO_yy_p naming convention where e Vx defines the FPGA bank x bank number O defines an FPGA to B2B signal type yy defines a differential pair or signal number yy pair number e p defines a differential signal polarity P positive N negative single ended signals do not have this field Remaining signals use custom names 6 2 Pin Types 27 39 Most pins of B2B connectors J1 and J2 are general purpose user defined I O pins GPIOs There are however up to 5 different functional types of pins on the TEO630 as outlined in T
20. Spartan 6 FPGA Industrial Micromodule 4 Module Configuration UM TE0630 v 0 21 3 July 2013 7 EZ USB Interface end Req Req 0x00 Value 0x0000 Index 0x0000 Length O Dir 0 OUT v Hex Bytes CO B4 04 81 00 01 00 iso Trans Pipe pw Length 128 Packet Size I Packets _ Set IFace Interface 0 AtSetting 0 S EEPROM button refers to the small EEPROM 256 bytes whereas the Lg EEPROM refers to the large EEPROM 64 KB Press the Lg EEPROM button select the USB lic file and press the Open button to start writing to EEPROM Large 512 64K byte EEPROM Download Suchen in iy TE0300 ef P C driver CO CyConsole Zuletzt verwendete Desktop Eigene Dateien Arbeitsplatz D ateiname Jusbaiic F Netzwerkumgeb Dateityp li2c EEPROM Files c Abbrechen rn I Schreibgesch tzt ffnen Upgrade progress is displayed in status window and is completed when Download Successful text is displayed 20 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 4 Module Configuration UM TE0630 v 0 21 3 July 2013 7 EZ USB Interface EIER BUSH Devicc _ a Eee EEE ear Mend Req Req 0x00 Value Ox084E Index 0x0000 Length O Dir 0 OUT Hex Bytes CO B4 04 81 00 01 00 borers Pef Length 128 PacketSize Packets se Face Interface 0 ASetting b oooo Of Ob 1 Download lf bytes addr d91 goog 78 TF E4 F DS FD 75 81 3E
21. able 20 In pin out tables Table 21 and Table 22 the individual pins are colour coded according to pin type as defined in Table 20 type colour code description Unrestricted general purpose differential user l O pin Unrestricted general purpose user l O pin Unrestricted general purpose differential user I O pin This pin also can be used as FPGA clock input USB signals Dedicated JTAG signals Dedicated ground pin All must be connected System signal See the description of each pin in the user manual for additional information on the corresponding signals Power signals Table 20 TE0630 pin types www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 6 B2B Connectors Pin Descriptions UM TE0630 v 0 21 3 July 2013 6 3 J4 Pin out J4 pin Net Type FPGA pin Net J4 pin Type FPGA pin Net Length Length mm mm 28 39 Table 21 J4 connector pin out www trenz electronic de 3 u u 5 C4 15 26 i D3 17 04 9 E6 14 97 11 D5 13 84 13 END 15 F7 10 16 16 Vo_IO_11_P DIO B6 12 29 17 A4 5 16 18 Vo_IO_1_N DIO A6 10 84 19 Vo_IO_0
22. dio 9 Legal Notices 9 1 Document Warranty The material contained in this document is provided as is and is subject to being changed at any time without notice Trenz Electronic does not warrant the accuracy and completeness of the materials in this document Further to the maximum extent permitted by applicable law Trenz Electronic disclaims all warranties either express or implied with regard to this document and any information contained herein including but not limited to the implied warranties of merchantability fitness for a particular purpose or non infringement of intellectual property Trenz Electronic shall not be liable for errors or for incidental or consequential damages in connection with the furnishing use or performance of this document or of any information contained herein 9 2 Limitation of Liability In no event will Trenz Electronic its suppliers or other third parties mentioned in this document be liable for any damages whatsoever including without limitation those resulting from lost profits lost data or business interruption UM TE0630 v 0 21 3 July 2013 arising out of the use inability to use or the results of use of this document any documents linked to this document or the materials or information contained at any or all such documents If your use of the materials or information from this document results in the need for servicing repair or correction of equipment or data y
23. dule if it connected or leave the module unconnected configure the module such that the USB microcontroller will provide its default vendor ID and device ID to the USB host i e Switch 1 S1A OFF see chapter 4 4 EZ USB FX2 Firmware Programming e connect the module to the host computer through the USB interface e wait until the operating system detects new hardware and starts the www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 5 USB Drivers Installation UM TE0630 v 0 21 3 July 2013 hardware assistant e put Switch 1 S1A to ON EEPROM connected to USB microcontroller answer the hardware assistant questions as shown in the following example Assistent fur das Suchen never Hardware Willkommen Mit diesem Assistenten konnen Sie Software f r die folgende Hardwarekomponente installieren USB Device GQ Falls die Hardwarekomponente mit einer CD oder Diskette geliefert wurde legen Sie diese gt jetzt ein Wie mochten Sie vorgehen Software automatisch installieren empfohlen Software von einer Liste oder bestimmten Quelle installieren fur fortgeschrittene Benutzer Klicken Sie auf Weiter um den Vorgang fortzusetzen Assistent f r das Suchen neuer Hardware Wahlen Sie die Such und Installationsoptionen Diese Quellen nach dem zutreffendsten Treiber durchsuchen Verwenden Sie die Kontrollkastchen um die Standardsuche zu erweitern oder einzuschr nk
24. e En ee eee ETE 27 I Pre ne een 28 a BO ee ee 29 6 5 Signal Integrity ConsIid8allans un snein nennen 30 7 Related Materials and References ccccecccseeceseceseeteeeteneeeueeceeeteeeseueeeaeeteeetueteeegeeaeseeeeeeeas 30 PAE EEE E E caer tte NEE te eee ener EE eee eee eer ere ne ee rere tre 30 EU Ce E EEEE E E A 30 8 Glossary of Abbreviations and ACION INS een ine 30 FEET O a E R 31 9 1 Document Wanay asessori enaa Ea EAEE Ei EnEn aT n 31 SE e OT LOB A AEEA en leeren 31 L Cor IIA Pl is ea E E 31 2 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule UM TE0630 v 0 21 3 July 2013 24 e 00 610 br LICIS E ie renea 32 TES EAI Tare lle Oe HON srren BE EEES OR a E TRAE EEA RES 33 10 1 REACH Registration Evaluation Authorisation and Restriction of Chemicals Poe ES Eee T E E A EE E E E EE E 33 10 2 RoHS Restriction of Hazardous Substances compliance statement 33 10 3 WEEE Waste Electrical and Electronic Equipment c cccccccseeceeeseseceeeeeeeeeseeeees 33 Appendix A Indirect SPI Programming using IMPACT ccccccccseecceseeceeeceeseeecseseeeseesaeeaaes 35 DOCUMEN Change FISTO Vene een ee re 39 3 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 1 Technical Specifications UM TE0630 v 0 21 3 July 2013 1 Technical Specifications 1 1 Module options FPGA options Module can be ordered with Spartan 6 XC6SLX45 XC
25. emical products goods Moreover and under normal and reasonably foreseeable circumstances of application the goods supplied to you shall not release any substance For that Trenz Electronic is obliged to neither register nor to provide safety data sheet According to present knowledge and to best of our knowledge no SVHC Substances of Very High Concern on the Candidate List are contained in our products Furthermore we will immediately and unsolicited inform our customers in compliance with REACH Article 33 if any substance present in our goods above a concentration of 0 1 weight by weight will be classified as SVHC by the European Chemicals Agency ECHA 10 2 ROHS Restriction of Hazardous Substances compliance statement Trenz Electronic GmbH herewith declares that all its products are developed manufactured and distributed ROHS compliant 10 3 WEEE Waste Electrical and Electronic Equipment 33 39 Information for users within the European Union in accordance with Directive 2002 96 EC of the European Parliament and of the Council of 27 January 2003 on waste electrical and electronic equipment WEEE Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately By the 13 August 2005 Member States shall have ensured that systems are set up al
26. en Lokale Pfade und Wechselmedien sind in der Standardsuche mit einbegriffen Der zutreffendste Treiber wird installiert Wechselmedien durchsuchen Diskette CD Folgende Quelle ebenfalls durchsuchen CANTEOSOO driver a Nicht suchen sonder den zu installierenden Treiber selbst w hlen Yerwenden Sie diese Option um einen Ger tetreiber aus einer Liste zu w hlen Es wird nicht garantiert dass der von Ihnen gew hlte Treiber der Hardware am besten entspricht 22 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 5 USB Drivers Installation UM TE0630 v 0 21 3 July 2013 Hardwareinstallation Die Software die fur diese Hardware installiert wird Cypres Generic USE Device hat den Windows Logo Test nicht bestanden der die Kompatibilit t mit Windows amp P uberpruft Warum ist dieser Test wichtig Das Fortsetzen der Installation dieser Software kann die korrekte Funktion des Systems direkt oder in Zukunft beeintr chtigen Microsoft empfiehlt strengstens die Installation jetzt abzubrechen und sich mit dem Hardwarehersteller fur Software die den YW indows Logo T est bestanden hat in Yerbindung zu setzen p Installation fortsetzen Installation abbrechen Assistent f r das Suchen neuer Hardware Fertigstellen des Assistenten Die Software fur die folgende Hardware wurde installiert Cypres Genenc USB Device Klicken Ste auf Fertig stellen um den Yorgang ab
27. fter programming Flash automatically load FPGA with Wait for operation to complete 37 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule Appendix A Indirect SPI Programming using IMPACT UM TE0630 v 0 21 3 July 2013 After completion IMPACT window should show Program Succeeded sign SystemACE Create PROM File PROM File Format WebTalk Data Available Operations are Program ap Verify m Erase m Blank Check Readback m Get Device Checksum ma Onn Maw taten 1 Programmed successfully PROGRESS END End Operation Elapsed time 41 sec Configuration Platform Cable USB 6 MHz i usb hs a 38 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule Document Change History Document Change History UM TE0630 v 0 21 3 July 2013 ver date author description 0 01 07 10 11 AIK Release 0 02 08 10 11 AIK Added block diagram and few sections 0 03 10 10 11 AIK Added USB controller section with pin out 0 04 12 10 11 FDR First general review 0 05 13 10 11 AIK Fixes after review Add power diagram 0 06 17 10 11 AIK Add USB driver section 0 07 17 10 11 AIK Additions to configuration section 0 08 16 11 11 AIK Added module photos 0 09 17 11 11 AIK Net length information 0 10 21 11 11 AIK TEO300 compatibility information 0 11 22 11 11 AIK Additiona
28. ion A Die Software die f r diese Hardware installiert wird DEWESof USB Device hat den Windows Logo Test nicht bestanden der die Kompatibilit t mit Windows sF uberprutt Warum ist dieser Test wichtig Das Fortsetzen der Installation dieser Software kann die korrekte Funktion des Systems direkt oder in Zukunft beeintr chtigen Microsoft empfiehlt strengstens die Installation jetzt abzubrechen und sich mit dem Hardwarehersteller fur Software die den Windows Logo T est bestanden hat in Yerbindung zu setzen Installation fortsetzen Installation abbrechen UM TE0630 v 0 21 3 July 2013 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 5 USB Drivers Installation UM TE0630 v 0 21 3 July 2013 Assistent fiir das Suchen never Hardware Fertigstellen des Assistenten Die Software fur die folgende Hardware wurde installiert DE WES oft USB Device Klicken Sie auf Fertig stellen um den Yorgang abzuschlie en lt Zur ck Fertig stellen Abbrechen Check that in the Device Manager under USB Controller the DEWESoft USB Device 0 has been added E Ger te Manager Datei Aktion Ansicht 7 gt g fA Prozessoren Hs Speichervolumes H 7 Systernger te Eos Tastaturen Fee USB Controller AS CA 200 A gt DEWESoft USB Device 0 Intel R ICHS Family USE Universal Host Controller 2830 l gt Intel R ICHS Family USB Universal Host Controller 2831 Intel R ICH
29. l information to compatibility chapter 0 12 30 11 11 AIK Added eFUSE programming section 0 13 01 12 11 AIK Adder board revision and assembly variant chapter 0 14 20 01 12 AIK Added pin compatibility note and manual reference 0 15 25 01 12 AIK Added R102 R103 location image Added Appendix A 0 16 16 02 12 AIK Module options chapter 0 17 05 09 12 AIK Fixed JTAG Vref 0 18 12 09 12 AIK Fixed net length table 0 19 27 11 12 AIK Fixed J4 user pin count 0 20 13 03 13 AIK Fixed Table 7 0 21 03 07 13 AIK Fixed pin count 39 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule
30. lowing final holders and distributors to return waste electrical and electronic equipment at least free of charge Member States shall ensure the availability and accessibility of the necessary collection facilities Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 10 Environmental Protection UM TE0630 v 0 21 3 July 2013 Presence of hazardous substances in electrical and electronic equipment results in potential effects on the environment and human health The symbol consisting of the crossed out wheeled bin indicates separate collection for waste electrical and electronic equipment 34 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule Appendix A Indirect SPI Programming using IMPACT Appendix A Indirect SPI Programming using IMPACT UM TE0630 v 0 21 3 July 2013 To indirect program SPI Flash using Xilinx IMPACT do following steps Connect JTAG cable to corresponding module connector see 2 6 JTAG connector Connect JTAG cable to host computer with installed Xilinx IMPACT software Power on module by external
31. mum supply voltage is 5 5 V The recommended maximum continuous supply current is 1 5 A 2 2 2 Supply from USB Connector The module is powered by the USB connector if the following conditions are met the module is equipped with an USB connector the module is connected to a USB bus 5 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 2 Detailed Description UM TE0630 v 0 21 3 July 2013 no power supply is provided by B2B connectors In this case other components e g extension or carrier boards may also be powered by the corresponding 5 volt line 5V of B2B connector J5 2 2 3 On board Power Rails 6 39 Three on board voltage regulators provide the following power supply rails needed by the components on the module e 1 2V 3 0 A max e 2 5V 0 8 A max 3 3V 3 0 A max e 1 5V 1 0 A max Figure 3 show power supply diagram La J KEN US pe Sba J 1 5v ee VECCIOD EN JS ae a UF gt B2B U13 14 Figure 3 TE0630 Power diagram The power rails are available for the FPGA and can be shared with a carrier board by the corresponding lines of the B2B connectors J4 and J5 Please note that the power consumption of the FPGA is highly dependent on the design actually loaded So please use a tool like Xilinx Xpower to estimate the expected power consumption of your design Even if the provided voltages of the module are not used on the carrier board it is recommended to bypass
32. n be used as FPGA clock input Table 17 TE0300 and TE0630 pin types Most user signals to B2B connectors routed from same FPGA banks Differences shown in Table 18 5 Signals routed as differential pairs can be used as single ended 16 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 3 TEO300 compatibility UM TE0630 v 0 21 3 July 2013 Connector Pin TE0300 Bank TE0630 Bank J4 15 J4 36 J4 52 J5 33 J5 28 J5 30 J5 32 J5 34 J5 38 J5 40 J5 42 J5 50 J5 52 Table 18 TE0300 and TE0630 user signals I O banks differences I O Banks power supply for both modules shown in Table 19 TE0300 TE0630 VCCIO 1 2 V 3 3 V 1 5 V B1 B2 B3 Table 19 TE0300 and TE0630 FPGA I O banks power supply Bank 0 I O supply voltage at both modules can be configured by user see chapter 2 2 3 On board Power Rails 4 Module Configuration Full module configuration cycle for just assembled board include steps Generic USB driver installation USB microcontroller large EEPROM programming EEPROM programming PAD Dedicated driver installation 5 SPI Flash configuration Steps 1 3 already performed at Trenz Electronic laboratory and not required to perform by end user To work with TE0630 module using USB interface user should install dedicated USB driver which provide API to work with main module functions for complete instructions see
33. nternal timer delays the return of the RESET line to the inactive state high to ensure proper system reset prior to a regular system start up The typical delay time ty of 200 ms starts after the supply rail has risen 2 See Spartan 6 documentation fo VCCIO power range 7 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 2 Detailed Description UM TE0630 v 0 21 3 July 2013 above the threshold voltage Figure 5 Reset on power on After this delay the RESET line is reset high and the FPGA configuration can start When the supply rail voltage drops below the threshold voltage the RESET line becomes active low again and stays active low as long as the rail voltage remains below the threshold voltage 2 93 volt Once the rail voltage raises again and remains over the threshold voltage for more than the typical delay time ty of 200 ms the RESET line returns to the inactive state high to allow a new system start up 2 3 FPGA User I Os 8 39 TEO630 provides user I O signals connected to B2B connectors J4 and J5 There are 3 types of user I O signals e Single ended e Differential pairs each pair is configurable as 2 single ended digital I Os e Differential pairs which can be used as clock inputs each pair can be used as usual differential pair or 2 single ended digital I Os Table 2 show user I O count for J4 and J5 Differential 18 Table 2 User I O count by connector Table 3 sho
34. ou assume all costs thereof 9 3 Copyright Notice 31 39 No part of this manual may be reproduced in any form or by any means including electronic storage and retrieval or translation into a foreign language without prior agreement and written consent from Trenz Electronic www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 9 Legal Notices UM TE0630 v 0 21 3 July 2013 9 4 Technology Licenses The hardware firmware software described in this document are furnished under a license and may be used modified copied only in accordance with the terms of such license 32 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 10 Environmental Protection UM TE0630 v 0 21 3 July 2013 10 Environmental Protection To confront directly with the responsibility toward the environment the global community and eventually also oneself Such a resolution should be integral part not only of everybody s life Also enterprises shall be conscious of their social responsibility and contribute to the preservation of our common living space That is why Trenz Electronic invests in the protection of our Environment 10 1 REACH Registration Evaluation Authorisation and Restriction of Chemicals Compliance Statement Trenz Electronic is a manufacturer and a distributor of electronic products It is therefore a so called downstream user in the sense of REACH The products we supply to you are solely non ch
35. power supply source or by USB cable Run Xilinx IMPACT Select Boundary Scan mode After initialization IMPACT window should look like ISE iMPACT 0 61xd Boundary Scan Edit View Operations Output Debug Window Help H pal Boundary Scan E SystemACE Create PROM File PROM File Format WebTalk Data Available Operations are E Get Device ID mo Get Device Signature Usercode de n tify Suc C e e de d Read Device Status a BATCH CMD setPreference pref SspiByteSwap AUTO CORRECTION BATCH CMD setPreference pref AutoInfer TRUE ff BATCH CMD setPreference pref SvfPlayDisplayComments FALSE 4 om Configuration Platform Cable USB 6 MHz usb hs Right click on FPGA image and select Add SPI BPI Flash from menu 35 39 www trenz electronic de TEO630 Spartan 6 FPGA Industrial Micromodule Appendix A Indirect SPI Programming using iMPACT UM TE0630 v 0 21 3 July 2013 18 ISE IMPACT 0 61xd Boun ie File Edit View Operations Output Debug Window Help H pal Boundary Scan SystemACE Create PROM File PROM File Format i E WebTalk Data U Get Device ID Get Device Signature Usercode Add SPI BPI Flash Assign New Configuration File Set Programming Properties Available Operations are Set Erase Properties Get Device ID nn Get Device Signature Usercode Launch File Assignment Wizard m Read Device
36. re 9 shows the definition of stacking height featured by the combination of the TE0630 receptacle with its corresponding header Receptacle Header Figure 9 B2B stacking The stacking height of the TEO630 B2B connectors is 7 seven mm The stacking height does not include the solder paste thickness 2 5 USB Connector The module uses a mini USB B type receptacle connector 10 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 2 Detailed Description UM TE0630 v 0 21 3 July 2013 Figure 10 Mini USB connector 2 6 JTAG connector The offset holes of header J2 allow a removable press fit of standard 0 100 inch header pins to connect flying leads without any soldering necessary JTAG signals are available on the dedicated header J2 through a JTAG programmer with flying leads as described in Table 6 Vref 2 5 V Table 6 JTAG header J2 pin out 2 7 Serial EEPROM TE0630 is equipped with a Micron Technology 24LC128 128 K I C CMOS Serial EEPROM U1 It is used for EZ USB FX2 firmware vendor ID and device ID storage EEPROM is accessible through the EZ USB FX2 microcontroller 2 8 SPI Flash TEO630 is equipped with a Winbond W25Q64BV 64 Mb 8 MB serial flash memory chip U14 This serial flash chip can operate as general SPI memory mode and in double or quad modes Usage of dual and quad modes increase bandwidth up to 40 MB s For more information see Winbond W25Q64BV product owerview 11
37. w user I O divided by VCCIO supply voltage fetes elt 3 3V Total Differential Total 45 65 110 Table 3 User I O count by VCCIO www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 2 Detailed Description UM TE0630 v 0 21 3 July 2013 2 4 Board to board Connectors The module has two B2B board to board receptacle connectors J4 and J5 for a total of 160 contacts Figure 6 shows B2B connectors location on board USB connector is located on the top side and is shown to define module position Figure 6 B2B connectors location TEO630 uses high density shockproof connectors shown in Figure 7 Connector part numbers are listed in Table 4 Figure 7 Module connector Supplier Header H11113CT ND Digikey H11113TR ND H11113DKR ND Hirose DF17 3 0 80DS 0 5V 57 Trenz Electronic 22684 Table 4 Module connectors part numbers The on board receptacles mate with their corresponding headers on the carrier board shown in Figure 8 Ordering numbers of mating connectors are listed in Table 5 9 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 2 Detailed Description UM TE0630 v 0 21 3 July 2013 Figure 8 Mating carrier board connector Supplier Header H11148DKR ND Digikey H11148TR ND H11148CT ND Hirose DF17 4 0 80DP 0 5V 57 Trenz Electronic 22938 Table 5 Carrier board headers part numbers Figu
38. x UG380 Spartan 6 FPGA Configuration User Guide http www xilinx com support documentation user_guides ug380 pdf Xilinx UG381 Spartan 6 FPGA SelectlO Resources http www xilinx com support documentation user_guides ug381 pdf 8 Glossary of Abbreviations and Acronyms A WARNING notice denotes a hazard It calls attention to an operating procedure practice or the like that if not correctly performed or adhered to could result in damage to the product or loss of important data Do not proceed beyond a WARNING notice until the indicated conditions are fully understood and met 6 Difference in signal lines length is negligible for used signal frequency 30 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 8 Glossary of Abbreviations and Acronyms API B2B DSP EDK IOB ISP PB SDK TE XPS A CAUTION notice denotes a risk It calls attention to an operating procedure practice or the like that if not correctly performed or adhered to could result in a fault undesired condition that can lead to an error Do not proceed beyond a CAUTION notice until the indicated conditions are fully understood and met application programming interface board to board digital signal processing digital signal processor Embedded Development Kit input output blocks I O blocks intellectual property In System Programmability push button Software Development Kit Trenz Electronic Xilinx Platform Stu
39. zuschlie en g Zurich f nj Abbrechen 23 39 www trenz electronic de TE0630 Spartan 6 FPGA Industrial Micromodule 5 USB Drivers Installation Ger te Manager Datei Aktion Ansicht 7 aaa Prozessoren Set Speichervolumes Systemger te Tastaturen eS USB Controller gt Ca 200 und y press Generic USB Device Intell Intell Intell Intell USB Root Hub USB Root Hub USB Root Hub USB Root Hub USB Root Hub USB Root Hub USB Root Hub ICHS Family USB Universal Host Controller ICHS Family USB Universal Host Controller ICHS Family USB Universal Host Controller RJ R Intel R ICHS Family USB Universal Host Controller R R ICHS Family USB Universal Host Controller Intel R ICHS Family USB2 Enhanced Host Controller 2836 InteR ICHE Family USB2 Enhanced Host Controller 2834 2030 2031 aude 2034 2039 UM TE0630 v 0 21 3 July 2013 After that I C EEPROM should be programmed with right Vendor ID Device ID see chapter 4 5 EZ USB FX2 EEPROM Programming 5 2 Dedicated Driver This driver used to work with modules which have DEWESoft firmware and Vendor ID Device ID programmed All TE0630 modules supplied with programmed USB controller and corresponding Vendor ID Device ID in 24 39 EEPROM Before connect USB cable check that Switch 1 S1A is on ON state USB controller connected to EEPROM Connect USB cable and wait until the operating
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