User Manual CompactPCI Backplanes
Contents
1. 23098 105 X8 FAL Fz X8 X14 E 5 z ENT X18 X2 DEG X2 5 IPMB x19 O IPMB 28 Ew eo X2 e e G 000 es 85 x24 n ss GA2 o o Ed GA2 ee PE A o o fam e 128 7 5 8 ER GAO 22 0010 j e e D sa X6 o o B xe 5 e Da 2e ee S e e 9 z Os a 53 NG X5 lo 75 5 G gt O 23098 115 114244 z X8 DEG X2 xt19X19 of 41235235 F o X7 9 6 9 o X24 ay A 2GA2 2 2GA1 la 2GA0 Ol x6 O e O O O z O 23 65 o X9 3 14 40 64 Sno lt 80 28 i CompactPCl Manual Available Backplanes and Accessories CompactPCl Backplanes 3U 32 bit System Slot left Article Number CompactPCl Backplanes 3U 64 bit System Slot left Article Number CompactPCl Backplanes 6U 64 bit System Slot left Article Number CompactPCI Backplanes 3U 32 bit System Slot right Article Number CompactPCI Backplanes 3U 32 bit System Slot right Article Number CompactPCI Backplanes 3U 64 bit System Slot right Article Number Page 18 of 25 23006 811 23006 811 23006 733 23006 734 23006 736 23006 738 23006 765 23006 768 23006 811 23006 812 23006 813 23006 814 23006 815 23006 816 23006 817 23006 818 23006 822. User Manual CompactPCl Backplanes RAR an amp iw Lg 9 10 oO oO O O 500000000 A 73972 101 Rev 000 Pentair Enclosures CompactPCl Manual Page 1 of 25 Overview What is Zana The latest specification for PCl based industrial computers is called CompactPCI It is electrically a superset of desktop PCI with a different physical form factor CompactPCI utilizes the Eurocard form factor popularized by the VME bus Defined for both 3U 100mm by 160 mm and 6U 160mm by 233 mm card sizes CompactPCI has the following features Standard Eurocard dimensions compliant with IEEE 1101 1 mechanical standards High density 2mm Pin and Socket connectors IEC approved and Bellcore qualified Vertical card orientation for effective cooling Easy card retention Excellent shock and vibration characteristics Metal front panel User I O connections on front or rear of module Standard chassis available from many suppliers Uses standard PCI silicon manufactured in large volumes Staged power pins for Hot Swap capability Eight slots in basic configuration Easily expanded with Bridge Chips What is PICMG PICMG PCI Industrial Computer Manufacturers Group is a consortium of over 600 companies who collaboratively develop open specifications for high performance telecommunications and industrial computing appl
3. GND 12V 12V fit with every 6 3mm Faston available from different 5V 3 3 manufacturers GND GND Molex 43045 0418 Molex 43025 0400 Molex 43030 0007 Molex 43045 0418 free connector Molex 43025 0400 crimp contact Molex 43030 0007 AWG 20 24 tin plated Bag CompactPCl Manual 3 3V 4 GND 5 6 57 7 GND 9 GND Page 11 of 25 Special CPCI Backplanes Schroff CompactPCI Backplanes for Special Applications I O Board 1 Slot backplane 3U for upper position in a 6U environment Backplane includes connectors P4 and P5 with long pins and shrouds Used if 3U backplane should be installed with 6U Boards The I O Board connects P4 and P5 from front to rear I O board Order Code 23090 719 cPCI Backplane for 1U Vertical System ATX Schroff has designed a special backplane that fit into a 1U system with vertical card cage This backplane combines the 6U 2222222 2922800 cPCI backplane 64 bit cPCI HEBE HENE bus with 2 slot and Molex 2900000 2920000 connectors for power supply 2900080 2920088 ATX and fans HEB Lo Features BESE System slot left Placement of power SEES SESI connectors underneath the HER ARR P1 connector row to reduce 2222282 3288888 voltage drop to a minimum HHHP HE Connectors for IPMB on DRE Power bugs to connect VI O REEE HOUR to 5V or 3 3V Ht 7 Order
4. 6U Thickness Page 24 of 25 Backplanes Bridges 0 85 C 40 C 85 C on request 40 C 85 C 55 C 125 C on request 55 C 105 C 55 C 155 C on request max 95 not condensing 45 70 C Conformal Coating on request UL 94 V 0 fire proof IEC 61076 4 101 HardMetric 2mm Grid level 2 level 1 on request gt 250 cycles gt 500 cycles on request lt 0 75 N Pin 10Hz 500Hz 5Hz 2000Hz on request 5g rms 20g rms on request 10g 6ms no restrictions 10 Layer Stripline 20 32mm x Slots 1mm 50mm 128 mm 262 05mm 100mm 64 bit 60mm 32 bit 3 2mm 0 2mm 10mm Schrott Technical Data Electrical Parameters Specifications PICMG 2 0 R3 0 CPCI Core Specification PICMG 2 1 CPCI Hot Swap Specification PICMG 2 6 Bridging Specification PICMG 2 9 System Management Bus Spec PICMG 2 10 Keying Specification Service Life MTBF acc to MIL HDBK 217F cond 25 C ground benign 6U 8 Slot more than 600 000h Characteristic Impedance PCI traces 65 Q 10 Clock traces 65 10 Clock trace length 160 1 0mm acc to 66MHZ spec for all backplanes Ohmic Resistance of Signal Tracks PCI traces lt 95mQ Slot Hot Swap supported Termination only 8 Slot Backplanes Schottky diodes on request plugable termination board Power input Power bugs for wiring or special Adapter Board to use an ATX cable this board can act as a power distribution sta
5. short tail connectors with 4 5 mm tails 9 BRSVPxxx signals accommodate PCI reserved signals Bus segments shall bus these signals between connectors Usage of JTAG signals is discouraged These signal definitions will be redefined in a future revision of the CompactPCI specification Backplanes shall bus pins A2 TCK C2 TMS and C1 TRST to all CompactPCI Slots Pins D2 TDO and E2 TDI should be non bussed System slot connector P2 pins C19 SMBB_SDA D19 SMBB_SCL and E19 SMB_RSV have been defined by the System Management Subcommittee as the appropriate rear panel I O pins to be used for a secondary I C bus local to the system board Refer to the PICMG 2 9 System Management Specification for further information Signals IDSEL and BD_SEL are connected to GND on the System Slot The Dual Host Subcommittee may further define their use on the system slot 13 P1 Bd is reserved for HEALTHY Backplane must leave this pin open and include a bypass capacitor refer to section 3 2 10 and the CompactPCI Hot Swap Specification PICMG 2 1 for details 1 1 N Utility Sense IPMB Connectors Utility SENSE Connector Pinout A B A B Sense Voltage rails 5V 3 3V 12V and GND of these connectors used 6 OO 6 nc nc for sense purposes They should be connected to the backplane 12V Some Power Supplies need at least a connection to GND otherwise the 4 O O 4 12V 3 3V t ts overrun
6. 3 OO 3 GND 5V i gt o o 2 FAL DEG FAL Signal driven by intelligent PSU s at least one output has failed is 1 ne PRST out of range DEG Signal driven by intelligent PSU s PSU indicates that the supply is beginning to derate its power output Cable assy 23204 115 850mm Signal 23204 116 600mm es IPMB Connector Top view on connector SDA Vsm Power can be connected to 5V by using zero Ohm resistor of size Vsm 0603 R100 nc Cable assy 23204 113 750mm Page 8 of 25 CompactPCl Manual Layout Mechanical and Electrical Interface Schroff CPCI Backplane Rear view system slot right Utility 3 3V VI O 5V GND 3 3V 5V GND D OHOOO Bridge ee R100 O0 3U 6U 128 7 262 05 m 1 1 NOOO OO CO OOOO OOO OOOO OO OOOO OO OOO OOO NOOO OOOO JOO O OOOO OOO OO OOO OO OOO OOOO 0 00 0 0000 0000 000 00 00 000 000 00 00 0000 OOO OOOO Oty OOO OOOO OOO OO OOOO OOOO OOOO QQQ QQQQ OOOO CIC ICE ECC AC IC EC CIC NOOO OOOO J OOO OOOO OOO OO OOOO OOOO OOOO NOOO OOOO OO Ol OOOO OOO OO OOOO OOOO OOOO OOOOOG AO OOO 30 00 0e am am P1 of slots x 20 32 1 Slot 1P1 2P1 3P1 4P1 5P1 6P1 7P1 gp1 lt logical KA TA a la lo a physical Oea 3 3V 5V S Power Bug Voltage 12V GND 12V 3 3V 5V GND 3 3V 5V Annotation nB Board Select resisto
7. BP I O BP I O BP I O GND 6 GND BP I O BP I O BP I O BP I O BP I O GND 5 GND BP I O BP I O BP I O BP I O BP I O GND 4 GND BP I O BP I O BP I O BP I O BP I O GND 3 GND BP I O BP I O BP I O BP I O BP I O GND 2 GND BP I O BP I O BP I O BP I O BP I O GND 1 GND BP I O BP I O BP I O BP I O BP I O GND 25 GND 5V REQ64 ENUM 3 3V 5V GND 24 GND AD 1 5V v o AD 0 ACK64 GND 23 GND 3 3V AD 4 AD 3 5v AD 2 GND 22 GND AD 7 GND 3 3V AD 6 AD 5 GND 21 GND 3 3V AD 9 AD 8 M66EN C BE 0 GND 20 GND AD 12 GND V 1 0 AD 11 AD 10 GND 19 GND 3 3V AD 15 AD 14 GND AD 13 GND 18 GND SERR GND 3 3V PAR C BE 1 GND 17 GND 3 3V IPMB_SCL IPMB_SDA GND PERR GND 16 GND DEVSEL GND PCIXCAP V o STOP LOCK GND 15 GND 3 3V FRAME IRDY BD_SEL TRDY GND 14 KEY AREA 13 KEY AREA 12 KEY AREA 11 GND AD 18 AD 17 AD 16 GND C BE 2 GND 10 GND AD 21 GND 3 3V AD 20 AD 19 GND 9 GND C BE 3 IDSEL AD 23 GND AD 22 GND 8 GND AD 26 GND 7 AD 25 AD 24 GND 7 GND AD 30 AD 29 AD 28 GND AD 27 GND 6 GND REQ GND 3 3V CLK AD 31 GND 5 GND BRSVP1A5 BRSVP1B5 RST GND GNT GND 4 GND IPMB_PWR HEALTHY Vo INTP INTS GND 3 GND INTA INTB INTC INTD GND 2 GND BRSVP1A2 5V BRSVP1C2 Rsv Rsv GND 1 GND 5V 12V BRSVP1C1 12V 5V GND Pin Z A B E F Page 7 of 25 Notes for CompactPCI Pin Assignment Tables 1 through 4 1 These diagrams define the pin assignments from the fro
8. GND AD 11 GND PAR GND STOP GND GND AD 20 GND AD 25 GND CLKO GND INTP 5y Rsv 12V D E GAO BP I O BP I O SMB_ALERT BP I O GNT6 BP I O GNT5 ACK64 AD 2 AD 5 C BE 0 AD 10 AD 13 C BE 1 PERR LOCK TRDY C BE 2 AD 19 AD 22 AD 24 AD 27 AD 31 GNTO INTS INTD Rsv 5V E GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND Table 4 CompactPCI Peripheral Slot 3281 Rear Panel I O Connector Pin Assignments 736 Pin Z A B F 22 GND GA4 GA3 GA2 GA1 GAO GND 21 GND BP I O BP I O BP I O BP I O BP I O GND 20 GND BP I O BP I O BP I O BP I O BP I O GND 19 GND BP I O BP I O BP I O BP I O BP I O GND 18 GND BP I O BP I O BP I O BP I O BP I O GND 17 GND BP I O BP I O BP I O BP I O BP I O GND 16 GND BP I O BP I O BP I O BP I O BP I O GND 15 GND BP I O BP I O BP I O BP I O BP I O GND 14 GND BP I O BP I O BP I O BP I O BP I O GND 13 GND BP I O BP I O BP I O BP I O BP I O GND 12 GND BP I O BP I O BP I O BP I O BP I O GND 11 GND BP I O BP I O BP I O BP I O BP I O GND 10 GND BP I O BP I O BP I O BP I O BP I O GND 9 GND BP I O BP I O BP I O BP I O BP I O GND 8 GND BP I O BP I O BP I O BP I O BP I O GND 7 GND BP I O BP I O
9. 867 7 Yes 5V 33 MHz 23006 868 8 Yes 5V 33 MHz CompactPCI Backplanes 6U 64 bit System Slot right Secondary Article Number Slot Count Rear I O V I O Bus frequency 23006 884 4 Yes 5V 33 66 MHz 23006 887 7 Yes 5V 33 MHz CompactPCl Backplanes Special 6U 64 bit System Slot left Article Number Slot Count Rear I O V I O Bus frequency Power input 23006 792 2 Yes 5V 33 66 MHz 1x ATX 23006 794 2 Yes 5V 33 66 MHz 1 x P47 23006 795 4 Yes 5V 33 66 MHz 2 x P47 23006 796 6 Yes 5V 33 MHz 2 x P47 23006 797 8 Yes 5V 33 MHz 2 x P47 1 3 P47 connectors on request 2 3 or 4 P47 connectors on request 3 Backplanes available on request CompactPCl Bridges Article Number Bus width Orientation Bus frequency Description 23006 920 32 bit right to left 33 66 MHz Low profile 23006 922 64 bit right to left 33 66 MHz Low profile Page 19 of 25 CompactPCl Manual Order Code Power Cable Power Piggy Power Backplanes 23204 121 Cable ATX M to Ring Terminals 250mm length 23098 105 Power Backplane 3U 8HP with 1 P47 connector 3098 1 23098 116 Power Backplane 6U 8HP with 1 P47 connector upper position Accessories 23204 110 Cable P47 Input Mains 500mm length 23204 113 Cable IPMB 750mm length 204 114 23204 115 Cable Utility Sense 12 Way 350mm length 23204 116 23204 117 Cable Current Share 14 Way 100mm length 4 134 21101 658 CPCI Conversion Kit 8 yellow Coding keys plus tool to set
10. Code 23006 793 2 Slot 2299888 _ 2222220 2 Minifit connectors X522 front n E 1 7 _ tempfail 8 MIGND 9 _ Signal 1 10 _ Signal 2 INH 1 INH 2 GND Page 12 of 25 111 7 j 1m i CompactPCl Manual e a l efua ala aja Sig1 1 nc 2 GND 3 Signal 1 Sig2 1 nc 2 GND 3 Signal 2 X155 1 5V 2 GND 3 GND 4 12V Special CPCI Backplanes Backplanes with P47 Connectors for 1 to 4U Vertical Systems Schroff has designed special cPCI backplanes that fit into 1 to 4U systems with vertical card cage These backplanes combine the 6U backplane 64 bit cPCI bus 2 to 8 slots and the P47 connectors for power supplies Backplanes with 2 and 8 Slots are stock items 4 and 6 slot on request Features System slot left Placement of power connectors underneath the P1 connector row to reduce voltage drop to a minimum Starting from 4 Slot backplane two P47 connectors assembled Redundant and parallel operation of power supplies possible Connectors for IPMB Utility Disk Drive PSU Status fantray temperature sensors and Inhibit on board Power bugs for every voltage present as optional power input or output max 30A per voltage Order Code 23006 794 2 Slot 1 P47 connector 23006 795 4 Slot 2 P47 connectors 23006 796 6 Slot 2 P47 connectors 3 connectors on request
11. Connector Pin Assignment Pin 22 21 20 19 18 17 16 15 14 13 12 11 IN Q QO Pin Page 4 of 25 Z GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND A GA4 CLK6 CLK5 GND BRSVP2A18 BRSVP2A17 BRSVP2A16 BRSVP2A15 AD 35 AD 38 AD 42 AD 45 AD 49 AD 52 AD 56 AD 59 AD 63 C BE 5 V O CLK4 CLK2 CLK1 5V AD 1 3 3V AD 7 3 3V AD 12 3 3V SERR 3 3V DEVSEL 3 3V AD 18 AD 21 C BE 3 AD 26 AD 30 REQO BRSVP1A5 IPMB_PWR INTA BRSVP1A2 5V A B GA3 GND GND GND BRSVP2B18 GND BRSVP2B16 GND AD 34 GND AD 41 GND AD 48 GND AD 55 GND AD 62 GND BRSVP2B4 GND CLK3 GND REQ64 5V AD 4 GND AD 9 GND AD 15 GND IPMB_SCL GND PCIXCAP FRAME AD 17 GND GND GND AD 29 GND BRSVP1B5 HEALTHY INTB 5V 12V B GA2 RSV RSV SMB_SDA BRSVP2C18 PRST DEG FAL AD 33 V O AD 40 2 AD 47 V O AD 54 V o AD 61 V I o C BE 7 GNT3 SYSEN REQ1 ENUM VIO AD 3 3 3V AD 8 V O AD 14 3 3V IPMB_SDA V O IRDY KEY AREA KEY AREA KEY AREA AD 16 3 3V AD 23 V o AD 28 3 3V RST vO INTC BRSVP1C2 BRSVP1C1 GAT RSV GND SMB_SCL GND REQ6 GND REQ5 GND AD 37 GND AD 44 G
12. GND Reserved V4 Return GND Geographic Address Bit 0 Reserved Enable set to GND Geographic Address Bit 1 V1 Adjust V1 Remote Sense Geographic Address Bit 2 V2 Adjust V2 Remote Sense Sense Return V1 Current Share V3 Remote Sense System Management Bus Degrade Signal Inhibit System Management Bus V2 Current Share Fail Signal System Management Bus V3 Current Share Chassis Ground safety ground AC Input Neutral DC Input IN AC Input Line DC Input Remote Connector X25 top view on connector Pin OU NOU Signal INH GND 5V Sense 3 3V Sense Sense Return GND cable 750mm 23204 114 free connector Tyco 643814 5 CompactPCl Manual Start up of the Board Power Backplanes The cable tie of the power mains has to be opened and the crimp contacts have to be pushed into the dedicated connector chambers of X1 Corresponding cable colours brown L line blue N neutral green yellow PE protective earth Cable length 500mm other end can be fitted with Faston crimp contacts included in delivery Power Backplanes view from rear X1 is assembled from front 23098 116 117 FAL X14 X18 DEG X19 X23 X4 FAL X114 X118 DEG X119 X123 10 16 lt Page 17 of 25 EREE j Ga a oN a ur d O D ail VS ww ce Ld
13. GND AD 52 GND V o AD 51 AD 50 GND 8 GND AD 56 AD 55 AD 54 GND AD 53 GND 7 GND AD 59 GND V O AD 58 AD 57 GND 6 GND AD 63 AD 62 AD 61 GND AD 60 GND 5 GND C BE 5 GND vo C BE 4 PAR64 GND 4 GND v o BRSVP2B4 C BE 7 GND C BE 6 GND 3 3 GND RSV GND RSV RSV RSV GND 2 3 GND RSV RSV UNC RSV RSV GND 1 3 GND RSV GND RSV RSV RSV GND 25 GND 5V REQ64 ENUM 3 3V 5V GND 24 GND AD 1 5V vo AD 0 ACK64 GND 23 GND 3 3V AD 4 AD 3 5v AD 2 GND 22 GND AD 7 GND 3 3V AD 6 AD 5 GND 21 GND 3 3V AD 9 AD 8 M66EN C BE 0 GND 20 GND AD 12 GND V 1 0 AD 11 AD 10 GND 19 GND 3 3V AD 15 AD 14 GND AD 13 GND 18 GND SERR GND 3 3V PAR C BE 1 GND 17 GND 3 3V IPMB_SCL IPMB_SDA GND PERR GND 16 GND DEVSEL GND PCIXCAP V o STOP LOCK GND 15 GND 3 3V FRAME IRDY BD_SEL TRDY GND 14 KEY AREA 13 KEY AREA 12 KEY AREA 11 GND AD 18 AD 17 AD 16 GND C BE 2 GND 10 GND AD 21 GND 3 3V AD 20 AD 19 GND 9 GND C BE 3 IDSEL AD 23 GND AD 22 GND 8 GND AD 26 GND 7 AD 25 AD 24 GND 7 GND AD 30 AD 29 AD 28 GND AD 27 GND 6 GND REQ GND 3 3V CLK AD 31 GND 5 GND BRSVP1A5 BRSVP1B5 RST GND GNT GND 4 GND IPMB_PWR HEALTHY Vo INTP INTS GND 3 GND INTA INTB INTC INTD GND 2 GND BRSVP1A2 5V BRSVP1C2 Rsv Rsv GND 1 GND 5V 12V BRSVP1C1 12V 5V GND Pin Z A B E F Page 5 of 25 CompactPCI Manual Connector Pinouts Table 3 CompactPCl System Slot 32 Bit R
14. MHZ 33 MHZ 33 MHz or mixed 33 MHZ 33 MHz 33 MHz or mixed 33 MHz or mixed 33 MHz 33 MHz Articles needed 23006 864 23006 884 23006 922 23006 865 23006 884 23006 922 23006 866 23006 884 23006 922 23006 867 23006 884 23006 922 23006 864 23006 887 23006 922 23006 865 23006 887 23006 922 23006 866 23006 887 23006 922 23006 867 23006 887 23006 922 23006 865 23006 887 23006 884 2x 23006 922 23006 866 23006 887 23006 884 2x 23006 922 23006 867 23006 887 23006 884 2x 23006 922 23006 864 2x 23006 887 2x 23006 922 23006 865 2x 23006 887 2x 23006 922 23006 866 2x 23006 887 2x 23006 922 23006 867 2x 23006 887 2x 23006 922 1 If the backplane is used as tertiary backplane the geographical address has to be changed Please refer to chapter Schroff CPCI Backplanes Geographical addressing Page 23 of 25 CompactPCl Manual Technical Data Mechanical and Climatic Parameters Operating Temperature Storage Temperature Humidity Flammability PCB Connectors Ceramic caps Connectors Performance level per IEC 61076 4 101 Mechanical Durability Mating Cycles Total Insertion and Extraction Force mating Vibration acc DIN 41640 Part 15 Shock 10 pulses each direction x y z Low Pressure Altitude max Board voltage per single isolation gap doesn t exceed 12V Construction Dimensions mm Width pl see Dwg Height
15. VI O to 3 3V Page 20 of 25 CompactPCl Manual CPCI Rear Brick Bridge 64Bit right to left 100 5 2 a a o bid QO a 2 a e N N o eo N Ls gt lt lt 10 lpart 23006 922 CPCI Rear Brick Bridge 32Bit right to left Schroff 2 lt gt lt 50 gt lt lt 10 ee part 23006 920 Page 21 of 25 Bridge Applications CompactPCI Bridge CompactPCI has been designed to accommodate up to 8 modules on a bus segment Installing a bridge module on a bus segment consumes one of the loads on the segment but creates a new bus segment with up to 7 additional modules The bridge module handles all communication between the bus segments With the rear palette bridges from Schroff no valuable front slot is wasted Due to the very low height of 10mm even no rear I O slot is wasted Schroff offers a 32 bit and a 64 bit rear palette bridge both for system slot right backplanes Both are based on the Intel 21154 PCl to PCI bridge Chip The maximum power consumption of this bridge module is 0 75W at 5V and 2 2 W at 3 3V GND and the power supplies 5V 3 3V 12V are connected from the primary PCI bus to the secondary PCI bus may be 3 3V or 5V on either side of the bridge The bridge will automatically detect the bus voltage and adjust its I O
16. with 2 P47 the 6U power backplane with 1 or 2 P47 connectors Order Code 23098 105 1 PSU Slot 8HP 3U Board connector for 1 PSU 23098 115 2PSU Slots 16HP 3U Board connectors for 2 PSU s 23098 116 1 PSU Slot 6U Board 8HP 1 PSU connector for one 6U PSU 23098 117 1 PSU Slot 6U Board 8HP 2 PSU connectors for two 3U PSU s Sense Option Sensing can be accomplished by three different options using the Utility Sense connector all voltages are sensed X7 8 using the Inhibit Sense connector the main voltages 5V 3 3V GND can be connected to backplanes not assembled with the Utility connector by easy wiring X25 only GND Sense is connected to GND at the Power Board for minimum requirements of some PSU S Jumper X24 GND Sense Jumper X24 Some PSUs may require at least that sense return GND Sense is connected to GND to avoid output voltages out of range For easy implementation X24 can be shorted to connect GND Sense to GND of the power board A B Utility SENSE Connector Pinout X7 X8 6 o o 6 A rya Sense pins referred to voltages 5V 3 3V 12V and GND of these 5 o o B nc 12V connector are used for sense purposes They should be connected to the 4 00 4 12V 3 3V backplane The 12V pin is connected to the 12V power rail 8 00 Some power supplies need at least a connection between GND Sense i 7 xara and GND otherwise the outputs overrun FAL Signal driven by intellig
17. 23006 797 8 Slot 2 P47 connectors 3 or 4 connectors on request Status 1 E SOX anfail 2 Em C enpf a 5 6 E 7 u 9g 1085 11 E2 12 lt PSU1_DEG lt PSU2_DEG lt PSU3_DEG lt lt PSU4_DEG lt PSU1_FAL lt PSU2_F AL li lt PSU3_FAL lt PSU4_F ALE Special CPCI Backplanes CompactPCl Manual 0000000000000000000000000000000000 0000000000000000000000000000000000000000 essee A 161 54 co L6 oD O FON VIO GND GND 12V 12V Page 13 of 25 CompactPCl Manual Page 14 of 25 x 51 4 Power Concept Modular Power Concept Power Bugs Schroff cPCI backplanes are populated with specially designed power bugs The power cables can be connected to the power bugs with cable lugs fastened with M4 screws Each power bug can handle 30 Amps Schroff has designed various cables and power boards to be assigned to these power bugs They provide interfaces for many different PSU types ATX Cable Assembled on the power bugs of the CompactPCI backplanes the ATX cable provides the mating connector for an ATX power supply Order Code 23204 121 ATX M to Ring Term 250mm ATX Piggy Back The Power Piggyback board can be used if ATX PSU s shall be connected to a Backplane In this case the signal INH at connector X15 shall be jumpered to GND that the ATX PSU power up Connector X15 is j
18. 4 23006 827 23006 811 23006 833 23006 834 23006 835 23006 836 23006 837 23006 838 Slot Count 1 Slot Count 1 Qo O Aa O Slot Count 5 8 Slot Count 1 CO N O oO A O M N Slot Count 4 Yi Slot Count 1 o N A O Rear I O yes Rear I O yes no no no no Rear I O yes yes Rear I O yes yes yes yes yes yes yes yes Rear I O yes yes Rear I O yes no no no no no no I O 5V V 5V 5V 5V 5V 5V V I O 5V 5V V 5V 5V 5V 5V 5V 5V 5V 5V Secondary V I O 5V 5V V I O 5V 5V 5V 5V 5V 5V 5V Order Code Bus frequency 33 66 MHz Bus frequency 33 66 MHz 33 66 MHz 33 66 MHz 33 MHz 33MHz Bus frequency 33 66 MHz 33 MHz Bus frequency 33 66 MHz 33 66 MHz 33 66 MHz 33 66 MHZ 33 66 MHz 33 MHz 33 MHz 33 MHz Bus frequency 33 66 MHz 33 MHz Bus frequency 33 66 MHz 33 66 MHz 33 66 MHz 33 66 MHz 33 MHz 33 MHz 33MHz CompactPCI Backplanes 3U 64 bit System Slot right Secondary Article Number Slot Count Rear I O VIVO Bus frequency 23006 854 4 no 5V 33 66 MHz 23006 857 7 no 5V 33 MHz CompactPCI Backplanes 6U 64 bit System Slot right Article Number Slot Count Rear I O V I O Bus frequency 23006 862 2 Yes 5V 33 66 MHz 23006 863 3 Yes 5V 33 66 MHz 23006 864 4 Yes 5V 33 66 MHz 23006 865 5 Yes 5V 33 66 MHz 23006 866 6 Yes 5V 33 MHz 23006
19. 920 23006 814 23006 827 23006 920 23006 815 23006 827 23006 920 23006 816 23006 827 23006 920 23006 817 23006 827 23006 920 23006 814 23006 827 23006 824 2x 23006 920 23006 815 23006 827 23006 824 2x 23006 920 23006 816 23006 827 23006 824 2x 23006 920 23006 817 23006 827 23006 824 2x 23006 920 23006 814 2x 23006 827 2x 23006 920 23006 815 2x 23006 827 2x 23006 920 23006 816 2x 23006 827 2x 23006 920 23006 817 2x 23006 827 2x 23006 920 1 If the backplane is used as tertiary backplane the geographical address has to be changed Please refer to chapter Schroff CPCI Backplanes Geographical addressing Page 22 of 25 CompactPCl Manual 3U 64 bit Systemslot right Number of Slots 8 9 10 11 11 12 12 13 13 14 15 15 16 16 17 18 18 19 20 21 Configuration 4 4 Slot 5 4 Slot 6 4 Slot 7 4 Slot 4 7 Slot 5 7 Slot 4 4 4 Slot 6 7 Slot 5 4 4 Slot 7 7 Slot 7 4 4 Slot 4 4 7 Slot 5 7 4 Slot 5 4 7 Slot 6 7 4 Slot 7 7 4 Slot 4 7 7 Slot 5 7 7 Slot 6 7 7 Slot 7 7 7 Slot Bus frequency 33 66 MHz or mixed 33 66 MHz or mixed 33 MHz 33 MHz 33 MHz or mixed 33 MHz or mixed 33 66 MHz or mixed 33 MHz 33 66 MHz or mixed 33 MHz 33 MHz 33 MHz or mixed 33 MHz or mixed 33 MHz or mixed 33 MHz 33 MHz 33 MHz or mixed 33 MHz or mixed 33 MHz 33 MHz Bridge Applicat
20. ND AD 51 GND AD 58 GND C BE 4 GND REQ4 GNT2 GNT1 3 3V AD 0 5y AD 6 M66EN AD 11 GND PAR GND STOP GND GND AD 20 GND AD 25 GND CLKO GND INTP 5y Rsv 12V D Connector Pinouts E GAO RSV RSV SMB_ALERT BRSVP2E18 GNT6 BRSVP2E16 GNT5 AD 32 AD 36 AD 39 AD 43 AD 46 AD 50 AD 53 AD 57 AD 60 PAR64 C BE 6 GNT4 REQ3 REQ2 5V ACK64 AD 2 AD 5 C BE 0 AD 10 AD 13 C BE 1 PERR LOCK TRDY C BE 2 AD 19 AD 22 AD 24 AD 27 AD 31 GNTO INTS INTD RSVI 5V E GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND CompactPCI Manual Connector Pinouts Table 2 CompactPCI Peripheral Slot 64 Bit Connector Pin Assignment 1 1 Pin Z A B E F 22 GND GA4 GA3 GA2 GA1 GAO GND 21 GND RSV RSV RSV RSV RSV GND 20 GND RSV RSV RSV GND RSV GND 19 GND RSV RSV RSV RSV RSV GND 18 GND BRSVP2A18 BRSVP2B18 BRSVP2C18 GND BRSVP2E18 GND 17 GND BRSVP2A17 GND RSV RSV RSV GND 16 GND BRSVP2A16 BRSVP2B16 RSV GND BRSVP2E16 GND 15 GND BRSVP2A15 GND RSV RSV RSV GND 14 GND AD 35 AD 34 AD 33 GND AD 32 GND 13 GND AD 38 GND V 1 0 AD 37 AD 36 GND 12 GND AD 42 AD 41 AD 40 GND AD 39 GND 11 GND AD 45 GND V 1 0 AD 44 AD 43 GND 10 GND AD 49 AD 48 AD 47 GND AD 46 GND 9
21. ange of geographical addresses can be made Cut copper links in between SMD pads to open apply a zero Ohm resistor to close Package size shall be 0603 Position is labelled nGA x where stands for slot and x for address see chapter Mechanical and Electrical Interface Physical Slot Addresses Physical Slot 0 1 1 2 3 4 5 6 7 8 9 10 GA 4 J2 A22 GND GND GND GND GND GND GND GND GND GND GND GA 3 J2 B22 GND GND GND GND GND GND GND GND _ open open open GA 2 J2 C22 GND GND GND GND open open open open GND GND GND GA 1 J2 D22 GND GND open open GND GND open open GND GND open GA 0 J2 E22 GND open GND open GND open GND open GND open GND Physical Slot 11 12 13 14 15 16 17 18 19 20 21 GA 4 J2 A22 GND GND GND GND GND open open open open open open GA 3 J2 B22 open open open open open GND GND GND GND GND GND GA 2 J2 C22 GND open open open open GND GND GND GND open open GA 1 J2 D22 open GND GND open open GND GND open open GND GND GA 0 J2 E22 open GND open GND open GND open GND open GND open 66MHz Operation Schroff cPCI backplanes are designed in accordance with the requirements of Core Specification Revision 3 0 PICMG 2 0 R3 0 Up to 5 Slots 66MHz operation is possible signal M66 is HIGH open Backplanes of higher slot count also fulfil the 66MHz operation requirements in terms of clock trace length and skew but M66 is tied to GND to disable 66MHz operation by default This lin
22. cations Secondary CPCI Backplane PCI Bus 32 64Bit AD nn Arbitration 7 Pairs REQn GNTn PCI Clock 7x CLKn CPCI Signals C BE n DEVSEL FRAME IDSEL IRDY LOCK M66EN PAR REQ64 ACK64 RST STOP TRDY Interrupts X A D INTX Bussed Reserved Signals BRSVP1A5 BRSVP1B5 IPMB SDA SCL PWR legacy Interrupts INTS INTP JTAG Signals TRST TCK TMS TDO TDI zero Ohm bridges assembled by default and can be removed omitted optionally 7407 0 Ohm 0 Ohm 0 Ohm 0 Ohm Possible Bridge Configurations 3U 32 bit Systemslot right Number of Slots 8 9 10 11 11 12 13 14 15 16 17 18 18 19 20 21 Configuration 4 4 Slot 5 4 Slot 6 4 Slot 7 4 Slot 4 7 Slot 5 7 Slot 6 7 Slot 7 7 Slot 4 7 4 Slot 5 7 4 Slot 6 7 4 Slot 7 7 4 Slot 4 7 7 Slot 5 7 7 Slot 6 7 7 Slot 7 7 7 Slot Bus frequency 33 66 MHZ or mixed 33 66 MHz or mixed 33 MHZ 33 MHZ 33 MHZ or mixed 33 MHZ or mixed 33 MHz 33 MHz 33 MHz or mixed 33 MHz or mixed 33 MHz 33 MHz 33 MHz or mixed 33 MHz or mixed 33 MHz 33 MHz Interrupts X A D INTX Bussed Reserved Signals BRSVP1A5 BRSVP1B5 IPMB SDA SCL PWR legacy Interrupts INTS INTP JTAG Signals TRST TCK TMS TDO TDI Articles needed 23006 814 23006 824 23006 920 23006 815 23006 824 23006 920 23006 816 23006 824 23006 920 23006 817 23006 824 23006
23. e connector Molex 15 24 3053 IDC AWG 16 Page 16 of 25 FAL 1 FAL 2 FAL 3 FAL 4 DEG 1 DEG 2 DEG 3 DEG 4 O OF lt O MN GND nc nc k wo pinout top view on connector 750mm free connector crimp contact 23204 Molex 51021 0500 Molex 50079 8100 3 3V share 5V share 12V share free connector Molex 39 01 2205 crimp terminal Molex 39 00 0039 CPCI Signal INH uses a pin defined within the both INH PS ON used to drive the PSU Logic Level is reversed to drive PSU on drive PCMG 2 11 PSU s ATX PSU s IPMB Connector X2 top view on connector Signal SCL GND SDA Vsm nc 113 Power Backplanes Pin Assignment Positronic P47 X1 Pin Signal Name RTN RESERVED RTN V4 GAO RESERVED EN GA1 V1ADJ V1 SENSE GA2 V2ADJ V2 SENSE S RTN V1 SHARE V3 SENSE IPMB_SCL DEG INH IPMB_SDA V2 SHARE FAL IPMB_ PWR V3 SHARE CGND ACN DC IN ACL DC Description V1 Output 5V V1 Output 5V V1 Output 5V V1 Output 5V V1 and V2 Return GND V1 and V2 Return GND V1 and V2 Return GND V1 and V2 Return GND V1 and V2 Return GND V1 and V2 Return GND V1 and V2 Return GND V1 and V2 Return GND V2 Output 3 3V V2 Output 3 3V V2 Output 3 3V V2 Output 3 3V V2 Output 3 3V V2 Output 3 3V V3 Return GND V3 Output 12V V4 Output 12V Signal Return
24. ear Panel I O Connector Pin Assignment Pin 22 21 20 19 18 17 16 15 14 13 12 11 _ N WoO QO Pin Page 6 of 25 Z GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND A GA4 CLK6 AD 1 3 3V ADI7 3 3V AD 12 3 3V SERR 3 3V DEVSEL 3 3V AD 18 AD 21 C BE 3 AD 26 AD 30 REQO BRSVP1A5 IPMBPWR INTA BRSVP1A2 5V A B GA3 GND GND GND D O O D O D O D lt O D O D O D O D O D O D O D O D O SE ES M M M M AM s wee Na N SN SN Na N ur Na S Ol Nar j Nar GND O O GND REQ64 5V ADI4 GND AD 9 GND AD 15 GND IPMBSCL GND PCIXCAP FRAME AD 17 GND GND GND AD 29 GND BRSVP1B5 HEALTHY INTB 5V 12V B GA2 BP I O BP I O SMB_SDA BP I O PRST DEG FAL vo AD 3 3 3v AD 8 V 1 0 AD 14 3 3V IPMBSDA V O IRDY KEY AREA KEY AREA KEY AREA AD 16 3 3V AD 23 7 AD 28 3 3V RST v o INTC BRSVP1C2 BRSVP1C1 D GA BP I O BP I O SMB_SCL BP I O REQ6
25. ent PSUs at least one output has failed is out of range DEG Signal driven by intelligent PSUs PSU indicates that the supply is beginning to derate its power output INH Signal to turn the PSU outputs on off open or HIGH on LOW off cable assy 23204 115 850mm cable assy 23204 116 600mm Page 15 of 25 CompactPCl Manual Pin Assignment X9 1 Part type header with or w o housing and latches grid 100mil recommendation for mating connector any IDC connector for ribbon cable of a pitch of 50 mil acc to DIN 41651 2 FAL n DEG _n n is the number of an individual PSU 3 Toset the PSU signal FAL or respectively DEG to an individual line use jumper according the schematic given in Figure 3 Setting individual FAL amp DEG Signal using Jumper array X14 X18 for FAL using Jumper array X19 X23 for DEG Jumper to set individual PSU X14 X18 FAL DEG to FAL _1 DEG _1 and FAL DEG to FAL 2 DEG 2 X19 X23 FAL DEG to FAL _3 DEG _3 FAL DEG to FAL 4 DEG 4 FAL DEG to Utility connector X7 X8 FAL or DEG from PSU ATX Power Connector X3 X4 3 3V A GND a gt 5V AWG 18 24 Bag GND 5V ATX spec as PS ON GND ON OFF FAL INH HIGH n PS ON LOW 12V Disk Drive Power Connector X5 X6 top view on connector 12V O GND GND O 5V board connector Molex 15 24 4049 cable fre
26. ications The members of the consortium have a long history of developing leading edge products for these industries CompactPCI Connector The CompactPCI connector is a shielded 2mm pitch 5 2 row connector compliant to IEC 61076 4 101 Main features of this connector are the pin stagging for hot swap and shielding for EMI RFI protection CompactPCl Manual Page 2 of 25 Schroff CPCI Backplanes Schroff CompactPCI Backplanes Schroff CompactPCI backplanes are fully compliant to the latest PICMG specifications PICMG 2 0 R 3 0 cPCI Core Specification PICMG 2 1 cPCI Hot Swap Specification PICMG 2 6 Bridging Specification PICMG 2 9 System Management Bus Specification PICMG 2 10 Keying Specification Schroff CompactPCI backplanes are specially designed to achieve exellent power distribution best signal integrity virtually zero cross talk and minimum clock skew The SMD components used on Schroff CompactPCI backplanes lead to a much lower failure rate than conventional components Schroff uses ceramic capacitors on the CompactPCI backplanes to gain a better noise reduction at frequencies above 10MHz This feature reduces the radiated and conducted noise caused by the processor and PCI clock signals In addition ceramic capacitors have no limitation in useful lifetime as compared to aluminium capacitors that dry out after 5 to 10 years and are unaware of the hazardous fire risks known from tantalum electrolytics Sch
27. ions Articles needed 23006 834 23006 854 23006 922 23006 835 23006 854 23006 922 23006 836 23006 854 23006 922 23006 837 23006 854 23006 922 23006 834 23006 857 23006 922 23006 835 23006 857 23006 922 23006 834 2x 23006 854 2x 23006 922 23006 836 23006 857 23006 922 23006 835 2x 23006 854 2x 23006 922 23006 837 23006 857 23006 922 23006 837 2x 23006 854 2x 23006 922 23006 834 23006 854 23006 857 2x 23006 922 23006 835 23006 857 23006 854 2x 23006 922 23006 835 23006 854 23006 857 2x 23006 922 23006 836 23006 857 23006 854 2x 23006 922 23006 837 23006 857 23006 854 2x 23006 922 23006 834 2x 23006 857 2x 23006 922 23006 835 2x 23006 857 2x 23006 922 23006 836 2x 23006 857 2x 23006 922 23006 837 2x 23006 857 2x 23006 922 1 If the backplane is used as tertiary backplane the geographical address has to be changed Please refer to chapter Schroff CPCI Backplanes Geographical addressing 6U 64 bit Systemslot right Number of Slots 8 9 10 11 11 12 13 14 16 17 18 18 19 20 21 Configuration 4 4 Slot 5 4 Slot 6 4 Slot 7 4 Slot 4 7 Slot 5 7 Slot 6 7 Slot 7 7 Slot 5 7 4 Slot 6 7 4 Slot 7 7 4 Slot 4 7 7 Slot 5 7 7 Slot 6 7 7 Slot 7 7 7 Slot Bus frequency 33 66 MHz or mixed 33 66 MHz or mixed 33 MHz 33 MHZ 33 MHz or mixed 33 MHZ or mixed 33
28. k is made by a removable copper link For test purposes it can be opened and closed again by using a zero Ohm resistor of size 0603 For position of the link see chapter Mechanical and Electrical Interface o O 00060 Hot Swap Schroff cPCI backplanes fulfill the requirements for Basic Hot Swap of the Hot Swap Specification PICMG 2 1 R2 0 The signal BD_SEL is tied to GND by a removable copper link It can be replaced by a resistor capacitor combination both of package size 0603 Position is labelled nB where n stands for slot see chapter Mechanical and Electrical Interface The P1 connector on Schroff cPCI backplanes has pin stagging needed for hot swap capabilities Termination Termination on backplanes according to PICMG 2 0 R 3 0 is recommended in one case only If on a 8 slot backplane strong buffers are used and only the system and the first adjacent slot are occupied and all others are empty Schroff has implemented a special connector on the 8 Slot cPCI backplanes where a Termination Board can be assembled For slot counts 4 to 7 this connector is used for assembling a cPCI Bridge see chapter Mechanical and Electrical Interface Schroff is offering a 64 bit Termination Board order code 23006 931 Page 3 of 25 CompactPCI Manual Connectors on Schroff CompactPCI Backplanes Pin Assignment CPCI Connectors Table 1 CompactPCl System Slot 64 Bit
29. levels accordingly Power Supply of Backplanes Both backplanes connected by the bridge are to be powered individually The bridge is not to be used for bridging power The bridge does not isolate the power rails of both backplanes GND is connected by a sufficient number of pins in the connector to ensure signal integrity and a common GND potential on both backplanes VI O There is no need to choose the VI O voltage for the bridge The bridge automatically takes the VI O voltage of the primary and secondary side Both backplanes can be set to different VI O voltages e g 5V on the primary side and 3 3V on the secondary side M66MHz Operation The bridge chips are capable of operating at 66MHz The Bridges can operate with 33 MHz or 66MHz on primary and secondary side It s also possible to have the primary side operate at 66 MHz and the secondary at 33 MHz Mechanical Mounting Both backplanes should only be attached to the horizontal rails but not fixed The mounting screws of the backplane are not to be tightened until the bridge is plugged and fully seated CompactPCl Manual Block Wiring Diagram Primary CPCI Backplane PCI Bus 32 64Bit AD nn Arbitration 1 Pair REQn GNTn PCI Clock 1x CLKn CPCI Signals C BE n DEVSEL FRAME IDSEL IRDY LOCK M66EN PAR REQ64 ACK64 RST STOP TRDY PCI to PCI Bridge 32Bit Intel 21150 64Bit Hint 123 compatible to Intel 21154 Bridge Appli
30. nt of the system chassis 2 The V I O signals are either 5 or 3 3 depending on the system implementation 3 Connector P2 pin C2 is grounded at the System Slot only Peripheral slots leave C2 unconnected UNC Boards that use this signal e g CPU boards that may be used in the System Slot or Peripheral Slot shall provide a local pull up to V I O Boards designed for System Slot only use should tie this pin directly to the ground plane 4 The following signals are long level 3 pins in P1 for early power to hot swap boards D3 D5 D7 D9 D11 D17 D19 D23 C4 C6 C22 C24 5 Connector P1 pin D15 BD_SEL is defined as a short length pin and is used for the final connection sequence by hot swap boards Connector P1 pin 89 IDSEL is defined as a short length pin Refer to PICMG 2 1 CompactPCl Hot Swap Specification for details 6 These signals are defined as bussed reserve BRSVPxxx signals They were defined as PCI cache signals SDONE and SBO Defined in the PCI 2 1 Specification in earlier revisions of this specification 7 CompactPCI connector pin numbering is intentionally different from the connector manufacturer s pin numbering This was done to allow the connectors to start at the bottom of the board and grow upward from J1 P1 through J5 P5 8 BP I O signals are defined as long tail connectors with 16 0 mm tails Refer to IEEE 1101 11 for details All other signals in P1 and P2 are defined to be
31. r point within the Systems max Current carrying Capacity 5V GND 8 A per Slot 3 3V GND 10 A per Slot max Voltage Drop between any two 40mV points on the backplane on 5V or 3 3V VI O bridging default 5V default blue key 3 3V optional yellow key field changeable using M4 screws and a bus bar fixed during bp assy by using a Power Bug cable using Faston crimp contacts on request Clock frequency 33 MHz 66 MHz up to 5 Slots on higher Slot number M66EN can by enabled for test purposes cut a copper link on rear PCI Bus Width 32bit 64bit check part Data Transfer Rate peak 33 MHz 132 Mbyte s 32 bit 264 Mbyte s 64 bit 66 MHz 264 Mbyte s 32 bit 528 Mbyte s 64 bit Bridging of Backplanes backplane of slot numbers equal or higher than 4 up to 7 Slots can be bridged see chapter Possible bridge configurations SCHROFF GmbH www Schro ff biz UK 09 05 Langenalberstr 96 100 D 75334 Straubenhardt Tel 49 0 7082 794 200 Page 25 of 25 D Pentair Enclosures
32. r capacitor pads default grounded by a removable copper link in outer layer n slot number M66 66MHz enabling line can be grounded using a 0603 zero Ohm resistor default is grounded for backplanes comprised of more than 5 slots Faston Blades on left hand side only available on Backplanes 4 Slots 3 Slot BPs VI O Power Bug on Top is replaced by 3 3V VI O is set by a cable bridge between Fastons 12V Fastons not available 1 amp 2 Slot BPs Faston available as shown no Power Bug on Top replaced by IPMBO 1 connector System Slot left Backplanes placement of components and Power Bug annotation is mirrored Page 9 of 25 CompactPCl Manual o 9 a 9 9 o eg e Q Page 10 of 25 1 Slot CPCI Backplane Schroff 1 Slot 3U Backplane 23006 811 Purpose The 1 Slot Backplane provides power to a cPCI CPU Board There are no bussed signals connector P2 is compatible to the 32Bit System Slot pinout and comprises Rear I O functionality Mechanical and Electrical Interface Rear view VI O connector top view on connector H b p connector free connector crimp contact AWG 20 24 tin plated Bag Pinout VI O connector VIO GND 5V 3 3 128 7 Pinout 12V connector 12V 12V GND GND Slot logical lt 292 lt physical 12V connector top view on connector b p connector Power connectors 5V 3 3V amp GND 6 3mm Faston blades
33. roff CompactPCI Backplane Features Isolated Assembling Connection to ChassisGND Schroff backplanes have a specially designed pattern of mounting holes to assemble the backplane isolated or connected to ChassisGND For isolation between BackplaneGND and ChassisGND M2 5 screws and isolating washers should be used in at least every second connector position If noise reduction shall be achieved by connecting DigitalGND to ChassisGND conductive spring washers are recommended instead of isolating ones VI O Schroff CompactCPCl backplanes have a complete power plane for the VI O voltage The VI O plane can be connected using a bridge on the power bugs to 3 3V or 5V By default Schroff CompactPCI backplanes have VI O connected to 5V with blue coding keys on P1 VI O can also be set to 3 3V with the conversion kit 21101 658 including 8 yellow keys and a tool and change of the VI O bridge position on the rear side of the backplane Schroff CompactPCI backplanes are on request also avaiable with VI O set to 3 3V Stiffener The Schroff 6U CompactPCI backplanes are equiped with Stiffeners to reduce bending of the backplane during insertion and extraction of the cPCI cards to a minimum CompactPCl Manual Schroff CPCI Backplanes Geographical Addressing GA Geographical addressing is set by default to start from number one from left upper position within the chassis If more than one backplane shall be assembled a ch
34. umpered for ATX PSU s by default If other PSU s like CPCI PSU s acc to PICMG 2 11 shall be used than the jumper should be removed Oder Code 23098 100 ATX Connector Pinout pinout top view on connector free connector Molex 39 01 2205 crimp terminal Molex 39 00 0039 AWG 18 24 Bag CPCI Signal INH uses a pin defined within the ATX spec as PS ON both INH PS ON used to drive the PSU ON OFF Logic Level is reversed to drive PSU on drive INH HIGH PCMG 2 11 PSU s PS ON LOW ATX PSU s Disk Drive Power Connector X5 X6 O 12V O GND GND O 5v board connector Molex 15 24 4049 free connector Molex 15 24 3053 IDC AWG 16 Connector X15 1 INH 2 GND 3 FAL _ CompactPCI Manual Power Backplanes Power Backplane with P47 Connector According to PICMG 2 9 System Management Spezifikation PICMG 2 11 Compact PCI Power Interface Spezifikation Power backplane to support pluggable PSUs with P47 connector Power backplane has 8 16HP width and can be assembled anywhere in the system The power backplane can easily be connected electrically to the backplane by using the cables supplied with the power board Power input to the power backplane with crimp contacts plugged directly into the P47 connectors Parallel operation of 2 PSUs possible by connecting the current share bus on both power boards 3U power backplane 8HP assembled with one P47 connector 3U backplane 16HP
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