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        ARC-SD-XMUX4 User manual
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1.                           Figure 1  ARC SD XMUX4 R block diagram     1 1 Product versions    ARC SD XMUX4 SD SDI aspect ratio converter  4AES I O  4 SDI outputs and frame  synchronizer functionality     ARC SD XMUX4 R As above but with a high sensitivity 9 125um single mode optical  input     ARC SD XMUX4 R L As above but with an APD 9 125um single mode optical input    nevion com   4    ARC SD XMUX4    2 Specifications    Optical SD SDI input  Data rate   Sensitivity     Detector overload threshold   Detector damage threshold     Optical wavelength   Transmission circuit fiber   Return loss    Connector     Electrical SD SDI input  Connectors  Equalization    Input Return loss  Jitter tolerance    Electrical Sync input  Connector   Format   Input Return loss    Termination    Electrical SD SDI outputs  Number of outputs  Polarity   Connectors   Output Return loss  Output signal level  Output signal rise    fall time  20    80   Amplitude overshoot  Output timing jitter  Output alignment jitter    AES output   Number of inputs outputs  Connectors   Return loss   Output jitter   Impedance   Input audio data rate    Embedded audio word  length   Embedded audio Channels  status    Supported standards  SD  270 Mbps   Analog video   Centre of picture definition  Aspect ratio preservation    Rev  B    270 Mbps   Better than  20dBm  PIN   30dBm  APD    3dBm    gt  1dBm   1200 1620nm   9 125um Single Mode    gt 40dB w  SM fiber   SC UPC    75 Ohm BNC  Automatic      gt 300m  270Mbps 
2.      gt  2 frms   frames delay    DIP 1 2     Off On     gt  3 frms   Without a sync input  present this sets the no  of  frames delay relative to the  input        nevion com   20       ARC SD XMUX4    Rev  B                      ADLY Audio follows On  De embedded audio If on  de embedded audio  video delay follows video  DIP 17 18 is delay will follow video delay  used  Off  De embedded audio will  not use Frame delay from dip  17 18  OPT EL OPT EL Optical   Electrical input  SDO1PR   SDI OUT 1 Off  through mode In through mode the video  OC On  processed mode only goes through a re   clocker   SDO2PR   SDI OUT 2 Off  through mode In through mode the video  OC On  processed mode only goes through a re   clocker   F RESET   F RESET Off  Use values preset by This DIP is only read at  MULTICON GYDA  power up  After repowering  On  RESET to factory defaults   with the DIP off  the board  must be kept in the frame  for minimum 10s to fully  reset   Values preset by  MULTICON GYDA  are only  values not set by DIPs   push buttons or rotary  switches   OVR OVR Off  MULTICON GYDA mode   This DIP is only read at       On  Manual mode          power up   OVR is short term for  MULTICON GYDA override       Table 1  DIP SWITCH FUNCTIONS    nevion com   21       ARC SD XMUX4 Rev  B    4 2 FACTORY reset function    A factory reset is a 3 step process     1  Set DIP 15 to    on    and boot the card  DIP 16 must also be set  or the other DIPs won t  be read at all      Remove power and set 
3.      lt rule value gt  can take on the  following values  and tells the card  which incoming aspect ratio  information to use    0x01  AFD   gt  Fill   gt  Default   0x02  AFD   gt  Default   0x04  Fill   gt  Default   0x08  Default   No other values will be accepted by  the card  no combinations are  available        nevion com   30       ARC SD XMUX4    Rev  B       Block    Blk    Commands    Example    Response    Control       Insert    The  lt insert  value gt  can be any  binary combination of the following  values    0x02  WSS Extended   0x04  WSS   0x08  SMPTE352   0x10  Video Index   0x20  AFD   Note that the value 0x01 is not  currently supported  and that the card  therefore will only accept even  numbers as  lt insert values gt         supr     en   dis   auto    font  lt font gt     lb  lt label_page gt    lt ASCII00 gt    lt ASCIIO1 gt        lt ASCII15 gt     supr 0 auto  supr 0 font 0x4e4  supr 0 size 10    supr 0 Ib 0 65 66 67 0    supr 0 font 0x4e4 Ib  0 65 66 670    Video label   The video label is a text string that is  superimposed on the video  This  feature can be enabled  en  at all  times  disabled  dis  at all times  or  enabled only when the internal video  generator is active  auto     Maximum string length is 32  characters  over maximum 2 lines   The linefeed character  ASCII 10  is  counted as one character  leaving 31   Strings can be terminated at any time  using ASCII 0  There s an implicit  ASCII 0 on the 33  character place   The example s
4.    o000    0000  0000000                   o o  o  o o  o o  o  o o  o o  me  o  ae    g0  E e ERER  o o          o       Figure 5  ARC SD XMUX4 R backplane    The backplane for the ARC SD XMUX4 is called FRS HD XMUX4 C1   shows the connectors and their functions     Rev  B    The table below                                                                                        Function Label Connector type  SD SDI input IN BNC  SD SDI output 1 1 BNC  SD SDI output 1 inverted _ BNC  1  SD SDI output 2 2 BNC  SD SDI output 2 inverted B BNC  2  Black  amp  Burst  tri level input SYNC BNC  AES I O 1 AES WECO Audio connector  O Positive  T O   GND  JO Negative  AES 1 0 2 AES WECO Audio connector  O Positive  T O   GND     O Negative  AES 1 0 3 AES WECO Audio connector  O Positive  O GND  O Negative  AES 1 0 4 AES WECO Audio connector  O Positive  T O   GND  O Negative  GPI in GPI DATA TP45  pin 2  3 6 amp 7  GPI out GPI DATA   TP45 pin 1  pin 8   GND   DATA out GPI DATA   TP45 pin 4  amp 5  Optical input OPT1 BSC II  for SC input              nevion com   23    ARC SD XMUX4    6 Operation    6 1 Front panel LED indicators    Rev  B                                  Diode   state Red LED Orange LED   Green LED No light  Card status   PTC fuse has been FPGA Module is OK Module has no  triggered or FPGA loading  If power  loading has failed constantly lit  for more than  a few  seconds   DIPs 14 15  both set to the     On    position   or module not  programmed  SDI input Video signa
5.   The audio cross point matrix is a 14x13 cross point with inputs and outputs as shown in  Figure 4  The 8 de embedded channels  a 1 kHz sine and    black sound    are selectable  inputs     Black sound    is explained in chapter 3 1  The outputs of the cross points are 8 stereo  channels for re embedding and one 4 AES output     The 13 output channels from the cross point matrix have configurable fallbacks  used when  their corresponding matrix inputs are missing  A common fallback setting is used for all eight  re embedder channels  whereas the 4 AES outputs have their own independent fallback  settings  The priorities can be selected between matrix  being the selected channel in the  cross point matrix  or the internally generated sine or black sound     nevion com   17    ARC SD XMUX4 Rev  B    3 16 AES I O    The direction of the four AES ports can be selected by the user  This means that the user  has any combinations of inputs and outputs available  4 inputs and O outputs  3 inputs and 1  output  2 inputs and 2 outputs  1 input and 3 outputs or no inputs and 4 outputs     3 16 1 Audio inputs   When an AES I O port is set to be input  the sample frequency of the input is monitored to  see if the signal is synchronous with the system clock  If not  the audio input is passed  through a sample rate converter  After the input block the audio can be delay with individual  delay for each AES port  before it is routed to the audio matrix  The audio delay for AES  inputs are se
6.  0 lvl  180  agen 0 lvl  200    sine 1kHz lvl   lt sine_level gt cBFS    Audio generator   The amplitude of the generated sine  that can be chosen as fallback in  audio change overs  Legal values are   180cBFS or  200cBFS  centiBel  referred to full scale output   Units  are optional  but if included must be  written as cBFS  case sensitive         apre    0   11    Ir     rl     IN   rr     nir     Inr     mm     ms     lvl  lt gain gt     aprc 0 Ir   aprc 3 ll   aprc 6 mm  apre 7 lvl  400    Ir     rl     Il     rr    nlr    Inr    mm    ms    Audio processing   one block for each output from cho 2   13  The meaning of the commands  are as follows    Ir   Normal   rl   Channel swapped   Il   Left channel to both output  channels   rr   Right channel to both output  channels   nlr   Left channel phase inverted   Inr   Right channel phase inverted  mm   Mono  both channels    r l  2  ms   Mono stereo  m  I r  2  s  I r  2  Ivl means level and is the gain  setting        ceq    ceq 0    cd   ncd    Cable equalizer for electrical input   No control  only used to report carrier  detected or no carrier detected        cho             pri  lt k gt     pri  lt k gt   lt l gt     pri  lt k gt   lt l gt   lt m gt     pos man  lt k gt     pos auto    latch reset  ti  lt hold_time gt     t2  lt lock_time gt        cho 0 pri 0  cho pri 0 1  cho pri 10 2    cho 0 pos man 1  cho 0 pos auto  cho 0 latch reset  cho 0 t1 1000    cho 0 t2 1000       size 3 pri k   m auto  t1  lt hold time gt 
7.  and zoomed to fit  No curtains   e 14 9  The image will be zoomed and cropped  Narrow curtains  pillar or letter box      If the input environment is the same as the output environment  no conversion will be  performed     Mode 2  AFD or default   This mode will only use the AFD information if present  The default scaling will be used if  there is no AFD packet  no video index and no WSS  or if the active format descriptor is set  to    Unknown        Mode 3  Fill mode or default   This mode will only use the input aspect information from the AFD information if present   The S352M packet will be used if it is present and neither AFD packets  VI  nor WSS are  present  The default setting will be used if there is no AFD packet  no video index  no WSS  and no S352M packet     nevion com   10    ARC SD XMUX4 Rev  B    AFD conversions   The figure below shows the different transitions that are defined  The incoming format is  given by the VI AFD  and the user has supplied wanted output environment  To avoid clutter   transitions from a state to itself are not shown in the figure  The corresponding AFD format is  shown for reference     ne  SS   74     43afd0100       169afd0100      OHH    43afd1000          7 2     43afd0010 43afd1010 169afd1000 ae 169afd1010                169afd0011  bo  43afd0011 43afd1011 169afd1011  14   te m  4 19                                         3 4   43afd1101 3 gt 1 169afd1101  12   38      48  11   43afd1110 169afd1110  GD   4 3   43afd1111 169a
8.  de glitcher corrects timing errors within a line of video due to source switching  This  allows perfect synchronous switching     Non synchronous switching can result in a frame that is split between the old and the new  video  but the output will always be continuous     3 5 Aspect Ratio Converter block    The aspect ratio converter block is a 13 tap high quality linear resampling scaling engine  It  may be used to stretch or shrink a picture vertically and horizontally  The picture may also be  offset with respect to the centre of the picture     The block can detect a change in aspect ratio information embedded in the input signal and  change the scaling during the vertical blanking period allowing on air automatic switching of  aspect ratio conversion     Externally triggered changes of aspect ratio are also deferred until the next vertical interval to  allow the use of the module in a transmission signal path     The module is intended to be used primarily to convert SD video between standard aspect  4 3 and widescreen 16 9     The primary difficulty with the conversion is the sheer number of possible conversions  This  can be greatly reduced by setting the output aspect ratio to be 4 3 or 16 9  We call this the  output environment  The actual scaling will then depend on the input signal     The output environment setting actually describes the aspect ratio of the pixels  The fill  factor is the term for the amount that the picture fills the output frame  the presence o
9.  input is equalized  re clocked and de   serialized and transferred to a processing unit  FPGA   In the FPGA the signal is sent  through a de glitcher that cleans up erroneous video lines  for instance due to switching   After the de glitcher the video is sent to the Audio de embedders  where audio is split from  the video     3 1 1 Audio data path   The stereo audio channels from the de embedder are sent to an audio store buffer  The  audio is fetched from the audio store buffer after the user specified delay  It is then sent to  the Audio matrix     Two other sources are available in the audio matrix  A 1 kHz stereo sine tone and a  generated black sound which is a legal audio stream with muted audio     Depending of how many of the configurable AES I Os have been designated as inputs  there  may also be up to four AES inputs available in the matrix     Outputs with missing inputs are routed to a fallback signal  The fallback signal may be  silence or the tone generator     Each output from the matrix is sent to an Audio Processing Block where channels can be  processed or rearranged within the channel pair     Finally  eight stereo pairs are routed to the Audio Embedder  Depending on how many of the  four AES I Os have been designated as outputs  up to four stereo pairs are also routed the  AES outputs     3 1 2 Video data path  The video is routed to an aspect ratio converter block and the resulting SD video is passed to  a Frame synchronizer block     An internal video g
10.  lt afd code gt  scale 0 out afd 8  lt Hpos gt   lt Vpos gt  only change output environment and  scale 0 out afd 11 env   16 9   4 3   output afd code   afd  lt AFD code gt   scale  12   outzoom lt Hzoom gt    scale 12 out zoom 1 33   out zoom  lt Hscale gt    User scale blocks   15   lt Vzoom gt  1 33  lt Vscale gt  pos Four user scale settings   out pos  lt Hpos gt  scale 12 out pos 0 002    lt Hpos gt   lt Vpos gt  Zoom    lt Vpos gt  0 002 env   16 9   4 3   Zoom range is from 0 5 to 1 5   afd  lt AFD code gt  Position   out env  16 9   4 3  scale 12 out env 16 9 Position when zoom is  lt  0 defines  scale 12 out env 4 3 where in the output frame the box is  out afd  lt AFD code gt  placed  The box will never move  scale 12 out afd 8 outside of the frame   scale 12 out afd 11  When zoom is  gt  0 the position  defines which part of the input picture  to use   A value of 0 is center  Positive values  moves picture to the right or up   Negative values moves picture to the  left or down   scale  16  out env  16 9   4 3  scale 16 out env 16 9   scale 16 out env Master scale control block    This block sets the conversion mode  of the card and what aspect ratio  information will be inserted in the  output video     Output environment    out env can be 16 9 or 4 3  This  controls the pixel aspect ratio of the  output video     Fill    Fill selects how much of the picture is  preserved    full  protect input frame   crop  zoom to fill frame   14 9  scale to 14 9 PB or LB    Rule
11.  of one or less   The setting is in lines  vertical offset  and pixels  horizontal offset   A position value of P will  result in the picture moving P pixels or lines     Zoom greater than 1    The setting is in lines  vertical offset  and pixels  horizontal offset  but the values are also  scaled by the zoom factor  A zoom value larger than 1 with a position value of P will result in  the picture moving  P x zoom  pixels or lines     nevion com   14    ARC SD XMUX4 Rev  B    Positive position values moves image right up  negative values left down     An AFD code may be embedded  Use the figure in the AFD conversion section to find the  code that best describes the output picture     3 6 Frame synchronizer    The frame synchronizer consists of a frame store buffer and some control logic  The frame  store buffer can store up to 8 SD frames  The frame synchronizer is placed after the ARC  block  The control logic sets the frame synchronizer either frame sync mode or frame delay  mode of operation depending on the presence of the sync input signal     If the sync input presence changes  the operational mode of the modules will change  resulting in frame roll     3 6 1 Frame Sync mode   If a sync input  B amp B or Tri level  is present  the module will output a signal that has a  constant relative timing to this signal  Two parameters can be set  output phase and  minimum delay     The output phase can be positive or negative and sets the timing offset of the sync input and  the 
12.  packet from the video  updates the  EDH flags according to SMPTE RP165 and inserts the EDH packet into the ancillary data of  the video     If disabled  The EDH processing block only reads  processes and reports the incoming EDH  packet status and deletes the packet from the video stream     3 11 Video output selection    The board has four outputs  They are organized in two pairs of inverting non inverting  outputs  Each pair of outputs can be routed directly from the re clocker or routed through the  processing unit     nevion com   16    ARC SD XMUX4 Rev  B    3 12 Audio overview    Electrical SDI out            AESZ in  AES3 in E  AESA in     En  E     E   E     a   AAA    AES  out  www    lt  lt  7   AES4 out    es a ee e i a a DATA out  Figure 4  Audio function blocks    3 13 Audio de embedder    The Audio de embedder extracts all audio embedded in the video stream  The de embedder  is always enabled     3 14 Audio delay    An audio delay can be specified relative to the video output  It is situated before the audio  cross point matrix and is common for all de embedded channels  The audio delay is  specified in terms of 48 kHz audio samples  and can be set to positive or negative values     NOTE  As the audio delay is relative to the video output it is possible to specify an audio  delay that will actually be a negative delay  i e  ask that the sound is sent from the card  before it is received  This will obviously cause audio errors     3 15 Audio cross point matrix  
13.  selection mode  Video in Mode set to auto  There are three priority levels  Each level may be assigned an  input setting  optical  electrical  video generator or mute     The priority is the order in which the board will look for a valid input  The card will switch to  the next priority after a loss of lock to the input signal     If the active input is either electrical or optical  and the other is selected as the first priority   main   the module will not switch back to main unless signal is lost on the active channel  or  the user hits the Latch reset button     Hold time determines how long a signal has to be missing out of lock before it is considered  lost  This is useful to avoid switching when the input has intermittent faults     Lock time determines how long a higher prioritized signal has to be locked before it again  can be considered to be present and stable  This is only active when the module has lost  both optical and electrical video inputs     If video input disappears   Given that stable SDI input and sync input exists  If the SDI input disappears and Video in is  set to Auto  the board will hold on to the current input for the time set by Hold time whilst  frame freezing     The board will then select the next input in the priority list  or go up to the main input  if no  fallback exists      nevion com   8    ARC SD XMUX4 Rev  B    3 3 2 Manual selection mode  If the SDI signal disappears the board will frame freeze indefinitely     3 4 De glitcher  The
14.  t2   lt lock time gt     size 5 pri k   m man  m latch t1  lt hold  time gt  t2  lt lock  time gt        Video input select    pri  a prioritized list of inputs  used  when change over is automatic  The  list can have 1  2 or 3 entries  or  levels  Manual mode is effectively the  same as automatic mode with one  priority level only  but has its own  command    0   from electrical input   1   from optical input   2   internal video generator   3   mute   4 none    The module will always respond with  3 levels  filling in 4 none for the  levels not used     t1 and t2  change over doesn t  happen immediately  as a precaution  against glitches and unstable signals   The timers t1 and t2 let the user  decide how long  in ms  we will cling  on to a missing input before we  consider it gone and move on to the  next pri level  and how long an input  with a higher priority should be  present before we consider it       nevion com   27       ARC SD XMUX4    Rev  B       Block    Blk    Commands    Example    Response    Control       repaired and switch back   respectively        cho    size 3 pri k   auto    size 3 pri k   man m    No commands available  Included to  show internal status and to update  Multicon GYDA graphics        cho    2   13    pri  lt k gt     pri  lt k gt   lt l gt     cho 2 pri 1  cho 5 pri 0 2    size 4 pri k      Audio fallback setting   Audio change over blocks  one cho  per audio output from the audio  matrix  mtx O  No other settings but  the priority lis
15.  that the fill factor of the  picture is unknown  In that case  the code for the input aspect ratio is used     SMPTE352M is a data packet that can be used to identify the aspect ratio of the picture     Wide Screen Signaling present in the input video  WSS  can also be used to identify the  aspect ratio of the incoming picture  The trouble is that WSS codes are by themselves  indistinguishable from WSS Extended codes  but have a completely different meaning  This  means that the user must select if WSS should be interpreted as WSS or WSS Ext  and if  this selection does not match the choice made in the equipment that inserted the WSS  information  the resulting scalings will seem unpredictable     Mode 1  Full automatic mode   The aspect ratio control block will start by looking for AFD presence in the input signal to  select the aspect conversion  If that is not present it will look for VI  then WSS and finally  SMPTE S352M information  If no aspect ratio information is present in the video  the default  scaling setting will be used     When a valid format descriptor is present  either from AFD or VI  all the conversions in the  AFD code drawing are possible for the given output environment     In the case where only input environment information is available  a subset of the  conversions is used  The desired filling method must be set  This may be one of the  following     e Protect input frame   No cropping  Full curtains   e Zoom to fill frame   The image will be cropped
16. 5 4 Pre defined settings       Input Conversion Output                                              No conversion                               4 3 cropped to 16 9 full frame                               4 3 to 16 9 with 4 3 pillar box    0   Q  ze  o  oe 4 3 cropped to 16 9 with 14 9 pillar box  oe  1   7     ze                               16 9 to 4 3 with 16 9 letterbox                      16 9 cropped to 4 3 full frame                   16 9 cropped to 4 3 with 14 9 letterbox                4 3 with 16 9 letterbox cropped to 4 3 with 14 9 letterbox   zoom 1 143                             16 9 with 4 3 pillarbox cropped to 16 9 with 14 9 pillarbox   zoom 1 167     oe  4 3 with 16 9 letterbox cropped to 4 3 full frame  zoom             1 333     O Top 4 3 cropped to 16 9 full frame    Top 4 3 cropped to 16 9 with 14 9 pillarbox    3 5 5 User defined settings   It is possible to set the scaling values and AFD output codes of four settings named    User  scaling    1 to 4  The scaling values control horizontal and vertical zoom  and horizontal and  vertical center offset     Vertical and horizontal zoom can be adjusted within the range 0 5 to 1 5  The values denote  the enlargement of the output image     Vertical and horizontal center offset values are slightly more complicated as the calculation  depends on whether the active scaling zoom is greater of less than one                                                                    Seelsissesesece                   Zoom
17. OMIZEN  denia bosta 15  3 7 Video generator  spiesen a e E ea 15  38 Label Generator  irera ee is 16  3 9 Video processing OOK aces cock ah rata roda Laa as ane eats 16  3 10 EDH Processing DOCK sanidad 16  3 11 Video OUIDUL selectioner ata 16  O A O dealers 17  3 13 Audio de Smbedoer     ccocicr ice pil Shige  taaetuelanoneeaettene 17  3 14 Audio O 17  3 15 Audio cross point matrix zcaccee cans Meche sect te 17  RBM AE SD behead cada tet e aa Mad cet tee Gc 18  3 17 Audio generato A O 18  3 18 Audio processing block    voii tail riada db cor deans 18  4 Configuration ao a AOS 20  41 DIP SWitCh  PUNCHONS  Ain oa 20  die FACTORY reset f  n O Masas anales 22  4 3 MULTICON GYDA mode          sseneeseneseeneesettttertrttertttntartttntertttnterrttntettnnarntn endear aes 22  A T 23   Operaio Ma cnnan ann hes a n e aa neue rR 24  6 1 Frontpanel LED indicators nautico 24  6 2 GP A PP A A E A E E EE ER 25  6 3 RS422 COMMANOS   0 dit a A A a a a a a a a a 25  General environmental requirements for Nevion equipment     occcccccccnnncononcccnnncconananannncnnnnnnns 33  Product Warranty sio A ra 34  Appendix A Materials declaration and recycling information     oooooccccnnncccnnnccnaccccnnnnccnnnnannnn non 35    nevion com   3    ARC SD XMUX4 Rev  B    1 Product overview    The Flashlink ARC SD XMUX4 converts the aspect ratio of an SD SDI signal  The module  changes the scaling during the vertical blanking period so that the changes appear to be  instantaneous     The ARC SD XMUX 4 has 4 
18. ON GYDA mode    All functions of the card can be controlled through the MULTICON GYDA control system   The MULTICON GYDA interface has an information page and a configuration page     4 3 1 Information page   The information page shows a dynamic block diagram of the board and some additional  information text  The block diagram updates with the board status  showing selected input  signal  missing signals  by red crosses over the appropriate signal lines  and signal routing   by graphic switches   It also shows the audio matrix selections that have been made in the  configuration page        Note that if a stereo pair of embedded audio is missing  the user will still be  allowed to select that pair from the audio matrix  The output will however go to  the fallback position immediately  A missing stereo pair will be shown in the  block diagram as a red cross over the appropriate matrix input line        The text on the information page gives information about functionality not displayed on the  dynamic block diagram     The video delay represents the actual delay between input and output video   Embedded UART shows the data rate of the data link embedded in the audio control  packages on the incoming signal     4 3 2 Configuration page  The different configuration possibilities are explained in Chapter 3  under the corresponding  blocks or functions     nevion com   22    ARC SD XMUX4    5 Connections                                                                   o  2      
19. ay is always given  relative to input AES 2        dly     lt audio_samples gt sps    dly 1  30sps     tgt    lt audio_samples gt   sps    audio delay for input AES 3   The audio delay is given in audio  samples  Audio delay is always given  relative to input AES 3        dly     lt audio_samples gt sps    dly 1  30sps     tgt    lt audio_samples gt   sps    audio delay for input AES 4   The audio delay is given in audio  samples  Audio delay is always given  relative to input AES 4        dly              lt lines gt lines   lt samples gt sps       dly 2 1lines  30sps        phase   lt lines gt   lines  lt samples gt   sps       Video phase   If lines    0 the resulting phase will  vary with incoming video standard   see dly 0 above        nevion com   28       ARC SD XMUX4    Rev  B       Block    Commands    Example    Response    Control       emb    en   dis  acp  on   off    use24  on   off      del  off    on  lt del12 gt    lt del34 gt       emb 0 en   emb 2 dis   emb 1 acp on  emb 3 acp off  emb 1 use24 on  emb 2 use24 off    emb 0 del off  emb 2 del on 54  432     en   dis  use24  on    off  acp  on   off   del  off    on   lt del12 gt   lt del34 gt       Audio embedder block  en dis  Enables or disables the  embedding of the group into the  ancillary area     acp on off  This is valid only for SD  and enables the audio control  package     use24 on off  This is only valid for  SD and selects between 24bit and  20bit sound     del off on delay12 delay34  For  each o
20. can  also be selected as the main input in  cho 1  in which case its own video  settings will also be used  cbar  denotes colorbar  while mcbar  denotes colorbar with an  superimposed moving black box        nevion com   31       ARC SD XMUX4    Rev  B       Block    Bik    Commands    Example    Response    Control       vmon    msk  lt 16b_mask gt     reset    vmon 0 msk OxFFFF    vmon 0 reset    msk  lt 16b_mask gt     Video monitoring    Error counting  The count itself is  reported in info  Errors can be  masked off and not counted  this is  the purpose of the mask  The counter  itself is 16b and will wrap around  but  can also be reset by issuing reset        vpre    lgliz on    lglz off     y   cb   cr   lt gain gt    lt offset gt     vprc 0 lglz on   vprc 0 lgliz off   vprc 0 y 1 03 4 0  vprc 0 cb 0 96 0 0  vprc 0 cr 1 34  3 23          lglz  on   off  y   lt ygain gt   lt yoffset gt   cb  lt cbgain gt    lt cboffset gt    cr  lt crgain gt    lt croffset gt     Video processing block   Gain and offset must be given as  floating point numbers  Gain is limited  to  0  4 gt  for luma and chroma  while  offsets are limited to  lt  1024  1024 gt   for luma and  lt  512  512 gt  for chroma        6 3 3 Com    mands intended for debug lab use only       Block    Bik    Commands    example    Response    Control       spi    on   off    spi on  spi off    spi off used to isolate the uC from the  SPI lines during programming of the  flash by external programmer  spi on  must b
21. e issued in order to re enable  normal card operation with the uC as  the SPI master        spir     lt address gt     spir 0x0004    Read a single word  or byte  from a  SPI registers  Addressing is 16b and  most significant nibble determines  which chip  These are the address  ranges    0x0000     OxOfff    0x1000     Ox1 fff    0x2000     Ox2fff    0x3000     Ox3fff    0x4000     Ox4fff    0x5000     Ox5fff    LEDs   0x6000     Ox6fff    0x7000     Ox7fff      AES dir and SRC  FPGA   flash   deserializer  serializer   shift register for    F RAM  Rotary switches       spiw     lt address gt   lt data gt     spiw 0x0004 Ox2c    With the same address ranges as for  spir above  this command allows the  user to modify SPI registers        thebug                thebug          A collection of debug information that  is presented in a Multicon GYDA  block like format  First line tells which  image is currently loaded  Second  line contains the filename and  version of the uC software  including  the AVR controller it was compiled  for  The third line contains the SW  flags in uC  the number of times the  watchdog timer has kicked in   readout of dip switches  input select  for deserializer  SDOn on off  slew  rates  and status for the video  changeovers    The next two lines contain raster  information from the deserializer and  serializer respectively  while the next  two lines contain sample values for  mlines and VCXO        nevion com   32       ARC SD XMUX4 Rev  B    Genera
22. enerator can be switched in as a fallback source if the input video is  missing     The audio is re embedded and the video then passes through a Video processing block with  an integrated Legalizer  before entering an EDH processing block  Embedding of the EDH  packet is configurable     The parallel video is sent out from the FPGA and into a serializer that re clocks the data and  sends the SDI to a buffered output switch     The output switch is used to bypass the video processing core so that DVB ASI may pass  through the module  The switch selects between the FPGA output  Processed mode  and  video that has only been re clocked  Through mode      nevion com   7    ARC SD XMUX4 Rev  B    3 2 Video blocks overview                            2x2   0D    Optical output  receiver Reclocker Serializer switch  CEE And and  Cable De serializer Video reclocker  equalizer Generator                                              i Frame sync  De glitcher Scaling control logic processing  To audio From audio  De embedder Frame processing  buffer          Figure 2  Video block diagram    3 3 Optical  Electrical input selection    The ARC SD XMUX4 R has both an optical and an electrical input  The active input can be  selected either     1  Automatically based on a prioritized list of inputs and a rule of switching   2  Manually     When controlled by DIP switches  the card will use the fall back source and generator  settings saved from the last Multicon GYDA session     3 3 1 Automatic
23. extensio  n gt     Firmware update   The  lt name gt  part must match the  card s hardware and include a  revision number  and the extension  must be either  ffw  for FPGA  firmware or  mfw  for microcontroller  firmware  After running this command  the board will be ready to receive its  new firmware        fin    Fin    ok    Finalize   Finalize the programming of the  microcontroller  See description of  the uC boot loader  separate  document         misc                STATUS NOT  AVAILABLE BY  COMMAND    ONLY FOUND in conf  0 AND info  RESPONSES        prog   fin        ovr       Misc info   prog if the card is freshly  programmed by the boot loader and  the program is still un finalized  fin is  the normal condition    ovr if DIP switch 16 is set to the ON  position and the card is under DIP   switch control    Note 1  The info part of misc has  additional functionality when locate is  used  locating  lt remaining seconds gt    This enables a visible countdown  clock in Multicon GYDA  but is not a  required part of FLP400        nevion com   26       ARC SD XMUX4    6 3 2 Normal control blocks    Rev  B       Block    Bik       Commands    Example    Response    Control       ablk    0 3    dir in   out  track none   video    ablk O dir in  ablk 0 track video    dir in   out  track video   none    AES I O port 1 4   dir in   out sets the direction of the  AES I O    track selects whether AES delay  tracks the video delay        agen    lvl  lt sine_level gt cBFS    agen
24. f  horizontal or vertical curtains or black bars     The output signal will have the appropriate AFD  VI WSS and S352M embedded  All of these  metadata types may also be disabled     There are four operational modes for the module   1  AFD   gt  Frame fill setting   gt  default conversion  2  AFD   gt  default conversion  3  Frame fill setting   gt  default conversion  4  Fixed default conversion    The primary assumption for the first three modes is that an input signal with the same aspect  ratio as the output environment will not be scaled   There are a couple of exceptions if the  picture has both horizontal and vertical curtains      The scaling that is set in default conversion will be used for all input signals     3 5 1 Automatic scaling modes  The following applies to the first three automatic modes of operation     The scaling performed by the module is determined by the input picture aspect ratio and fill  factor  presence of    curtains     but normal SD video does not natively state what aspect the  pixels are or if another conversion has already been applied  There are three sources of  information that may be present in the video that can provide some or all of this information     Active Format Descriptor  SMPTE 2016  referred to as AFD  and Video Index  SMPTE  RP186 referred to as VI  describe both the aspect ratio and the fill factor of the picture     nevion com   9    ARC SD XMUX4 Rev  B    However  the fill factor descriptor may contain a code to indicate
25. f the GPI  values is used and the external equipment is unable to switch all four GPI lines  simultaneously  Although the GPI lines are de bounced  filtered   unintended states could  theoretically be visited by the GPI lines in a transition from one intended value to another  It  is therefore recommended to map all unused states to    No action    to get the cleanest  possible switch between scalings     Information about the currently selected default scaling and output environment is stored in  the card  and also the system controller Multicon   If a restart occurs  from loss of power  the  latest settings will be recalled from non volatile memory even if the GPI lines should now be  in a state that is mapped to    No action        GPI value mapped to scaling    4 3 output environment  16 9 output environment     U4 No action F1 F2    F1 F2 F3 FA FS FG F7 FB F9 FIO F11 F12 U1 U2 U3 F3 FA F5 F6 F7 F8 F9 FIO F11 F12 U1 U2 U3 U4  Git  A A A AAA AAA ASAS  cli  NC CRC OR OR II HHHHHHHHHHH HHH HS  CI COR ICC CC CIC CICR ARO OOO  Sih O O SA ASAS  Sit ew O DD AAA  EN oe ASAS  il A A ASAS  Gil we ew RCN OR OR CIC ROA OR ON OR OR O  ii A A AA AAA  cli A A A AAA  cli 00 000  ih O we HHHHHHHTHHHHH HH HHHHHHHHHHH HHH HS  Slit ee we HHHHHHH HOH s HHHHHHHHHHH HHH He  CCC ICC CCC RON CCC HF HHHHHHHHH HHH HHO    elit   ewe COCO CCC CONC s HHHHHHHHH HH HHH OS  Gill CCC CCC CC CAC CORO O    Figure 3  Multicon GYDA view of the GPI to scaling map    nevion com   13    ARC SD XMUX4 Rev  B    3 
26. f the embedder groups the  delay bits for ch1 2 and for ch3 4  can be inserted into the ACP  The  delay value can be positive and  negative and is put directly into the  ACP as it is written    Note  To set both delays to 0 would  be the same as turning the delays off   The response reflects this        gpi    act    inact    gpi O act  gpi 0 inact    gpi 0 act id    EDH  generator      gpi 0 inact id    EDH  generator       EDH insert select   This gpi works as a simple 2 1  switch    inact   EDH off   act  EDHon       mtx     lt i1 gt   lt 01 gt      lt iN gt    lt oN gt     lt i1 gt    lt 01 gt   lt 02 gt      lt oN gt    lt i1 gt   lt 01 gt     lt 02 gt       or the above  combined    mix0021455  mtx000 11 22  mtx 0 0 0 9    mtx 0 0 0 1 122 9    size M N   1 i2 i3     iN    Audio matrix   mtx 0  size 10 10  controls the audio  matrix  outputs 0 7 are embedded  sound  8 adac and 9 AES    Note  Any combination of the three  basic commands are allowed  for  instance the following command to  set up a 10x10 audio matrix ina  single line    mtx 3112230 3 9     gt  mtx 3 size 10 103 12333333  3       mtx     lt i1 gt   lt 01 gt      lt i2 gt    lt 02 gt    lt i1 gt   lt 01 gt   lt 02 gt     mix10011  mtx 1 0 0 1    size M N   1 i2 13     iN    Video output matrix   mtx 1  size 2 2  controls the video  output switches    0  Through mode  re clocked only    1  Processed mode  SDI from FPGA        mtx    mtx 20 1    mtx 2 size 2 1 1    Embedder enable  Has no effect in this produc
27. fd1111    At first the figure looks confusing  but observe that each state have only one arrow leading  from itself to the other column  The arrows define the normal conversion when the input  environment is different to the output environment  Find the picture type that you have on the  input and follow the arrow which points out of that state to find the conversion that will be  performed by the ARC SD MUX when the AFD code is present     nevion com   11    ARC SD XMUX4 Rev  B    There are a few states where the input picture has both horizontal and vertical curtains and  these also have arrows within the same column  These are conversions that will be  performed when the input environment is the same as the output environment     Fill mode conversions   If the module cannot find any fill factor information but has aspect ratio information  it will  perform one of three conversions when the input environment is different to the output  environment     1  Protect input frame   2  Zoom to fill frame   3  Zoom to 14 9   The table shows the conversions that will be performed when this mode is active        Output Non AFD Conversion Input      h Conversion performed  Environment environment             e  om     HO                         16 9 Protect input frame 4 3   gt K    p   gt   EA           16 9 Zoom to fill frame 4 3   gt  gt  ed op                         OO                a  o     OO                4 3 Protect input frame 16 9 Pe  gt  ed                4 3 Zoom to fil
28. l absent   Video signal Video input Module not  status present but signal in lock programmed  or  card not able DIPs 14 15 both  to lock VCXO set to the    On     position  Sync input Sync signal absent   Sync signal B amp B or Tri  Module not  status present but level sync in programmed  or  card unable to lock DIPs 14 15 both  lock VCXO set to the    On     position  Audio input No audio One  two or 4 audio Module not  status embedded in three audio groups programmed  or  incoming video groups embedded in DIPs 14 15 both  embedded in incoming set to the    On     incoming video position  video          Note that three special conditions also exist           When all four LEDs blink synchronously  this is the result of a locate on  command  This condition will eventually time out  but can also be reverted by  issuing the locate off command     The second special condition is when an FPGA firmware upgrade is performed   When Multicon GYDA is finished transferring the compressed data file  the card  will spend some time unpacking this file and during this time it will not respond to  commands or update settings  During this time it will display running lights  three  LEDs lit  one dark  the position of the dark LED will move around      The last special condition is when the user adjusts the phase delay with the push  buttons at the front of the card  Short flashes on the SYNC or INPUT LEDs  means that the end of the adjustment range has been reached  If they flash  simultaneo
29. l environmental requirements for Nevion equipment    1  The equipment will meet the guaranteed performance specification under the following  environmental conditions     Operating room temperature range  0  C to 45  C    Operating relative humidity range   lt 90   non condensing     2  The equipment will operate without damage under the following environmental    conditions     Temperature range   10  C to 55  C    Relative humidity range   lt 95   non condensing     nevion com   33    ARC SD XMUX4 Rev  B    Product Warranty    The warranty terms and conditions for the product s  covered by this manual follow the  General Sales Conditions by Nevion  which are available on the company web site     www nevion com    nevion com   34    ARC SD XMUX4 Rev  B    Appendix A Materials declaration and recycling information    A 1 Materials declaration    For product sold into China after 1st March 2007  we comply with the    Administrative  Measure on the Control of Pollution by Electronic Information Products     In the first stage of  this legislation  content of six hazardous materials has to be declared  The table below  shows the required information        Toxic or hazardous substances and elements    MRE i R     AE S RDA SR EM  Part Name Lead   Mercury   Cadmium  Hexavalent Polybrominated Polybrominated   Pb   Hg   Cd  Chromium biphenyls   diphenyl ethers   Cr VI    PBB   PBDE           ARC SD XMUX4 O O O O O O                         O  Indicates that this toxic or hazardous s
30. l frame 16 9 rO     gt                    Ae          4 3 14 9 16 9  gt                          3 5 2 Default scaling mode  This mode can be used to control scaling manually  The selected    default scaling    will be  used without regards for any incoming aspect ratio information     The    default scaling    field is also used as fallback in the automatic modes when no aspect  ratio information is available  see automatic modes on the previous pages      3 5 3 Selecting output environment and default scaling by GPI   There are 4 GPI input lines that can be controlled individually by external equipment  and  therefore 16 different combinations  Each of these 16 states can be mapped to one of the  scalings available under Default scaling  The GPI lines will then select the Default scaling     nevion com   12    ARC SD XMUX4 Rev  B    which means that they will either control the active scaling directly  if the scaler is in Default  scaling mode  or the fallback scaling that will be chosen when no AFD VI WSS SMPTE352  information is available in the automatic modes     The GPI lines can also be made to control the output environment  By selecting from the left  part of the matrix  the output environment will be set to 4 3  Conversely  it will be set to 16 9  by selecting from the right part     It is also possible to map one or more states to    No action     which means that the card will  simply ignore this GPI condition  This option can be particularly useful if a subset o
31. nevicen    ARC SD XMUX4    SD SDI Aspect Ratio Converter  with 4x AES I O    User manual    Rev  B    Nevion    nevion com          ARC SD XMUX4 Rev  B    Nevion Support    Nevion Europe Nevion USA  P O  Box 1020 1600 Emerson Avenue  3204 Sandefjord  Norway Oxnard  CA 93033  USA  Support phone 1   47 33 48 99 97 Toll free North America   866  515 0811  Support phone 2   47 90 60 99 99 Outside North America   1  805  247 8560    E mail  support nevion com  See http   www nevion com support  for service hours for customer support globally     Revision history    Current revision of this document is the uppermost in the table below        Rev    Repl  Date Sign Change description                         hie Cover page update  DoC removed  no other  B   OONA vE changes to content            o    2011 11 02 TB   Added chapter 6 2 on GPI alarms and GPI inputs                   0 A 2011 03 04   SHH   Initial revision           nevion com   2    ARC SD XMUX4 Rev  B    Contents  1 Product OWS IVIGW aiii dens dant heed acon dena A io ii aid 4  Te EEA FOCIIC EVENS IO Sn cele Macleod Sakae the e acta de te Secale habit bastards Adal 4  2 Specifications a nda next dink a dd wea ude Aide ahead nae hea aaraa 5  OSC A O O 7  3 1 Data palito toe 7  3 2 Video DIOCKS OveViEW aia 8  3 3 Optical  Electrical input selection 2 0 0 2    cece cece cent eeeeeneeeeeeee eee eeteaaaaeaeeeeeeeeeeeessaaaeeeeeees 8  DS ADS  GINCN GR siete ito 9  3 5 Aspect Ratio Converter block eos eooi   9  3 6 Frame SVNGM
32. on and audio gain     Channel L R manipulation  The stereo signals may be output in one of the following ways       LR  Left   Right No change      RL  Right  Left Channels are swapped      LL  Left  Left Left channel is copied into the right channel      RR  Right  Right Right channel is copied into the left channel      ILR  OLeft  Right The left channel is phase inverted      LIR  Left  ORight The right channel is phase inverted      MM   Left   Right  2 The left and right channels are summed      MS  MS AB The left and right channels are converted from AB stereo    to MS stereo   The sum products  L R 2 and MS  are reduced in level by 6 dB to avoid any possibility of    clipping     nevion com   18    ARC SD XMUX4 Rev  B    Audio gain  Audio gain is a 16 bit value that can be set for each stereo pair going into the audio  processing block  The gain range is set to   96dB   96dB  with a gain step of 0 1dB     Note that non audio data is ignored and left unchanged by the gain function       3 18 1 Audio embedder  The audio embedder can be enabled disabled per group  When a group to be embedded is  disabled the audio inside that group is removed        A 24 bit audio signal uses the Extended Audio Data Packet for the 4 least significant bits  Not  all equipment can handle Extended Audio Data Packets correctly  so the option exists to  truncate all audio data to 20 bits  This setting is common for all embedder channels     The insertion of Audio Control Packages can also be s
33. signed to be  hot swappable  To sync with the start  of a new command  the cards will  wait for a  lt lf gt  character before  looking for a valid command   conf 0   conf 0  too long to list  Configuration settings  Retrieves the card s configurable  settings  Each addressable block is  represented by a single line  Dynamic  status may be included in response   but is usually reported in info only        info info  too long to list  Dynamic status info  Blocks with static settings only will  usually not be included  see conf  above                          nevion com   25       ARC SD XMUX4    Rev  B       Block    Bik    Commands    Example    Response    Control       chk off    chk off    ok    Checksum off   If issued twice in succession  this  command will disable checksums   Note  Responses will still have the  checksums appended    NOTE1   command turns the  checksum on again       locate on  lt seconds gt     locate off    locate on 3    locate off    ok    Card locator   This command will cause all the  LEDs to flash for a user specified  number of seconds  If omitted  the  value  lt seconds gt  will be set to a  default of 120 seconds  The flashing  can be terminated at any time with  locate off        address    address    address  lt address gt     Card address   This command will force the module  to check and update its current rack  and slot address  This is normally  only done at start up        filename    filename arcsddmux 0   101 ffw     lt name gt     lt 
34. t        mtx    mtx 3 100  mtx3 10  mtx 300    mtx 3 size 16 1 10  mtx 3 size 16 1 1  mtx 3 size 16 1 0    Deafult scaler matrix  mtx 3  size 16 1  controls scaling to  use when default scaling is selected        mtx    mtx 4100    mtx 4 size 17 16 10  0123456789  1011121314    GPls mapped to scalings   mtx 4  size 17 16  controls how the 4   bit GPI values are mapped to the 16  available scalings  The 12 fixed  scalings are 0 11  the 4 user scalings  are 12 15  The 17  option is to not  perform any action       mtx                mtx 5       mtx 5 size 37 1 10       Active scaling  mtx 5  size 16 1  tells which scaling is  currently used  No commands       nevion com   29       ARC SD XMUX4    Rev  B                         out fill   full   crop    14 9    rule  lt rule value gt     ins  lt insert value gt                 scale 16 out fill full  rule 0x02    insert 0x20       16 9 fill full rule Ox1  use OxF ins 0x20  use Ox3E       Block   BIk Commands Example Response Control     available   pin O jon   off pin 0 on cd   ncd Pin diode for optical input  No  pin O off control available  except to turn  power to the pin diode on or off  The  info string reports carrier detected or  no carrier detected   rel 0 l  rcl O lock   lol Reclocker  No control  only used to  report lock status   scale  0   out env  16 9   4 3  scale 0 out asp 16 9 out zoom  lt Hscale gt    Premade scale blocks   11 scale 0 out asp 4 3  lt Vscale gt  pos 12 fixed scale settings  The user can  out afd 
35. t    0   from audio matrix   1   sine   2   AES with silence   3   mute   Note  Only generators  pri 1  2 or 3   are allowed to be set as first and only  priority        cho    14    pri  lt k gt     pri  lt k gt   lt l gt     cho 12 pri 1  cho 12 pri 0 2    size 4 pri k      Embedded audio common fallback  setting   A short cut to set change overs 2 9  all at once  Will of course not report  anything in info  that s left to the  individual cho blocks        demb    0 3    demb 0  demb 2    grp ken    Audio de embedders   one permanently assigned to each  incoming group  always enabled  No  control available        dly     lt frames gt frms    dly 0 2frms     tgt   lt frames gt  frms    Video delay   This sets the additional video delay of  the card    In info this block reports back the  current delay in nanoseconds  This  will vary with the incoming video  standard        dly     lt audio_samples gt sps    dly 1  30sps     tgt    lt audio_samples gt   sps    audio delay for deembedded audio  The audio delay is given in audio  samples  Audio delay is always given  relative to video        dly     lt audio_samples gt sps    dly 1  30sps     tgt    lt audio_samples gt   sps    audio delay for input AES 1   The audio delay is given in audio  samples  Audio delay is always given  relative to input AES 1        dly     lt audio_samples gt sps    dly 1  30sps     tgt    lt audio_samples gt   sps    audio delay for input AES 2   The audio delay is given in audio  samples  Audio del
36. t be removed  Available video standards are 486 25i and  576 25i     3 8 Label generator    The label generator consist of 2 lines of 16 characters each that are placed at the lower left  corner of the active area     Its main function enables the user to automatically add a label to the internal generator at  loss of input signal  It is done by selecting the auto tick box on the Label generator block in  the Multicon GYDA configuration     It is also possible to insert the label to the incoming SDI by ticking on the Enable tick box     Note that to see the label on an output the video output selection must be set to     Processed    for that particular output     3 9 Video processing block    The video processing block consists of a gain and offset adjustment  and a video payload  legalizer        3 9 1 Gain and offset  The gain and offset adjustment is done separately on the Y  Cb and Cr samples     Range Multicon GYDA    Luma gain 0     3 9999  Chroma gain 0     3 9999  Luma offset  gain  1   511 75     511 75    Chroma offset  gain   1   255 75     255 75    3 9 2 Video payload legalizer  The legalizer hard clips the upper and lower limit of the video payload  With the legalizer  enabled the limits are     Upper limit Luma  3ACh  Chroma  3C0h  Lower limit Luma  040h    Chroma  040h  With the legalizer disabled  the video processing block hard clips both luma and chroma to  3FBh and 004h     3 10 EDH processing block    If enabled  the EDH processing block extracts the EDH
37. t relative to the AES input port     If the AES input port is synchronous with the SDI input  the user can select the AES input  delay to track to the video delay  The card will calculate the relative delay for the audio based  on the delay setting for video and audio  This is useful if the SDI in and AES has a common  clock source and the sync input has a different clock source    3 16 2 Audio outputs   The AES outputs are routed from the audio matrix via individual audio processing blocks   The outputs are always 48 kHz and synchronous to the system clock  The AES outputs have  individual fallback options     3 17 Audio generator    The stereo audio generator is available as an input to the audio cross point matrix  and as a  fallback option  There are therefore three slightly different ways to select the generator   select it in the matrix directly  select it as the first priority under audio fallback  or to set it as  second priority behind a missing input     The generator signal is a high purity 1 kHz sine wave with a 250ms interruption on the left  channel every 3 seconds  The audio level may be set to one of two standards  The two  levels are  18 dBFS and  20 dBFS  These two levels correspond to EBU R68 and SMPTE  RP155     3 18 Audio processing block    The output of each stereo signal from the audio cross point matrix may be processed in the  audio processing block  This is controlled with the Multicon GYDA controller  The processing  includes channel L R manipulati
38. the reset switch back to normal position     off        Power up the card as normal  The operation of the card will immediately reflect the  freshly loaded default settings  However  the card must be kept powered for at least  10 seconds to ensure that these settings are stored locally to be retrieved again at  the next start up  The card   s operational environment must also be kept static during  those 10 seconds  i e  no change in incoming video standard  no commands issued    Failing to meet these requirements could result in an incomplete reset and require the  user to restart the factory reset sequence     4 2 1 Rotary switch and push buttons   The rotary switch  labeled DLY  adjusts the phase delay from  5 to  4 video lines  It is only  functional when a sync signal  black  amp  burst or tri level  is present at the sync input  The  rotary switch is accessible from the board front     The push buttons  labeled INC and DEC  are used to fine adjust the phase delay by samples   It can adjust  2 video line for the current video standard  or the last video standard the  board was able to lock to   Pressing a button and keeping it pressed will accelerate the  change  The LED adjacent to the button will flash for a short period of time when the end of  the adjustment range has been reached  Pressing both buttons at the same time will return  to the middle of the adjustment range  and the board will acknowledge by flashing the INPUT  and SYNC LEDs simultaneously     4 3 MULTIC
39. tring on the left will  display    ABC    on a single line    The 32 characters are transmitted in  two pages of 16 characters each   These pages are prefixed    Ib 0    and     Ib 1           sync    sync 0    lol    lock   rilvl   bb    sdi        Sync block  Frequency reference for video output   Status only  no commands available        uart    tx    The embedded data link  selectable  by cho 13  No control possible  the  word tx indicates that this is a  transceiver only    Uart info reports link status   os  loss  of signal   raw  or the speed of the  embedded link  example   115200 8 n 1         vgen             cbar    chkfield    white    yellow    cyan    green    magenta    red    blue    black    mcbar    flat  lt Y gt   lt Cb gt   lt Cr gt     video   lt Ins gt   lt rate gt  lt scan gt   wss  off    on   lt wss_val gt           vgen 0 cbar    vgen 0 flat 200 0 100  vgen 0 video 576 25i  vgen 0 video 486 29i    vgen 0 wss auto  vgen 0 wss on 7       video   lt Ins gt   lt rate gt  lt scan   gt  wss   auto  off      on  lt wss_value gt        cbar   chkfield    white   yellow    cyan   green    magenta   red    blue   black    mcbar    flat  lt Y gt    lt Cb gt   lt Cr gt           Internal video generator    The video generator will be activated  in two different ways  If selected as a  fallback option the generator will  generate the selected pattern when  the other input s  are missing  and  then use the video settings from the  last external source present  It 
40. ubstance contained in all of the homogeneous materials for  this part is below the limit requirement in SJ T11363 2006     X  Indicates that this toxic or hazardous substance contained in at least one of the homogeneous  materials used for this part is above the limit requirement in SJ T 11363 2006              This is indicated by the product marking     A 2 Recycling information    Nevion provides assistance to customers and recyclers through our web site  http   www nevion com   Please contact Nevion s Customer Support for assistance with  recycling if this site does not show the information you require     Where it is not possible to return the product to Nevion or its agents for recycling  the  following general information may be of assistance       Before attempting disassembly  ensure the product is completely disconnected from  power and signal connections       All major parts are marked or labeled to show their material content       Depending on the date of manufacture  this product may contain lead in solder       Some circuit boards may contain battery backed memory devices     nevion com   35    
41. usly  both push buttons have been pressed simultaneously and the  samples part of the phase delay reset to the middle of the adjustment range        nevion com   24    ARC SD XMUX4    6 2 GPI alarms    The UDC HD XMUX4 has one GPI output  below     6 2 1 Functions of 8pin modular jack    Rev  B      This reflects the status of the card  see the table                                                                                                                               GPI name Function Pin   Mode Direction   _      z  Status General error status for  Pin1   Inverted Open  Output s  the module  Will also Collector a  activate at firmware  open is alarm   E  upgrades  1  GPI 1 GPI default scaling Pin 2   TTL  OV   Input Ze  select  Least significant active level    bit     GPI 2 GPI default scaling select   Pin 3   TTL  OV   Input 6  active level 8  DATA link RS422  Pin 4   R8422 Output  output  DATA link RS422  Pin 5   R8422 Output  output  GPI 4 GPI default scaling Pin 6   TTL  OV   Input  select  Most significant active level  bit   GPI 3 GPI default scaling Pin 7   TTL  OV   Input  select  active level  Ground O volt pin Pin 8   OV   6 3 RS422 commands  6 3 1 FLP4 0 required commands  Block   BIk Commands Example Response Control         2 2 product name  Hello command   SW rev n m  Note 1  No other commands will be  FW rev r s  available until the card has received  protocol ver 4 0  this hello   Note 2  This command will also  enable checksums   Note 3  Cards are de
42. video output     The minimum delay sets the minimum delay between video output and video input  The  actual delay can be larger than the minimum delay  hence the name   because the card must  also adjust the picture phase relative to the sync input     The user may set the    minimum delay    up to 7 frames       3 6 2 Frame delay mode   This mode is active when a sync signal is not present  The minimum delay setting is then  used directly  1 frame and 1 line minimum delay means that the output will be 1 frame and 1  line delayed version of the input        3 7 Video generator  The video generator can produce one of the signals from the following list      e Color bar  e Checkfield  e Color bar with moving black box  e Black   e White   e Yellow   e Cyan   e Green   e Magenta  e Red   e Blue    The flat field option allows the user to specify any combination of luma and chroma values     In normal operation  as a fallback generator   the video generator will take its video standard  setting from the last video input seen by the board     nevion com   15    ARC SD XMUX4 Rev  B    To enable the board to act as a standalone and user configurable video generator  the video  generator must either be set as the first priority input when Mode is auto  or selected  manually by setting Mode to Video generator  This will override any video input but the  generator signal will still be locked to the sync or SDI inputs  if present  For true standalone  generator operation  the inputs mus
43. w Belden 8281  BER  lt  10E 12   gt 15dB  5MHz  1 5GHz    SD limit     10Hz 1kHz   gt 1 Ul    10kHz     5MHz  50 2 UI    75 Ohm BNC   Black  amp  Burst  Tri level    lt  35dB    lt  10MHz    30dB    lt  30MHz   Selectable internal or external 75 Ohm termination    4  2 non inverting  2 inverting   75 Ohm BNC    gt 15dB  5MHz  1 5GHz   800mV     10      SD limit   0 4ns     1 5ns    lt 0 5ns rise fall var      lt 10     SD   lt 0 2 Ul    SD   lt 0 15 Ul    4  WECO   110R    20  0 1MHz     6 144MHz    lt 0 0025Ul peak   110 ohm transformer balanced   24 kHz to 100kHz  converted to 48 kHz uf not isochronous to  either SDI input or sync input    24 bits    As received when isochronous  otherwise fixed     SMPTE 259M  SMPTE 272M AC  SMPTE297M  SMPTE 170M  SMPTE 274M  ITU R  BT 470   SMPTE RP187  ITU R  BT 470   SMPTE RP199 1999  SMPTE RP221    nevion com   5    ARC SD XMUX4    Video switch point  definition and sync  AES   Optical   EDH   Video Payload  Identification    Rev  B    SMPTE RP168  tri level   SMPTE 170M  ITU R  BT 470    AES3 1996   SMPTE 297M   Compliant to SMPTE RP165   SMPTE 352M 2002  SMPTE 2016 1  SMPTE2016 3  SMPTE  RP186    Minimum video signal delay through processing    Minimum delay  Other    Power consumption    W o optical input module  All AES configured as inputs     unused     256 lines     5V DC  5W max     0 3W   0 5W    nevion com   6    ARC SD XMUX4 Rev  B    3 Description    3 1 Data paths    The SD SDI input selected from the optical or electrical
44. witched on and off  This setting is  also common for all embedder channels     nevion com   19    ARC SD XMUX4    4 Configuration    4 1 DIP switch functions    4 1 1 DIP switch functions    Rev  B       Note that the left DIP switch of the horizontal DIP package is number 1  The top  DIP switch of the vertical DIP package is number 17                                                                             Switch     Function name   Function DIPs Comment  1 AES1 dir Off   input AES 1 input or output  if   On   output AES1 is input  DIP 2 4   routes GROUP 1   2 4 AES1 GRP 1 DIP   Group 1 AES1 Routing matrix to AES1 or  routing 234   Embeddin   output GROUP 1  g Deembed  ding  000   Disable Group 1  ch 1 amp 2  001   Group 1 Group 1  ch 3 amp 4  010   Group 2 Group 2  ch 1 amp 2  011   Group 3 Group 2  ch 3 amp 4  100   Group 4 Group 3  ch 1 amp 2  101   AES182 Group 3  ch 384  110   AES384   Group 4  ch 182  111   Generator   Group 4  ch 384  5 AES2 dir Off   input Aes 2 input or output  On   output  6 8 AES2 GRP2 See table for AES1 GRP1 Routing Matrix to AES2 or  GROUP 2  9 AESS3 dir Off   input AES 3 in or out  On   output  10 12 AES3 GRP 3 See table for AES1 GRP1 Routing AES3   GROUP 3  13 AES4 dir Off   input AES 4 in or out  On   output  14 16 AES4 GRP 4 See table for AES1 GRP1 Routing matrix AES4    GROUP 4  X  Y Frame delay DIP 1 2     Off Off     gt  O frms   With a sync input present    DIP 1 2     Off Off    gt  1 frms   this sets the minimum   DIP 1 2     Off On
45. x SDI outputs and 4 x AES I Os     The ARC SD XMUX4 is also a frame synchronizer with an adjustable offset relative to the  sync signal     The ARC SD XMUX4 also has a de glitcher to give error free synchronous switching     The audio embedded in the SD SDI stream is de embedded and can be delayed relative to  video  The stereo audio channels can be swapped in the audio matrix before they are re   embedded in the SD SDI data output stream     A selection of user parameters of the card can be controlled by switches on the board   Complete control of all parameters is available by use of the Flashlink RS422 Control  Protocol Version 4  which is supported by the Multicon GYDA system controller from  software release 2 13           BYPASS   gt       SDIOUT             SDIOUT  AFD WSS  AFD WSS   vi       vi    SDIOUT  De embedder Embedder    ze x point  Phase Thru Frame S     yne   a   gt   Deglitcher     Aspect Ratio     w  Video ic   MA ea  gt    Conversion generator       SDIOUT                   SDI    OPTICAL      gt C   IN J gt      gt     SDI  ELECTRICAL  IN    Reclocker    De serialiser                                                    REF    ___________   _ Genlock          Audio Tone  Generator                      i i Audio  Audio x point            f  GPI guong     AS422 p RS422  16 ch Audio p  Audo R D our  De embedder Delay                                              GYDA                           4 AES IN     Audio SRC  gt   4 AES Selectable I O CTRL    4AES OUT  
    
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