PIO 96 Data Acquisition Card User Manual
Contents
1. eect cece eeeeeectteeeeeeeeeeeeetaaaes 8 4 0 ELECTRICAL OPTIONS 9 4 1 Input Conditioning c cece eeeeeeceeceeeeeeeeeeeecaaeeeeeeeeeeeeenaeaes 9 4 2 Input Output COnNNEGtions eeeeeeeeee cece ee eeeeettaeeeeeeeeeeeeeaaaes 9 4 3 Connector Pin DetailS neeesser nn resesrrrrne 11 5 0 OPERATING GUIDE c cisnenra radiati nina 12 5l Using the Device ila arataa aaae 12 5 2 Programming Guide 13 Simple IMPUTSs iirrririrrtire i iii 13 Simple Outputs anidar ae aaa E NE 13 Typical Register Setups inniu 15 6 0 EXAMPLE PROGRAMS 16 Exambple Program 1 sisssiaiale ilaele 16 Example Program 2 astsorososesospipasgaso aaa tezza 17 7 0 COMMERCIAL DATA ACQUISITION PACKAGES 20 7 1 Use of the PIO 96 Board with ASYST 20 APPENDIO sasronii caio 21 A1 IO Address Map for PC XT AT Computers 21 A2 Hardware Interrupt Levels for PC XT 22 A3 Hardware Interrupt Levels for PC AT nrnna 23 DMA Ghannels4 anali 23 Blue Chip Technology Ltd 01271015 doc Introduction Page 1 1 0 INTRODUCTION This card provides 96 programmable digital I O lines It is suitable for sensing or driving TTL connections only There is provision for a set of on board pull up resistors to enable the board to be used to detect contact closures on push buttons relay contacts etc This manual refers to printed circuit boards ident2. Output Output Output 89 137 Output Output Input input _ iso 14 inut Output Output Output 98 152 int Output input Output go 153 int Output Input input _ Laa 9B 55 input input input input Table 4 Simple I O Control Words For a full explanation of the various modes of operating and the use of the signal lines consult the Intel 8255 or NEC uPD71055 datasheet Blue Chip Technology Ltd 01271015 doc Page 15 Page 16 Example Programs 6 0 EXAMPLE PROGRAMS Example Program 1 The following program in Microsoft Basic will test the operation of the PIO 96 if a link is made between corresponding pins on the rear of the connector 180 P1 amp H300 REM BASE OF FIRST PIA P2 amp H304 REM BASE OF SECOND PIA GOSUB 60 P1 amp H304 P2 amp H300 GOSUB 60 GOTO 10 REM LOOP CONTINUOUSLY OUT P1 3 amp H80 OUT P2 3 amp H9B FOR P 0T02 F 0 A 1 OUT P1 P A IF INP P2 P lt gt A THEN PRINT ERROR P A INP P2 P F F 1 A A A IF A 256 THEN GOTO 150 GOTO 100 IF F gt 0 THEN PRINT P FAILED F GOTO 170 PRINT P PASSED NEXT P RETURN The program runs continuously and can only be stopped by pressing Control Bre Page 16 ak on the PC keyboard 01271015 doc Blue Chip Technology Ltd Example Programs Page 17 Example Program 2 This example program shows the use of interrupts generated from the uPD71055 PIO chip The program
3. The Blue Chip Technology PIO 96 can be used with almost any data acquisition package that can read information directly from a PC input port 7 1 Use of the PIO 96 Board with ASYST The board has been tested with and is installable as an 71055 PORT digital device in the ASYST scientific software package by Macmillan Software Company For more details about this package and other PC data acquisition software please contact Blue Chip Technology Page 20 01271015 doc Blue Chip Technology Ltd Appendices Page 21 APPENDIX A1 I O Address Map for PC XT AT Computers Address Allocated to Hex 000 01F DMA Controller 1 8237A 5 020 03F Interrupt Controller 1 8259A 040 05F Timer 8254 060 06F Keyboard Controller 8742 Control Port B 070 07F RTC And CMOS RAM NMI Mask Write 080 09F DMA Page Register Memory Mapper 0A0 0BF Interrupt Controller 2 8259 OFO Clear NPX 80287 Busy OF1 Reset NPX 80287 OF8 OFF Numeric Processor Extension 80287 1FO 1F8 Hard Disk Drive Controller 200 207 Reserved 278 27F Reserved For Parallel Printer Port 2 2F8 2FF Reserved For Serial Port 2 300 31F Reserved 360 36F Reserved 378 37F Parallel Printer Port 1 380 38F Reserved For SDLC Comms Bisynch 2 3A0 3AF Reserved For Bisynch 1 3B0 3BF Reserved 3C0 3CF Reserved 3D0 3DF Display Controller 3F0 3F7 Diskette Drive Controller 3F8 3FF Serial Port 1 Blue Chip Technology Ltd 01271015 doc Page 21 Page 22 A2 Address Hex D
4. not function correctly OQ O O98 O OO 0 JP2 OF O O O O 3 4 5 6 7 2 INTERRUPT No Figure 2 Setting the Interrupt Channel The above diagram shows the jumper block JP2 with a link placed on interrupt channel 3 Please note that the silk screen printing of the interrupt numbers on the printed circuit board is incorrect The diagram above shows the correct sequence Page 6 01271015 doc Blue Chip Technology Ltd Port Map Page 7 3 0 PORT MAP The PIO 96 has four uPD71055 8255 chips Each chip has three 8 bit ports A B amp C which can be programmed as inputs or outputs by writing a control word to the control port See Table 2 All A ports and B ports much each be all input or all output i e they should not be programmed to mixed input and output bits within an individual port Port C may be split into two 4 bit sections each of which may be input or output The board occupies sixteen read write addresses four for each uPD71055 chip in the IBM PC port map Table 1 Port Addresses Blue Chip Technology Ltd 01271015 doc Page 7 Page 8 Port Map The function and operation of each of the input output ports A B amp C are controlled by the control byte which is written to the appropriate Command Port Each bit within the byte has a specific function shown in Table 2 3 1 Control Port Bit Functions po Active ___I ___ 00 Modeo E input O po y y Si po SMe po y S
5. PIO 96 96 Channel Programmable Input Output Board Blue chipy Technology User Manual PIO 96 User Manual Document Part N 0127 1015 Document Reference 0127 1015 Doc Document Issue Level 1 2 Manual covers PCBs identified PIO 96 Rev B All rights reserved No part of this publication may be reproduced stored in any retrieval system or transmitted in any form or by any means electronic mechanical photocopied recorded or otherwise without the prior permission in writing from the publisher For permission in the UK contact Blue Chip Technology Information offered in this manual is correct at the time of printing Blue Chip Technology accepts no responsibility for any inaccuracies This information is subject to change without notice All trademarks and registered names acknowledged Blue Chip Technology Ltd Chowley Oak Tattenhall Chester Cheshire CH3 9EX Telephone 01829 772000 Facsimile 01829 772001 Amendment History Issue Issue Amendment Details Level Date ida __ First drat 1 2 24 11 97 SEJ Window front cover and logo See ECN 98 088 Contents 1 0 INTRODUCTION cca aaa 1 ELECTROMAGNETIC COMPATIBILITY EMC 2 EMG Specificationi i israel dalia ener mts 3 2 0 USER ADJUSTMENTS 4 2 1 Selecting the Base Address JP1 4 2 2 Setting the Interrupt Channel JP2 iii 6 3 0 PORT MAP a elia einen 7 3 1 Control Port Bit Functions
6. WNHO lon Page 22 Appendices Hardware Interrupt Levels for PC XT Allocated to Timer Keyboard Reserved Asynchronous Communications Secondary SDLC Communications Asynchronous Communications Primary SDLC Communications Fixed Disk Diskette Parallel Printer 01271015 doc Blue Chip Technology Ltd Appendices Page 23 A3 Hardware Interrupt Levels for PC AT Address Allocated to Hex 0 Timer Output 0 1 Keyboard Output Buffer Full 2 Interrupt From Controller 2 8 Real Time Clock Interrupt 9 Software Redirected To INT OAH IRQ2 10 Reserved 11 Reserved 12 Reserved 13 Co Processor 14 Fixed Disk Controller 15 Reserved Serial Port 2 Serial Port 1 Parallel Port 2 Diskette Controller Parallel Port 1 NAN BW DMA Channels 1 Floppy Disk Drive may be used when disk inactive 2 Hard Disk Drive 3 Spare Blue Chip Technology Ltd 01271015 doc Page 23
7. addr 10 ctrlortC bseaddr 11 port0D bseaddr 12 port1D bseaddr 13 port2D bseaddr 14 ctrlortD bseaddr 15 REM set uPD71055 No 2 3 and 4 to mode 0 all ports outputs OUT ctripriB amp H80 OUT ctriprtC amp H80 OUT ctrlprtD amp H80 REM set all ports for uPD71055 Nos 2 3 and 4 to LOW OUT port0B 0 OUT port1B 0 OUT port2B 0 OUT port0C 0 OUT port1C 0 OUT port2C 0 OUT port0D 0 OUT port1D 0 OUT port2D 0 Page 18 01271015 doc Blue Chip Technology Ltd Example Programs Page 19 REM set mode 1 for normal operation for uPD71055 No 1 REM port 0 input REM port 1 input REM bits 7 and 6 of port C input REM groups 0 and 1 set to mode 1 OUT ctrlprtA amp HBO REM set bit manipulation mode to set up uPD71055 chip No 1 REM and set bit 4 high to enable INTO OUT ctrlprtA amp H9 LOCATE 1 1 PRINT Port 0 of uPD71055 No1 rdval REM get port data before interrupt dt INP port0A pol REM read input buffer full status bit 5 for uPD71055 No 1 REM this determines when the data strobe has occurred irq INP port2A AND 32 IF irq 0 THEN GOTO pol LOCATE 3 1 PRINT Before Interrupt dt rddat REM read data from port 0 dta INP port0A LOCATE 4 1 PRINT After Interrupt dta SLEEP 1 GOTO rdval Blue Chip Technology Ltd 01271015 doc Page 19 Page 20 Commercial Data Acquisition Packages 7 0 COMMERCIAL DATA ACQUISITION PACKAGES
8. al ground Both connectors are identical in their pin out Blue Chip Technology Ltd 01271015 doc Page 9 Page 10 Electrical Options When the connector is viewed from the back of the system odd numbered pins are on the left and even numbered pins are on the right with pin 1 at the top of the connector pio 02 TO O 4 50 CIG 70 O8 KO O44 40 046 O O48 40O 050 Figure 3 Connector Pin Details P1 and P2 View with gold edge connector facing downwards Page 10 01271015 doc Blue Chip Technology Ltd Electrical Options Page 11 4 3 Connector Pin Details PORT BIT NO PINO PINNO BITNO PORT A 1 Digital Ground Digital Ground Table 3 Signal Pin Connection Details Pin out of both connectors is identical Blue Chip Technology Ltd 01271015 doc Page 11 Page 12 Operating Guide 5 0 OPERATING GUIDE 5 1 Using the Device A total of 24 I O channel signals from each 71055 I O device on the PIO 96 board provides twelve 8 bit ports Each signal is connected to one bit within one of these ports i e PORT ADD PORT BIT ADD HEX DECIMAL PORT ADD PORT ADD Page 12 01271015 doc Blue Chip Technology Ltd Operating Guide Page 13 5 2 Programming Guide Simple Inputs The state of the input lines may be determined by using either of the following methods Microsoft BASIC A or GW BASIC X INP P Returns t
9. ce in which case the user may be required to take adequate measures EMC Specification A Blue Chip Technology Icon industrial PC fitted with this card meets the following specification Emissions EN 55022 1995 Radiated Class A Conducted Class A amp B Immunity EN 50082 1 1992 incorporating Electrostatic Discharge TEC 801 2 1984 Performance Criteria B Radio Frequency Susceptibility IEC 801 3 1984 Performance Criteria A Fast Burst Transients IEC 801 4 1988 Performance Criteria B Blue Chip Technology Ltd 01271015 doc Page 3 Page 4 User Adjustments 2 0 USER ADJUSTMENTS 2 1 Selecting the Base Address JP1 The board may be located in any 62 pin ISA slot in the PC motherboard but must be set up to appear at a specified position or address in the computer s port map Available positions are shown in the IBM PC Technical Reference Guide However for those who do not possess a copy of this document a good place is the location normally allocated to the prototyping card as supplied by IBM This address is 300 hex or 768 decimal All Blue Chip Technology cards are preset to this address at the factory However no two devices should be used while set to the same address since contention will occur and neither board will work If your machine contains a card with a conflicting address then another reasonably safe address is 200 to 21F hex A set of links on the board set the base address of the board wi
10. he byte from port P and assigns this value to the variable X 8088 8086 Assembly language PORT EQU 0300H GETDAT MOV DX PORT IN AL DX RET Simple Outputs The state of the output lines may be modified by using either of the following methods Microsoft BASIC A or GW BASIC OUT P D Outputs the byte D to Port P Blue Chip Technology Ltd 01271015 doc Page 13 Page 14 Operating Guide 8088 8086 Assembly language PORT EQU 0300H PUTDAT MOV DX PORT MOV AX DATA OUT DX AL RET The uPD71055 can operate in one of 3 modes mode 0 1 amp 2 In the first mode mode 0 the uPD71055 provides simple I O for three 8 bit ports Data is simply written to or read from a specified port A B or C without the use of handshaking Mode 1 enables the transfer of data to or from a specified 8 bit port A or B in conjunction with strobes or handshaking signals provided by Port C In mode 2 data is transferred via one bi directional 8 bit port A with handshakes Port C Page 14 01271015 doc Blue Chip Technology Ltd Operating Guide Page 15 The following table gives a summary of the most commonly used control words which must be written to each control port to configure the uPD71055s before using this module The table assumes mode 0 Typical Register Setups Control Control Sets All Sets High Sets High Sets Low Word Word of 4 Bits of 4 Bits of 4 Bits of hex Dec Port B As Port B As Port C As Port C As so 128 Output
11. i lo PortC Lower 0 Output Table 2 Control Port Bit Functions The software described in section 5 the Operating Guide gives examples of the more typical control bytes and their effects Page 8 01271015 doc Blue Chip Technology Ltd Electrical Options Page 9 4 0 ELECTRICAL OPTIONS 4 1 Input Conditioning The 71055 has high impedance inputs An option is provided to terminate external input lines This is useful in an electrically noisy environment or where a load is required e g open collector drive The lines may be pulled up to the on board 5V supply using 12 off SIL resistor packs identified on the PCB as RP1 to RP6 and RP11 to RP16 inclusive The recommended values of each resistor to 10Kohm 4 2 Input Output Connections Two 50 way insulation displacement connectors IDC are provided for I O channel signal connection One connector is located on the rear bracket and carries signals 1 to 48 The second connector is located on the board and carries signals 49 to 96 This connector may be brought out to the rear of the computer via an adapter cable If access to individual channels is required a 50 way IDC ribbon cable may be used to connect the I O channels to a 50 way screw terminal block available from Blue Chip Technology as part number ST 24 The pins are numbered as shown in the following diagram Pins 1 48 contain the I O signal lines and pins 49 and 50 are connected to digit
12. ified on the rear of the board by the reference PIO 96 Rev B Whilst every effort has been taken to ensure that the information provided is accurate Blue Chip Technology cannot assume responsibility for any errors in this manual or their consequences Should any errors be detected the company would greatly appreciate being informed of them A policy of continuous product development is operated resulting in the contents of this document being subject to change without notice Blue Chip Technology Ltd 01271015 doc Page 1 Page 2 Electromagnetic Compatibility EMC ELECTROMAGNETIC COMPATIBILITY EMC This product meets the requirements of the European EMC Directive 89 336 EEC and is eligible to bear the CE mark It has been assessed operating in a Blue Chip Technology Icon industrial PC However because the board can be installed in a variety of computers certain conditions have to be applied to ensure that the compatibility is maintained It meets the requirements for an industrial environment Class A product subject to those conditions e The board must be installed in a computer system which provides screening suitable for the industrial environment e Any recommendations made by the computer system manufacturer supplier must be complied with regarding earthing and the installation of boards e The board must be installed with the backplate securely screwed to the chassis of the computer to ensure good metal to meta
13. l i e earth contact e Most EMC problems are caused by the external cabling to boards With analogue boards particular attention must be paid to this aspect It is imperative that any external cabling to the board is totally screened and that the screen of the cable connects to the metal end bracket of the board and hence to earth It is recommended that round screened cables with a braided wire screen are used in preference to those with a foil screen and drain wire Use metal connector shells which connect around the full circumference of the screen they are far superior to those which earth the screen by a simple pig tail Standard ribbon cable will not be adequate unless it is contained wholly within the cabinetry housing the industrial PC e If difficulty with interference is experienced the cable should also be fitted with a ferrite clamp as close possible to the connector The preferred type is the Chomerics clip on style type H8FE 1004 AS Page 2 01271015 doc Blue Chip Technology Ltd Electromagnetic Compatibility EMC Page 3 e Itis recommended that cables are kept as short as possible particularly when dealing with low level signals e Ensure that the screen of the external cable is bonded to a good RF earth at the remote end of the cable Failure to observe these recommendations may invalidate the EMC compliance Warning This is a Class A product In a domestic environment this product may cause radio interferen
14. sets mode 1 operation which allows data to be strobed into Port 0 of the first uPD71055 via a LOW signal on Port 2 bit 4 To determine when data has been strobed into the data port this example polls the uPD71055 port 2 register which in mode 1 acts as a control status register In normal use an interrupt handler routine written in C or assembler would be resident in memory to respond to the hardware interrupt generated by the PIO card NOTES e Prior to using interrupts an interrupt routine must be installed in memory by the application software e To use interrupts ALL unused INTO and INT1 lines bits 0 and 3 of each uPD71055 port 2 must be LOW This means that if a uPD71055 has been set to say mode 0 with all ports as output then Port 2 output lines 0 and 3 must be written to a zero LOW state e Ifthe ports were set to inputs then interrupts will only occur if Port 2 input lines 0 and 3 are LOW for each uPD71055 not being used in an interrupt mode e The above is necessary because each uPD71055 INTO and INTI lines are logically OR ed together Blue Chip Technology Ltd 01271015 doc Page 17 Page 18 Example Programs CLS bseaddr amp H300 port0A bseaddr 0 port1A bseaddr 1 port2A bseaddr 2 ctriprtA bseaddr 3 port0B bseaddr 4 port1B bseaddr 5 port2B bseaddr 6 ctriprtB bseaddr 7 port0C bseaddr 8 port1C bseaddr 9 port2C bse
15. thin the IBM PC port map The address is in binary with the presence of a link representing a 0 and the absence of a link representing a 1 Page 4 01271015 doc Blue Chip Technology Ltd User Adjustments Page 5 To set the base address to 300 hex 768 decimal set the pattern on the links as indicated below JP1_V 10H 20H 40H 80H 100H O O O O O O O 200H Figure 1 Selecting the Base Address More example addresses are shown in Appendix A Note No Two cards must occupy the same address Blue Chip Technology Ltd 01271015 doc Page 5 Page 6 User Adjustments 2 2 Setting the Interrupt Channel JP2 The PIO 96 card supports the use of the interrupts generated from the uPD71055 chips These chips are identical functionally to the Intel 8255 integrated circuit The use of the interrupts provides a means to monitor digital inputs only when there has been a change at the input signal lines The use of interrupts requires the user to write an interrupt handler routine either in C or assembler and install it prior to using the PIO 96 card To select an interrupt channel a link must be set on jumper block JP2 An interrupt is selected by placing a jumper link on the pair of link pins corresponding to the desired interrupt channel All other interrupt channel links must be left open Note Only one link is permitted on JP2 If more than one link is fitted then the computer system may
Download Pdf Manuals
Related Search