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1. for PIO_D48 wRetVal PIO_DriverInit amp wBoards wSubVendor wSubDevice wSubAux printf Threr are d OME PIO D48 Cards in this PC n wBoards step2 save resource of all OME PIO D48 cards installed in this PC for i 0 i lt wBoards i PIO _GetConfigAddressSpace i amp wBase amp wlrq amp wID1 amp wID2 amp wID3 amp wID4 amp wID5 printf nCard_ d wBase x wIrq x 1 wBase wlIrq wConfigSpace 1 0 wBaseAddress save all resource of this card wConfigSpace 1 1 w rq save all resource of this card Sample program 2 find all PIO PISO in this PC refer to Sec 4 1 for more information wRetVal PIO DriverInit wBoards 0xff 0xff 0xff find all PIO _PISO printf AnThrer are d PIO PISO Cards in this PC wBoards if wBoards 0 exit 0 printf n for i 0 i lt wBoards i PIO GetConfigAddressSpace i amp wBase wlIrq amp wSubVendor amp wSubDevice wSubAux amp wSlotBus amp wSlotDevice printf nCard_ d wBase x wlrq x subID x Sx Sx Slot ID x x i wBase wIrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice printf gt ShowPioPiso wSubVendor wSubDevice wSubAux OME PIO D48 User Manual Sep 2000 V2 1 en 25 The sub IDs of OME PIO PISO series card are given as following OME PIO PISO series card Description Sub vendor Sub device
2. WORD pio d48 cl char cConfig char cLow char cHigh WORD pio d48 c2 char cConfig char cLow char cHigh a o st in in tic void interrupt irq service irqmask now_int state invert new_ int state int c INTO_H INTO_L INT1_H INT1_L ct ct OM int main int izy WORD wBoards wRetVal t1 t2 t3 t4 t5 WORD wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice char c DWORD dwVal JA step 1 find address mapping of PIO PISO cards clrscr wRetVal PIO DriverInit amp wBoards 0x80 0x01 0x30 for OME PIO D48 printf nThrer are d PIO D48 Cards in this PC wBoards if wBoards 0 exit 0 printf n The Configuration Spac Ny for i 0 i lt wBoards i PIO GetConfigAddressSpace i amp wBase amp wIrq amp wSubVendor amp wSubDevice wSubAux amp wSlotBus amp wSlotDevice printf AnCard d wBase x wIrq x subID x Sx x SlotID x x i wBase wIrg wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice printer gt MM ShowPioPiso wSubVendor wSubDevice wSubAux select card_0 PIO GetConfigAddressSpace 0 amp wBase wlIrq amp t1 amp t2 amp t3 amp t4 amp t5 step 2 enable all D I O port Rey outportb wBase 1 enable D I O init_high interrupt initialize INIT_CHAN 0 1 is HIGH now printf n show the count of Low pulse n for 77 OME PIO D48 User Manual Sep 2000 V2 1 en 62
3. c getch if c q c Q break i i lt lt 1 next bit if i gt 0x80 i 1 c getch if c Q c q return printf n Test2 D I O CN1 CN2 Wyre PIO DriverClose OME PIO D48 User Manual Sep 2000 V2 1 re fs demo 4 INT_CHAN 3 timer interrupt demo Pe it is designed to be a machine independent timer step 1 run demo4 exe i ie AY include PIO H define Al_8259 0x20 define A2 8259 0xA0 define EOI 0x20 WORD init high WORD wBase wlrq WORD pio d48_c0 char cConfig char cLow char cHigh WORD pio d48 cl char cConfig char cLow char cHigh WORD pio d48 c2 char cConfig char cLow char cHigh static void interrupt irq service int COUNT irgmask now_int state int main int ias WORD wBoards wRetVal t1 t2 t3 t4 t5 WORD wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice char Cc DWORD dwVal step 1 find address mapping of PIO PISO cards step 2 enable all D I O port j init_high interrupt initialize INIT_CHAN 3 is HIGH now COUNT 0 printf An show the count of Low pulse n for printf nLow Pulse Count d one low pulse every second COUNT if kbhit 0 getch break outportb wBase 5 0 disable all interrupt PIO DriverClose OME PIO D48 User Manual Sep 2000 V2 1 een 47 e Use INT_CHAN 3 as external interrupt signal
4. Note now the PC3 of port 2 is HIGH if gt INVO must select the inverted PC3 El gt INT CHAN 0 PC3 init_LOW active HIGH outportb wBase 0x2a 0 select the inverted PC3 INT CHAN 0 PC3 now_int_state 1 now PC3 is high outportb wBase 5 1 enable INT_CHAN 0 interrupt E enable void interrupt irq service if now_ int state 1 now PC3 is changed to LOW Fu gt INT CHAN 3 PC3 HIGH now g COUNT find a LOW pulse PC3 E if inportb wBase 7 amp 1 0 the PC3 is still fixed in LOW x7 gt need to generate a high pulse outportb wBase 0x2a 1 INVO select the non inverted input INT_CHAN_0 PC3 LOW gt yA INT_CHAN 0 generate a high pulse now int state 0 now PC3 LOW x Ta z else now_int_state 1 now PC3 HIGH no need to generate high pulse else now PC3 is changed to HIGH y gt INT CHAN 0 PC3 HIGH now zY find a HIGH pulse PC3 Sh if inportb wBaset 7 amp 1 1 the PC3 is still fixed in HIGH aA gt need to generate a high pulse outportb wBase 0x2a 0 INVO select the inverted input ES INT CHAN 0 PC3 LOW gt AY INT CHAN 0 generate a high pulse now_int_state 1 now PC3 HIGH ay else now_int_state 0 now PC3 LOW no need to generate high pulse if wIrq gt 8 outportb A2 8259 0x20 outportb A1_8259 0x20 OME PIO D48 User Manual S
5. Sub AUX OME PIO D144 Rev 4 0 144 D I O 5C80 01 00 OME PIO D96 Rev 4 0 96 D I O 5880 01 10 OME PIO D64 Rev 2 0 64 DA O 4080 01 20 OME PIO D56 Rev 6 0 24 D I O C080 01 40 16 D I 16 D O OME PIO D48 Rev 2 0 48 D I O 0080 01 30 OME PIO D24 Rev 6 0 24 D I O C080 01 40 OME PIO 821 Multi function 80 03 10 OME PIO DA16 Rev 4 0 16 D A 4180 00 00 OME PIO DA8 Rev 4 0 8 D A 4180 00 00 OME PIO DA4 Rev 4 0 4 D A 4180 00 00 OME PISO C64 Rev 4 0 64 isolated D O 0280 00 00 Current Sinking OME PISO A64 Rev 3 0 64 isolated D O 0280 00 50 Current Sourcing OME PISO P64 Rev 4 0 64 isolated D I 0280 00 10 OME PISO P32C32 32 isolated D O 80 08 20 Rev 5 0 Current Sinking 32 isolated D I OME PISO P32A32 32 isolated D O 8280 00 70 Rev 3 0 Current Sourcing 32 isolated D I OME PISO P8R8 8 isolated D I 4200 00 30 Rev 2 0 8 220V relay OME PISO P8SSR8AC 8 isolated D I 4200 00 30 Rev 2 0 8 SSR AC OME PISO P8SSR8DC 8 isolated D I 4200 00 30 Rev 2 0 8 SSR DC OME PISO 730 Rev 2 0 16 DI 16 D O C2FF 00 40 16 isolated D I 16 isolated D O Current Sinking OME PISO 730A 16 DI 16 D O 62FF 00 80 Rev 3 0 16 isolated D I 16 isolated D O Current Sourcing OME PISO 813 Rev 2 0 32 isolated A D 4280 02 00 OME PISO DA2 Rev 5 0 2 isolated D A 4280 03 00 Note If your board is a different version it may also have different
6. initial is HIGH active is LOW COUNT if kbhit 0 getch break outportb wBase 5 0 disable all interrupt PIO DriverClose OME PIO D48 User Manual Sep 2000 V2 1 Use INT_CHAN 0 as external interrupt signal WORD init_high DWORD dwVal disable outportb wBaset5 0 if wIrq lt 8 irqmask inporthb Al _8259 1 outporthb A1 8259 1 irgmask amp Oxff 1 lt lt wlrq setvect wIrgt 8 irq service else irqmask inportb Al_8259 1 outportb Al_8259 1 irgqmask amp Oxfb outporth Al _ 8259 1 irgmask Oxff 1 lt lt wirgqg irqmask inportb A2 8259 1 outportb A2 8259 1 irqmask Oxff 1 lt lt wIrq 8 ES disable all interrupt setvect wIrg 8 0x70 irq service select PC3 PCT of port_2 as interrupt signal outportb wBase 0xf0 0x10 Note In this demo assume the PC3 is init HIGH active LOW CTRL D3 0 CTRL D2 0 gt INT_CHAN_0 PC34 PC7 gt PC7 can enable disable PC3 PC3 can enable disable PC7 is used to enable disable PC3 gt gt PC3 interrupt is disable gt PC3 interrupt is enable IRQ2 is HIGH INVO must select the inverted PC3 INT CHAN 0 PC3 init LOW active HIGH E the PC7 PC7 VCC fom PC7 GND now the PC3 of port 2 LF gt AR gt outportb wBase 0x2a 0 de now_int_state 1 outportb
7. printf nINTO x Sx INT1 Sx x INTO_L INTO_H INT1_L INT1_H if kbhit 0 getch break outportb wBase 5 0 disable all interrupt PIO DriverClose Use INT_CHAN 0 amp INT_CHAN 1 as external interrupt signal Kj WORD init_high DWORD dwVal disable outportb wBase 5 0 disable all interrupt if wIrq lt 8 irqmask inporthb Al _8259 1 outporth Al _8259 1 irgmask Oxff 1 lt lt wirgq setvect wIrgt 8 irq service else irqmask inporthb Al _8259 1 outportb Al 8259 1 irqmask amp Oxfb IRQ2 outportb Al 8259 1 irgmask Oxff 1 lt lt wiIrq irqmask inportb A2 8259 1 outportb A2 8259 1 irgqmask amp 0xff 1 lt lt wlrq 8 setvect wIrg 8 0x70 irq service 8 select PC3 of port_2 amp PC3 of port _5 as interrupt signal ay outportb wBase 0xf0 0x28 CTRL D5 4 3 2 1010 gt INT_CHAN_0 PC3 of port_2 INT CHAN 1 PC3 of port_5 Note now both PC3 are HIGH gt INVO INV1 must select the inverted PC3 gt INT CHAN 0 PC3 of port _2 init LOW active HIGH es gt INT CHAN 1 PC3 of port _5 init LOW active HIGH invert 0 outportb wBase 0x2a invert select the inverted PC3 INT CHAN 0 PC3 of port 2 INT CHAN 1 PC3 of port_5 El now_int_state 3 now both PC3 are high outportb wBase 5 3 enable INT_CH
8. 2 for active high pulse generation OME PIO D48 User Manual Sep 2000 V2 1 nen 14 2 5 4 INT_CHAN 2 PCO INT_CHAN_ 2 port 2 NE Inverted Noninverted select CTRL D1 Inverted Noninverted select INV2 Enable Disable select EN2 The INT_CHAN 2 must be fixed in low level state normally and must generate a high_pulse to interrupt the PC The PCO port 2 can be inverted non inverted programmable as following refer to Sec 3 3 9 CTRL_D1 0 gt Cin0 PCO0 of port 2 CTRL_D1 1 gt Cin0 PCO of port 2 The EN2 can be used to enable disable the INT CHAN 2 as following refer to Sec 3 3 4 EN2 0 gt INT_CHAN_2 disable EN2 1 gt INT_CHAN _2 enable The INV2 can be used to invert non invert the Cout0 as following Refer to Sec 3 3 6 INV2 0 gt INT_CHAN_2 inverted state of Cout0 INV2 1 gt INT_CHAN_2 non inverted state of Cout0 Refer to demo program for more information as following DEMO7 C gt for INT_CHAN 2 only Cout0 NOTE refer to Sec 2 5 2 for active high pulse generation OME PIO D48 User Manual Sep 2000 V2 1 nen 15 2 5 5 INT_CHAN_3 2M 32768 Hz select CTRL DO INT_CHAN_3 Inverted Noninverted select INV3 Enable Disable select ENS The INT_CHAN 3 must be fixed in low level state normally and generated a
9. Note 2 Refer to Sec 2 1 for JP 2 7 pull high pull low 2 3 I O Port Initialization Operation When the PC is powered up all operations of D I O port are disabled The enable disable of D I O is controlled by the RESET signal Refer to Sec 3 3 1 for more information about RESET signal The power up states are given as following e All D I O are disabled e All six D I O ports are configured as D I port e All D O latch register outputs are at high impedance refer to Sec 2 4 The user has to perform some initialization before using these D I Os The recommended steps are given as following Step 1 find address mapping of PIO PISO cards refer to Sec 3 1 Step 2 enable all D I O refer to Sec 3 3 1 Step 3 configure the first three ports to their expected D I O state amp send the initial value to all D O ports refer to Sec 3 3 7 Step 4 configure the other three ports to their expected D I O state amp send the initial value to all D O ports refer to Sec 3 3 7 OME PIO D48 User Manual Sep 2000 V2 1 een 7 The sample program is given as following step 1 find address mapping of PIO PISO cards clrscr wRetVal PIO DriverInit amp wBoards 0x80 0x01 0x30 for OME P10 D48 printf nThrer are Sd PIO D48 Cards in this PC wBoards if wBoards 0 exit 0 printf n The Configuration Spac for i 0 i lt wBoards i PIO GetConfigAddressSpace i amp wBase amp wIrq amp wS
10. PIO D48 User Manual Sep 2000 V2 1 en 4 1 4 PCI Data Acquisition Family We provide a family of PCI bus data acquisition cards These cards can be divided into three groups as following 1 OME PCL series first generation isolated or non isolated cards OME PCI 1002 1202 1800 1802 1602 multi function family non isolated OME PCI P16R16 P16C16 P16POR16 P8R8 D I O family isolated OME PCI TMC12 timer counter card non isolated 2 OME PIO series cost effective generation non isolated cards OME PIO 823 821 multi function family OME PIO D144 D96 D64 D56 D48 D24 D I O family OME PIO DA16 DA8 DA4 D A family 3 OME PISO series cost effective generation isolated cards OME PISO 813 A D card OME PISO P32C32 P64 C64 D I O family OME PISO P8R8 P8SSR8AC P8SSR8DC D I O family OME PISO 730 D I O card 1 5 Product Check List In addition to this manual the package includes the following items e one piece of OME PIO D48 card e one piece of software floppy diskette or CD e one piece of release note It is recommended to read the release note first All important information will be given in release note as following 1 Where you can find the software driver amp utility 2 How to install software amp utility 3 Where is the diagnostic program 4 FAQ Attention If any of these items are missing or damaged contact Omega Engineering immediately Save the shipping materials and the box in case you want to ship or store
11. Yes OME DB 24SSR No Yes Yes NOTE There is no 20 pin header in OME PIO D48 The OME PIO D48 has one D Sub 37 connector and one 50 pin flat cable header OME PIO D48 User Manual Sep 2000 V2 1 en 21 2 7 Pin Assignment CN 1 37 pin of D type female connector port 0 port 1 port 2 OMONOOAWNH A T4 6 5 4 3 2 1 0 G Z J PAO PA7 port 0 PBO PB7 port 1 PCO PC port 2 OME PIO D48 User Manual Sep 2000 V2 1 O zNO0RA0dO0oxy CN2 50 pin of flat cable connector port 3 port 4 port 5 O O O O O O O O O O O O O O O O O O O O O O O O O 0000000000000000000000000 PAO PA7 port 3 PBO PB7 port 4 PCO PC port 5 OME PIO D48 User Manual Sep 2000 V2 1 3 I O Control Register 3 1 How to Find the I O Address The plug amp play BIOS will assign a proper I O address to every OME PIO PISO series card in the power up stage The IDs of OME PIO D48 cards are given as follows lt REV 1 0 REV 5 0 gt lt REV 6 0 or above gt e Vendor ID 0xE159 e Vendor ID 0xE159 Device ID 0x0002 Device ID 0x0001 e Sub vendor ID 0x80 e Sub vendor ID 0x0080 e Sub device ID 0x01 e Sub device ID 0x01 e Sub aux ID 0x30 e Sub aux ID 0x30 We provide all necessary functions as following 1 PIO_DriverInit amp wBoard wSubVendor wSubDevice wSubAux 2 PIO_GetConfigAddressSpace wBoardNo wBase wlIrq wSubVendor wSubDevice wSub
12. a interrupt signal EN3 0 gt disable INT_CHAN 3 as a interrupt signal default EN3 1 gt enable INT_CHAN 3 as a interrupt signal outportb wBase 5 0 disable all interrupts outportb wBase 5 1 enable interrupt of INT CHAN 0 outportb wBase 5 2 enable interrupt of INT_CHAN_1 outportb wBase 5 4 enable interrupt of INT CHAN 2 outportb wBase 5 8 enable interrupt of INT CHAN 3 outportb wBase 5 0x0f enable all four channels of interrupt Refer to the following demo program for more information DEMO4 C gt for INT_CHAN_3 only DEMO7 C gt for INT_CHAN 2 only DEMO8 C gt for INT_CHAN_0 only DEMO9C gt for INT_CHAN_0 only DEMO10 C gt for INT_CHAN_1 only OME PIO D48 User Manual Sep 2000 V2 1 en 32 3 3 5 Aux Status Register Read Write wBase 7 Note Refer to Sec 3 1 for more information about wBase Aux0 INT_CHAN_0 Auxl INT_CHAN 1 Aux2 INT_CHAN 2 Aux3 INT_CHAN_3 Aux7 4 Aux ID Refer to Sec 4 1 for more information The Aux 0 3 are used as interrupt sources The interrupt service routine has to read this register for interrupt source identification Refer to Sec 2 5 for more information 3 3 6 Interrupt Polarity Control Register Read Write wBase 0x2A pb lb o mwv iva ivi mvo Note Refer to Sec 3 1 for more information about wBase INVO 0 gt select the inverted signal from interrupt channel_0 INVO 1 gt select the non inverted signal fro
13. as following Step 1 Record all wSlotBus amp wSlotDevice Step2 Use PIO_GetConfigAddressSpace to get the specified card s wSlotBus amp wSlotDevice Step3 The user can identify the specified PIO PISO card if he compare the wSlotBus amp wSlotDevice in step2 to step1 OME PIO D48 User Manual Sep 2000 V2 1 nen 29 3 3 The I O Address Map The I O address of PIO PISO series card is automatically assigned by the main board ROM BIOS The I O address can also be re assigned by user It is strongly recommended not to change the I O address by user The plug amp play BIOS will assign proper I O address to each PIO PISO series card very well The I O addresses of OME PIO D48 are given as following Address wBase 0__ RESET control register wBase 5 INT mask control register wBase 0x2a INT polarity control register wBase 0xc0 wBase 0xed wBasetOxc8 wBasetOxce SA A ERA wBase Oxd0 wBase 0xd8 wBasetOxde AAA eae wBase 0xe0 Read 8254 counter0 Write 8254 counter0 wBase 0xe4 Read 8254 counterl Write 8254 counterl wBase 0xe8 Read 8254 counter2 Write 8254 counter2 WBase 0xec Read 8254 control word Write 8254 control word wBase 0xf0 Read clock int control word Write clock int control word Note Refer to Sec 3 1 for more information about wBase OME PIO D48 User Manual Sep 2000 V2 1 en 30 3 3 1 RESET Control Register Read Write wBase 0 Note Refer to Sec 3 1 for more information about
14. at the same time then INTA will be active only once a time So the interrupt service routine has to read the status of all interrupt channels for multi channel interrupt Refer to Sec 2 5 for more information DEMO11 C gt for both INT_CHAN_0 amp INT_CHAN_1 If only one interrupt source is used the interrupt service routine does not have to read the status of interrupt source The demo programs DEMO4 C to DEMO10 C are designed for single channel interrupt demo as following DEMO4 C gt for INT_CHAN 3 only DEMO7 C gt for INT_CHAN 2 only DEMO8 C gt for INT_CHAN _0 only DEMO9 C gt for INT_CHAN _0 only DEMO10 C gt for INT_CHAN_1 only OME PIO D48 User Manual Sep 2000 V2 1 en 11 2 5 2 INT_CHAN_0 01 Disable INT_CHAN_0 00 PC38 PC7 port 2 a 10 PC3 port 2 Inverted Noninverted select INVO Enable Disable select ENO The INT_CHAN_0 must be fixed in low level state normally and generate a high_pulse to interrupt the PC The INT _CHAN_0 can be equal to PC3 amp PC7 or PC3 programmable as following refer to Sec 3 3 9 CTRL_D3 0 CTRL_D2 1 gt INT_CHAN 0 disable CTRL_D3 1 CTRL_D2 0 gt INT_CHAN _0 PC3 of port 2 CTRL_D3 0 CTRL_D2 0 gt INT_CHAN_0 PC3 amp PC7 of port 2 The ENO can be used to enable disable the INT CHAN_0 as following refer to Sec 3 3 4 EN0 0 gt INT_CHAN_0 disable ENO0 1 gt INT_CHAN_0 enable The INVO can be us
15. consists of 24 Form C relays for efficient switch of load by programmed control The relay are energized by apply 12V 24V signal to the appropriated relay channel on the 50 pin flat connector There are 24 enunciator LEDs for each relay light when their associated relay is activated From C Relay Channel 24 From C Relays Normal Close Normal Open Relay Switching up to 0 5A at 110ACV or 1A at 24DCV OME DB 24R OME DB 24RD 50 pin flat cable header Yes Yes D sub 37 pin header No Yes Other specifications Same The other output daughter boards are given as following OME DB 24R OME DB 24RD 24 Relay 120V 0 5A OME DB 24PR OME DB 24PRD 24 Power Relay 250V 5A OME DB 24POR 24 photo MOS Relay 350V 01 A OME DB 24SSR 24 SSR 250VAC 4A OME DB 24C 24 0 C 30V 100 mA OME DB 16P8R 16 Relay 120V 0 5A 8 isolated input OME PIO D48 User Manual Sep 2000 V2 1 2 6 7 Daughter Board Comparison Table 20 pin flat cable 50 pin flat cable D Sub 37 header header header OME DB 37 No No Yes OME DN 37 No No Yes OME ADP 37 PCI No Yes Yes OME ADP 50 PCI No Yes No OME DB 24P No Yes No OME DB 24PD No Yes Yes OME DB 16P8R No Yes Yes OME DB 24R No Yes No OME DB 24RD No Yes Yes OME DB 24C Yes Yes Yes OME DB 24PR Yes Yes No OME DB 24PRD No Yes Yes OME DB 24POR Yes Yes
16. ef WORD init_high DWORD dwVal disable outportb wBase 5 0 disable all interrupt if wIrg lt 8 irqmask inportb A1_8259 1 outportb A1 _8259 1 irqmask amp Oxff 1 lt lt wIrq setvect wIrq 8 irq service else irqmask inportb Al_8259 1 outportb A1 8259 1 irqmask amp Oxfb IRQ2 outporth Al _ 8259 1 irgmask Oxff 1 lt lt wirgqg irqmask inportb A2 8259 1 outportb A2 8259 1 irgqmask amp Oxff 1 lt lt wlrq 8 setvect wIrg 8 0x70 irq service select CLK1 32768 Hz outportb wBase 0xf0 0x15 CTRL D0 1 gt timer clock 32768 Hz program OUT1 to 2 Hz pio _d48 cl1 0x76 0 0x40 COUNTER1 MODE 3 32768 0x4000 2 Hz program OUT2 to 1 Hz note the 8254 need extra 2 clock for initialization y pio d48 c2 0xb6 2 0 COUNTER2 MODE 3 2 2 1Hz E for 33 wait COUT2 HIGH X if inportb wBase 7 amp 8 0 break Note now the COUT2 is HIGH El gt INV3 must select the inverted COUT2 gt INT CHAN 3 COUT2 init_LOW active HIGH my outportb wBase 0x2a 0 select the inverted COUT2 INT CHAN 3 COUT2 now_int_state 1 now COUT2 is high outportb wBase 5 8 enable INT_CHAN 3 interrupt xi enable OME PIO D48 User Manual Sep 2000 V2 1 en void interrupt irq _service if now_int_state 1 now COUT2 is changed
17. find address mapping of PIO PISO cards clrscr wRetVal PIO DriverInit amp wBoards 0x80 0x01 0x30 for OM printf AnThrer are Sd PIO D48 Cards in this PC wBoards E PIO D48 if wBoards 0 exit 0 printf n The Configuration Spac for i 0 i lt wBoards i PIO GetConfigAddressSpace i amp wBase amp wIrq wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard d wBase x wlrq x subID x x x Slot ID x x i wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice PEIRCE W ShowPioPiso wSubVendor wSubDevice wSubAux select card_0 PIO GetConfigAddressSpace 0 amp wBase wlrq amp t1 amp t2 amp t3 amp t4 amp t5 step 2 enable all D I O port outportb wBase 1 enable D I O step 3 program 8255 1 PA PB PC as output port outportb wBase 0xcc 0x80 8255 1 PA PB PC are all output port outportb wBase 0xc0 0 8255 1 PA initial 0 outportb wBase 0xc4 0 8255 1 PB initial 0 outportb wBase 0xc8 0 8255 1 PB initial 0 step 4 program 8255 2 PA PB PC as output port outportb wBase 0xdc 0x80 8255 2 PA PB PC are all output port outportb wBase 0xd0 0 8255 2 PA initial 0 outportb wBase 0xd4 0 8255 2 PB initial 0 outportb wBase 0xd8 0 8255 2 PB initial 0 OME PIO D48 User Manual Sep 2000 V2
18. pull low select default all JPs are in 2 3 short gt select pull low e The RESET is in Low state gt all D I O operation is disable e The RESET is in High state gt all D I O operation is enable e If D 1 O is configured as D I port gt D I external input signal gt can be pulled high or low selected by JP2 3 4 5 6 7 1 2 ON pull high 2 3 ON pull low e If D I O is configured as D O port gt D I read back of D O e If D I O is configured as D I port gt send to D O will change the D O latch register only The D I amp external input signal will not change OME PIO D48 User Manual Sep 2000 V2 1 eee 2 5 Interrupt Operation There are four interrupt sources in OME PIO D48 These four signals are named as INT_CHAN_0 INT _CHAN_1 INT CHAN 2 and INT_CHAN 3 Their signal sources are given as following INT_CHAN_0 PC3 PC7 from port 2 refer to Sec 2 5 2 INT_CHAN_1 PC3 PC7 from port 5 refer to Sec 2 5 3 INT_CHAN 2 Cout0 refer to Sec 2 5 4 INT_CHAN_ 3 Cout2 refer to Sec 2 5 5 If only one interrupt signal source is used the interrupt service routine does not have to identify the interrupt source Refer to DEMO4 C DEMO7 C DEMO8 C DEMOS9 C and DEMO10 C for more information If there are more than one interrupt source the interrupt service routine has to identify the active signals as following refer to DEMO11 C Read the new status of all interrupt signal sources refer to Sec 3 3 5 Compare the new status wi
19. the inverted input vA INT CHAN 1 PC3 LOW gt s7 INT_CHAN 1 generate a high pulse now_int_state 1 now PC3 HIGH else now_int_state 0 now PC3 HIGH Sl no need to generate high pulse if wIrq gt 8 outportb A2 8259 0x20 outportb A1_8259 0x20 i x WORD pio d48_c0 char cConfig char cLow char cHigh COUNTER_0 outportb wBase 0xec cConfig outportb wBase 0xe0 cLow outportb wBase 0xe0 cHigh return NoError WORD pio d48_c1 char cConfig char cLow char cHigh COUNTER_1 outportb wBase 0xec cConfig outportb wBase 0xe4 cLow outportb wBase 0xe4 cHigh return NoError WORD pio d48_c2 char cConfig char cLow char cHigh COUNTER_ 2 outportb wBase 0xec cConfig outportb wBase 0xe8 cLow outportb wBase 0xe8 cHigh return NoError OME PIO D48 User Manual Sep 2000 V2 1 nen 61 DEMO11 gt De n an oS D demo 11 INT CHAN 0 INT CHAN 1 interrupt demo RJ step 1 apply a init HIGH amp active LOW signal to PC3 of port 2 E note PC7 of port 2 is don t care El step 2 apply a init HIGH amp active LOW signal to PC3 of port 5 PR note PC7 of port 5 is don t care ey step 3 run demoll exe 5 K include PIO H define Al 8259 0x20 define A2 8259 0xA0 define EOI 0x20 WORD init_high WORD wBase wIrq WORD pio d48_c0 char cConfig char cLow char cHigh
20. the product in the future OME PIO D48 User Manual Sep 2000 V2 1 nen 5 2 Hardware configuration 2 1 Board Layout 8 Default Setting 8rd Old HINO JP3 port 1 JP4 port 2 JP2 port 0 1 pull High snd Idd E L Cc L 2 3 pull low Mo Nd YBIH INd xe O E E L T Q I 2 O gt JP7 port 5 JP6 port 4 JP5 port 3 L L LI Mo Nd YyBIH INd Mo Nd YBIH INd Mo Nd yBIH 1ind Default Setting JP2 3 4 5 6 7 2 3 short pull low OME PIO D48 User Manual Sep 2000 V2 1 en 6 2 2 I O Port Location There are six 8 bit I O ports in the OME PIO D48 Every I O port can be programmed as D I or D O port When the PC is first power up all six ports are configured as D I port These D I ports can be pull high or pull low selected by JP2 JP7 These I O port locations are given as following Connector of OME PIO D48 PAO to PA7 PBO to PB7 PCO to PC7 CN1 port 0 port 1 port 2 OME DB 37 pull high low pull high low pull high low by by JP2 by JP3 JP4 CN2 port 3 port 4 port 5 50 pin head pull high low pull high low pull high low by by JP5 by JP6 JP7 e Note 1 Refer to Sec 2 1 for board layout amp I O port location e
21. wBase When the PC is first power up the RESET signal is in Low state This will disable all D 1 O operations The user has to set the RESET signal to High state before any D I O command outportb wBase RESET High gt all D I O are enable now outportb wBase 0 RESET Low gt all D I O are disable now 3 3 2 AUX Control Register Read Write wBase 2 Note Refer to Sec 3 1 for more information about wBase Aux 0 gt this Aux is used as a D I Aux 1 gt this Aux is used as a D O When the PC is first power on All Aux signal are in Low state All Aux are designed as D I for all PIO PISO series Please set all Aux in D I state 3 3 3 AUX data Register Read Write wBase 3 Note Refer to Sec 3 1 for more information about wBase When the Aux is used as D O the output state is controlled by this register This register is designed for feature extension so don t control this register now OME PIO D48 User Manual Sep 2000 V2 1 en 31 3 3 4 INT Mask Control Register Read Write wBase 5 o b b b dns m mu mo Note Refer to Sec 3 1 for more information about wBase EN0 0 gt disable INT_CHAN 0 as a interrupt signal default EN0 1 gt enable INT_CHAN 0 as a interrupt signal EN1 0 gt disable INT_CHAN 1 as a interrupt signal default EN1 1 gt enable INT_CHAN 1 as a interrupt signal EN2 0 gt disable INT_CHAN 2 as a interrupt signal default EN2 1 gt enable INT_CHAN 2 as
22. wlrq x subID x Sx Sx Slot ID x x i wBase wIrqg wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice PHANCE T o ShowPioPiso wSubVendor wSubDevice wSubAux PIO DriverClose NOTE the PIO_PISO EXE is valid for all PIO PISO cards The user can execute the PIO_PISO EXE to get the following information e List all PIO PISO cards installed in this PC e List all resources allocated to every PIO PISO cards e List the wSlotBus amp wSlotDevice for specified PIO PISO card identification refer to Sec 3 2 for more information OME PIO D48 User Manual Sep 2000 V2 1 een 39 4 1 1 PIO_PISO EXE for Windows User can find this utility in the software floppy disk or CD It is useful for all PIO PISO series card After executing the utility detailed information for all OME PIO PISO cards that installed in the PC will be show as following f PIO PISO series card 0x0001 0xD800 Board Name OME PIO D48 User Manual Sep 2000 V2 1 en 4 2 DEMO1 Ef demol D O demo for OME PIO D48 EZ step 1 connect CN1 of OME PIO D48 to OME DB 24C oy step 2 connect CN2 of OME PIO D48 to another OME DB 24C E step 3 run DEMO1 EXE Jos include PIO H WORD wBase wIirq WORD wBase2 wlrq2 int main int i j k jj dd WORD wBoards wRetVal WORD wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice WORD t1 t2 t3 t4 t5 char c step 1
23. 1 printf n Test D O DB 24C i 1 for 55 send test pattern to CN1 of PIO D48 outportb wBase 0xc0 i printf nOutput x i outportb wBase 0xc4 1 outportb wBase 0xc8 1 send test pattern to CN2 of PIO _D48 utportb wBase 0xd0 1 utportb wBase 0xd4 1 utportb wBase 0xd8 1 000 delay 1000 if kbhit 0 c getch if e g 1 c Q return i i lt lt 1 next bit if i gt 0x80 i 1 c getch LE CCHS O 0 i te q1 return printf n Test D O DB 24C MD PIO DriverClose OME PIO D48 User Manual Sep 2000 V2 1 43 DEMO2 xy demol D O demo for OME PIO D48 step 1 connect CN1 of OME PIO D48 to OME DB 24P step 2 connect CN2 of OME PIO D48 to another OME DB 24P step 3 run DEMO2 EXE include PIO H WORD wBase wlirq WORD wBase2 wIrq2 int main int iy Je Je 299 375 47 33 dd 3113223343445 WORD wBoards wRetVal t1 t2 t3 t4 t5 WORD wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice char Cc float ok err step 1 find address mapping of PIO PISO cards select card_0 step 2 enable all D I O port Kf step 3 program 8255 1 PA PB PC as input port 7 outportb wBase 0xcc 0x9B 8255 1 PA PB PC are all input port step 4 program 8255 2 PA PB PC as input port Af outportb wBase 0xdc 0x9
24. A A Eber e Se casa E tes Bebe ce 41 4 3 DEMO ZA tio a 43 4 4 DEMOS e das 44 OME PIO D48 User Manual Sep 2000 V2 1 en 2 1 Introduction The OME PIO D48 provides 48 TTL digital I O lines The OME PIO D48 consists of two 24 bit bi direction ports Each 24 bit port supports three 8 bit groups A B C Each 8 bit group can be configured to function as either inputs or latched outputs All groups are configured as inputs upon power up or reset Outputs of the I O buffers are pulled up through 10K resistors to 5VDC Outputs can be changed to pull down by jumper selection on the board This pull up pull down mechanism assures that there are no erroneous outputs at power up until the board is initialized by application software The OME PIO D48 has one D Sub connector and one 50 pin flat cable header The header can be connected to a 50 pin flat cable The flat cable can be connected to OME ADP 37 PCI or OME ADP 50 PCI adapters The adapter can be fixed on the chassis It can be installed in a 5 V PCI bus and supports Plug amp Play 1 1 Features PCI Bus Up to 48 channels of digital I O All 1 O lines buffered on the board Eight bit groups independently selectable for I O on each 24 bit port Input Output programmable I O ports under software control SMD short card power saving Connects directly to OME DB 24P OME DB 24R OME DB 24PR OME DB 24PD OME DB 24RD OME DB 24PRD OME DB 16P8R OME DB 24POR OME DB 24SSR or OME DB
25. AN 0 amp INT CHAN 1 for 77 wait both PC3 are HIGH if inportb wBaset 7 amp 3 0 break printf nWait PC3 of port 2 amp PC3 of port 5 are HIGH INTO H INTO L INT1 H INT1_L 0 enable OME PIO D48 User Manual Sep 2000 V2 1 en NOTE 1 The hold time of INT CHAN O amp INT CHAN 1 must long enough Jos 2 The ISR must read the interrupt status again to E PR the active interrupt sources ey 3 The INT CHAN O amp INT CHAN 1 can be active at the same qe time x7 4R Af void interrupt irq service now ISR can not know which interrupt is active ay new_int_state inportb wBase 7 amp 0x03 read all interrupt KY signal states x int c new_int state now_int state compare new state to E old state El INT CHAN 0 amp INT CHAN 1 can be active at the same time wy if int_c amp 0x01 0 INT CHAN 0 is active xy if new_int states1l 0 now INT_CHAN 0 is changed to LOW ay INTO L else now INT CHAN 0 is changed to HIGH INTO H invert invert 1 to generate a HIGH pulse if int_c amp 0x02 0 INT CHAN 1 is active a if new_int states2 0 now INT CHAN 1 is changed to LOW 5 INT1_L else now INT CHAN 1 is changed to HIGH INT1 H invert invert 2 to generate a HIGH pulse DA now int state new int state update interrupt status outportb wBase 0x2a i
26. Aux wSlotBus wSlotDevice 3 Show_PIO_PISO wSubVendor wSubDevice wSubAux All functions are defined in PIO H Refer to Chapter 4 for more information The important driver information is given as following 1 Resource allocated information e wBase BASE address mapping in this PC e wirq IRQ channel number allocated in this PC 2 PIO PISO identification information e wSubVendor subVendor ID of this board e wSubDevice subDevice ID of this board e wSubAux subAux ID of this board 3 PC s physical slot information e wSlotBus hardware slot ID1 in this PC s slot position e wSlotDevice hardware slot ID2 in this PC s slot position The utility program PIO_PISO EXE will detect amp show all OME PIO PISO cards installed in this PC Refer to Sec 4 1 for more information OME PIO D48 User Manual Sep 2000 V2 1 en 24 3 1 1 PIO_Driverinit PIO_DriverInit amp wBoards wSubVendor wSubDevice wSubAux e wBoards 0 to N gt number of boards found in this PC e wSubVendor gt subVendor ID of board to find e wSubDevice gt subDevice ID of board to find e wSubAux gt subAux ID of board to find This function can detect all PIO PISO series card in the system It is implemented based on the PCI plug amp play mechanism 1 It will find all OME PIO PISO series cards installed in this system amp save all their resource in the library Sample program 1 find all OME PIO D48 in this PC wSubVendor 0x80 wSubDevice 1 wSubAux 0x30
27. B 8255 2 PA PB PC are all input port printf n Test D I DB 24P ON i 1 ok err 0 0 for 77 jl inportb wBase 0xc0 read D I data from CN1 of PIO D48 j2 inportb wBase 0xc4 j3 inportb wBase 0xc8 j11 inportb wBase 0xd0 read D I data from CN2 of PIO D48 322 inportb wBase 0xd4 333 inportb wBase 0xd8 printf n 2x 32x 2x 2x 2x 2x 31 32 33 311 322 333 delay 1000 PIO DriverClose OME PIO D48 User Manual Sep 2000 V2 1 en 43 44 DEMO3 fF oY demol D O demo for OME PIO D48 step 1 connect a ADP 37 PCI to CN2 of OME PIO D48 step 2 connect CN1 of OME PIO D48 to ADP 37 PCI in step 1 by one DB 37 to DB 37 cable step 3 run DEMO3 EXE A este oe SSS ese a a include PIO H WORD wBase wIrq WORD wBase2 wIrq2 int main int i j k jj dd WORD wBoards wRetVal j1j2 j3 t1 t2 t3 t4 t5 WORD wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice char c step 1 find address mapping of PIO PISO cards pa step 2 enable all D I O port step 3 program 8255 1 PA PB PC as output port l step 4 program 8255 2 PA PB PC as input port l step 5 read write test pattern printf n Testl D I O CN1 CN2 OME PIO D48 User Manual Sep 2000 V2 1 en for send test pattern to CN1 of PIO_D48 outportb wBase 0xc0 1 outportb wBase 0xc4 1 outportb wBase 0xc8 1 p
28. B gt for Turbo C 2 xx or above gt for MSC 5 xx or above gt for BC 3 xx or above gt for TC library gt for TC demo program gt TC large model library gt TC huge model library gt TC declaration file gt TC large model library file gt TC declaration file gt TC huge model library file gt MSC declaration file gt MSC large model library file gt MSC declaration file gt MSC huge model library file gt BC declaration file gt BC large model library file gt BC declaration file gt BC huge model library file NOTE The library is validated for all OME PIO PISO series cards OME PIO D48 User Manual Sep 2000 V2 1 4 1 PIO_PISO ae g Find all PIO PISO series cards in this PC system El step 1 plug all PIO PISO cards into PC zy step 2 run PIO PISO EXE if 2 include PIO H WORD wBase wlrqg WORD wBase2 wlrq2 int main int 1144 31 323334 33 00 311 322 733 7443 WORD wBoards wRetVal WORD wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice charra float ok err clrscr wRetVal PIO DriverInit swBoards 0xff 0xff 0xff for PIO PISO printf AnThrer are d PIO PISO Cards in this PC wBoards if wBoards 0 exit 0 printf n for i 0 i lt wBoards i PIO GetConfigAddressSpace i amp wBase wlrq amp wSubVendor wSubDevice wSubAux amp wSlotBus amp wSlotDevice printf nCard_ d wBase x
29. BIOS will assign the proper I O address to OME PIO PISO series card If there is only one OME PIO PISO board the user can identify the board as card_0 If there are two OME PIO PISO boards in the system the user will be very difficult to identify which board is card_0 The software driver can support 16 boards max Therefore the user can install 16 boards of PIO PSIO series in one PC system How to find the card_0 amp card_1 It is difficult to find the card NO The simplest way to identify which card is card_0 is to use wSlotBus amp wSlotDevice as following 1 Remove all OME PIO D48 from this PC 2 Install one OME PIO D48 into the PC s PCI slotl run PIO PISO EXE amp record the wSlotBus1 amp wSlotDevicel 3 Remove all OME PIO D48 from this PC 4 Install one OME PIO D48 into the PC s PCI slot2 run PIO PISO EXE amp record the wSlotBus2 amp wSlotDevice2 5 Repeat 3 amp 4 for all PCI_slot record all wSlotBus amp wSlotDevice The records may be as following PC s PCI slot wSlotBus wSlotDevice Slot 1 0 0x07 Slot 2 0 0x08 Slot 3 0 0x09 Slot 4 0 0x0A PCI BRIDGE Slot_5 1 0x0A Slot_6 1 0x08 Slot_7 1 0x09 Slot_8 1 0x07 The above procedure will record all wSlotBus amp wSlotDevice in this PC These values will be mapped to this PC s physical slot This mapping will not be changed for any PIO PISO cards So it can be used to identify the specified PIO PISO card
30. DEMO4 C CTRL D1 invert non invert the PCO of port 2 refer to Sec 2 5 4 0 non invert 1 invert refer to Sec 4 6 DEMO5 C CTRL D3 CTRL D2 interrupt source select refer to Sec 2 5 2 01 disable PC3 amp PC7 of port 2 as interrupt source 10 INT_CHAN_0 PC3 of port 2 00 INT_CHAN_0 PC38 PC7 of port 2 refer to Sec 4 9 DEMO8 C CTRL D5 CTRL D4 interrupt source select refer to Sec 2 5 3 01 disable PC3 8 PC7 of port 5 as interrupt source 10 INT_CHAN_1 PC3 of port 5 00 INT_CHAN_1 PC38 PC7 of port 5 refer to Sec 4 11 DEMO10 C OME PIO D48 User Manual Sep 2000 V2 1 4 Demo Program It is recommended to read the release note first All important information will be given in release note as following 1 where you can find the software driver amp utility 2 how to install software amp utility 3 where is the diagnostic program 4 FAQ There are many demo program given in the company floppy disk or CD After the software installation the driver will be installed into disk as following e ATC e MSC e BC e TC LIB e TC DEMO e TC LIB Large e TC LIB Huge e TC LIB Large PIO H e TC LIB Large TCPIO_L LIB e TC LIB Huge PIO H e TC LIB Huge TCPIO_H LIB e MSC LIB Large PIO H e MSC LIB Large MSCPIO_L LIB e MSC LIB Huge PIO H e MSC LIB Huge MSCPIO_H LIB e BC LIB Large PIO H e BC LIB Large BCPIO_L LIB e BC LIB Huge PIO H e BC LIB Huge BCPIO_H LI
31. ECIFICATION Slide idas 4 1 3 ORDER DESCRIPTION dido dioss 4 1 4 PELDATA ACQUISITION FAMILY oo ii 5 1 5 PRODUCT CHECK LAST a cie gt 2 HARDWARE CONFIGURATION u cssssccssssssccssssccscssscccsssscccessnscsessccccscsssccessacceessseecscsacecessnee 6 2 1 BOARD LAYOUT amp DEFAULT SETTING ccccsssssccceceesesseeececececsesseseceeececeesseaeeeeececseaaeeeeeeeeeenees 6 22 VOPORT LOCATION enai ie ck eee seco ee cee bee HEI EER Se ee Ens 7 2 3 V O PORT INITIALIZATION OPERATION 0ccccssssscecssscececssececeessececssseececseeecessaeeecsseseceesseeesenseees 7 2 4 ID O ARCHITECTURE fc oc Hab So Gh RAR oe WR Ce OR oe ES 9 2 5 INTERRUPT OPERATION cccsscccccecssssssececececsesssececceecsesesseaececccsesessasececececeeeaaeeeeccscsensaaeaeeeceees 10 2 6 DAUGHTER BOARDS uni idea 17 DT PIN ASSIONMEN Di A acid 22 3 VO CONTROL REGISTER issaissiccscscescescscsseecss svesscabenssceseseesessenscsesdevnes ss dbensssecascsdovesssstessossscdesssenes 24 3 1 HOW TO FIND THE I O ADDRESS cecsccceessececesssccecesssececssececeesseeeceesseeeceeseececssseecsenseeeessnaeees 24 3 2 THE ASSIGNMENT OF I O ADDRESS cccccccsssceceessececessseeecescececsueeeceesuececeeseeesensseeceesseeecneaaeees 29 3 3 THE I O ADDRESS MAP 0 cc cc cceecccepsvettecosnsncacgtucetucsseccedsnsecttescceeseregdecesvertecvecerseesbeceseevsteciee 30 4 DEMO PROGRAM AAA Sisssceosvevsebelssstesetsessessses 38 4 1 PIO PISO at ana ia e no o to la tl to td 39 4 2 DEMOLER
32. HAN 0 PC3 LOW gt INT CHAN 0 generate a high pulse now_int_state 1 now PC3 HIGH else now int state 0 now PC3 LOW 7 B no need to generate high pulse if wIrq gt 8 outportb A2 8259 0x20 outportb A1_8259 0x20 INT_CHAN_O OME PIO D48 User Manual Sep 2000 V2 1 2 5 3 INT_CHAN 1 01 Disable INT_CHAN_1 00 PC3 amp PC7 port 5 as 10 PC3 port 5 Inverted Noninverted select INV1 Enable Disable select EN1 The INT_CHAN_1 must be fixed in low level state normally and must generate a high_pulse to interrupt the PC The INT CHAN 1 can be equal to PC3 amp PC7 or PC3 programmable as following refer to Sec 3 3 9 CTRL_D5 0 CTRL_D4 1 gt INT_CHAN_1 disable CTRL D5 1 CTRL_D4 0 gt INT_CHAN_1 PC3 of port 5 CTRL_D5 0 CTRL_D4 0 gt INT_CHAN_1 PC34 PC7 of port 5 The EN1 can be used to enable disable the INT CHAN_1 as following refer to Sec 3 3 4 EN1 0 gt INT_CHAN_1 disable EN1 1 gt INT_CHAN_1 enable The INV1 can be used to invert non invert the PC3 or PC3 amp PC7 as following Refer to Sec 3 3 6 INV1 0 gt INT_CHAN_1 inverted state of PC3 or PC3 amp PC7 of port 5 INV1 1 gt INT_CHAN_1 non inverted state of PC3 or PC3 amp PC7 of port 5 Refer to demo program for more information as following DEMO10 C gt for INT _CHAN_1 only PC3 amp PC7 of port 5 NOTE refer to Sec 2 5
33. Low char cHigh COUNTER 2 outportb wBase 0xec cConfig outportb wBaset 0xe8 cLow outportb wBase 0xe8 cHigh return NoError OME PIO D48 User Manual Sep 2000 V2 1 en 49 LEMO e demo 5 INT CHAN 2 16 bit event counter no interrupt EL step l apply a init HIGH active LOW signal to PCO of port 2 step 2 run demo5 exe include PIO H define Al_8259 0x20 define A2 8259 0xA0 define EOI 0x20 WO WO WO WO WO in in WO WO RD init _high RD wBase wlrq RD pio d48 c0 char cConfig char cLow char cHigh RD pio d48 cl char cConfig char cLow char cHigh RD pio d48 _ c2 char cConfig char cLow char cHigh t main t do RD wBoards wRetVal t1 t2 t3 t4 t5 RD wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice char c DWORD dwVal unsigned int high low count step 1 find address mapping of PIO PISO cards step 2 enable all D I O port step 3 select PCO of port2 as init HIGH amp active LOW sinal outportb wBase 0xf0 0 CTRL D1 0 gt init HIGH active LOW step 4 latch amp read COUNTER 0 to compute low pulse count printf n 16 bit event down counter n NOTE The 8254 need the extra starting two event clock to initialize So the counter value before the starting two clock is error pio _d48 c0 0x30 0xff 0xff COUNTERO mode 0 down
34. OUNTER 0 to compute HIGH pulse count printf n 16 bit event down counter n T NOTE The 8254 need the extra starting two event_clock to initialize So the counter value before the starting Ef two clock is error pio da48 c0 0x30 0xff 0xff COUNTERO mode 0 down count Oxffff for 77 outportb wBase 0xec 0x00 latch counter 0 low inportb wBase 0xe0 read low count ay high inportb wBase 0xe0 read high count xf count 0xff high 256 0xff low 2 add the starting two clock printf nhigh x low x HIGH pulse count u high low count if kbhit 0 getch break outportb wBase 5 0 disable all interrupt PIO DriverClose DEMO7 KY demo 7 INT_CHAN 2 16 bit down counter using interrupt step l apply a init HIGH amp active LOW signal to PCO of port 2 OME PIO D48 User Manual Sep 2000 V2 1 nen step 2 run demo7 exe EJ z Su include PIO H define Al 8259 0x20 define A2 8259 0xA0 define EOI 0x20 WORD init_low WORD wBase wlrqg WORD pio d48_c0 char cConfig char cLow char cHigh WORD pio d48 cl char cConfig char cLow char cHigh WORD pio d48 c2 char cConfig char cLow char cHigh static void interrupt irq service int COUNT irgmask now_int_ state int main int Lig WORD wBoards wRetVal t1 t2 t3 t4 t5 WORD wSubVendor wSubDevice wSubA
35. One 32 bit programmable internal timer One 16 bit event counter Interrupt source 4 channels Pull up or pull down resistors on I O lines Emulate two industrial standard 8255 mode 0 Buffer output for higher driving capability than 8255 One D Sub connector one 50 pin flat cable connector Automatically detected by Windows 95 98 NT No base address or IRQ switches to set OME PIO D48 User Manual Sep 2000 V2 1 en 3 1 2 Specifications All inputs are TTL compatible Logic high voltage 2 4V Min Logic low voltage 0 8V Max All outputs are TTL compatible Sink current 64 mA Max Source current 32 mA Max Power consumption 5V Y 900mA Environmental Operating Temp 0 C to 60 C Storage Temp 20 C to 80 C Humidity 0 to 90 non condensing Dimension 156mm x 105mm 1 3 Order Description e o o o o o o o yy OME PIO D48 PCI bus 48 bit opto 22 DIO board 3 1 Options OME DB 24P DB 24PD 24 channel isolated D l board OME DB 24R DB 24RD 24 channel relay board OME DB 24PR DB 24PRD 24 channel power relay board OME DB 16P8R 16 channel isolated D I and 8 channel relay output board OME DB 24POR 24 channel Photo Mos output board OME DB 24SSR 24 channel Solid State output board OME DB 24C 24 channel open collector output board OME ADP 37 PCI extender 50 pin header to OME DB 37 for PCI Bus I O boards OME ADP 50 PCI extender 50 pin header to 50 pin header for PCI Bus I O boards OME
36. User s Guide gt www omega com e mail info omega com CERTIFIED CERTIFIED CORPORATE QUALITY CORPORATE QUALITY STAMFORD CT MANCHESTER UK OME PIO D48 PCI Bus Digital I O Board Hardware Manual omega con CEOMEGA OMEGAnet Online Service Internet e mail www omega com info omega com USA ISO 9001 Certified Canada Servicing North America One Omega Drive P O Box 4047 Stamford CT 06907 0047 TEL 203 359 1660 FAX 203 359 7700 e mail info omega com 976 Bergar Laval Quebec H7L 5A1 Canada TEL 514 856 6928 FAX 514 856 6886 e mail info omega ca For immediate technical or application assistance USA and Canada Mexico Benelux Czech Republic France Germany Austria United Kingdom ISO 9002 Certified Sales Service 1 800 826 6342 1 800 TC OMEGA Customer Service 1 800 622 2378 1 800 622 BEST Engineering Service 1 800 872 9436 1 800 USA WHEN TELEX 996404 EASYLINK 62968934 CABLE OMEGA En Espa ol 001 203 359 7803 e mail espanol omega com FAX 001 203 359 7807 info omega com mx Servicing Europe Postbus 8034 1180 LA Amstelveen The Netherlands TEL 31 0 20 3472121 FAX 31 0 20 6434643 Toll Free in Benelux 0800 0993344 e mail sales omegaeng nl Frystatska 184 733 01 Karvin Czech Republic TEL 420 0 59 6311899 FAX 420 0 59 6311114 Toll Free 0800 1 66342 e mail info omegashop cz 11 ru
37. atibles 4 Datalogging Systems A Recorders Printers amp Plotters HEATERS 4 Heating Cable 4 Cartridge amp Strip Heaters 4 Immersion amp Band Heaters 4 Flexible Heaters 4 Laboratory Heaters ENVIRONMENTAL MONITORING AND CONTROL 4 Metering amp Control Instrumentation 4 Refractometers 4 Pumps amp Tubing A Air Soil amp Water Monitors A Industrial Water Wastewater Treatment A pH Conductivity amp Dissolved Oxygen Instruments M4039 0104
38. count Oxffff for 77 outporth wBase 0xec 0x00 latch counter 0 low inportb wBase 0xe0 read low count high inportb wBase 0xe0 read high count count 0xff high 256 0xff low 2 add the starting outportb wBaset5 0 two clock printf nhigh x low x LOW pulse count u high low count if kbhit 0 getch break disable all interrupt PIO DriverClose OME PIO D48 User Manual Sep 2000 V2 1 7 7 zi El 7 5 EF E oy if Ef E e ee A E demo 6 INT_CHAN 2 16 bit event counter no interrupt El step l apply a init LOW amp active HIGH signal to PCO of port 2 step 2 run demo6 exe JA EY include PIO H define Al_8259 0x20 define A2 8259 0xA0 define EOI 0x20 WORD init high WORD wBase wlrq WORD pio d48_c0 char cConfig char cLow char cHigh WORD pio d48 cl char cConfig char cLow char cHigh WORD pio d48 c2 char cConfig char cLow char cHigh int main int ras JA WORD wBoards wRetVal t1 t2 t3 t4 t5 WORD wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice char c DWORD dwVal unsigned int high low count step 1 find address mapping of PIO PISO cards step 2 enable all D I O port step 3 select PCO of port_2 as init LOW amp active HIGH sinal outportb wBase 0xf0 2 CTRL Di1 1 gt init LOW active HIGH step 4 latch amp read C
39. e Jacques Cartier 78280 Guyancourt France TEL 33 0 1 61 37 29 00 FAX 33 0 1 30 57 54 27 Toll Free in France 0800 466 342 e mail salesWomega fr Daimlerstrasse 26 D 75392 Deckenpfronn Germany TEL 49 0 7056 9398 0 FAX 49 0 7056 9398 29 Toll Free in Germany 0800 639 7678 e mail info omega de One Omega Drive River Bend Technology Centre Northbank Irlam Manchester M44 5BD United Kingdom TEL 44 0 161 777 6611 FAX 44 0 161 777 6622 Toll Free in United Kingdom 0800 488 488 e mail salesWomega co uk It is the policy of OMEGA to comply with all worldwide safety and EMC EMI regulations that apply OMEGA is constantly pursuing certification of its products to the European New Approach Directives OMEGA will add the CE mark to every appropriate device upon certification The information contained in this document is believed to be correct but OMEGA Engineering Inc accepts no liability for any errors it contains and reserves the right to alter specifications without notice WARNING These products are not designed for use in and should not be used for patient connected applications OME PIO D48 User Manual OME PIO D48 User Manual Sep 2000 V2 1 nen Table of Contents Ni INTRODUCTION wrscssssssnccsossesecadssenvcvsnscccsvscesacsusosesesveaasessseccsseceseesvcnsecsuescdssuuscdasseesacsusedostesseesevses 3 1 1 EBATURES ct REE RT ESS PEPER ORS Pe REE Eat RSS PO CT ADCS OL SEC ET Ode EE E EET EEE 3 1 2 SP
40. e of this card wConfigSpace i 1 wlIrq save all resource of this card step3 control the OME PIO D48 directly wBase wConfigSpace 0 0 get base address the card_0 outport wBase enable all D I O operation of card_0 wBase wConfigSpace 1 0 get base address the card_1 outport wBase 1 enable all D I O operation of card_1 OME PIO D48 User Manual Sep 2000 V2 1 en 27 3 1 3 Show PIO PISO Show_PIO_PISO wSubVendor wSubDevice wSubAux e wSubVendor gt subVendor ID of board to find e wSubDevice gt subDevice ID of board to find e wSubAux gt subAux ID of board to find This function will show a text string for this special subIDs This text string is the same as that defined in PIO H The demo program is given as following wRetVal PIO_DriverInit amp wBoards Oxff OxffOxff find all PIO_PISO printf nThrer are d PIO PISO Cards in this PC wBoards if wBoards 0 exit 0 printf n for i 0 i lt wBoards i PIO GetConfigAddressSpace i amp wBase wlrq amp wSubVendor amp wSubDevice wSubAux amp wSlotBus amp wSlotDevice printf nCard d wBase x wlrq x SUubDID x 3x x Slot ID x x i wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice printf gt ShowPioPiso wSubVendor wSubDevice wSubAux OME PIO D48 User Manual Sep 2000 V2 1 nen 28 3 2 The Assignment of I O Address The plug amp play
41. ed to invert non invert the PC3 or PC3 amp PC7 as following Refer to Sec 3 3 6 INV0 0 gt INT_CHAN _0 inverted state of PC3 or PC3 amp PC7 of port 2 INVO 1 gt INT_CHAN _0 non inverted state of PC3 or PC3 amp PC7 of port 2 Refer to demo program for more information as following DEMO8 C gt for INT_CHAN_0 only PC3 of port 2 DEMO9 C gt for INT_CHAN_0 only PC3 amp PC7 of port 2 OME PIO D48 User Manual Sep 2000 V2 1 een 12 If the PC3 is a level signal the interrupt service routine should use INVO to inverted non inverted the PC3 for high pulse generation as following void interrupt irq service this ISR is in DEMO8 C el if now_int_state 1 now PC3 is changed to LOW a gt INT CHAN 3 PC3 HIGH now ir COUNT find a LOW pulse PC3 el If inport wBase 7 1 0 the PC3 is still fixed in LOW gt need to generate a high pulse outportb wBase 0x2a 1 INVO select the non inverted input b INT_CHAN 0O PC3 LOW gt INT CHAN 0 generate a high pulse now_int_state 0 now PC3 LOW else now int state 1 now PC3 HIGH 7 7 no need to generate high pulse else now PC3 is changed to HIGH c gt INT CHAN 0 PC3 HIGH now ES find a HIGH pulse PC3 If inport wBase 7 1 1 the PC3 is still fixed in HIGH need to generate a high_pulse outportb wBase 0x2a 0 INVO select the inverted input d INT_C
42. ep 2000 V2 1 A 2 ee demo 9 INT_CHAN 0 interrupt demo 7 step l apply a init HIGH amp active LOW signal to PC3 of port 2 13 note The PC7 of port 2 is used to enable the interrupt px operation if PC7 GND gt PC3 interrupt is enable Y if PC7 VCC gt PC3 interrupt is disable Si or step l apply a init_LOW amp active HIGH signal to PC7 of port 2 las note The PC3 of port 2 is used to enable the interrupt x operation if PC3 VCC gt PCT interrupt is enable xy if PC3 GND gt PC7 interrupt is disable ze step 2 run demo9 exe ae a ee eres Ti ee es include PIO H define Al 8259 0x20 define A2 8259 0xA0 define EOI 0x20 WORD init_high WORD wBase wlrqg WORD pio d48_c0 char cConfig char cLow char cHigh WORD pio d48 cl char cConfig char cLow char cHigh WORD pio d48 c2 char cConfig char cLow char cHigh static void interrupt irq service int COUNT irgmask now_int state int main int Ipa WORD wBoards wRetVal t1 t2 t3 t4 t5 WORD wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice char Cc DWORD dwVal step 1 find address mapping of PIO PISO cards E KY step 2 enable all D I O port init_high interrupt initialize INIT CHAN 0 is HIGH now COUNT 0 printf n show the count of Low pulse n for 77 printf nLow Pulse Count d
43. fords our customers the latest in technology and engineering OMEGA is a registered trademark of OMEGA ENGINEERING INC Copyright 2002 OMEGA ENGINEERING INC All rights reserved This document may not be copied photocopied reproduced translated or reduced to any electronic medium or machine readable form in whole or in part without the prior written consent of OMEGA ENGINEERING INC Where Do Find Everything Need for Process Measurement and Control OMEGA Of Course Shop online at www omega com TEMPERATURE Pag Thermocouple RTD Thermistor Probes Connectors Panels amp Assemblies 4 Wire Thermocouple RTD amp Thermistor A Calibrators amp Ice Point References A Recorders Controllers amp Process Monitors 4 Infrared Pyrometers PRESSURE STRAIN AND FORCE 4 Transducers amp Strain Gages 4 Load Cells amp Pressure Gages 4 Displacement Transducers A Instrumentation amp Accessories FLOW LEVEL 4 Rotameters Gas Mass Flowmeters amp Flow Computers WF Air Velocity Indicators A Turbine Paddlewheel Systems A Totalizers amp Batch Controllers pH CONDUCTIVITY 4 pH Electrodes Testers amp Accessories 4 Benchtop Laboratory Meters 4 Controllers Calibrators Simulators amp Pumps 4 Industrial pH amp Conductivity Equipment DATA ACQUISITION 4 Data Acquisition amp Engineering Software 4 Communications Based Acquisition Systems 4 Plug in Cards for Apple IBM amp Comp
44. har cConfig char cLow char cHigh COUNTER_0 outportb wBase 0xec cConfig outportb wBaset 0xe0 cLow outportb wBase 0xe0 cHigh return NoError WORD pio d48 cl char cConfig char cLow char cHigh COUNTER_1 outportb wBase 0xec cConfig outportb wBaset 0xe4 cLow outportb wBase 0xe4 cHigh return NoError WORD pio d48 c2 char cConfig char cLow char cHigh COUNTER 2 outportb wBase 0xec cConfig outportb wBaset 0xe8 cLow outportb wBase 0xe8 cHigh return NoError OME PIO D48 User Manual Sep 2000 V2 1 nen 35 The configuration of 8254 counter 8254 Timer Counter yp A aa Bh Sa Se EE CLKO GATEO Counter 0 OUTO INT_CHAN 2 PCO port 2 CLK1 32 768KHz or 2MHz Counter 1 CLK2 GATE2 Counter 2 INT CHAN 3 OUTA 1 OUT2 GATE1 A Bint Das o a Refer to the following demo program for more information VCC e DEMO4 C counter0 demo using interrupt INT CHAN 3 e DEMOS C counterl counter2 demo no interrupt e DEMO6 C counterl counter2 demo no interrupt e DEMO7 C counterl counter2 demo using interrupt INT CHAN _ 2 OME PIO D48 User Manual Sep 2000 V2 1 3 3 9 Read Write Clock Int Control Register Read Write wBase 0xf0 clock int control register CTRL DO timer source CLK1selection refer to Sec 3 3 8 0 2MHz 1 32 768KHz refer to Sec 4 5
45. high_pulse to interrupt the PC The Cin can be 2M 32768Hz programmable as following refer to Sec 3 3 9 CTRL_D0 0 gt Cin1 2M clock source CTRL_DO0 1 gt Cin1 32768 Hz clock source The EN3 can be used to enable disable the INT CHAN 3 as following refer to Sec 3 3 4 EN3 0 gt INT_CHAN_3 disable EN3 1 gt INT_CHAN_3 enable The INV3 can be used to invert non invert the Cout0 as following Refer to Sec 3 3 6 INV2 3 gt INT_CHAN _3 inverte of Cout2 INV2 3 gt INT_CHAN_3 non inverte of Cout2 Refer to demo program for more information as following DEMO4 C gt for INT_CHAN_3 only Cout2 NOTE refer to Sec 2 5 2 for active high pulse generation OME PIO D48 User Manual Sep 2000 V2 1 en 16 2 6 Daughter Boards 2 6 1 OME DB 37 The OME DB 37 is a general purpose daughter board for D sub 37 pins It is designed for easy wire connection I ARA f 2 6 2 OME DN 37 8 OME DN 50 The OME DN 37 is a general purpose daughter board for OME DB 37 with DIN Rail Mounting The OME DN 50 is designed for 50 pin flat cable header Those boards are designed for easy wire connection Both have Din Rail mounting OME DN 37 2 6 3 OME DB 8125 The OME DB 8125 is a general purpose screw terminal board designed for ease of wiring There are one DB 37 amp two 20 pin flat cable headers in the OME DB 8125 OME DB 8125 OME DB 37 or 1 inma ti 20 pin flat cable header m
46. inport O gt PC low nipple outport There are six 8 bit I O port in the OME PIO D48 Every I O port can be programmed as D I or D O port based on control word setting All six ports are configured as D I ports when the first power on outportb wBase 0xcc 0x80 port 0 port 1 port 2 are D O port outportb wBase 0xc0 V 1 write to port_0 PA outportb wBase 0xc4 V2 write to port_1 PB outportb wBase 0xc8 V3 write to port_2 PC outportb wBase 0xdc 0x9B port 3 port 4 port 5 are D I port V1 inportb wBase 0xd0 read from port 3 PA el V2 inportb wBase 0xd4 read from port 4 PB ia V3 inportb wBase 0xd8 read from port_5 PC f OME PIO D48 User Manual Sep 2000 V2 1 nen 34 3 3 8 Read Write 8254 Read Write wBase 0xe0 8254 counter 0 Read Write wBase 0xe4 8254 counter 1 Read Write wBase 0xe8 8254 counter 2 Read Write wBase 0xec 8254 control word 8254 control word BCD 0 binary count 1 BCD count M2 M1 M0 000 mode0 interrupt on terminal count 001 mode1 programmable one shot 010 mode2 rate generator 011 mode3 square wave generator 100 mode4 software triggered pulse 101 mode5 hardware triggered pulse RL1 RLO 00 counter latch instruction 01 read write low counter byte only 10 read write high counter byte only 11 read write low counter byte first then high counter byte SC1 SCO 00 counterO 01 counter1 10 counter2 11 read back command WORD pio d48 c0 c
47. m In a a OME PIO D48 User Manual Sep 2000 V2 1 en 17 2 6 4 OME ADP 37 PCI amp OME ADP 50 PCI The OME ADP 37 PCI OME ADP 50 PCI are extender for 50 pin header One side of OME ADP 37 PCI amp OME ADP 50 PCI can be connected to a 50 pin header The other side can be mounted on the PC chassis as following OME ADP 37 PCI 50 pin header to OME DB 37 extender OME ADP 50 PCI 50 pin header to 50 pin header extender NOTE The user can choose the suitable extender for his own applications OME PIO D48 User Manual Sep 2000 V2 1 een 18 2 6 5 OME DB 24P PD Isolated Input Board The OME DB 24P DB 24PD is a 24 channel isolated digital input daughter board The optically isolated inputs of the OME DB 24P DB 24PD consists of a bi directional opto coupler with a resistor for current sensing You can use the OME DB 24P DB 24PD to sense DC signal from TTL levels up to 24V or use the DB 24P to sense a wide range of AC signals You can use this board to isolate the computer from large common mode voltage ground loops and transient voltage spike that often occur in industrial environments OME PIO D48 Opto Isolated AC or DC Signal OV to 24V OME DB 24P OME DB 24PD 50 pin flat cable header Yes Yes D sub 37 pin header No Yes Other specifications Same OME PIO D48 User Manual Sep 2000 V2 1 en 19 2 6 6 OME DB 24R RD Relay Board The OME DB 24R DB 24RD 24 channel relay output board
48. m interrupt channel_0 INV1 control interrupt channel_1 INV2 control interrupt channel_2 INV3 control interrupt channel_3 outportb wBase 0x2a 0 select the inverted input from all 4 channels outportb wBase 0x2a 0x0f select the non inverted input from all 4 channels outportb wBase 0x2a 0x0e select the inverted input of INT CHAN 0 El select the non inverted input from the others outportb wBase 0x2a 0x0c select the inverted input of INT CHAN 0 INT CHAN 1 select the non inverted input from the others Refer to Sec 2 5 for more information Refer to DEMOS C for more information OME PIO D48 User Manual Sep 2000 V2 1 en 33 3 3 7 Read Write 8255 1 8 8255 2 I O port Read Write wBase 0xc0 8255 1 PA gt port 0 Read Write wBase 0xc4 8255 1 PB gt port _1 Read Write wBase 0xc8 8255 1 PC gt port 2 Read Write wBase 0xcc 8255 1 control word gt control D I or D O of port_0 1 2 Read Write wBase 0xd0 8255 2 PA gt port_3 Read Write wBase 0xd4 8255 2 PB gt port 4 Read Write wBase 0xd8 8255 2 PC gt port_5 Read Write wBase 0xdc 8255 2 control word gt control D I or D O of port_3 4 5 Note Refer to Sec 3 1 for more information about wBase 8255 control word mode 0 po offs jo pb fo D4 1 gt PA inport 0 gt PA outport D3 1 gt PC high nipple inport O gt PC high nipple outport D1 1 gt PB inport 0 gt PB outport DO 1 gt PC low nipple
49. nt main int ipag WORD wBoards wRetVal t1 t2 t3 t4 t5 WORD wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice char Gy DWORD dwVal step 1 find address mapping of PIO PISO cards step 2 enable all D I O port init high interrupt initialize INIT_CHAN 0 is HIGH now COUNT 0 printf n show the count of Low pulse n for 77 printf nLow Pulse Count d initial is HIGH active is LOW COUNT if kbhit 0 getch break outportb wBase 5 0 disable all interrupt PIO DriverClose Use INT CHAN 0 as external interrupt signal WORD init_high DWORD dwVal disable outportb wBase 5 0 disable all interrupt if wIrq lt 8 irqmask inporthb Al _8259 1 outporth Al _ 8259 1 irgmask Oxff 1 lt lt wiIrgq setvect wIrq 8 irq service else irqmask inportb Al_8259 1 outportb Al_8259 1 irgqmask amp Oxfb IRQ2 outportb Al_8259 1 irqmask amp 0xff 1 lt lt wIrq OME PIO D48 User Manual Sep 2000 V2 1 nen 54 irqmask inportb A2 8259 1 outportb A2 8259 1 irqmask amp Oxff 1 lt lt wIrq 8 setvect wIrg 8 0x70 irq service select PC3 of port 2 as interrupt signal Ef outportb wBase 0xf0 0x18 CTRL _D3 1 CTRL_D2 0 gt INT CHAN 0 PC3 of port_2 E for 7 wait PC3 HIGH e if inportb wBaset 7 amp 1 0 break printf nWait PC3 HIGH
50. nterrupt is disable Jos PC7 GND gt PC3 interrupt is enable JK E E A ea Sle ES AAA oe oe NR E OE now the PC3 of port 5 is HIGH gt INV1 must select the inverted PC3 gt INT CHAN 1 PC3 init_LOW active HIGH outportb wBaset 0x2a 0 select the inverted PC3 INT CHAN 1 PC3 now_int_state 1 now PC3 is high outportb wBaset5 2 enable INT CHAN 1 interrupt for 473 wait PC3 amp PC7 HIGH xy if inportb wBase 7 amp 2 0 break printf AnWait PC3 amp PC7 HIGH enable OME PIO D48 User Manual Sep 2000 V2 1 ES void interrupt irq _service if now_int_state 1 JE E LE EnS COUNT ys R if inportb wBase 7 amp 2 0 fy outportb wBase 0x2a 2 INV1 INT_CHAN_1 PC3 LOW gt now PC3 is changed to LOW INT CHAN _1 PC3 HIGH now find a LOW pulse PC3 x the PC3 is still fixed in LOW kj gt need to generate a high pulse select the non inverted input af INT CHAN 1 generate a high pulse now int state 0 now PC3 LOW tae else now_int_state 1 now PC3 HIGH no need to generate high pulse else now PC3 is changed to HIGH gt INT CHAN 1 PC3 HIGH now 2 find a HIGH pulse PC3 E if inportb wBaset 7 amp 2 2 the PC3 is still fixed in LOW X gt need to generate a high pulse outportb wBase 0x2a 0 INV1 select
51. nvert generate a HIGH pulse if wIrq gt 8 outportb A2 8259 0x20 outportb A1_8259 0x20 OME PIO D48 User Manual Sep 2000 V2 1 nen WARRANTY DISCLAIMER OMEGA ENGINEERING INC warrants this unit to be free of defects in materials and workmanship for a period of 13 months from date of purchase OMEGA s WARRANTY adds an additional one 1 month grace period to the normal one 1 year product warranty to cover handling and shipping time This ensures that OMEGA customers receive maximum coverage on each product If the unit malfunctions it must be returned to the factory for evaluation OMEGA s Customer Service Department will issue an Authorized Return AR number immediately upon phone or written request Upon examination by OMEGA if the unit is found to be defective it will be repaired or replaced at no charge OMEGA s WARRANTY does not apply to defects resulting from any action of the purchaser including but not limited to mishandling improper interfacing operation outside of design limits improper repair or unauthorized modification This WARRANTY is VOID if the unit shows evidence of having been tampered with or shows evidence of having been damaged as a result of excessive corrosion or current heat moisture or vibration improper specification misapplication misuse or other operating conditions outside of OMEGA s control Components which wear are not warranted including but not limited to contact points fuses and
52. o d48 c0 char cConfig char cLow outportb wBase 0xec cConfig outportb wBaset 0xe0 cLow outportb wBase 0xe0 cHigh return No Error WORD pio d48 cl char cConfig char cLow outportb wBase 0xec cConfig outportb wBaset 0xe4 cLow outportb wBase 0xe4 cHigh return No Error WORD pio d48 c2 char cConfig char cLow outportb wBase 0xec cConfig outportb wBaset 0xe8 cLow outportb wBase 0xe8 cHigh return No Error OME PIO D48 User Manual Sep 2000 V2 1 char char char cHigh COUNT cHigh COUNT cHigh COUNT 7 El iS 2 e ef As if demo 10 INT_CHAN 1 interrupt demo step 1 apply a init HIGH active LON signal to PC3 of port 5 13 note The PC7 of p rt _5 is used to enable the interrupt oes operation if PC7 GND gt PC3 interrupt is enable Ey if PC7 VCC gt PC3_interrupt is disable step 2 run demol0 exe 3 include PIO H define A1 8259 0x20 define A2 8259 0xA0 define EOI 0x20 WORD init_high WORD wBase wIrq WORD pio d48_c0 char cConfig char cLow char cHigh WORD pio d48 cl char cConfig char cLow char cHigh WORD pio d48 c2 char cConfig char cLow char cHigh static void interrupt irq service int COUNT irgmask now_int state int main int tyas WORD wBoards wRetVal t1 t2 t3 t4 t5 WORD wSubVendor
53. rintf nCN 1 output CN2 input Output x 1 delay 1000 delay for D O settle time read test pattern to CN2 of PIO_D48 jl inportb wBase 0xd0 j2 inportb wBase 0xd4 j3 inportb wBase 0xd8 printf DI 2x 2x 2x j1 j2 j3 delay 1000 if kbhit 0 c getch if c q C Q break OME PIO D48 User Manual Sep 2000 V2 1 i i lt lt next bit if i gt 0x80 i l c getch if c 0 c q break printf n Testl D I O CN1 CN2 NSS printf n Test2 D I O CN1 CN2 Me ie step 6 program 8255 1 PA PB PC as input port outportb wBase 0xcc 0x9B 8255 1 PA PB PC are all output port step 7 program 8255 2 PA PB PC as outport port ei outportb wBaset 0xdc 0x80 8255 2 PA PB PC are all input port outportb wBaset 0xd0 0 8255 1 PA initial 0 outportb wBase 0xd4 0 8255 1 PB initial 0 outportb wBase 0xd8 0 8255 1 PB initial 0 step 8 read write test pattern i 1 for 55 send test pattern to CN2 of PIO D48 outportb wBase 0xd0 i outportb wBase 0xd4 i printf nCNl input CN2 output Output x i outportb wBase 0xd8 1 delay 1000 delay for D O settle time read test pattern to CN1 of PIO D48 j1 inportb wBase 0xc0 32 inportb wBase 0xc4 J3 inportb wBase 0xc8 printf DI 2x 2x 2x 31 432 343 delay 1000 if kbhit 0
54. s set forth in our basic WARRANTY DISCLAIMER language and additionally purchaser will indemnify OMEGA and hold OMEGA harmless from any liability or damage whatsoever arising out of the use of the Product s in such a manner RETURN REQUESTS INQUIRIES Direct all warranty and repair requests inquiries to the OMEGA Customer Service Department BEFORE RETURNING ANY PRODUCT S TO OMEGA PURCHASER MUST OBTAIN AN AUTHORIZED RETURN AR NUMBER FROM OMEGA S CUSTOMER SERVICE DEPARTMENT IN ORDER TO AVOID PROCESSING DELAYS The assigned AR number should then be marked on the outside of the return package and on any correspondence The purchaser is responsible for shipping charges freight insurance and proper packaging to prevent breakage in transit FOR WARRANTY RETURNS please have the FOR NON WARRANTY REPAIRS consult OMEGA following information available BEFORE for current repair charges Have the following contacting OMEGA information available BEFORE contacting OMEGA 1 Purchase Order number under which the product 1 Purchase Order number to cover the COST was PURCHASED of the repair 2 Model and serial number of the product under 2 Model and serial number of the product and warranty and 3 Repair instructions and or specific problems 3 Repair instructions and or specific problems relative to the product relative to the product OMEGA s policy is to make running changes not model changes whenever an improvement is possible This af
55. sub IDs We offer the same function calls irrespective of the board version OME PIO D48 User Manual Sep 2000 V2 1 3 1 2 PIO _GetConfigAddressSpace PIO GetConfigAddressSpace wBoardNo wBase w Irq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice e wBoardNo 0 to N gt totally N 1 boards found by PIO Drivelnit e wBase gt base address of the board control word e wIrq gt allocated IRQ channel number of this board e wSubVendor gt subVendor ID of this board e wSubDevice gt subDevice ID of this board e wSubAux gt subAux ID of this board e wSlotBus gt hardware slot ID1 of this board e wSlotDevice gt hardware slot ID2 of this board The user can use this function to save resource of all PIO PISO cards installed in this system Then the application program can control all functions of PIO PISO series card directly The sample program source is given as following stepl detect all OME PIO D48 cards first wSubVendor 0x80 wSubDevice 1 wSubAux 0x30 for PIO_D48 wRetVal PIO_DriverInit amp wBoards wSubVendor wSubDevice wSubAux printf Threr are d OME PIO D48 Cards in this PC n wBoards step2 save resource of all OME PIO D48 cards installed in this PC for i 0 i lt wBoards i PIO_GetConfigAddressSpace i amp wBase amp wlrq amp t1 amp t2 amp t3 amp t4 amp t5 printf nCard_ d wBase x wIrq x i wBase wIrq wConfigSpace 1 0 wBaseAddress save all resourc
56. th the old status to identify the active signals If INT_CHAN_0 is active service it If INT_CHAN_1 is active service it If INT_CHAN_ 2 is active service it If INT_CHAN_ 3 is active service it Update interrupt status TON Gs D Note If the interrupt signal is too short the new status may be as same as old status In that condition the interrupt service routine can not identify which interrupt source is active So the interrupt signal must have hold_active long enough until the interrupt service routine is executed This hold_time is different for different O S The hold_time can be as short as micro second or as long as second In general 20ms is enough for all O S OME PIO D48 User Manual Sep 2000 V2 1 nen 10 2 5 1 Interrupt Block Diagram of OME PIO D48 INT_CHAN_0 INT_CHAN_1 INT INT_CHAN_2 Level trigger INT_CHAN_3 initial_low active_high The interrupt output signal of OME PIO D48 INTA is level trigger amp Active _Low If the INTI generate a low pulse the OME PIO D48 will interrupt the PC once a time If the INT is fixed in low level the OME PIO D48 will interrupt the PC continuously So the INT_CHAN_0 1 2 3 must be controlled in a pulse type signals They must be fixed in low level state normally and must generate a high_pulse to interrupt the PC The priority of INT CHAN_0 1 2 3 is the same If all these four signals are active
57. to LOW 7 gt INT CHAN 3 COUT2 HIGH now COUNT find a LOW pulse COUT2 if inportb wBase 7 8 8 0 the COUT2 is still fixed in LOW gt need to generate a high pulse outportb wBase 0x2a 8 INV3 select the non inverted input INT CHAN 3 COUT2 LOW gt if INT CHAN 3 generate a high pulse now_int_state 0 now COUT2 LOW A else now_int_state 1 now COUT2 HIGH no need to generate high pulse else now COUT2 is changed to HIGH E gt INT CHAN 3 COUT2 HIGH now ef find a HIGH pulse COUT2 if inportb wBase 7 amp 8 8 the COUT2 is still fixed in HIGH gt need to generate a high pulse outportb wBase 0x2a 0 INV3 select the inverted input ES INT CHAN 3 COUT2 LOW gt KI INT_CHAN 3 generate a high pulse now _int_state 1 now COUT2 HIGH if else now_int_state 0 now COUT2 LOW ae no need to generate high pulse if wIrq gt 8 outportb A2 8259 0x20 outportb A1_8259 0x20 x WORD pio d48 cO char cConfig char cLow char cHigh COUNTER_0 outportb wBase 0xec cConfig outportb wBaset 0xe0 cLow outportb wBase 0xe0 cHigh return NoError WORD pio d48 cl char cConfig char cLow char cHigh COUNTER_1 outportb wBase 0xec cConfig outportb wBase 0xe4 cLow outportb wBase 0xe4 cHigh return NoError WORD pio d48 c2 char cConfig char c
58. triacs OMEGA is pleased to offer suggestions on the use of its various products However OMEGA neither assumes responsibility for any omissions or errors nor assumes liability for any damages that result from the use of its products in accordance with information provided by OMEGA either verbal or written OMEGA warrants only that the parts manufactured by it will be as specified and free of defects OMEGA MAKES NO OTHER WARRANTIES OR REPRESENTATIONS OF ANY KIND WHATSOEVER EXPRESS OR IMPLIED EXCEPT THAT OF TITLE AND ALL IMPLIED WARRANTIES INCLUDING ANY WARRANTY OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY DISCLAIMED LIMITATION OF LIABILITY The remedies of purchaser set forth herein are exclusive and the total liability of OMEGA with respect to this order whether based on contract warranty negligence indemnification strict liability or otherwise shall not exceed the purchase price of the component upon which liability is based In no event shall OMEGA be liable for consequential incidental or special damages CONDITIONS Equipment sold by OMEGA is not intended to be used nor shall it be used 1 as a Basic Component under 10 CFR 21 NRC used in or with any nuclear installation or activity or 2 in medical applications or used on humans Should any Product s be used in or with any nuclear installation or activity medical application used on humans or misused in any way OMEGA assumes no responsibility a
59. ubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf AnCard sd wBase 5x wlrq x subID x x x Slot ID x x i wBase wIrqg wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice prat gt ShowPioPiso wSubVendor wSubDevice wSubAux select card_0 el PIO GetConfigAddressSpace 0 amp wBase wlIrq amp t1 amp t2 amp t3 amp t4 amp t5 step 2 enable all D I O port outportb wBase 1 enable D I O step 3 program 8255 1 PA PB PC as output port first 3 port outportb wBase 0xcc 0x80 8255 1 PA PB PC are all output port outportb wBase 0xc0 0 8255 1 PA initial value 0 outportb wBase 0xc4 0 8255 1 PB initial value 0 outportb wBase 0xc8 0 8255 1 PB initial value 0 step 4 program 8255 2 PA PB PC as output port the other port outportb wBase 0xdc 0x80 8255 2 PA PB PC are all output port outportb wBase 0xd0 0 8255 2 PA initial value 0 outportb wBase 0xd4 0 8255 2 PB initial value 0 outportb wBase 0xd8 0 8255 2 PB initial value 0 OME PIO D48 User Manual Sep 2000 V2 1 en 8 2 4 D I O Architecture VO select Sec 3 3 7 RESET Sec 3 3 1 disable input Latch sec 3 3 7 p Clock input D O latch CKT disable Buffer input Sec 3 3 7 gt Clock input D I buffer CKT VCC GND pull pull low JP2 JP3 JP4 JP5 JP6 JP7 gt pull high
60. ux wSlotBus wSlotDevice char Cc DWORD dwVal step 1 find address mapping of PIO PISO cards step 2 enable all D I O port init_low interrupt initialize INT CHAN 2 now is initial LOW COUNT 0 printf n show the count of Low pulse n for 77 printf AnInterrupt Count d one interrupt 5 low pulse COUNT if kbhit 0 getch break outportb wBase 5 0 disable all interrupt PIO DriverClose OME PIO D48 User Manual Sep 2000 V2 1 en Use INT_CHAN 2 as external interrupt signal WORD init_low DWORD dwVal disable if wIrq lt 8 irqmask inportb A1_8259 1 outportb A1 _8259 1 irqmask Oxff 1 lt lt wIrq setvect wIrq 8 irq service else irqmask inportb A1_8259 1 outportb A1 8259 1 irqmask amp Oxfb IRQ2 outportb Al 8259 1 irqmask amp Oxff 1 lt lt wlrq irqmask inportb A2 8259 1 outportb A2 8259 1 irgqmask amp Oxff 1 lt lt wlrq 8 setvect wIrg 8 0x70 irq service outportb wBaset 5 0 disable all interrupt select PCO of port 2 as init HIGH amp active LOW sinal E outportb wBase 0xf0 0 CTRL_D1 0 gt init HIGH active LOW NOTE The 8254 need the extra starting two event_clock to initialize So the counter value before the starting E two clock is error pio d48_ c0 0x30 3 0 COUNTERO mode 0 do
61. wBase 5 1 for 55 wait PC3 amp PC7 HIGH select the inverted PC3 INT CHAN 0 PC3 now PC3 is high enable INT CHAN 0 interrupt if inportb wBaset 7 amp 1 0 break printf nWait PC3 amp PC7 HIGH enable OME PIO D48 User Manual Sep 2000 V2 1 x y void interrupt irq _service if now_int_state 1 now PC3 is changed to LOW Bip gt INT CHAN 3 PC3 HIGH now ey COUNT find a LOW pulse PC3 E if inportb wBaset 7 amp 1 0 the PC3 is still fixed in LOW gt need to generate a high pulse outportb wBase 0x2a 1 INVO select the non inverted input INT CHAN 0 PC3 LOW gt E INT CHAN 0 generate a high pulse now int state 0 now PC3 LOW x z else now_int_state 1 now PC3 HIGH ay no need to generate high pulse else now PC3 is changed to HIGH gt INT CHAN 0 PC3 HIGH now y find a HIGH pulse PC3 i if inportb wBaset 7 amp 1 1 the PC3 is still fixed in HIGH outportb wBase 0x2a 0 INVO select th now int _state 1 else now_int_state 0 gt need to generate a high pulse INT CHAN 0 PC3 LOW gt inverted input ay INT CHAN 0 generate a high pulse now PC3 LOW now PC3 HIGH no need to generate high pulse if wIrq gt 8 outportb A2 8259 0x20 outportb A1_8259 0x20 WORD pi
62. wSubDevice wSubAux wSlotBus wSlotDevice char c DWORD dwVal step 1 find address mapping of PIO PISO cards j step 2 enable all D I O port E init_high interrupt initialize INIT_CHAN 1 is HIGH now COUNT 0 printf An show the count of Low pulse n for printf nLow Pulse Count d initial is HIGH active is LOW COUNT if kbhit 0 getch break outportb wBase 5 0 disable all interrupt PIO DriverClose OME PIO D48 User Manual Sep 2000 V2 1 en 59 Use INT_CHAN 1 as external interrupt signal WORD init _high DWORD dwVal disable outportb wBase 5 0 disable all interrupt if wIrq lt 8 irqmask inporthb Al _8259 1 outporth Al _ 8259 1 irgmask Oxff 1 lt lt wirq setvect wIrq 8 irq service else irqmask inporthb Al _8259 1 outporthb Al _ 8259 1 irgmask amp Oxfb IRQ2 outporth Al _ 8259 1 irgmask Oxff 1 lt lt wiIrq irqmask inportb A2 8259 1 outportb A2 8259 1 irgqmask amp Oxff 1 lt lt wlrq 8 setvect wIrg 8 0x70 irq service select PC3 PC7 of port _5 as interrupt signal outportb wBase 0xf0 0x04 CTRL _D5 0 CTRL_D4 0 gt INT_CHAN_1 PC3 PC7 gt PC7 can enable disable PC3 Note In this demo assume the PC3 is init HIGH amp active LOW 2 the PC7 is used to enable disable PC3 gt PC7 VCC gt PC3 i
63. wn count 3 2 5 Note now the COUTO is LOW E gt INV2 must select the non inverted COUTO gt INT CHAN 2 COUTO init LOW active HIGH outportb wBase 0x2a 4 select the non inverted COUTO INT CHAN 2 COUTO LOW now Si now int state 0 now COUTO is LOW outportb wBaset5 4 enable INT CHAN 2 interrupt enable void interrupt irq_service if now int state 0 now COUTO is changed to HIGH z gt INT CHAN 2 COUTO HIGH now e COUNT find a HIGH pulse COUTO e pio d48_c0 0x30 3 0 COUNTERO mode 0 down count 3 2 5 now INT CHAN 2 COUTO LOW now gt INT_CHAN 2 generate a HIGH pulse now_int_state 0 now COUTO LOW Ef if wIrq gt 8 outportb A2 8259 0x20 outportb A1_8259 0x20 OME PIO D48 User Manual Sep 2000 V2 1 nen A 0 ee E demo 8 INT_CHAN 0 interrupt demo step l apply a init HIGH amp active LOW signal to PC3 of port 2 note PC7 of port 2 is don t care El step 2 run demo8 exe ey include PIO H define Al_8259 0x20 define A2 8259 0xA0 define EOI 0x20 WORD init high WORD wBase wlrq WORD pio d48_c0 char cConfig char cLow char cHigh WORD pio d48 cl char cConfig char cLow char cHigh WORD pio d48 c2 char cConfig char cLow char cHigh static void interrupt irq service int COUNT irqmask now_int state i

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