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1. cl 9 poa iJ 155 1015 WIS 2 uoisuedx3 JOJOSUUOD 10 80 2 uoisuedx3 ZN2 R7572100 Optional Board Rev A RTK7721000B00000BR 10128uuoo uoisuedx3 6 0 JOAISOSUEJ Snggl vf JOJOSUUOD snggl vf 19110037 0 140 191 1 OV 01 91 RTK7721000B00000BR Parts Layout View of Component Side Figure1 6 1 1 6 434 NE ESAS R20UT2696EJ0005 0 05 Sep 06 2013 87872100 CPU GENMAI Optional Board 7721000 00000 1 Overview 9 O c O 2 um il 9 9 9 9 T O O Oo E Q 96 Om 6 DEL O c 2 C c 5 c 2 D 5 w Sx Qt 29 aT og x 5 Y SE NY vr NC b vu y 5 0 gt 0 gt gt 0 gt 0 gt 0 2 s zt 290 e 0000000 0000000606600009000 999949 590 00000000000009000 4 9 O us ESAS RTK7721000B00000BR 7572100 Optional Board Rev A MADE IN JAPAN q ATTENTION bis A 999
2. ooo qoo poo K3 aloe A 2 09 9 3V system power supply 1 18V system power supply GND Letters in Red indicate CPU board setting R20UT2696EJ0005 Rev 0 05 5 5 2 8 06 2013 7572100 CPU GENMAI Optional Board RTK7721000B00000BR 2 Functional Specification Table 2 2 8 RTK7721000B00000BR Pin Functions 8 Expansion Pin Name Function Description Remarks Connector 8 LCDO DATA16 SD CD 0 Connected to SD card slot 7 14 LCD1 TCON3 SD CD 0 LCD1 TCONS3 Connected to LCD1 output connector MMC CD SSISCK5 CTx2 SCKO IRQO K21 9 LCDO DATA17 SD WP 0 Connected to SD card slot CN7 13 LCD1 4 SD WP 0 LCD1 4 Connected to LCD1 output connector SSIWS5 CRx2 TxDO IRQ1 ET TXER Connected to Ethernet PHY sw2 1 ON Connected to MOST connector CN7 23 SW2 1 OFF 22 P2 1 D17 ET DVO DATA1 SPBIO10 1 MLB DAT TIOC2A D1 LCDO DATA17 L 11 5 DVO DATA17 SD WP 0 SSIWS4 LCDO P7 11 A3 SSITxD3 ET RXD2 1 IRQ3 P7 10 A2 88 ET RXD1 CTx1 IRQ2 11 4 DVO 16 SD CD 0 SSISCK4 CD LCDO DATA3 L10 L13 PA 7 LODO DATA15 MISO SSITxDO Connected to audio CODEC WM8978 SW
3. CMOS camera Expansion 29 To DV input 1 ad LCD output connector 1 1 7572100 01 ee lt DAC2 MM J10 P10 0 DVO P1 E Lono LCDCLK LCDO DATA23 VIO P10 1 DVO VSYNC 1 77 LCDO DATA227 VIO VD 0 2 0 HSYNC A LCDO TCO Lebo DATA21 VIO HD 10 3 LCDO DATA20 DE VIO FLD 33V 10 15 4 DATA 11 0 m id LCDO DATA 8 19 VIO D 11 0 P11 3 0 DVO_DATA 15 12 LCDO DATA 4 7 7 D 15 12 DATAS LCDO DATA 17 16 R 5 4 P11 5 DVO 17 Lcoo DATADSTZIR 3 0 LCD KIT BO1 SSIWS4 LCD0 DATA2 RGB666 P11 6 DVO DATA18 5 LCDO DATA 11 8 SSIDATA4 LCDO DATA1 LCDO TCO LCDO TCO P11 7 DVO 19 LCDO DATA 7 6 LCDO DATAO P11 11 8 DATA 23 20 LCDO DATA E4 LCDO TCON 3 6 11 14 12 LCDO_TCON 2 0 P117 P11 15 LCDO CLK PUT 4 6 P1 0 SCLO Pio P1 1 SDAO PL P5 8 CS2 LCDO EXTCLK SDRAM1 To NOR flash memory 2 CLK Socket X9 3 P3 7 LCD1 EXTCLK CS1 Note Letters in Red indicate E functions in use P11 8 9 4041 LCDO TCON 6 0 Optional P10 0 5 4 5 LCDO DATA
4. 0000000000000 0000000000000 te er Um M 49 EI E aij t C iR AT 5 xt nw 1 gt T t M QUU 000000000000000 000000000000000 29 A POM X1 LCD oscillator optional X2 CMOS camera oscillator 27 2 17 5 24 7 ES J18 Digital video signal input connector Figure1 6 2 RTK7721000B00000BR Parts Layout View of Solder Side LI R20UT2696EJ0005 0 05 1 06 2013 1 7572100 CPU GENMAI Optional Board RTK7721000B00000BR 1 Overview 1 6 1 and Table1 6 2 list the main Parts of the RTK7721000B00000BR Table1 6 1 RTK7721000B00000BR Main Parts 1 IC U3 _____ RPMSZI ROH 00 U4 7 IEBustanscever R2Afi2i0SP Renesas o U5 LIN transceiver 20 1607 AuioDAC 0 JAKd3S3VE AKM 840 VidoDAC 77 123 Analog Devidces Z o Z X2 ______ CMOS camera oscillator SG8002CA_27MHz Epson Table1 6 2 RTK7721000B00000BR Main Parts
5. A B P8 14 22 SPBIOO1 0 i SPBIOOO 1 TIOC2A RSPCK2 SPBIOO1 0 Connected to serial flash memory 3 E P3_7 LCD0_TCON6 SSITxD1 LCD1 EXTCLK LE 1 2 CS1 WDTOVF 4 LCDO RXCLK Connected to Ethernet PHY EE sd SW2 1 ON ET RXCLK SSISCK1 SSISCK1 Connected to CD deck connector 4 12 SW2 1 OFF AUDIO XOUT 2 SCI 5 SW14 7 OFF SCK3 SCI SCKO Connected to SIM card slot SW2 1 OFF SCK3 Connected to UART connector SW14 7 ON 10 2 0 HSYNC TCLKC DVO HSYNC Connected to DVO input connector CN4 18 m Y5 Y6 2 TXEN LCDO DATA21 Connected to LCDO output connector LCDO 21 VIO HD VIO HD Connected to CMOS camera input connector 2 LCDO RxD2 Connected to D sub 9 pin connector via CN4 8 JP12 1 2 RxD2 SCI RXD1 RS 232C transceiver Y N TENDO PWM2C MOSI3 MUR MENACE to USB miniB connector via USB 2 3 MUR MENACE conversion IC RESF to reset input switch CNA2 NM 400 Connected to non maskable interrupt switch VBUSINI 1 USBohannel1 VBUSinput Yi2 VBUSINO USB channel VBUS input JP9 _ USBAVeo _ Transceiver unit analog core power supply E ER WE 15 0 0 BOOTO MD BOOTO Connected to DIPSW aboot
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7. TxD3 6 LCDO 5 RXDV SSIRxD1 RXDO RxD3 8 without pins Note Bold letters indicate setting functions R20UT2696EJ0005 0 05 5 5 3 10 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification 3 1 3 UART Connector J3 The RTK7721000B00000BR has a UART connector J3 Figure 3 1 5 shows the Pinout Diagram of UART Connector and Table 3 1 9 lists the UART Connector Pin Assignments Top view of component side Figure 3 1 5 Pinout Diagram of UART Connector Table 3 1 9 UART Connector Pin Assignments Signal Name SCK 4 LCDO TCON3 RXCLK SSISCK1 AUDIO XOUT2 8 5 SCK3 TXD 5 1 RXER SSIWS1 AUDIO XOUT3 501 TXDO TIOC3B TxD3 6 LCDO0 5 RXDV SSIRxD1 SCI RXD0 TIOC3C RxD3 GND Vss Note Bold letters indicate setting functions R20UT2696EJ0005 Rev 0 05 RENESAS 3 11 Sep 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification 3 1 4 IEBus Connector J4 The RTK7721000B00000BR has an IEBus connector J4 Figure 3 1 6 shows the Pinout Diagram of IEBus Connector and Table 3 1 10 lists the IEBus Connector Pin Assignments Top view of component side Figure 3 1 6 Pinout Diagram of IEBus Connector Table 3 1 10 IEBus Connect
8. 6N2 Gum uoisuedxa 8 2 QU SM 00000000000000000000 aaa 101090002 sng3l pf 9110037 7 1492 eued GD RTK7721000B00000BR Connector Layout Top View of Component Side Figure 3 1 1 3 1 24 NE SAS R20UT2696EJ0005 0 05 Sep 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification Figure 3 1 2 c Q E Og 9 c 38 2 8 9 25 2a 45 GG GY gt GS Gr c C x S j E O lt ze C T ifs fc 85 1541854 T n RENESAS RTK7721000B00000BR 7572100 Optional Board Rev A MADE IN JAPAN 2 1 3 000000000000000 o000000000000000 J17 CMOS camera connector MT9V024IA7XTCD ES J18 Digital video input connector RTK7721000B00000BR Connector Layout View Solder Side R20UT2696EJO0005 0 05 5 5 3 2 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification 3 1 1 Expansion Connectors CN1 to CN9 The RTK7721000B00000BR has expansion connectors CN2 to CN9 to connect with the RTK772100BC00000BR
9. 16KB RS 232C ransceiver 512MB RL78 G1C S Serial Flash 8 64MBx2 SPIBSC Serial Flash 64MB SPIBSC 74 A 4 4 4 cso CS1 cs2 SDRAM SDRAM 64MB 64MB 64MB 64MB Memory capacity uint Byte External Connector i 4 A L i Board f Bootable Optional SESSEL Expansion connector RTK7721000B00000BR Block Diagram Figure1 5 1 R20UT2696EJ0005 0 05 44 NESAS Sep 06 2013 D A Conv ADV7123 D A Conv ADV7123 B DV Input h1 EN c DV Input 40pin MIL SSL is controlled by port DAC EN gt gt TxD RxD SCK mE 1 5 Overview 1 7572100 CPU GENMAI Optional Board RTK7721000B00000BR Parts Layout 1 6 Figurel 6 1 and Figurel 6 2 show the Parts Layout of the RTK7721000B00000BR LMS 01 LMS uoisuedx3 GN2 8f 2 uoisuedx3 9N2 1noeur 6 1noeur 9 olpny 9f uoisuedx3 2 uoisuedx3 8 9 101289uuoo NII Dunes OV JO YAMS RENESAS ATTENTION 10128uuoo
10. A7 P5 9 WE2 DQMUL ET MDC ET MDC Connected to Ethernet PHY CN9 16 JP4 2 3 DVO VSYNC IRQ2 CRx1 JP7 Open IERXD LCD1_DATA16 IERxD Connected to IEBus transceiver JP4 Open JP2 1 2 JP7 Short LCD1_DATA16 Connected to LCD1 output connector JP4 Open JP2 Open JP7 Short P5 6 TXOUTOP TXOUTOP Connected to LCD panel for LVDS LCD1 DATA6 LCDO DATA22 1 01 DATA6 Connected LCD1 output connector 9 8 mE DV1 DATA6 TxD6 IRQ6 DV1 DATAG Connected to DV1 input connector SPDIF IN DVO_DATA14 P5 2 TXOUT2P TXOUT2P Connected to LCD panel for LVDS IM LCD1 DATA2 LCDO 8 LCD1 DATA2 Connected to LCD1 output connector CN9 4 mE DV1 DATA2 SCK3 DV1 DATA2 Connected to DV1 input connector P5 0 TXCLKOUTP TXCLKOUTP Connected to LCD panel for LVDS 8 17 LCD1 DATAO LCDO DATA16 LCD1 DATAO Connected to LCD1 output connector CN9 2 mE DV1 TxD4 DV1 DATAO Connected to DV1 input connector HSPCK3 LL LE LL S NE A13 VIN2B Composite video blanking and sync channel 1 input pin2 A14 VDAVss LLL 9 3V system power supply 1 18V system power supply GND Letters in Red indicate CPU board setting R20UT2696EJ0005 0 05 5 5 2 2 06 2013 7572100 CPU GENMAI Optional Board RTK7721000B00000BR 2 Functional Specification Table 2 2 2 RTK772100
11. ANW e 3 16kQ SW6 P1 10 AN2 316 O m SW12 M SW10 P1 11 AN3 AW e 237k0 23 7kQ A Center A D Note Letters in Red indicate functions in use OS Common c 84 00 Figure 2 15 1 Key Input Switch Block Diagram Table2 15 1 Voltage of AD Input Pin and AD value When Pushing Ken Input Switch sw swssw 05 M5 Calculated when Avcc is 3 3V and Avss is OV The difference of the resisgors and the voltage is not included R20UT2696EJ0005 Rev 0 05 24S NE S AS 2 34 Sep 06 2013 R7S72100 CPU GENMAI Optional Board RTK7721000B00000BR 2 Functional Specification 2 16 Power Configuration The RTK7721000B00000BR is operated with 12V 5V and 3 3V supplied from the RTK772100BC00000BR Analog 3 3V for the video DAC and the audio DAC and 8V for the CD deck are generated on the RTK7721000B00000BR Figure 2 16 1 shows the Power Configuration Diagram DC power jack Power switch Expansion 125 5444 connector pay D8V System 1 power E 12 58 supply Vss 2 E DC12V 12 55 D5V 12V external u power supply ise IEBus transceiver LIN transceiver J23 ower selec SIM card slot UART connector HCI connector KUPAA LCD panel connector CMOS camera DV connector 5 5
12. module connector CMOS camera connector 5 Switches DIP switch for video DAC setting 8 1 DIP switch for key input push switchx12 4 directional switch with a center push 1 Board specification Dimensions 175x230mm Mounting form 6 layered double sided 4 connectors Lineout pin jacks 3 5 2 SIM card slot UART connector LIN connector IEBus connector CD deck connector Board thickness 1 6mm Number of board 1 R20UT2696EJ0005 Rev 0 05 2CENESAS 1 3 Sep 06 2013 7572100 CPU GENMAI Optional Board RTK7721000B00000BR 1 Overview 1 4 Exterior Appearance Figurel 4 shows the RTK7721000B00000BR Exterior Appearance 1 4 1 RTK7721000B00000BR Exterior Appearance R20UT2696EJ0005 0 05 ESAS 1 4 Sep 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 1 Overview 1 5 Figurel 5 1 shows the RTK7721000B00000BR Block Diagram Block Diagram Key Input 4x3 Joystick R7S72100 324BGA Pin Header 4pin Transceiver S Pin Header 3pin Transceiver D Audio Codec WM8978 SSIF1 SSIF3 SSIF4 2 SSIF5 RSPDIF SCIF7
13. DATA16 m VD DVO VSYNC Note Bold letters indicate setting functions R20UT2696EJ0005 0 05 5 5 3 18 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification Table 3 1 16 LCD Panel Connector Pin Assignments 2 J11 0 for general purpose Signal Name Signal Name 1 P11 7 DVO DATA19 SD DO 0 CTS5 2 P11 6 DVO DATA18 50 D1 0 SSIDATA4 MMC D0 LCDO DATAO MMC D1 LCDO 1 P11 5 DVO DATA17 SD WP 0 SSIWS4 4 P11 4 DVO DATA16 SD CD 0 SSISCK4 5 GND Vss P11 3 DVO 15 TIOC4D LCDO DATA4 7 P11 2 DVO DATA14 RxD6 P11 1 DVO DATA13 TxD6 P11 0 DATA12 SCK6 GND Vss immense 10 15 11 SSITxD1 MISOO 14 DATA10 SSIRxD1 MOSIO 10 13 DVO 9 SSIWS1 SSLOO P10 12 0 0 SSISCK1 RSPCKO 15 P10 11 DVO 2 RXD3 P10 10 0 0 DATA6 2 2 10 8 DATA4 TIOC1A RXDO o 3 LCDO DATA12 VIO D7 10 9 DVO DATAS5 TIOC1B RXD1 LCDO DATA14 VIO 05 GND Vss 10 7 DVO DATAS TIOCOD PWM2H P10 6 DVO DATA2 TIOCOC PWM2G TXD3 LCDO DATA16 VIO D3 TXD2 LCDO DATA17 VIO D2 P10 5 DVO DATA1 2 P10 4 DVO DATAO TIOCOA PWM2E TXD1 LCDO DATA18 VIO D1 TXDO LCDO DATA19
14. P5 1 P5 5 TXOUTIM LCD1 DATA5 DV1 5 P5 6 TXOUTOP LCD1_DATA6 DV1_DATA6 P5 7 TXOUTOM LCD1 DV1_DATA7 yy BEZ 5 7 flash memory Note Letters in Red indicate functions in use To LVDS panel Figure 2 13 1 Digital Video Signal Input Interface Block Diagram R20UT2696EJ0005 0 05 5 5 2 32 06 2013 87872100 CPU GENMAI Optional Board RTK7721000B00000BR 2 Functional Specification 2 14 CMOS Camera Input Interface The 7572100 includes a capture module capture engine unit CEU which imports video data input from outside and transfers the data to the memory The RTK7721000B00000BR connects the 7572100 CEU pin to the CMOS camera connector MT9VO24IA7XTCD ES and the connectable 26 pin MIL pitch connector Figure 2 14 1 shows the CMOS Camera Input Interface Block Diagram Table2 14 1 lists the JP4 Function Setting HCI 19 Expansion 22 connector VV ei RAE X 19 LCD panel 1 7572100 01 2 22 CMOS camera connector 917 P10 0 DVO P10 0 LCDO DATA23 P10 1 DVO VSYNC P10 1 LCDO DATA22 VIO VD P10 2 DVO HSYNC LCDO DATA21 VIO HD P10 3 LCDO DATA20 VIO FLD 15 4 DVO_DATA 11 0 LCDO DATA 8 19 7 D 11 0 P11 3 0 DATA 15 12 LCDO DATA 4 7 D 15 12 P1 0 SCLO P10 2 P10 3
15. Ld oc Top View of Component Side 2 77227 2222 3 38 24 NE SAS RTK7721000B00000BR Dimensions 2 Top View of Component Side 2 R20UT2696EJ0005 0 05 Figure 3 3 2 Sep 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification Perspective View of Component Side 7 doc 3 9 4 888 0000000000 mn oo H 9 9 4 7 4 PT m eros oooooooooo0loooooooo0o o didi b die ee 9 HH 2 THE 42 4 e 2 Wo Vs a so d e oo m pun ee coe gp 7 7 84 4 CN a ee 2 2 Figure 3 3 3 7721000 00000 Dimensions Perspective View of Component Side R20UT2696EJ0005 0 05 5 5 3 39 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification R20UT2696EJ0005 Rev 0 05 5 5 3 40 06 2013 7572100 CPU GENMAI
16. 10 1 1 0 DATA22 2 RI P10 0 1cb0 Poo 10 9 LCDO DATA14 R2 11 13 LCDO P10 8 LCD0 DATA15 NE R3 11 14 1 0 TCONO P11 11 LCD0 TCON3 10 7 LCD0 DATA16 23 11 12 1 0 TCON2 P11 10 1 0 10 6 LCD0 DATA17 24 R5 11 9 LCD0 5 11 8 1 0 TCON6 GND 11 15 LCDO S FH iz 11 12 LCD0 TCON2 TET DE P11_11 LCD0_TCON3 HSYNC NC 11 10 1 0 4 NS VSYNC NC GND GND 57 z 5 5V n fai a 57 o NC 1 SDAO P1 1 SDA P1 0 SCLO SCL P11 13 LCD0 1 INT NC 3vcc iu SG 8002DC 5 R79 5 8 P5 8 LCD0 EXTCLK c VCC OUT 180 GND OE XR2A 0811 N CP57 P1 15 0 P4 15 0 2 3 6 7 P5 10 0 lt gt P5 10 0 P5 10 0 2 346 P2 150 lt gt P2 15 0 P2 15 0 222 hr em lt 4 2 4 6 P4 15 0 lt gt P4 15 0 P4 15 0 for LCD KIT B0 J12 XF2J 4024 12A OMRON ne for ROP7724LEO0011RL 3 3V 2 3VCC 14 5VCC 3 3V 5VCC 3VCC J13 5VCC 8611 0605 GND i HIF3FC 40PA 2 54DSA KEL GND P5 0 1 1 DATAO BO P5_0 LCD1_DATAO P5_1 LCD1_DATA1 P5_1 LCD1_DATA1 Bl P5 2 LCD1 DATA2
17. LCD1 1 00 DATA23 DV1 DATA7 RxD6 TIOCOD DV1 Connected to DV1 emm s connector SPDIF OUT DVO DATA15 P5 3 TXOUT2M TXOUT2M Connected to LCD panel for LVDS LCD1 DATA3 LCDO DATA19 1 01 DATA3 Connected LCD1 output connector CN9 3 mE DV1 TxD3 TIOC3C DV1 Connected to DV1 input connector P5 1 TXCLKOUTM TXCLKOUTM Connected to LCD panel for LVDS LCD1 DATA1 LCDO DATA17 LCD1 Connected to LCD1 output connector CNO 1 mE DV1 DATA RxD4 TIOCOB DV1 DATA1 Connected to DV1 input connector 12 9 3V system power supply 1 18V system power supply GND Letters in Red indicate CPU board setting R20UT2696EJ0005 Rev 0 05 5 5 2 3 06 2013 7572100 CPU GENMAI Optional Board RTK7721000B00000BR 2 Functional Specification Table 2 2 3 RTK7721000B00000BR Pin Functions 3 Pin Expansion Pin Name Function Description Remarks No Connector Composite video blanking and sync CVBS channel 1 input pin 1 VDAVcc Ip WEST B15 VIN1A Composite video blanking and sync channel 0 input pin 1 B16 P1 7 SDA3 DV1 HSYNC SDA3 Connected to LCD1 output connector CN8 19 DVO DATA13 P1 4 SCL2 DVO 1 SCL2 CN8 18 IRQ4 BOSE to MOST I F connector Connected to DAC Connected to DAC AK4353 1 2 1 and 2 P1 2 SCL1 DV
18. LCD1 P5 1 TXCLKOUTM LCD1 DATA1 LCDO DATA16 1 DATAO TxD4 LCDO DATA17 RxD4 TIOCOA RSPCK3 TIOCOB SSL30 LCD2 P5 2 TXOUT2P LCD1 DATA2 P5 3 TXOUT2M LCD1 DATA3 LCDO 18 1 DATA2 SCK3 LCDO 19 DV1 DATA3 TIOC1B MOSI3 TIOC3C MISO3 LCD4 P5 4 TXOUT1P LCD1 DATA4 5 P5 5 TXOUT1M LCD1 LCDO DATA20 1 DATA4 LCDO 21 DV1 DATA5 AUDIO XOUT TIOC3D DVO_DATA12 TIOCOC DATA13 LCD6 P5 6 TXOUTOP LCD1 LCD7 P5 7 TXOUTOM LCD1 DATAT LCDO DATA22 DV1_DATA6 TxD6 IRQ6 DATA23 DV1_DATA7 RxD6 IN DVO DATA14 TIOCOD SPDIF OUT DVO DATA15 GND Vss GND Vss LCD8 P2 8 D24 ET RXDO DVO DATA8 LCD9 P2 9 025 RXD1 DVO_DATAQ SSISCKO LCDO_TCON6 LCD1 8 SSIWSO LRXDO LCD1 DATA9 VIO D9 VIO D8 RSPCK4 55140 LCD10 P2 10 D26 RXD2 LCD11 P2 11 027 RXD3 DVO DATA11 SSITxDO LCD1 VIO D11 MISO4 LCD13 P2 13 029 55100 DVO_DATA13 SPBIO11 0 CTx3 SCK0 LCD1 DATA13 IRQ7 DVO DATA10 SSIRxDO LTXDO LCD1 DATA10 VIO D10 MOSIA LCD12 P2 12 028 RSPCKO DVO DATA12 SPBIOO1 0 CRx3 IRQ6 LCD1 DATA12 Note Bold letters indicate setting functions R20UT2696EJO0005 0 05 5 5 3 22 06 20
19. P10 15 4 3 3 11_ 3 0 3 3V SCLO P10 0 VIO CLK P10 1 VIO VD P10 2 VIO HD P10 13 6 VIO D 9 2 P10 5 4 3 3V 10 3 RES SCLO S PIXCLK S FV Frame Valid S LV Line Valid 5 DOUTT 7 0 S DOUTLSB 1 0 DEMO RST DEMO SCL SDAO SDAO DEMO SDA P1 1 SDAO Socket X2 RES P10 15 14 VIO D 11 10 CLK Note Letters in Red indicate Pi 8 0 27MHz functions in use VIO D 15 12 Figure 2 141 CMOS Camera Input Interface Block Diagram Table2 14 1 JP4 Function Setting 23 JP4 Execute reset control for CMOS camera using Execute reset control for CMOS camera with P10 3 pin initial setting RES singal generaged by the RTK7721000B00000BR indicates setting function R20UT2696EJ0005 0 05 5 5 06 2013 7572100 CPU Optional Board RTK7721000B00000BR 2 Functional Specification 2 15 Key Input Switch The ports from 11 can be used as the key input switches via the A D converter ADC by setting to the analog input pins ANO to AN3 Figure 2 15 1 shows the Key Input Switch Block Diagram and Table2 15 1 lists the Voltage of AD Input Pin and AD value When Pushing Ken Input Switch Expansion connector R7S72100 01 3 16kO0 SW2
20. P11 15 LCDO CLK P11 15 PILIS P5 8 CS2 LCDO EXTCLK Eu Socket X1 Q NOR flash memory 2 P58 LCDO EXTCLK aD CLK Socket X9 7 LCD1 EXTCLK CS1 JP6 Note Letters in Red indicate functions in use Optional Figure 2 12 1 Analog RGB Output Interface 0 Block Diagram R20UT2696EJ0005 Rev 0 05 5 5 2 29 06 2013 7572100 CPU Optional Board RTK7721000B00000BR 2 Functional Specification To SD card slot To serial flash memory 1 IEBus I F To serial flash memory 2 10 audio DAC To LVDS panel I F To LIN I F Expansion connector sj 7 To DV input Analog RGB connector 2 c Video DAC2 J16 ADV7123 010 D sub15 o P2 11 10 R7S72100 01 P4 12 LCD1 CLK P9 7 3 P5 10 LCD1 DATAJ23 16 SD CLK 0 SSISCKS3 P5 9 JP7 eI 9 2 P4 14 1601 TCON1 SD D3 0 P2 15 8 LCD1 DATA 15 8 10 LCD1 TCONS5 SD D1 0 P5 7 0 LCD1 DATA 7 0 3 3V P9 2 LCD1 DATA18 SPBCLK 0 P9 3 LCD1 DATA19 SPBSSL 0 P9 7 41 1 01 DATA 23 20 P9 47 3 010 0 P2 15 12 SPBIO 3 0 1 0 P2 15 12 LCD1 DATA 15 12 Clock Buffer U11 P5 0 P5 0 TXCLKOUTP LCD1 DATAO DV1 DATAO P5 1 TXCLKOUTM LCD1 DATA1 DV1_DAT
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22. CN6 24 PWM2G TXD2 LCD0_DATA17 VIO N22 3 LCDO 11 TIOCOD CN6 17 FWE 2 MISO4 MMC 07 MISO4 Connected to CD deck connector to CD deck connector e SCK5 SCI _SCKO gt TXD5 RXDO e IRQO U S 9 3V system power supply 1 18V system power supply GND Letters in Red indicate CPU board setting R20UT2696EJ0005 Rev 0 05 5 5 2 10 06 2013 7572100 CPU Optional Board RTK7721000B00000BR 2 Functional Specification Table 2 2 10 RTK7721000B00000BR Pin Functions 10 Pin Name Function Description Remarks No Connector LJ qug es P20 0 LCDO DATA8 TIOCOA FRE Connected to flash memory CN6 16 FRE RSPCK4 MMC D4 MMC 04 Connected to MMC card slot RSPCK4 gosse aro E a to audio CODEC WM8978 Connected to CD deck connector to CD deck connector P21 P4 2 LCDO DATA10 TIOCOC FALE Connected to NAND flash memory CN6 18 FALE CRx3 TxD2 MOSI4 MMC D6 Connected to MMC card slot MMC D6 MOSIA to audio CODEC WM8978 Connected to CD deck connector sid to CD deck connector P22 1 LCDO DATA9 TIOCOB FCLE Connected to NAND flash memory CN6 15 JP10 Open FCLE SCK2 SSL40 MMC D5 a D5 ME EE TI to MMC card slot 55440 Connected to aud
23. DATA22 DV1 DATA6 TxD6 IRQ6 SPDIF IN DVO DATA14 GND Vss P5 2 TXOUT2P LCD1 2 LCDO DATA18 DV1 DATA2 5 3 TIOC1B MOSIS GND Vss P5 5 TXOUT1M LCD1 DATA5 LCDO DATA21 DV1 DATAS5 AUDIO XOUT TIOCOC FCE DVO DATA13 P5 7 TXOUTOM LCD1 DATAT LCDO DATA23 DV1_DATA7 RxD6 TIOCOD SPDIF OUT DVO DATA15 8 D24 ET RXDO DVO DATA8 SSISCKO LCDO_TCON6 LCD1 8 VIO 08 RSPCK4 P2 10 026 ET RXD2 DVO DATA10 SSIRxDO LTXDO LCD1 DATA10 VIO 010 MOSI4 GND Vss P2 9 D25 ET RXD1 9 SSIWSO LRXDO LCD1 DATA9 VIO D9 55140 P2 11 D27 ET SSITxDO 1 VIO D11 MISO4 P2 12 028 RSPCKO DATA12 SPBIOO1 0 CRx3 IRQ6 LCD1 DATA12 TIOC1B D 7 2_13 029 55100 DATA13 8 P2 14 D30 MOSIO DVO_DATA14 SPBIO11_0 5 LCD1 DATA13 SPBIO21_0 CRx4 LCD1 DATA14 IRQ7 IRQO 9 P2 15 D31 MISO0 DVO DATA15 20 GND Vss SPBIO31 0 0 LCD1 DATA15 IRQ1 P5 9 WE2 DQMUL ET MDC DVO VSYNC P9 2 LCD1 DATA18 SPBCLK O LTXDO SCK1 A0 22 24 6 P9 5 LCD1 DATA 1 SPBIO10 0 28 SSISCK2 CTS1 CS4 30 2 P5 10 WE3 DQMUU AH HSYNC CTx1 IETxD LCD1 DATA17 P9 3 LCD1 DATA19 SPBSSL 0 TxD P9 4 LCD1 DATA20 SPBIOO0 0 RxD1 P9 6 LCD1 22 SPBIO2
24. VD S LCDO TCON ET MDIO IRQ4 BS CTS1 RTS1 LCDO DATA22 Connected to LCDO output connector VIO VD Connected to CMOS camera input connector ET MDIO Connected to Ethernet PHY SW2 1 0N SW14 7 OFF SW14 7 ON Connected to interrupt switch JP3 1 2 Connected to CD deck connector CN4 5 JP3 2 3 AUDIO_CLK Connected to HCI connector PWM2B SSL30 A8 RTC_X2 Connects RTC resonator PO_5 RTC_X4 RTC X4 DVO VSYNC Connected to DVO input connector 4 19 PWM2D MISO3 1 LCDO TCONO IRQ6 2 TXD1 AUDIO 32 768 2 __ _USB channel 1 differential signal D data DPO channel 0 differential signal D __ m Befereneinut o o o BK OE Aia __ AMIS Open AA17 P1 8 ANO IRQ2 DREQO Connected to key input switch CN5 20 VIO D14 DVO DATA14 Open ANO AA18 11 ANS3 IRQ5 TCLKD Connected to key input switch CN5 15 AA19 P1 14 AN6 ET COL ET COL Connected to Ethernet PHY CN5 8 AA20 po 2 NN Connected to DIPSW as a pin for boundary SW2 3 scan mode setting AA22 BSCANP B AB2 P9 0 A24 SPBIO21 0 A24 Address bus CN3 5 TCLKC MOSI2 BE 9 3V system power supply 1 18V system power supply GND Letters in Red indicate CPU board setting R20UT2696EJ0005 Rev 0 05 RENESAS 2 14
25. 1 1 716 HSJ1456 010320 mE 5 JALCO 2 MOSIA 13 CE7 P4_0 RSPCK4 27 7778 7 11_4 8818 4 P114 10uF716V PA 3 MISOA 15 3 4 SSISCK1 IIS BCK P11_6 SSIDATA4 3 5 551 51 115 LRCK 6 85 P116 3 6 SSIRxD1 195 IIS_DATA 4 L 3VCC P3 1 06 P3 20 BEKOR 2 15 2 Pl 12 trans TRANS LLL LIZLLLLLLLLLLLLLLLLLLLLLZL Pl m i PEN N 22 P1 4 SCL2 PLA SCL CCLK mj 5 oa qm 5 5 ki x 22kQ 3VCC 7 RS AN3V R55 4 7kQ P1 8 ANO P18 CP49 CP50 R56 R57 R58 R59 9 10 1 18kQ 3 16kQ 6 98kQ 18 7kQ gt 6 10pF 16V 1 r1 3 1 r1 3 1 r1 3 1 r1 3 AVcc sw sw2 sw3 sw4 B3S 1000 B3S 1000 B3S 1000 B3S 1000 R60 4 7kQ P1 9 AN1 P19 R61 R62 R63 R64 1 18kQ 3 16kQ 6 98kQ 18 7kQ 1 3 1 O 3 1 3 1 O 3 AVcc SW5 SW6 SW7 SW8 835 1000 835 1000 835 1000 835 1000 R65 4 7kQ 10 AN2 P1 10 R66 R67 R68 R69 1 18kQ 3 16kQ 6 98kQ 18 7kQ 1 3 1 3 1 3 1 E 3 AVcc Q SW10 SW11 swi2 gt B3S 1000 B3S 1000 B3S 1000 B3S 1000 R70 4 7kQ P1 11 AN3 P1 11 SW13 SKRHABE010 R71 1APPS o4 R72 9310 4 9 31kQ R73 Pas URS 2 37kQ s R74 3 R75 4 7kQ 23 7kQ BD Renesas Solutions Corp DRAWN CHECKED DESIGNED APPROVED
26. 205 AZIA Center No 1233 Lujiazui Ring Rd Pudong District Shanghai 200120 China Tel 86 21 5877 1818 Fax 86 21 6887 7858 7898 Renesas Electronics Hong Kong Limited Unit 1601 1613 16 F Tower 2 Grand Century Place 193 Prince Edward Road West Mongkok Kowloon Hong Kong Tel 852 2886 9318 Fax 852 2886 9022 9044 Renesas Electronics Taiwan Co Ltd 13 No 363 Fu Shing North Road Taipei Taiwan Tel 886 2 8175 9600 Fax 886 2 8175 9670 Renesas Electronics Singapore Pte Ltd 80 Bendemeer Road Unit 06 02 Hyflux Innovation Centre Singapore 339949 Tel 65 6213 0200 Fax 65 6213 0300 Renesas Electronics Malaysia Sdn Bhd Unit 906 Block B Menara Amcorp Amcorp Trade Centre No 18 JIn Persiaran Barat 46050 Petaling Jaya Selangor Darul Ehsan Malaysia Tel 60 3 7955 9390 Fax 60 3 7955 9510 Renesas Electronics Korea Co Ltd 11F Samik Lavied or Bldg 720 2 Yeoksam Dong Kangnam Ku Seoul 135 080 Korea Tel 82 2 558 3737 Fax 82 2 558 5141 http www renesas com 2013 Renesas Electronics Corporation rights reserved Colophon 1 3 87572100 CPU GENMAI Optional Board RIK7721000B00000BH User s Manual 5 5 Renesas Electronics Corporation R20UT2696EJ0005
27. 5 IRQO 13 1 SDAO DVO DATA17 TCLKC IRQ1 P1 0 SCLO DVO DATA16 TCLKA IRQO VIO HD DVO_HSYNC VIO VD DVO VSYNC 9 P1 3 SDA1 DVO DATA19 ET COL 1 ADTRG LCD1 EXTCLK 1 P1 7 SDAS3 DV1 HSYNC LRXDO IRQ7 6 SCL3 DV1 VSYNC IERxD IRQ6 VIO D13 DVO DATA13 VIO D12 DVO DATA12 P1 2 SCL1 DVO 8 FRB IRQ2 14 16 5 SDA2 DV1 CLK CRx4 IRQ5 18 4 SCL2 DVO CRx1 IRQA VIO CLK LCD1 EXTCLK CAN CLK 20 5V system power supply 3 3V system power supply GND R20UT2696EJ0005 0 05 5 5 3 8 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification Table 3 1 7 Expansion Connector Pin Assignments 7 9 Pin No Signal Name Pin No Signal Name P5 1 TXCLKOUTM LCD1 DATA1 P5 0 TXCLKOUTP LCD1 LCDO DATA17 DV1 DATA 4 LCDO DATA16 DV1 DATAO TxD4 TIOCOA TIOCOB SSL30 RSPCK3 P5 3 TXOUT2M LCD1 DATAS P5 2 TXOUT2P LCD1 DATA2 DATA19 DV1 DATA3 TxD3 DATA18 DV1 DATA2 5 3 MISO3 TIOC1B MOSIS P5 5 TXOUT1IM LCD1 DATA5 P5 4 TXOUT1P LCD1 4 LCDO DATA21 DV1 DATA5 AUDIO XOUT DATA20 DV1_DATA4 RxD3 TIOCOC DVO DATA13 TIOCSD DVO_DATA12 P5 7 TXOUTOM LCD1 DATAT P5 6 TXOUTOP LCD1 DATA6 DATA23 DV1_DATA7 RxD6 LCDO DATA22 DV1 DATA6 TxD6 IRQ6 TIOCOD SPDIF OUT DVO DAT
28. 9 3 19 20 21 22 eo 23 24 HWP 2P G m 7 SH abu ui P11 1 27 28 11_0 29 30 LL N N o8 12V gt 8V U1 L1 8VCC 3VCC 12VCC LM20242 SLF7055T 6R8N2R8 TT TDK TP1 8v CP25 22yF 50V CP28 107kQ 22uF 50V 4 5 7 15 0 lt gt 3 4 15 lt gt N II 3 4 5 6 P2 15 0 C CN4 12VCC VBUS AVcc CN5 AVcc VBUS 12VCC HIF3FB 20DA 2 54DSA HIF3FB 20DA 2 54DSA HRS HRS NMI 1 2 1 2 7 2 3 4 _ gt 4 7 3 4 3 1 5 6 P3 0 5 6 3 3 7 8 P3 2 1 15 7 8 1 12 e 1 12 5 12 4 11 12 13 14 334 13 14 15 16 15 16 17 18 E i 17 18 P101 19 20 0 FA 19 20 sess 3VCC 3VCC 5VCC TIN Olt wo CN6 OJ OJO O SSW 115 01 L D Samtec P3 9 1 2 P3 8 3 4 5 u rT 7 8 a 9 10 11 12 13 14 3VCC CN8 3VCC 15 16 HIF3FB 20DA 2 54DSA 17 18 92 2 HRS 19 20 1 2 P10 5 21 22 P10 4 3 4 7 23 24 5 25 26 2 13 7 8 2 12 27 28 2 15 9 10 2 14 29 30 Las E 12 EXT P1 1 13 14 P10 15 16 3 58 N E me LL LL is ojo n AJA OJO O N
29. Figure 3 1 3 shows the Pinout Diagram of Expansion Connector and Table 3 1 1 to Table 3 1 7 list the Expansion Connector Pin Assignments Figure 3 1 3 o o c LLI co O o o c 2 O Pinout Diagram of Expansion Connector 34 CN7 Expansion connector 33 RENESAS RTK7721000B00000BR o o Q x x ui ui LO z 2 O O 7572100 Optional Board Rev MADE IN JAPAN S CN2 Expansion connector o CN4 Expansion connector e 20 a _ 19 1 R20UT2696EJ0005 0 05 06 2013 5 5 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification Table 3 1 1 Expansion Connector Pin Assignments 1 CN2 Signal Name Signal Name Vss 2 CKIO 5 P11 11 DVO DATA23 SD D2 0 5 MMC D2 LCDO TCONS3 7 P11 9 DVO DATA21 SD CMD 0 5 5 11 8 DVO DATA20 SD 0 55 MMC CMD LCDO TCON5 MMC CLK LCDO 6 mE 1 7 19 23 25 27 29 Vss P11 10 DVO DATA22 SD 0 TxD5 MMC D3 LCDO 4 MMC D1 LCDO DATA1 P11 5 DVO DATA17 SD WP 0 55 54 LCDO DATA2 15 3VCC 3VCC P11 4 DVO DATA16 SD CD 0 SSISCK
30. N N CN7 SSW 117 01 L D Samtec 4 AUDIO gt i 2 XTAL2 4 10 9 5 6 7 8 rme 1 9 10 12 13 14 16 18 ris 20 21 22 23 24 rr 1 35 26 28 30 1 5 32 9 S a 34 Board fixed hole M3 Anti resonant circuit AN3V for Corner x 4 for Connect to CPU board x 4 3VCC 5 MH1 J1 XG8S 0331 OMRON 5 for Connect to ROP7724LE0011RL Renesas Solutions Corp Connector RTK7721000B00000BR Ext Power D RTK7721000B00000BR_C A 2 4 15 0 lt gt 6 54147 gt 2 5 6 7 2 4 5 6 SCIc CD TP4 02 P3 4 SN74CB3Q3257 Texas Instruments P3 3 SSL40 4 P3B 4 gt gt 4 55 5 5 gt gt 55 51 6 lt P3 e SSIRXD1 4 CD deck 22kQ P5 10 0 P5 10 IETxD P5 9 IERxD 5 3vcc P2 15 0 P2 10 LTXDO P2 9 LRXDO P2 11 P3B 6 3 P3 4 5 SCKO P3 5 5 TXDO P3 6 5 RXDO P3 3 RES Ctrl P3 5 IrTXD P3 6 IrRXD P3 4 5 3 P3 5 TxD3 P3 6 RxD3 04 R2A11210SP Renesas US MAX13020 3VCC 9 b 3 N d SIM Card 8 2 8 50062 2001 1 3VCC 5VCC gt e Yamaichi P3B 4 1 P3B 6 CP30 CP31 0 1yF 1 C2 C5 IrDA Module P3B 4 1 5 8 E
31. Operational Specification 3 1 8 CD Deck Connector J8 The RTK7721000B00000BR has a CD deck connector 78 Figure 3 1 10 shows the Pinout Diagram of CD Deck Connector and Table 3 1 14 lists the CD Deck Connector Pin Assignments Top view of component side 1 22 18 L Figure 3 1 10 Pinout Diagram CD Deck Connector Table 3 1 14 CD Deck Connector Pin Assignments 3 8V FLAG6 P1 13 AN5 DVO_HSYNC WAIT 6 CDRST RES 8 GND vss 3 3V GND Vss 12 CDFS P3_3 LCDO_TCON2 ET_MDIO IRQA BS CTS1 RTS1 PWM2D CDSI 2 LCDO DATA10 TIOCOC CDCK 0 LCDO DATAS FALE CRx3 TxD2 MOSM MMC 06 04 CDSO 3 1 00 TIOCOD NC FWE CTx3 RxD2 MISO4 D7 17 15 4 LCDO RXCLK 18 LRCK P3 5 LCDO RXER SSISCK1 AUDIO 2 8 SCK0 SSIWS1 AUDIO XOUT3 SCI TXDO TIOC3A SCK3 TIOC3B TxD3 19 15 DATA 6 LCDO TCONS ET RXDV BLKCK 1 LCDO SSIRxD1 SCI TIOC3C RxD3 IRQ6 TxD2 5 TXD1 AUDIO CLK PWM2B SSL30 21 22 NC P1 12 DVO VSYNC VIO Note Bold letters indicate setting functions R20UT2696EJ0005 0 05 5 5 3 16 06 2013 875721
32. Optional Board RTK7721000B00000BR Appendix Appendix RTK7721000B00000BR Schematics R20UT2696EJ0005 Rev 0 05 21 NE SAS Appendix 1 Sep 06 2013 2 4 R7S72100 Optional board RTK7721000B00000BR SCHEMATICS for RTK772100FCO0000BR amp RTK772100BCO0000BR TITLE PAGE Note Index 1 Digital GND GND Ext Connector with CPU board Power 2 Analog GND AVss SCIc SIM IrDA UART IEBus LIN 3 Audio DAC CD HCI Push SW 4 LCD Not mounted Video Encoder 6 CMOS DV 7 12VCC Digital 12V System Power SVCC Digital 8V for CD deck Digital SV Digital 2527 Analog 3 3V for 7572100 ADC Analog 3 3V for AK4353 ADV 123 Fixed Resistors C Resistor Array Ceramic Caps Tantalum Electrolytic Caps Decoupling Caps Renesas Solutions Corp RTK7721000B00000BR INDEX Deje xen 44 CHANGE 4 P7 8 0 lt gt 5 6 P9 7 2 lt gt 3VCC CN2 3VCC A HIF3FB 30DA 2 54DSA 2 1 lt 6 11 10 8 7 10 12 N 14 BERE 16 18 Ne 20 22 24 gt 76 M 26 28 2 30 270 2 ala alg E ms o ojo 3VCC CN9 3VCC SSW 115 01 L D Samtec P5 1 1 2 P5 0 3 4 L 1 4 7 5 ea NS 7 8 9 10 5 8 11 12 JP7 15 16 5 10 15 16
33. RTK7721000B00000BR DAC CD HCI Push SW DeRIK IT21000B00000BR 2 4 7 510 gt 24 67 11 15 0 lt gt P11 15 0 2 6 7 P10 15 0 lt lt gt 5 for LCD KIT BO0 pe J10 m 2 4024 12 i i io OMRON io 271 3 3V 3 3V 3 3V 5VCC 3VCC J11 3VCC 5VCC ix GND d HIF3FC 40PA 2 54DSA ax GND HRS 11 7 1 0 DATAO P117 11 7 LCD0 DATAO 7 P11 6 P11_6 LCD0_DATA1 D P11_6 LCD0_DATA1 7 Bl P11_5 LCDO_DATA2 rs P11_4 LCD0_DATA3 D P11_5 LCD0_DATA2 8 82 prs 11 4 1 0 DATA3 NS ee 9 B3 11 2 1 0 DATA5 P11 1 LCD0 DATA6 3 1 0 DATA4 P11 0 LCD0 DATA 11 2 1 0 5 a B5 10 15 LCD0 DATA8 P10 14 LCD0 DATA9 GND 10 13 LCDO DATA10 EZ xU 10 12 1 0 DATA11 11 1 1 00 DATA6 Toe 353 60 7510 11 7 10 11 LCD0 DATA12 11 0 LCDO DATA7 Sa G1 10 10 LCDO DATA13 10 9 LCDO DATA14 10 15 1 0 DATAS 62 10 1 DATA15 10 14 1 0 DATA9 T3 3 63 P10 7 LCD0 DATA16 1 07 10 6 LCD0 DATA17 P10 13 1 0 DATA10 G4 0 5 LCD0 DATA18 N 10 4 0 DATA19 10 12 1 0 DATA11 13 65 ms 4 P10 3 LCD0 DATA20 10 11 LCDO DATA12 10 2 LCDO DATA21
34. SW14 5 SYNC pin setting SW14 6 PSAVEpinseting ON PSAVE L Powerdonmode 00000000000 d a ma NN P3 6 3 selection for H connection destination bil iod Connected to SIM card slot IrDA module U3 and UART L connector J3 Fo map pon Indicates initial setting Video DAC 1 lt e gt R20UT2696EJ0005 0 05 5 5 3 36 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification 3 3 Dimensions Figure 3 3 1 and Figure 3 3 2 show the RTK7721000B00000BR Dimensions Top View of Component Side Figure 3 3 3 shows the RTK7721000B00000BR Dimensions Perspective View of Component Side Top View of Component Side Unit mm 6665600006 88 9900000000000 Figure 3 3 1 RTK7721000B00000BR Dimensions 1 View of Component Side1 R20UT2696EJ0005 0 05 5 5 3 37 06 2013 3 Operational Specification R7S72100 CPU GENMAI Optional Board RTK7721000B00000BR SN 00000005 LAG 0000000000 T ww BB EB E 8 5 S o x _ fm Unit mm 00000000 2
35. Sep 06 2013 87872100 CPU GENMAI Optional Board RTK7721000B00000BR 2 Functional Specification Table 2 2 14 RTK7721000B00000BR Pin Functions 14 Pi E Pin Name Function Description ipd Remarks No Connector RXDV Connected to Ethernet PHY SW2 1 0N ABS 6 LCDO TCON5 ET RXDV SSIRxD1 RXDO TIOCSC RxD3 0 DVO TCLKA TXCLK LCDO DATA23 VIO AB5 P10 3 TCLKD PWM2D CRS LCDO DATA20 VIO FLD ABe ET TXCLK IRQ2 SCK2 SCK1 TxD2 PWM2A RSPCK3 gt N B AB8 RTC_X1 9 4 AB10 Bn 812 AB14 AB16 EXTAL n 18 9 AN1 IRQS VIO D15 DVO DATA15 19 12 DVO VSYNC VIO FLD AB20 55 21 AVref 3 3V system power supply 1 18V system power supply R20UT2696EJ0005 0 05 06 2013 SSIRxD1 RXDO RxD3 DVO_CLK LCDO DATA23 VIO CLK LCDO DATA20 P10 3 TxD2 HTC AN1 P1 12 Connected to CD deck connector Connected to SIM card slot Connected to IrDA module Connected to UART connector reset control HS 232C transceiver serial conversion IC Connects RTC resonator Connects RTC external clock USB channel 1 differential signal data USB channel 0 differential signal D data Transceiver unit analog pi
36. 23 16 MIL connector RGB888 Socket X1 P5 8 M LCDO EXTCLK CLK e LCDO DATA 15 8 LCDO DATA 7 0 Figure 2 11 1 LCD Panel Output Interface Block Diagram R20UT2696EJ0005 Rev 0 05 24S NE S AS 2 26 Sep 06 2013 7572100 CPU Optional Board RTK7721000B00000BR 2 Functional Specification 10 To serial flash memory 2 25 DV input 2 To SD card slot To LIN transceiver To serial flash memory 1 _ ee To audio PDNZ To LVDS panel 2 IEBus transceiver 3 audio DAC1 35 33 LCD output connector 2 1 87572100 U1 de J12 P1 6 SCL3 DV1 VSYNC PI 12 77 P1 7 SDA3 DV1 HSYNC Piz P4 15 TCON2 P2 15 12 5 1 0 2 15 12 4 13 5 LCD1 TCONO LCD1 DATA 15 12 15 14 LCD1 TCON 2 1 15 14 P4 14 4 LCD1 DE SD D 2 3 0 13 LCD1 4 13 P4 8 P4 8 INT D CMD 0 S
37. 6 GND Vss HSYNC 13 LCDO DATA 1 LCD1 M CMD 0 MMC DE P4 14 LCDO DATA22 LCD1 SD D3 0 D3 5 21 1 SSIRxD3 TxD2 IRQ6 VSYNC 15 LCDO DATA23 LCD1 TCON2 SD D2 0 MMC D2 1 SSITxD3 RxD2 IRQ7 LCDCLK P4 12 LCDO DATA20 LCD1 CLK SD 0 MMC SPBIO10 1 c TxD1 IRQ4 SPBIO11_1 SSIWS3 RxD1 IRQ5 GND Vss SCL P1 6 SCL3 DV1 VSYNC IERxD SDA P1 7 SDA3 DV1 HSYNC LRXDO 2 D13 DVO 13 INT PA 8 LCDO DATA16 LCD1 TCON3 SD CD 0 MMC CD SSISCK5 CTx2 SCKO IRQO RESET 9 LCDO DATA17 LCD1 TCON4 SD 0 SSIWS5 CRx2 IRQ1 IRQ6 VIO D12 DVO DATA12 CO CO Note Bold letters indicate setting functions R20UT2696EJ0005 0 05 5 5 3 20 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification Table 3 1 18 LCD Panel Connector Pin Assignments 4 J13 ch1 for general purpose Signal Name Signal Name P5 0 TXCLKOUTP LCD1 DATAO P5 1 TXCLKOUTM LCD1 LCDO DATA16 DV1 DATAO TxDA LCDO DATA17 DV1 RxD4 TIOCOB TIOCOA RSPCK3 55130 5 3 TXOUT2M LCD1 DATA19 DV1 TxD3 TIOC3C MISO3 P5 4 TXOUT1P LCD1 DATA4 DATA20 DV1_DATA4 RxD3 TIOCSD DVO DATA12 P5 6 TXOUTOP LCD1 DATA6
38. C to 50 Do not expose to condensation or corrosive gases Storage ambient temperature 7 10 C to 60 Do not expose to condensation or corrosive gases Note 1 Supplied from R7S72100 CPU board 2 The ambient temperature is the air temperature immediate to the board 1 8 Operating Conditions Table1 8 1 lists the RTK7721000B00000BR Operating Conditions 1 81 7721000 00000 Operating Conditions AVcc Analog 3 3V system power supply 3 0V to 3 6V Vss reference voltage EE Maximum consumption voltage Up to 3A Includes 7572100 CPU board consumption current Operating ambient temperature 7 0 C to 4090 Do not expose to condensation or corrosive gases Note 1 Supplied from R7S72100 CPU board 2 The ambient temperature is the air temperature immediate to the board 20072696 0005 0 05 24 NE S AS Sep 06 2013 1 9 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 1 Overview R20UT2696EJ0005 0 05 2 1 lt 1 10 06 2013 7572100 CPU GENMAI Optional Board RTK7721000B00000BR 2 Functional Specification 2 Functional Specification 2 1 Functions Overview Table2 1 1 lists the RTK7721000B00000BR Function Modules Table2 1 1 RTK7721000B00000BR Function Modules R7872100 pin functions used on RTK7721000B00000BR 2 3 Interface e Connect the 7572100 IEBus controller IEBB and the 2 4 LIN Interface Connect the R7S7
39. Connected to SDRAM 1 and 2 CN2 25 P7 4 CKE DVO_DATA20 P7 3 CAS DVO 19 CAS Connected to SDRAM 1 and 2 CN2 27 ET TXEN 5 7 CTx2 CTx2 paese to CAN transceiver SSIRxD1 P11 15 SPDIF OUT MISO1 LCDO CLK to LCDO output connector CN2 17 IRQ1 MMC D7 LCDO co lt lt ET RXD1 LCDO DATA14 LCDO DATA14 Connected to LCDO output connector VIO D5 VIO D5 Connected to CMOS camera input connector J21 P10 8 DVO DATA4 TIOC1A DVO DATA4 Connected to DVO input connector CN7 6 mE 10 9 DVO DATA5 TIOC1B DVO DATAS Connected to DVO input connector CN7 5 mE ET RXDO LCDO DATA15 LCDO 5 Connected to LCDO output connector VIO D4 VIO D4 Connected to CMOS camera input connector 10 LCDO DATA18 SD D1 O Connected to SD card slot CN7 16 LCD1 TCON5 SD 0 LCD1 TCONS5 Connected LCD1 output connector MMC D1 SSIRxD5 IRQ2 lU GN CTx0 IRQO P7_7 WE1 DQMLU CN2 23 DVO DATA23 TXD3 Connected to NOR flash memory 1 and2 to NOR flash memory 1 and 2 RTS7 SSIDATA2 2 P7 6 WEO DOMLL LENS DVO DATA22 ET TXD2 CTS7 Connected to connector _ _ _ TIOC3A IRQ1 P7 8 Connected to HCI connector ft ls K Q
40. Function OFF SW 1 Use P3 6 3 and P2 11 0 as Ethernet PHY Use P3 6 3 and P2 11 0 as MOST control pin control pin initial setting and expansion connector pin indicates setting function 2 7 2 SW14 7 Switch for System Setting Function Setting DIP Switch Function Use 6 3 as SCI pin initial setting Use P3 6 3 as SSIF pin indicates setting function Table2 7 3 JP1 and JP5 Function Settings Open Use SCI smart card interface mode Use SCI in serial communication interface mode initial setting Connect RxD3 pin to IrDA module Do not connect RxD3 pin to IrDA module initial setting indicates setting function R20UT2696EJ0005 0 05 5 5 2 21 06 2013 7572100 CPU Optional Board RTK7721000B00000BR 2 Functional Specification 2 8 Audio Interface The RTK7721000B00000BR has two audio DACs AK4353 Asahi Kasei Microdevices as the audio interface The I2C bus interface RIIC channel 2 and the on chip serial sound interface with FIFO SSIF channel 3 and 4 execute the register control for AK4353 and the output control of sound data respectively 14 pin executes the PDN control Figure 2 8 1 shows the Audio Interface Block Diagram To EEPROM To MOST connector To SD card slot Expansion connector To LCD panel I F2 10 Audio DAC1 87872100 U1 P1 4 SCL2 P1 5 SDA2 DV1 CLK 12 LCD1 CLK SD 0
41. HSYNC P11 14 SPDIF IN MOSI HSYNC 10 LCDO DATA18 LCD1 5 LCDO TCON5 MMC D6 LCDO TCONO SD D1 0 MMC 01 SSIRxD5 IRQ2 14 VSYNC P11 18 1 55110 LCDO_TCON4 VSYNC 14 LCDO DATA22 LCD1 D5 LCDO 1 SD D3 0 3 21 1 SSIRxD3 TxD2 IRQ6 SCL NC Connected to TP9 SCL NC Connected to TP14 Note Bold letters indicate setting functions R20UT2696EJ0005 0 05 5 5 3 25 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification 3 1 11 CMOS Camera Connector J17 The RTK7721000B00000BR has a CMOS camera connector 117 Figure 3 1 14 shows the Pinout Diagram of CMOS Camera Connector and Table 3 1 22 lists the CMOS Camera Connector Pin Assignments Top view of solder side Figure 3 1 14 Pinout Diagram of CMOS Camera Connector R20UT2696EJ0005 Rev 0 05 5 5 3 26 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification Table 3 1 22 CMOS Camera Connector Pin Assignments Signal Name Signal Name 1 S 10 6 DVO 2 6 DOUT P10 7 DVO DATA3 TIOCOD PWM2G ET TXD2 LCDO 17 PWM2H ET TXD3 DATA16 VIO 03 VIO D2 S DOUT2 P10 8 DATA4 4 8 DOUT3 P10_9 DVO_DATAS TIOC1B ET RXD0 LCDO DATA15 D4 ml RXD1 LCDO DATA14
42. LCD0 DATA16 0 8 LCD0 DATA15 0 9 LCD0 DATA14 0 10 LCD0 DATA13 0 11 LCD0 DATA12 0 12 LCD0 DATA11 0 13 LCD0 DATA10 0 14 LCD0 DATA9 0 15 LCD0 DATA8 1 0 1 0 DATA7 1 1 LCD0 DATA6 1 2 1 0 DATAS 1 3 1 0 DATA4 1 4 LCD0 DATA3 1 5 LCD0 DATA2 1 6 1 0 DATA1 1 7 1 0 DATAO P9 7 1 DATA23 P9 6 1 DATA22 P9 5 1 DATA21 P9 4 1 DATA20 P9 3 1 DATA19 P9 2 LCDl DATA18 P5 10 1 1 DATA17 P5 9 1 DATA16 P2 15 1 1 DATA15 P2 14 LCD1l DATA14 P2 13 1 DATA13 P2 12 1 1 DATA12 P2 11 1 1 DATA11 P2 10 1 DATA10 P10 2 10_4 EN 10 6 2 10 8 9 7 48 Em w Oo N gt gt NI 2 7 5 3 1 DATAS 4 DATAB Pb 7 _ DATAS DATA3 _ 2 DATA DATAD 24 3VCC 5 0 U8 ADV7123 Analog Devices R9 R8 R7 R6 R5 R4 R3 R2 R1 RO G9 G8 G7 G6 G5 G4 G3 G2 G1 GO B9 B8 B7 B6 B5 B4 B3 B2 B1 BO CLOCK BLANK SYNC PSAVE U10 ADV7123 Analog Devices R9 R8 R7 R6 R5 R4 R3 R2 R1 RO G9 G8 G7 G6 G5 G4 G3 G2 G1 GO B9 B8 B7 B6 B5 B4 B3 B2 B1 BO CLOCK BLANK SYNC PSAVE J15 41 1542 132 1734530 1 OM
43. LCD1 DATA3 10 Pb 4 TXOUT1P LCD1_DATA4 LCDO DATA19 DV1 DATA3 TxD3 DATA20 DV1_DATA4 RxD3 TIOCSC MISO3 TIOCSD DVO_DATA12 B5 5 TXOUT1M LCD1 DATA5 GND Vss LCDO DATA21 DV1 DATAS5 AUDIO XOUT TIOCOC FCE DVO DATA13 GO P5 6 LCD1 DATA6 G1 P5 7 TXOUTOM LCD1_DATA7 LCDO DATA23 RxD6 TIOCOD SPDIF OUT DATA15 G3 2 9 D25 RXD1 9 SSIWSO LRXDO LCD1 DATA9 VIO D9 95140 G5 P2 11 027 RXD3 SSITxDO LCD1 DATAt1 VIO 011 MISO4 R1 P2 13 029 55100 DVO_DATA13 SPBIO11 0 CTx3 SCK0 LCD1_DATA13 IRQ7 2 15 031 5 0 15 LCDO DATA22 DV1_DATA6 TxD6 IRQ6 SPDIF IN DATA14 G2 P2 8 D24 ET RXDO 8 SSISCKO LCDO TCON6 LCD1 DATA8 VIO 08 RSPCK4 G4 P2 10 D26 ET RXD2 DVO DATA10 SSIRxDO LTXDO LCD1 DATA10 VIO D10 MOSM RO P2 12 028 DATA12 SPBIOO1 0 CRx3 IRQ6 LCD1 DATA12 TIOC1B R2 P2 14 030 MOSIO DATA14 SPBIO21 0 CRx4 TxDO LCD1 14 SPBIO31 0 IRQO LCD1 DATA15 IRQ1 9 WE2 DQMUL ET MDC R5 P5 10 WE3 DQMUU AH HSYNC DVO VSYNC IRQ2 CRx1 IERxD CTx1 IETxD LCD1 DATA17 co LCD1
44. LCDO TCONS RxDO LCDO DATA IRQ2 TxDO LCDO DATA IRQ1 CAN 5 LCDO DATAO IRQO P2 11 D27 ET RXD3 ET RXD3 Connected to Ethernet PHY 8 2 1 0 DVO DATA11 SSITxDO0 P2 11 Connected to LIN connector sleep control CN7 33 SW2 1 OFF TIOC1A LCD1 DATA11 LCD1 DATA11 Connected to LCD1 output connector D11 MISO4 P2 6 D22 ET TXD2 ET TXD2 Connected to Ethernet PHY 8 2 1 0 DVO SSIRxD5 RxD1 SSIRxD5 Connected to HCI connector CN7 30 SW2 1 OFF VIO D6 LCDO DATA22 E21 P10 12 0 0 DATAS DVO DATA8 Connected to DVO input connector CN7 10 mE E4 m In m SSISCK1 RSPCKO LCDO DATA11 Connected to LCDO output connector LCDO DATA11 VIO D8 VIO D8 Connected to CMOS camera input connector E22 P2 5 D21 ET TXD1 ET TXD1 Connected to Ethernet PHY SW2 1 0N DVO SSIWS5 SSIWS5 Connected to HCl connector CN7 27 SW2 1 OFF LCDO 21 TxD6 DATA6 T IRQ6 SCK6 RXD1 LCDO DATA5 IRQ5 LCDO 6 SCK1 LCDO IRQ3 bl ___ P2 4 D20 ET TXDO Connected to Ethernet PHY SW2 1 0N DVO DATAA SSISCK5 SSISCK5 Connected to HCl connector CN7 28 SW2 1 OFF SPBCLK 1 SCK1 VIO D4 LCDO DATA20 P10 13 DVO DATA9 9 Connected to DVO input connector CN7 9 mE TI TI SSIWS1 55100 LCDO DATA10 Connected to LCDO output connector LCD
45. SSISCK3 SSISCK3 AK4353 U6 PDN MCKI BICK P4_13 LCD1_TCONO SD 07SSIWS3 LRCK 15 LCD1 2 SSITxD3 SDTI SD D2 0 SSITxD3 P11 4 DVO DATA16 SSISCK4 SSISCK4 LCDO_DATA3 P11 5 DVO DATA17 SSIWS4 LCDO_DATA2 SCL CCLK P11 6 DVO DATA18 genius SSIDATA4 LCDO DATA1 SDA CDTI 2 CSN 14 LCD1 TCON1 SD 0 P4 14 Chip address 3 22 5792 2 Clock Buffer X8 016 Audio DAC2 PWH REF CLK3 AW 4353 07 Note Letters in Red indicate functions in use MCKI SSISCK4 BICK SSIDATA4 SDTI LCD panel F1 3 I2C To DV input 1 CSN SCL CCLK 1_5 52 2 SDA CDTI To DV input 2 2 1 Figure 2 8 1 Audio Interface Block Diagram R20UT2696EJ0005 0 05 5 5 2 22 06 2013 7572100 CPU GENMAI Optional Board RTK7721000B00000BR 2 Functional Specification 2 9 CD Deck Interface RTK7721000B00000BR has a CD deck interface connector which is controlled by the on chip serial sound interface with FIFO SSIF channel 1 embedded in the 7572100 the Renesas serial peripheral interface RSPI channel 4 and the general I O ports The RSPI pin is also used in the audio CODEC 8978 control on
46. Table2 12 2 lists the SW2 1 DIP Switch for RTK772100BC00000BR System Setting Function Setting Table2 12 3 lists the RTK772100BC00000BR JP4 Function Setting and Table2 12 4 lists the JP6 1 7 JP2 and JP3 Function Settings Table2 12 1 RTK772100BC00000BR JP6 Function Setting 23 JP6 Use P3 7as LCD1 EXTCLK input pin Use P3 7 as CS1 output pin initial setting indicates setting function To SDRAM1 To DV input 1 20 Expansion connector CMOS camera I F Analog RGB connector 1 35 2 5 Video DAC1 J15 87572100 01 5 ADV7123 08 10 0 DVO CLK P10 0 P10 0 7 5 LCDO DATA 23 16 gt LCDO 23 VIO 10 1 DVO VSYNC P10 1 P10 8 15 4 LCDO DATA 15 8 LCDO DATA22 VIO VD j 3 3V 10 2 DVO HSYNC P10 2 P11 0 7 4 5 LCDO DATA 7 0 5 LCDO DATA 21 VIO HD EN 1 3 3V 3 LCDO DATA20 P10 3 FLD P10 15 4 DATA 11 0 T P10 15 4 DO ELKE LCDO DATA 8 19 VIO D 11 0 REF GLIKOUT 11_ 3 0 DATA 15 12 P11 3 0 eM 77 LCDO DATA 4 7 VIO D 15 12 P11 4 DVO DATA16 4 SSISCK4 LCDO 11 5 DVO DATA17 P11 5 SSIWS4 LCD0_DATA2 P11 6 DVO DATA18 P11 6 SSIDATA4 LCDO DATA1 P11 7 DVO DATA19 11 7 LCDO DATAO LCDO TCON1 TCONO P11 14 12 LCDO TCON 2 0 P11 14 12
47. VIO DO P10 3 TCLKD PWM2D CRS P10 2 HSYNC TCLKC PWM2C 10 0 DVO PWM2A 3 3V ENTE cue __ P11 14 SPDIF IN MOSI1 LCDO_TCONS EN OC ee P11 12 CRx1 RSPCK1 IRQ3 MMC D4 EN Ru P11 13 CTx1 SSL10 LCDO TCONA MMC D5 LCDO TCON1 P11 11 DVO DATA23 SD D2 0 RxD5 MMC D2 LCDO TCON3 P11 10 DVO DATA22 SD D3 0 TxD5 MMC D3 LCDO TCON4 P11 9 DVO DATA21 SD 0 SCK5 P11 8 DVO DATA20 SD 0 RTS5 MMC _ 5 MMC CLK LCDO0 TCON6 P11 15 SPDIF OUT 5 1 IRQ1 MMC D7 LCDO Note Bold letters indicate setting functions P10 1 DVO VSYNC TCLKB PWM2B TXER LCDO DATA22 VIO VD 11 13 17 19 21 23 27 29 31 33 35 3 39 10 12 14 E a 18 E 20 7 22 24 LCDO DATA20 VIO 28 30 2 34 36 38 40 R20UT2696EJ0005 0 05 5 5 3 19 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification Table 3 1 17 LCD Panel Connector Pin Assignments 412 ch1 For LCD KIT B01 Signal Name Signal Name 1 3 3 2 3 3V GND Vss P5 0 TXCLKOUTP LCD1 DATAO LCDO DATA16 DV1 DATAO TxD4 RSPCK3 5 1 TXCLKOUTM LCD1 DATA B2 Pb 2 TXOUT2P LCD1 DATA2 511 DV1 1 RxD4 DATA18 DV1_DATA2 SCK3 TIOCOB SSL30 TIOC1B MOSI3 5 3 TXOUT2M
48. information included herein Renesas Electronics does not assume any liability for infringement of patents copyrights or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document No license express implied or otherwise is granted hereby under any patents copyrights or other intellectual property rights of Renesas Electronics or others You should not alter modify copy or otherwise misappropriate any Renesas Electronics product whether in whole or in part Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from such alteration modification copy or otherwise misappropriation of Renesas Electronics product Renesas Electronics products are classified according to the following two quality grades Standard and High Quality The recommended applications for each Renesas Electronics product depends on the product s quality grade as indicated below Standard Computers office equipment communications equipment test and measurement equipment audio and visual equipment home electronic appliances machine tools personal electronic equipment and industrial robots etc High Quality Transportation equipment automobiles trains ships etc traffic control systems anti disaster systems anti crime systems and safety equipment etc Renesas Electronics products are nei
49. output initial setting indicates setting function R20UT2696EJ0005 Rev 0 05 5 5 2 18 06 2013 7572100 CPU Optional Board RTK7721000B00000BR 2 Functional Specification 2 5 SIM Card Interface The serial communication interface SCI embedded in the 7572100 responds to the smart card card interface for the ISO IEC7816 3 Identification Card as extension with asynchronous communication mode The RTK7721000B00000BR connects the 7572100 SCI pin to the SIM card slot Figure 2 5 1 shows the SIM Card Interface Block Diagram Table2 5 1 lists the SW2 1 DIP Switch for RTK772100BCO00000BR System Setting Function Setting Table2 5 2 lists the SW14 7 DIP Switch for System Setting Function Setting and Table2 5 3 lists the and JP5 Function Settings To CD deck connector To UART connector Expansion 2 connector To IrDA module 5 5 RxD JP5 87872100 01 LAN Option select U14 m Serial CD select U2 i SIM card slot J2 MDIO P3 4 ET RXCLK SSISCK1 5 SCK3 5 ET RXER SSIWS1 SCI TXDO TxD3 6 ET RXDV SSIRxD1 RxD3 SCI TXDO SCI RXDO Note Letters in Red indicate functions in use Optional Figure 2 5 1 SIM Ca
50. the RTK7721000B00000BR The select signal should be output at the port P3 3 when accessing to the DC deck interface Figure 2 9 1 shows the CD Deck Interface Block Diagram Table2 9 1 lists the SW2 1 DIP Switch for RTK772100BCO00000BR System Setting Function Setting Table2 9 2 lists the SW14 7 DIP Switch for System Setting Function Setting and Table2 9 3 lists the RTK772100BCO00000BR Function Setting To LAN I F To NAND flash memory To MMC card slot To IrDA module To audio CODEC To SIM card slot To UART connector Expansion connector 11 CD deck connector J8 R7S72100 U1 LAN Option select U14 select U2 5 96175 22 P3 4 15 1 SCI 8 SCK3 yo SSISCK1 5 ET SSIWS1 SCI TXDO TxD3 a SSIWS1 6 RXDV SSIRxD1 SCI RXDO RxD3 SSIRxD1 4 FRE RSPCK4 MMC D4 RSPCK4 P4 2 FALE MOSI4 D6 MESE 3 FWE MISO4 D7 MISO4 RES P112 a4 P1_13 JP3 IRQ6 2H _1 IRQ6 AUDIO CLK 78 To IRQ input switch SW6 Note Letters in Red indicate functions in use To HCI connector Figure 2 9 1 CD Deck Interface Block Dia
51. 0 0 SSIWS2 RTS1 CS5 3 3V i i N i i i A 9 7 LCD1 DATA23 SPBIO30 0 SSIDATA2 13 LCDO DATA21 LCD1 SD 0 MMC CMD SPBIO11 1 SSIWS3 RxD1 IRQ5 15 LCDO DATA23 LCD1 TCON2 SD D2 0 MMC D2 SPBIO31 1 SSITxD3 RxD2 IRQ7 21 23 25 27 29 1 3 14 LCDO DATA22 LCD1 SD D3 0 MMC 03 5 21 1 SSIRxD3 TxD2 IRQ6 P4 8 LCDO DATA16 LCD1 TCON3 SD CD 0 MMC CD SSISCK5 CTx2 SCKO IRQO 9 LCDO DATA17 LCD1 TCONA SD WP 0 SSIWS5 CRx2 TxDO 37 10 LCDO DATA18 LCD1 5 38 11 LCDO DATA19 LCD1 6 SD D1 0 D1 SSIRxD5 IRQ2 SD 0 MMC D0 SSITxD5 CTx4 SCK1 39 12 LCDO DATA20 LCD1 40 5V SD 0 MMC SPBIO10_1 SSISCK3 TxD1 IRQ4 Note Bold letters indicate setting functions R20UT2696EJ0005 0 05 3 21 2 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification Top view of component side O1 O _J 2 0 um Figure 3 1 12 Pinout Diagram of LCD Panel Connector 2 J14 Table 3 1 19 LCD Panel Connector Pin Assignments 5 1 J14 For ROP7724LE0011RL Signal Name Signal Name GND Vss GND Vss P5 0 TXCLKOUTP LCD1
52. 0 includes a smaller digital data transmission system IEBus controller EIBB designed to execute data transmission between units The RTK7721000B00000BR connects R7572100 IEBB pin to the 4 pin 2 5mm pitch connector via the IEBus transceiver IC Figure 2 3 1 shows the IEBus Interface Block Diagram Table 2 3 1 lists the RTK772100BC00000BR JP4 Function Setting and Table2 3 2 lists the JP7 and JP2 Function Settings To CAN transceiver Expansion 2 IEBus connector connector 2 3 3V IEBus transceiver R2A11210SP U4 To LCD panel I F2 R7S72100 U1 P5 10 CTx1 IETxD P5 10 3 LCD1 DATA17 ce P5 9 2 1 5_9 _ CRx1 IERxD LCD1 DATA16 3 To LAN I F Note Letters in Red indicate functions in use Figure 2 3 1 IEBus Interface Block Diagram Table 2 3 1 772100 00000 JP4 Function Setting Use 9 as 1 input pin Use P5 9as ET MDC output Use 9 as IERxD input or pin initial setting LCD1 DATA16 output indicates setting function 2 3 2 JP7 and JP2 Function Settings 2 3 of Open JP7 Use 5 9 as input pin or Use 9 as MDC output pin initial setting LCD1_DATA16 output pin JP2 Use P5 9 as IERxD input pin Use P5 9as LCD1 DATA16 output pin initial setting indicates setting function R20UT2696EJ
53. 00 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification 3 1 9 LCD Panel Connectors J10 to J14 The RTK7721000B00000BR has five connectors J10 to J14 with three types to connect the LCD panel Figure 3 1 11 and Figure 3 1 12 show the Pinout Diagram of LCD Panel Connectors Table 3 1 15 to Table 3 1 20 list the LCD panel connector Pin Assignments J13 LCD panel connector ch1 general purpose J12 LCD panel connector ch1 1 J11 LCD panel connector chO general purpose J10 LCD panel connector LCD KIT BO01 ocodgoooo 000000060000000000 0 0 ww I RENESAS RTK7721000800000BR 7572100 Optional Board Rev A MADE IN JAPAN gt 00000000000000000 Figure 3 1 11 Pinout Diagram of LCD Panel Connectors 1 10 to 913 R20UT2696EJ0005 0 05 5 5 3 17 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification Table 3 1 15 LCD Panel Connector Pin Assignments 1 J10 For LCD KIT B01 Signal Name Signal Name 1 3 3 2 3 3 jew GND Vss BO P11 E DATA19 SD 00 0 CTS5 11 6 DVO DATA18 SD Dt 0 B2 P11 5 DVO DATA17 SD WP 07 BA SSIDATA4 D1 LCDO_DATA1 ENS SSIWS4 LCD0 DATA2 P11 4 DATA16 SD CD 0 B4 P11 3 DATA15 SSISCK4 LCD0_DATA3 L
54. 0005 0 05 5 5 2 17 06 2013 R7S72100 CPU GENMAI Optional Board RTK7721000B00000BR 2 Functional Specification 2 4 LIN Interface The R7572100 includes a LIN UART interface RLIN3 The RTK7721000B00000BR connects the 7572100 RLIN3 pin to the 3 pin 2 5mm pitch connector via the LIN transceiver IC Figure 2 4 1 shows the LIN Interface Block Diagram Table2 4 1 lists the SW2 1 Switch for RTK772100BC00000BR System Setting Function Setting and Table2 4 2 lists the JP3 Function Setting To LAN I F Expansion 3 LIN connector LCD panel 2 95 connector 3 3 3V LIN transceiver R7S72100 U1 LAN Option select U13 MAX13020 U5 5V der P2 8 RXDO LCD1 8 P2 9 RXD1 LRXDO LCD1 DATA9 P2 10 ET RXD2 LTXDO LCD1 DATA10 P2 11 LCD1_DATA11 Note Letters in Red indicate functions in use Optional Figure 2 4 1 LIN Interface Block Diagram Table2 4 1 SW2 1 DIP Switch for RTK772100BC00000BR System Setting Function Setting DIP Switch Function OFF SW 1 Use P3 6 3 and P2 11 0 as Ethernet PHY Use P3 6 3 and P2 11 0 as MOST control pin control pin initial setting and expansion connector pin indicates setting function Table2 4 2 Function Setting Open Use P2 9 as LRXDO input pin Use P2 9as LCD1 9
55. 000B00000BR User s Manual 0 03 03 Nov 16 2012 Correct errors in expansion connectors in the table of pin function 0 04 Jul 12 2013 Add chappter 1 3 and cover Correct errors found when deciding details Check and review the pin names Add general name for the board GENMAI Correct errors 005 Sep 06 2013 Cometemyrs 0 00 A 7572100 CPU optional board RTK7721000B00000BR User s Manual Publication Date Sep 06 2013 0 05 Published by Renesas Electronics Corporation 424 NESAS SALES OFFICES Renesas Electronics Corporation Refer to http www renesas com for the latest and detailed information Renesas Electronics America Inc 2880 Scott Boulevard Santa Clara CA 95050 2554 U S A Tel 1 408 588 6000 Fax 1 408 588 6130 Renesas Electronics Canada Limited 1101 Nicholson Road Newmarket Ontario L3Y 9C3 Canada Tel 1 905 898 5441 Fax 1 905 898 3220 Renesas Electronics Europe Limited Dukes Meadow Millboard Road Bourne End Buckinghamshire SL8 5FH U K Tel 44 1628 651 700 Fax 44 1628 651 804 Renesas Electronics Europe GmbH Arcadiastrasse 10 40472 D sseldorf Germany Tel 49 211 65030 Fax 49 211 6503 1327 Renesas Electronics China Co Ltd 7th Floor Quantum Plaza No 27 ZhiChunLu Haidian District Beijing 100083 P R China Tel 86 10 8235 1155 Fax 86 10 8235 7679 Renesas Electronics Shanghai Co Ltd Unit 204
56. 0B00000BR Pin Functions 2 Pin Expansion Pin Name Function Description Remarks No Connector A15 VIN2A Composite video blanking and sync CVBS channel 0 input pin2 2 CLK Connected to DIPSW as a clock mode input 8 1 4 17 P1_6 SCL3 DV1_VSYNC SCL3 Connected to LCD1 output connector CN8 20 mM DVO DATA12 ew m COL IRQ3 ADTRG P1 0 SCLO DVO DATA16 SCLO Connected to HCl connectoro CN8 14 TCLKA IRQO VD Connected to LCDO output connector DVO VSYNC Connected to CMOS camera input connector P2 13 029 55100 SPBIO11 0 Connected to serial flash memory 2 CN8 7 DVO DATA13 SPBIO11 0 LCD1 DATA13 Connected to LCD1 output connector CTx3 5 LCD1 DATA13 IRQ7 A21 2_12 028 DVO 2 SPBIOO1 0 CRx3 IRQ6 LCD1_DATA12 TIOC1B x E bus 1 20 LRXDO DVO CLK TIOC1A IRQ5 RxD3 DATA16 P11 2 DVO DATA14 TIOC4C DVO DATA14 Connected to DVO input connector CN9 30 mE RxD6 LCDO DATAb5 014 LCDO DATA5 Connected to LCDO output connector VIO D14 Connected to CMOS camera input connector P9 7 LCD1 DATA23 SPBIO30 0 Connected to serial flash memory 1 CN9 23 m oe 7 SPBIO00_0 RxD1 B7 10 WE3 DQMUU AH CN9 15 HSYNC CTx1 IETxD LCD1_DATA17 PRA N CN9 11 DV1_CLK DVO_CLK CS2 EE Xi optional PS 7 TXOUTOM
57. 13 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification Table 3 1 20 LCD Panel Connector Pin Assignments 5 2 J14 For ROP7724LE0011RL Signal Name Signal Name 19 LCD14 2_14 030 MOSIO DVO_DATA14 20 LCD15 P2_15 D31 MISOO DVO_DATA15 SPBIO21_0 4 LCD1_DATA14 SPBIO31 0 RxDO me 23 n 9 WE2 DQMUL ET 24 E E 10 WE3 DQMUU AH DVO VSYNC IRQ2 CRx1 IERxD DVO HSYNC CTx1 IETxD LCD1 DATA17 LCD1 DATA16 25 LCD18 P9 2 LCD1 DATA18 SPBCLK 0 LCD19 P9 3 LCD1 9 SPBSSL 0 LTXDO SCK1 AO TxD1 27 LCD20 P9 4 LCD1 20 0 LCD21 P9 5 LCD1 DATA 1 SPBIO10 0 RxD1 SSISCK2 1 CS4 29 LCD22 P9 6 LCD1 DATA22 SPBIO20 0 LCD23 P9_7 LCD1_DATA23 SPBIO30_0 ssws CS5 SSIDATA mE 8 LCDO DATA16 34 EE 10 LCDO DATA18 LCD1 TCON3 SD CD 0 MMC CD LCD1 TCON5 SD D1 0 D1 SSISCK5 CTx2 SCKO IRQO SSIRxD5 IRQ2 LCDHSYN CS 9 LCDO DATA17 36 LCD1 SD WP 0 SSIWS5 2 8 mows mE 12 LCDO 20 40 BKPWM LCD1 CLK SD 0 MMC Connected to 3 3V via 10k Q resistor ie 1 SSISCK3 TxD1 IRQ4 mE 44 INC LE Connected to 3 3 via 10k resistor GND Vss vio
58. 16 IPOWERGOMNGUMATON 2 35 3 Operational 3 1 3 1 3 1 3 1 1 Expansion Connectors CNT to iiie tite dates ca ea ups coegi Ur Rau 3 3 3 1 2 SIEG da CC 3 10 9159 WAT GONMECION J3 3 11 3 1 4 IEBUS COnMECION M 3 12 3 1 5 My Nelesarieemc m c 3 13 3 1 6 Lineout Pin Jacks J6 40 3 14 3 1 7 PIC seo mA I 3 15 3 1 8 GD Deck Connection IS ioo eod div tees 3 16 3 1 9 LCD Panel Connectors J10 to 14 2 2 022 00 01 006 6500 880806000 3 17 3 1 10 Analog RGB Output Connectors J15 16 3 24 3 1 11 CMOS Camera Gonnector J17 he eee a 3 26 3 1 12 Digital Video Signal Input Connectors J18 919 3 28 3 2 Operation Pans LAY 3 31 3 2 1 J mpers JPI to 3 33 3 2 2 NI 3 35 3 3 DIMENSIONS UT 3 37 Appendix RTK7721000B00000BR Schematics 1 7572100 CPU
59. 1_DATA11 VIO D11 MISO4 P2 0 D16 ET TXCLK DVO SPBIOO0 1 MLB IRQ5 DO LCDO DATA16 P2 2 D18 ET TXEN DVO DATA2 SPBIO20 1 MLB SIG TIOC2B VIO D2 LCDO DATA18 P2 4 D20 ET TXDO DVO DATAA SSISCK5 SPBCLK 1 SCK1 VIO D4 LCDO DATA20 P2 6 D22 ET TXD2 DVO SSIRxD5 RxD1 D6 LCDO DATA22 P2 8 D24 ET RXD0 DVO DATA8 SSISCKO LCDO_TCON6 LCD1 DATA8 VIO 08 RSPCK4 P2 10 D26 ET RXD2 DVO DATA10 SSIRxDO LTXDO LCD1_DATA10 VIO 010 MOSI4 5V system power supply 3 3V system power supply GND R20UT2696EJ0005 0 05 5 5 3 7 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification Table 3 1 6 Expansion Connector Pin Assignments 6 8 Signal Name Signal Name 1 P3 4 LCDO TCONS3 ET RXCLK SSISCK1 2 3 LCDO TCON2 ET 1804 BS AUDIO XOUT2 5 SCK3 CTS1 RTS1 PWM2D 3 6 LCDO TCON5 RXDV SSIRxD1 4 5 LCDO TCONA RXER 55 51 RXDO TIOC3C RxD3 AUDIO XOUT3 TXDO TIOC3B TxD3 7 P2 13 D29 SSL00 DVO DATA13 8 P2 12 028 DATA12 SPBIO11 0 CTx3 SCK0 LCD1 DATA13 SPBIOO1 0 CRx3 IRQ6 LCD1 DATA12 IRQ7 TIOC1B P2 15 D31 MISO0 DVO DATA15 10 P2 14 D30 MOSIO DVO DATA14 SPBIO31 0 CAN 0 SPBIO21 0 4 TXDO LCD1 DATA14 LCD1
60. 2 J1 1 0 9 DV0 DATA5 0 11 DV0 Sron o 0_12 DV0_DATA8 0 14 00 DATA10 a 9 1 1 DV0 DATA13 1 3 DV0 DATA15 1 4 DV0 DATA16 1 6 DV0 DATA18 tO 9 1 9 0 DATA21 1 11 0 DATA23 0 1 0 VSYNC 0 1 CP86 3 5 6 P5 10 0 gt 15 0 DV P1 P10 5 10 5 DV0 DATAl P10_7 DV0_DATA3 6 P10 8 P10 8 DV0 DATA4 10 10 0 DATA6 P10 13 0 DATA9 P10_15 DVO_DATA11 errr P11 0 DV0 DATA12 P112 E P11_2 DV0_DATA14 P11 5 P11_5 DV0_DATA17 P11 7 M P11_7 DV0_DATA19 26 118 aA P11 8 DV0 DATA20 P11 10 11 10 0 22 a R120 P10_0 10 0 DV0 34 180 P10 2 10 2 0 HSYNC 36 38 40 LL S 15 0 DV J19 5VCC HIF3FC 20PA 2 54DSA P5_0 DV1_DATAO P5_2 DV1_DATA2 P5_4 DV1_DATA4 P5_6 DV1_DATA6 P1_5 DV1_CLK F 1 1 89 90 P5 1 1 DATAl P5 3 1 DATA3 P5 5 DV1 DATAS P5 7 1 P1 6 1 VSYNC Pl 7 1 HSYNC ti o n n Renesas Solutions Corp RTK7721000B00000BR DV DeRIK T21000B00000BR REVISION HISTORY Rev Issue date Description Summary Nov 5 2012 Preliminary issued Nov 12 2012 Review specifications 7572100 CPU optional board RTK7721
61. 2 Connectors Number Type Manufacturer Recommended p Parts Expansion connector 30 pin HIF3FB 30DA 2 54DSA HRS CN5 Expansion connector 20 pin HIFSFB 20DA 2 54DSA HRS BEEN a CN Expansion connecior 34pm SSWrirOrLO ame _ i Fmsoo6z2001 1 _ UARTemwedo SSEXHAUSD 11 IEBus connector 5 umewtpngk 010 201 _ HFSFCADPA2SMDSA HRS _ COdekcomedy 6 96176 2 2 0 LCDKi BO connector 1 General LCD connector HISFCMUPA2S4DSA HRS _ J18 J16 Analog RGB output connector XMALISPA32 OMRON _ 47 camera connector _ J18 Digital video signal input connector HIFSFC 40PA 2 54DSA HRS For 0 40 pin Digital video signal input connector HIF3FC 20PA 2 54DSA HRS For ch1 20 pin R20UT2696EJ0005 Rev 0 05 2 1 lt 1 8 06 2013 7572100 CPU GENMAI Optional Board RTK7721000B00000BR 1 Overview 1 7 Absolute Maximum Ratings 1 7 1 lists the RTK7721000B00000BR Absolute Maximum Ratings 1 7 4 RTK7721000B00000BR Absolute Maximum Ratings Analog 3 3V system power supply 0 3V to 4 6V AVss reference voltage Operating ambient temperature 0
62. 2100 LIN UART interface RLIN3 and the LIN 2 5 SIM Card Interface Connect the 7572100 serial communication interface SCI 2 6 IrDA Module Connect the 7572100 serial communication interface 5 and 2 7 UART Interface Connect the 7572100 serial communication interface SCI pin to Two 96KHz 24 bit D A converters are included CD Deck Interface Connect the 7572100 Renesas serial peripheral interface abaci ANN and serial sound interface SSIF and the CD deck HCI Module Interface Connect the pins for the 7572100 module to the MIL 2 11 LCD Panel Output Interface e Include 5 connectors with 3 types for LDC panel connectors Alpha Project LCD KIT BO1 connector 0 and ch1 Renesas ROP7724LE0011RL connector ch1 only General MIL standard connector and 1 2 12 Analog RGB Output Interface Convert the digital RGB for LCD to analog RGB using Analog Devices video DAC ADV7123 Analog RGB connectors D sub 15 pin connectorx2 2 13 Digital Video Signal Input Interface Include the digital video signal input connector for the 7 72100 5 2 8 2 9 10 2 General digital video signal input connector Digital video signal input connector 20 40 pin MIL standard connector 2 14 CMOS Camera Input Interface Connect the 7572100 capture engine unit CEU and the CMOS camera input connector Aptina CMOS camera MT9V024IA7XTCD ES connectorx1 Key Input Co
63. 22ON TIOCAD PWM2H SSITxDO P4 7 CN6 29 SW2 2 OFF DVO DATA15 L21 P2 0 D16 TXCLK ET TXCLK Connected to Ethernet PHY SW2 1 0N DVO DATAO 1 MLB CLK Connected to MOST connector CN7 24 SW2 1 OFF MLB IRQ5 DO LCDO DATA16 122 6 LCDO DATA14 MOSM SSIRxDO Connected to audio CODEC WM8978 SW2 2 ON PWM2G SSIRxDO P4 6 NC CN6 30 SW2 2 OFF DVO DATA14 P7 12 A4 55 6 Address bus CN3 27 ET RXD3 TIOCAA 4 P11 6 DVO 18 DVO DATA18 Connected to DVO input connector CN2 12 mE SSIWS4 Connected to DAC AK4353 2 LCDO DATA2 Connected to LCDO output connector Address bus CN3 28 Address bus CN3 29 DVO DATA16 Connected to DVO input connector CN2 14 DVO DATA17 Connected to DVO input connector CN2 13 I gt gt SSISCK4 Connected to DAC AK4353 2 LCDO Connected to LCDO output connector co Tot ess co ES 4 SD 01 0 SSIDATAA4 SSIDATA4 Connected to DAC AK4353 2 MMC D1 LCDO DATA1 LCDO DATA1 Connected to LCDO output connector 7 DVO 19 DVO DATA19 Connected to DVO input connector CN2 11 SD 0 CTS5 MMC D0 LCDO DATAO Connected to LCDO Pa l connector LCDO_DATAO Ir ox M MEM ___ em 9 3V system power supply 1 18V system power su
64. 234 5 5 au m lt CO 87572100 CPU GENMAI Optional Board RIK 21000B00000BH User s Manual NO Renesas Microcomputer RZ A Series All information contained in these materials including products and product specifications represents information on the product at the time of publication and is subject to change by Renesas Electronics Corporation without notice Please review the latest information published by Renesas Electronics Corporation through various means including the Renesas Electronics Corporation website http www renesas com Renesas Electronics WWW renesas com Hev 0 05 201 3 9 10 11 12 Notice Descriptions of circuits software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples You are fully responsible for the incorporation of these circuits software and information in the design of your equipment Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits software or information Renesas Electronics has used reasonable care in preparing the information included in this document but Renesas Electronics does not warrant that such information is error free Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the
65. 3 3 A3 3V obo Key input switch D3 3V Bus switch IrDA module HCI connector CD deck connector LCD panel connector Oscillator DV connector Clock buffer Audio DAC Video DAC Audio DAC Figure 2 16 1 Power Configuration Diagram R20UT2696EJ0005 Rev 0 05 5 5 2 35 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 2 Functional Specification R20UT2696EJ0005 Rev 0 05 5 5 2 36 06 2013 3 Operational Specification R7S72100 CPU GENMAI Optional Board RTK7721000B00000BR Operational Specification 3 Connector Overview 3 1 Figure 3 1 1 and Figure 3 1 2 show the RTK7721000B00000BR Connector Layouts 1012euuoo sie 101290002 1015 NIS zf uoisuedx3 GSN2 uoisuedx3 9N2 1012euuoo uoisuedx3 pN2 uoisuedxa N2 oo B 5 ee 7 NN oo uid 1noeur 6 lt IE a6 99 FESS di 5 90 2 8 eg 24 0 sa F Se mioo AFT m em 7 4012euuoo uoisuedx3 22 2 oo caccococoQ a TE k s 0000000000 0099990900000000
66. 4 P11 7 DVO DATA19 SD DO 0 CTS5 P11 6 DVO DATA18 SD D1 0 SSIDATA4 MMC DO LCDO DATAO CD LCDO DATAS P11 15 SPDIF OUT MISO IRQ1 P11 14 SPDIF IN 5 LCD0 TCON5 P11 13 CTx1 SSL10 LCD0 TCON4 P11 12 CRx1 RSPCK1 IRQ3 D4 5 22 P7_8 RD SSISCKS P7 7 WE1 DQMLU DVO DATA23 TXDS3 RTS7 SSIDATA2 TIOC2B LCDO TCON2 12 14 18 20 24 P7 6 WEO DOMLL DATA22 ET 2 CTS7 SSIWS2 TIOC2A 26 7 4 CKE DVO DATA20 ET TXD7 SSITxD1 TIOC1A 28 7 2 RAS DVO DATA18 ET TXER 4 2 SSIWS1 TIOCOC 30 7 0 MD BOOT2 CSO0 DVO DATA16 ET MDC SCK4 LTXDO GN D P7 5 RD WR DATA21 TXD1 P7 3 CAS DVO DATA19 ET TXEN P7 1 CS3 DVO DATA17 ET TXCLK Pos ovo gt 5V system power supply 3 3V system power supply R20UT2696EJ0005 0 05 5 5 3 4 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification Table 3 1 2 Expansion Connector Pin Assignments 2 4 Signal Name Signal Name 1 NMI 2 RES NC 5 1 LCDO TXER IRQ6 0 LCDO CLK ET TXCLK SCK2 TxD2 SCI TXD1 AUDIO PWM2B SCK1 TxD2 PWM2A RSPCK3 SSL30 7 3 LCDO 2 MDIO IRQ4 8 2 LCDO 1 ET TXEN RxD2 CTS1 RT
67. A1 P5 2 TXOUT2P LCD1 DATA2 DV1 P5 3 TXOUT2M LCD1 DATAS3 DV1 DATAS P5 4 P4 14 LCD1 DV1_DATA4 5 P4 10 LCD1 DATAS DV1 DATA5 P9 6 TXOUTOP P5 8 LCDO EXTCLK ey LCD1_DATAG DV1_DATA6 P5 7 TXOUTOM 2 LCD1_DATA7 1 To CAN transceiver P5 9 ET MDC CRx1 LCD1 DATA16 5 3 To LAN I F P5 10 CTx1 IETXD P5 10 LCD1 DATA17 4 To LAN I F LAN Option select 013 P2 8 ET RXDO LCD1 DATA8 9 ET RXD1 LRXDO LCD1 DATA9 10 ET RXD2 LTXDO LCD1_DATA10 P2_11 ET_RXD3 LCD1_DATA11 P5 8 CS2 LCDO EXTCLK Cw SDRAM1 3 2 6 NOR flash memory 2 P3 7 LCD1 EXTCLK CS1 2 B 6 Note Letters in Red indicate functions in use Figure 2 12 2 Analog RGB Output Interface ch1 Block Diagram 2 12 2 SW2 1 DIP Switch for RTK772100BC00000BR System Setting Function Setting DIP Switch Function SW 1 Use P3 6 3 and P2 11 0 as Ethernet PHY Use P3 6 3 and P2 11 0 as MOST control pin control pin initial setting and expansion connector pin indicates setting function R20UT2696EJ0005 Rev 0 05 5 5 2 30 06 2013 7572100 CPU Option
68. A12 6 TXOUTOP LCD1 LCDO DATA22 DV1 TxD6 IRQ6 SPDIF IN DVO DATA14 5V 13 P1 5 SDA2 DV1 CRx4 IRQ5 14 6 SCL3 DV1 VSYNC IERxD IRQ6 VIO CLK LCD1 EXTCLK GND Vss Note Bold letters indicate setting functions VIO 012 DATA12 P1 7 5 HSYNC LRXDO IRQ7 VIO D13 DATA13 GND Vss i co N CO k A R20UT2696EJ0005 0 05 5 5 3 30 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification 3 2 Operation Parts Layout Figure 3 2 1 and Figure 3 2 2 show the RTK7721000B00000BR Operation Parts Layouts DIP switch for video DAC setting JP3 LRXDO connection jumper SW14 oo EI oo oo JP2 IERxD connection jumper Figure 3 2 1 R20UT2696EJ0005 Rev 0 05 Sep 06 2013 Oo H am tt 2 E t DE RTK7721000B00000BR 7572100 Optional Board Rev 90000000090000900090 24 NE SAS SW1 to SW13 Key input switches JP1 SCI mode select jumper JP5 IrRXD connection jumper RTK7721000B00000BR Operation Parts Layout 1 Top View of Component Side 3 31 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification H Am m REN
69. A14 Data bus CN1 13 DVO DATA22 6 3 D3 LCD1 DATA11 Data bus CN1 17 LTXD1 IRQ2 CTS5 TIOC2B TxD2 DVO_DATA19 A D converter TOP reference voltage pin for video signal input Table 2 2 4 RTK7721000B00000BR Pin Functions 4 C14 REXT A D converter reference voltage pin for video 22k 0 1 I IZ CE input DV1 CLK Connected to DV1 input connector DVO DATA14 SPBIO21 0 LCD1 9 9 55140 LRXDO Connected to LIN connector CN7 31 SW2 1 OFF JP3 Short DVO DATA7 SSITxD5 SSITxD5 Connected to HCl connector CN7 29 SW2 1 OFF IETxD RTS1 VIO D7 LCDO DATA23 LCDO TCON5 TxD5 MOSI1 P6 1 D1 LCD1 DATA9 83V system power supply 1 18V system power supply GND Letters in Red indicate CPU board setting R20UT2696EJ0005 0 05 5 5 2 5 06 2013 R7S72100 CPU GENMAI Optional Board RTK7721000B00000BR 2 Functional Specification Table 2 2 5 RTK7721000B00000BR Pin Functions 5 IO CELERE ER 020 P2 8 D24 ET RXDO ET RXDO Connected to Ethernet PHY 00 SW21ON DVO DATAS SSISCKO LCD1 DATAS Connected to LCD1 output connector CN7 32 SW2 1 OFF LCDO TCON6 LCD1 DATA8 VIO D8 RSPCK4 P10 15 DATAt1 DVO DATA11 Connected to DVO input connector CN7 11 mE SSITxD1 MISOO LCDO_DATAS VIO 011 P10 14 DVO CN7 12 SSIRxD1 MOSIO LCDO DATA VIO D10
70. A15 SPDIF IN DVO DATA14 Vss Vss 11 8 LCDO EXTCLK IRQO DV1 12 Vss DVO CLK CS2 Vss 16 9 WE2 DQMUL ET MDC DVO VSYNC IRQ2 CRx1 IERxD LCD1 DATA16 Vss Vss P5 10 WES DQMUU AH DVO HSYNC CTx1 IETXD LCD1 DATA17 Vss 19 P9 3 LCD1 19 SPBSSL 0 TxD1 20 P9 2 LCD1 DATA18 SPBCLK 0O LTXDO SCK1 0 Co A A 1 N O1 21 P9 5 LCD1 21 SPBIO10 0 22 P9 4 LCD1 DATA20 SPBIOO0 0 RxD1 23 P9 7 LCD1 DATA23 0 24 P9 6 LCD1 DATA22 SPBIO20 0 SSIWS2 27 P11 1 DVO DATA13 TIOCAB TxD6 28 P11 0 DVO DATA12 TIOCAA SCK6 29 P11 3 DVO DATA15 TIOC4D 30 P11 2 DVO DATA14 TIOCAC RxD6 5V system power supply 3 3V system power supply GND R20UT2696EJ0005 0 05 24 NE SAS 3 9 Sep 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification 3 1 2 SIM Card Slot J2 The RTK7721000B00000BR has a SIM card slot J2 Figure 3 1 4 shows the Pinout Diagram of SIM Card Slot and Table 3 1 8 lists the SIM Card Slot Pin Assignments Top view of component side Figure 3 1 4 Pinout Diagram of SIM Card Slot Table 3 1 8 SIM Card Slot Pin Assignments Signal Name CLK 4 1 00 TCON3 ET RXCLK SSISCK1 AUDIO XOUT2 SCI_SCKO SCK3 NC without pins GND Vss 5 LCDO 4 RXER SSIWS1 AUDIO XOUTS TXDO
71. A6 TIOC2A 2 13 DVO DATA9 SSIWS1 55100 10 12 DVO DATAS SSISCK1 RSPCKO 15 DVO 11 SSITxD1 MISOO LCDO 08 10 14 DVO SSIRxD1 MOSIO 9 LCDO DATA17 LCD1 DATAS VIO D10 8 LCDO DATA16 LCD1 TCON3 SD CD 0 MMC CD SSISCK5 CTx2 SCKO IRQO 10 LCDO DATA18 LCD1 5 SD D1 0 MMC D1 SSIRxD5 IRQ2 SD WP 0 SSIWS5 CRx2 TxDO P4 11 LCDO DATA19 LCD1 TCON6 SD 0 MMC D0 SSITxD5 CTx4 SCK1 IRQ3 P4 13 LCDO DATA21 LCD1 TCONO SD 0 MMC SPBIO11 1 SSIWS3 RxD1 IRQ5 15 LCDO DATA23 LCD1 TCON2 SD 0 MMC D2 SPBIOS1 1 SSITxD3 RxD2 IRQ7 18 12 LCDO DATA20 LCD1 CLK SD 0 MMC CLK SPBIO10 1 M SSISCK3 TxD1 IRQ4 20 14 LCDO DATA22 LCD1 SD D3 0 3 5 21 1 SSIRxD3 TxD2 IRQ6 P2 1 D17 ET 24 SPBIO10 1 MLB DAT TIOC2A VIO D1 LCDO DATA17 P2 3 D19 ET DATA3 26 SPBIO30 1 IERxD CTS1 D3 LCDO DATA19 P2 5 D21 ET TXD1 5 28 SSIWS5 SPBSSL 1 TxD1 D5 LCDO DATA P2 7 D23 ET 30 SSITxD5 IETxD RTS1 VIO D7 LCDO DATA23 P2 9 D25 ET RXD1 DVO DATA9 32 SSIWSO LRXDO LCD1 DATA9 VIO D9 SSL40 P2 11 D27 ET DATAt1 34 SSITxDO LCD
72. AN Option select U13 JP6 P2 8 RXDO LCD1 8 P2 8 LCD1 7 0 BI7 0 P2_9 ET_RXD1 LRXDO Jo 79 281 77 LCD1 DATA9 EM 2 9 gt oy LCD output connector 2 3 10 ET 02 0 3A LCD1 DATA10 NEN 2 P210 P2 11 ET RXD3 e 4B LODI DATAH 1 LN E MUX 33 TCON 6 0 ey 5 LCD1 DATA 23 16 MIL connector m 77 P5 8 CS2 LCDO EXTCLK Po 8 LOD1_DATAI15 8 E TAM To SDRAM1 3 2 g To NOR flash memory 2 LCD1 7 0 P3 7 LCD1 EXTCLK CS1 ix CLK Socket X9 Socket X1 P5 8 AM LCDO EXTCLK CLK Note Letters in Red indicate functions in use Figure 2 11 2 LCD Panel Output Interface ch1 Block Diagram Table2 11 2 SW2 1 DIP Switch for RTK772100BC00000BR System Setting Function Setting DIP Switch Function 5 2 1 Use P3 6 3 and P2 11 0 as Ethernet PHY Use P3 6 3 and P2 11 0 as MOST control pin control pin initial setting and expansion connector pin indicates setting function R20UT2696EJ0005 0 05 2 2 27 06 2013 7572100 CPU Optional Board RTK7721000B00000BR 2 Functional Specification 2 11 3 RTK772100BC00000BR JP4 Function Setting Use 9 as 1 input pin Use P5 9as ET MDC output Use P5 9 as IERxD input pin or pin initial setting LCD1 DATA16 ou
73. ATION crc ss n Aa 2 1 2 1 a TAN 2 1 2 2 e 2 2 2 2 1 FAS e100 2 2 2 2 2 RTK7721000B00000BR Pin Functions 2 2 2 2 3 RTK7721000B00000BR Module Applicability 2 16 2 3 He E m 2 17 2 4 PAINS IG ACC ER 2 18 25 SIMI Gard Interes a 2 19 2 6 WIC CUS Im 2 20 2 7 Ves des an 2 21 2 8 Audo IEEE 2 22 2 9 DECK Intelate Tm E 2 23 2 10 Module 2 25 2411 LBGDPanelO ulput Interace i oce 2 26 2 12 Analog ROB Ouiput Interlde8 edens 2 29 2 13 Digital Video Signal Input 2 32 214 CMOS Camera Input 2 33 215 2 34 2
74. AUDIO XOUT 10 P3 12 LCDO DATA4 NAF4 SD 1 11 15 LCDO NAF7 12 P3 14 LCDO DATA6 NAF6 TRACECLK 15 1 LCDO DATA9 16 4 0 LCDO 8 FRE 17 P4 3 LCDO TIOCOD CTx3 18 21 22 10 4 DVO DATAO PWN2E TXDO LCDO DATA19 VIO DO 24 P10 6 DVO TIOCOC PWM2G 5 6 27 28 29 30 GN ET TXD1 LCDO DATA18 VIO D1 RSPCK4 MMC D4 2 LCDO DATA10 TIOCOC FALE CRx3 TxD2 MMC D6 z P10 7 DVO TIOCOD PWM2H 5 LCDO 55 10 7 LCDO 5 501 TIOCAD system power supply 3 3V system power supply 4 LCDO DATA12 RSPCK1 2 SSISCKO DATA12 6 LCDO DATA14 MOSI1 PWM2G SSIRxDO DVO_DATA14 D P10 5 DVO DATA1 PWM2F R20UT2696EJ0005 0 05 5 5 3 6 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification Table 3 1 5 Expansion Connector Pin Assignments 5 7 Signal Name Signal Name 1 AUDIO XTAL1 2 AUDIO XTAL2 Vss P10 9 DVO DATA5 TIOC1B ET RXD1 P10 8 DVO DATA4 TIOC1A 11 DVO DATA7 TIOC2B ET RXD3 10 10 DVO DAT
75. CDO DATA4 VIO 015 B5 P11 2 DATA14 RxD6 GND Vss 13 11_1 TU UTR 11 0 DVO DATA12 SCK6 LCDO DATA6 VIO 013 Ed LCDO VIO 012 15 G2 P10 15 DVO DATAt1 SSITxD1 G3 P10 14 DVO DATA10 SSIRxD1 D MISOO LCD0 DATAS VIO 011 MOSIO LCD0_DATAQ VIO 010 17 104 13 DVO DATA9 SSIWS1 55100 G5 10 12 DVO SSISCK1 LCDO 09 EN RSPCKO LCDO DATA11 08 RO P10 11 DATAT TIOC2B P10 10 DVO DATAG TIOC2A ET RXD3 LCD0 DATA12 VIO 07 ET RXD2 LCD0 DATA13 VIO 06 R2 P10 9 DVO DATA5 TIOC1B RXD1 P10 8 DATA4 RXDO LCDO DATA14 VIO 05 LCDO 5 VIO 04 R4 7 TIOCOD PWM2H R5 10 6 DATA2 PWM2G TXD3 LCD0 16 VIO 03 TXD2 LCD0_DATA17 02 GND Vss DE P11 12 CRx1 RSPCK1 IRQ3 MMC D4 LCD0 TCON2 HSYNC P11 11 0 0 23 SD D2 0 VSYNC P11 10 DVO DATA22 SD D3 0 RxD5 MMC D2 TCON3 TxD5 MMC D3 LCDO0 GND Vss LCDCLK 11_15 OUT 5 1 IRQ1 MMC D7 LCDO GND Vss P1 1 SDAO 7 IRQ1 VIO HD DVO_HSYNC INT P11_13 CTx1 SSL10 LCDO TCONA MMC D5 LCDO 1 RESET P11 14 SPDIF IN LCDO 5 D6 LCDO TCONO SCL 0 5 0
76. D13 DVO_DATA13 EMI 6 SCL3 DV1 VSYNC IERxD Ed D12 DVO_DATA12 LCD1 CONUS DO 0 DO SSITxD5 CTx4 SCK1 IRQ3 53 33V 54 435 GND Ves Note Bold letters indicate setting functions R20UT2696EJ0005 0 05 5 5 3 23 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification 3 1 10 Analog RGB Output Connectors J15 and J16 RTK7721000B00000BR has two analog RGB output connectors J15 and J16 Figure 3 1 13 shows the Pinout Diagram of analog RGB Output Connectors and Table 3 1 21 lists the Analog RGB Output Connector Pin Assignments 3 4 gh T RTKT7210008000008R R7572100 Optional Board Rev A P E 9000007 9906 e pu 85 il O ea lt lO 72 416 Analog RGB connector Figure 3 1 13 Pinout Diagram of analog RGB Output Connectors R20UT2696EJ0005 0 05 5 5 3 24 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification Table 3 1 21 Analog RGB Output Connector Pin Assignments Pin No Signal Name J15 J16 ch1 GND Vss GND Vss GND Vss GND Vss 7 GND 5 GND Vss fens GND Vss 13
77. ESAS RTK7721000800000BR A 87572100 Optional Board he TEM ID MADE IN JAPAN ATTENTION NM NAGER 55 90000900009000000000 000000000000000 oo ro 3 5 q Q 9 8 5 239 o o c 2 co 5 D lt Qs lt E T B 58 9 E amp E Figure 3 2 2 RTK7721000B00000BR Operation Parts Layout 2 Top View of Solder Side R20UT2696EJ0005 0 05 5 5 3 32 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification 3 2 1 Jumpers JP1 to JP7 The RTK7721000B00000BR has seven jumpers for system setting Figure 3 2 3 shows the Jumper Layout for RTK7721000B00000BR System Setting and Table 3 2 1 lists the Jumper Setting for Switching Multifunctional Pins 7 1 to 1 7 Top view of component side Top view of solder side Figure 3 2 3 Jumper Layout for RTK7721000B00000BR System Setting R20UT2696EJ0005 0 05 5 5 3 33 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification Table 3 2 1 Jumper Setting for Switching Multifunctional Pins JP1 to JP7 Setting Function JP 1 Short Connects SCI TXDO and SCI RXDO as the smart card interface mode
78. GENMAI Optional Board RTK7721000B00000BR 1 Overview 1 Overview 1 1 Overview RTK7721000B00000BR is an optional board for the 7572100 CPU board The 7572100 functions and its performance evaluation and the application software preceding development and evaluation can be executed by using the 7572100 CPU board RTK7721000B00000BR The features of the RTK7721000B00000BR are described below Includes the following connectors to connect the TFT LCD panel Alpha Project LCD KIT BO1 2 Renesas ROP7724LE0011RL 1 40 2 Includes video DAC and converts the TFT LCD panel control signal to the analog RGB The evaluation for the display function can be executed by connecting to the monitor for PC e Includes general MIL connectors to evaluate the digital video signal input function 40 20 1 Includes a 26 pin MIL connector to connect CMOS camera MT9VO241A7XTCD ES e Includes audio DAC CD deck interface and key input switch which enable the preceding development for audio system e Includes UART connector IrDA module SIM card slot LIN connector and IEBus connector as the R7S72100 peripheral function interface 20072696 0005 0 05 RENESAS 1 1 06 2013 7572100 CPU GENMAI Optional Board RTK7721000B00000BR 1 Overview 1 2 System Configuration using RTK7721000B00000BR Figure 1 2 1 shows the System Configu
79. LK input pin from HCI RTK772100BCOOOOOBR initial setting module interface indicates setting function R20UT2696EJ0005 Rev 0 05 eCENESAS 2 25 Sep 06 2013 7572100 CPU Optional Board RTK7721000B00000BR 2 Functional Specification 2 11 LCD Panel Output Interface The RTK7721000B00000BR has 5 connectors with 3 types for the LCD panel connection The video display controller 5 VDC5 embedded in the R7S72100 controls the LCD panel An oscillator should be mounted to X9 on the RTK772100BC00000BR when using P3 7 as the LCD1_EXTCLK input pin and to X1 when using P5 8 as the LCDO EXTCLK pin The LVDS termination resistor R315 to R318 or RLO to RL7 R14 R16 R17 R20 R22 R24 R26 and R29 on the RTK772100BCO00000BR should be removed because the signals from DATAO to may be affected when the LCD panel output interface is used Table2 11 1 lists the RTK772100BCO00000BR JP6 Function Setting Figure 2 11 1 and Figure 2 11 2 show the LCD Panel Output Interface Block Diagram Table2 11 2 lists the SW2 1 DIP Switch for RTK772100BC00000BR System Setting Function Setting Table2 11 3 lists the RTK772100BC00000BR 1 4 Function Setting and Table2 11 4 lists the JP6 1 7 JP2 and JP3 Function Settings 2 11 1 RTK772100BCO00000BR JP6 Function Setting 23 JP6 Use P3 7as LCD1 EXTCLK input pin Use P3 7 as CS1 output pin initial setting indicates setting function To HCI I F
80. O VIO D9 VIO D9 Connected to CMOS camera input connector 9 3V system power supply 1 18V system power supply GND Letters in Red indicate CPU board setting R20UT2696EJ0005 Rev 0 05 5 5 2 6 06 2013 7572100 CPU GENMAI Optional Board RTK7721000B00000BR 2 Functional Specification Table 2 2 6 RTK7721000B00000BR Pin Functions 6 eu Pin Name Function Description Remarks No Connector F 21 P2 2 D18 Connected to Ethernet PHY 0 SW2A ON DVO DATA SPBIO20 1 MLB SIG Connected to MOST connector CN7 26 SW2 1 OFF MLB SIG TIOC2B VIO D2 LCDO DATA18 P4 15 LCDO DATA23 SD D2 0 Connected to SD card slot CN7 19 LCD1 TCON2 SD 2 0 LCD1 TCON2 Connected to LCD1 output connector MMC D2 SPBIO31 1 SSITxD3 Connected to DAC AK4353 1 SSITxD3 RxD2 IRQ7 P11 13 CTx1 SSL10 LCDO 1 Connected to LCDO output connector mp LCDO_TCON4 MMC D5 LCDO Kal Ni MN RN IRQ3 MMC D4 LCDO TCON2 DM op RxD6 LCDO DATA IRQ7 IET E P4 14 1 00 DATA22 CN7 20 LCD1 TCON SD_D3_0 MMC D3 SPBIO21 1 14 Connected to DAC AK4353 1 and 2 020 P2 3 D19 ET CRS ET CRS Connected to Ethernet PHY SW2 1 0N DVO SPBIOSO 1 P2 3 Connected to MOST I F connector reset CN7 25 SW2 1 OFF IERxD CTS1 VIO D3 control LCDO DATA19 G21 P4 13 LCDO 21 SD CMD 0 Connected to SD card s
81. O 18 SCL1 RN FRB IRQ2 LCD1 EXTCLK B19 P2 15 D31 MISO0 CN8 9 DVO DATA15 SPBIO31 0 LCD1 DATA15 Connected to LCD1 output connector CAN LCD1 5 IRQ1 PVe a B22 P2 10 D26 ET RXD2 ET RXD2 ___ Connected to Ethernet PHY DVO_DATA10 SSIRXDO LTXDO LCD1 DATA10 LCD1 DATA10 Connected to LCD1 output connector VIO D10 MOSIA4 Pe 5 D5 LCD1 DATA13 D5 Data bus CN1 14 CTx2 SCK5 55110 DVO DATA21 6 2 D2 LCD1 DATA10 z Data bus CN1 18 LRXD1 IRQ7 TCLKA TIOC2A RxD2 DVO_DATA18 P11 3 DVO_DATA15 TIOC4D DVO_DATA15 Connected to DVO input connector CN9 29 mE LCDO DATA4 015 P11 1 DVO DATA13 9 27 TxD6 LCDO_DATAG 013 P9 5 LCD1 DATA2 ccc SPBIO10_0 SSISCK2 CTS1 LCD1_DATA21 Connected to LCD1 output connector P9_2 LCD1_DATA18 CN9 20 SPBCLK 0 LTXDO SCK1 AO E Short SSS es C10 P5 E LCD1 DATA5 LCDO DATA mS mounted DV1 DATA5 AUDIO XOUT PON Connected to LCD1 output connector TIOCOC DATA13 DV1 DATA5 Connected to DV1 input connector P5 4 TXOUTIP TXOUT1P Connected to LCD panel for LVDS LCD1 DATA4 LCDO DATA20 LCD1 DATA4 Connected to LCD1 output connector CN9 6 mE DV1 DATAA4 RxD3 DV1 DATA4 Connected to DV1 input connector DVO DA
82. P3B 6 4 BxB XH A 5 UART Connector J3 5VCC S5B XH A JST Top type SxB XH A 0 1 CP34 IEBus J4 5VCC S4B XH A LIN 95 S3B XH A Side type Decide by Parts layout Renesas Solutions Corp RTK7721000B00000BR SCIc IEB LIN D RTK7721000B00000BR_C A 2 5 6 P4 15 0 2 5 7 P1 15 0 2 5 6 7 P11 15 0 2 3 5 6 P2 15 0 2 P7 8 0 2 3 P3 15 0 900000 5VCC 3VCC HC 8VCC 5VCC 7 HIF3FC 20PA 2 54DSA 2 AUDIO XTAL2 7 _ 2 AUDIO XTAL1 P3 1 AUDIO CLK MCKO P4 12 5515 3 BICK 4 13 SSIWS3 LRCK 4 15 SSITxD3 AOUTL AOUTR CP39 S Audio U6 AK4353VF 94 6 HSJ1456 010320 JALCO 10uF 16V CE2 10uF 16V 10uF 16V CHANGE P1 0 SCLO 3VCC 1 SDAO P7 8 Port lt P2_4 SSISCK5 N P2_5 SSIWS5 P2_6 SSIRxD5 P2_7 SSITxD5 4 SCL2 7 6 57 P7 7 RTS7 P7 5 RxD7 P1 5 SDA2 e P7 4 07 SDA CDTI amp CAD1 CADO gt 9 gt Q x 3 3 n n n Q Q 4 CP45 3VCC 3VCC 3VCC 8VCC CE4 CE5 41 V 10 16 1O0pF 16V CD Deck 9 9 9 J8 5 96175 22 IRISO 3VCC 4 9 8 8 4j 5 13 flag6 R40 220 i FLAGE s Audio DAC2 07 CP46 2 7 RES amp CDRST 5 9 AKM ___10 9 49 9 VCOM
83. P5 3 LCDl DATA3 P5 DATAO P5 1 1 P5 2 LCD1 DATA2 B2 P5 9 LCD1 DATA16 P5 4 LCDl DATA4 P5 2 1 1 DATA2 P5 3 LCD1 DATA3 P5 3 1 1 DATA3 B3 P5 5 LCD1 DATAS P5 6 LCDl DATAG P5_4 LCD1_DATA4 P5 5 LCD1 DATAS P5_4 LCD1_DATA4 B4 P5 7 LCD1 DATA P5_6 LCD1_DATA6 P5_7 LCD1_DATA7 P5 5 LCD1 DATAS B5 P2 8 1 1 DATA8 P2 9 LCD1 DATA9 GND P2_10 LCD1_DATA10 P2 11 1 1 DATA11 P2 8 LCD1 DATAS P2 9 LCD1 P5 6 1 1 DATA6 60 P2 12 1 1 DATA12 P2 10 LCD1 DATA10 P2_11 LCD1_DATA11 P5_7 LCD1_DATA7 G1 P2_13 LCD1_DATA13 P2 14 1 1 DATA14 P2 12 1 1 DATA12 P2 13 LCD1 DATA13 P2 8 LCD1 DATA8 G2 P2 15 LCD1 DATA15 P2_14 LCD1_DATA14 P2_15 LCD1_DATA15 P2_9 LCD1_DATA9 G3 P5 10 LCD1 DATA17 P2 10 LCD1 10 G4 P9 2 LCD1 DATA18 P9 3 LCDl DATA19 P5_9 LCD1_DATA16 P5 10 LCD1 DATA17 P2 11 LCD1 DATA11 G5 P9 4 1 1 DATA20 P9 2 LCD1 DATA183VCC g P9 3 LCD1 DATA19 P2 12 LCDl DATA12 RO P9 5 LCD1 DATA21 P9 6 LCDl DATA22 P9 4 1 1 DATA20 274 28 o P9 5 LCD1 DATA21 P2 13 LCD1 DATA13 R1 P9 7 LCD1 DATA23 P9 6 LCDl DATA22 30 P9_7 LCD1_DATA23 P2_14 LCD1_DATA14 R2 P4_13 LCD1_TCONO P4_14 LCD1_TCON1 9 P2 15 1 DATA15 R3 P4 15 LCD1 TCON2 P4 8 LCD1 TCON3 4 8 LCD1 TCON3 LCDVSYN 8 t6 Hl 10 LCDDISP DE P4 10 LCD1 5 P5 9 LCD1 DATA16 R4 P4 9 1 1 P4 9 LCD1 4 LCDHSYN 9 35 NC 5 10 LCD1 DATA17 R5 PA 10 LCD1
84. RON 28 27 88 00 AN3V C14 AN3V Pill 14 1 0 TCONO 0 1yF 11 13 LCD0 35 94 1kQ 36 37 R95 Du ame d 2 DE 1 PV37P501C01 AN3V 13 j LL 916 41 1542 132 1734530 1 OMRON C16 AN3V P4 10 LCD1 TCON5 0 1uF P4 14 LCDl TCONl 46 14 Hsync 35 47 15 Vsync R107 1kQ 36 37 R108 R109 OL 2000 os i me VR2 _PV37P501C01 AN3V 13 iA e M LL LL LL LL LL RTK7721000B00000BR Video Encoder Renesas Solutions Corp DO 25 6 P10 150 lt lt gt 2 4 5 CMOS Camera J17 5VCC N2526 6002RB 3M P10_6 VIO_D2 P10 6 1 2 P10 7 P10 7 VIO D3 10 N PS8 in P10 10 VIO D6 iri sodio 12 ir 21013710209 M s 1 7 1 15 167 10 1 VIO VD 18 P1 1 Pl 1 SDAO 1 2107550 19 gt 9 lt __JRES 21 22 JP4 P10 0 VIO P10 0 23 HWP 3P G 23 26 3VCC x2 SG 8002CA 27MHz 4 3 15 0 lt gt 10 15 0 11 2 4 5 6 11 15 0 lt gt HIF3FC 40PA 2 54DSA 0_4 70_ 0 6 DV0 DATA
85. S1 PWM2D MISO3 RXD1 TENDO PWM2C MOSIS 5 LCDO 4 ET RXER SSIWS1 12 4 LCDO TCONS3 ET RXCLK SSISCK1 13 7 LCDO 6 SSITxD1 14 6 LCDO TCON5 RXDV SSIRxD1 LCD1 EXTCLK SCI CTSO RTSO TIOC3D RXDO RxD3 a 1 WDTOVF 11 17 P10 3 TCLKD PWM2D CHRS 18 P10 2 DVO HSYNC TCLKC PWM2C LCDO DATA20 VIO FLD TXEN LCDO DATA21 VIO HD 19 P10 1 DVO VSYNC TCLKB PWM2B 20 P10 0 DVO TCLKA PWM2A ET TXER LCDO DATA22 VIO VD ET TXCLK LCDO DATA23 VIO CLK 5V system power supply 3 3V system power supply GND Table 3 1 3 Expansion Connector Pin Assignments 3 CN5 19 P1 9 AN1 IRQS3 VIO D15 DVO DATA15 20 8 ANO IRQ 2 DREQO D14 DVO DATA14 5V system power supply 3 3V system power supply GND R20UT2696EJ0005 0 05 5 5 3 5 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification Table 3 1 4 Expansion Connector Pin Assignments 4 CN6 Signal Name Signal Name 1 P3_9 LCDO_DATA1 TRACEDATAYT1 2 P3 8 LCDO TRACEDATAO SD WP 1 6 TIOCAA SD CD 1 MMC CD 3 11 LCDO TRACEDATAS 4 P3 10 LCDO NAF2 TIOC4D SD DO 1 MMC DO TIOCAC SD D1 1 MMC D1 7 5 8 5VCC 13 LCDO 5
86. SIWS3 LCD KIT BO1 P4_12 LCD1_CLK P4 12 P4 9 P4 9 RGB666 SD 0 SSISCK3 1 P5 10 en LCD1 DATA17 R5 11 10 LCD1_TCONJ6 5 P4 11 10 P5 9 Pipa LCD1 DATAt6 SD D 0 1 0 P2 15 12 LCD1 DATA 15 12 R 3 0 E 9 LCD1 TCON4 SD WP 0 8 52 1139 5 7 6 i LCD G4 0 33 P4 8 8 LCD1 TCONS3 SD CD 0 P5 5 0 LCD1 DATAIS 0 P9 2 LCD1 DATA18 P9 2 l scL3 SCL ES SPBCLK 0 4 SDA3 SDA P9 3 LCD1 DATA19 P9 3 77 SPBSSL 0 LCD output connector 2 2 P9 4 7 LCD1 DATA 20 23 P9 4 7 J14 SPBIO 0 3 0 0 914 5 0 P5 0 TXCLKOUTP _ LCD1 CLK LCD1 DATAO DV1 DATAO e zc LCDDCK P5 1 CTI P5 1 TXCLKOUTM 7 LCD1 TCON3 LCD1 DATA1 DV1 DATA1 LCDVSYN P5 2 P5 2 TXOUT2P LCD1 TCON4 LCD1 DATA2 DV1 t LCDHSYN P5 3 P5 3 TXOUT2M P4 10 LCD1 5 LCD1 DATA3 DATA3 t LCDDISP P5 4 P5 4 11 TP LCD1 DATA4 DV1 DATA4 av 5 5 P5 5 TONAND LCD1 5 DV1_DATA5 ROP7724LE0011RL 5 6 P5 6 TXOUTOP RGB888 LCD1 DATA6 DV1 DATA6 P5 7 P5 7 TXOUTOM P1 6 5 8 1315 10 LCD1 DV1 ONIE 5 9 9 ET MDC CRx1 IERxD P17 e SDA3 SDAO LCD1 DATA16 219 P5 10 CTx1 IETxD P MOM P5 10 P9 7 3 LCD1 DATA 23 16 LCD1_DATA17 es 24 R 7 0 1 33v L
87. TA12 LVDSAPVcc 3 3V system power supply 1 18V system power supply GND Letters in Red indicate CPU board setting R20UT2696EJ0005 0 05 5 5 2 4 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 2 Functional Specification LTXDO IRQ4 TIOC1B SSIDATA4 TxD3 DVO_DATA17 LVDSPLLVcc D10 RET 5 6k 1 EU Pin Name Function Description Remarks No Connector C13 VRM A D converter BOTTOM reference voltage pin for video signal input C16 5 SDA2 DV1 CRx4 x to 17 IRQ5 VIO BOE to MOST I F connector LCD1 EXTCLK Connected to DAC Connected to DAC AK4353 1 2 1 and 2 P1 1 SDAO DVO DATA17 SDAO Connected to HCl connectoro CN8 13 TCLKC IRQ1 VIO HD Connected to LCDO output connector DVO HSYNC Connected to CMOS camera input connector 14 D30 MOSIO SPBIO21 0 Connected to serial flash memory 2 CN8 10 LCD1 DATA14 Connected to LCD1 output connector CRx4 LCD1 DATA14 _ C20 C21 P2 9 D25 ET RXD1 RXD1 to Ethernet PHY 1 ON DVO DATAS SSIWSO LRXDO JP3 Open LCD1 DATA9 Connected to LCD1 output connector SW2 1 OFF P2 7 D23 ET TXD3 ET TXD3 Connected to Ethernet PHY SW2 1 0N 6 7 D7 LCD1 DATA15 07 1 12 LCDO 6 RxD5 MISO 1 DVO DATA23 P6 6 D6 LCD1 DAT
88. TA17 SD WP 0 551 54 LCDO DATA2 P11 9 DVO DATA21 SD CMD 0 SCK5 P11 10 DVO DATA22 SD 03 0 TxD5 MMC LCDO 5 MMC D3 LCDO P11 11 DVO DATA23 SD 02 0 RxD5 17 19 21 23 25 27 9 GND Vss 2 D2 LCDO P10 1 DVO VSYNC TCLKB PWM2B P10 2 HSYNC TCLKC PWM2C NC NC GND Vss Note Bold letters indicate setting functions P10 0 DVO TCLKA PWM2A TXCLK DATA23 10 12 14 18 20 22 24 6 28 30 32 34 31 33 R20UT2696EJ0005 0 05 5 5 3 29 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification Table 3 1 24 Digital Video Signal Input Connector Pin Assignments 2 J19 ch1 Pin No Signal Name Pin No Signal Name P5 0 TXCLKOUTP LCD1_DATAO LCDO_DATA16 1 DATAO TxD4 RSPCK3 P5 2 TXOUT2P LCD1 DATA2 LCDO DATA18 DV1 DATA2 5 P5 1 TXCLKOUTM LCD1 DATA17 DV1 RxD4 TIOCOB SSL30 3 TXOUT2M LCD1 DATAS DATA19 DV1 TxD3 TIOC3C MISO3 3 3V 5 TXOUT1IM LCD1 DATA5 DATA21 DV1 DATA5 AUDIO XOUT TIOCOC DVO DATA13 P5 7 TXOUTOM LCD1 LCDO DATA23 DV1 RxD6 TIOCOD SPDIF OUT DVO DATA15 5V TIOC1B MOSI3 P5 4 TXOUT1P LCD1 DATAA DATA20 4 RxD3 TIOC3D DVO DAT
89. TCON5 11 LCD1 TCON6 38 GND P4 12 LCD1 P4 12 LCDl CLK 9 P4 14 LCDl TCON DE P4_13 LCD1_TCONO HSYNC NC 1 t NO P4 15 LCD1 TCON2 VSYNC NC 45 46 GND e 47 P17 SDAO 7 SDA3 P4 12 LCD1 LCDCLK 6 5 13 SCLO 16 mw 5 8 S 5 54 n E E g 55 5 NC Pl 7 SDA3 SDA G FG 6 SCL3 SCL P4 8 1 1 TCON3 INT NC 9 P4_9 LCD1_TCON4 RESET i ap io gt o Ea S OJO RTK7721000B00000BR LCD Output x e KG T D RTK7721000B00000BR_C A 2 5 7 P10 150 lt lt gt 2 4 5 7 P11 150 gt 11 15 1 0 24 5 15 0 2 5 P9 7 2 2 3 5 7 P5 10 0 9000 2 3 4 5 P2 15 0 PA 12 LCD1 23055 1 REF CLK1 0 1 CP69 CY2305SC 1H Cypress REF CLKOUT CLK1 CLK2 9 ul 5 5 14 65 8104 OMRON ON Low J rg li d tU d d rg P2 9 LCD P2 8 LCD P5 7 LCD P5 6 LCD P5 5 LCD P5 4 LCD P5 3 LCD P5 2 LCD P5 1 LCD P5 0 LCD 10kQ OFF Hi 0 0 LCD0 DATA23 0 1 LCD0 DATA22 0 2 LCD0 DATA21 0 3 LCD0 DATA20 0 4 1 0 DATA19 0 5 LCD0 DATA18 0 6 LCD0 DATA17 0 7
90. TOSLINK connector TIOC1B PWM1B RxD3 SSIWS5 13 A21 SPBSSL 1 Address bus CN3 8 V19 P3 8 LCDO DATAO NAFO NAFO Connected to NAND flash memory CN6 2 TRACEDATAO TIOCAA Ag 4 Connected to MMC card slot SD CD 1 MMC CD CD Connected to UDI connector v21 0 TDI Test data input v22 me preme 10 18 0 1 bus eus 11 SPBIO20 1 TIOC3A CTx4 SPBIO20 1 wc to serial flash memory 3 PWM1C SGOUT 0 SSITxD5 PB 11 A19 SPBIOSO 1 MEE c NN SGOUT 1 DVO CLK PLLVec 3 3V system power supply 1 18V system power supply GND Letters in Red indicate CPU board setting R20UT2696EJ0005 0 05 5 5 2 12 06 2013 7572100 CPU GENMAI Optional Board RTK7721000B00000BR 2 Functional Specification Table 2 2 12 RTK7721000B00000BR Pin Functions 12 EX 5E Wie Ves AVss e wis fave ON9910 O 9 LCDO Connected to flash memory TRACEDATAt TIOC4B Connected to MMC card slot SD WP 1 IRQ6G 1 Connected to UDI connector AUDIO X2 wee AUDIO Connects audio external clock 225792MHz P8 12 A20 1 Address bus CN3 9 SCK5 PWM1E SPBCLK 1 Connected to serial flash memory 3 SGOUT 2 SSISCK4 lt
91. VIO 05 S 4 P10 10 DATA6 S DOUTS 10 11 DVO TIOC2B ET RXD2 LCDO DATA13 RXD3 LCDO DATA12 07 S DOUT6 P10 12 DVO DATA8 SSISCK1 S DOUT7 P10 13 DVO DATA9 SSIWS1 S DOUT LSBO P10 4 DATAO S DOUT 1881 P10 5 DVO DATA TIOCOA PWM2E ET TXDO TIOCOB PWM2F TXD1 LCDO DATA18 LCDO DATA19 VIO D1 GND Vss 12 GND Vss o LV 10 2 HSYNC TCLKC NC 2 ET TXEN LCDO DATA 1 VIO HD FV P10 1 DVO VSYNC PWM2B ET TXER LCDO DATA22 VIO VD SCL P1 0 SCLO DATA16 TCLKA IRQO VD DVO VSYNCO 5V 202 5V S PIXCLK P10 0 TCLKA 24 GND Vss PWM2A ET TXCLK LCDO DATA23 SDA P1 1 SDAO DVO DATA17 TCLKC IRQ1 HD DVO_HSYNC NC RST Selects RES or 10 3 TCLKD PWM2D ET CRS LCDO DATA20 VIO FLD at JP4 10 14 16 20 22 C1 NO oo VIO CLK GND Vss 26 XMCLK Connects 27MHz oscillator Note Bold letters indicate setting functions R20UT2696EJO0005 0 05 5 5 857 Sep 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification 3 1 12 Digital Video Signal Input Connectors J18 and J19 The RTK7721000B00000BR has two digital video signal input connectors J18 and J19 Figure 3 1 15 shows the Pinout Diagram of Digit
92. al Board RTK7721000B00000BR 2 Functional Specification 2 12 3 RTK772100BC00000BR JP4 Function Setting Use 9 as 1 input pin Use P5 9as ET MDC output Use P5 9 as IERxD input pin or pin initial setting LCD1 DATA16 output indicates setting function 2 12 4 JP6 JP7 JP2 Function Settings 2 3 Open Use 2 as LCD1 DATA18 output pin Use P9 2 as SPBCLK 0 output pin initial setting Use P5 9 as IERxD Use P5 9as ET output pin initial setting Use P5 9 as IERxD input pin Use 9 LCD1 DATA16 output pin initial setting Use P2 9 as LRXDO input pin Use 9 as LCD1 DATA9 output pin initial setting indicates setting function R20UT2696EJ0005 Rev 0 05 5 5 2 31 06 2013 7572100 CPU GENMAI Optional Board RTK7721000B00000BR 2 Functional Specification 2 13 Digital Video Signal Input Interface The R7S72100 has digital video signal input pins DV pins respond to the YCbCr422 YCbCr444 RGB888 RGB666 and RGB5605 images The RTK7721000B00000BR connects the R7S72100 DV pins to the general MIL connectors The LVDS termination resistors R315 to R318 or RLO to RL7 R14 R16 R17 R20 R22 R24 R26 and R29 should be removed because the signals from DATAO to DV1_DATA7 may be affected when the digital video signal input interface chl is used Figure 2 13 1 shows the Digital Video Signal Input Inte
93. al Video Signal Input Connectors Table 3 1 23 and Table 3 1 24 list the Digital Video Signal Input Pin Assignments Top view of solder side Figure 3 1 15 Pinout Diagram of Digital Video Signal Input Connectors R20UT2696EJ0005 0 05 5 5 3 28 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification Table 3 1 23 Digital Video Signal Input Connector Pin Assignments 1 J18 0 Signal Name Signal Name 1 P10 4 DVO DATAO PWM2E 2 P10 5 DVO DATA1 TIOCOB PWM2F ET TXDO LCDO DATA19 VIO DO ET TXD1 LCDO DATA18 VIO D1 3 P10 6 DVO DATA2 TIOCOC PWM2G 4 P10 7 TIOCOD PWM2H 5 3 3V P10 8 DATA4 ET RXDO0 7 P10_9 DVO_DATAS TIOC1B ET_RXD1 10 10 DVO_DATA6 ET RXD2 10 11 0 2 RXD3 5V PRAES 10 12 8 SSISCK1 RSPCKO 10 13 SSIWS1 55100 10 14 DVO_DATA10 SSIRxD1 MOSIO P10 15 11 SSITxD1 MISOO 3 3V 16 P11_0 DVO_DATA12 5 6 11_1 13 TxD6 P11 2 DATA14 TIOC4C RxD6 P11 3 DV0 DATA15 TIOC4D 5V P11 4 DV0 DATA16 SD CD 0 SSISCK4 11 6 DATA18 SD D1 0 SSIDATA4 P11 7 DV0 DATA19 SD 0 CTS5 GND Vss 2 11 8 DATA20 SD 0 RTS5 11 13 15 11 5 DVO DA
94. cification 3 1 7 Connector J7 The RTK7721000B00000BR has an HCI connector 77 Figure 3 1 9 shows the Pinout Diagram of HCI Connector and Table 3 1 13 lists the HCI Connector Pin Assignments Top view of solder side Figure 3 1 9 Pinout Diagram of HCI Connector Table 3 1 13 Connector Pin Assignments Signal Name Signal Name GND 3 GND Vss 4 1 LCDO TCONO TXER IRQ6 TxD2 TXD1 AUDIO PWM2B SSL30 5 P1 0 SCLO DVO DATA16 TCLKA IRQO 3 3V _ 7 P1 1 SDAO DVO DATA17 TCLKC 8 RD SSISCKS3 CRx0 IRQ1 3 3 10 P2 4 D20 ET TXDO DVO DATAA SSISCK5 SPBCLK 1 SCK1 VIO D4 a M LCDO DATA20 11 P2 5 D21 ET TXD1 DVO 12 P2 6 D22 ET TXD2 DVO SSIWS5 SPBSSL 1 1 D5 SSIRxD5 RxD1 VIO D6 LCDO DATA22 M LCDO_DATA21 13 P2 7 D23 ET 0 0 14 45V SSITxD5 IETxD RTS1 VIO D7 M LCDO DATA23 a 15 45V 16 P7 6 WEO DQMLL DVO DATA22 9 20 RXD7 SSISCK2 TIOC1B 1 P7 4 20 TXD7 GND Vss SSITxD1 TIOC1A Note Bold letters indicate setting functions P7 7 WE1 DQMLU DVO DATA23 5 RD WR DVO DATA 21 ET TXD1 ET 3 7 SSIDATA2 TIOC2B R20UT2696EJ0005 0 05 5 5 3 15 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3
95. cted to UDI connector co dida 4 4 9 3V system power supply 1 18V system power supply GND Letters in Red indicate CPU board setting R20UT2696EJ0005 0 05 5 5 2 11 06 2013 7572100 CPU Optional Board RTK7721000B00000BR 2 Functional Specification Table 2 2 11 RTK7721000B00000BR Pin Functions 11 Expansion Pin Name Function Description Remarks Connector T22 P3 12 LCDO DATA4 NAF4 Connected to NAND flash memory CN6 10 SD 1 MMC an 1 Connected to MMC card slot LIIS CLK I ee e MISO2 IETxD TxD2 P11_11 DVO_DATA23 SD D2 0 5 D2 LCDO Connected to LCDO output connector LCDO TCONS3 lt lt lt CIC a no V N P8 7 A15 DV1 4 Address bus CN3 15 AUDIO XOUT IRQ5 ET COL P8 8 A16 DV1 DATA5 JP2 2 3 SSISCK5 TXD5 SPBSSL 1 Connected to serial flash memory 3 JP8 Short SGOUT_3 SSIWS4 TRST Initialization signal input pin 119 1 TDO 777777 Test data output CKIO Connected to SDRAM 1 2 CN2 2 A16 Address bus CN3 14 2 1 2 1 2 1 SPDIF IN SPDIF IN Connected to TOSLINK connector PWM1A TxD3 9 A17 DV1 DATA6 Address bus CN3 12 SPBIO10 1 SPDIF OUT SPDIF OUT Connected to
96. ction Setting and Table2 6 3 lists the 7 1 and JP5 Function Settings To CD deck connector Expansion 2 connector To UART connector 2 To SIM card slot 7572100 01 LAN Option select 014 Serial CD select U2 601 TXD0 SCI IrDA module P3 4 ET SSISCK1 SCI_SCKO SCK3 WE LN _ 381 SCI TXDO 5 ET RXER SSIWS1 SCI TXDO TxD3 P3 6 SSIRxD1 RxD SCI RxD3 Note Letters in Red indicate functions in use Optional Figure 2 6 1 IrDA Module Block Diagram Table2 6 1 1 SW2 1 Switch for RTK772100BC00000BR System Setting Function Setting DIP Switch Function OFF 5 2 1 Use P3 6 3 and P2 11 0 as Ethernet PHY Use P3 6 3 and P2 11 0 as MOST control pin control pin initial setting and expansion connector pin indicates setting function Table2 6 2 SW14 7 DIP Switch for System Setting Function Setting DIP Switch Function Use 6 3 as SCI pin initial setting Use P3 6 3 as SSIF pin indicates setting function Table2 6 3 JP1 and JP5 Function Settings Open Use SCI in smart card interface mode Use SCI in serial communication interface mode initial setting Connect 5 RXDO p
97. etting R20UT2696EJ0005 0 05 5 5 3 34 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification 3 2 2 Switches The RTK7721000B00000BR has 14 switches Figure 3 2 4 shows RTK7721000B00000BR Switch Layout Table 3 2 2 lists the RTK7721000B00000BR Switches and Table 3 2 3 lists the Function Description of DIP Switch for I F Setting SW14 Closeup SW1 SW3 SW5 SW7 oW9 Top view of eum component side Figure 3 2 4 RTK7721000B00000BR Switch Layout R20UT2696EJ0005 0 05 5 5 3 35 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification Table 3 2 2 7721000 0000 Switches SW1 to SW13 DIP switches for key input Refer to Section 2 15 for more details SW14 DIP switch for setting 8 package Refer to Table 3 2 3 for more details Table 3 2 3 Function Description of DIP Switch for I F Setting SW14 51714 1 BLANK pin setting Fix analog outputs IOG to blanking level swi42 OFF SYNC H Donotremove40lREcumentsouce SYNC pin setting ON SYNC L __ Remove 40IRE current source 0010404 swi4 3 OFF PSAVE H Normal operating mode 0000004 PSAVE pin setting PSAVE L Power down mode 000000000 SW14 4 BLANK pin setting Fix analog outputs IOG to blanking level
98. for RTK772100BCOOOOOBR System Setting Function Setting and Table2 10 2 lists the RTK772100BCOOOOOBR Function Setting To SDRAM p To LAN I F 2 Expansion To flash memory connector 13 JRQ6 CD deck connector R7S72100 01 LAN Option select U12 HCI connector J7 181 P2 4 TXD0 SSISCK5 LA Ssiscis AUDIO XOUT io 281 P2 5 ET TXD1 SSIWS5 AUDIO P2_6 ET_TXD2 SSIRxD5 X Lah 382 2 7 ET TXD3 SSITxD5 X Lano 482 P7 4 7 P7 5 RD WR 7 P7 6 WEO DQMLL CTS7 P7 7 WE1 WE DQMLU RTS7 P1 0 SCLO P1 1 SDAO P7 8 RD 1 IRQ6 AUDIO To IRQ input switch SW6 22 5792MHz Clock Buffer X8 U16 CLK Note Letters in Red indicate functions in use Figure 2 10 1 HCI Module Interface Block Diagram Table2 10 1 SW2 1 DIP Switch for RTK772100BC00000BR System Setting Function Setting DIP Switch Function OFF SW2 1 Use P3 6 3 and P2 11 0 as Ethernet PHY Use P3 6 3 and P2 11 0 as MOST control pin control pin initial setting and expansion connector pin indicates setting function Table2 10 2 RTK772100BC00000BR Function Setting 23 JP3 Use P3 1 as IRQ6 input pin from SW6 on Use P3 1 as AUDIO C
99. gram Table2 9 1 SW2 1 DIP Switch for RTK772100BC00000BR System Setting Function Setting DIP Switch Function OFF SW 1 Use P3 6 3 and P2 11 0 as Ethernet PHY Use P3 6 3 and P2 11 0 as MOST control pin control pin intial setting and expansion connector pin indicates setting function R20UT2696EJ0005 Rev 0 05 5 5 2 23 06 2013 7572100 CPU Optional Board RTK7721000B00000BR 2 Functional Specification 2 9 2 SW14 7 DIP Switch for System Setting Function Setting DIP Switch Function Use 6 3 as SCI pin initial setting Use P3 6 3 as SSIF pin indicates setting function Table2 9 3 RTK772100BCO00000BR Function Setting 23 Use P3 1 as IRQ6 input from SW6 Use P3 1 as IRQ6 input pin from CD deck RTK772100BCOOOOOBR initial setting interface indicates setting function R20UT2696EJ0005 0 05 5 5 2 24 06 2013 7572100 CPU Optional Board RTK7721000B00000BR 2 Functional Specification 2 10 Module Interface The RTK7721000B00000BR has a HCI module interface connector which 15 connected with the 7572100 on chip serial communication interface with FIFO SCIF channel 7 on chip serial sound interface with FIFO SSIF channel 5 and the I2C bus interface RIIC channel 0 Figure 2 10 1 shows the HCI Module Interface Block Diagram Table2 10 1 lists the SW2 1 DIP Switch
100. he European Union s Waste Electrical and Electronic Equipment WEEE Directive 2002 96 EC As a result this equipment including all accessories must not be disposed of as household waste but through your locally recognised recycling or disposal schemes As part of our commitment to environmental responsibility Renesas also offers to take back the equipment and has implemented a Tools Product Recycling Program for customers in Europe This allows you to return equipment to Renesas for disposal through our approved Producer Compliance Scheme To register for the program click here http www renesas com weee About This Manual 1 Purpose and larget Readers This manual is designed to provide the user with an understanding of the functions and operating specifications of this extension board A basic knowledge of electrical circuits logical circuits and microcomputers MCUs is necessary in order to use this manual This manual is composed of an overview of the optional board its functional and operational specifications Carefully read all notes described in the body of text in the manual The Revision History summarizes the modifications and additions to the previous versions Refer to the text of the manual for details The following document applies to 7572100 CPU optional board RTK7721000B00000BR Document Type Document Tit User s Manual Describes functional specifications 7572100 CPU optional This publ
101. ication devices memory maps electrical board characteristics and operational RTK7721000B00000BR specifications connectors and User s Manual switches The following documents apply to the RZ A1H group Make sure to refer to the latest version of these documents which can be obtained from Renesas Electronics website Document Type Document Title Application note Applications sample programs etc Available on Renesas Electronics website RENESAS TECHNICAL Information regarding product UPDATE specifications documents etc 2 Frequently Used Abbreviations Acronyms All trademarks and registered trademarks are the property of their respective owners Table of Contents 1 1 1 1 eU Dae 1 1 1 2 System Configuration using RTK7721000B00000BH 1 2 13 gt 1 3 1 4 XLT PAS AN ANG a 1 4 1 9 Block 8 2 1 5 1 6 9 18 erem 1 6 1 7 ADSOIUTS MAXIMUM o aera rue Pe beet 1 9 1 8 GONGIIONS T m mM 1 9 2 FUNCTIONAL SPECIFIC
102. in to IrDA module Do not connect RXDO pin to IrDA module initial setting indicates setting function R20UT2696EJ0005 Rev 0 05 24S NE S AS 2 20 Sep 06 2013 7572100 CPU Optional Board RTK7721000B00000BR 2 Functional Specification 2 7 Interface The R7S72100 includes a serial communication interface SCI The RTK7721000B00000BR connects the R7S72100 SCI pin to the 5 pin 2 5mm pitch connector Figure 2 7 1 shows the UART Interface Block Diagram Table2 7 1 lists the SW2 1 DIP Switch for RTK772100BCOOOOOBR System Setting Function Setting and Table2 7 2 lists SW14 7 DIP Switch for System Setting Function Setting To CD deck connector To LAN To SIM card slot 5 Expansion RxD3 connector 3 To IrDA module 87572100 U1 LAN Option select 014 Serial CD select U2 RxD3 lt RxD JP5 3 ET 4 RXCLK SSISCK1 5 SCK3 5 RXER SSIWS1 SCI TXDO TxD3 6 ET RXDV SSIRxD1 RXDO RxD3 Note Letters in Red indicate functions in use Optional Figure 2 7 1 UART Interface Block Diagram Table2 7 1 SW2 1 DIP Switch for RTK772100BC00000BR System Setting Function Setting DIP Switch
103. io CODEC WM8978 to audio CODEC WM8978 JP10 Short 0 5 mq om RSPCK2 RTS5 IRQ1 SCK2 ume ee SSL20 IERxD RxD2 RN MOSI ee 15 LCDO NAF7 E to NAND flash memory CN6 11 SD D2 1 Connected to MMC card slot R21 P3 14 LCDO DATAG NAF6 to flash memory CN6 12 TRACECLK 80 03 1 E E to MMC card slot um Connected to UDI connector R22 13 LCDO DATA5 NAF5 NAF5 Connected to NAND flash memory CN6 9 AUDIO XOUT SD CMD 1 ui CMD 1 Connected to MMC card slot MMC CMD CMD 7 T P11 8 DVO DATA20 DVO DATA20 Connected to DVO input connector CN2 8 SD 0 RTS5 MMC LCDO 6 Connected to LCDO output connector LCDO 6 P11 9 DVO DATA 1 DVO 21 Connected to DVO input connector CN2 7 SD CMD 0 SCK5 LCDO 5 Connected to LCDO output connector MMC CMD LCDO TCON5 P11 10 DVO DATA22 DATA22 Connected to DVO input connector CN2 6 SD 0 TxD5 D3 LCDO TCONA Connected to LCDO imus E connector LCDO TCON4 oe _ ee P3 10 LCDO DATA2 2 CN6 4 2 to MMC card slot T21 11 LCDO DATAS NAF3 CN6 3 TRACEDATAS TIOC4D 1 Connected to MMC card slot SD DO 1 MMC D Conne
104. lot CN7 17 LCD1 TCONO SD CMD 0 LCD1 TCONO Connected to LCD1 output connector MMC SPBIO11 1 SSIWS3 Connected to DAC AK4353 1 AS CN2 28 P7 2 RAS DVO DATA18 ET RXD4 CRx2 CRx2 Connected to CAN transceiver SSIWS1 TIOCOC P7 1 CS3 DVO DATA17 CS3 Connected to SDRAM 2 ET TXCLK TXD4 DVO SSISCK1 TIOCOB P11 14 SPDIF IN MOSI LCDO TCONO Connected to LCDO output connector LCDO TCON5 MMC D6 LCDO TCONO DVO DATA16 ET MDC C SCK4 LTXDO Connected to NOR flash memory 1 11 LCDO DATA19 SD DO O Connected to SD card slot CN7 15 LCD1 TCON6 SD DO 0 LCD1 6 Connected LCD1 output connector MMC D0 SSITxD5 CTx4 SCK1 P10 11 DVO 2 CN7 7 ET RXD3 LCDO_DATA12 E H21 10 DATA6 TIOC2A 7 8 RXD2 LCD0 DATA13 JP1 Open JP1 Short CN2 29 CN2 18 SW1 3 JP5 1 2 JP5 2 3 3 3V system power supply 1 18V system power supply GND Letters in Red indicate CPU board setting R20UT2696EJ0005 0 05 2 2 7 06 2013 7572100 CPU GENMAI Optional Board RTK7721000B00000BR 2 Functional Specification Table 2 2 7 RTK7721000B00000BR Pin Functions 7 H22 12 1 00 DATA20 CN7 18 LCD1 CLK SD 0 MMC SPBIO10 1 SSISCK3 Connected to DAC AK4353 1 P7 5 RD WR DVO DATA21 RD WR
105. mode input SWi t 17 10 AN2 IRQ4 TCLKB AN2 Connected to key input switch CNS 16 _ Y18 13 5 DVO HSYNC P1 13 Connected to CD deck connector FLAG6 CN5 11 WAIT 19 21 pen 15 A23 SPBIO11 0 EUM NE SPBIO10 1 TIOC2B 55120 SPBIO11 0 Connected to serial flash memory 3 RxD4 lt x lt gt lt lt lt TON 27 2 9 3V system power supply 1 18V system power supply GND Letters in Red indicate CPU board setting R20UT2696EJ0005 Rev 0 05 5 5 2 13 06 2013 7572100 CPU Optional Board RTK7721000B00000BR 2 Functional Specification Table 2 2 13 RTK7721000B00000BR Pin Functions 13 No Connector L HH Sa Bl T ERR IRQO MISO2 4 5 1 00 TCON4 ET Connected to Ethernet PHY SW21ON ET RXER SSIWS1 SSIWS1 Connected to CD deck connector CN4 11 AUDIO SCI qe SW14 7 OFF TxD3 SCI TXDO Connected to SIM card slot SW2 1 OFF SW14 7 ON JP1 Short SW2 1 OFF Connected to IrDA module 14 7 JP1 Open SW2 1 OFF SW14 7 ON JP1 Open TxD3 Connected to UART connector AAS 1 DVO VSYNC TCLKB 2 LCDO 22
106. mode select Disconnects SCI TXDO SCI RXDO as the serial communication interface mode JP2 Connected to IEBus transceiver U4 as IERxD input pin IERxD 2 3 Connected to LCD output connector 2 J12 to J14 and video DAC 2 010 as LCD1 DATA16 LCD1 DATA16 output pin Connected to LIN transceiver 05 as LRXDO input LRXDO Open Connected to LCD output connector 2 J12 to J14 and video DAC 2 U10 as LCD1 DATA10 LCD1 DATA10 output pin JP4 E Connects RES signal generated on the RTK772100BC00000BR to the reset signal CMOS camera of CMOS camera connector reset control Connects P10 3 pin to the reset signal of CMOS camera connector J17 JPS Connected to IrDA module U3 as 5 RXDO input SCI RXDO Connected to SIM card slot J2 as 5 RXDO input pin RxD3 Connected to UART connector J3 as RxD3 input pin Connected to LCD output connector 2 J12 to J14 and video 2 010 as LCD1 DATA18 output pin LCD1 DATA18 SPBCLK 0 Open Connected to serial flash memory 1 U6 and 2 U7 on the RTK772100BC00000BR as SPBCLK 0 output pin JP7 Short Connected to IEBus transceiver U4 as IERxD input pin ET MDC Connected to LCD output connector 2 J12 to J14 and video DAC 2 U10 as LCD1_DATA16 output pin IERXD Open to Ethernet PHY 020 the RTK772100BC00000BR as MDC output pin Indicates initial setting Note The power of the board should be off when changing the jumper s
107. n power supply Connects USB external clock Connects crystal resonator as a system clock source Connected to key input switch Connected to CD deck connector TRANS ADC analog reference voltage 24 NE SAS CN4 14 CN4 20 CN4 17 CN4 6 CN5 19 CN5 12 CN5 13 14 SW14 7 OFF SW2 1 OFF SW14 7 ON JP1 Short JP5 Open SW2 1 OFF SW14 7 ON JP1 Open JP5 Short SW2 1 OFF SW14 7 ON JP1 Open JP5 Open JP4 2 3 JP13 1 2 JP13 2 3 32 768KHz 4MHz 48MHz 13 33MHz GND Letters in Red indicate CPU board setting 2 15 2 Functional Specification R7S72100 CPU GENMAI Optional Board RTK7721000B00000BR RTK7721000B00000BR Module Applicability The symbol of Y in the table indicates that both modules can be used in combination and indicates that 2 2 3 combination use 15 not applicable Table 2 2 15 lists the RTK7721000B00000BR Module Applicability RTK7721000B00000BR Module Applicability Table 2 2 15 RTK7721000B00000BR RTK772100BC00000BR dur reubis osp gt gt gt gt P 9 P 7 7 gt gt IP IPHIPHRPHRPRPPPRPRRRRREEPPEVRI ain mdu SOW PPP PP r 0497 aon zandine gt gt e gt 8 I PP or 1 indino 991 2 1 5 gt gt gt gt gt gt I I P I PHP serr orr
108. nnect the 7572100 A D converter ADC and the switches Power Configuration Power configuration of the RTK7721000B00000BR Operation specifications Connectors switches described in Chapter 3 2 15 2 16 R20UT2696EJ0005 0 05 5 5 2 1 06 2013 7572100 CPU GENMAI Optional Board RTK7721000B00000BR 2 Functional Specification 2 2 CPU 2 2 1 572100 Overview The RTK7721000B00000BR is used by connecting with the 7572100 CPU board RTK772100BCO00000BR which has the 32 bit RISK microcomputer with the maximum CPU clock frequency 400MHx 2 2 2 RIK7721000B00000BR Pin Functions Table 2 2 1to Table 2 2 14 show the RTK7721000B00000BR Pin Functions Table 2 2 1 RTK7721000B00000BR Pin Functions 1 E En Pin Name Function Description nd Remarks No ae EAE E CRx2 IRQ3 RTS5 RSPCK1 DVO DATA20 Epes Ss dd RN NN input A4 P11 0 DVO DATA12 DVO DATA12 Connected to DVO input connector CN9 28 mE SCK6 LCDO DATA7 VIO 012 LCDO Connected to LCDO output connector VIO D12 Connected to CMOS camera input connector A5 P9 6 LCD1 DATA22 SPBIO20 0 Connected to serial flash memory 1 CN9 24 SPBIO20 0 SSIWS2 RTS1 LCD1 DATA22 Connected to LCD1 output connector P9 3 LCD1 DATA19 SPBSSL 0 Connected to serial flash memory 1 and 2 9 19 Short SPBSSL 0 TxD1 LCD1 DATA19 Connected to LCD1 output connector JP7 7
109. o o xsiilirEEolel l 2 2 22714 Module Name LCD1 EXTCLK CD output LCDO EXTCLK udio DAC1 AK4353 CMOS camera input IM card slot D deck ey input udio DAC2 AK4353 CD output 1 chO CD output 2 ch1 Serial flash memory 1 and 2 4 Digital video signal input 1 chO Diaital video signal input 2 ch1 Serial flash memroy 3 NAND flash memor Audio CODEC WM8978 NOR flash memroy 1 NOR flash memory 2 LCD output SD card slot 4 bits MMC card slot 8 bits LVDS output CoreSight 20 ARM JTAG 20 IRQ6 switch Video input 88000000800 LcZZM LH pins These pins can be used in combination when The oscillator should be mounted to on RTK772100BC00000BR when using LCD1 EXTCLK 2 P5 8 CS2 LCDO EXTCLK are the common 1 7 CS1 LCD1 EXTCLK are the common LCD1 EXTCLK is not used pins These pins can be used in combination when The oscillator should be mounted to X1 when using LCDO EXTCLK LCDO EXTCLK is not used 3 R315 to R318 or R14 R16 R17 R20 R22 R24 R26 and R29 on the RTK772100BCO00000BR need to be removed g the serial flash memory 1 and 2 in the 4 Set SPBCLK 0 less than 33 33MHz or disconnect JP6 when usin RI K7721000B00000BR connected 2 16 24 NE SAS R20UT2696EJ0005 0 05 Sep 06 2013 R7S72100 CPU Optional Board RTK7721000B00000BR 2 Functional Specification 2 3 IEBus Interface The R757210
110. or Pin Assignments Signal Name BUS BUS 3 GND Vss R20UT2696EJ0005 0 05 5 5 3 12 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification 3 1 5 LIN Connector J5 The RTK7721000B00000BR has a LIN connector J5 Figure 3 1 7 shows the Pinout Diagram of LIN Connector and Table 3 1 11 lists the LIN Connector Pin Assignments Top view of component side Figure 3 1 7 Pinout Diagram of LIN Connector Table 3111 Connector Pin Assignments Signal Name 1 45V GND Vss R20UT2696EJ0005 0 05 5 5 3 13 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Specification 3 1 6 Lineout Pin Jacks J6 and J9 The RTK7721000B00000BR has two lineout pin jacks J6 J9 Figure 3 1 8 shows the Pinout Diagram of Lineout Pin Jacks and Table 3 1 12 lists the Lineout Pin Jack Pin Assignments Top view of component side Figure 3 1 8 Pinout Diagram of Lineout Pin Jacks Table 3 1 12 Lineout Pin Jack Pin Assignments Pin No Signal Name J6 99 GND AVss GND AVss AOUTL Lch analog output pin of audio DAC 1 AOUTL Lch analog output pin of audio DAC 2 AOUTR Rch analog output pin of audio DAC 1 AOUTR Rch analog output pin of audio DAC 2 NC R20UT2696EJO005 Rev 0 05 5 5 3 14 06 2013 87572100 CPU GENMAI Optional Board RTK7721000B00000BR 3 Operational Spe
111. pply GND Letters in Red indicate CPU board setting R20UT2696EJ0005 Rev 0 05 24S NE S AS 2 9 Sep 06 2013 7572100 CPU Optional Board RTK7721000B00000BR 2 Functional Specification Table 2 2 9 RTK7721000B00000BR Pin Functions 9 No Connector GN MS vss o o M20 5 LCDO DATA13 SSL10 SSIWSO Connected to audio CODEC WM8978 5 2 2 0 PWM2F SSIWSO 5 CN6 27 SW2 2 OFF DVO DATA13 P4 4 LCDO DATA12 SSISCKO Connected to audio CODEC WM8978 SW2 2 ON RSPCK1 PWM2E P4 4 NC CN6 28 SW2 2 OFF SSISCKO DATA12 P10 7 DVO DATA3 TIOCOD DVO DATA3 Connected to DVO input connector CN6 23 PWM2H ET TXD3 LCDO 16 Connected to LCDO output connector LCDO DATA16 D3 VIO D3 Connected to CMOS camera input connector MDIO IRQ5 _ CRS TIOC4C IRQ6 gt ET RXCLK 55 TXDO TIOC4D N10 EM P10 4 DVO DATAO TIOCOA E mE oO 2 LCDO DATA19 Connected to LCDO output connector LCDO DATA19 VIO DO VIO DO Connected to CMOS camera input connector N20 5 DVO DATA1 TIOCOB DVO Connected to DVO input connector CN6 21 mE 2 12 12 12 2 PWM2F ET TXD1 LCDO 18 D N21 6 DVO DATA2
112. ration using RTK7721000B00000BR Host computer 87572100 CPU Optional Board RTK7721000B00000BR Speaker DC12V output AC adapter Accessory E _ 7572100 CPU board RTK772100BCO00000BR LCD panel ch1 LCD monitor UART IrDA 5 SIM Placed to the back of the board These items are not included Please purchase them separately Figure 1 21 System Configuration using RTK7721000B00000BR R20UT2696EJ0005 Rev 0 05 MAS 1 2 Sep 06 2013 7572100 CPU GENMAI Optional Board RTK7721000B00000BR 1 Overview 1 3 External Specifications Table 1 3 1 lists the RTK7721000B00000BR External Specifications Table 1 3 1 RTK7721000B00000BR External Specifications Description Includes three types of TFT LCD panel connectors e Alpha Project 1 2 Renesas ROP7724LE0011RL 1 e General MIL standard connector 40 pinx2 Converts digital RGB for TFT LCD to analog RGB using Analog Devices video DAC ADV7123 Analog RGB connector D sub 15 pin connectorx2 3 Digital video signal input Includes digital video signal input connector for R7S72100 VDC5 General MIL connector 40 pinx1 20 pinx 1
113. rd Interface Block Diagram Table2 5 1 SW2 1 DIP Switch for RTK772100BC00000BR System Setting Function Setting DIP Switch Function OFF SW 1 Use P3 6 3 and P2 11 0 as Ethernet PHY Use P3 6 3 and P2 11 0 as MOST control pin control pin initial setting and expansion connector pin indicates setting function 2 5 2 SW14 7 DIP Switch for System Setting Function Setting DIP Switch Function Use P3 6 3 as SCI pin initial settin Use P3 6 3 as SSIF pin indicates setting function Table2 5 3 JP1 and JP5 Function Settings Open Use SCI in smart card interface mode Use SCI in serial communication interface mode initial setting Connect SCI_RXDO0 pin to IrDA module Do not connect SCI RXDO pin to IrDA module initial settin indicates setting function R20UT2696EJ0005 Rev 0 05 5 5 2 19 06 2013 7572100 CPU GENMAI Optional Board RTK7721000B00000BR 2 Functional Specification 2 6 IrDA Module The R7572100 includes a serial communication interface SCI which transmits receives the IrDA infrared Data Association communication waveform based on the IrDA standard working with the IrDA module The RTK7721000B00000BR connects the R7S72100 SCI pin to the IrDA module Figure 2 6 1 shows the IrDA Module Block Diagram Table2 6 1 lists the SW2 1 Switch for RTK772100BC00000BR System Setting Function Setting Table2 6 2 lists the SW14 7 DIP Switch for System Setting Fun
114. rface Block Diagram CMOS camera E PP LCD panel l F1 20 R7S72100 U1 DV input connector 1 918 P10 0 DVO CLK P10 0 P10 0 P10 1 DVO VSYNC P10 1 LCDO DATA22 VIO VD DVO VSYNC P10 2 DVO HSYNC P10 2 P10 2 LCDO DATA 21 VIO HD P10 15 4 DATA 11 0 P10 15 4 LCDO DATA 8 19 VIO D 11 0 DVO HSYNC DVO DATA 11 0 11 8 0 15 12 P11 3 0 LCDO DATA 4 7 VIO D 15 12 E DVO DATA 15 12 3 3V P11 4 DVO DATA16 P11 4 SSISCK4 LCDO DATA3 DVO DATA 23 19 P11 5 DVO DATA17 P115 SSIWS4 1 DATA2 DVO DATA 18 16 P11 6 DVO 8 P11 6 SSIDATA4 LCDO DATA1 P11 7 DVO DATA19 P411 7 3 LCDO DATAO To audio DAC2 P11 11 8 DVO DATA 23 20 P11 11 8 10 LCDO 3 6 aay LCD panel I F2 To audio DAC To EEPROM P1 5 SDA2 DV1 CLK 215 To MOST DV input connector 2 J19 connecor lt 1 6 1 5 DV1 P1 6 SCL3 DV1 VSYNC P1 7 SDA3 DV1 HSYNC 1 DV1 VSYNC T P5 0 TXCLKOUTP ALO LCD1 DATAO DV1 DATAO REO 5 0 DV1 HSYNC P5 1 TXCLKOUTM RL1 LCD1 DATA1 DV1 DATA1 P5 2 TXOUT2P LCD1 DATA2 DV1 DATA2 P5 3 TXOUT2M LCD1 DATAS DV1 DATAS P5 4 A LCD1 DATA4 DV1 DATA4 m DV1 DATA 7 0
115. roducts are not subject to radiation resistance design Please be sure to implement safety measures to guard them against the possibility of physical injury and injury or damage caused by fire in the event of the failure of a Renesas Electronics product such as safety design for hardware and software including but not limited to redundancy fire control and malfunction prevention appropriate treatment for aging degradation or any other appropriate measures Because the evaluation of microcomputer software alone is very difficult please evaluate the safety of the final products or systems manufactured by Please contact Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances including without limitation the EU RoHS Directive Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture use or sale is prohibited under any applicable domestic or foreign laws or regulations You should not use Renesas Electronics products or technology described in this document for any purpose relating to mili
116. tary applications or use by the military including but not limited to the development of weapons of mass destruction When exporting the Renesas Electronics products or technology described in this document you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations It is the responsibility of the buyer or distributor of Renesas Electronics products who distributes disposes of or otherwise places the product with a third party to notify such third party in advance of the contents and conditions set forth in this document Renesas Electronics assumes no responsibility for any losses incurred by you or third parties as a result of unauthorized use of Renesas Electronics products This document may not be reproduced or duplicated in any form in whole or in part without prior written consent of Renesas Electronics Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products or if you have any other inquiries Note 1 Renesas Electronics as used in this document means Renesas Electronics Corporation and also includes its majority owned subsidiaries Note 2 Renesas Electronics product s means any product developed or manufactured by or for Renesas Electronics 2012 4 WEEE Directive Renesas development tools and products are directly covered by t
117. ther intended nor authorized for use in products or systems that may pose a direct threat to human life or bodily injury artificial life support devices or systems surgical implantations etc or may cause serious property damages nuclear reactor control systems military equipment etc You must check the quality grade of each Renesas Electronics product before using it in a particular application You may not use any Renesas Electronics product for any application for which it is not intended Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for which the product is not intended by Renesas Electronics You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics especially with respect to the maximum rating operating supply voltage range movement power voltage range heat radiation characteristics installation and other product characteristics Renesas Electronics shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges Although Renesas Electronics endeavors to improve the quality and reliability of its products semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions Further Renesas Electronics p
118. tput indicates setting function 2 11 4 JP6 JP7 JP2 and Function Settings 2 3 Open Use 2 as LCD1 DATA18 output pin Use P9 2 as SPBCLK 0 output pin initial setting Use P5 9 as IERxD Use P5 9as ET output pin initial setting Use P5 9 as IERxD input pin Use 9 LCD1 DATA16 output pin initial setting Use P2 9 as LRXDO input pin Use 9 as LCD1 DATA9 output pin initial setting indicates setting function R20UT2696EJ0005 Rev 0 05 5 5 2 28 06 2013 7572100 CPU Optional Board RTK7721000B00000BR 2 Functional Specification 2 12 Analog RGB Output Interface The RTK7721000B00000BR includes video DACs and converts the LCD panel control signal to the analog RBG The signal of the converted analog RGB is output from the D sub 15 pin connector The oscillator should be mounted to X9 the RTK772100BC00000BR when using P3 7 as LCD1_EXTCLK input pin and to X1 when using P5 8 as the LCDO EXTCLK pin The LVDS termination resistors R315 to R318 or RLO o RL7 R14 R16 R17 R20 R22 R24 R26 and R29 on the RTK772100BCO00000BR should be removed because the signals from DATAO to DATA7 may be affected when the analog RGB output interface 1 is used Table2 12 1 lists the RTK772100BCO00000BR JP6 Function Setting Figure 2 12 1 and Figure 2 12 2 show the Analog RGB Output Interface Block Diagram

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