TWR-K60N512 Tower Module
Contents
1. rss UD dre UR TREE e RE Ea ORE D 11 2 LD ECl TEN o o KE AN Datacenter od ec a d Ld c e c d rra d 12 PAUTAS 13 2 12 Secure Digital Card Slot teta 13 2 13 External Bus Interface FlexB s 52i tuse ecrit isse de ae pepe teta vase De lada e E uA GUY 13 3 mper Tables ibit iiec sia cor Fu ni ird od hti cci OG eL Ob F E Qe I a ere 13 4 Input Output Connectors and Pin Usage Table 14 5 Tower Elevator Connections ree nnn re na re i i a o R8 15 TWR K60N512 Tower Module User s Manual Page 2 of 17 freescale List of Figures Figure 1 Freescale Tower System Overview 4 Figure 2 Callouts on front side of the 60 512 5 Figure 3 Callouts on back side of the TWR K60N512 rene 6 Figure 4 TWR K60N512 Block eode ni peau pec etes 7 Figure 5 Infrared Port Implementation iii 10 List of Tables Table 1 Cortex Debug ETM Connector lt lt lt an da kara 9 Table 2 General Purpose TWRPI socket pinout inner 11 Table 3 Touch TWRPI SOCKET Pinout ounces pecca dpt era eg bct hee Read nantes 12 Table 4 Ethernet operation jumper settings iii2. 1 8 PWM2 PTC3 B39 PWM5 PTD5 A39 PWM1 PTC2 B40 PWM4 7 A40 PWMO PTC1 B41 25 A41 RXDO PTE25 B42 24 42 TXDO PTE24 B43 1WIRE M3 RXD1 PTC16 B44 5 0 MISO PTD14 MA TXD1 PTC17 B45 SPIO MOSI PTD13 A45 VSS VSSA B46 SPIO 50 b PTD11 A46 VDDA VDDA TWR K60N512 Tower Module User s Manual Page 16 of 17 a z freescale semiconductor Pin Side Pin Side A Name Usage Name Usage B47 SPIO_CS1_b PTD15 A47 VREFA1 VREFH B48 SPIO PTD12 A48 VREFA2 VREFL B49 GND Ground A49 GND Ground B50 SCL1 PTD8 A50 GPIO14 B51 SDA1 PTD9 A51 GPIO15 B52 GPIOS SD CARD DET PTE28 A52 GPIO16 B53 05 0 DP PDOWN A53 GPIO17 B54 05 0 DM PDOWN A54 USBO DM USBO DM B55 IRQ H PTA24 A55 USBO DP USBO DP B56 IRQ G PTA24 A56 USBO ID B57 IRQ F PTA25 A57 USBO VBUS VREGIN B58 IRQ E PTA25 A58 TMR7 B59 IRQ D PTA26 A59 TMR6 B60 IRQ C PTA26 A60 TMR5 B61 IRQ B PTA27 A61 TMR4 B62 IRQ A PTA27 A62 RSTIN_b RESET_b B63 EBI ALE EBI_CS1_b PTDO A63 RSTOUT b RESET b B64 EBI CS0 b PTD1 A64 CLKOUTO PTC3 B65 GND Ground A65 GND Ground B66 EBI AD15 PTB18 A66 EBI AD14 PTCO B67 EBI AD16 PTB17 A67 EBI AD13 PTC1 B68 EBI_AD17 PTB16 68 EBI AD12 PTC2 B69 EBI AD18 PTB11 A69 EBI_AD11 PTC4 B70 EBI AD19 PTB10 A70 EBI AD10 PTC5 B71 EBI R W b PTC11 71 EBI AD9 PTC6 B72 EBI OE b PTB19 A72 EBI AD8 PTC7
3. y 2 freescale TWR K60N512 Tower Module User s Manual Rev 1 0 Freescale Semiconductor Inc 2 freescale semiconductor Table of Contents 1 TWR K60N512 and TWR K60N512 KIT Overview eere ee e 4 d 4 E M MAUI E EE 5 1 35 Getting Started e 6 1 4 Reference Documents sise darti Cu Gi idc er n bd ca i or D Pc a a 6 2 Hardware BescEIDEIE Mix UNE ANDR SUE QLTR M DNA naian 6 2 1 K60N512 Microcontroller eese tette ttn anaia tta teat tata ta ttt sad 7 2 2 Clockih T 8 2 3 5 POW EM paira ay cad excavate 8 Oii 8 2 4 Debug Interface A N cde dtes nuce 9 De FEA ONE mcm 9 24 2 Cortex Debug ETM COnnecCtOFr cire tette teg pepererat besa lan ae adire eet nn diese 9 2 5 Infrared RON 10 26 rich d 10 2 7 Potentiometer Pushbuttons LEDS nn 10 2 8 General Purpose Tower Plug in TWRPI Socket inner 10 2 9 Touch IHterfdCess usate nine
4. 5V 5 0V Power Al 5V 5 0V Power B2 GND Ground A2 GND Ground B3 3 3V 3 3V Power A3 3 3V 3 3V Power B4 ELE PS SENSE Elevator Power Sense A4 3 3V 3 3V Power B5 GND Ground A5 GND Ground B6 GND Ground A6 GND Ground B7 SDHC CLK SPI1 CLK PTE2 A7 SCLO PTD8 B8 SDHC D3 SPI1 CS1 b A8 SDAO PTD9 B9 SDHC D3 SPI1 CSO b PTE4 A9 GPIO9 CTS1 PTC19 B10 SDHC_CMD SPI1 MOSI 1 A10 GPIO8 SDHC D2 5 B11 SDHC_DO SPI1_MISO 11 GPIO7 SD WP DET PTE27 12 COL 12 5 B13 RXER PTA5 A13 ETH MDC PTB1 B14 ETH TXCLK A14 ETH MDIO PTBO B15 ETH TXEN PTA15 A15 RXCLK B16 TXER A16 ETH RXDV 14 B17 ETH TXD3 A17 ETH_RXD3 B18 ETH_TXD2 18 ETH RXD2 B19 ETH TXD1 PTA17 A19 RXD1 PTA12 B20 ETH TXDO PTA16 A20 RXDO PTA13 B21 GPIO1 RTS1 PTC18 A21 551 PTE6 B22 GPIO2 SDHC D1 PTEO A22 SSI BCLK PTE12 B23 GPIO3 PTE28 A23 SSI FS PTE11 B24 CLKINO PTA18 A24 SSI RXD PTE7 B25 CLKOUT1 PTE26 A25 SSI_TXD PTE10 B26 GND Ground A26 GND Ground B27 AN7 PTB7 A27 AN3 PGAO DP ADCO DPO ADC1 28 AN6 PTB6 A28 AN2 PGAO DM ADCO DMO ADC1 B29 AN5 PTB5 A29 AN1 PGA1_DP ADC1_DP0 ADC0_DP3 B30 AN4 PTB4 A30 ANO PGA1_DM ADC1_DM0 ADC0_DM3 B31 GND Ground A31 GND Ground B32 DAC1 DAC1_OUT A32 OUT B33 TMR3 A33 TMR1 PTA9 B34 TMR2 PTD6 A34 TMRO B35 GPIO4 PTB8 A35 GPIO6 PTB9 B36 3 3V 3 3V Power A36 3 3V 3 3V Power B37 PWM7 PTA2 A37 PWM3 PTA6 B38 PWM6
5. Bridge OSJTAG Bridge TX Data PTE8 UART5_TX SD Clock PTE2 SDHCO_DCLK SD Command PTE3 SDHCO_CMD SD DataO PTE1 SDHCO_DO SD Card Slot SD Data1 PTEO SDHCO_D1 SD Data2 PTES SDHCO_D2 SD Data3 PTE4 SDHCO_D3 SD Card Detect PTE28 28 SD Write Protect PTE27 27 Infrared Port IR Transmit PTD7 CMT_IRO IR Receive PTC6 CMPO_INO SW1 PTA19 PTA19 Pushbuttons SW2 IRQ1 PTE26 26 SW3 RESET RESET b RESET b E1 Touch PTA4 510 5 Touch Pads E2 Touch PTB3 510 CH8 E3 Touch PTB2 TSIO_CH7 E4 Touch PTB16 TSIO CH9 E1 Orange LED PTA11 PTA11 LEDs E2 Yellow LED PTA28 28 E3 Green LED PTA29 PTA29 TWR K60N512 Tower Module User s Manual Page 14 of 17 freescale semiconductor Feature Potentiometer Accelerometer General Purpose TWRPI Socket Touch Pad Segment LCD TWRPI Socket 5 Tower Elevator Connections The TWR K60N512 features two expansion card edge connectors that interface to the Primary and Secondary Elevator boards in a Tower system The Primary Connector comprised of sides A and B is utilized by the TWR K60N512 while the Secondary Connector comprised of sides C and D only makes Connection 4 Blue LED Potentiometer R71 I2C SDA 2 SCL IRQ TWRPI ANO J4 Pin 8 TWRPI AN1 J4 Pin 9 TWRPI AN2 J4 Pin 12 TWRPI IDO J4 Pin 17 TWRPI 101 J4 Pin 18 TWRPI I2C SCL J5 Pin 3 TWRPI I2C SDA J5 Pin 4 TWRPI SPI MISO J5 Pin 9 TWRPI SPI MOSI J5 Pin 10
6. Touch TWRPI daughter cards that may feature keypads rotary dials sliders etc The pinout for the Touch TWRPI socket is defined in Table 3 Refer to Table 6 I O Connectors and Pin Usage Table for the specific K60 pin connections to the Touch TWRPI socket TWR K60N512 Tower Module User s Manual Page 11 of 17 2 freescale semiconductor Table 3 Touch TWRPI socket pinout Pin Description 1 5V VCC 2 3 3 V VCC 3 Electrode 0 4 3 3V VDDA 5 Electrode 1 6 VSS Analog GND 7 Electrode 2 8 Electrode 3 9 Electrode 4 10 Electrode 5 11 Electrode 6 12 Electrode 7 13 Electrode 8 14 Electrode 9 15 Electrode 10 16 Electrode 11 17 ADC TWRPI ID O 18 ADC TWRPI ID 1 19 GND 20 Reset 2 10 Ethernet The K60N512 features a 10 100 Mbps Ethernet MAC with MII and RMII interfaces The TWR K60N512 routes the RMII interface signals from the K60 MCU to the Primary Connector allowing the connection to an external Ethernet PHY device on a Tower peripheral module When the K60 Ethernet MAC is operating in RMII mode synchronization of the MCU clock and the 50 MHz RMII transfer clock is important The MCU input clock must be kept in phase with the 50 MHz clock supplied to the external PHY Therefore the TWR K60N512 provides the option see description for J6 in Table 5 to clock the MCU from an external clock from the CLKINO pin on the Primary C
7. the backup power supply TWR K60N512 Tower Module User s Manual Page 8 of 17 freescale semiconductor VBAT The TWR K60N512 provides a battery holder for a coin cell battery that can be used as the VBAT supply The holder can accept common 20mm diameter 3V lithium coin cell batteries e g 2032 2025 Refer to the description J9 in Table 5 TWR K60N512 Jumper Table for more information 2 4 Debug Interface There are two debug interface options provided the on board OSJTAG circuit and an external Cortex Debug ETM connector 2 4 1 OSJTAG An on board MC9S08JM60 based Open Source JTAG OSJTAG circuit provides JTAG debug interface to the K60N512 A standard USB A male to Mini B male cable provided can be used for debugging via the USB connector J16 The OSJTAG interface also provides a USB to serial bridge Drivers for the OSJTAG interface are provided in the P amp E Micro Kinetis Tower Toolkit available on the included DVD Note The port pins connected to the OSJTAG USB to serial bridge PTD6 and PTD7 are also connected to the infrared interface Refer to Table 6 I O Connectors and Pin Usage Table and Table 5 TWR K60N512 Jumper Table for more information 2 4 2 Cortex Debug ETM Connector The Cortex Debug ETM connector is a 20 pin 0 05 connector providing access to the SWD SWV JTAG EzPort and ETM trace 4 bit signals available on the K60 device The pinout and K60 pin con
8. 12 Table 5 TWR K60N512 Jumper Table eise tatio tpe teeth dong eR adea anale tenta nd La UE uud dud vado 13 Table 6 I O Connectors and Pin Usage Table rt Ossa dr FR eo REP ra pd pev EUER ER OR 14 Table 7 TWR K60N512 Primary Connector Pinout eese eene eene nennen nnne nnne nnne 16 Revision History Revision Date Changes 1 0 Nov 9 2010 Initial Release for PWA 700 26548 Rev A TWR K60N512 Tower Module User s Manual Page 3 of 17 2 Te freescale semiconductor 1 TWR K60N512 and TWR K60N512 KIT Overview The TWR K60N512 is a Tower Controller Module compatible with the Freescale Tower System It can function as a stand alone low cost platform for the evaluation of the Kinetis K10 K20 and K60 family of microcontroller MCU devices The TWR K60N512 features the Kinetis K60 low power microcontroller based on the ARM Cortex M4 architecture with USB 2 0 full speed OTG controller and 10 100 Mbps Ethernet MAC The TWR K60N512 is available as a stand alone product or as a kit TWR K60N512 KIT with the Tower Elevator Modules TWR ELEV and the Tower Serial Module TWR SER The TWR K60N512 can also be combined with other Freescale Tower peripheral modules to create development platforms for a wide variety of applications O provides an overview of the Freescale Tower System Controller Module Primary Elevator board and expansion bus signals Works stand alone o
9. A Comparator Infrared Port GPIO Interrupts Reset Battery VBAT RTC Holder SPI PC ADC GPIO TSI GPIO General Purpose SD Card Slot Tower Plug in TWRPI Touch Tower Plug in TWRPI Freescale Device E External Connectors Interface Circuits B Power Figure 4 TWR K60N512 Block Diagram 2 1 K60N512 Microcontroller TWR K60N512 module features the MK60N512VMD4100 The K60 microcontroller family is part of the Kinetis portfolio of devices built around an ARM Cortex M4 core Refer to the K60 Family Product Brief and the K60 Family Reference Manual for comprehensive information on the MK60N512VMD100 device The key features are listed here 32 bit ARM Cortex M4 core with DSP instructions 100MHz maximum core operating frequency 144 MAPBGA 13mm x 13mm 1 0mm pitch package 1 71V 3 6V operating voltage input range 256 Kbytes of program flash 64 Kbytes of static RAM FlexMemory consisting of 256 Kbytes of FlexNVM non volatile flash memory that can be used as program flash data flash backup EEPROM of variable endurance and size and 4 Kbytes of FlexRAM RAM memory that can be used as traditional RAM as high endurance EEPROM storage or flash programming acceleration RAM External bus interface Power management controller with 10 different power modes Multi purpose clock generator with PLL and FLL operation modes 16 bit SAR ADC 12 bit DAC TWR K60N512 Tower M
10. B73 EBI D7 PTB20 A73 EBI AD7 PTC8 B74 EBI D6 PTB21 A74 EBI_AD6 PTC9 B75 EBI_D5 PTB22 A75 EBI AD5 PTC10 B76 EBI D4 PTB23 A76 EBI AD4 PTD2 B77 EBI D3 PTC12 A77 EBI AD3 PTD3 B78 EBI D2 PTC13 A78 EBI AD2 PTD4 B79 EBI 14 79 EBI AD1 PTD5 B80 EBI DO PTC15 A80 EBI ADO PTD6 B81 GND Ground A81 GND Ground B82 3 3V 3 3V Power A82 3 3V 3 3V Power TWR K60N512 Tower Module User s Manual Page 17 of 17
11. IRO UARTO TX from IR Transmitter D1 16 Clock Input Source 1 2 Connect main EXTAL to on board 50 MHz clock Selection 2 3 Connect EXTAL to CLKINO signal on Primary Elevator B24 ON Connect on board 3 3V supply to MCU J8 MCU Power Connection OFF Isolate MCU from power supply allows for external supply or power measurements TWR K60N512 Tower Module User s Manual Page 13 of 17 freescale semiconductor 1 2 Connect VBAT to on board 3 3V supply J9 VBAT Power Selection Connect VBAT to the higher voltage between on board 3 3V supply or coin cell supply ON OSJTAG bootloader mode OSJTAG firmware J10 OSJTAG Mode Selection reprogramming OFF Debugger mode Connect on board 5V supply to JTAG port supports ON J12 JTAG Power Connection powering board from external JTAG probe OFF Disconnect on board 5V supply from JTAG port 4 Input Output Connectors and Pin Usage Table The following table provides details on which K60N512 pins are using to communicate with the LEDs switches and other 1 0 interfaces onboard the TWR K60N512 Note Some port pins are used in multiple interfaces on board and many are potentially connected to off board resources via the Primary and Secondary Connectors Take care to avoid attempted simultaneous usage of mutually exclusive features Table 6 1 0 Connectors and Pin Usage Table Feature Connection Port Pin Pin Function OSJTAG USB to serial OSJTAG Bridge RX Data PTE9 UART5 RX
12. TWRPI SPI SS J5 Pin 11 TWRPI SPI CLK J5 Pin 12 TWRPI GPIOO J5 Pin 15 TWRPI GPIO1 J5 Pin 16 TWRPI GPIO2 J5 Pin 17 TWRPI GPIO3 J5 Pin 18 TWRPI GPIO4 J5 Pin 19 Electrode O J3 Pin 3 Electrode 1 J3 Pin 5 Electrode 2 J3 Pin 7 Electrode 3 J3 Pin 8 Electrode 4 13 Pin 9 Electrode 5 J3 Pin 10 Electrode 6 J3 Pin 11 Electrode 7 J3 Pin 12 Electrode 8 J3 Pin 13 Electrode 9 J3 Pin 14 Electrode 10 J3 Pin 15 Electrode 11 J3 Pin 16 TWRPI IDO J3 Pin 17 TWRPI ID1 J3 Pin 18 Port Pin PTD8 PTD9 PTD14 PTD13 PTD15 PTD12 PTD10 PTB8 PTB9 PTA19 PTE26 PTBO PTB1 PTB2 PTB3 PTCO PTC1 PTC2 PTA4 PTB16 PTB17 PTB18 PTB19 Pin Function PTA10 ADC1_DM1 I2CO_SDA I2CO SCL PTD10 DPO ADC1 DP3 ADCO DMO ADC1 DM3 ADC1 DPO ADCO ADCO DP1 ADCO DM1 I2CO SCL I2CO_SDA SPI2 SIN SPI2 SOUT SPI2 PCSO SPI2 SCK PTD10 PTB8 PTB9 PTA19 PTE26 TSIO_CHO TSIO_CH6 TSIO_CH7 510 8 510 CH13 510 14 510 15 510 5 510 CH9 510 10 510 11 510 12 ADC1_DP1 ADC1 SE16 connections to the GND pins Table 7 provides the pinout for the Primary Connector TWR K60N512 Tower Module User s Manual Page 15 of 17 2 oF freescale semiconductor Table 7 TWR K60N512 Primary Connector Pinout B1
13. he K60 device the output of the analog comparator can be routed to a UART module for easier processing of the incoming data stream CMPO INO PTC6 C5 0 1UF l D3 2 AA 1 PTD7 CMT_IRO IRDAJ IRDAR TE QTLP610CIR mr R23 33 6 HDR 1X2 TH Default no shunt Disable IRDA Figure 5 Infrared Port Implementation 2 6 Accelerometer MMA7660 digital accelerometer is connected to the K60 MCU through an I2C interface and a GPIO IRQ signal Refer to Table 6 I O Connectors and Pin Usage Table for connection details 2 7 Potentiometer Pushbuttons LEDs The TWR K60N512 features two pushbutton switches connected to GPIO interrupt signals one pushbutton connected to the master reset signal four capacitive touch pad electrodes four user controllable LEDs and a potentiometer connected to an ADC input signal Refer to Table 6 I O Connectors and Pin Usage Table for information about which port pins are connected to these features 2 8 General Purpose Tower Plug in TWRPI Socket The TWR K60N512 features a socket that can accept a variety of different Tower Plug in modules featuring sensors RF transceivers and more The General Purpose TWRPI socket provides access to TWR K60N512 Tower Module User s Manual Page 10 of 17 2 freescale semiconductor 2 SPI IRQs GPIOs timers analog conversion signals TWRPI ID signals reset and voltage supplies The pinout for the TWRPI Soc
14. ilable on the tool support page for the TWR K60N512 http www freescale com TWR K60N512 1 4 Reference Documents The documents listed below should be referenced for more information on the Kinetis family Tower System and MCU Modules These can be found in the documentation section of freescale com TWR K60N512 or freescale com kinetis TWR K60N512 QSG Quick Start Guide TWR K60N512 SCH Schematics TWR K60N512 PWA Design Package TWRPI SLCD SCH Schematics TWRPI SLCD PWA Design Package K60 Family Product Brief K60 Family Reference Manual Kinetis Quick Reference User Guide QRUG Tower Configuration Tool 2 Hardware Description The TWR K60N512 is a Tower Controller Module featuring the MK60N512VMD100 an ARM Cortex M4 based microcontroller with segment LCD and USB 2 0 full speed OTG controllers in a 144 MAPBGA package with a maximum core operating frequency of 100MHz It is intended for use in the Freescale Tower System but can operate stand alone An on board debug circuit OSJTAG provides a JTAG TWR K60N512 Tower Module User s Manual Page 6 of 17 Po freescale semiconductor debug interface and a power supply input through a single USB mini AB connector Figure 4 shows a block diagram of the TWR K60N512 The following sections describe the hardware in more detail Tower Elevator Expansion Connectors SDHC 5 SPI C ADC USB DAC PWM UARTS Flexbus Ethernet 50 MHz OSC 32 768 KHz XTAL IR Output
15. ion for J6 in Table 5 to select the clock input to the MCU from 1 the on board 50MHz source or 2 an external clock from the CLKINO pin on the Primary Connector When the K60 is operating in Ethernet RMII mode the Tower peripheral module implementing the RMII PHY device should drive a 50 MHz clock on the CLKINO signal that is kept in phase with the clock supplied to the RMII PHY Refer to section 2 10 Ethernet for more information 2 3 System Power In stand alone operation the main power source for the TWR K60N512 module is derived from the 5 0V input from either the USB mini B connector J13 or the debug header J11 when a shunt is placed on jumper J12 A low dropout regulator provides a 3 3V supply from the 5 0V input voltage Refer to sheet 5 of the TWR K60N512 schematics for more details When installed into a Tower System the TWR K60N512 can be powered from either an on board source or from another source in the assembled Tower System If both the on board and off board sources are available the TWR K60N512 will default to the off board source The 3 3V power supplied to the MCU is routed through a jumper J8 The jumper shunt can be removed to allow for either 1 alternate MCU supply voltages to be injected or 2 the measurement of power consumed by the MCU 2 3 1 RTC VBAT The Real Time Clock RTC module on the K60 has two modes of operation system power up and system power down During system power down the RTC is powered from
16. ket is defined in Table 2 Refer to Table 6 1 0 Connectors and Pin Usage Table for the specific 60 pin connections to the General Purpose TWRPI socket Table 2 General Purpose TWRPI socket pinout Left side 2x10 Connector Right side 2x10 Connector Pin Description Pin Description 1 5V VCC 1 GND 2 3 3 V VCC 2 GND 3 GND 3 2 SCL 4 3 3V VDDA 4 2 SDA 5 VSS Analog GND 5 GND 6 VSS Analog GND 6 GND 7 VSS Analog GND 7 GND 8 ADC Analog 0 8 GND 9 ADC Analog 1 9 SPI MISO 10 VSS Analog GND 10 SPI MOSI 11 VSS Analog GND 11 SPI SS 12 ADC Analog 2 12 SPI CLK 13 VSS Analog GND 13 GND 14 VSS Analog GND 14 GND 15 GND 15 GPIO GPIOO IRQ 16 GND 16 GPIO GPIO1 IRQ 17 ADC TWRPI ID O 17 GPIO2 18 ADC TWRPI ID 1 18 GPIO GPIO3 19 GND 19 GPIO GPIO4 Timer 20 Reset 20 GPIO GPIOS Timer 2 9 Touch Interface The touch sensing input TSI module of the Kinetis MCUs provides capacitive touch sensing detection with high sensitivity and enhanced robustness Each TSI pin implements the capacitive measurement of an electrode The TWR K60N512 provides two methods for evaluating the TSI module There are four individual electrodes on board the TWR K60N512 that simulate pushbuttons Additionally twelve TSI signals are connected to a Touch Tower Plug in TWRPI socket that can accept
17. nections to the debug connector J14 is shown in Table iTable 1 Table 1 Cortex Debug ETM Connector Pinout Function TWR K60N512 Connection 1 VTref 3 3V MCU supply P3V3 MCU 2 TMS SWDIO PTA3 SCIO_RTS_b FTMO_CHO JTAG_MS SWD_DIO 3 GND GND 4 5 PTAO SCIO CTS CH5 JTAG CLK SWD CLK EZP 5 GND GND 6 TDO SWO PTA2 SCIO TX FTMO CH7 ITAG DO TRACE SWO EZP DO 7 Key 8 TDI PTA1 SCIO RX FTMO CH6 JTAG DI EZP DI 9 GNDDetect PTA4 FTMO CH1 MS NMI b EZP CS b 10 nRESET RESET b 11 Target Power 5V supply via J12 12 TRACECLK PTAG FTMO CH3 TRACE CLKOUT 13 Target Power 5V supply via J12 14 TRACEDATA O PTA10 FTM2 CHO FTM2 QD PHA TRACE DO 15 GND GND 16 TRACEDATA 1 PTA9 FTM1 CH1 FTM1 QD PHB TRACE D1 17 GND GND 18 TRACEDATA 2 PTA8 FTM1 CHO FTM1 QD PHA TRACE D2 19 GND GND TWR K60N512 Tower Module User s Manual Page 9 of 17 freescale semiconductor Note Many of the trace signals connected to the debug connector are also connected elsewhere on the TWR K60N512 Refer to Table 6 I O Connectors and Pin Usage Table and Table 7 TWR K60N512 Primary Connector Pinout for more information 2 5 Infrared Port An infrared transmit and receive interface is implemented as shown in Figure 5 below The CMT IRO pin directly drives an infrared diode The receiver uses an infrared phototransistor connected to an on chip analog comparator through a low pass filter Internal to t
18. odule User s Manual Page 7 of 17 2 freescale semiconductor High speed analog comparator with 6 bit DAC Programmable voltage reference USB full speed low speed OTG Host Device controller with device charge detect 10 100 Mbps Ethernet MAC SPI IC w SMBUS support UART w 1507816 and IrDA CAN 175 SD Host Controller SDHC GPIO with pin interrupt support DMA request capability digital glitch filtering Capacitive touch sensing inputs TSI Debug interfaces JTAG SWD Trace TPIO FPB DWT ITM ETM ETB 2 2 Clocking The Kinetis MCUs start up from an internal digitally controlled oscillator DCO Software can enable one or two external oscillators if desired The external oscillator for the Multipurpose Clock Generator MCG module can range from 32 768 KHz up to a 32 MHz crystal or ceramic resonator The external oscillator for the Real Time Clock RTC module accepts a 32 768 kHz crystal The EXTAL pin of the main external oscillator can also be driven directly from an external clock source The TWR K60N512 features a 50 MHz on board clock oscillator as seen in sheet 4 of the schematics However when the K60 Ethernet MAC is operating in RMII mode synchronization of the MCU input clock and the 50 MHz RMII transfer clock is important In this mode the MCU input clock must be kept in phase with the 50 MHz clock supplied to the external PHY Therefore the TWR K60N512 provides the option see descript
19. onnector The Tower peripheral module implementing the RMII PHY device should drive a 50 MHz clock on the CLKINO pin that is kept in phase with the clock supplied to the RMII PHY The TWR SER module that comes as part of the TWR K60N512 KIT provides a 10 100 Ethernet PHY that can operate in either or RMII mode By default the PHY is boot strapped to operate in mode therefore jumper configuration changes may be required Table 4 shows the settings for proper interoperability between the Ethernet interface on the TWR SER and the TWR K60N512 Table 4 Ethernet operation jumper settings Tower Module Jumper Setting TWR K60N512 J6 TWR SER J2 TWR SER J3 TWR SER J12 TWR K60N512 Tower Module User s Manual Page 12 of 17 freescale semiconductor 2 11 USB The K60N512 features a USB full speed low speed OTG Host Device controller with built in transceiver The TWR K60N512 routes the USB D and D signals from the K60 MCU to the Primary Connector allowing the connection to external USB connectors or additional circuitry on a Tower peripheral module The TWR SER module included as part of the TWR K60N512 KIT provides a USB OTG Host Device interface with a mini AB USB connector There are many configuration options that can be selected to evaluate different USB modes of operation By default the TWR SER is configured for USB Device operation Please refer to the documentation included with the TWR SER for more info
20. r in Tower System Two 2x80 connectors on backside for easy signal access and side mounting board LCD module Features integrated debugging interface for easy programming and run control via standard USB cable Power regulation circuitry Secondary Elevator Standardized signal assignments Additional and secondary serial and expansion bus signals Mounting holes Standardized signal assignments 9 Board Connectors Mounting holes and expansion connectors for side mounting peripheral boards Four card edge connectors Uses PCI Express connectors Size Peripheral Module x16 90 mm 3 5 long 164 pins Tower is approx 3 5 Hx 3 5 W Examples include serial interface module x 3 5 D when fully assembled memory expansion module and Wi Fi Figure 1 Freescale Tower System Overview 1 1 Contents The TWR K60N512 contents include TWR K60N512 board assembly e 3ft USB cable e Interactive DVD with software installers and documentation e Quick Start Guide TWR K60N512 Tower Module User s Manual Page 4 of 17 2 freescale semiconductor The TWR K60N512 KIT contains TWR K60N512 MCU module e TWR ELEV Primary and Secondary Elevator Modules TWR SER Serial module including USB host device OTG Ethernet CAN RS232 and RS485 1 2 Features Figure 2 and Figure 3 show the TWR K60N512 with some of the key features called out The following list summarizes the featu
21. res of the TWR K60N512 Tower MCU Module e Tower compatible microcontroller module MK60N512VMD100 K60N512 in a 144 MAPBGA with 100MHz operation Touch Tower Plug in Socket General purpose Tower Plug in TWRPI socket On board JTAG debug circuit OSJTAG with virtual serial port Three axis accelerometer MMA7660 Four 4 user controllable LEDs Four 4 capacitive touch pads Two 2 user pushbutton switches Potentiometer Battery Holder for 20mm lithium battery e g 2032 2025 SD Card slot Primary SW1 Connector SW2 Infra red 8 2 K6 ONE 1 Touch TWRPI Socket NY a BN i Buttons General Purpose Tower Plug In TWRPI Socket SW3 Reset B E1 E4 Power OSJTAG 2 MK60N512 Mini B USB VMD100 Connector Microcontroller Secondary MMA7660 Connector Accelerometer Figure 2 Callouts on front side of the TWR K60N512 TWR K60N512 Tower Module User s Manual Page 5 of 17 2 freescale semiconductor LIU 1643 2 500 o i SD Card Socket Potentiometer 11 1111711111 2 5 Fs 5 lt x Y AB 96537 95 VBAT Battery D as Holder 18 81 a A Figure 3 Callouts back side of the TWR K60N512 1 3 Getting Started Follow the Quick Start Guide found printed in the TWR K60N512 box or the interactive DVD for the list of recommended steps for getting started There are also lab walk through guides ava
22. rmation on the configuration options 2 12 Secure Digital Card Slot A Secure Digital SD card slot is available on the TWR K60N512 connected to the SD Host Controller SDHC signals of the K60 MCU This slot will accept SD memory cards as well as Secure Digital Input Output SDIO cards Refer to Table 6 I O Connectors and Pin Usage Table for the SDHC signal connection details 2 13 External Bus Interface FlexBus The K60 device features a multi function external bus interface called the FlexBus interface controller capable of interfacing to slave only devices The FlexBus interface is not used directly on the TWR K60N512 Instead a subset of the FlexBus is connected to the Primary Connector so that the external bus can access devices on Tower peripheral modules Refer to Table 7 TWR K60N512 Primary Connector Pinout and sheet 8 of the TWR K60N512 schematics for more details 3 Jumper Table There are several jumpers on the TWR K60N512 that provide configuration selection and signal isolation Refer to the following table for details The default installed jumper settings are shown in bold with asterisks Table 5 TWR K60N512 Jumper Table Option Setting Description Connect USBO VBUS from Primary Elevator A57 to J1 VREGIN USB VREGIN Power ON Connection OFF Disconnect VREGIN from Primary Elevator ON Connect PTD7 CMT IRO UARTO TX to IR Transmitter D1 Infrared Transmitter J2 Connection OFF Disconnect PTD7 CMT
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