PCI-8554 Multi-Functions Counter / Timer Card
Contents
1. external devices 4 1 Connectors Pin Assignment PCI 8554 comes equipped with a 100 pin SCSI II female connector CN1 CN1 is located at the rear plate The pin assignment of the connector is illustrated in the Figure 2 1 Refer to section 2 1 for details of pin assignment 4 2 Digital I O Connection The PCI 8554 provides 8 digital input and 8 digital output channels through the connector CN1 The digital I O signals are fully TTL compatible Digital Input DI From TTL Devices Digital Output DO To TTL Devices PCI 8554 Outside Device Figure 4 1 Digital I O Connection Signal Connection and Applications e 21 4 3 Timer Counter Connection The PCI 8554 has four 8254 chips on board It can offer 10 independent 16 bit programmable down counters and cascaded counters To implement your application you can following the procedure to design your application and connect the signals 1 Check if use a clock source with fixed frequency if answer is No external clock source must be used and go to step 3 2 Calculate the frequency of clock according to your application and decide the clock source internal external or cascaded then decide which counter is used 3 f external clock source is used generate a clock source outside the board and check the frequency If external clock source is used you have to decide whether debounce function is used or not and then set the jumper JP1 JP102. 00 4020000000000 00004400000 22 4 5 PULSE WIDTH MEASUREMENT 2 1 002 000 0 00 00000000000000004 24 4 6 FREQUENCY MEASUREMENT cett 25 4 7 EVENT COUNTER iii 26 4 8 DUALINTERRUPT SYSTEM eene nene 28 5 HIGH LEVEL PROGRAMMING 4 e eee eee eee seen eese eee 29 81 INSTALLATION ne tepe ee n Pede iride 29 5 2 RUNNING TESTING UTILITY 8554UTIL EXE 30 5 3 SOFTWARE DRIVER NAMING CONVENTION eene 30 3 28554 INITIAL ise t dette e e ee te ER RENDER 31 5 5 8554 WRITE_COUNTER iii 32 5 6 8554 READ 1110000 n nnn nnn nnn nna 33 8 7 8554 S TOP COUNTER 33 5 0 0994 READCSTXTUS erret ta aeo 34 5 9 8554 DO sss eee e ER EPIIT 35 23 10 28594 DIE ie 35 5 11 8554 SET ENTELK iR vee ch es HE OBS 35 3 12 8554 SET CRK T rete E ert e eee eser 36 5 13 8554 SET DBCLK iier Rr repere Rt eR SIE 37 5 14 8554 SET INT 37 5 15 8554 GET IRQ 5 5 38 8554 INT ENABLE eee tete tee e e e teo Ue ec reete 38 5 17 8554 INT DISABLE iere er 39 5 18 8554 CLRSIROT eet eet tee ete testet e 39 5 1
3. 4 Decide the gate control source always enable or externally control if gate control is necessary connect the gate signal 5 Program the counter timer using desired mode 4 4 Frequency Generator Example 1 To generate a 250 K Hz Square Wave step 1 To use fixed clock source because the output is a fixed frequency step 2 Internal 8M Hz is suitable to generate 250K Hz frequency Use Counter 1 for this application 250 kHz 8 Hz 32 step 3 Skip these steps step 4 The gate source is enable always so let SCCI II connector pin99 GATE1 open step 5 Connect the counter output to external device and write the control program Please refer the DEMO1 C source code set by function 8554 SET CK1 set by function 8554 SET cntCLK 8254 Chip 1 8MHz COUTII H Counter 1 CUT SO COUT1Q O 22 e Signal Connection and Applications Figure 4 2 Example of frequency generator 1 Example 2 To generate a very low frequency of 1 pulse 1 hour step 1 step 2 step 3 step 4 step 5 To use fixed clock source because the output is a fixed frequency Because the desired frequency 1 3600sec 0 000278Hz is too slow to use one counter to generate set the independent counter 1 amp 2 amp 3 to cascade mode Clock source of counter 41 comes from C8M clock source of counter 42 comes from COUT1 clock source of counter 3 comes from COUT 2 Divider value of counter 1 was set
4. cardNo card number to select board SelCK4 if set selCK1 0 then CK1 is C8M if set selck1 1 then CK1 is COUT11 2 Return Value ERR NoError ERR BoardNolnit ERR InvalidMode SelCK1 is out of range 5 13 8554 SET DBCLK Description To select debounce clock Syntax C C DOS U16 8554 SET DBCLK U16 cardNo U16 DBCLK C C Windows 95 U16 W 8554 SET DBCLK U16 cardNo U16 DBCLK Visual Basic Windows 95 W 8554 SET DBCLK ByVal cardNo As Integer ByVal DBCLK As Integer As Integer 2 Arguments cardNo card number to select board DBCLK if set dbclk 0 then DB CLK is COUT11 if set dbclk 1 then DB CLK is 2MHz Return Value ERR NokErro ERR BoardNolnit ERR InvalidMode DBCLK is out of range 5 14 8554 Set INT Control Description The 8554 has dual interrupts system Two interrupt sources can be generated and be checked by the software This function is used to select and control PCI 8554 interrupt sources The interrupt source can be set as from counter 12 output COUT12 INT1 or external interrupt signal EXTINT INT2 Syntax High Level Programming 37 C C DOS 016 8554 Set INT Control U16 cardNo U16 int1Flag 016 int2Flag C C Windows 95 U16 W 8554 Set INT Control 016 cardNo 016 int1Flag U16 int2Flag Visual Basic Windows 95 W 8554 Set INT Control ByVal cardNo As Integer ByVal int1Falg As Integer ByVal int2Falg As Integer 2 Arguments cardN
5. WHAT YOU 5 2 2 5 2 3 8554 6 2 4 DEFAULT 5 6 2 5 PCI 8554 INSTALLATION 7 2 6 PIN ASSIGNMENT OF 2 8 257 CEOGK SYSTEM iiec en e I Hp EL 9 2 8 COUNTERS ARCHITECTURE 00 9 2 9 CLOCK SOURCE CONFIGURATIONS 13 2 10 GATE CONTROL CONFIGURATIONS 0 eene 14 2 11 COUNTER ere 14 2 12 DEBOUNCE SYSTEM isti ria dates 14 2 13 INTERRUPT SYSTEM 00 16 2 14 DIGITAL INPUT AND OUTPUT erre 17 2 15 12V AND SV POWER 17 REGISTERS 4 4 2 222 2 2 18 3 1 PORT 55 18 3 2 TIMER COUNTER 5 5 19 3 3 TIMER COUNTER CLOCK MODE CONTROL e 20 3 4 DIGITAL INPUT 5 20 3 5 DIGITAL OUTPUT REGISTER 20 SIGNAL CONNECTIONS amp 8 21 4 1 CONNECTORS PIN ASSIGNMENT 21 4 2 DIGITAL I O 21 4 3 TIMER COUNTER 0 22 4 4 FREQUENCY 2
6. R 8254 Mode Control Register W 8254 Read Back Register R 8254 Mode Control Register W 8254 Read Back Register R Counter 11 Register R W Counter 12 Register R W Base F 8254 Mode Control Register W 8254 Read Back Register R Register Format e 19 3 3 Timer Counter Clock Mode Control There are total twenty two bits on PCI 8554 to select clock source of Timer Counter 1 10 and debounce clock Address BASE 0x10 0x12 Attribute write only Data Format era ceca RS ERE P PES Base 0x12 9 1 10 1 CKISEL DBCSEL 10 2 cone CnN1 CnN1 these two bits are used to control clock source of Timer Counter n n 1 10 CK1SEL select source of CK1 DBCSEL select debounce clock 3 4 Digital Input Registers There are 8 digital input channels on the PCI 8554 Address BASE 0x18 Attribute read only Data Format ae Sca exo eo eei Io Tone ERRORS 3 5 Digital Output Register The register is a general purpose 8 bits digital output port These signals can be used to control external devices Address BASE 0x18 Attribute write only Data Format rac Base 0x18 pos Dos pos po poo 20 Register Format 4 Signal Connections amp Applications This chapter describes the connectors and some application of the PCI 8554 including the signal connection between the 8554
7. counter information by this function Syntax C C DOS U16 8554 Read Counter U16 cardNo U16 cntNo U16 mode U16 cntrVal C C Windows 95 U16 W 8554 Read Counter U16 cardNo U16 cntNo U16 mode U16 cntrVal Visual Basic Windows 95 W_8554 Read Counter ByVal cardNo As Integer ByVal cntNo As Integer mode As Integer cntrVal As Integer As Integer Arguments cardNo card number to select board cntNo Counter Timer number This value must between 1 and 12 mode Counter operation mode cntrVal Counter value read back from counter Return Value ERR NokError ERR BoardNolnit ERR InvalidCounterNo cntNo is out of range 5 7 8554 Stop Counter Description User can directly stop counter by this function This function will stop counter by setting counter to mode 5 Syntax C C DOS U16 8554 Stop Counter U16 cardNo U16 cntNo U16 cntrVal C C Windows 95 High Level Programming 33 U16 W 8554 Stop Counter U16 cardNo U16 cntNo U16 cntrVal Visual Basic Windows 95 W 8554 Stop Counter ByVal cardNo As Integer ByVal cntNo As Integer cntrVal As Integer As Integer 2 Arguments cardNo card number to select board cntNo Counter Timer number This value must between 1 and 12 cntr Val Counter value read back from counter 2 Return Value ERR NokError ERR BoardNolnit ERR InvalidCounterNo if cntNo is not in the range of 1 12 5 8 8554 Read Status Description User can directly
8. is also 0 5 A The action of the fuse is the same as which used for 5V power The limitation is more restrict than 5V power supply because the PCI bus can not provide large current Installation amp Configuration e 17 3 Registers Format The detailed descriptions of the register format of the 8554 are specified in this chapter This information is quite useful for the programmers who wish to handle the card by low level programming In addition users can understand how to use software driver to manipulate this card after understanding the registers structure of the PCI 8554 3 1 I O Port Address The 8554 requires 32 consecutive addresses in the PC I O address space Table 3 1 shows the I O address of each register with respect to the base address The 8554 functions as a 32 bit PCI target device to any master on the PCI bus There are three types of registers on the PCI 8554 PCI Configuration Registers PCR Local Configuration Registers LCR and 8554 registers The PCR which conforms the PCl bus specifications Rev2 1 are initialized and controlled by the system plug amp play PCI BIOS Users can study the PCI BIOS specifications to understand the operation of the PCR The PCR can only be read through by PCI BIOS function call Please refer to the PCI specifications for the details of the PCR and refer to the PCI BIOS specifications for the standard BIOS function calls You can also get the PCR regist
9. need any IRQ source you can disable both the two interrupts However the PCI BIOS still assign a IRQ level to the PCI card and occupy the PC resource if you only disable the IRQ sources without change the initial condition of the PCI controller It is not suggested to re design the initial condition of the PCI card by users own application software If users want to disable the IRQ level user can use the ADLink s utility INIT8554 EXE to change power on interrupt setting 2 14 Digital Input and Output To program digital I O operation is fairly straight forward The digital input operation is just to read data from the corresponding registers and the digital output operation is to write data to the corresponding registers The digital I O registers format are shown in section 3 4 and 3 5 2 15 12V and 5V Power Supply The 100 pin SCSI II connector provides 12 volts and 5 volts power To avoid short or overload of the power supply the fuses are added on all the power supply signals The maximum current for 5 volts on every fuse is 0 5 A If the load current is larger than 0 5 A the resistance of the fuse will increase because of the temperature rising The rising resistance will cause the power supply drop and reduce current If the overload or short condition is removed the fuse will return to normal condition It is no necessary to repair or re install the fuse The maximum current of 12 volts for all the four connectors
10. only on a grounded anti static surface component side up Again inspect the module for damage Press down on all the socketed IC s to make sure that they are properly seated Do this only with the module place on a firm flat surface Installation amp Configuration e 5 Note DO NOT APPLY POWER TO THE CARD IF IT HAS BEEN DAMAGED You are now ready to install your PCI 8554 2 3 PCB Layout of PCI 8554 This layout will be modified after jumper layout finished Figure 2 1 PCB Layout of PCI 8554 2 4 Default Configurations To operate the PCI 8554 correctly users should understand the structure of PCI 8554 and details of the possible configurations The block diagram of the PCI 8554 is shown in chapter 1 It contains the clock system counters confederation interrupt system and PCI controller The following sections teach you the jumper setting and the default setting listed in Table 2 1 6 e Installation amp Configuration cua ome Default Configuration Setting rM Table 2 1 Default Configuration of PCI 8554 There are eleven jumpers on 8554 these jumpers are used to select debounce function You can change PCI 8554 s default configuration by setting jumpers on the card for your own applications The card s jumpers are preset at the factory Before changin
11. read current counter status by this function Syntax C C DOS U16 8554 Read Status U16 cardNo U16 cntNo U16 cntrVal U16 status C C Windows 95 U16 W 8554 Read Status U16 cardNo U16 cntNo U16 cntrVal U16 status Visual Basic Windows 95 W 8554 Read Status ByVal cardNo As Integer ByVal cntNo As Integer cntrVal As Integer status As Integer As Integer 2 Arguments cardNo card number to select board cntNo Counter Timer number This value must be between 1 and 12 cntr Val Counter value read back from counter status current status read back from counter please refer to 8254 s datasheet for detail information 2 Return Value ERR NokError ERR BoardNolnit ERR InvalidCounterNo if cntNo is not in the range of 1 12 34 e High Level Programming 5 9 8554 DO Description To write a 8 bits data to the digital output port Syntax C C DOS U16 8554 DO U16 cardNo U16 doData C C Windows 95 U16 W 8554 DO U16 cardNo U16 doData Visual Basic Windows 95 W 8554 DO ByVal cardNo As Integer ByVal doData As Integer As Integer 2 Arguments cardNo card number to select board doData the value to write to digital output port Return Value ERR NokError ERR PCIBiosNotExist 5 10 8554 DI Description To read 8 bits data from digital input port Syntax C C DOS U16 8554 DI U16 cardNo U16 diData C C Windows 95 U16 W 8554 DI U16 cardNo U16 diData Visual Basic Win
12. to 4000 divider value of counter 2 was set to 2000 divider value of counter 3 was set to 3600 8MHz 4000 2000 3600 1 3600 so COUTS will generate a pulse every hour Skip these steps The gate source is enable always so let GATE1 GATE2 GATES open Write and verify the control program Please refer the DEMO2 C source code set by function _8554_SET_CK1 8MHz COUT11 H Counter 1 SO COUTIQ O S14 set by function 8554 SET cntCLK 8254 Chip 1 COUTI ECK2 set by function 8554 SET cntCLK our O j 8254 Chip 1 SO COUT2 H Counter 2 o counid c SC ha i ECK3 set by function 8554 SET cntCLK O i COUT 8254 Chip 1 CKI gt COUT3 O H Counter 3 gt COUTE Ya Figure 4 3 Example of frequency generator 2 Signal Connection and Applications 23 4 5 Pulse Example step 1 step 2 step 3 step 4 step 5 Width Measurement To measure pulse width To use fixed clock source as base time interval or base frequency Assume Internal 2M Hz clock is used The time base is At 1 2M 5x10e 7 sec The count range for measuring pulse width is At pulse width At 65535 232 768 msec If the specification of the pulse width to be measured is in the range the 2M Hz can be used Otherwise changing the base frequency of the counter for example you can set counter 2 to cascaded
13. 9 8554 CLR IRQOA iiie cech ede cete de ege na 40 ii e Contents How to Use This Guide This manual is designed to help you use the PCI 8554 The manual describes how to modify various settings on the PCI 8554 card to meet your requirements It is divided into 5 chapters Chapter 1 Introduction gives an overview of the product features applications and specifications Chapter 2 Installation amp Configurations describes the operation method and multi functions of the 8554 Users should read through this chapter to understand the configurations of the PCI 8554 The chapter will also teach user how to install the PCI 8554 Chapter 3 Register Format describes the details of register format of the PCI 8554 this information is very useful for the programmers who want to control the hardware by low level programming Chapter 4 Signal Connection amp Applications describes the connectors pin assignment and how to connect the outside signal and devices to from the PCI 8554 Some applications also are introduced Chapter 5 High level Programming introduces the C language library for operating the PCI 8554 Some examples are shown too How to Use This Guide iii 1 Introduction PCI 8554 is a general purpose counter timer and digital I O card This card have four 8254 chips on board so it provides twelve 16 bits down counter or frequency dividers This card has multi configurations The counters c
14. PCI 8554 Multi Functions Counter Timer Card Copyright 1998 1999 ADLink Technology Inc All Rights Reserved Manual Rev 1 00 December 1 1998 The information in this document is subject to change without prior notice in order to improve reliability design and function and does not represent a commitment on the part of the manu facturer In no event will the manufacturer be liable for direct indirect special incidental or consequential damages arising out of the use or inability to use the product or documentation even if ad vised of the possibility of such damages This document contains proprietary information protected by copyright All rights are reserved No part of this manual may be reproduced by any mechanical electronic or other means in any form without prior written permission of the manufacturer Trademarks PCI 8554 is registered trademarks of ADLink Inc Windows 95 Windows NT DOS are registered trademarks of Microsoft Corporation Other product names mentioned herein are used for identification purposes only and may be trademarks and or registered trademarks of their respective companies 1 Contents INTRODUCTION m 1 Jul FEATURES ra 2 1 2 APPLICATIONS cesses He eene enhn nennen see annes rre rn enn ren 3 1 3 SPECIFICATIONS 2 e 3 INSTALLATION amp 8 5 2 1
15. TROL BYTE Appendix A 41 Control Byte Before loading or reading any of these individual counters the control byte BASE 3 must be loaded first The format of the control byte is Ea cs Ra qe SCt SCO RL M2 MO BCD SC1 amp SCO Select Counter Bit 7 amp Bit 6 0 O SelectCounterO 0 1 SelctCoumteri 1 O SelectCounter2 e RL1 amp RLO Select Read Load operation Bit 5 amp Bit 4 0 0 COUNTERLATCHFORSTABLEREAD 0 1 READLOADLSBONY 1 0 READLOADMSBONY M2 M1 amp MO Select Operating Mode Bit Bit 2 amp Bit 1 e BCD Select Alnar Counting Bit 0 17 BRANI CODED DECIA BCD COUNTER BINARY CODED DECIMAL BCD COUNTER 4 DIGITAL The count of the binary counter is from 0 up to 65 535 and the count of the BCD counter is from 0 up to 9 999 42 e Appendix A Mode Definitions In 8254 six operating modes can be selected they are Mode 0 Interrupt on Terminal Count Mode 1 Programmable One Shot Mode 2 Rate Generator Mode 3 Square Wave Rate Generator Mode 4 Software Triggered Strobe Mode 5 Hardware Triggered Strobe AII detailed description of these six modes are written in Intel Microsystem Components Handbook Volume Il Peripherals Timer Counter Applications Please refer to Chapter 4 Appendix e 43 Product Warranty Service Seller warr
16. alue shows how many PCI 8554 cards are installed in your system pciinfo It is a structure to memorize the PCI bus plug and play initialization information which is decided by PnP BIOS The PCI_INFO structure is defined in PCI_8554 H The base address and the interrupt channel number is stored in pciinfo which is for reference Return Value ERR_NoError ERR PCIBiosNotExist High Level Programming e 31 5 5 8554 Write Counter Description User can directly write command to counter 1 12 by this function Using this function user can assign the counter number 1 12 directly without care about the chips number and other details Syntax C C DOS U16 8554 Write Counter U16 cardNo U16 cntNo U16 mode U16 cntrVal C C Windows 95 U16 W 8554 Write Counter U16 cardNo U16 cntNo U16 mode U16 cntr Val Visual Basic Windows 95 W 8554 Write Counter ByVal cardNo As Integer ByVal cntNo As Integer ByVal mode As Integer ByVal cntrVal As Integer As Integer 2 Arguments cardNo card number to select board cntNo Counter Timer number This value must between 1 and 12 mode Counter operation mode This value must between 0 and 5 cntr Val The counter value to be written to the counter 2 Return Value ERR NokError ERR BoardNolnit ERR InvalidCounterNo cntNo is out of range ERR TimerMode mode is out of range 32 High Level Programming 5 6 8554 Read Counter Description User can directly read
17. an be set as independent counter or cascaded counter The gate control of counter come from either external source or internal default enable signal The clock source of the counters can be set as internal or external clock source when external clock is used user can set the jumper to decide whether the debounce function is used or not used An 8 MHz crystal is used as internal clock source It is possible to use this card on variety of powerful counter timer functions to match your industry and laboratory applications Users can set the configuration to fit the variety of applications The card also provides digital output and input port There are 8 bits digital output and 8 bits digital input channels which can be used to control or monitor the external devices PCI 8554 provides one interrupt signal which comes from internal or external interrupt sources the internal interrupt sources come from the counter output The interrupt can be used for watchdog timer or others applications The maximum interrupt time interval can be 536 sec The I O signals are via a 100 pin SCSI II connector that project through the computer case at the rear of the board The figure 1 1 shows the block diagram of the PCI 8554 PCI 8554 uses SAIC PCI controller to interface the board to the PCI bus The ASIC fully implement the PCI local bus specification Rev 2 0 All bus relative configurations such as base memory and interrupt assignment are automatically co
18. ants that equipment furnished will be free form defects in material and workmanship for a period of one year from the confirmed date of purchase of the original buyer and that upon written notice of any such defect Seller will at its option repair or replace the defective item under the terms of this warranty subject to the provisions and specific exclusions listed herein This warranty shall not apply to equipment that has been previously repaired or altered outside our plant in any way as to in the judgment of the manufacturer affect its reliability Nor will it apply if the equipment has been used in a manner exceeding its specifications or if the serial number has been removed Seller does not assume any liability for consequential damages as a result from our products uses and in any event our liability shall not exceed the original selling price of the equipment The equipment warranty shall constitute the sole and exclusive remedy of any Buyer of Seller equipment and the sole and exclusive liability of the Seller its successors or assigns in connection with equipment purchased and in lieu of all other warranties expressed implied or statutory including but not limited to any implied warranty of merchant ability or fitness and all other obligations or liabilities of seller its successors or assigns The equipment must be returned postage prepaid Package it securely and insure it You will be charged for parts and labor if you
19. ard 40 High Level Programming Appendix A Timer Counter Operation The 8554 has at most four interval 8254 chips on board Refer to chapter 2 and 4 for the signal connection and the configuration of the counters The following sections describe the details of the 8254 chip The 8254 Timer Counter Chip The Intel Tundra 8254 contains three independent programmable multi mode 16 bit counter timers The three independent 16 bit counters can be clocked at rates from DC to 8MHz MHz Each counter can be individually programmed with 6 different operating modes by appropriately formatted control words The most commonly uses for the 8254 in microprocessor based system are programmable baud rate generator event counter binary rate multiplier real time clock digital one shot motor control For more information about the 8254 please refer to the Tundra Microprocessors and peripherals or Intel Microsystems Components Handbook I O Address 8254 in the PCI 8554 occupies 4 I O address as shown below Although there are four 8254 chips on board however only one chip is selected in one moment The programming of 8254 is control by the registers BASE 0 to BASE 3 The functionality of each register is specified in the following sections For more detailed information please refer handbook of 8254 chip BASE 0 LSB OR MSB OF COUNTER 0 BASE 1 LSB OR MSB OF COUNTER 1 BASE 2 LSB OR MSB OF COUNTER 2 BASE 3 CON
20. by 8554 CLR IRQ1 8254 Chip 4 8MHz 8254 Chip 4 Counter 11 IRQ da H Counter 12 o 12 Flip Flops JP11 ar gt PCI INT A IRQ INT2 Controller debounce Flip system EXTINT EP Flops xu o F Clear by 8554 CLR IRQ2 Fig 2 14 Dual Interrupt System of PCI 8554 There is only one IRQ level used by this card although it is a dual interrupt system This card uses INT A interrupt request signal to PCI bus The mother board circuits will transfer INT A to one of the AT bus IRQ levels The IRQ level is set by the PCI plug and play BIOS and saved in the PCI controller It is not necessary for users to set the IRQ level Users can get the IRQ level setting by software library Refer the section 5 4 The PCI controller of PCI 8554 can receive two hardware IRQ sources However a PCI controller can generate only one IRQ to PCI bus the two IRQ sources must be distinguished by ISR of the application 16 e Installation amp Configuration software if the two IRQ are all used The application software can use the 8554 GET IRQ Status function to distinguish which interrupt is inserted and servicing that IRQ then users must clear current IRQ to allow the next IRQ coming in If the application need only one IRQ you can disable one of the IRQ sources by software If your application do not
21. counter mode and use counter 2 to measure pulse width then the count range can increase but the resolution will decrease Counter 1 2 3 are used in this example Skip these steps Connect GATE1 to the signal to be measured Write and verify the control program Please refer the DEMOS C source code Note that if the pulse is shorter the time resolution is worse If the pulse is wider the limitation of the maximum pulse width should be care ECLK1 p debounce system PO set by function 8554 SET cntCLK 8254 Chip 1 GND gt O A Counter 1 cour1a O SG 2MHz DB CLK Signal to be measured end of a pulse COUT11 Pulse Width selectable by function 8554 SET DBCLK Figure 4 4 Example of pulse width measurement 24 e Signal Connection and Applications Polling D I for checking the 4 6 Frequency Measurement Example step 1 step 2 step 3 step 4 step 5 To measure frequency around 1 100 K Hz This application need two counters One counter is used to generate a pulse whose time interval is very precise The pulse is used to enable the other counter counting counter by gate control The gate control is coming from COUT3 In this example cascaded counter is used the pulse generator is counter 3 clock is from COUT2 and the counter 1 is used to measure frequency The maximum value of counting coun
22. d 12 are different from other independent counters These two counters are named as cascaded counters because the clock sources of counter 11 come from fixed 8 MHz and its output are cascaded to counter 12 In fact counter 11and 12 are designed for frequency divider by using 8254 s square Installation amp Configuration e 11 wave generator mode The gate of these counters keep at H level for enabling counters all the time The COUT12 can precisely generate frequency upper to 2MHz and lower to 0 00186 Hz Note that the signals COUT12 can also be used as interrupt source See Interrupt Sources section for details The following figure demonstrates cascaded counter counter 11 and 12 8254 Chip 4 8 MHz COUT11 Counter 11 o COUT11 Counter 12 o SORMA Figure 2 6 Example of cascaded counter User Configurable Cascaded Counters Although there is one set cascaded counter on board users may need more cascaded counters User can set the clock source of every independent counters by program Therefore the independent counter output can be cascaded to the next counter s clock source to implement cascaded counter Figure 2 7 demonstrate an example of the user programmable cascaded counter Refer to next section for details of the clock source setting 8254 Chip 1 CLK1 GATE1 Counter 1 EESTI VCC G CLK2 P GATE2 Counter 2 ci
23. dows 95 W 8554 DI ByVal cardNo As Integer diData As Integer As Integer 2 Arguments cardNo card number to select board doData the value read from digital input port 2 Return Value ERR NokError ERR BoardNolnit 5 11 8554 SET cntCLK High Level Programming 35 Description To select 8254 counter 1 10 clock source Clock source of counter 11 is 8MHz and clock source of counter 12 is from COUT11 both clock source are fixed Syntax C C DOS U16 8554 DI U16 cardNo 016 cntNo U16 C C Windows 95 U16 W 8554 DI U16 cardNo U16 cntNo U16 clkkMODE Visual Basic Windows 95 W 8554 SET cntCLK ByVal cardNo As Integer ByVal cntNo As Integer ByVal cIKMODE As Integer As Integer 2 Arguments cardNo card number to select board cntNo Counter Timer number This value must be between 1 and 10 cIkMODE Select clock source 0 select ECLKn 1 select COUTn 1 2 select CK1 3 select COUT10 Return Value ERR_NoError ERR_BoardNolnit ERR InvalidCounterNo cntNo is not in the range of 1 12 ERR InvalidMode cIKMODE is not in the range of 1 3 5 12 8554 SET CK1 Description To select source of CK1 Syntax C C DOS 016 8554 SET CK1 U16 cardNo U16 selCK1 C C Windows 95 U16 W 8554 SET CK1 U16 cardNo U16 selCK1 Visual Basic Windows 95 W 8554 SET CK1 ByVal cardNo As Integer ByVal selCK1 As Integer As Integer 2 Arguments 36 High Level Programming
24. er format from the data sheet of the PCI bus controller PLX technology s PCI 9050 The LCR are specified by the PCI bus controller PCI 9050 It is not necessary for users to understand the details of the LCR if you use the software library The base address of the LCR is assigned by the PCI PnP BIOS The assigned address is located at offset 14h of PCR The 8554 registers are shown in the Table 3 1 The base address of the 8554 registers is also assigned by the PCI PnP BIOS assigned base address is located at offset 18h of PCR Note that most of the 8554 registers are 8 bits The users can access these registers by 8 bits I O instructions Users can read the PCR to get the LCR base address and the two PCI 8554 base addresses by using the PCI BIOS function call Register Format e 18 VO Address Write Read amp Mode Control amp Mode Control amp Mode Control amp Mode Control Base 0x10 0x12 Clock Mode Control Base 0x18 Digital Output Digital Input Table 3 1 I O Address Map of 8554 3 2 Timer Counter Registers The 8254 occupies 4 I O address locations in 8554 as shown blow Users can refer to Tundra s or Intel s data sheet for a full description of the 8254 features condensed information is specified in Appendix A Address BASE 0x00 BASE 0x0F Attribute read write Data Format 8254 Mode Control Register W 8254 Read Back Register
25. g As Integer 2 Arguments cardNo card number to select board hEvent the address of an array of two handles HEvent 0 and hEvent 1 are the events for interrupt signals INT1 and INT2 respectively 2 Return Value ERR NokError ERR BoardNolnit 5 17 8554 INT Disable Description This function is only available in Windows 95 driver This function is used to disable the interrupt signal generation Syntax C C Windows 95 U16 W_8554_INT_Disable U16 cardNo Visual Basic Windows 95 W_8554_INT_Disable ByVal cardNo As Integer As Integer Arguments cardNo card number to select board Return Value ERR_NoError ERR_BoardNolnit 5 18 8554 CLR IRQ1 High Level Programming 39 Description This function is only needed in DOS driver It is used to clear interrupt request which is requested by INT1 You should use this function to clear interrupt request status otherwise the new coming interrupt will not be generated Syntax C C Windows 95 U16 8554 1 016 cardNo 2 Arguments cardNo card number to select board 5 19 8554 CLR IRQ2 Description This function is only needed in DOS driver It is used to clear interrupt request which is requested by INT2 You should use this function to clear interrupt request status otherwise the new coming interrupt will not be generated Syntax C C Windows 95 U16 8554 CLR 2 016 cardNo 2 Arguments cardNo card number to select bo
26. g the default configuration users must fully understand the operation of the debounce function The setting and the basic operation theorem are not discussed in this chapter It is recommended to refer chapter 2 12 for details of the operation theorem and to refer chapter 4 for application notes 2 5 PCI 8554 Installation Outline PCI 8554 support plug and play the card can requests memory usage I O port locations assigned by system BIOS The address assignment is done on a board by board basis for all PCI 8554 in the system Your computer will probably have both PCI and ISA slots Do not force the PCI 8554 into a PC AT slot Installation Procedures 1 Turn off your computer 2 Turn off all accessories printer modem monitor etc connected to computer 3 Remove the cover from your computer 4 Select a 32 bit PCI expansion slot PCI slot are short than ISA or Installation amp Configuration e 7 EISA slots and are usually white or ivory 5 Before handling the PCI 8554 discharge any static buildup on your body by touching the metal case of the computer Hold the edge and do not touch the components 6 Position the board into the PCI slot you selected 7 Secure the card in place at the rear panel of the system unit using screw removed from the slot Running the 8554UTIL EXE A testing program is included in this utility you can check if your PCI card work properly by this file 2 6 Pin Assignment of Connecto
27. hing the DOS installation you can execute the utility by typing as follows C gt cd 8554 DOS UTIL C gt 8554UTIL 5 3 Software Driver Naming Convention The functions of PCI 8554 s software drivers are using full names to represent the functions real meaning The naming convention rules are In DOS Environment _ hardware_model _ action_name e g 8554 Initial 30 High Level Programming In order to recognize the difference between DOS library and Windows 95 library A capital W is put on the head of each function name of the Windows 95 DLL driver e g W 8554 Initial There are 10 functions provided by 8554 software drivers detail descriptions of each function are specified in the following sections The functions prototype and some useful constants are defined in Acl pci h 5 4 8554 Initial Description The PCI 8554 cards are initialized by this function The software library could be used to control multiple PCI 8554 cards Because PCI 8554 is in PCI bus architecture and meets the plug and play specifications the RQ and I O address are assigned by system BIOS directly Syntax C C DOS 016 8554 Initial U16 existCards PCI INFO pciinfo C C Windows 95 U16 W_8554 Initial U16 existCards PCI_INFO pciinfo Visual Basic Windows 95 W 8554 Initial existCards As Integer pcilnfo As PCI INFO As Integer Arguments existCards The numbers of installed PCI 8554 cards The returned v
28. i VCC G Cascaded Counters Output selectable by function SET cntCLK Figure 2 7 Example of user programmable cascaded counters 12 e Installation amp Configuration 2 9 Clock Source Configurations For every independent counter four signals can be chosen as clock source by software The clock source of counter n comes from either external clock source ECLK n or the cascaded counter output COUTn 1 CK1 or COUT10 Note 1 The clock source of the cascaded counters 11 is fixed to C8M and counter 12 is fixed to COUT11 2 The external clock source named as ECK n comes from jumper JP1 JP10 please see section 2 12 for detail description ECK n i ECK10 COUT ni gt CLK n COUTI___ gt 0 CLK1 CK1 gt gt COUTIO gt o select by function select by function 8554 SET cntCLK 8554 SET cntCLK Figure 2 8 Clock Source of Counter n C8M CK1 COUT11 gt select by function 8554 SET CK1 Figure 2 9 Clock Source of CK1 The internal clock sources CK1 comes from the clock system C8M or COUT11 selected by function 8554 SET CK1 and counters can be set to cascaded mode then clock source comes from the output of the counter with smaller channel number For example the COUTT7 is cascaded to CLK2 the COUTS is cascaded to Note If counter 1 is set to cascaded mode CLK1 is connected to GND because COUTO doesn t exist Installation amp Co
29. ignals The COUTI1 COUT12 are output of the counters The Figure 2 4 shows all the labels and the inter connection of the 8254 counters 8254 Chip Clock Source Input Counter Timer Output Gate Control Input Counter Figure 2 3 Block Diagram of 8254 Counter 10 e Installation amp Configuration 8254 Chip 2 8254 Chip 1 CLK4 CLK1 c COUTA Ac COUTI GATE4 Counter 4 o______ gt GATE1 Counter 1 9G G CS sei COUT2 GATES Counter 5 lh Ss GATE2 Counter 2 G G CLK6 CLK3 gt c COUT6 ee C COUT3 GATE6 Counter 6 2 GATES ounter 3 o CET e S16 8254 Chip 4 8254 Chip 3 CLK10 CLK7 C COUT10 C 3 COUT7 GATE10 o__ gt GATE7 r 7 GATETO Counter 10 _GATE7 Counte 3 CLK8 8M Hz C 5 COUT11 6 3 COUT8 GATE8 r Counter 11 Counte 8 C CLK9 COUT12 C COUT9 o gt GATE9 r m Counter 12 _ GATES Counte 39 Figure 2 4 Counters Architectural Independent Counters Counter 1 10 The Counter 1 to Counter 10 are independent counters because the clock source and gate control of those counters can be set independently These 10 counters are named as independent counter 8254 Chip 1 CLK1 Pei GATE1 Counter 1 oc COUTE G Figure 2 5 Example of independent counters Cascaded Counters The connection of Counter 11 an
30. imum e Dimension 134mm L X 108mm W 4 e Introduction 2 Installation amp Configurations 2 1 2 2 This chapter describes the configurations and multi functions of the PCI 8554 and teach user to install PCI 8554 At first the contents in the package and unpacking information that you should care about are described then versatile configurations of PCI 8554 are introduced so that you can configure it according to your applications The default jumper setting of PCI 8554 is shown in this chapter also What Y ou Have In addition to this User s Manual the package includes the following items PCI 8554 Enhanced Multi function Counter Timer Card Utility amp Library Diskette If any of these items is missing or damaged contact the dealer from whom you purchased the product Save the shipping materials and carton in case you want to ship or store the product in the future Unpacking Your 8554 card contains sensitive electronic components that can be easily damaged by static electricity The card should be unpacked on a grounded anti static mat The operator should be wearing an anti static wristband grounded at the same point as the anti static mat Inspect the card module carton for obvious damage Shipping and handling may cause damage to your module Be sure there are no shipping and handing damages on the module before processing After opening the card module carton extract the system module and place it
31. lack proof of date of purchase or if the warranty period is expired Product Warranty
32. nce output signal will be the same state as the input only if the input signal 14 e Installation amp Configuration keep the same state for four DB CLK otherwise the input signal will be treated as glitch and the debounce output signal will keep previous state figure 2 11 show you the how to set these jumpers figure 2 12 show you how to select DB CLK figure 2 13 show you the basic theorem of debounce system Note DB CLK can t be higher than 2MHz ECLK n debounce system E INT JPn n 1 10 JP11 DB CLK DB CLK Figure 2 11 Structure of JP1 JP11 COUT11 DB CLK 2MHz select by function 8554 SET DBCLK Figure 2 12 Clock Source of DB CLK signal output 7 signal glitch is eliminated Figure 2 13 Basic theorem of debounce system Installation amp Configuration e 15 2 13 Interrupt System The PCI 8554 s interrupt system is a powerful and flexible system which is suitable for many applications The system is a Dual Interrupt System The dual interrupt means the hardware can generate two interrupt request signals at the same time and the software can service these two request signals by ISR Note that the dual interrupt do not mean the card occupy two IRQ levels These two interrupt request signals INT1 and INT2 comes from external interrupt signal EXTINT and the timer counter 12 output Fig 2 14 show you the structure of interrupt system Clear
33. nfiguration e 13 2 10 Gate Control Configurations The gate control signals of the independent counters are internally pulled high hence they are default enable if no external gate used When the external gate signals are used the counters can be used to measure pulse width Therefore the time interval of the counter gate can be precisely controlled and frequency measurement is possible Figure 2 10 shows the jumper setting of gate control of counter 1 3110 Note The gate control of counter 411 and 412 are always enable VCC GATE n From 100 pin SCSI II Connector GATE n To 8254 Figure 2 10 Gate source of counter 1 10 2 11 Counter Outputs The timer counter output signals COUT n of 8254 are controlled by clock source gate control and software programming All the output of the 12 counters are sent to the 100 pins connector directly please see Pin assignment for corresponding signal pin number In addition the output signal may be used as clock source for cascaded counters see the above sections It is possible to cascaded ten counters by software setting see 2 8 for reference The counters output COUT12 is also used as internal interrupt source refers to Interrupt System 2 12 Debounce System Debounce system is used to eliminate bounce phenomenon If external clock is used user can set jumper JP1 JP11 to select if debounce system is used or not used If debounce system is used the debou
34. nter Example To count external event in 1 sec step 1 This application needs one counter to generate a time base of 1 sec and the second counter to count the event The cascaded counter 11 12 can perform the watchdog timer The another counter 1 is used as an example to count external event The clock source of counter 1 is the event signal and the frequency is not fixed step 2 Skip this steps step 3 Connect ECLK1 to the signal to be measured and adjust JP1 to select debounce function Step 4 The gate source of counter 1 is always enable so let the external gate open step 5 Write the control program Please refer the DEMO5 C Source code 26 e Signal Connection and Applications ECLK1 Event Signal 2MHz COUT11 gt o selectable b 8554 SET DBCLK 8254 Chip 4 _ 5 selectable by JP1 function L debounce System DB CLK function 3 6 H Counter 12 o Rl ECK1 8254 Chip 1 COUTI H Counter 1 o COUT1 gt 8254 Chip 4 H Counter 11 oL COUT12 gt G Figure 4 6 Example of event counter Signal Connection and Applications 27 4 8 Dual Interrupt System One Internal plus one external interrupt sources The PCI 8554 provides double interrupt sources which is very useful in some application For example most of the application needs a watchdog timer
35. ntrolled by BIOS software It does not need any user interaction and pre study for the configurations This removes the burden of searching for a conflict free configuration which can be very time consuming and difficult with some other bus standards Introduction 1 Software Supporting There are several software options help you get your application running quickly and easily Custom Program For the customer who is writing their own programs the PCI 8554 is supported by a comprehensive set of drivers and programming tools These software supports are available in multiple platforms MS DOS Borland C C program library DLL Dynamic Linking Library for Win 95 PCIS DASK NT DLL software developing kit for Win NT optional 8 data 8bits digital bus input output 8 2 Address PCI 4954 COUTI COUT3 bus i Controller chip 1 GATE3 Interrupt PA COUT4 COUT6 6 E 8254 2 5 i chip 2 GATE4 GATE6 4 2 Interrupt 8254 COUT7 COUTI system chip 3 GATE GATE9 7 8254 10 only COUT12 chip 4 GATE10 only I clock Debounce ECLKI ECLK10 system system E_INT Figure 1 1 Block diagram of the PCI 8554 1 1 Features The PCI 8554 Counter Timer and digital I O Card provides the following advanced features Four 8254 chips provide twelve 16 bits down counters Multi configurations of coun
36. o card number to select board int1Flag INT1 setting 0 disable 1 enable int2Flag INT2 setting 0 disable 1 enable 5 15 8554 Get IRQ Status Description The 8554 has dual interrupts system Two interrupt sources can be generated and be checked by the software This function is used to distinguish which interrupt is inserted if both INT1 and INT2 interrupts are used Syntax C C DOS 016 8554 Get IRQ Status 016 cardNo U16 ch1 U16 ch2 C C Windows 95 016 W 8554 Get IRQ Status U16 cardNo U16 ch1 U16 ch2 Visual Basic Windows 95 W 8554 Get IRQ Status ByVal cardNo As Integer ch1 As Integer ch2 As Integer 2 Arguments cardNo card number to select board chi INT1 status 0 interrupt is not from INT1 1 interrupt is from INT1 ch2 INT2 status 0 interrupt is not from INT2 1 interrupt is from INT2 5 16 8554 INT Enable 38 High Level Programming Description This function is only available in Windows 95 driver This function is used to start up the interrupt control After calling this function every time an interrupt request signal generated a software event is signaled So that in your program you can use wait operation to wait for the event When the event is signaled it means an interrupt is generated Syntax C C Windows 95 U16 W 8554 INT Enable U16 cardNo HANDLE hEvent Visual Basic Windows 95 W 8554 INT Enable ByVal cardNo As Integer hEvent As Lon
37. of the using of the library 5 1 Installation The Utility Software and Library supplied with 8554 is in DOS format which is compatible with DOS 3 0 or higher versions It is advisable to make a back up copy before using the software For a direct back up use the DOS DISKCOPY or alternatively XCOPY to a pre formatted disk The back up procedures are specified as follows 1 Insert PCI 8554 Library amp Utility diskette into floppy drive A 2 XCOPY a b s The PCI 8554 s Library amp Utility diskette includes a utility software C language library and some demonstration programs which can help you reduce programming work MS DOS Software Installation 1 Turn your PC s power switch on 29 High Level Programming 2 Put the PCI 8554 Library amp Utility diskette into your floppy drive A or B 3 Execute the following command under DOS environment A gt CD DOS AADOS SETUP 4 Aninstallation completed message will be shown on the Screen Windows 95 Software Installation 1 Turn your PC s power switch on and enter Windows 95 2 Put the PCI 8554 Library amp Utility diskette into your floppy drive A or B 3 execute A Win95 Setup exe PCI 8554 is a plug amp play card so please following the standard Win 95 convention to install hardware driver Pci8554 inf This file is included in this diskette 5 Re start the Windows 95 5 2 Running Testing Utility 8554UTIL EXE After finis
38. r 2 62 1 12V 26 GND 51 GND 76 ECLK9 3 53 2 12V 27 GND 52 GOUT2 77 COUT8 3 12V 28 GND 53 GIN2 78 GATE8 4 Vcc 29 GND 54 GND 79 ECLK8 5 Vcc 30 GND 55 GOUT1 80 COUT7 6 Vcc 81 GND 56 GIN1 81 GATE7 7 NC 82 GND 57 E INT 82 8 DI 6 33 GND 58 DI7 83 COUT6 9 DI 4 84 GND 59 DI5 84 GATE6 10 DI 2 35 GND 60 DI3 85 ECLK6 11 DI 0 36 GND 61 DI1 86 COUT5 12 DO 6 37 GND 62 DO7 87 GATES 13 DO 4 38 GND 63 005 88 ECLK5 ON es 14 DO 2 39 GND 64 DO3 89 COUT4 15 DO_0 40 GND 65 DO1 90 GATE4 16 NC 41 GND 66 NC 91 ECLK4 17 GND 42 GND 67 COUT12 92 COUT3 18 GND 43 GND 68 GND 93 GATE3 19 GND 44 GND 69 GOUT11 94 ECLK3 20 GND 45 GND 70 GND 95 COUT2 21 GND 46 GND 71 COUT10 96 GATE2 22 GND 47 GND 72 GATE10 97 ECLK2 23 GND 48 GND 73 ECLK10 98 COUT1 48 gg 24 GND 49 GND 74 COUT9 99 GATE1 49 99 25 GND 50 GND 75 GATE9 100 ECLK1 50 100 Legend ECLK n External clock source for counter n 8 e Installation amp Configuration ExtGn External gate signal for counter COUT n Counter Timer output of counter n DO m Digital output port channel DI m Digital input port channel m E_int External interrupt signal input GOUT1 Inverse TTL signal of GIN1 GOUT2 Inverse TTL signal of GIN2 Figure 2 2 Pin A
39. ssignment of Connector CN1 2 7 Clock System The clock system of PCI 8554 provides the internal clock source for the 8254 chips The clock of counter timer 1 10 can be one of the 4 sources external clock source or cascaded source from the last channel or CK1 or COUT10 The next section will give you detail description about setting clock for each counter timer and definition of CK1 The clock of counter timer 11 is fixed at 8Mhz and clock of counter timer 12 is connected to COUT11 2 8 Counters Architecture There are four 8254 chips on 8554 card The counters on chip 1 4 are labeled from counter 1 to counter 12 Counters 11 and 12 are cascaded counters and counter 1 10 can be programming to independent or cascaded counters Table 2 2 illustrates the relationship between the reference number of chips and the counters number Installation amp Configuration e 9 Number Number Number Counter Chip 1 Counter 6 Independent or Cascaded Independent or Cascaded hip 3 Chi Chi Independent or Cascaded Independent or Cascaded Chi Counter 11 Counter 12 Table 2 2 Counters Architecture Counter 10 Independent or Cascaded hip 4 There are three signals 2 input 1 output for each counter a clock input signal a gate control signal and an output signal The Figure 2 3 illustrates the block diagram of 8254 counter CLK1 CLK12 are clock sources and GATE1 GATE12 are gate control s
40. ter is no more than 65535 For measuring 100 K Hz frequency the time interval should be within 1 100 K Hz x 65535 0 655 sec If the time interval is wider then the measurement resolution is better however the counting value will be overflow if time interval is too long That means the low pulse width of counter 3 output should shorter than 0 655 sec User can try to generate the pulse by counter 3 by yourself Connect the signal to be measured to the ECLK1 and adjust JP1 to select debounce function Connect GATE1 to COUT3 The following block diagram illustrates the application Write and verify the control program The frequency of the signal is frequency counting value of counter 1 precise time interval Please refer the DEMOA C source code Signal Connection and Applications 25 set by function set by function 8554 SET cntCLK 8554 SET CK1 ECK2 Precise i ime COUTI 8254 Chip 1 Interval 8MHz 20 E COUT11 uS H Counter 2 o cour gt MO COUT1Q Xa ECLK1 frequency to JP1 set by function 7 be measured E 8554 SET cntCLK ECK1 debounce system GND 8254 Chip 1 7 O Counter 1 a CAD G COUT10Q 2MHz DB CLK COUT11 O selectable by function 8554 SET DBCLK COUT2 connect by user H enable counter 1 Figure 4 5 Example of frequency measurement 1 4 7 Event Cou
41. ters timers e Flexible setting for each independent counter the clock source could be external internal or cascaded The gate signal is external controlled or internal enabled 2 Introduction 1 2 Provide debounce function with flexible setting to prevent from bounce phenomenon when using external clock 8 digital output channels 8 digital input channels Dual interrupt sources The first interrupt source comes from output of counter 12 The second interrupt source comes from external source 100 pin SCSI II female connector PCI Bus Applications Event counter Frequency generator Frequency synthesizer Pulse width measurement Low level pulse generator Time delay Industry automation Watchdog timer 1 3 Specifications 0 Programmable Counter Timer Device 8254x 4 Counters 16 bit down counter Clock source internal clock external source or cascaded Gate control default enable or external control Digital I O DIO of input channels 8 channels of output channels 8 channels dedicated output Electronics characteristics TTL compatible signal General Specifications I O Base Address 32 consecutive address 32 bits in the PCI I O address space Connector 100 SCSI II female connector Operating Temperature 0 C 60 C Storage Temperature 20 C 80 C Humidity 5 95 non condensing Introduction 9 3 e Power Consumption 5 V 300 mA max
42. to monitor the system periodically hence an IRQ channel is used In addition the emergency control may be necessary hence an additional external IRQ channel is helpful to handle the situation Therefore dual interrupt level is necessary Clear by 8554 CLR IRQ1 8254 Chip 4 8MHz 8254 Chip 4 Counter 11 IRQ Tal w Counter 12 2200712 Fiip G Flops E_INT INT1 JP11 gt gt PCI INT A debounce IRQ INT2 Controller gt Flip gt system EXTINT E m c A Clear by 8554 CLR IRQ2 Figure 4 7 Example of dual interrupt system 28 e Signal Connection and Applications 5 High Level Programming There are 10 functions provided by the C language library By using the C language library it saves a lot of programming time If you need to perform some special functions which are not provided in the library you can modify the library according to your requirement The fully commented C source of the library is also included in your software library diskette It is a good starting point for C language programmers who wish to modify the functions in the library In addition to library and source code some demonstrating programs are also included in the disk It will help you to understand the library more quickly Please refer the demonstration examples in the diskette to get examples
Download Pdf Manuals
Related Search