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X8OBN-F 1.0b.indb

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1. 3 31 SUPER Platform User s Manual 3 10 Onboard LED Indicators GLAN LEDs Two LAN ports LAN 1 LAN 2 are located on the I O Backplane of the baseboard Each Ethernet LAN port has two LEDs The yellow LED indicates activity while the oth er Link LED may be green amber or off to indicate the speed of the connections See the tables at right for more information IPMI Dedicated LAN LEDs In addition to LAN 1 LAN 2 an IPMI Dedi cated LAN is also located on the I O Back plane of the baseboard The amber LED on the right indicates activity while the green LED on the left indicates the speed of the connection See the tables at right for more information Activity LED Link LED LIL Rear View when facing the rear side of the chassis LAN 1 LAN 2 Link LED Right LED State LED Color Definition Off No Connection or 10 Mbps Green 100 Mbps Amber 1 Gbps LED State Color Status Definition Yellow Flashing Active IPMI LAN
2. Pin Definition Pins Definition DSR RTS CTS RI 1 COM1 2 COM2 3 VGA HR SUPER Platform User s Manual Ethernet Ports LAN Ports Pin Definition Two Ethernet ports LAN1 LAN2 are Pin Definition located on the I O backplane on the baseboard addition an IPMI Dedi cated LAN is located above USB 0 1 ports on the backplane to provide KVM support for IPMI 2 0 All these ports accept RJ45 type cables 1 P2V5SB SGND 2 TDO Act LED 3 TDO P3V3SB 4 TD1 Link 100 LED Yel low 3V3SB TD1 Link 1000 LED Note Please refer to the LED Indicator Section for LAN LED information Un juut TD3 Ground TD2 Ground TD3 Ground NC No Connection 1 LAN1 2 LAN2 3 IPMI LAN gt o ER OEE SUPER X80BN F Baseboard Rev 1 01 e 3 14 Unit Identifier Switch A Unit Identifier UID switch and two LED Indicators are
3. Chapter 3 Installation Internal Buzzer Internal Buzzer Pin Definition The Internal Speaker located at SP1 can be used to provide audible indica tions for various beep codes See the table on the right for pin definitions Refer to the layout below for the loca Definitions Pos Beep In Neg Alarm Speaker tion of the Internal Buzzer ed BEEP IN 1 POS eem NEG Power LED Speaker PWR LED Connector Pin Definitions On the JD1 header pins 1 3 are used for power LED indication and pins 4 7 Pin Setting Definition Pin 1 Anode are fer the Speaker See the tables on Bir Cathode the right for pin definitions Please note Eman m that the speaker connector pins 4 7 are for use with an external speaker If you wish to use the onboard speaker close pins 6 7 with a cap Speaker Connector Pin Settings Pin Setting Definition Pins 4 7 External Speaker Internal Speaker roa JWDt E 25522538 FP CRTL Bel SUPER X80BN F Baseboard Ej Rev 1 01 COMI CPU Board Slot 3 EE CPU Board Slot 2 UPS o o CPU Board Sio 1 o e 90 PCI E 2 0 x8 VO Hub 2 Tuus 908 PCI E 2 0 x16 o WO Hub 1 T
4. P2 DIMMIAC P DIMMTAO Mez Q or CPU2 lt Standoir X8OBN CPU card attached to the plate TE E p j Ju ioe mu enn ln m Jm 4g Locating 1 2 Chapter 1 Quick Installation Guide Installing the I O Shield on the Rear Side of the Chassis 1 needed break open the IO shield windows on the rear side of the chassis 2 Securely install the shield on the chassis The I O Backpanel for the X8OBN baseboard is provided below for your reference Note You will need to install the IO shield on the rear side of the chassis before you install the baseboard into the chassis e VGA LAN1 LAN 2 UID Switch X8OBN Baseboard Backpanel IO Ports Connectors Keyboard USB 0 o BaseBoard in the Chassis w IO Backplane Shown 1 3 SUPER X8OBN F Platform User s Manual 1 2 Installing the CPU on the CPU Board A Press the socket clip down to unlock B Align the CPU key with the socket it Gently lift the socket clip to open the load plate C Align CPU Pin 1 against Socket Pin D Once the CPU is fully seated on 1 Once they are aligned lower the CPU the socket press the socket clip down
5. SUPER X80BN F Platform User s Manual 3 9 Jumper Settings Explanation of Jumpers Connector 3 2 od Pins To modify the operation of the baseboard jumpers can be used to choose between optional settings Jumpers create shorts be F umper tween two pins to change the function of the Can connector Pin 1 is identified with a square 3 2 1 solder pad on the printed circuit board See the Setting baseboard layout pages for jumper locations Pin 1 2 short Note On two pin jumpers Closed means the jumper is on and Open means the jumper is off the pins GLAN Enable Disable JPL1 enables or disables the GLAN Jumper Settings Port1 GLAN Port2 on the baseboard dumper Setting Deliniton See the table on the right for jumper j 2 Stele les settings The default setting is En abled EO o SUPERO X80BN F Baseboard Rev 1 01 CPU Board Slot 2 90 PCI E 2 0 x8 iis 51018 PCI E 2 0 x16 WO Hub 1 LEDs Slot PCI E 2 0 x8 ct 51016 PCI E 2 0 x16 wa JP22
6. n TE sut PCIE 2 0 x8 Matfer Wnh TEE Slot PCIE 20x16 VO Hub 1 SES Slot7 PCI E 2 0 x8 BMC CTRL r 906 PCIE 2 0 x16 Slot5 PCI E 2 0 x8 PLX Y SEE Slot4 PCI E 2 0 x16 PCI Bridge ja np NETL SH Slot3 PCI E 2 0 x8 ICHIOR SES Slot2 PCI E 2 0 x8 in x16 e ZEE Slott PCI E 2 0 x8 in x16 JIPMB USB10 USB8 SUPER Platform User s Manual Manufacturer Mode Select Close this jumper JPME2 to bypass SPI flash security and force the system to use the Manu facturer Mode which will allow you to flash the system firmware from a host server to modify system settings See the table on the right for jumper settings JUID_OW1 UID Overwriting When the jumper JUID_OW1 is set to Off de fault the Red LED Overheat Fan Fail PWR Fail UID LED located on Pin 8 of the Front Control Panel JF1 will take precedence over the Blue UID LED located on Pin 7 of JF1 In this case when the Red LED is on the Blue LED will be turned off When the RED LED is off the Blue UID LED can be on or off In other words the Red LED signal overwrites the Blue UID LED signal if J_UID OW is set to off When the jumper J UID OW is On the Red LED OH Fan Fail PWR Fail UID LED and the Blue UID LED work independently T
7. IL x Pull the handles upwards to remove Press the red latches outwards to unlock the CPU Board the CPU Board from the chassis Note All graphics and images are for illustration only They may be differ ent from what you have in your system 1 1 SUPER X8OBN F Platform User s Manual Attaching the Bridge Card to the Bridge Card Plate 1 Locate six mounting holes on the Bridge card Locate four standard standoffs and two locating standoffs on the Bridge card plate as shown below 2 Place the Bridge card on top of the Bridge card plate making sure that the Bridge card properly rests on all standoffs with the two locating standoffs protruding from the Bridge card plate Standard Standoff 3 Securely attach the Bridge card to the Bridge card plate with screws Attaching the CPU Board to the CPU Board Plate 1 Locate nine mounting holes on the CPU board Locate seven standard stand offs and two locating standoffs on the CPU board plate 2 Place the CPU board on top of the CPU board plate making sure that the CPU board properly rests on all standoffs with the two locating standoffs pro truding from the CPU board plate as shown in the drawing below 3 Securely attach the CPU board to the CPU board plate with screws Locating Standoff gu SuPERS XBOBN cPU fl P2DIMMBAD PLOMMAAD PZDIMMSAD PLDIMMSA
8. L 9901008 enda 2 00 890 pan BITS TW LOr I NSL 9901 008 509 lo g 9 E E B 5 1579180 a E p E 9 IdO E 2 E p 1 9901 008 800 Fray erac y ruaa 9901008 SEG 9901 008 HOO rre vac rekon HU uoa 99010085500 1 9901 008 400 ou egag to SLOP ONS RISTO RETO gaq 9901 008 1 9901 008 6400 Fou 61579 IWS PLO IWSES 9901 008 509 1 9901 008 6400 7 i F 9901 008 HOG j 9901 008 509 i 9901 008 Haq 1 9901 008 waa HS 10 ee fs oro mg 28 210 uu 9901 008 ll 9901 008 ead 290 909 conprara mg 8901 008 ead 1 9901 008 810 Fray ac Endo 2090 9901008 HOG 9901 008 6904 Few cur Irora 9040 ao gn TT TEN 9901008 5500 1 9901 008 Yad Fu eua HAMS ROPING EN eb 1 9901 008 00 9901 008 800 Haq 91979 TS ON 9901 008 HCC 1 9901 008 6800 guy tuac i F 9901 008 6399 j 9901 008 5399 te yy ceca i 1 9901 008 d 1 9901 008 640G Herter eae 5 TOYO TT ON 9901 008 HGG j 9901 008 910 eredi C SLOP SING STOFO LAN aro Fut 99000082599 51579190 may not exactly represent the lagram an System Block Diagram 2 12 This is a general block d features on your baseboard See the Baseboard Features pages for the actual specifications of each baseboard Note Chapter 2 Overview 2 2 Chipset Overview Built upon the functional
9. 1 1 Attaching the Bridge Card to the Bridge Card Plate 1 2 Attaching the CPU Board to the CPU Board Plate 1 2 Installing the Shield on the Rear Side of the Chassis 1 3 1 2 Installing the CPU on the CPU BOSE tratte prato urna 1 4 1 3 Installing the Memory Module on the CPU 1 4 1 4 Installing the CPU Heatsink on the CPU Board 1 5 1 5 Attaching the Air Shroud on the CPU 1 5 1 6 Installing the Baseboard into the eta ri ttt onere nn apu cu Spb 1 6 1 7 Installing the Populated CPU Board on the 1 7 Installing the CPU Board w the CPU Board Plate Attached on the Baseboard e ere H 1 7 1 8 Installing the Bridge Card between the CPU Boards 1 8 1 9 Installing Internal PeripheralS i kk kk kk kek 1 9 1 10 Installing External Peripherals 1 9 Chapter 2 Overview 2 1 OV GIVE t 2 1 2 2 Chipset Overview PME s 2 13 2 3 Special Features MN 2 14 Hg i c umso 2 14 2 5 ACPI AUS E
10. A lt E o H UJ e f Notes 1 All graphics and images are for illustration only They may be different from what you have in your system 2 For more details on power cable connection please refer to Section 3 8 in Chapter Also refer to Chapter 3 for more information on system installation 1 9 SUPER X8OBN F Platform User s Manual Notes Chapter 2 Overview Chapter 2 Overview 2 1 Overview Checklist Congratulations on purchasing your computer system from an acknowledged leader in the industry Supermicro systems are designed with the utmost attention to detail to provide you with the highest standards in quality and performance For more information regarding this product please visit our website at www supermicro com SUPER X80BN F Platform User s Manual SUPER X80BN F Baseboard Image 1111 11717 Note All graphics shown in this manual were based upon the latest PCB Revision available at the time of publishing of the manual The board you ve received may or may not look exactly the same as the graphics shown in this manual 2 2 Chapter 2 Overview X8OBN F Baseboard Layout EW Qr SUPER 6 X80BN F Baseboard FPCRTE Rev 1 01 o FEEDS an5 o CPU Board Slot 3 Q
11. Slol9 PCIE 2 0 x8 98 POLE 20x16 PCIE 2 0 x8 Slot6 PCI E 20 x16 SE Slot5 PCE 2 0 x8 a gt gt Battery V Nm TE Slot4 POLE 20 16 PLX PCI Bridge JBTI Slot3 PCI E 2 0 x8 9 JPME E ICHIOR 500 PCIE 2 0 x8 in x16 o G XER Slot POHE 2 0 x8 in x16 m 3 21 JPWR3 8 pin Proces sor PWR Req d F JPWR4 8 pin Proces sor PWR Req d G JPWF1 SATA Device PWR Req d for SATA devices H VJ K HDD PWR SUPER Platform User s Manual Fan Headers Fan Headers The X8OBN Baseboard has six system Fan Type of Pins Q ty No fan headers and four CPU_card fan Fans 2 Fan7 IOH1 Fan Fan8 IOH2 headers All these are 4 pin fans and are a T CPU 4 pin 4 Fans 3 6 backward compatible with the traditional Board Fan 3 pin fans In addition two 3 pin IOH fan Fang headers are located at Fani and Fan2 SYS n Panra Fars Fans Fan 9 12 Fan speed control is available for 4 pin fans only See the tables on the right for more information Fan speed control is Pin Definition available via Hardware Health Monitoring in the Ad
12. 2016 00000 F ooo ooo oo oo Ex LAN CIRL MES Bezeerteo E P P BBBBBBBS 88888888 s 99 uD 99 uj ed ca ej uj t Bienen ee 8 m PUR BERI Slott0 PCI E 2 0 x16 Goo ajoo 100 SESS Slot PCI E 2 0 x8 ec mum o 955552 51018 PCI E 2 0 x16 LEDS BMC CTRL 35 906 PCI E 2 0 x8 PLX Aa 255595 Slot4 PCI E 2 0 x16 PCI Bridge o Battery E VO Hub 1 Slot7 PCI E 2 0 x8 555 51016 PCI E 2 0 x16 2 7 226 JPWRt S500 900m ez 808 5 32225 91013 PCI E 2 0 x8 FMFI 2005 Slot2 PCI E 2 0 x8 in x16 a mu 8 aa JWE1 359225 Slot PCI E 2 0 x8 in x16 nnn JIPM E LSATAS H USB10 USB8 0 o o ssn o o so oo meo mE 7 Notes e See Chapter 3 for detailed information on jumpers ports and JF1 front panel connections e yg indicates the location of Pin 1 Jumpers not indicated are for testing only e LED Indicators that are not documented are for testin
13. Slot POLE 20 x8 IMEI Slot PCI E 2 0 x8 in x16 Groun NMI X X FP PWRLED 3 3V HDD LED ID UID SW 3 3V Stby NIC1 Link LED NIC1 Activity LED NIC2 Link LED NIC2 Activity LED Blue OH Fan Fail PWR FaiL UID LED Power Fail LED Red Blue LED Cathode 3 3V Reset gt Reset Button Ground Ground PWR gt Power Button Chapter 3 Installation Front Control Panel Pin Definitions NMI Button The non maskable interrupt button header is located on pins 19 and 20 of JF1 Refer to the table on the right for pin definitions Power LED The Power LED connection is located on pins 15 and 16 of JF1 Refer to the table on the right for pin definitions 3 o SUPER X amp OBN F Baseboard Rev 1 01 mu NMI Button Pin Definitions JF1 Pin Definition 19 Control 20 Ground Power LED Pin Definitions JF1 Pin Definition 15 3 3V 16 PWR LED A NMI B PWR LED HDD LED ID_UID_SW 3 3V Stby NIC1 Link LED NIC1 Activity LED NIC2 Link LED
14. SlotS PCI E 2 0 x8 ess Slo PCI E 2 0 x16 Tuus 908 PCI E 2 0 x8 TE 902 PCI E 2 0 x8 in x16 Tuus PCI E 2 0 x8 in x16 Chapter 3 Installation CMOS Clear JBT1 is used to clear CMOS Instead of pins this jumper consists of contact pads to prevent the accidental clearing of CMOS To clear CMOS use a metal object such as a small screwdriver to touch both pads at the same time to short the connection Always remove the AC power cord from the system before clear ing CMOS Note 1 For an ATX power supply you must completely shut down the sys tem remove the AC power cord and then short JBT1 to clear CMOS Note 2 Be sure to remove the onboard CMOS Battery before you short JBT1 to clear CMOS Note 3 Clearing CMOS will also clear any passwords Watch Dog Enable Disable Watch Dog Watch Dog JWD1 is a system monitor that Jumper Settings can reboot the system when a software ap Jumper Setting Definition plication hangs Close Pins 1 2 to reset the Pins 1 2 Reset default system if an application hangs Close Pins Pins 2 3 NMI 2 3 to generate a non maskable interrupt Open Disabled signal for the application that hangs See the table on the right for jumper settings Watch Dog must also be enabled in the BIOS TH
15. PM 3 13 Video Connection kK ka KA kk KK KAKA KA A KA 3 13 Ethernet mln de De N DD Cade gg 3 14 Unit ldentill r 3 15 Front Control nennen eere 3 16 Front Control Panel Pin Definitions esssssseeeeennenee 3 17 hull siti N RT EO TETTE 3 17 Power c dak 3 17 y BER Sp E c AMORIS NND 3 18 NICT NIC2 LED Indicators iier rr eret cene en rra bkn adan anka rane 3 18 Overheat OH Fan Fail PWR Fail UID 3 19 Power Fall 3 19 Reset Button 3 20 Power Button liali daadaa annaia kual da d naa b da K w d raal adi xa aal n naka 3 20 Connecting COS M ca Sete r r Dr nr 3 21 ipei t apt eva aae hr seis EE da eua se 3 21 DOM Power Connector cccccccceceececeeeeeeeeeceeaeeeeeeeeeeeeeceeaeeeeeseteeseeeneees 3 21 Fan CAC GIS 2 RIP ra TM 3 22 Chassis INMUSION 3 22 Internal 776 3 23 Power EDS CAST c 3 23 WPM Header Port 8 erre lan salana kalak an ana ka kake daku l ka n k ka 3 24 Overheat LED Fan kk kk kk kk kk kk kk 3 24 TSGPIO T2 Headers erian a ke l ke xak r b k Aa ek dekr keka 3 25 Jumper Settings r rrr 3 26 Explan
16. SUPERO X80BN F Baseboard Rn Rev 1 01 COMI JP18 i 6 Y 55 JP17 0000 i i o CPU Board Slot 1 JPWRA TEST sito PCI E 20x16 ae 1 277 Slot9 POE 2 0 x8 I SATA1 el VO Hub 2 p o TET Slots POLE 20x16 hev C I SATA2 Slot7 POHE 20 x D I SATA3 zs 906 PCI E 2 0 x16 i E ie E 4 Zt POHE 2 0 x8 E I SATA5 XE Slold POLE 2 0 x16 PCI Bridge TT 508 PCIE 2 0x8 Slot2 POLE 2 0 x8 in x16 uu Slott PCI E 2 0 x8 in x16 Chapter 4 Troubleshooting Chapter 4 Troubleshooting 4 1 Troubleshooting Procedures Use the following procedures to troubleshoot your system If you have followed all of the procedures below and still need assistance refer to the Technical Support Procedures and or Returning Merchandise for Service section s in this chapter Note Always disconnect the power cord before adding changing or inst
17. mmm m e wis m n m m n m n Processor amp Memory Module Population Configuration For memory to work properly follow the tables below for memory support CPUs and the Corresponding Memory Modules on Each CPU Board CPU Corresponding DIMM Modules CPU 1 P1 1A P1 2A P1 3A P1 4A P1 5A P1 6A P1 7A P1 8A CPU2 P2 1A P2 2A P2 3A P2 4A P2 5A P2 6A P2 7A P2 8A Processor and Memory Module Population on Each CPU Board Number of CPU and Memory Population Configuration Table CPUs DIMMs For memory to work proper please install DIMMs in pairs 2 CPUs amp CPU1 CPU2 8 DIMMs P1 1A P1 3A P1 5A P1 7A P2 1A P2 3A P2 5A P2 7A 2 CPUs amp CPU1 CPU2 10 16 DIMMs P1 1A P1 3A P1 5A P1 7A P2 1A P2 3A P2 5A P2 7A Any memory pairs in P1 P2 DIMM slots Note To optimize system performance we recommend that 4 CPU or 8 CPU configuration be used in your system as shown in the table below Please note that 1 CPU configuration has not been validated by SMC 4 CPU or 8 CPU Configuration Recommended for Optimal System Performance 4 CPU Configuration 2 CPUs per CPU Board Two CPU Boards Required One on CPU Board Slot Anther on CPU Board Slot2 8 CPU Configuration 2 CPUs per CPU Board Four CPU Boards Required Two CPU Boards on each CPU Board Slot from Slot1 to Slot4 3 8 Chapter 3
18. fans and CPU run normally as configured in the BIOS User intervention No action required Medium The processor is running warmer This is a precautionary level and generally means that there may be factors contributing to this condition but the CPU is still within its normal operating state and the CPU Tempera ture Tolerance level The onboard fans and CPU run normally as configured in the BIOS The fans may adjust to a faster speed depending on the Fan Speed Control settings User intervention No action is required However consider checking the CPU fans and the chassis ventilation for blockage High The processor is running hot This is a caution level since the CPU s Temperature Tolerance has been reached or exceeded The overheat alarm may be triggered The system may shut down if it continues for a long period to prevent damage to the CPU e CPU Vcore CPU Vcache CPU Millbrook 1 1V CPU Brancho VDD 1 5V and Branch1 VDD 1 5V gt Super IO Configuration for the W83527 HG chip e Super IO Chip This item displays the status of the onboard Super IO chip Watchdog Function If enabled the WatchDog Timer will cause the system to reboot when the system is inactive for more than 5 minutes The options are Enabled and Disabled gt Super IO Configuration for the WPCM450 chip e Super IO Chip This item displays the status of the onboard Super IO chip Serial Port 0 Configuration Serial Port 1
19. JP22 four GPU 8 pin power connectors JPWR1 JPWR2 JPWR3 JPWR4 and four HDD power connectors JP16 JP19 are lo cated on the X8OBN Baseboard These power connectors meet the SSI EPS 12V specification These power connectors must be connected to your power supply to provide adequate power to your system and components Failure to do so will void the manufacturer warranty on your power supply and the system See the table on the right for pin definitions DOM Power Connector A power connector for SATA DOM Disk_On_ Module Devices is located at JWF1 Connect Chapter 3 Installation GPU 8 pin PWR Con nector Pin Definitions Pins Definition 158 12 4 8 GND GPU PWR cable req d for graphics cards HDD 8 pin PWR Con nector Pin Definitions Pins Definition 1 4 GND 412V HDD PWR cable required for HDDs DOM PWR Pin Definitions Pin Definition 1 45V the appropriate cable here to provide power mm E roun support for your DOM devices 3 Ground SUPER X80BN F Basebsard Ru En Med A PWR 1 JP22 Req d PWR 2 JP21 Req d JPWR1 8 pin Proces sor PWR Req d 10 9 Raub ow D JPWR2 8 pin Proces NA sor PWR Req d TEE Slott0 PCIE 2 0 x16
20. JP16 JP17 JP18 JP19 One 1 SATA DOM Power Connection JWF1 Note All these power connections are required for adequate power supply to the components and the system ACPI ACPM Power Management Main switch override mechanism Power on mode for AC power recovery PC Health Monitoring CPU Monitoring Onboard voltage monitors for CPU Vcore up to 8 CPUS IOH1 Vcore IOH2 Vcore 3 3VDD 3 3VSB P3V3 P3V3 AUX 12V 5V Memory Voltage and Bat tery Voltage CPU 7 Phase switching voltage regulator CPU System overheat LED and control CPU Thermal Trip support Thermal Monitor 2 TM2 support Chapter 2 Overview Fan Control Twelve 12 4 pin system cooling fans with Fan status monitoring with firmware Pulse Width Modulation fan speed control and Low noise fan speed control Two 2 3 pin IOH fans JP3 IOH1 Fan JP2 IOH2 Fan System Man PECI Platform Environment Configuration Interface agement 2 0 support System resource alert via Supero Doctor 111 SuperoDoctor Watch Dog NMI Chassis Intrusion Header and Detection Dimensions 16 8 L x 16 4 W 426 72mm x 416 56 mm X8OBN F Baseboard Notes 1 For IPMI Configuration Instructions please refer to the Embedded IPMI Configuration User s Guide available http Awww supermicro com support manuals 2 For PCI E expansion slots to work properly please refer to the instruc
21. down to the socket to lock it A avoid damaging the CPU do not rub the CPU pins against the socket 1 3 Installing the Memory Module on the CPU Board A Align the key on the DIMM module C Press the notches on the ends of against the key of the DIMM socket the DIMM module inwards to lock it B Insert the DIMM module straight down to the DIMM socket by pressing both ends of the DIMM module at the same time Chapter 1 Quick Installation Guide 1 4 Installing the CPU Heatsink on the CPU Board a A If needed apply the proper amount B Place the heatsink on top of the of thermal grease with thickness of CPU so that the two mounting holes up to 0 13 mm to the heatsink on the heatsink are aligned with those Note The proper amount of on the retention mechanism thermal grease has been ap C Insert two push pins on the sides plied to our heatsinks If you of the heatsink through the mount use a heatsink purchased ing holes on the motherboard and from SMC skip this step turn the push pins clockwise to lock them 1 5 Attaching the Air Shroud on the CPU Board Attach the air shroud on the CPU board before you install the CPU board on the X8OBN baseboard Populated CPU Board w Air Shroud AN Populated CPU Board w Air Shroud Side View Po
22. is complete For faster service You can also request a RMA authorization online http Awww supermicro com This warranty only covers normal consumer use and does not cover damages in curred in shipping or from failure due to the alternation misuse abuse or improper maintenance of products During the warranty period contact your distributor first for any product problems 4 6 Chapter 4 AMI BIOS Chapter 5 BIOS 5 1 Introduction This chapter describes the AMI BIOS Setup Utility for the X8OBN F Baseboard The AMI ROM BIOS is stored in a Flash EEPROM and can be easily updated This chapter describes the basic navigation of the AMI BIOS Setup Utility screens Starting BIOS Setup Utility To enter the AMI BIOS Setup Utility screens press the lt Delete gt key while the system is booting up Note In most cases the lt Delete gt key is used to invoke the AMI BIOS setup screen There a few cases when other keys are used such as lt F1 gt F2 etc Each main BIOS menu option is described in this manual The Main BIOS setup menu screen has two main frames The left frame displays all the options that can be configured Grayed out options cannot be configured Options in blue can be configured by the user The right frame displays the key legend Above the key legend is an area reserved for a text message When an option is selected in the left frame it is highlighted in white Often a text message will a
23. www supermicro com support manuals SUPERMICRO X80BN Motherboard Drivers amp Tools WinXP x Intel Chipset INF files S U PE R M I e Re IC Matrox G200e Graphics Driver Drivers amp Tools Intel Boxboro Chipset X80BN Intel Rapid Storage Technology Adaptec Storage Manager Intel PRO Network Connections Drivers SUPERMICRO Supero Doctor III SUPERMICRO Computer Inc Build driver diskettes and manuals Browse CD Auto Start Up Next Time For more information please visit SUPERMICRO s web site Driver Tool Installation Display Screen Note 1 Click the icons showing a hand writing on the paper to view the readme files for each item Click on a computer icon to the right of an item to install this item from top to the bottom one at a time After installing each item you must reboot the system before proceeding with the next item on the list The bottom icon with a CD on it allows you to view the entire contents of the CD Note 2 When making a storage driver diskette by booting into a Driver CD please set the SATA Configuration to Compatible Mode and configure SATA as IDE in the BIOS Setup After making the driver diskette be sure to change the SATA settings back to your original settings B 1 SUPER X8OBN F Platform User s Manual B 2 Configuring Supero Doctor Ill The Supero Doctor program is a Web based management tool that supports remote management capability It includes Remote
24. 0 and the number of 1 s in data bits is odd Select None if you do not want to send a parity bit with your data bits in transmission Select Mark to add a mark as a parity bit to be sent with the data bits Select Space to add a Space as a parity bit to be sent with your data bits The options are None Even Odd Mark and Space Stop Bits A stop bit indicates the end of a serial data packet Select 1 Stop Bit for standard serial data communication Select 2 Stop Bits if slower devices are used Terminal Type This feature allows the user to select the target terminal emulation type for Con sole Redirection Select VT100 to use ASCII Character set Select VT100 to also include color function key support Select ANSI to use Extended ASCII Char acter Set Select VT UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes The options are ANSI VT100 VT100 and VT UTF8 gt Network Stack Network Stack Select Enabled enable PXE Preboot Execution Environment or UEFI Unified Extensible Firmware Interface for network stack support The options are Enabled and Disabled 5 17 SUPERO X8OBN F Platform User s Manual 5 4 Chipset Use the arrow keys to select Chipset and press lt Enter gt to access the submenu items This submenu allows the user to configure chipset settings Aptio Setup Utility Copyright C 2009 American Megatrends Inc gt North Bridge gt North Bridge This submenu allows the
25. 10 first However Slot 10 will be down graded to support a PCI E 2 0 x8 device when Slot 9 is populated with a PCI E 2 0x8 device For PCI E 2 0 Slot 8 and Slot 7 nstall Slot 8 first However Slot 8 will be down graded to support a PCI E 2 0 x8 device when Slot 7 is populated with a PCI E 2 0x8 device For PCI E 2 0 Slot 6 and Slot 5 nstall Slot 6 first However Slot 6 will be down graded to support a PCI E 2 0 x8 device when Slot 5 is populated with a PCI E 2 0x8 device For PCI E 2 0 Slot 4 and Slot 3 nstall Slot 4 first However Slot 4 will be down graded to support a PCI E 2 0 x8 device when Slot 3 is populated with a PCI E 2 0x8 device Jumper JBT1 JPB1 JPG1 JPME1 JPME2 JPL1 JPRST1 JPT1 JUID_OW1 JWD1 Connectors 3 pin Fans 4 pin Fans BT1 Buzzer CPU Board Slots 1 4 COM1 COM2 I SATA 0 5 JD1 JF1 JIPMB1 JL1 JOH1 JP16 JP19 JP21 JP22 JPWR1 JPWR4 JTPM1 JWF1 KB MOUSE Chapter 2 Overview X80BN F Baseboard Quick Reference X8OBN F Jumpers Description Default Setting Clear CMOS See Chapter 3 BMC Enabled Pins 1 2 Enabled VGA Enabled Pins 1 2 Enabled ME Mode Recovery Off Normal ME Mode Select Off Normal GLAN1 GLAN2 Enable Pins 1 2 Enabled BMC Reset Off Normal TPM Enabled Pins 1 2 Enabled UID Overwrite Off Normal Watch Dog Pins 1 2 Reset X8OBN F Baseboard Connectors Description Two 3 pin Fan Headers for IOH1 Fan7 amp IOH2 Fan8 Six 4 Syst
26. D kr n dll k w y e Ka n n WE e ERO 5 18 5 5 Server Management kasa aku nadne kel yaaa n 5 25 5 65 c 5 27 97 uv si ru rcm 5 28 5 8 o em 5 29 5 9 Save amp Exit Cr 5 30 Appendix A BIOS Error Beep Codes Ped BIOS Error Bep CodeS dek aeiae A 1 Appendix B Software Installation Instructions B 1 lnstallrig Software PrOQIaITIS acute kus kak kake n ka B 1 B 2 Configuring Supero Doctor UM B 2 viii Chapter 1 Quick Installation Guide Chapter 1 Quick Installation Guide If purchased a bare bone system from Supermicro the X8OBN F Baseboard the X8OBN CPU board and the X80BN BRI Bridge card are enclosed in the chassis To prepare your system for proper installation follow the instructions below 1 1 Preparation for Proper System Installation Removing the Bridge Card from the Chassis 1 Loosen the screws from the Bridge card 2 Remove the Bridge card from the chassis Removing the CPU Board from the Chassis 1 Locate the red latches on the handles of the CPU board 2 Press both red latches outwards towards the ends of the chassis to release the CPU board from its locking position 3 Push both handles upwards and gently pull the CPU board from the chassis
27. Note Additional information given to differentiate between various models or to provide information for correct system setup Preface Contacting Supermicro Headquarters Address Tel Fax Email Website Europe Address Tel Fax Email Asia Pacific Address Tel Fax Website Technical Support Email Tel Super Micro Computer Inc 980 Rock Ave San Jose CA 95131 U S A 1 408 503 8000 1 408 503 8008 marketing supermicro com General Information support supermicro com Technical Support www supermicro com Super Micro Computer B V Het Sterrenbeeld 28 5215 ML s Hertogenbosch The Netherlands 31 0 73 6400390 31 0 73 6416525 sales supermicro nl General Information support 2supermicro nl Technical Support rma supermicro nl Customer Support Super Micro Computer Inc 4F No 232 1 Liancheng Rd Chung Ho 235 Taipei County Taiwan R O C 886 2 8226 3990 886 2 8226 3991 www supermicro com tw support supermicro com tw 886 2 8228 1366 ext 132 or 139 SUPER X8OBN F Platform User s Manual Table of Contents Preface Chapter 1 Quick Installation Guide 1 1 Preparation for Proper System 1 1 Removing the Bridge Card from the 1 1 Removing the CPU Board from the
28. Settings This feature allows the user to set Advanced Configuration and Power Interface parameters for this system Enable ACPI Auto Configuration Select Enabled to allow the system BIOS to automatically configure ACPI param eters for the system The options are Disabled and Enabled Enable Hibernation Select Enabled for Hibernation support which will allow a system to enter an OS S4 state Hibernation may not be supported by some operation systems The options are Enabled and Disabled ACPI Sleep State Use this feature to set the highest ACPI sleep state when the suspend button is pressed The options are S1 CPU Stop Clock and Suspend Disabled 5 6 Chapter 4 AMI BIOS gt Trusted Computing This feature allows the user to configure Trusting Computing settings TPM Configuration This future allows the user to set Trusted Platform Module Configuration settings TPM Support Select Enabled to enable TPM Trusted Platform Module support for system security and data integrity The options are Disabled and Enabled If this option is set to Enabled the following items will display TPM State Select Enabled to display the status of TPM support for this system The options are Disabled and Enabled Please note that a system reboot is needed before a change on the TPM state to take effect Pending TPM Operation This feature is used to schedule a TPM operation that is pending Select Enable Take Ownership to allow
29. USB 0 1 are located on the I O back panel Additionally six Front Panel USB con nections USB 2 3 USB 4 5 USB 8 USB 10 are also on the baseboard to provide front chassis access Cables are not included See the tables on the right for pin definitions 1 5V PO PO 2 3 4 5 2 3 4 Ground 5 NA 1 Backpanel USB 0 2 Backpanel USB 1 3 Front Panel USB 2 3 4 Front Panel USB 4 5 5 Front Panel USB 8 6 Front Panel USB 10 n EZ Oa SUPER 6 X80BN F Baseboard Rev 1 01 Chapter 3 Installation Serial Ports Serial COM Ports Pin Definitions Two COM connections COM1 amp 2 are located on the motherboard COM is located on the Backplane panel COM2 are located next to SATA Ports 0 1 to provides front accessible serial support See the table on the right for pin definitions O O O O O 0000 1 DCD RXD TXD DTR 2 3 4 5 Video Connection A Video VGA port is located next to COM1 on the I O backplane Refer to the board layout below for the location e J SUPER X80BN F Baseboard Rev 1 01 EET A
30. Voltage Once a voltage becomes unstable a warning is given or an error message is sent to the screen The user can adjust the voltage thresholds to define the sensitivity of the voltage monitor Fan Status Monitor with Firmware Control PC health monitoring in the BIOS can check the RPM status of the cooling fans The onboard CPU and chassis fans are controlled by Thermal Management via BIOS under the Hardware Monitoring section in the Advanced Setting Environmental Temperature Control The thermal control sensor monitors the CPU temperature in real time and will turn on the thermal control fan whenever the CPU temperature exceeds a user defined threshold The overheat circuitry runs independently from the CPU Once the ther mal sensor detects that the CPU temperature is too high it will automatically turn on the thermal fans to prevent the CPU from overheating The onboard chassis thermal circuitry can monitor the overall system temperature and alert the user when the chassis temperature is too high Note To avoid possible system overheating please be sure to provide adequate airflow to your system System Resource Alert This feature is available when the system is used with Supero Doctor III in 2 14 Chapter 2 Overview the Windows OS environment or used with Supero Doctor II in Linux Supero Doctor is used to notify the user of certain system events For example you can also configure Supero Doctor to provide you with
31. bootup The options are Off and On CSM Module Version This item displays the version of CSM Content Switch Module currently used in the system 5 28 Chapter 4 AMI BIOS Gate20 Active If Upon Request is selected Gate20 can be disabled via BIOS Select Always to keep Gate20 always active when executing any RT Register Transfer Code above 1 MB The options are Always and Upon Request Option ROM Message Use this feature to select the Option ROM mode setting The options are Force BIOS and Keep Current Interrupt 19 Capture Interrupt 19 is the software interrupt that handles boot disk functions When this item is set to Enabled the ROM BIOS of the host adaptors will capture Interrupt 19 at bootup and allow the drives that are attached to these host adaptors to function as bootable disks If this item is set to Disabled the ROM BIOS of the host adap tors will not capture Interrupt 19 and the drives attached to these adaptors will not function as bootable devices The options are Enabled and Disabled Boot Option Priorities Boot Option 1 Use this feature to set the system boot sequence If Built in EF Extensible Firm ware Interface Shell is selected the Built in EFI Shell will become the first compo nent to boot The options are Disabled and Built in Shell 5 8 Security Use this section to configure the privilege level of the user when accessing the system or the Setup Utility Aptio Setup Utili
32. for the system to handle hardware errors on the Windows OS platforms in order to reduce system crashes due to hardware errors and to enhance system recovery and health monitoring The default setting is Enabled gt CPU Configuration CPU Configuration This feature allows the user to configure CPU support settings It also displays the status of the processor used in the system Processor Type This item displays the CPU type for the mainboard Physical Processors This item displays the number of physical processors used in this system Logical Processors This item displays the number of logical processors avail able for this system e EMT 64 This item indicates if EMT 64 Intel Extended Memory Technology for 64 bit is supported by this system Processor Speed This item displays the speed of the processor used in the system Processor Stepping This item indicates the revision level of the processor used in the system e Microcode Revision This item indicates the revision number of the processor core used in the system e Processor Cores This item indicates the number of processor cores available in the system ntel HT Technology This item indicates if Intel Hyper Threading Technol ogy is supported by the system Intel TH Technology is used to enhance CPU performance Chapter 4 AMI BIOS Clock Spread Spectrum Select Enable to enable Clock Spectrum support which will allow the BIOS to moni
33. headers are lo cated on the baseboard These head ers support Serial_Link interface for onboard SATA connections See the table on the right for pin definitions SUPER X80BN F Baseboard Rev 1 01 e COMI CPU Board Slot 3 CPU Board Slot 2 roa JWDt Definition Pin Definition NC 2 NC Ground Data Load Ground Clock NC Note NC No Connection o ATL Fang o CPU Board Slot 1 e 90 PCI E 2 0 x8 VO Hub 2 Tuus 908 PCI E 2 0 x16 o WO Hub 1 T Slot7 PCIE 2 0 x8 Ses Slot6 PCI E 20 x16 o A T SGPIO1 B T SGPIO2 JP22 1 1 Slot PCI E 2 0 x8 PLX f N Hue 904 206 PCI Bridge e Batty JBTI 005 Slot PCI E 2 0 x8 v FM IHR fo Slot PCI E 2 0 x8 in x16 amp a o 99 Ses Slott PCI E 2 0 x8 in x16 Visa JPWR1 fan 4 JIPMB1S SATAS sui USB10 USB8 G7 o Lee
34. is selected BMC Network parameters will not be modified when the BIOS Setup Utility is in operation The options are DHCP Static and Do nothing 5 6 iSCSI This section allows the user to configure iSCSI settings Aptio Setup Utility Copyright C 2009 American Megatrends Inc iSCSI Initator Name iSCSI Initiator Name Use this feature to specify the name of your iSCSI initiator This name will be unique worldwide Be sure to use the iqn format when naming your iSCSI Initiator 5 27 SUPERO X8OBN F Platform User s Manual 5 7 Boot Configuration This section allows the user to configure Boot settings 3 ING Quiet Boot Disabled Quiet Boot This feature allows the user to select the bootup screen display between the POST messages and the OEM logo Select Disabled to display the POST messages Select Enabled to display the OEM logo instead of the normal POST messages The options are Enabled and Disabled Fast Boot Select Enabled to skip certain tests during POST to reduce the time needed for system boot This feature has no effect on BBS BIOS Boot Specification boot options The options are Enabled and Disabled Setup Prompt Timeout This feature allows the user to specify how many seconds the system shall wait for the BIOS setup activation key to complete its tasks before the system resumes the normal operation The default setting is 1 Second Bootup Num Lock Select On to turn on the Numlock key at
35. models only Link LED Activity LED IPMI LAN Link LED Left amp Activity LED Right Color State Definition Link Left 100 Mbps Green Solid Activity Right Amber Blinking Active LAN1 2 LEDs B IPMI LAN LEDs HRIC 3 32 Chapter 3 Installation Rear UID LED The rear UID LED is located at LED6 on the backplane This LED is used in conjunction with the rear UID switch to provide easy identification of a system that might be in need of service Refer to UID Switch on Page 3 15 for more information BMC Heartbeat LED A BMC Heartbeat LED is located at LED4 on the baseboard When LED4 is blink ing BMC functions normally See the table at right for more information UID LED Status Color State OS Status Blue On Blue Blinking Windows OS Unit Identified Linux OS Unit Identified BMC Heartbeat LED Status Definition Color State Green BMC Normal Blinking Note LED Indicators that are not documented in the manual are for test ing only SUPERO X80BN F Baseboard Rev 1 01 e COMI 00006 id ard Slot 2 EO ret FP CRT o
36. tions listed on Page 2 6 SUPER Platform User s Manual Japeeyy 9296915 21 DEYE EM Wal OH ZSE8MM So g 198 las sna Ws 08 J0 98UU02 SW GM S10joeuuo VIVS 9 vlvs ZINOO EE furent 2 0 950 29 101090000 LINOO T sri xo asn 56 56 lOd N 104290009 101
37. user to configure the following North Bridge parameters gt Boxboro Configuration e NB Revision This item displays the Boxboro IOH revision number gt Intel VT for Direct Configuration This feature allows the user to configure Intel Virtualization Technology for Directed I O settings Intel VT d Select Enabled to enable Intel Virtualization Technology support for Direct I O VT d by reporting the I O device assignments to VMM through the DMAR ACPI Tables This feature offers fully protected I O resource sharing across the Intel platforms providing the user with greater reliability security and availability in networking and data sharing The options are Enabled and Disabled Interrupt Remapping Select Enabled to support VT d Engine Interrupt Remapping The options are Enabled and Disabled Chapter 4 AMI BIOS Coherency Support Select Enabled to enable Non Isoch VT d Engine Coherency support The op tions are Enabled and Disabled ATS Support Select Enabled to enable VT d Engine Address Translation Services support The options are Enabled and Disabled Pass through DMA Select Enabled to enable Isoch Non Isoch VT d Engine Pass through DMA sup port The options are Enabled and Disabled Intel I OAT The Intel I O Acceleration Technology significantly reduces CPU overhead by leveraging CPU architectural improvements freeing resources for more other tasks The options are Disabled and Enabled
38. warnings when the system temperature CPU temperatures voltages and fan speeds go beyond predefined thresholds 2 5 ACPI Features ACPI stands for Advanced Configuration and Power Interface The ACPI specifica tion defines a flexible and abstract hardware interface that provides a standard way to integrate power management features throughout a PC system including its hardware operating system and application software This enables the system to automatically turn on and off peripherals such as CD ROMs network cards hard disk drives and printers In addition to enabling operating system directed power management ACPI also provides a generic system event mechanism for Plug and Play and an operating system independent interface for configuration control ACPI leverages the Plug and Play BIOS data structures while providing a processor architecture independent implementation that is compatible with Windows XP Windows Vista and Windows 2008 Operating Systems Slow Blinking LED for Suspend State Indicator When the CPU goes into a suspend state the chassis power LED will start blinking to indicate that the CPU is in suspend mode When the user presses any key the CPU will wake up and the LED will automatically stop blinking and remain on 2 6 Power Supply As with all computer products a stable power source is necessary for proper and reliable operation It is even more important for processors that have high CPU clock rates Th
39. when a fan failure occurs Refer to the table on right for pin definitions 1 5vDC OH Active OH Fan Fail LED Status State Solid Message Overheat Blinking Fan Fail UD iP E cesses Ur P o SUPER X80BN F Baseboard Rev 1 01 3 o 8 8 3 o CPU Board Slot 2 8 CR JPIT H an an or o E 55 00 ow ami Sew ed EUD WF 33 LAN CTRL y s Slott A TPM Port 80 Head Slot9 PCIE 2 0 x8 er D SER 998 POLE 2 0 x16 e m B Overheat LED LEDS iss Slot7 POLE 2 0 x8 BMC CTRL 7 Slot POLE 2 0 x16 TE EE Soe POE 2018 FEN 04 POLE 20x16 PO Be eatery ETE TE Slot3 POLE 2 0 x8 9 TM ICHIOR ZEE Slot2 POLE 2 0 x8 in x16 e POLE 2 0 x in x16 T o USBi0 USB8 Chapter 3 Installation T SGPIO 1 2 Headers T SGPIO Pin Definitions Two SGPIO Serial Link General Purpose Input Output
40. 0BN F Platform User s Manual Reset Button Reset Button Pin Definitions JF1 The Reset Button connection is located on pins 3 and 4 of JF1 Attach it to a Pin Definition 3 Reset hardware reset switch on the computer me roun case Refer to the table on the right for 4 Ground pin definitions Power Button Power Button Pin Definitions JF1 The Power Button connection is located on pins 1 and 2 of JF1 Momentarily contacting both pins will power on off 1 Signal the system This button can also be con 2 Ground figured to function as a suspend button with a setting in BIOS See Chapter 5 To turn off the power when the system is set to suspend mode press the button for at least 4 seconds Refer to the table on the right for pin definitions Pin Definition A Reset Button B PWR Button o SUPERO X amp OBN F Baseboard Rev 1 01 Groun o o NMI x x FP PWRLED o o 3 3 V HDD LED ID UID SW 3 3V Stby NIC1 Link LED NIC1 Activity LED NIC2 Link LED NIC2 Activity LED EWE Red Blue LED Cathode Power Fail LED 3 3V 3 20 3 8 Connecting Cables Power Connectors Two main power supply connectors JP21
41. 10 eS ami Fun owi 55552 Slot10 PCI 0x16 Tuis 90 PCI E 2 0 x8 Teu SlotBPCLE 2 0 x16 WO Hub 1 T Slot7 PCI E 2 0 x8 51016 PCI E 2 0 x16 Slot PCI E 2 0 x8 PLX PCI Bridge ert Slot4 PCI E 20 x16 1 Slot3 PCI E 2 0 x8 TE 902 PCI E 2 0 x8 in x16 mu PCI E 2 0 x8 in x16 JP22 JIPMB see USB10 EE A Rear UID LED B BMC Heartbeat LED SUPER Platform User s Manual 3 11 Serial ATA Connections Serial ATA Ports There are six Serial ATA Ports l SATAO I SATA5 located on the X8OBN F These ports supported by the Intel ICH10R South Bridge pro vide serial link signal connections which are faster than the connections of Parallel ATA See the table on the right for pin definitions Serial ATA Pin Definitions Pin Definition Ground TX P TX N Ground RX N RX P Ground Note For more information on SATA HostRAID configuration please refer to the Intel SATA HostRAID User s Guide posted on our Website http www supermicro com ES WPT Oraz
42. 790007 85 0 i ru 00101 Syog z WEIS 2072 851 AHd 001 01 Sore OOM NNOO 8 8 91x 19d 495 gt srt 8 8x 91X 810d 2015 gx 8X 8x 0 491 px 63 z 9 aod gx exe d eros x 91X 91x 94d 8101S Kad g 913 91x 810d 015 gx 8X 8 0 gx 91X 91X 819d 015 ex XT gx ex 19d 905 l E 91 91x egg 1905 9979140 9197940 51579190 9901 008 i 1 9901 008 HQG 9901 008 HGG i 9901 008 8 dd HUS TEQ kan ires cea esa bya vago 159 297918 SLOP OTASESN ay er 9900008 9901 0086800 fev eaae S ING LOY S eri 9901 008 ead 1 9901 008 599 1 9901 008 9901 008 55 9901 008 dd 1 9901 008 ERES ZAN sro INS SITO ITWS CEN TS ROC d 9901 008 l 9901 008 804 ean 21979 INS 107900 9901 008 6800 1 9901 008 800 r egaa i 1 990008 JL 990 008 CHOC lousy Tudd gigol Ndo L__ quo cuca 9901008 6900 s 9901 008 6H00 090 8800 ten may Ts indo ondo sry ma e 0 9 8800 9801 008 edd i 9901008 800 EN roy INS 11979140 TTO y9 TI 8L A gt ery 990 008 1 9901 008 rJ Tur 9901 008 600 9901008 HOC Jer vur Feu egal 2901 008 cuad 9901 008 euo cuu 08 TOYS INS TOF TTS oN SO PHOT
43. Bridge parameters SMBus Controller Select Enabled to enable the SMBus System Management Bus controller to im prove system management The options are Enabled and Disabled GbE Controller Select Enabled to enable the Gigabit PCI Express controller to enhance PCI E performance The options are Enabled and Disabled Wake On LAN from S5 Select Enabled to wake up the system when a network device installed in a LAN port receives a signal while the system is in the S5 state The options are Enabled and Disabled eee 5 23 SUPERO Platform User s Manual Restore on AC Power Loss Use this feature to set the power state after a power outage Select Power Off for the system power to remain off after a power outage Select Power On for the system power to be turned on after an outage Select Last State to allow the system to resume its last state before a power loss The options are Power On Power Off and Last State Power Button Function If this item is set to Instant Off the system will power off immediately as soon as the user presses the power button If set to 4 Second Override the system will power off when the user presses the power button for 4 seconds or longer The options are Instant Off and 4 Second Override High precision Event Timer Configuration This feature allows the user to configure the following South Bridge parameters High Precision Event Timer Select Enabled to activate the High Prec
44. C Enable Jumper JPB1 allows you to enable the embedded BMC Baseboard Manage ment Controller to provide IPMI 2 0 KVM support on the motherboard See the table on the right for jumper set tings ME Recovery Close Jumper JPME1 to use ME Firm ware Recovery mode which will limit System resource for essential function ality use only without putting restrictions on power use In single operation mode online upgrade will be available via Re covery mode See the table on the right for jumper settings o SUPER X80BN F Baseboard Rev 1 01 BMC Enable Jumper Settings Jumper Setting Definition Pins 1 2 BMC Enable Pins 2 3 Normal Default ME Recovery Select Jumper Settings Jumper Setting Definition Open Normal Default Closed Manufacture Mode ET CPU amp COMI HEHA in FP CRT o JP18 8 3 0000 0000 spes 9 CPU Board Slot 1 0000 0000 o 0 0 kl B pans z LAN CTRL e D LEDS o A BMC Enabled B ME Mode Se lect
45. Configuration Serial Port Select Enabled to enable a serial port specified by the user The options are Enabled and Disabled Device Settings This feature indicated if reset is required or not for a serial port specified Chapter 4 AMI BIOS Change Settings Use this feature to set the optimal Environment Control Interface PECI setting for a serial port specified The default setting is Auto which will allow the AMI BIOS to automatically select the best setting for the PECI platform Device Mode Use this feature to select the desired mode for a serial port specified The options are Normal and High Speed Serial Port Console Redirection e COM 1 COM2 These two submenus allow the user to configure the following Console Redirection settings for a COM Port specified by the user Console Redirection Select Enabled to use a COM Port selected by the user for Console Redirection The options are Enabled and Disabled Console Redirection Settings This feature allows the user to specify how the host computer will exchange data with the client computer which is the remote computer used by the user Terminal Type This feature allows the user to select the target terminal emulation type for Console Redirection Select VT100 to use the ASCII Character set Select VT100 to add color and function key support Select ANSI to use the Extended ASCII Character Set Select VT UTF8 to use UTF8 encoding to map Unicode charac
46. Current QPI Link Speed This item displays the current Link speed Current QPI Link Frequency This item displays the current QPI Link fre quency CSI Common System Interface Link Speed This feature allows the user to select the speed for CSI Common System Interface Link which is the former name for QPI Link Select Fast for POR Power On Reset related devices The options are Slow and Fast QPI Link Frequency Select This feature allows the user to set the QPI Link Frequency Select Auto for the AMI BIOS to automatically set the QPI Link Frequency for optimal system per formance The options are Auto 4 8 GT s 5 866 GT s and 6 4 GT s CRC Mode Use this feature to enable the CRC Cyclic Redundancy Check mode in CSI and select the method used by the CRC mode to detect any accidental changes to raw computer data occurred in digital networks or storage devices The options are 8 bit CRC and 16 bit Rolling CRC 5 20 Chapter 4 AMI BIOS CSI Common System Interface Scrambling Select Enabled to support CSI data scrambling via 0 10h 11h 0 44h 22 The op tions are Enabled and Disabled Logical Interrupt Mode Use this feature to select the Logical Interrupt mode for the programmable inter rupt controller PIC embedded in a multiple processor system Select Flat mode for the PIC to process interrupts in the linear sequential format Select Cluster Mode for the PIC to process interrupts in the cascade format Th
47. DCA Support Available when Intel I OAT is enabled Select Enabled to use Intel s DCA Direct Cache Access Technology for data transferring enhancement The options are Enabled and Disabled PCle Gen1 Device Support Available when Intel is enabled Select Enabled to support PCI Express Gen 1 devices The options are Enabled and Disabled PCle Port Bifurcation Support This feature displays the following IOH PCle Port Bifurcation Control settings which indicate how PCI Express connections are split into different PCI E signals for various device support e OH1 IOU2 e OH1 IOUO e OH1 IOU1 e OH2 IOU2 e OH2 IOUO e OH2 IOU1 SUPERO X8OBN F Platform User s Manual IOH Thermal Sensors This feature allows the user to configure integrated thermal sensor settings embed ded in the 7500 chipset Thermal Sensors Select Enabled to enable integrated thermal sensors embedded in the 7500 chipset The options are Enabled and Disabled ow Threshold This item displays the value of the low thermal threshold High Threshold This item displays the value of the high thermal threshold e Catastrophe Threshold This item displays the value of the catastrophic thresh old beyond which the system enters into the catastrophic state gt Link QuickPath Interconnect is the connection between the processors and the hubs IOH s This submenu allows the user to configure the following QPI settings e
48. DWARE SOFTWARE OR DATA Any disputes arising between the manufacturer and the customer shall be governed by the laws of Santa Clara County in the State of California USA The State of California County of Santa Clara shall be the exclusive venue for the resolution of any such disputes Supermicro s total liability for all claims will not exceed the price paid for the hardware product FCC Statement This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the manufacturer s instruction manual may cause harmful interference with radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case you will be required to correct the interference at your own expense California Best Management Practices Regulations for Perchlorate Materials This Perchlorate warning applies only to products containing CR Manganese Dioxide Lithium coin cells Perchlorate Material special handling may apply See www dtsc ca gov hazardouswaste perchlorate WARNING Handling of lead solder materials used in this product may expose you to lead a chemical known to t
49. E A Clear CMOS SUPER6 X80BN F Baseboard Watch Dog Enable o CPU Board Slot 3 H JP18 o JP17 _ o o wl od se ard Slot 1 95 e 7 e 7 90 PCI E 2 0 x8 WO Hub 2 Tees 908 PCI E 2 0 x16 e o WO Hub 1 SEE Slot7 PCI E 2 0 x8 BMC CTRL se Slot6 PCI E 2 0 x16 Eras JP22 2 Slot5 PGE 2 058 PLX in 5o ms SEES SM POLE 20x16 PCI Bridge Battery H JPWRA NETI aTe BEE sosrcre208 A FM IcHIOR Slot POLE 2 0 x8 in x16 e sesso 61011 PCI E 2 0 x8 in x16 JIPMBY2 USB8 f B INE JPWR1 USB10 bed SUPER Platform User s Manual VGA Enable VGA Enable Jumper Settings Jumper JPG1 allows the user to enable Jumper Setting Definition the onboard VGA connector The default ne 1 2 Enabled Default setting is 1 2 to enable the connection 2 3 Disabled See the table on the right for jumper setting
50. E device to use the 8 bit Tag field as a requester The options are Enabled and Disabled No Snoop Select Enabled to enable the no_snoop bit for a PCI E device which will reduce front_side bus traffic for performance enhancement The options are Enabled and Disabled 5 5 SUPERO X8OBN F Platform User s Manual Maximum Payload Select Auto to allow the system BIOS to automatically set the maximum payload value for a PCI E device to enhance system performance The options are Auto 128 Bytes 256 Bytes 512 Bytes 1024 Bytes 2048 Bytes and 4096 Bytes Maximum Read Request Select Auto to allow the system BIOS to automatically set the maximum Read Request size for a PCI E device to enhance system performance The options are Auto 128 Bytes 256 Bytes 512 Bytes 1024 Bytes 2048 Bytes and 4096 Bytes ASPM Support This feature allows the user to set the Active State Power Management ASPM level for a PCI E device Select Force LO to force all PCI E links to operate at LO state Select Auto to allow the system BIOS to automatically set the ASPM level for the system Select Disabled to disable ASPM support The options are Disabled Force LO and Auto A Warning Enabling ASPM support may cause some PCI E devices to fail Extended Synch Select Enabled to generate extended synchronization patters to enhance system performance The options are Disabled and Enabled gt Advanced Configuration and Power Interface
51. Installation RDIMM Support POR on the 7500 Series Processor Platform DIMM Slots DIMMs RDIMM Type POR Speeds in Ranks per DIMM per DDR Populated RDIMM Reg MHz Any Combination Channel per DDR Registered Channel Reg ECC DDR3 800 978 1066 SR DR or QR Note Refer to the notes below for memory population instructions Memory Capacity Maximum Memory 4Gb DRAM Possible 8S Single Rank RDIMMs 512 GB 64 x 8GB DIMMs Dual Rank RDIMMs 1024 GB 64 x 16GB DIMMs Notes Populate DIMMs starting with DIMM1A For the memory modules to work properly please install DIMM modules in pairs with even number of DIMMs installed All channels in a system will run at the fastest common frequency 3 9 SUPER X80BN F Platform User s Manual 3 7 Control Panel Connectors I O Ports The ports are color coded in conformance with the PC 99 specification See the picture below for the colors and locations of the various I O ports Back Panel Connectors I O Ports aa og eL Se 60 CoH Hime Back Panel I O Port Locations and Definitions 1 Keyboard 2 Mouse 3 Back Panel USB
52. N F Baseboard Layout ES SEF 2 SUPERO X80BN F Baseboard RE UE 0 le Rev 1 01 2 T Q o CPU Board Slot 3 i SE ln eo 8959588 355595 Slot10 PCI E 2 0 x16 388888 Slot9 PCI E 2 0 x8 L aka VO Hub 2 SE Slot8 PCI E 2 0 x16 VO Hub 1 LED4 Lus St PCIE 20x8 859995 51016 PCI E 2 0 x16 8 cu Qo JP22 EHI 35995 51015 PCI E 2 0 x8 E oo amp oo PLX a 5 559955 Slot4 PCI E 2 0 x16 PCI Bridge o Battery j _ BT1 Fagin JBT1 522 Slot3 PCI E 2 0 x8 JPME1 om ICHIOR g 359333 Slot2 PCI E 2 0 x8 in x16 a Buzzer jen JWF1 Eo e 233332 Slot PCI E 2 0 x8 in x16 JIPMBJI S Ez SATA5 SATA3 l USB10 USB8 G a 5 Ooo nofo 888 SESI SATA o Note Due to PCI E auto switching please follow the instructions below e For PCI E 2 0 Slot 10 and Slot 9 nstall Slot
53. NIC2 Activity LED Blue OH Fan Fail PWR FaiL UID LED Power Fail LED 3 17 SUPER Platform User s Manual HDD LED HDD LED Pin Definitions JF1 The HDD LED connection is located on pins 13 and 14 of JF1 Attach a cable here to indicate HDD activ ity See the table on the right for pin definitions Pin Definition 13 3 3V Standby HD Active NIC1 NIC2 LED Indicators The NIC Network Interface Control ler LED connection for GLAN port 1 is located on pins 11 and 12 of JF1 and the LED connection for GLAN Port 2 is on Pins 9 and 10 Attach the NIC LED cables to display network activity Refer to the table on the right for pin definitions GLAN1 2 LED Pin Definitions JF1 Pin Definition 9 NIC 2 Activity LED 10 NIC 2 Link LED 11 NIC 1 Activity LED 12 NIC 1 Link LED A HDD LED B NIC1 Link LED C NIC1 Activity LED D NIC2 Link LED E NIC2 Activity LED X FP PWRLED o o 3 3 V Gio LED Link LED NIC2 Link LED Blue OH Fan Fail PWR FaiL UID LED Power Fail LED 3 3V lE ano 03 NIC1 Activity LED NIC2 Activity LED 3 18 Chapter 3 Installa
54. Port 0 4 Back Panel USB Port 1 5 PMI Dedicated LAN 6 5 8 9 1 COM Port 1 Turquoise VGA Blue Gigabit LAN 1 Gigabit LAN 2 0 UID Switch 3 10 The ATX PS 2 keyboard and PS 2 mouse are located next to the Back Panel USB Ports 0 1 on the base board See the table at right for pin definitions PS2 Keyboard Chapter 3 Installation ATX PS 2 Keyboard and PS 2 PS 2 Keyboard Mouse Pin Mouse Ports Definitions Pin Definition KB Data No Connection Ground Mouse KB VCC 5V KB Clock 5 No Connection 6 VCC with 1 5A PTC current limit j BOr SUPER X80BN F Baseboard j ot ogg Rev 1 01 ji li o 1 Keyboard 2 Mouse PS2 Mouse Definition Mouse Data No Connection Ground Mouse KB VCC 45V Mouse Clock No Connection RII 3 11 oe eo SUPER Platform User s Manual Universal Serial Bus USB Backplane USB FP USB 2 3 4 5 0 1 Pin Definitions Pin Definitions USB 2 4 8 10 USB 3 5 Pin Definition mn 1 5V 1 PO 2 PO 3 Ground 4 NC NC No connection Two Universal Serial Bus ports
55. Promde TCP IP connectivity Power control zi Note SD Software Revision 1 0 can be downloaded from our Web f site at ftp ftp Supermicro com utility Supero_Doctor_Ill You can also download SDIII User s Guide at http www supermicro com PRODUCT Manuals SDIII UserGuide pdf For Linux we will still recommend that you use Supero Doctor Il gt 3 SUPER X8OBN F Platform User s Manual Notes B 4 Disclaimer Continued The products sold by Supermicro are not intended for and will not be used in life support systems medical equipment nuclear facilities or systems aircraft aircraft devices aircraft emergency communication devices or other critical systems whose failure to perform be reasonably expected to result in significant injury or loss of life or catastrophic property damage Accordingly Supermicro disclaims any and all liability and should buyer use or sell such products for use in such ultra hazardous applications it does so entirely at its own risk Furthermore buyer agrees to fully indemnify defend and hold Supermicro harmless for and against any and all claims demands actions litigation and proceedings of any kind arising out of or related to such ultra hazardous use or sale
56. RREUR 2 15 2 6 Power Supply emer an ree ve er Ee Te en eka kaka kk kaka ka kk KAKA kK KA HA KA KA KA KA WA 2 15 UE erc RA lay 2 16 2 8 Overview of the Nuvoton WPCMASOR Controller 2 16 Chapter 3 Installation nHEME 00 01 0 328 1102 Rm 3 1 S2 Populating tne GPL BOSE eb Da a 3 2 Installing a CPU on the CPU BOSE aeria eter Ek kk kek 3 2 installing the CPU Heatsink on the CPU 3 3 Installing Memory Modules on the CPU Board 3 4 Removing Memory Modules unten KA KAR 3 4 3 3 Installing the Baseboard into the Chassis eerie EEE 3 5 3 4 Installing the Populated CPU Board on the 3 6 vi Table of Contents 3 5 3 6 3 7 3 8 3 9 Installing the Bridge Card between the CPU 3 7 Memory Support for the X8OBN F Platform EE 3 8 Control Panel Connectors l O POLIS Debatte nee ede 3 10 Back Panel Connectors I O Ports s5 ss six sli a llkil dikn xan xaki sansirnir 3 10 Back Panel I O Port Locations and Definitions 3 10 ATX PS 2 Keyboard and PS 2 Mouse 3 11 Universal Senal Bus USB ekna 3 12
57. SUPERO SUPERO X8OBN F Platform with X8OBN F Baseboard X8OBN CPU CPU Board X8OBN BH1 Bridge Card USER S MANUAL Revision 1 0b The information in this User s Manual has been carefully reviewed and is believed to be accurate The vendor assumes no responsibility for any inaccuracies that may be contained in this document and makes no commitment to update or to keep current the information in this manual or to notify any person or organization of the updates Please Note For the most up to date version of this manual please see our Website at www supermicro com Super Micro Computer Inc Supermicro reserves the right to make changes to the product described in this manual at any time and without notice This product including software and docu mentation is the property of Supermicro and or its licensors and is supplied only under a license Any use or reproduction of this product is not allowed except as expressly permitted by the terms of said license IN NO EVENT WILL SUPER MICRO COMPUTER INC BE LIABLE FOR DIRECT INDIRECT SPECIAL INCIDENTAL SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES IN PARTICULAR SUPER MICRO COMPUTER INC SHALL NOT HAVE LIABILITY FOR ANY HARDWARE SOFTWARE OR DATA STORED OR USED WITH THE PRODUCT INCLUDING THE COSTS OF REPAIRING REPLACING INTEGRATING INSTALLING OR RECOVERING SUCH HAR
58. Slot7 PCIE 2 0 x8 A Internal Buzzer B PWR LED Speaker Ses Slot6 PCI E 20 x16 1 1 Slot PCI E 2 0 x8 PLX Suis Slot PCI E 2 0 x16 PCI Bridge 005 908 PCI E 2 0 x8 om 1 Slot2 PCI E 2 0 x8 in x16 Slott PCIE 2 0 x8 in x16 Visa o 05810 USB8 G feee 3 23 SUPER X80BN F Platform User s Manual TPM Header Port 80 TPM Port 80 Header Pin Definitions A Trusted Platform Module Port 80 Pin Definition Pin Definition header is located at JTPM1 to provide WAT 1 LCLK 2 GND TPM and Port 80 support which will i d 3 LFRAME 4 lt KEY gt enhance system performance an le 45V 09 dala Secu pee the table on the cane right for pin definitions 7 P a N 11 LADO 12 13 SMB CLK4 14 SMB_DAT4 15 3V_DUAL 16 SERIRQ 17 GND 18 CLKRUN X 19 LPCPD 20 LDRQ X Overheat LED Pin Definitions Overheat LED Fan Fail Pin Definition The JOH1 header is used to connect an LED indicator to provide warnings of chassis overheating or fan failure This LED will blink
59. able Turbo Mode support to boost system performance The options are Enabled and Disabled P STATE Coordination This feature allows the user to decide how to change a P State Coordination type A P state is the operational state when a processor core is performing meaningful and useful tasks The options are HW AII All Hardware related events SW AII All Software related events and SW Any Any Software related events CPU C3 Report Available when the C State Tech is enabled This feature allows the user to decide at what power state should the CPU treat it as a CPU C3 state and report it to the OS as so Select ACPI C 2 to report an ACPI C 2 event as a CPU C3 event to the OS Select ACPI C 3 to report an ACPI C 3 event as a CPU C3 event to the OS The options are ACPI C2 ACPI C 3 and Disabled Package C State Limit Available when the C State Tech is enabled If this package is set to Auto the AMI BIOS will automatically set a limit on the reg ister of the C State package The options are No Limit CO C1 C3 C6 and C7 gt Runtime Error Logging Runtime Error Logging Select Enabled to support Runtime Error Logging The options are Enabled and Disabled If this feature is set to Enabled the following items will display PCI Error Logging Support Select Enabled to enable error logging occurred in PCI PCI E connections The Enahled and Disabled 5 10 Chapter 4 AMI BIOS Memory Correctable Error Threshold This f
60. age to the system In no event shall Supermicro be liable for direct indirect special incidental or consequential damages arising from a BIOS update If you have to update the BIOS do not shut down or reset the system while the BIOS is updating This is to avoid possible boot failure 5 2 Main Setup When you first enter the AMI BIOS Setup Utility you will enter the Main setup screen You can always return to the Main setup screen by selecting the Main tab on the top of the screen The Main BIOS Setup screen is shown below Aptio Setup Utility Copyright C 2009 American Megatrends Inc System Language English BIOS Information The following BIOS information will be displayed BIOS Vendor This item displays the name of the BIOS vendor Core Version This item displays the version of the BIOS Core currently used in the system Project Version This item displays the version of the mainboard currently used in the system 5 2 Chapter 4 AMI BIOS Build Date This item displays the date when this BIOS was completed Memory Information The following memory information will be displayed e Total Memory This item displays the size of memory available in the system System Language The feature allows the user to select a language setting for the Setup utility The default setting is English System Time System Date These features allow the user to change the system time and date Highlight System Ti
61. alling any hardware components Before Power On 1 Make sure that there are no short circuits between the baseboard and chas sis 2 Disconnect all ribbon wire cables from the baseboard including those for the keyboard and mouse 3 Remove all add on cards 4 Install CPU Card1 first making sure it is fully seated and connect the front panel connectors to the baseboard No Power 1 Make sure that no short circuits between the baseboard and the chassis 2 Make sure that the ATX power connectors are properly connected 3 Check that the 115V 230V switch on the power supply is properly set if avail able 4 Turn the power switch on and off to test the system if applicable 5 The battery on your baseboard may be old Check to verify that it still sup plies 3VDC If it does not replace it with a new one 4 1 SUPER Platform User s Manual No Video If the power is on but you have no video remove all the add on cards and cables Use the speaker to determine if any beep codes exist Refer to the Appendix for details on beep codes System Boot Failure If the system does not display POST or does not respond after the power is turned on check the following 1 Check for error beep from the baseboard speaker If there is no error beep try to turn on the system without DIMM modules If there is still no error beep try to turn on the system again with only one processor in CPU So
62. and Local Management tools The local management is called the SD Client The Supero Doctor III program included on the CDROM that came with your baseboard allows you to monitor the environment and operations of your system Supero Doctor III displays crucial sys tem information such as CPU temperature system voltages and fan status See the Figure below for a display of the Supero Doctor III interface Note 1 The default user name and password are ADMIN Note 2 In the Windows OS environment the Supero Doctor Ill settings take precedence over the BIOS settings When first installed Supero Doc tor Ill adopts the temperature threshold settings previously set in BIOS Any subsequent changes to these thresholds must be made within Supero Doc tor since the SD settings override the BIOS settings For the Windows OS to adopt the BIOS temperature threshold settings please change the settings to be the same as those set in BIOS Supero Doctor Ill Interface Display 1 Health Information B 2 Appendix B Software Installation Instructions Supero Doctor Interface Display Screen Il Remote Control Graceful power control Supero Doctor atiymi a user to adiom the OS to reboot ec shut down within a specdied tim the defia is 30 seconds Before the reboots or sints down it s alowed to cancel the action Requirements Keep Supero SD3Serece Daemen mnang at all timas on thos system
63. anel Overheat LED and make sure that the Overheat LED is not on Adequate power supply Make sure that the power supply provides adequate power to the system Make sure that all power connectors are connected Please refer to our Website for more information on minimum power require ment 6 Proper software support Make sure that the correct drivers are used B When the system becomes unstable before or during OS installation check the following 1 4 2 Source of installation Make sure that the devices used for installation are working properly including boot devices such as CD DVD disc CD DVD ROM Cable connection Check to make sure that all cables are connected and working properly Using minimum configuration for troubleshooting Remove all unnecessary components starting with add on cards first and use minimum configuration with a CPU and a memory module installed to identify the trouble areas Refer to the steps listed in Section A above for proper troubleshooting proce dures Identifying bad components by isolating them If necessary remove a compo nent in question from the chassis and test it in isolation to make sure that it works properly Replace a bad component with a good one Check and change one component at a time instead of changing several items at the same time This will help isolating and identifying the problem To find out if a component is good swap it with a new one to see if the syste
64. asing Settings This feature allows the user to decide when to erase a System Event Log Erase SEL Select Yes to erase all System Event Logs The options are Yes and No When SEL is Full This feature allows the user to decide what the system shall do when the System Event Log is full This feature is not available when the FRB 2 Timer is disabled The options are Do Nothing Power Down and Reset Custom EFI Logging Options Use this feature to customize the settings of Extensible Firmware Interface EFI Logging between an operation system and the system platform firmware Log EFI Status Codes Select Both to record the microcodes for both OS and the system platform firmware during EFI logging The default setting is Both Note Be sure to reboot the computer for all the changes on the setting indicated above to take effect 5 26 Chapter 4 AMI BIOS gt BMC Network Configuration Use this feature to configure BMC Baseboard Management Controller Network settings LAN Channel 1 LAN Channel 2 Configuration Source Use this feature to select the source or the parameter of an IP address for the LAN channel specified by the user If Static is selected you will need to know and manually enter the IP address for the LAN channel specified If DHCP is selected BIOS will search for a DHCP Dynamic Host Configuration Protocol server in the network it is attached to and request the next available IP address If Do Nothing
65. ation of JUmDerS aC ree ere I 3 26 GLAN Enable Disable 3 26 GMOS Cleat ES 3 27 Watch Dog Enable Disable A 3 27 VGA NE n Dd rr 3 28 TPM Support Enable cnn adir Nak nn sakera nm s rek slran 3 28 S EINE EET 3 29 SUPERO X8OBN F Platform User s Manual M R GOVO a C 3 29 Manufacturer Mode niba nnn kk zan 3 30 JUID UID_Overwriting E 3 30 BMO csc 3 31 3 10 Onpoard LED UTE 3 32 GLAN LEDS ERE 3 32 IPMI Dedieated LAN LE 8 3 32 Real BED is DP 3 33 BMG Heanbeat E Di xu Kunc arr k n K R E 3 33 9 11 Serial ATA ConneGllOS ad oo op k kla ke bena 3 34 Chapter 4 Troubleshooting 4 1 Troubleshooting Procedures 4 1 4 2 Technical Support Procedures isc in nian kk kk kk 4 4 4 3 Frequently Asked Questions EEE EEE kk kk ER k KAKA 4 5 4 4 Returning Merchandise for Service cssscceeeeeeeeeeeseeeeeeeeseeeeeeeseeseneeees 4 6 Chapter 5 BIOS 5 1 pe ee RON 5 1 5 2 eee re ere ere 5 2 5 3 Advanced Setup Configuration u ten date ddr ae io eee kk 5 4 OC msi o anne aa mna da c e eT ee
66. ccompany it Note the AMI BIOS has default text messages built in Supermicro retains the option to include omit or change any of these text messages The AMI BIOS Setup Utility uses a key based navigation system called hot keys Most of the AMI BIOS setup utility hot keys can be used at any time during the setup navigation process These keys include F1 lt F10 gt Enter lt ESC gt ar row keys etc J Note Options printed in Bold are default settings How To Change the Configuration Data The configuration data that determines the system parameters may be changed by entering the AMI BIOS Setup Utility This setup utility can be accessed by pressing Del at the appropriate time during system boot Note For AMI BIOS Recovery please refer to the AMI BIOS Recovery Instructions posted on our website at http www supermicro com support manuals 5 1 SUPERO X8OBN F Platform User s Manual Starting the Setup Utility Normally the only visible Power On Self Test POST routine is the memory test As the memory is being tested press the Delete key to enter the main menu of the AMI BIOS Setup Utility From the main menu you can access the other setup screens An AMI BIOS identification string is displayed at the left bottom corner of the screen below the copyright message Warning Do not upgrade the BIOS unless your system has a BIOS related Ak Flashing the wrong BIOS can cause irreparable dam
67. cket 1 If there is still no error beep replace the baseboard If there are error beeps clear the CMOS settings by unplugging the power cord and contracting both pads on the CMOS Clear Jumper JBT1 Refer to Section 3 7 in Chapter 3 Remove all components from the baseboard especially the DIMM modules Make sure that the system s power is on and memory error beeps are acti vated Turn on the system with only one DIMM module If the system boots check for bad DIMM modules or slots by following the Memory Errors Troubleshoot ing procedure in this Chapter Losing the System s Setup Configuration Make sure that you are using a high quality power supply A poor quality power supply may cause the system to lose the CMOS setup information Refer to Section 3 6 for details on recommended power supplies The battery on your baseboard may be old Check to verify that it still sup plies 3VDC If it does not replace it with a new one If the above steps do not fix the Setup Configuration problem contact your vendor for repairs 4 2 Chapter 4 Troubleshooting Memory Errors When No Memory Beep Code is issued by the system check the following 1 Make sure that the memory modules are compatible with the system and that the DIMM modules are properly and fully installed For memory compatibility refer to the Memory Compatibility Chart posted on our Website at http www supermicro com Check if different speeds o
68. d in the system The options are Legacy ROM and EFI Extensible Firmware Interface Compatible ROM Chapter 4 AMI BIOS Above 4G Decoding Select Enabled to allow 64 bit capable device to be decoded in the address space above 4G if 64 bit PCI decoding is supported by the system The options are Enabled and Disabled PCI Common Settings PCI Latency Timer Select a value to be used by the PCI Latency Timer Register in bus clock calculation The options are 32 PCI Bus Clocks 64 PCI Bus Clocks 96 PCI Bus Clocks 128 PCI Bus Clocks 160 PCI Bus Clocks 192 PCI Bus Clocks 224 PCI Bus Clocks and 248 PCI Bus Clocks VGA Palette Snoop If this feature is set to Enabled a PCI card that does not have its own VGA color palette built in will detect a video_card palette to mimic it for color scheme support The options are Enabled and Disabled PERR Generation Select Enabled to allow a device to generate PERR number for a PCI Bus Signal Error Event The options are Enabled and Disabled SERR Generation Select Enabled to allow PCI device to generate an SERR number for a PCI Bus Signal Error Event The options are Enabled and Disabled PCI Express Device Settings Relaxed Ordering Select Enabled to allow a PCI E transaction to be completed prior to other transac tions that were already enqueued This violates PCI strict ordering rules The options are Enabled and Disabled Extended Tag Select Enabled to allow a PCI
69. e X8OBN F baseboard includes two main system power connectors JP21 22 four HDD power connectors JP16 JP19 four GPU Power connectors JPWR1 4 and a SATA DOM power connector JWF1 Please connect these power connectors to the power supply to provide adequate power to the components and the system Also your power supply must supply 1 5A for the Ethernet ports Warning avoid damaging the power supply or the system be sure to connect the Main Power connectors and other power connectors as required to the power supply Failure to do so will void the manufacturer warranty on your power supply and the board 2 15 SUPER Platform User s Manual It is strongly recommended that you use a high quality power supply that meets the ATX power supply Specification 2 02 or above It must also be SSI compliant For more information please refer to the website at http www ssiforum org Addition ally in areas where noisy power transmission is present you may choose to install a line filter to shield the computer from noise It is recommended that you also install a power surge protector to help avoid problems caused by power surges 2 7 Super I O The Super I O provides functions that comply with ACPI Advanced Configuration and Power Interface which includes support of legacy and ACPI power manage ment through an SMI or SCI function pin It also features auto power management to reduce power consumption 2 8 Ov
70. e options are Flat Mode and Cluster Mode Cluster Mode Check Sampling Select Enabled for a system to check the APIC ID for non zero APIC ID is used to identify a processor in multi processor systems The options are Enabled and Disabled MMIOH Size per IOH Use this feature to select the MMIOH Size to be allocated to every IOH in the system The options are 2G 4G 6G and 8G Intel reference Code This item displays Intel Reference code for the system Memory Information The item displays the following memory information e Total Memory This item displays the total memory available in the sys tem e Current Memory Mode This item displays the current memory mode used in the system Current Memory Speed This item displays the current memory speed of the system Mirroring This item indicates if memory mirroring is supported by the system for data security enhancement Sparing This item indicates if memory sparing is supported by the system for memory performance enhancement Memory Configuration This feature allows the user to configure the following memory settings 5 21 SUPERO X8OBN F Platform User s Manual Memory Init mode Select Serial to set the memory initialization mode to Serial Select Parallel to set the memory initialization mode to Parallel The options are Serial and Parallel Page Policy This feature allows the user to select the memory page policy for virtual memory support S
71. eature allows the user to enter the threshold value for memory correctable errors The default setting is 10 gt SATA Configuration When this submenu is selected the AMI BIOS automatically detects the presence of the SATA devices and displays the following items e SATA PortO SATA Port1 SATA Port2 SATA Port3 SATA Port4 SATA Port5 SATA Mode Use this feature to set the SATA mode for a SATA port selected by the user Select IDE mode to configure the SATA drive as an IDE drive Select AHCI Mode to enable the SATA drive to support AHCI Interface Advanced Host Controller Interface Select RAID Mode to enable the SATA drive for RAID support The options are IDE Mode AHCI Mode and RAID Mode When AHCI is selected the item AHCI CodeBase will display AHCI CodeBase Available when RAID or AHCI is selected Select BIOS Native Module to use the BIOS Native Mode for the AHCI Interface Select Intel AHCI ROM to use the Intel AHCI ROM for the AHCI Interface Take caution when using this function for this mode is for advanced programmers only When RAID is selected the items AHCI CodeBase above and ICH RAID Code Base will appear ICH RAID Code Base Available when the option RAID is selected Select Intel to use Intel SATA RAID firmware for Intel SATA RAID configuration Select Adaptec to use Adaptec firmware for Adaptec SATA RAID configuration The options are Intel and Adaptec SATA Port0 Configuration SATA Porti Configuratio
72. ect Enabled to enable the USB port specified by the user for USB communica tion The options are Enabled and Disabled 5 5 Server Management This section allows the user to configure Server Management settings Aptio Setup Utility Copyright 2009 American Megatrends Inc BMC Support Enable BMC Support Select Enabled to enable the Baseboard Management Controller The options are Enabled and Disabled FRB 2 Timer Select Enabled to support the Fault_Resilient_Booting Level 2 FRB 2 Timer which will allow the system to recover a boot failure from a watch dog timeout during POST The options are Enabled and Disabled 5 25 SUPERO X8OBN F Platform User s Manual FRB 2 Timer Timeout This feature allows the user to select the timeout value between 3 minutes to 6 minutes for an FRB 2 Timer beyond which the activities in an FRB 2 timer will be terminated The options are 3 Minutes 4 Minutes 5 Minutes and 6 Minutes FRB 2 Timer Policy This feature allows the user to decide how the system shall respond after an FRB 2 timeout This feature is not available when the FRB 2 Timer is disabled The options are Do Nothing Power Down and Reset P System Event Log Enabling Disabling Options Use this feature to enable or disable the following System Event Log SEL set tings SEL Components Select Enabled to support all features of System Event Logging SEL during bootup The options are Enabled and Disabled Er
73. ection SDDC Flow through CRC Cyclic Redundancy Check parity protection out of band register access via SMBus and memory mirroring for data integrity Main Features of the 7500 Platform Fully connectivity with four Intel QuickPath Interconnects and up to ten cores in each socket with 24MB of shared last level L3 cache supported e CPU Integrated memory controller with support of DDR 3 1066 MHz RDIMMS running at 800 978 1066 MHz via a memory buffer e Virtualization Technology 44 bits physical address and 48 bits virtual address supported SUPER X80BN F Platform User s Manual 2 3 Special Features Recovery from AC Power Loss Basic System BIOS provides a setting for you to determine how the system will respond when AC power is lost and then restored to the system You can choose for the system to remain powered off in which case you must press the power switch to turn it back on or for it to automatically return to a power on state See the Advanced BIOS Setup section to change this setting The default setting is Last State 2 4 PC Health Monitoring This section describes the PC health monitoring features of the board This platform has five onboard System Hardware Monitor chips that provide PC health monitoring An onboard voltage monitor will scan these onboard voltages continuously CPU Vcore up to 8 CPUs IOH1 Vcore IOH2 Vcore 3 3VDD 3 3VSB P3V3 P3V3_ AUX 12V 5V Memory Voltage and Battery
74. ecure the baseboard to the chassis lt Motherboard Stand off L T Chassis Chassis 3 5 SUPER X80BN F Platform User s Manual 3 4 Installing the Populated CPU Board on the Baseboard CPU Slot4 CPU Slot3 CPU Slot2 CPU Slot1 Note Be sure to install the CPU board to the CPU board plate before installing any components to the CPU board See Chapter 1 After processors memory modules and heatsinks are installed on the CPU board and the baseboard is installed in the chassis you can install the CPU board onto the baseboard Follow the instructions below to install the CPU board onto the baseboard 1 Locate the CPU board slots on the X8OBN Baseboard Four CPU board slots are available on the baseboard 2 Align the pins on a CPU board against the receptive points of the CPU board slot on the baseboard Once they are aligned press the CPU Board straight down to the baseboard until it is fully seated on the baseboard A Warning To avoid damaging the CPU or CPU board do not touch any components on the CPU board when installing it Also be sure that the CPU board is fully seated on the CPU board slot Install Popu
75. een applied to the heatsink 2 Place the heatsink on top of the CPU so that the two mounting holes on the heatsink are aligned with those on the retention mechanism 3 Insert two push pins on the sides of the heatsink through the mounting holes on the motherboard and turn the push pins clockwise to lock them Note Reverse the steps indicated above to remove the heatsink from f the CPU Board 3 3 SUPER Platform User s Manual Installing Memory Modules on the CPU Board Notes 1 Be sure to install the CPU board to the CPU board plate before installing any components to the CPU board See Chapter 1 2 Check Supermicro s website for recommended memory modules CAUTION Exercise extreme care when installing or removing DIMM modules to prevent any possible damage jx SUPEReXBOBN CPU P2OWNEAD E E Erd T m k r n miram amo ax n uni 1 Insert the desired number of DIMMs into the memory slots starting with P1 DIMM 1A For best performance please use the memory modules of the same type and the same speed in the same bank 2 Push the release tabs outwards on both ends of the DIMM slot to unlock it 3 Align the key of the DIMM module with the receptive point on the memory slot 4 Align the notches on both ends of the module with the receptive points on the ends of the slot 5 Use two thumbs toge
76. elect Open for a memory control unit to issue a command to open a memory page Select Closed for the memory control unit to issue a command to close a memory page Select Adaptive to provide a flexible page policy to better support each individual event Select Multi Cas Widget to simultaneously provide memory support to multiple users in a multi casting format The options are Closed Open Adaptive and Muliti Cas Widget Mapping Policy This feature allows the user to set the policy for memory mapping which is a file used by the virtual memory system of the OS to access the data in the file system directly instead of accessing the contents stored in a file one piece at a time to improve I O performance The options are Closed and Open Scheduler Policy This feature allows the user to set the policy for memory scheduling for dynamic RAM accessing The options are Adaptive Static Trade Off Static Read Primary and Static Write Primary NUMA Select Enabled to enable Non Uniform Memory Access support to improve CPU performance The options are Enabled and Disabled DDR Speed This feature allows the user to set a speed for onboard DDR modules Select Auto for the AMI BIOS to set the DDR speed based on the DDR specifications detected in the system The options are Enabled and Disabled High Temperature Select Enabled for high temperature support for onboard memory modules The options are Enabled and Disabled Hemisphere Select Enabled fo
77. em Cooling Fan Headers Fan1 Fan2 Fan9 Fan 12 Four 4 pin CPU Board Fan Headers Fan3 Fan6 Onboard Battery See Chpt 4 for Used Battery Disposal Internal Buzzer CPU Board Slots 1 4 for CPU boards COM Serial Connections Intel SB SATA Connectors 0 5 Speaker Power LED Indicator Front Panel Control Header 4 pin External BMC I C Header for an IPMI Chassis Intrusion Overheat Fan Fail LED HDD Power Connectors See Warning on Pg 2 8 Main Power supply Connectors JP22 PWR1 JP21 PWR2 See Warning on Pg 2 8 8 Pin GPU Power Connectors Warning on Pg 2 8 TPM Trusted Platform Module Port 80 Header SATA DOM Device On Module Power Connector See Warning on Pg 2 8 Keyboard Mouse Connections of SUPER Platform User s Manual LAN1 LAN2 G bit Ethernet Ports 1 2 IPMI LAN IPMI Dedicated LAN PCI E 2 0 x8 PCI Express 2 0 x8 Slots Slot3 Slot5 Slot7 Slot9 See Note on P 2 6 PCI E 2 0 x8 in x16 PCI Express 2 0 x8 in x16 Slots Slot1 Slot2 See Note on P 2 6 PCI E 2 0 x16 PCI Express 2 0 x16 Slots Slot4 Slot6 Slot8 Slot10 Note on P 2 6 T SGPIO 1 2 Serial Link General Purpose I O Headers USB 0 1 Back Panel USB 0 1 USB 2 3 USB 4 5 Front Panel Accessible USB Connections USB 8 USB 10 UID Switch UID Unit Identifier Switch VGA Backpanel VGA Port X8OBN F LED Indicators LED Description State Status LED4 BMC Heartbeat LED Green Blinking Normal Blue On Wind
78. emoved Send your baseboard back to our RMA Department at Supermicro for repair For BIOS Recovery instructions please refer to the AMI BIOS Recovery Instructions posted at http www supermicro com Question What s on the CD that came with my baseboard Answer The supplied compact disc has quite a few drivers and programs that will greatly enhance your system performance We recommend that you review the CD and install the applications you need Applications on the CD include chipset drivers for the Windows OS security and audio drivers Question How do handle the used battery Answer Please handle used batteries carefully Do not damage the battery in any way a damaged battery may release hazardous materials into the environment Do not discard a used battery in the garbage or a public landfill Please comply with the regulations set up by your local hazardous waste management agency to dispose of your used battery properly 4 4 Returning Merchandise for Service A receipt or copy of your invoice marked with the date of purchase is required be fore any warranty service will be rendered You can obtain service by calling your vendor for a Returned Merchandise Authorization RMA number When returning to the manufacturer the RMA number should be prominently displayed on the outside of the shipping carton and mailed prepaid or hand carried Shipping and handling charges will be applied for all orders that must be mailed when service
79. er s Manual 1 8 Installing the Bridge Card between the CPU Boards Once you ve installed the CPU boards on the baseboard you can install the X8OBN BRI Bridge card on the CPU boards If only one CPU board is installed on the baseboard please skip this step Note A Bridge card is needed to connect the pair s of the CPU boards installed on 510 amp Slot2 and or Slot3 amp Slot4 There is no Bridge card needed between Slot2 and Slot3 Refer to the table below for details CPU Board CPU Board CPU Board CPU Board X80BN BRI Bridge Card to be Installed Installed on Installed on Installed on Installed on Slot1 Slot2 Slot3 Slot4 Not Needed One card needed between Slot1 amp Slot2 One card needed between Slot1 amp Slot2 One card needed between Slot1 amp Slot2 Another card needed between Slot3 amp Slot4 To install the Bridge card between the CPU boards follow the steps below A Place the Bridge card on top of the CPU boards making sure that the Bridge card properly rests on both CPU boards B Insert four screws on the Bridge card to secure it on the CPU boards X80BN BR1 Bridge Card To Connect to the CPU Board Two Bridge Cards Chapter 1 Quick Installation Guide 1 9 Installing Internal Peripherals Q SATA Drives 9 Add on Cards 1 10 Installing External Peripherals ES pj COM1 VGA LAN1 LAN2 UID Switch PH
80. erview of the Nuvoton WPCM450R Controller The Nuvoton WPCM450R Controller is a Baseboard Management Controller BMC that supports 2D VGA compatible Graphics cores Virtual Media and Keyboard Video Mouse Redirection KVMR modules With blade oriented Super I O capability built in the WPCM450R Controller is ideal for legacy reduced server platforms WPCMASOR interfaces with a host system via PCI interface to communicate with the Graphics core It supports USB 2 0 and 1 1 for remote keyboard mouse virtual media emulation It also provides LPC interface to control Super IO func tions The WPCM450R is connected to the network via an external Ethernet PHY module The BMC also supports two high speed 16550 compatible serial communication ports UARTs Each UART includes a 16 byte send receive FIFO a programmable baud rate generator complete modem control capability and a processor interrupt system Both UARTs provide legacy speed with baud rate of up to 115 2 Kbps as well as an advanced speed with baud rates of 250 K 500 K or 1 Mb s which support higher speed modems The WPCM450R communicates with onboard components via six SMBus inter faces fan control and Platform Environment Control Interface PECI buses Note For more information on IPMI configuration please refer to the Embedded IPMI User s Guide posted on our Website http www su permicro com support manuals Chapter 3 Installation Chapter 3 Installat
81. es and Reset Select this feature and press lt Yes gt in the dialog box to discard all the changes and reboot the system Save Options Save Changes Select this feature and press lt Yes gt in the dialog box to save any changes you ve made and reboot the system Discard Changes Select Discard Changes and press lt Yes gt in the dialog box to discard any changes you ve made and return to the Setup Utility Restore Defaults Select this feature and press lt Yes gt in the dialog box for the AMI BIOS to automati cally load Optimal Defaults to the BIOS Settings The Optimal settings are designed for maximum system performance but they may not work best for some computer applications Save as User Defaults Select this feature and press lt Yes gt in the dialog box for the AMI BIOS to save the defaults that you ve selected as User Defaults for future use Restore User Defaults Select this feature and press lt Yes gt in the dialog box for the AMI BIOS to restore user default settings that you had previously saved Boot Override Built in EFI Shell Select this feature and press lt Yes gt in the dialog box for the AMI BIOS to save the changes you ve made on Built in EFI Shell settings and reboot the system 5 31 SUPERO X8OBN F Platform User s Manual Note 5 32 Appendix A BIOS POST Error Codes Appendix A BIOS Error Beep Codes During the POST Power On Self Test routines which are performed each time t
82. f DIMMs have been installed It is strongly recom mended that the same RAM speed of DIMMs are used in the system Make sure that you are using the correct type of DDR3 Registered ECC1066 MHz SDRAM recommended by the manufacturer Check for bad DIMM modules or slots by swapping a single module among all memory slots and check the results Make sure that all memory modules are fully seated in their slots Follow the instructions given in Chapter 3 Please follow the instructions given in the DIMM Population Tables listed on Page 3 8 to install your memory modules When the System Becomes Unstable A When the system becomes unstable during or after OS installation check the following 1 CPU BIOS support Check if your CPU is supported and if you have the latest BIOS installed Memory support Make sure that the memory modules are supported by test ing the modules using memtest86 or a similar utility Note Refer to the product page on our Website at http www supermicro com for memory compatibility list HDD support Check if all hard disk drives HDDs work properly Replace the bad HDDs with good ones System cooling Check system cooling to make sure that all heatsink fans and CPU system fans etc work properly Check Hardware Monitoring set tings in the BIOS to make sure that the CPU and System temperatures are 4 3 SUPER Platform User s Manual within normal range Also check the front p
83. fer e Support for up to 256 GB of Registered ECC DDR3 memory per CPU board e RDIMM 1GB 2GB 4GB 8GB and 16GB Chipset Two Intel 7500 IO Hubs e One ICH10R Expansion e Four 4 PCI E 2 0 x8 Slot3 Slot5 Slot7 Slot9 Slots See e Two 2 PCI E 2 0 x8 in x16 Slot1 Slot2 Page 2 6 e Four 4 PCI E 2 0 x16 Slot4 Slot6 Slot8 Slot10 Graphics e Winbond BMC Video Controller Matrox G200eW Network e One Intel 82576 Gigabit 10 100 1000 Mb s Ethernet Dual Channel Controller for LAN 1 LAN 2 ports e One IPMI LAN 2 0 port supported by the BMC Devices SATA Connections SATA Ports Six 6 e RAID Win RAID 0 1 5 10 dows Integrated IPMI 2 0 IPMI 2 0 supported by the WPCM450R BMC Serial COM Port Two 2 Fast UART 16550 Connections a Backplane Serial Port and a Front Accessible Serial Header SUPER Platform User s Manual Super Winbond Super 83527 Peripheral Devices USB Devices Two 2 USB ports on the rear I O panel USB 0 1 Two 2 USB connectors 4 ports for front access USB 2 3 USB 4 5 Two 2 Type A internal connector USB 8 10 BIOS 64 Mb SPI AMI BIOS SM Flash BIOS APM 1 2 PCI 2 3 ACPI 1 0 2 0 3 0 USB Keyboard Plug amp Play PnP and SMBIOS 2 5 Power Config Two 2 Main Power Supply Connectors PWR1 PWR2 Four 4 8 pin GPU Power Connectors JPWR1 JPWR4 Four 4 HDD Power Connectors
84. fers substantial enhancement in system performance for 4 way and 8 way servers Please refer to our Website at http www supermicro com for processor and memory support updates This prod uct is intended to be installed and serviced by professional technicians Manual Organization Chapter 1 provides quick installation instructions Chapter 2 describes the features specifications and performance of the X8OBN F baseboard and provides detailed information on the 7500 chipset Chapter 3 provides hardware installation instructions Read this chapter when in stalling the processor memory modules and other hardware components into the system If you encounter any problems see Chapter 4 which describes trouble shooting procedures for video memory and system setup stored in CMOS Chapter 5 includes an introduction to the BIOS and provides detailed information on running the CMOS Setup Utility Appendix A provides BIOS Error Beep Codes Appendix B lists software installation instructions SUPERO X8OBN F Platform User s Manual Conventions Used in this Manual Pay special attention to the following symbols for proper baseboard installation and to prevent damage to the system or injury to yourself Danger Caution Instructions to be strictly followed to prevent catastrophic system failure or to avoid bodily injury Warning Important information given to ensure proper system installation or to prevent damage to the components
85. ffer overflow Send a Stop signal to stop send ing data when the receiving buffer is full Send a Start signal to start sending data when the receiving buffer is empty The options are None Hardware RTS CTS and Software Xon Xoff Resolution 100x31 Use this feature to select the number of rows and columns used in Console Redirection for legacy OS support The options are 80x24 and 80x25 Legacy OS Redirection Select Enabled for extended terminal resolution support The options are Dis abled and Enabled Serial Port for Out of Band Management Windows Emergency Manage ment Services EMS The submenu allows the user to configure the following Console Redirection settings to support Out of Band Serial Port management Console Redirection Select Enabled to use COM Port1 for Console Redirection The options are Enabled and Disabled Out of_Band Management Port This feature allows the user to select a serial port to be used by the Windows Emergency Management Services EMS for remote system management during an emergency The options are COM 1 and COM 2 5 16 Chapter 4 AMI BIOS Data Bits This feature allows the user to select data bits for console redirection transmis sion The options are 7 Bits and 8 Bits Parity A parity bit can be sent with the data bits for data transmission errors Select Even if the parity bit is set to 0 and the number of 1 s in data bits is even Select Odd if the parity bit is set to
86. g on the middle fan plate X8OBN BaseBoard in the Chassis 1 6 Chapter 1 Quick Installation Guide 1 7 Installing the Populated CPU Board on the Baseboard After populating the CPU board with needed components and installing the base board in the chassis you can install the populate CPU board on the baseboard Installing the CPU Board w the CPU Board Plate Attached on the Baseboard A Locate the CPU board slots on the X8OBN baseboard Insert a CPU board into a CPU board slot by following the steps below starting from Slot1 B Using two hands hold the handles of the CPU board C Align the guiding edges on the CPU handles against the guiding rails on both sides of the chassis D Insert the CPU board into the baseboard until the bottom of the CPU board contacts the top of the CPU slot E Using both handles on the CPU board gently press the CPU board into the CPU board slot until the CPU board is fully seated on the CPU slot F Press the red latches on the handles to lock the CPU board to the baseboard CPU Board Slot4 CPU Board Slot3 Board Slot2 CPU Board Slot o Populated CPU Board w Air Shroud Tex SUPER X8OBN F Platform Us
87. g only Please refer to the quick installation guide in Chapter 1 and installation instruc tions listed in Chapter 3 for installation instructions 2 3 SUPER X80BN F Platform User s Manual SUPERO X80BN CPU Board Image X8OBN CPU Board Layout j CTT EDU Hin a SuPEReXBOBN CPU T LS e e Revs m II nana DIU e e P2 DIMM6AO 63 o P1 DIMM4AO P2 DIMMSAO Bl P1 DIMM3AO m MB3 zd for CPU2 MB4 se 2 for CPU2 C for CPU1 MB1 4 lt for CPU1 o CIP2 DIMM7A o o OPI DIMMIA e OP2 DIMMBA ol OP1 DIMM2A i o P2 DIMM2AC q lo P1 DIMM8AO lo P2 DIMM1AC g O lo P1 DIMM7AQ MBI E ka for CPU2 MB2 O CPU1 MBA V I for CPU2 lt gt for CPU1 b for CPU1 5 e w i O IC o OP2 DIMM3A E b CP1 DIMMSA o O P2 DIMM4A e3 b OP1 DIMM6A 63 J35 J43 gt JA J46 J45 013868 9 pese pee 9 9 N ni UDIN CIC A NBN TT mun loo lt Chapter 2 Overview SUPER X80BN BR1 Bridge Card Image ver na CUPRUM E C c ec see lt 4 X8OBN BR1 Bridge Card Layout SUPER X8OBN BR1 Rev 1 01 2 5 SUPER Platform User s Manual X8OB
88. he Red LED will have no effects on the Blue LED See the table on the right for jumper settings o OLE 1 SUPER X60BN F Baseboard re Rev 1 01 ilo o 3 30 ME Mode Select Jumper Settings Jumper Setting Open Closed Definition Normal Default Manufacture Mode UID Overwriting Jumper Settings Jumper Off De fault Definition Red OH Fan Fail PWR Fail LED Pin 8 of JF1 takes precedence over overwrites the Blue UID LED Pin 7 of JF1 Red LED On Blue LED Off Red LED Off Blue LED On or Off Red LED OH Fan Fail PWR Fail LED and the Blue UID LED function independently Red LED does not overwrite the Blue LED The Red LED has no effects on the Blue UID LED Red LED On Blue LED On Off Red LED Off Blue LED On Off A JPME2 B JUID OW1 Chapter 3 Installation BMC Reset BMC Reset Jumper Settings Use Jumper JPRST1 to reset the BMC settings on the motherboard See the table on the right for jumper settings Jumper Setting Definition Closed BMC Reset Closed Normal Default A BMC Reset En able o Es OLE SUPERO X80BN F Baseboard UU a Rev 1 01 ri LO o
89. he State of California to cause birth defects and other reproductive harm Manual Revision 1 0b Release Date April 6 2011 Unless you request and receive written permission from Super Micro Computer Inc you may not copy any part of this document Information in this document is subject to change without notice Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders Copyright 2011 by Super Micro Computer Inc All rights reserved Printed in the United States of America Preface Preface This manual is written for system integrators PC technicians and knowledgeable PC users It provides information for the installation and use of the X8OBN F platform which consists of the X8OBN Baseboard the X8OBN CPU Board and the X8OBN BR1 Bridge Card About the X8OBN F Platform X8OBN F platform consists of the X8OBN Baseboard the X8OBN CPU CPU Board and the X8OBN BR1 Bridge Card Each X8OBN CPU Board supports up to two Intel 7500 Series processors and 16 DDR3 1066MHz memory modules The Intel Socket LS processor offers Intel QuickPath Interconnect QPI Technology providing point to point system interface that replaces Front Side Bus technology The X8OBN BR Bridge card provides connections between a pair of the CPU boards installed on the X8OBN Baseboard With support of Intel Turbo Boost Technology and up to 80 CPU cores the X8OBN F platform of
90. he system is powered on errors may occur Non fatal errors are those which in most cases allow the system to continue the bootup process The error messages normally appear on the screen Fatal errors will not allow the system to continue to bootup If a fatal error oc curs you should consult with your system manufacturer for possible repairs These fatal errors are usually communicated through a series of audible beeps The numbers on the fatal error list correspond to the number of beeps for the corresponding error A 1 BIOS Error Beep Codes Beep Code LED 1 beep 5 short beeps 1 long beep 8 beeps OH LED On BIOS Error Beep Codes Error Message Description Refresh Circuits have been reset Ready to power up No memory detected in the system Memory error Video adapter missing or with faulty memory Display memory read write error System OH System Overheat A 1 SUPERO X8OBN F Platform User s Manual Notes Appendix B Software Installation Instructions Appendix B Software Installation Instructions B 1 Installing Software Programs After you ve installed the operating system a screen as shown below will appear You are ready to install software programs and drivers that have not yet been in stalled To install these programs click the icons to the right of these items Note To install the Windows OS please refer to the instructions posted on our Website at http
91. hnical support department We can be reached by e mail at support supermicro com 4 3 Frequently Asked Questions Question What are the various types of memory that my baseboard can support Answer The X8OBN supports Registered ECC DDR3 1066 MHz SDRAM memory Itis strongly recommended that you do not mix memory modules of different speeds and sizes Please follow all memory installation instructions given on Section 3 3 in Chapter 3 Question How do update my BIOS It is recommended that you do not upgrade your BIOS if you are not experiencing any problems with your system Updated BIOS files are located on our website at http Avww supermicro com Please check our BIOS warning message and the information on how to update your BIOS on our website Select your baseboard model and download the BIOS file to your computer Also check the current BIOS revision and make sure that it is newer than your BIOS before downloading You 4 5 SUPER Platform User s Manual can choose from the zip file and the exe file If you choose the zip BIOS file please unzip the BIOS file onto a bootable USB device Run the batch file using the format AMI bat filename rom from your bootable USB device to flash the BIOS Then your system will automatically reboot Warning Do not shut down or reset the system while updating BIOS to A prevent possible system boot failure Note The SPI BIOS chip used on this baseboard cannot be r
92. ion 3 1 Static Sensitive Devices Electrostatic Discharge ESD can damage electronic components To avoid dam aging your system board it is important to handle it very carefully The following measures are generally sufficient to protect your equipment from ESD Precautions e Use a grounded wrist strap designed to prevent static discharge e Touch a grounded metal object before removing the board from the antistatic bag Handle the board by its edges only do not touch its components peripheral chips memory modules or gold contacts e When handling chips or modules avoid touching their pins Put the baseboard and peripherals back into their antistatic bags when not in use e For grounding purpose make sure that your system chassis provides excellent conductivity between the power supply the case the mounting fasteners and the baseboard e Use only the correct type of onboard CMOS battery as specified by the manufacturer Do not install the onboard battery upside down to avoid possible explosion Unpacking The baseboard is shipped in antistatic packaging to avoid static damage When unpacking the board make sure the person handling it is static protected Note Please refer to the quick installation guide listed in Chapter 1 for more information on system installation 3 1 SUPER Platform User s Manual 3 2 Populating the CPU Board Warning When handling the processor avoid p
93. ision Event Timer HPET that produces periodic interrupts at a much higher frequency than a Real time Clock RTC does in synchronizing multimedia streams providing smooth playback and reducing the dependency on other timestamp calculation devices such as an x86 RDTSC In struction embedded in the CPU The High Precision Event Timer is used to replace the 8254 Programmable Interval Timer The options are Enabled and Disabled PCI Express Port Configuration This feature allows the user to configure the following PCI E port settings PCI Express Port 1 PCI Express Port 5 Select Enabled to enable the PCI E port specified by the user The options are Enabled and Disabled gt USB Configuration This submenu allows the user to configure the following USB settings All USB Devices Select Enabled to enable all USB devices in the system The options are Enabled and Disabled 5 24 Chapter 4 AMI BIOS USB 2 0 EHCI Support Select Enabled for USB 2 0 EHCI Extended Host Controller Interface support The options are Enabled and Disabled EHCI Controller 1 2 Select Enabled to enable the EHCI controller specified by the user to enhance USB communication The options are Enabled and Disabled UHCI Controller1 UHCI Controller 6 Select Enabled to enable the UHCI Universal Host Controller Interface controller specified by the user to enhance USB1 0 communication The options are Enabled and Disabled USB Port0 USB Port11 Sel
94. ity and the capability of the Intel 7500 platform the X8OBN F baseboard provides the performance and support for eight processor based HPO Cluster Database servers The 7500 platform consists of the 7500 Series Socket LS LGA 1567 processor the 7500 IOH and the ICH10R South Bridge With the Intel QuickPath interconnect QPI controller built in the 7500 Series processor offers point to point system interconnect interface greatly enhancing system performance by utilizing serial link interconnections allowing for increased bandwidth and scalability The IOH provides the interface between QPl based processor and PCI Express components Each processor supports four full width bidirectional interconnects at the speed of 4 8 GT s 5 86 GT s or 6 4 GT s Each QPI link consists of 20 pairs of unidirectional differential lanes for data transmission in addition to a differential forwarding clock The x16 PCI Express Gen 2 connections can also be configured as x8 x4 x2 x1 links to comply with the PCI E Base Specification Rev 2 0 These PCI E Gen 2 lanes support peer to peer read and write transactions In addition the legacy IOH provides a x4 ESI Enterprise South Bridge Interface link support for the legacy bridge The 7500 chipset also offers wide range of ESI Intel I OAT Gen 3 Intel VT d and RAS Reliability Availability and Serviceability support The features supported include memory interface ECC x4 x8 Single Device Data Corr
95. lacing direct pressure the CPU pins CPU socket and the label area of the heatsink and the fan to avoid damaging the components and the system Be sure to attach the CPU board to the CPU board plate before you install a component on the CPU board Always connect the power cord last and always remove it before adding removing or changing any hardware components Make sure that you install the processor into the CPU socket before you install the CPU heatsink When purchasing a board without a 7500 Series processor pre installed make sure that the CPU socket plastic cap is in place and none of the CPU socket pins are bent otherwise contact the retailer immediately Refer to our website at www supermicro com for CPU Memory support up dates Installing a CPU on the CPU Board Follow the instructions given in Chapter 1 to install the CPU board to the CPU board plate Press the socket clip to release the load plate which covers the CPU socket from its locking position Gently lift the socket clip to open the load plate IN Warning Shipment without the plastic cap properly installed will cause damage to the socket pins Chapter 3 Installation Installing the CPU Heatsink on the CPU Board 1 If needed apply the proper amount of thermal grease with thickness of up to 0 13 mm to the heatsink If you are using a heatsink purchased from SMC please skip this step because the needed amount of the thermal grease has b
96. lated CPU Board to BaseBoard ey St yXBOBN CPU CPU Board BaseBoard 3 6 Chapter 3 Installation 3 5 Installing the Bridge Card between the CPU Boards Once you ve installed populated CPU boards on the baseboard you can install the X8OBN BRI Bridge card between the CPU boards If only one CPU board is installed on the baseboard please skip this step _Note A Bridge card is needed to connect the pair s of the CPU boards CPU Board Installed on Slot1 Yes Yes CPU Board Installed on Slot2 Yes Yes CPU Board Installed on Slot3 CPU Board Installed on Slot4 installed on Slot1 amp Slot2 and or Slot3 amp Slot4 There is no Bridge card needed between Slot2 and Slot3 Refer to the table below for details X80BN BRI Bridge Card s to be Installed One card needed between Slot1 amp Slot2 One card needed between Slot1 amp Slot2 Yes Yes X8OBN Bridge Card SUPER X8OBN BR1 Rev 1 01 One card needed between Slot1 amp Slot2 Another card needed between Slot3 amp Slot4 To connect to the CPU Board le Four CPU Boards X8OBN CPU Board Two Bridge Cards SUPER Platform User s Manual 3 6 Memory Support for the X8OBN F Platform Each X8OBN F CPU Board supports up to 256 GB Registered ECC DDR3 1066 MHz memory in 16 DIMM slots These RDIMMs run at 800 978 1066 via a memory buffer
97. ll Speed FS to allow the onboard fans to run at full speed for maximum cooling The FS setting is recommended for special system configuration or debugging Select Performance PF for better system cooling The PF setting is recommended for high power consuming and high density systems Select Balanced BL for the onboard fans to run at a speed that will balance the needs between system cooling and power saving The BL setting is recommended for regular systems with normal hardware configuration Select Energy Saving ES for best power efficiency and maximum quietness The Options are Full Speed FS Performance PF Balanced BL and Energy Saving ES Fan Speed Readings The following fan speeds are displayed Fan1 Speed Fan 12 Speeds gt Baseboard Voltage and Temperature The he following temperature and voltage settings will be displayed in degrees in Celsius and Fahrenheit as detected by the BIOS e System Temperature 1 8V Aux 1 2V BMC 1 0V NIC 1 1V AUX 1 0V PEX 5 0V 1 1V 1 8V 12 0V 1 5V VBAT 3 3V and 3 3V VSB CPUO Voltage and Temperature CPU7 Voltage and Temperature The following temperature and voltage settings of a CPU specified will be displayed as detected by the BIOS e System Temperature Low This level is considered as the normal operating state The CPU tem perature is well below the CPU Temperature Tolerance level The onboard 5 13 SUPERO X8OBN F Platform User s Manual
98. ller or a Mass Storage device to complete its component related activities bulk processing or data transferring before the system resume its normal operation dur ing POST The options are 1 Second 5 Seconds 10 Seconds and 20 Seconds Hardware Health Event Monitoring This feature allows the user to monitor system health and review the status of each item as displayed CPU Overheat Alarm This option allows the user to select the CPU Overheat Alarm setting that deter mines when the CPU OH alarm will be activated to provide warning of possible CPU overheat The options are The Early Alarm Select this setting to trigger the CPU overheat alarm as soon as the CPU temperature reaches the CPU overheat threshold as predefined by the CPU manufacturer Chapter 4 AMI BIOS The Default Alarm Select this setting to trigger the CPU overheat alarm when the CPU temperature reaches about 5 C above the threshold temperature as predefined by the CPU manufacturer to give the CPU and system fans additional time needed for CPU and system cooling Warning To avoid possible system overheating please be sure to provide adequate airflow to your system Fan Speed Control Modes This feature allows the user to decide how the system controls the speeds of the onboard fans The CPU temperature and the fan speed are correlated When the CPU on die temperature increases the fan speed will also increase for effective system cooling Select Fu
99. located on the X8OBN F baseboard The UID switch is located next to the LAN ports on the backplane The Rear UID LED LED6 is located next to the UID switch The Front Panel UID LED is located at Pins 7 8 of the Front Control Panel at JF1 Connect a cable to Pins 7 8 on JF1 for Front Panel UID LED indication When you press the UID switch both Rear UID LED and Front Panel UID LED Indicators will be turned on Press the UID switch again to turn off both LED Indicators These UID Indicators provide easy identification of a system unit that may be in need of service Note UID can also be triggered via IPMI on the baseboard For more information on IPMI please refer to the IPMI User s Guide posted on our Website Qhttp www supermi cro com BA ES NIC1 Link LED NIC2 Link LED Blue OH Fan Fail PWR FaiL UID LED Power Fail LED Chapter 3 Installation UID Switch Pin Definition Ground Ground Button In Ground UID LED LE2 Status Color State OS Status Blue On Windows OS Unit Identified Blue Linux OS Unit Identified Blinking 1 UID Switch 2 Rea
100. m will work properly If so then the old component is bad You can also install the component in question in another system If the new system works the component is good and the old system has problems Technical Support Procedures Before contacting Technical Support please take the following steps Also please note that as a baseboard manufacturer Supermicro also sells motherboards through its channels so it is best to first check with your distributor or reseller for trouble 4 4 Chapter 4 Troubleshooting shooting services They should know of any possible problem s with the specific system configuration that was sold to you 1 Please go through the Troubleshooting Procedures and Frequently Asked Question FAQ sections in this chapter or see the FAQs on our Website http Awww supermicro com before contacting Technical Support 2 BIOS upgrades can be downloaded from our Website http www supermicro com 3 If you still cannot resolve the problem include the following information when contacting Supermicro for technical support e Baseboard model and PCB revision number BIOS release date version This can be seen on the initial display when your system first boots up e System configuration 4 An example of a Technical Support form is on our Website at http www supermicro com e Distributors For immediate assistance please have your account number ready when placing a call to our tec
101. me or System Date using the arrow keys Enter new values through the keyboard and press lt Enter gt Press the lt Tab gt key to move between fields The date must be entered in MM DD YY format The time is entered in HH MM SS format Note The time is in the 24 hour format For example 5 30 P M appears n as 17 30 00 Access Level The feature displays the privilege level that has been pre set for the user for ac cessing the setup utility or the system 5 3 SUPERO X8OBN F Platform User s Manual 5 3 Advanced Setup Configuration Use the arrow keys to select the Advanced Setup menu and press Enter to ac cess the submenu items Aptio Setup Utility Copyright C 2009 American Megatrends Inc Launch PXE OpROM Disabled Legacy OpROM Support Use this feature to configure Option ROM settings which will allow the system to boot up via a legacy network device Launch PXE OpROM Select Enabled to boot up the system via a legacy network device The options are Enabled and Disabled Launch Storage OpROM Select Enabled to boot up the system via a legacy mass storage device that has the Option ROM capability built in The options are Enabled and Disabled gt PCI Subsystem Settings PCI Bus Driver Version This feature displays the version number of the PCI Bus Driver used in this system PCI ROM Priority This feature allows the user to specify which PCI Option ROM to use when multiple Option ROMs are installe
102. n SATA Port2 Configuration SATA Port3 Configuration SATA Port4 Configuration SATA Port51 Configuration These submenus allow the user to configure the following item for a SATA port selected by the user eSATA Port Support Select Enabled to enable a SATA port specified by the user for external SATA con nection support The options are Enable and Disabled SUPERO X80BN F Platform User s Manual USB Configuration e USB Devices This feature displays the status of the USB devices detected in the system Legacy USB Support Select Enabled to support Legacy USB devices If this item is set to Auto the AMI BIOS will automatically enable Legacy USB support if a legacy USB device is de tected The settings are Enabled Disabled and Auto EHCI Hand Off Select Enabled to support the BIOS Enhanced Host Controller Interface to provide a workaround solution for an operating system that does not have EHCI Hand Off sup port When enabled the EHCI Interface will be changed from the BIOS controlled to the OS controlled The options are Disabled and Enabled Device Reset Timeout This setting allows you to decide how long the system should wait in an attempt to detect the presence of a USB Mass Storage Device before it proceeds with the next operation during POST The options are 10 Seconds 20 Seconds 30 Seconds and 40 Seconds Controller Timeout This setting allows you to decide how long the system should wait for a USB con tro
103. ows OS HES JE Hel Blinking Linux UID LED 8 bit binary POST Code for future LED12 LED19 Port 80 LEDs iene debug Note For PCI E slots to work properly follow the instructions listed on Page 2 6 avoid damaging the power supply or the system to provide adequate power to the components be sure to connect the main power connectors JP22 JP21 and the following power connectors to the power supply Failure to do so will void the manufacturer warranty Main Power Connectors JP22 JP21 e HDD Power Connectors reserved for HDD used only JP16 JP19 e GPU 8 pin Power Connectors reserved for graphics card use only JPWR1 JPWR2 JPWR3 JPWR4 e SATA DOM Power Connector used for SATA devices JWF1 Baseboard Features Chapter 2 Overview Baseboard Modular design with a baseboard with four CPU_board slots that support up to four CPU boards Te The baseboard includes two 7500 IO hubs one PLX PEX8648 PCI E software controller and ten PCI E slots Each CPU board includes the following CPU per CPU Board Two Intel 7500 Series Socket LS LGA 1567 pro cessors each processor supports four full width Intel QuickPath Interconnect QPI links with support of up to 25 6 GT s per QPI link and with Data Transfer Rate of up to 6 4 GT s per direction Memory per 16DDR3R RDIMMs running atspeeds of 1066 978 800 CPU Board MHz via an onboard buf
104. pulated CPU Board w Air Shroud Side View 1 5 SUPER X8OBN F Platform User s Manual 1 6 Installing the Baseboard into the Chassis Follow the steps below to install the baseboard into the chassis Be sure to install the IO shield on the rear side of the chassis before you install the baseboard A Locate the release latches on the power supply distributor Press the release latch es to release the power distributor from its locking position B Pull the handle of the power supply distributor forwards to remove it from the chassis C Locate the mounting holes 23 on the baseboard D Place the baseboard in the chassis making sure that the mounting holes on the baseboard match the corresponding mounting holes on the chassis Please note that there are three locating standoffs in the chassis as shown in the drawing Mounting Holes marked with are for locating stand Offs E Install standoffs in the chassis as needed to secure the baseboard onto the chassis Be sure that the three locating standoffs are protruding from the chassis F Place the power supply distributor to the proper position in the chassis and push the handle forwards to lock it G Connect the HDD Power Connector cables to the power supply through an openin
105. r Hemisphere Mode support to improve the latency of individual memory accessing The options are Enabled and Disabled 5 22 Chapter 4 AMI BIOS Patrol Scrub It is a memory error correction scheme that works in the background looking for and correcting resident errors The options are Enabled and Disabled Patrol Scrub Interval Use this feature to set the hours needed for each Patrol Scrub cycle to complete the task Select 5 hours for the AMI BIOS to automatically set the time needed for a Patrol Scrub cycle to complete the task The default setting is 5 hours Socket 0 Branch 0 Sparing Socket 0 Branch 1 Sparing Socket 1 Branch 0 Sparing Socket 1 Branch 1 Sparing Socket 7 Branch 1 Sparing Use this feature to enable or disable memory sparing support for the memory modules specified The options are Disabled DIMM Sparing Enable and Rank DIMM Enable Spare Copy Duration Use this feature to set the hours needed for each Spare Copy cycle to complete the task Select 5 hours for the AMI BIOS to automatically set the time needed for spare copy to complete the task The default setting is 5 hours Mirroring Migration Select Enabled to support memory mirroring migration to enhance data security The options are Enabled and Disabled gt South Bridge This submenu allows the user to configure the following South Bridge settings South Bridge Chipset Configuration This feature allows the user to configure the following South
106. r UID LED LED6 3 Front UID LED Groun X FP PWRLED HDD LED ID_UID_SW 3 3V Stby NIC1 Activity LED NIC2 Activity LED 3 3V Ground Reset gt Reset Button Ground PWR gt Power Button SUPER X80BN F Platform User s Manual Front Control Panel JF1 contains header pins for various buttons and indicators that are normally lo cated on a control panel at the front of the chassis These connectors are designed specifically for use with Supermicro s server chassis See the figure below for the descriptions of the various control panel buttons and LED indicators Refer to the following section for descriptions and pin definitions JF1 Header Pins Bur 579 o SUPER 6 X80BN F Baseboard EU Au Rev 1 01 cpu 2 t4 cout o TEE Slot PCIE 2 0 x8 in x16 ard Slot 3 10 lott0 PCI E 2 0 x16 Slot9 PCIE 2 0 x8 Slot8 PCI E 20 x16 Slot PCI E 2 0 x8 Jot6 POLE 2 0 x16 EI 5 8 P22 g Ole a TE Slots PCI E 2 0 x8 ne zu Siol4 POLE 20x16 Battery Ed PCI Bridge wert e
107. s TPM Support Enable TPM Support Enable Jumper Settings JPT1 allows the user to enable TPM Jumper Setting Definition Trusted Platform Modules support which will enhance data integrity and system security See the table on the right for jumper settings The default setting is enabled 1 2 Enabled 2 3 Disabled Note For more information on IPMI configuration please refer to the WPCM 450 IPMI BMC User s Guide posted on our Website http www supermicro com bilal EW O 68 ard Slot 2 Up lt har LAN CTRL 5011 VGA Enabled B TPM Enabled 90 PCI E 2 0 x8 322000 51018 PCI E 2 0 x16 WO Hub 1 iE SipgeeClE 2 0 x8 n BMC CTRL Slot6 PCI E 2 0 x16 wa JP22 SlotS PCI E 2 0 x8 esu Slot4 PCI E 2 0 x16 Tuus 908 PCI E 2 0 x8 TE Slot2 PCI E 2 0 x8 in x16 Tuus PCI E 2 0 x8 in x16 Chapter 3 Installation BM
108. s are Disabled and Enabled Adjacent Cache Line Prefetch Available when supported by the CPU If this item is set to Disabled the CPU prefetches the cache line for 64 bytes The CPU prefetches both cache lines for 128 bytes as comprised if this item is set to Enabled The options are Disabled and Enabled Intel Virtualization Technology Available when supported by the CPU Select Enabled to use Intel Virtualization Technology which will allow one platform to run multiple operating systems and applications in independent partitions creat ing multiple virtual systems in one physical computer The options are Enabled and Disabled Note Please reboot the system for any change in this setting to take effect Please refer to Intel s website for detailed information 5 9 SUPERO X80BN F Platform User s Manual Power Technology Use this feature to select power management features for the system Select Energy Efficient to minimize power use Select Custom to customize power use settings The options are Disabled Energy Efficient and Custom Intel amp EIST Technology EIST EIST Enhanced Intel SpeedStep Technology allows the system to automatically adjust processor voltage and core frequency in an effort to reduce power consump tion and heat dissipation Please refer to Intel s web site for detailed information The options are Disabled and Enabled TurboBo Mode Available when EIST Tech is enabled Select Enabled to en
109. ters into one or more bytes The options are ANSI VT100 VT100 and VT UTF8 Bits Per second Use this feature to set the transmission speed for a serial port used in Console Redirection Make sure that the same speed is used in the host computer and the client computer A lower transmission speed may be required for long and busy lines The options are 9600 19200 57600 and 115200 bits per second Data Bits Use this feature to set the data transmission size for Console Redirection The options are 7 Bits and 8 Bits 9 15 SUPERO X80BN F Platform User s Manual Parity A parity bit can be sent along with regular data bits to detect data transmission errors Select Even if the parity bit is set to 0 and the number of 1 s in data bits is even Select Odd if the parity bit is set to 0 and the number of 1 s in data bits is odd Select None if you do not want to send a parity bit with your data bits in transmission Select Mark to add a mark as a parity bit to be sent along with the data bits Select Space to add a Space as a parity bit to be sent with your data bits The options are None Even Odd Mark and Space Stop Bits A stop bit indicates the end of a serial data packet Select 1 Stop Bit for standard serial data communication Select 2 Stop Bits if slower devices are used The options are 1 and 2 Flow Control This feature allows the user to set the flow control for Console Redirection to prevent data loss caused by bu
110. the pending TPM operation to take precedence over other operations in the queue and be processed and executed immediately If the option Disable Take Ownership is selected the pending TPM operation will not take precedence over other operations and will be processed based on the order that are placed in the queue Select the option TPM Clear to delete all pending TPM operations from the queue If the option None is displayed there is no pending TPM operation in the queue Please note that a system reboot is needed for any change on the feature to become effective The options are None Enable Take Ownership Disable Take Ownership and TPM Clear Current TPM Status Information This feature displays the current status of the TPM items listed below TPM Enabled State Select Enabled to display the status of TPM Enabled in this system The op tions are Disabled and Enabled TPM Active State Select Deactivate to disable TPM support for this system The options are De activated and Activate TPM Active State This feature lists the status of the TPM Owner The default setting is UnOwned which indicates that there is no owner listed for TPM support 5 7 SUPERO Platform User s Manual gt WHEA Configuration This feature allows the user to configure WHEA Windows Hardware Error Archi tecture support settings WHEA Support Select Enabled to enable WHEA support which will provide a common infrastruc ture
111. ther to press the notches on both ends of the module straight down into the slot until the module snaps into place 6 Press the release tabs to the lock positions to secure the DIMM module into the slot Press both notches straight down into the memory slot at the same time Removing Memory Modules Reverse the steps above to remove the DIMM modules from the motherboard 3 4 Chapter 3 Installation 3 3 Installing the Baseboard into the Chassis Follow the instructions below to install the baseboard into the chassis Tools Needed e Phillips Screwdriver Pan_head 6 screws 23 pieces LAZA e Standoffs 23 pieces if needed 1 Install the IO shield in the chassis e 2 Locate the mounting holes on the baseboard and the matching mounting holes on the chassis El Surene som sd etse E 3 Place the baseboard in the chassis making sure that the mounting holes on the baseboard match the corresponding mounting holes on the chassis 4 Install standoffs in the chassis as needed 5 Using the Phillips screwdriver insert a Pan head 6 screw into mounting hole on the baseboard and its matching mounting hole on the chassis Repeat this step to s
112. tion Overheat OH Fan Fail PWR Fail OH Fan Fall PWR Fall UID LED UID LED Pin Definitions JF1 Pin Definition Connect an LED cable to OH Fan Fail FP UID connection on pins 7 and 8 of 7 Reds Blue LED Cathode Blue OH Fan Fail PWR Fail JF1 to provide advanced warnings of UID LED chassis overheat or fan failure It also works as the front panel UID LED Olean Fall Indicator indicator The Red LED takes prece Status dence over the Blue LED by default State Definition Refer to the table on the right for pin Of Norma definitions On Overheat Flash Fan Fail ing Power Fail LED PWR Fail LED Pin Definitions JF1 The Power Fail LED connection is located on pins 5 and 6 of JF1 Re fer to the table on the right for pin definitions Pin Definition 5 3 3V PWR Supply Fail A Front UID LED Blue B OH Fail PWR Fail LED Red C PWR Supply Fail a o Eq 3 SUPERO X8OBN F Baseboard Rev 1 01 X FP PWRLED HDD LED NIC1 Link LED NIC1 Activity LED NIC2 Activity LED NIC2 Link LED Blue OH Fan Fail PWR FaiL UID LED 3 19 SUPER X8
113. tor and attempt to reduce the level of Electromagnetic Interference caused by the components whenever needed The options are Disabled and Enabled Hyper threading Select Enabled to use Hyper Threading Technology which will result in increased CPU performance The options are Disabled and Enabled Active Processor Core Select Enabled to use a processor s second core and beyond Please refer to Intel s website for more information The options are All 1 and 2 Limit CPUID Maximum This feature allows the user to set the maximum CPU ID value Enable this func tion to launch the legacy operating systems that cannot support processors with extended CPUID functions The options are Enabled and Disabled for the Win dows OS Execute Disable Bit Capability Available when supported by the OS and the CPU Set to Enabled to support Execute Disable Bit which will allow the processor to designate areas in the system memory where an application code can execute and where it cannot thus preventing a worm or a virus from flooding illegal codes to overwhelm the processor or damage the system during an attack The default is Enabled Refer to Intel and Microsoft web Sites for more information Hardware Prefetcher Available when supported by the CPU If enabled the hardware prefetcher will prefetch streams of data and instructions from the main memory to the L2 cache in the forward or backward manner to im prove CPU performance The option
114. ty Copyright 2009 American Megatrends Inc Administrator Password 5 29 SUPERO X8OBN F Platform User s Manual Administrator Password If Administrator Password is selected for the system the user can use an admin istrator password to enter the BIOS Setup Utility No password will be needed for the user to enter the system at bootup User Password If User Password is selected for the system a password is needed for a user to enter the system and the BIOS Setup Utility at bootup While in the BIOS Setup Utility the user is granted with Administrator Rights and is allowed to change configuration settings in the Setup Utility 5 9 Save amp Exit Use this section to configure Save amp Exit settings Aptio Setup Utility Copyright C 2009 American Megatrends Inc Save Changes Save Changes and Exit When you have completed the system configuration changes select this feature and press lt Yes gt in the dialog box to save the changes you ve made and reboot the system After system reboot the new system settings will take effect Discard Changes and Exit Select this feature and press lt Yes gt in the dialog box to quit the BIOS Setup without making any permanent changes to the system configuration settings Save Changes and Reset Select this feature and press lt Yes gt in the dialog box to save all the changes you ve made and reset the system 5 30 Chapter 4 AMI BIOS Discard Chang
115. vanced BIOS Section for 4 pin fans only l Ground 412V 2 3 Tachometer 4 PWR Modulation 4 pin fans only Chassis Intrusion A Chassis Intrusion header is located at Chassis intrusi n JL1 on the baseboard Attach an appro PA DEMONS priate cable from the chassis to inform Pint Definition you of possible chassis intrusion when 1 Intrusion Input the chassis is opened Ground WDT BEH e JJF1 SUPER 6 X80BN F Baseboard DA Rev 1 01 o CPU Board Slot 3 T E CPU Board Slot 2 JPiS A Fan7 IOH1 B Fan8 Fan IOH2 sre C Fan3 CPU Slot1 D Fan4 CPU Slot2 5 CPU Slot3 F Fan6 CPU Slot4 G Fani System Fan H Fan2 System Fan RED Fans 9 10 System K L Fans 11 12 System M Chassis Intrusion ard Slot 1 LAN CTRL 0X ER 908 PCI E 2 0 x16 Tus Slot PCI E 2 0 x8 CTRL Esse 91016 PCI E 2 0 x16 VO Hub 1 Rm aS o i b aid o Slt PCLE 2 0 x8 in x16 JP 05810 USB8

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