IE-78K0-NS-P04, IE-780818-NS-EM4 Emulation Board and Probe
Contents
1. Based U12900E U12900J Caution The documents listed above are subject to change without notice Be sure to use the latest documents when designing NEC IE 78KO NS PO4 IE 780818 NS EM4 Table of Contents Juge DI E 5 Chapter 1 General iis 11 1 1 System ConfiguratiOn si ea Ee eN es Ge ee eke a Ee RR Ra De een oe Eed Ge ee EE Re ne re NE ee ie 12 1 2 Hardware Configuration EE 14 1 3 Basic Sp cifications pee 15 1 4 Notes on Use of IE 78K0 NS P04 and IE 780818 NS EM4 nent 16 Chapter 2 Part Names Re EE ee EEN 17 2 1 Pack ge Components ss ede Ke Re rena Ee eg eo ae es ee fe ca RE ee Gee ee ea ee De hee 17 2 2 Parts of the E Z8KO NS PO4 5 Geek nimc cu es N Ke ee uxor m naa uu S ix We bee eN scsecrencdiveccuane 18 2 3 Parts of the IE 780818 NS EM4 mm ee EER AAR RR EER KERR sene Ee RARR Rae KERE AA AR REG ee RR RA san E nnn assi tn Russa KERE 19 Chapter 3 actu me EER ee De Re ee us 21 3 1 Installation Procedure N N EE RE EE EE N 22 3 2 Clock S ttingS RE EE EE EE N EE N 30 3 2 1 Overview of clock settings ese sneennnnennsnennensnnnenenennnnnnees 30 3 2 2 Main System Clock Selections ennennnennmennnnennnnenensnneennnnnennnneenennnnes 31 3 2 3 Subsystem Clock Selections ees RR KRAAK ER ER AAR RARR esses sienne KRAAK ER Ee ARK RAAR RR sn nasse tn ee AR KRAG ee ER 32 3 2 4 Main System Clock Settings enne ee2. NEC Preliminary User s Manual IE 78K0 NS P04 IE 780818 NS EM4 Emulation Board and Probe Board for IE 78K0 NS A Target device uPD780816 A Subseries Document No U14514EE2VOUMOO Date Published December 200 NEC Corporation 2000 IE 78K0 NS P04 IE 780818 NS EM4 NEC LE This equipment complies with the EMC protection requirements Warning This is a Class A EN 55022 1994 equipment This equipment can cause radio frequency noise when used in the residential area In such cases the user operator of the equipment may be required to take appropriate countermeasures under his responsibility Caution This equipment should be handled like a CMOS semiconductor device The user must take all precautions to avoid build up of static electricity while working with this equipment All test and measurement tools including the workbench must be grounded The user operator must be grounded using the wrist strap The In Circuit Emulator probe target connector plug and or its adapter pins should not be touched with bare hands NEC IE 78K0 NS P04 IE 780818 NS EM4 MS DOS and MS Windows are either registered trademarks or trademarks of Microsoft Corporation in the United States and or other countries PC AT and PC DOS are trademarks of IBM Corp The related documents in this publication may include preliminary versions However preliminary versions are not marked as such The export of this
3. R46 Dod od od gd od gt R88 C88 Ss 7641 IC12 R107 ROB 5 st mae C38 j C37 ee RII es R103 e c67 8 c62 7 C40 A 8 1c13 C88 er TT ca 7 H C74 TP15 CI O pI bd DOPO od od od d anal eh C36 ARSS pas T Wi he O cos C44 IC18 TP 15 535 m CNI4 RSS 2 E 1c2 NM Z C61 C28 R60 ae RIED RIES i dete es O R94 ES R157 GEE C112 7 pw TP17 C32 e C75 117 7 R125 c59 R108 C27 R170 3 C76 s Hol Ur IC 0 1 POG s c31 Main c58 i system C30 2 clock fix WOEN i vd 8 00 MHz El 2 C97 i R154 o RITA _ MEE Z R126 o E ES c56 UPS EO L P2 C69 zi E C60 C108 C55 7 gm C29 e 686 X4 CNS e Don DOG 99 n e s E 1 TPS C85 I FG FCIO C107 2 T T T 100 R90 R62 Z R109 RIGRES oo e SEE on Mie ue oe ee RISRES 1 A 99 1 99 TPZ e TP6 R 12 ROS RITR O e e RIOR71 RO R72 L TPIS H RB RZ3 E RS ES z TT UNES 100 TP20 2 IOREVRIO0 7 RSS TOO Gu O z a JP2 RS R76 E PT NE E 78KO0 NS PO04 P1 R158 oe R1 R80 SS 7 1 100 2 IC UPS VER Im o RR ml D7 D4 D5 06 gt 4 H ef ep el st SE XT x2 ADE IN GERMANY ANTI STATIC JPS JP7 Subsystem clock user defined Main system clock user defined NEC IE 78KO NS PO4 IE 780818 NS EM4 2 3 Parts of the IE 780818 NS EM4 Figure 2 2 IE 780818 NS EM4 External View and Part Names External Trigger EXT OUT EXT IN R52 R54 R56 Rie R amp ORS2Re4 Res 9 R32 RS3 R55 R57 RSA REI RES R65 R67 Emu
4. United Square Singapore 1130 Tel 253 8311 Fax 250 3583 NEC Electronics Taiwan Ltd Taipei Taiwan Tel 02 719 2377 Fax 02 719 5951 NEC do Brasil S A Sao Paulo SP Brasil Tel 011 889 1680 Fax 011 889 1689 NEC IE 78K0 NS P04 IE 780818 NS EM4 Product Overview Target Readers Organization Purpose Introduction The IE 78KO NS PO4 and the IE 780818 NS EM4 when combined with the IE 78K0 NS A are used to debug the following target devices that belong to the 78K 0 Series of 8 bit single chip microcontrollers e uPD780816 A Subseries This manual is intended for engineers who will use the IE 78KO NS P04 and the IE 780818 NS EM4 with the IE 78K0 NS A to perform system debugging Engineers who use this manual are expected to be thoroughly familiar with the target device s functions and use methods and to be knowledgeable about debugging When using the IE 78KO NS P04 and the IE 780818 NS EM4 refer to not only this manual supplied with the IE 780818 NS EMA but also the manual that is supplied with the IE 78K0 NS A IE 78K0 NS P04 IE 780818 NS EM4 IE 78K0 NS A User s Manual User s Manual Basic specifications General System configuration Parts names Part names External interface functions Installation Differences between target devices and target interface circuits This manual s purpose is to explain various debugging functions that can be performed when using the
5. 48 fx 192 fx 6 Clock Monitor The clock monitor is implemented in the following way Figure 5 1 Clock Monitor Implementation X1 emulation probe X2 Clock Monitor CPU Peripherals When the Clock Monitor shall be used the clock for the Clock Monitor has to be supplied via the X1 pin of the emulation probe Due to this it may be necessary to use two separate clock supplies one for the CPU and the peripherals on the IE Z8KO PO4 socket X2 and the other for the Clock Monitor via the X1 pin of the emulation probe 55 56 IE 78KO NS PO4 IE 780818 NS EM4 NEC Memo NEC Appendix A IE 78K0 NS P04 IE 780818 NS EM4 Product Specifications Product name Operating temperature Humidity Storage temperature Power supply Table A 1 Connectors on IE 78K0 NS P04 Board and IE 780818 NS EM4 Board IE 78KO NS P04 IE 780818 NS EM4 0 to 50 C 10 to 80 RH no condensation 15 to 60 C Power supply capacity DC 200mA MAX 1 0 W 5 V Name Description IE 78K0 NS P04 Name Description IE 780818 NS EM4 CN1 CN5 Emulation board connectors CN2 CN6 IE 78K0 NS P04 Emulator connections CN3 CN7 CN4 CN8 CN5 CN9 CN6 CN10 CN7 Probe board connectors CN11 Probe connector CNS IE 78K0 NS P04 JP1 Disconnect USER Reset CN9 JP2 CAN TxD driver buffer type CN10 JP3 CAN
6. 62 IE 78K0 NS P04 IE 780818 NS EM4 NEC Remark Table C 1 Connector CN11 to Emulation Probe 2 2 C No Real chip Pin Function 9 Pinos Pd os Pinos be no ew ws ke Nc LG 0 je P5 D m NC D NC NC NC NC GND The meaning of the symbols and figures in the Emulation Probe column is as follows GND Ground clip NC Not connected 1 120 Emulation probe tip pin numbers Although NEC has taken all possible steps essag e toensurethatthe documentation supplied to our customers is complete bug free From and up to date we readily accept that errors may occur Despite all the care and precautions we ve taken you may Name encounter problems in the documentation Please complete this form whenever is Company you d like to report errors or suggest improvements to us Tel FAX Address Thank you for your kind support North America Hong Kong Philippines Oceania Asian Nations except Philippines NEC Electronics Inc NEC Electronics Hong Kong Ltd NEC Electronics Singapore Pte Ltd Corporate Communications Dept Fax 852 2886 9022 9044 Fax 65 250 3583 Fax 1 800 729 9288 1 408 588 6130 Eun quis tronics Hong Kong Ltd eae iconductor Technical Hotli ectronics Hong Kong Ltd emiconductor Technical Hotline RES E a ene ES Irae MOE cel Brat Fax 044 548 7900 Technical Documentation Dept Fax 02 528 4411 Fax 49 211 6503 2
7. FPGA Mode Selection Jumper Position ESN Function Open Pull up Asynchronous peripheral mode FPGA s are loaded by IE default Close GND Reserved Internal use Jumper JP6 Table 3 12 JTAG Mode Jumper Position JTAG Function 1 2 Pull up Reserved Internal use 2 3 GND Reserved Internal use default Jumper JP7 Table 3 13 Reference Voltage Setting Jumper Position LVREF1 Function 1 2 Vcc Reserved Internal use default 2 3 LVoo Reserved Internal use NEC IE 78KO NS PO4 IE 780818 NS EM4 Jumper JP8 Table 3 14 Reference Voltage Setting Jumper Position LVREFO Function 1 2 Vcc Reserved Internal use default 2 3 LVoo Reserved Internal use Jumper JP9 Table 3 15 Future Function Jumper Position Function Open Pull up Reserved Internal use default Close GND Reserved Internal use LED Indicator Table 3 16 LED Indicator D1 D2 D3 LED Condition Function LED1 green Blinking FPGA download ongoing LED1 green On FPGA download complete LED1 green Off FPGA not programmed LED2 yellow Blinking Not used LED2 yellow On Voc on LED2 yellow Off Voc off LED3 red Blinking Not used LEDS red On Not used LEDS red Off Not used Remark Not used LED s are reserved for future functions 27 28 IE 78KO NS PO4 IE 780818 NS EM4 NEC 6 Connect
8. default 3 4 EM board selection 1 5 6 EM board selection 2 Table 3 6 Sub Clock Selection Jumper Position Function 1 2 On EM board default 3 4 On target system 5 6 On main board 4 Connect the option board G 78KOH to the main board G 780009 5 Setup of the emulation board IE 78K0 NS P04 24 NEC IE 78KO NS PO4 IE 780818 NS EM4 Figure 3 3 Emulation Board IE 78K0 NS P04 Jumper Positioning JP7 D o X co n i o m Jumper JP1 Table 3 7 Reference Voltage Pin of AD Converter Jumper Position AAVREF Function Open Target Connected to target selected reference voltage default Close GND Reference voltage Remark Close jumper JP1 when the AD converter is not used Jumper JP2 Table 3 8 Ground Voltage Pin of AD Converter Jumper Position AAVss Function Open Target Connected to target selected ground base default Close GND Internal digital ground Remark Close jumper JP2 when the AD converter is not used 25 IE 78K0 NS P04 IE 780818 NS EM4 NEC Jumper JP3 Table 3 9 JTAG Mode Jumper Position JTAG Function Open Pull up Reserved Internal use default Close GND Reserved Internal use Jumper JP4 Table 3 10 JTAG Mode Jumper Position JTAG Function Open Pull up Reserved Internal use Close GND Reserved Internal use default Jumper JP5 Table 3 11
9. IE 78KO NS A s jumper JP8 There is no need to make any other settings via the integrated debugger ID78K0 NS a When using a ceramic oscillator or crystal resonator tems to be prepared Parts board supplied with IE 78K0 NS Capacitor CA Ceramic oscillator or crystal resonator Capacitor CB Resistor Rx Solder kit Steps 1 Solder onto the supplied parts board as shown below the target ceramic oscillator or crystal resonator resistor Rx capacitor CA and capacitor CB all with suitable oscillation frequency 40 NEC IE 78K0 NS P04 IE 780818 NS EM4 Figure 3 17 Connections on Parts Board When Using Subsystem Clock or User Mounted Clock Parts holder X1 of IE 78K0 NS P04 Pin No Connection 2 2 13 Capacitor CB 3 3 12 Capacitor CA 4 11 Ceramic oscillator or crystal resonator 5 10 Resistor Rx 7 8 9 Short 10 MQ ANN HCU04 HCU04 eee CLOCK OUT 5 ZR EMT cm 4 m11 E L T ee OK 3 13 ICA CB 4 2 1 EN EE E IR EN ecd Remark The sections enclosed in broken lines indicate parts that are attached to the parts board IE 78K0 NS P04 IE 780818 NS EM4 NEC 2 Prepare the IE 78KO NS P04 lt 3 gt Remove the crystal oscillator that is mounted in the IE 78KO NS P04 s socket the socket marked as X1 lt 4 gt Connect the parts board from lt 1 gt above to the socket X1 from which the crystal os
10. MHz Shortcut 6 8 Internal emulation board When using clock mounted by user Includes oscillator circuit Other than 8 00 MHz External Shortcut 6 8 When using external clock Caution When using an an user defined clock or external clock open the configuration dialog when starting the integrated debugger ID78K0 NS and select External in the area Clock for selecting the CPU s clock source this selects the user s clock Remark The IE 78K0 NS P04 factory settings are those listed above under when using clock that is already mounted on emulation board 1 When using clock that is already mounted on emulation board When the IE 78K0 NS P04 is shipped an 8 00 MHz crystal resonator is already mounted in the IE 78KO NS PO4 X4 socket When using the factory set mode settings there is no need to make any other hardware settings When starting the integrated debugger ID78KO NS open the configuration dialog and select Internal in the area Clock for selecting the CPU s clock source this selects the emulator s internal clock NEC IE 78K0 NS P04 IE 780818 NS EM4 2 When using clock mounted by user The settings described under either a or b are required depending on the type of clock to be used When starting the integrated debugger ID78KO NS open the configuration dialog and select External in the area Clock for selecting the CPU s clock source this selects the emulat
11. NS P04 IE 780818 NS EM4 AC adapter Emulation probe 4 Conversion socket conversion adapter 12 NEC IE 78KO NS PO4 IE 780818 NS EM4 Note The packages emulation probes and conversion sockets conversion adapters are listed below Conversion Socket Package Emulation Probe Conversion Adapter NQPACK064SB 64 pin plastic QFP YQPACK064SB pin plastic Q NP 64GK Q GK type HQPACK064SB140 YQSOCKET064SBF The NP 64GK is a product of Naito Densei Machidaseisakusho Co Ltd The sockets are products of TOKYO ELETECH CORPORATION IE 78KO NS PO4 IE 780818 NS EM4 NEC 1 2 Hardware Configuration Figure 1 2 shows the IE 78KO NS P04 IE 780818 NS EM4 s position in the basic hardware configura tion Figure 1 2 Basic Hardware Configuration Dedicated bus interface IE system A IE 78KO NS P04 IE 78K0 NS A IE 780818 NS EM4 Host machine Interface board 78K0 Emulator Emulation board i This product Interface card Emulation probe NP 64GK 14 NEC IE 78K0 NS P04 IE 780818 NS EM4 1 3 Basic Specifications The IE 78KO NS P04 IE 780818 NS EM4 s basic specifications are listed in Table 1 1 Table 1 1 Basic Specifications Parameter Description Target device uPD780816 A Subseries Main system clock 8 38 MHz Subsystem clock typical 32 768 KHz External Pulse input Internal Mounted on emulation board Voltage support 4 0 to 5 5 V same as target de
12. are provided for illustrative purposes in semiconductor product operation and application examples The incorporation of these circuits software and information in the design of customer s equipment shall be done under the full responsibility of customer NEC assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits software and information While NEC endeavours to enhance the quality reliability and safety of NEC semiconductor products customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely To minimize risks of damage to property or injury including death to persons arising from defects in NEC semiconductor products customers must incorporate sufficient safety measures in their design such as redundancy fire containment and anti failure features NEC semiconductor products are classified into the following three quality grades Standard Special and Specific The Specific quality grade applies only to semiconductor products developed based on a customer designated quality assurance program for a specific application The recommended applica tions of a semiconductor product depend on its quality grade as indicated below Customers must check the quality grade of each semiconductor product before using it in a particular application Standard Computers office equipment communications equipment test and measu
13. product from Japan is regulated by the Japanese government To export this product may be prohibited without governmental license the need for which must be judged by the customer The export or re export of this product from a country other than Japan may also be prohibited without a license from that country Please call an NEC sales representative The information in this document is current as of 24 11 2000 The information is subject to change without notice For actual design in refer to the latest publications of NEC s data sheets or data books etc for the most up to date specifications of NEC semiconductor products Not all products and or types are available in every country Please check with an NEC sales representative for availability and additional information No part of this document may be copied or reproduced in any form or by any means without prior written consent of NEC NEC assumes no responsibility for any errors that may appear in this document NEC does not assume any liability for infringement of patents copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products No license express implied or otherwise is granted under any patents copyrights or other intellectual property rights of NEC or others Descriptions of circuits software and other related information in this document
14. user 3 External clock If the target system includes an internal clock select either 1 Clock that is already mounted on emulation board or 2 Clock that is mounted by user An internal clock connects the target device to an oscillator and uses the target device s internal oscillation circuit An example of an external circuit is shown in part a of Figure 3 5 During emulation the oscillator that is mounted on the target system is not used Instead it uses the clock that is mounted on the emulation board which is installed for the IE 78KO NS A If the target system includes an external clock select 3 External clock An external clock supplies a clock signal from outside of the target device and does not use the target device s internal oscillation circuit An example of an external circuit is shown in part b of Figure 3 5 Figure 3 5 External Circuits Used as System Clock Oscillation Circuit Target device Target device External clock X1 or CL1 X1 or CL1 I X2 or CL2 X2 or CL2 30 NEC IE 78K0 NS P04 IE 780818 NS EM4 3 2 2 Main System Clock Selections 1 Clock that is already mounted on emulation board A crystal resonator is already mounted on the emulation board Its frequency is 8 0000 MHz Figure 3 6 When Using Clock That Is Already Mounted on Emulation Board IE 78KO NS A IE 78K0 NS P04 Target system Mounted oscillator Emulation probe to be used Oscillator
15. 18 NS EM4 comprises the following components Please check that all these items are included in the package 1 IE 780818 NS EM4 x 1 2 Screws Set x 1 3 Registration Card x 1 4 Readme First x 1 5 List of Contents x 1 6 Floppy Disk with Device File and FPGA Data x 1 7 User s Manual this manual x 1 17 18 IE 78K0 NS P04 IE 780818 NS EM4 NEC 2 2 Parts of the IE 78K0 NS P04 Figure 2 1 IE 78K0 NS P04 External View and Part Names 2 2 2 i 1 1 1 CNIS SR NS RT CNTT SS R133 2 CNI RI27 Sete SE GE am RIO R84 CNS ICIO KIEREN 1 93 pe RIBS i 39 E a a 3 TP26 SP Ri51 n Z T0 Rist 2 DO E GES M e e i s B T Ree CN10 E C110 1927 1128 R58 1 dig 99 o R173 GE E 10 ici ENS C73 7 o gt RI74 id 007277 cai Foz z OD R175 ave R81 C106 HN RIGS 8 S R82
16. 74 South America Taiwan NEC do Brasil S A NEC Electronics Taiwan Ltd Fax 55 11 6465 6829 Fax 02 2719 5951 would like to report the following error make the following suggestion Document title Document number Page number If possible please fax the referenced page or drawing Document Rating Excellent Clarity Technical Accuracy Organization
17. 8KO NS PO4 IE 780818 NS EM4 Figure 4 3 Equivalent Circuit 3 from Emulation Circuit Probe IE 78KO NS A side X20 Open VPP Test Open 53 54 IE 78K0 NS P04 IE 780818 NS EM4 NEC 4 2 Differences in Port Functions 1 The subclock has to be build up with a crystal or an oscillator A RC combination can not be used 2 The conversion time of the AD converter is different to the device please refer to the Chapter 5 Restrictions 3 The clock monitor can not be emulated as on the device please refer to the Chapter 5 Restrictions 4 3 Differences in SFR Registers Caution The emulator has a register to emulate the powerfail detection which is not existing at the real chip The name of the register is DAMO SFR Adr OxFF9C This register has to be set to the value 0x01 by the user program 4 4 Target Interface Circuit The purpose of the target interface circuit is to have the same operations as the target device performed in the IE 78KO NS A It comprises the emulation device and various dates CMOS TTL and othes ICs When debugging is performed with the target system connected to the IE 78KO NS A the lE 78KO NS A target interface circuit performes emulation as though the actual target device were operating in the target system The target device has a CMOS LSI configuration The target interface circuit emulator device also has a CMOS LSI configuration and is virtually identical to the target device in terms of DC c
18. IE 78KO NS P04 and the IE 780818 NS EM4 IE 78KO NS PO4 IE 780818 NS EM4 Terminology The meanings of certain terms used in this manual are listed below Term Meaning Emulation device This is a general term that refers to the device in the emulator that is used to emulate the target device It includes the emulation CPU Emulation CPU This is the CPU block in the emulator that is used to execute user generated programs Target device This is a device a uPD780816 A Subseries chip that is the target for emulation Target system This includes the target program and the hardware provided by the user When defined narrowly it includes only the hardware IE system This refers to the combination of the IE 78K0 NS A the IE 78K0 NS P04 and the IE 780818 NS EM4 Conventions Data significance weight Higher digits on the left and lower digits on the right Note Footnote for item marked with Note in the text Caution Information requiring particular attention Remark Supplementary information Related Documents The related documents indicated in this publication may include preliminary versions However preliminary versions are not marked as such Document Name Document Number NEC English Japanese IE 78K0 NS A To be prepared To be prepared IE 78K0 NS P04 IE 780818 NS EM4 This manual To be prepared ID78KO NS Integrated Debugger Reference Windows
19. P04 IE 780818 NS EM4 NEC The above steps configure a circuit and enable clock output to be supplied from the mounted oscilla tor to the emulation device Figure 3 20 IE 78K0 NS A side CLK IN Target system 5 O OO O OO Oo SI 3 When using an external clock Short pins 3 and 4 on the IE 78K0 NS A s jumper JP8 There is no need to make any settings via the integrated debugger ID78K0 NS Figure 3 21 IE 78K0 NS A side JP8 Parts holder L OO S CLK IN oo O O J6 Target system 5 NEC IE 78KO NS PO4 IE 780818 NS EM4 3 3 2 Examples of Subsystem Clock Setting 1 Standard Clock 32 768 KHz offered by the Main Board G 780009 Main Board JP8 5 6 Emulation Board IE 78K0 NS P04 X1 with shortcut between 6 8 ID78KO NS don t care 2 Clock mounted by the User on the Emulation Board Main Board JP8 1 2 Emulation Board IE 78KO NS P04 X1 with oscillation circuit ID78KO NS don t care 3 External Clock on the Target Hardware Main Board JP8 3 4 Emulation Board IE 78K0 NS P04 X1 with shortcut between 6 8 ID78KO NS don t care 45 46 IE 78KO NS PO4 IE 780818 NS EM4 NEC 3 4 Jumper Settings When using the IE 78KO NS PO4 and the IE 780818 NS EM4 set the jumpers as shown below Table 3 22 Jumper Settings on IE 78K0 NS A JP2 JP3 JP4 JP6 JP7 JP8 Short 2 3 1 2 1 2 3 4 1 2 5 6 Table 3 23 Jumpe
20. RxD receive buffer type CN11 CN12 CN13 CN14 Test connector CN15 only for internal use by NEC CN16 CN17 CN18 JP1 Analog reference voltage JP2 GND pin of A D Converter JP3 Reseved only for internal use by NEC JP4 JTAG mode selection only for internal use by NEC JP5 FPGA mode selection JP6 JTAG mode selection only for internal use by NEC JP7 LVREF1 JP8 LVREFO IE 78KO NS PO4 IE 780818 NS EM4 57 58 IE 78KO NS PO4 IE 780818 NS EM4 NEC Memo NEC IE 78KO NS PO4 IE 780818 NS EM4 Appendix B Conversion Socket Adapter Package Drawings and recommended Board Mounting Pattern The following sockets and socket adapters are available for the connection of the probe or device Soldering socket NOPACKOG4SB Probe adapter YQPACKOGASB High adapter YQSOCKET064SBF Device Lid HOPACKOG4SB140 59 60 IE 78KO NS PO4 IE 780818 NS EM4 NEC Memo IE 78K0 NS P04 IE 780818 NS EM4 NEC Appendix C Pin Correspondence Tables of Emulation Probe Table C 1 Connector CN11 to Emulation Probe 1 2 LL Lu ke lt a a gt lt a x lt K O Pin 34 P70 T100 TOOO SS P26 T150 TO50 Pin 18 SE P22 SCK2 22 P23 PCL Pin 21 51 P11 ANI1 P21 S02 59 Pinzs Je Pin 27 55 PO3 INTP3 PO1 INTP1 58 56 PO2 INTP2 POO INTPO a OIZIOIOJOJO Z O Z Z Z Z o 2 5 2 2 2 2 8 a CIS Glo CL1 CCLK Pin 44 61
21. ble 3 13 Reference Voltage Setting ui EE EE ER KERE EE EER RR E RE EER nhan hn nra aaa ta KERE EE ERK REG Ee EER ana 26 Table 3 14 Reference Voltage Setting rs EER EE EE ERK RE ER EE ER KERE EE EER RR E RE EER EER KEER EER KERE annuas anna saa Ee 26 Table 3 15 Future Function EE EE EE RR EER ER EER EE EER ER nran EN Anan EER EE a ananas assa annua uaa EE EER EER KERK EE EER EER KERK EE EE 27 Table 3 16 LED Indicator D1 D2 D3 nn eei EER ERK RE EER EE EER RR ESE EER Re EE EE EER KEER RE ER KERE ER Pasa ssa Ee EER Ee 27 Table 3 17 gt E 29 Table 3 18 DCAN Out Transmit Buffer Selection EE EE RR essei ERK RE essei ER KERE EE Ee KEER nana Ee Rek anna ee Ee 29 Table 3 19 DCAN in Buffer Type Selection nn RR EER EE RR ER ER EE EER KEER RE ER ARE EER Ee EER EER Ee KERE 29 Table 3 20 Main System Clock Settings ii esie ER REK EE EER KEER RR ERK EE EE RR E ER RE aan RR KEER Ee Ek EER EER KERE 40 Table 3 21 Subsystem Clock Settings EE EE ERK RE EE EE ER KERE EE EER ER ee EE EE EER ananas saa RR ER EER PERKE EE Ee KERE 40 Table 3 22 Jumper Settings on IE 78KO NS A nn EE EER EER KERE Ee KEER nana hann uasa anas EE EER REK EE EER Seen 46 Table 3 23 Jumper Settings on IE 78K0 NS P04 ese ee eese ER EER RE ER KERE Ee nna atn EER EE Geek RR ana saa Ee assa sara sana 46 Table 3 24 Jumper Settings on IE 780818 NS EMA e eeue esse eek ee Ee EE EER RR EER Ee KEER RR ER annua ananas aa Ee Rek KERE ee EE EE 46 Table 5 1 Differen
22. ce between the Conversion Time ir EE ER EE EER nnns EE nna KERR EE EE nna ER EER ee EE 55 Table C 1 Connector CN11 to Emulation Probe 1 2 RR EE EER EE RR ER RE EE EER KERE ER KERR ER EER Geek ER Ee ee EE 61 Table C 1 Connector CN11 to Emulation Probe 2 2 eee EE EER EE RR ER RE EE ERK RE EER EER KERE EE eek ER Ee ee EE 62 10 IE 78KO NS PO4 IE 780818 NS EM4 NEC MEMO NEC IE 78KO NS PO4 IE 780818 NS EM4 Chapter 1 General The IE 78KO NS P04 and the IE 780818 NS EM4 are development tools for efficient debugging of hardware or software when using one of the following target devices that belong to the 78K 0 Series of 8 bit single chip microcontrollers This chapter describes the emulation board s and probe board s system configuration and basic specifi cations Target device UPD780816 A Subseries 11 IE 78K0 NS P04 IE 780818 NS EM4 NEC 1 1 System Configuration Figure 1 1 illustrates the IE 78KO NS P04 IE 780818 NS EM4 s system configuration Figure 1 1 System Configuration Debugger ID78K0 NS Device file ral ml v Control software Host machine PC 9800 Series or IBM PC AT compatibles Interface board Interface board Interface board IE ZOOOO PCI IF A 1E 70000 98 IF C IE ZOOOO PC IF C or or Interface cable Interface cable NS IF Cable IE Z8KO NS A Me In circuit emulator NS CARD MC CARD Cable Cable IE 78KO
23. cillator was removed see lt 3 gt above Check the pin 1 mark to make sure the board is mounted in the correct direction 5 Install the IE 78KO NS P04 and the IE 780818 NS EM4 in the IE 78KO NS A The above steps configure a circuit and enable clock output to be supplied from the mounted oscilla tor to the emulation device 42 Figure 3 18 IE 78K0 NS A side CLK IN Target System Remark The section enclosed in broken lines indicates parts that are attached to the parts board NEC IE 78KO NS PO4 IE 780818 NS EM4 b When using a crystal oscillator Items to be prepared Crystal oscillator see pinouts shown in Figure 3 20 Figure 3 19 Crystal Oscillator When Using Subsystem Clock or User mounted Clock NC Vcc GND CLOCK OUT lt Steps gt 1 Prepare the IE 78KO NS PO4 2 Remove the crystal oscillator that is mounted in the IE 78KO NS P04 s socket the socket marked as X1 3 Connect the parts board from 2 above to the socket X1 from which the crystal oscillator was removed Insert the crystal oscillator into the socket so as to align the pins as shown below Crystal oscillator o Socket Crystal Oscillator Pin Name Socket Pin No NC Vcc 1 14 NC 1 ls GND 7 3 12 4 11 CLOCK OUT 8 5 10 Voc 14 6 9 GND CLOCK OUT 7 8 lt 4 gt Install the IE 78KO NS P04 and the IE 780818 NS EM4 in the IE 78K0 NS A 43 44 IE 78K0 NS
24. correct direction 5 Make sure that the parts board mounted in the X2 socket on the emulation board is wired as shown in Figure 3 10 above 6 Install the IE 78KO NS P04 and the IE 780818 NS EM4 in the IE 78K0 NS A The above steps configure a circuit and enable clock output to be supplied from the mounted oscillator to the emulation device Figure 3 13 IE 78K0 NS A side Emulation Device IE 78K0 NS A side Emulation device 10 MQ 6 O HCUO4 HCU04 X1 9 18 ir oi 5 SEH A Y Rx B X 10 14 pes nnd VHC157 Ex AE CA F CB x10 MEL D A 2 Remark The sections enclosed in broken lines indicate parts that are attached to the parts holder NEC IE 78K0 NS P04 IE 780818 NS EM4 b When using a crystal oscillator Items to be prepared Crystal oscillator see pinouts shown in Figure 3 15 Figure 3 14 Crystal Oscillator When Using Main System Clock or User mounted Clock NC e e Vcc GND e e Clock Out Steps 1 Prepare the IE 78K0 NS P04 2 Remove the parts holder inserted in the socket marked X2 on the IE 78K0 NS P04 3 Connect the parts board from 2 above to the socket X2 from which the parts holder was removed Insert the crystal oscillator into the socket so as to align the pins as shown in the figure below Figure 3 15 Pin Alignment of Crystal Oscillator and Socket Crystal oscillator xX Socke
25. der and crystal resonator ceramic resonator or crystal oscillator ID78KO NS External 3 External Clock on the Target Hardware Main Board JP6 3 4 JP7 1 2 Emulation Board X2 with shortcut between 6 8 ID78K0 NS External 39 IE 78K0 NS P04 IE 780818 NS EM4 NEC 3 3 Subsystem Clock 3 3 1 Subsystem Clock Setting Table 3 21 Subsystem Clock Settings IE 78K0 NS P04 IE 78K0 NS A Parts holder X1 JP8 Subsystem Clock Frequency to be Used When using clock that is already mounted on 32 768 KHz Short 6 8 Short 5 6 main board When using user Includes oscillator Short 1 2 mounted clock Other than 32 768 KHz When using external clock Not used Short 3 4 Caution Jumper JP8 which is used to select the board s clock or an external clock should be set only after turning off the IE 78K0 NS A s power 1 When using clock that is already mounted on main board When the IE 78K0 NS P04 IE 780818 NS EMA are shipped there is no 32 768 KHz crystal on the board The parts holder on X1 is shortened between 6 and 8 Short pins 5 and 6 of the IE 78K0 NS A s main board to use the 32 768 KHz crystal of the emulator There is no additional settings of the integrated debugger ID78KO NS necessary 2 When using the user mounted clock on the IE 78K0 NS P04 The settings described under either a or b are required depending on the type of clock to be used Short pins 1 and 2 on the
26. ennssesenesesaenessnsneeeasensesanaeessssensessanenseseanenesaneess 12 Figure 1 2 Basic Hardware Configuration nn hannah anna EE EER Rek KERE ee KERR ee ee ee 14 Figure 2 1 IE 78K0 NS P04 External View and Part Names ui ER EER Ee ER ER KERSE EER KEER ee Ee ee 18 Figure 2 2 IE 780818 NS EM4 External View and Part Names ee EER ER EER Ee ER ER ER EE GER KEER ee annua 19 Figure 3 1 IE 78K0 NS A Inside ER ek EER ewe Ek ee eek Se ee eek Re ae ek EER R ariaa 22 Figure 3 2 Main Board G 780009 Jumper Positioning sn EER ER ER BE EER enin nnn nana na RE EER ee Ee nah 23 Figure 3 3 Emulation Board IE 78K0 NS P04 Jumper Positioning eee EE EER EER RE Ee ee Ee ee 25 Figure 3 4 Emulation Board IE 780818 NS EM4 Jumper Positioning ns 28 Figure 3 5 External Circuits Used as System Clock Oscillation Circuit 30 Figure 3 6 When Using Clock That Is Already Mounted on Emulation Board EE 31 Figure 3 7 When Using User mounted Clock eres EE EER RR senes EE EER nnns EE EER KEER EE EER Rek EER rasan anas EE Ee ee 31 Figure 3 8 When Using an External Clock use ees ee EE EE RR ER EE EER RR KERE ER EE EER ER nana nhan Ee RE EE Ee Rek KERE ee KERR ee ee ee 32 Figure 3 9 When Using Standard Clock Mounted on Main Board 32 Figure 3 10 When Using Clock Mounted on the Emulation Board 33 Figure 3 11 Using an External Clock mounted on the Target Hardware 33 Figu
27. ey Re eene wed enne gee ew De de Re Be GE ew 34 3 2 5 Examples of Main System Clock Setting eese EE Ee AAR REG EA RR nnn nnns 39 3 3 Subsystem Clock de 0 bee 40 3 3 1 Subsystem Clock Setting ccesccccecsteeesscereceeceeetstccsseseerescieeeceanee caseecceenseesesnceeedvaiecesenncessedeeeressieeees 40 3 3 2 Examples of Subsystem Clock Setting sens 45 3 4 Jumper SOHINGS issie 46 3 5 External LE Le RE PL 47 Chapter 4 Differences among Target Devices and Target Interface Circuits 49 4 1 Input Output Signals gqme 50 4 2 Differences in Port Functions esse ER REKE eee e ens RE sees nennen KERE REGEER RR EER R SG E EER KERR REGEER RR nnmnnn SEE EER KERE RE EE 54 4 3 Differences im SFR Registers uie ie ees Eege 54 4 4 Target Interface Circuit IE EE N RR EE IE OE N OE 54 Chapter 5 RestriCtiOnS N OE EN EE N EE EE EN 55 Appendix A IE 78K0 NS P04 IE 780818 NS EM4 Product Specifications esse esse ees se ee see ee ee ee se ee 57 Appendix B Conversion Socket Adapter Package Drawings and recommended Board Mounting Pattern 1 EE Ee ae dek EE EE Ee ee EE EE 59 Appendix C Pin Correspondence Tables of Emulation Probe se 61 IE 78K0 NS P04 IE 780818 NS EM4 NEC List of Figures Figure 1 1 System Configuration ssscccsseoeecssseesssneccnssenses
28. haracteristics and AC characteristics when operating on Von 4 0 to 5 5 V However where emulation device signal input output is performed via gates in the target interface circuit DC and AC characteristics differ from those of the target device In particular regarding AC characteristics there is a date delay time which differs from date to date each time a gate is passed through The above points must be taken into consideration when designing the target system Caution When the IE 78K0 NS A and IE 78K0 NS P04 and IE 780818 NS EM4 are connected to the target system 4 0 to 5 5 V must be supplied as the target system power supply Voo NEC IE 78KO NS PO4 IE 780818 NS EM4 Chapter 5 Restrictions 1 Starting up the IE system without target board connected makes initial values for ports indefinite 2 The RESET value of the CANES register is not correct As workaround the CANES register has to be reset by software 3 Power Fail Detector It is necessary to set the DAMO register dedicated register when the ICE is used 4 The voltage level of Ver cannot be detected during self programming The feedback information bit VrP of the FLPMC register will be always read as 1 5 AD Converter The conversion time of the AD Converter is different than on the real device Table 5 1 Difference between the Conversion Time Device Emulation Tool 144 fx 144 fx 120 fx 120 fx 96 fx 96 fx 72 fx 288 fx 60 fx 240 fx
29. igure 4 3 Equivalent Circuit 3 from Emulation Circuit eese EER EE KEER EE ER KERE EE Ee KERR ee Ee ee 53 Figure 5 1 Clock Monitor Implementation nn EE EER anna EE EER nna EER naa KERE e ee Ee ee 55 NEC IE 78K0 NS P04 IE 780818 NS EM4 List of Tables Table 1 1 Basic Specifications Ed ee Ek ee eb eg ed OE ER EER EG Oes 15 Table 2 1 Names of IE 78K0 NS P04 and IE 780818 NS EMA Parts se ees Ese eek RE Ee ee Ee nnn ESE ee EE Ee 20 Table 4 1 Flash HOM Mode ass ee ee ee Ge ee Auer d Ee GE ee Ee bu ge ee 23 Table 3 2 Internal Mode EHE 23 Table 3 3 Internal Mode RE N EE EE nnna 24 Table 3 4 Main Clock Selection N N anra sanata naa a aan na anna asas anas aaa an nass san n as aaaa 24 Table 3 5 Main Clock Doubler Selection 4 EE EER EER RE ER EE EER REKE EE EE EER EE EE EER REG Ee asas ananas anra saa EE Ee EER Ee 24 Table 3 6 Sub Clock Selection E 24 Table 3 7 Reference Voltage Pin of AD Converter ee EER EE EER EE RR ER EE EER ARK RE EER KEER nsa EE EER K ERGER ee EE Ee 25 Table 3 8 Ground Voltage Pin of AD Converter use ees EER ER EER EE EER EER KEER nani ER Rek ESE Ee KEER nana anna KERE Ee ee EE EE 25 Table e EE 26 Tabl amp 3 10 JTAG MOGE E 26 Table 3 11 FPGA Mode Selection sssscccssecccssseenscsneeccesersesssnensensenseaseeeesaneesssenceasseneesanasssssanessuaaeeseneaes 26 Table 3 12 JTAG Mode is EE Ee 26 Ta
30. lation probe connector CN11 User VDD LED NEC E 780818 NS EM4 SS 71107 1 vn MEM o WE MADE IN GERMANY ANTI STATIC 19 IE 78K0 NS P04 IE 780818 NS EM4 NEC 20 Table 2 1 Names of IE 78K0 NS P04 and IE 780818 NS EM4 Parts Description IE 78KO NS P04 Name Description IE 780818 NS EM4 CN5 Emulation board connectors CN6 IE 78K0 NS P04 Emulator connections CN7 CN8 CN9 CN10 Probe board connectors CN11 Probe connector IE 78KO NS P04 JP1 Disconnect USER Reset JP2 CAN TxD driver buffer type JP3 CAN RxD receive buffer type Test connector only for internal use by NEC Analog reference voltage GND pin of A D Converter Reseved only for internal use by JP3 NEC JPa JTAG mode selection only for internal use by NEC JP5 FPGA mode selection JPG JTAG mode selection only for internal use by NEC JP7 LVREF1 JP8 LVREFO NEC IE 78KO NS PO4 IE 780818 NS EM4 Chapter 3 Installation This chapter describes the method for the connection of the IE 78K0 NS P04 the IE 780818 NS EM4 and the emulation probe Installation of the IE 78KO NS P04 Installation of the IE 780818 NS EM4 Installation of the emulation probe Setting of the jumpers for the clock selection The power supply of the IE 78KO NS A and the target system must be switched off when connecting or disconnecting any item Caution Usage of incorrect connection meth
31. lied from the oscillator on the Main Board G 78009 circled is used 32 NEC IE 78K0 NS P04 IE 780818 NS EM4 2 Clock mounted by user on the emulation board A clock that matches the specifications set by the user can be mounted on the IE 78KO NS P04 The resonator or oscillator to be used is mounted on a parts holder and that parts holder is installed on the IE 78KO NS P04 This is useful if you want to perform debugging at a different frequency from that of the clock mounted beforehand Figure 3 10 When Using Clock Mounted on the Emulation Board IE 78K0 NS A IE 78KO NS P04 Target System Parts Holder Emulation Probe Resonator or Resonator Oscillator used esonato not used Remark The clock supplied from the resonator or oscillator on the IE 78KO NS P04 circled is used 3 External clock on the target hardware The external clock on the target system can be used via an emulation probe Figure 3 11 Using an External Clock mounted on the Target Hardware HL Clock generator to be used IE 78K0 NS A Emulation probe Remark The clock supplied by the clock generator circuit circled in the above figure is used 33 34 IE 78KO NS PO4 IE 780818 NS EM4 NEC 3 2 4 Main system clock settings Table 3 20 Main System Clock Settings CPU Clock Source Frequency of Main System Clock IE 78K0 NS P04 S y y Selection ID When using clock that is already mounted on 8 00
32. nals lt 1 gt Signal which are input or output from the gate array lt 2 gt Signals those are input or output from the uPD78P0308 3 Signals that are input or output from the uPD780009 emulation CPU 4 Other signals The IE system circuit is used as follows for above mentioned signals 1 Signals which are input or output from the gate array POO to PO3 P10 ANIO to P17 ANI7 ANI8 to ANI11 P20 to P27 P40 to P47 P50 to P57 P63 to P67 P70 P71 AVDD AVREF AVss CRxD 2 Signals those are input or output from the uPD78PO308 None 3 Signals that are input or output from the PD780009 emulation CPU X1 RESET 4 Other signals VDDO Vooi Vss0 Vss1 X2 CTxD Vppi Test 50 NEC IE 78KO NS PO4 IE 780818 NS EM4 Probe POO to P03 P10 ANIO to P17 ANI7 ANI8 to ANI11 AVDD AVREF AVss CRxD P20 to P27 P40 to P47 P50 to P57 P63 to P67 P71 P72 Figure 4 1 Equivalent Circuit 1 from Emulation Circuit IE 78KO NS A side Emulation Data Array O uPD78P0308 51 52 IE 78KO NS PO4 IE 780818 NS EM4 NEC Figure 4 2 Equivalent Circuit 2 from Emulation Circuit Probe IE 78K0 NS A side 1000 ATKO RESET o O uPD780009 xi o Emulation CPU P ch sl 25J278 P ch MOS FET BD 1 FPGA N ch el 25K1697 N ch MOS FET Internal circuit 100 Q UPC393 VDDO VDD1 I qe UF B MQ Vss0 Vss1 O 1 NEC IE 7
33. not used Remark The clock that is supplied by the IE 78KO NS P04 oscillator encircled in the figure is used 2 Clock that is mounted by user The user is able to mount any clock supported by the set specifications on the IE 78KO NS P04 First mount the oscillator on the parts holder then attach the parts board to the IE 78KO NS P04 This method is useful when using a different frequency from that of the pre mounted clock Figure 3 7 When Using User mounted Clock IE 78KO NS A IE 78K0 NS P04 Target system Parts i board Emulation probe Oscillator Oscillator to be used not used Remark The clock that is supplied by the IE 78K0 NS P04 oscillator encircled in the figure is used 31 IE 78K0 NS P04 IE 780818 NS EM4 NEC 3 External clock An external clock connected to the target system can be used via the emulation probe Figure 3 8 When Using an External Clock Clock generator to be used IE 78K0 NS A Emulation probe Remark The clock supplied by the target system s clock generator encircled in the figure is used 3 2 3 Subsystem Clock Selections 1 Standard clock offered by the main board A crystal oscillator is already mounted on the main board The frequency is 32 768 kHz Figure 3 9 When Using Standard Clock Mounted on Main Board IE 78K0 NS A Target System IE 78KO NS P04 Emulation Probe Clock Oscillator Resonator not used Remark The clock supp
34. ods may damage the IE system 21 22 IE 78K0 NS P04 IE 780818 NS EM4 NEC 3 1 Installation Procedure lt 1 gt Remove the 4 screws at the sides of the IE 78KO NS A and open the top of the cover lt 2 gt Remove the screws on the option board G 78KOH and remove the option board Figure 3 1 IE 78K0 NS A inside Option Board G 78KOH Main board G 780009 lt 3 gt Setup the jumper s on the main board G 780009 It is necessary to set some jumpers on the main board for the clock selection An example for the jumper setting will be given in the chapter clock setting NEC IE 78K0 NS P04 IE 780818 NS EM4 Figure 3 2 Main Board G 780009 Jumper Positioning Jumper JP2 Table 3 1 Flash ROM Mode Jumper Position Function 1 2 Internal use 2 3 Internal use default Jumper JP3 Table 3 2 Internal Mode 1 Jumper Position Function 1 2 Internal use default 2 3 Internal use 23 IE 78KO NS PO4 IE 780818 NS EM4 Jumper JP4 Jumper JP6 Jumper JP7 Jumper JP8 Table 3 3 Internal Mode 2 Jumper Position Function 1 2 Internal use default 2 3 Internal use Table 3 4 Main Clock Selection Jumper Position Function 1 2 Not selectable 3 4 EM1 P04 board selection default 5 6 EM4 board selection Table 3 5 Main Clock Doubler Selection Jumper Position Function 1 2 Main board selection
35. or s internal clock a When using a ceramic oscillator or crystal resonator Items to be prepared Parts holder supplied with IE 78KO NS P04 Capacitor CA Ceramic oscillator or crystal resonator Capacitor CB Resistor Rx Solder kit Steps 1 Solder onto the supplied parts board as shown below the target ceramic oscillator or crystal resonator resistor Rx capacitor CA and capacitor CB all with suitable oscillation frequency Figure 3 12 Connections on Parts Board When Using Main System Clock or User Mounted Clock Parts holder 7 e e 14 Pin No Connection 6 e e 13 2 13 Capacitor CB 5 e l e 12 3 12 Capacitor CA 4 e Is 11 4 11 Ceramic oscillator or crystal resonator 3 e AM e 10 5 10 Resistor Rx 2 e e 9 8 9 Short 1 e e 8 Circuit diagram 10 MQ HCUO4 HCUO4 __ T os oe Clock Out 5 98 ZR 10 1 Qi 4 11 eS ons 1 Lot CAF CBT Coe 12 dr 2 Remark The sections enclosed in broken lines indicate parts that are attached to the parts board 35 36 IE 78KO NS PO4 IE 780818 NS EM4 NEC 2 Prepare the IE 78K0 NS P04 3 Remove the parts holder inserted in the socket marked X2 on the IE 78KO NS P04 4 Connect the parts holder from 1 above to the socket X2 from which the part holder was removed Check the pin 1 mark to make sure the board is mounted in the
36. r Settings on IE 78K0 NS P04 JP1 JP2 JP3 JP4 JP5 JP6 JP7 JP8 JP9 Open Open Open Closed Open 2 3 1 2 1 2 Open Table 3 24 Jumper Settings on IE 780818 NS EM4 1 2 2 3 1 2 JP1 JP2 JP3 NEC IE 78K0 NS P04 IE 780818 NS EM4 3 5 External Trigger To set up an external trigger connect the IE 780818 NS EM4 s check pin EXTOUT and EXTIN as shown below See the in circuit emulator IE 78KO NS A User s Manual for description of related use methods and pin characteristics Figure 3 22 External Trigger Input Position External trigger EXT OUT EXT IN 47 48 IE 78K0 NS P04 IE 780818 NS EM4 NEC Memo NEC IE 78K0 NS P04 IE 780818 NS EM4 Chapter 4 Differences among Target Devices and Target Interface Circuits This chapter describes differences between the target device and the IE 78K0 NS P04 IE 780818 NS EMA target interface circuit Although the target device is a CMOS circuit the IE 78KO NS P04 IE 780818 NS EM4 s target interface circuit consists of an emulation chip TTL CMOS IC and other components When connected the IE system with the target system for debugging the IE system performs emulation so as to operate as the actual target device would operate on the target system However some minor differences exist since the operations are performed via the IE system s emulation 49 IE 78KO NS PO4 IE 780818 NS EM4 NEC 4 1 Input Output Sig
37. re 3 12 Connections on Parts Board When Using Main System Clock or User Mounted Clock 35 Figure 3 13 IE 78K0 NS A side Emulation Device sesse ee ese ER EER essei essei EE EER KEER RE EE Re Rek EER Ee KEER ee EE Ee ee 36 Figure 3 14 Crystal Oscillator When Using Main System Clock or User mounted Clock 37 Figure 3 15 Pin Alignment of Crystal Oscillator and Socket e EER EER EE ER ER EE EER RR RE Ee ee Ee ee 37 Figure 3 16 IE 78KO NS A side Emulation Device ees sesse ER EER ER KEER ER EE EER RR EER EE ER Rek EER Ee KEER ee EE Ee 38 Figure 3 17 Connections on Parts Board When Using Subsystem Clock or User Mounted Clock 41 Fig re 3 18 IE ZAKO NS A side eege EE 42 Figure 3 19 Crystal Oscillator When Using Subsystem Clock or User mounted Clock 43 Figure 3 20 IE TAKONS A side iis sien reke Ke eer gek ns ES RE ese RENE ek eek Se ek ee ee Bea e ees de ee ee ed ee 44 Figure 3 21 IE ZOKO NS A E cused ER een Ge ee ee Es bu ee ee be ee Sense EE EE EN Ee 44 Figure 3 22 External Trigger Input Position eers se Ee EER EE ER EER EE EE RR EER EE EE ER EE EE tnn nh nana EE EER nna KERE EE EER ee 47 Figure 4 1 Equivalent Circuit 1 from Emulation Circuit use esse ees se ee eke EE EER EE KEER EE ER Rek EER Ee EE EER ee Ee ee 51 Figure 4 2 Equivalent Circuit 2 from Emulation Circuit eaae EE EER EE KEER RE EE Re Rek EER Ee KERR ee Ee ee 52 F
38. rement equipment audio and visual equipment home electronic appliances machine tools personal electronic equipment and industrial robots Special Transportation equipment automobiles trains ships etc traffic control systems anti disaster systems anti crime systems safety equipment and medical equipment not specifically de signed for life support Specific Aircrafts aerospace equipment submersible repeaters nuclear reactor control systems life support systems or medical equipment for life support etc The quality grade of NEC semiconductor products is Standard unless otherwise expressly specified in NEC s data sheets or data books etc If customers wish to use NEC semiconductor products in applications not intended by NEC they must contact an NEC sales representative in advance to determine NEC s willingness to support a given application Notes 1 NEC as used in this statement means NEC Corporation and also includes its majority owned subsidiaries 2 NEC semiconductor products means any semiconductor product developed or manufactured by or for NEC as defined above M5 2000 03 IE 78K0 NS P04 IE 780818 NS EM4 NEC Regional Information Some information contained in this document may vary from country to country Before using any NEC product in your application please contact the NEC office in your country to obtain a list of authorized representatives and distributors They will verif
39. t NC e e Voc ae sla Crystal Oscillator Pin Name Socket Pin No 2 e 13 NC 1 3 e 12 GND 7 sik xdi CLOCK OUT 8 5 e e 10 V is 6l 3 cc GND e e CLOCK OUT 7 e 8 4 Install the IE 78KO NS P04 and the IE 780818 NS EM4 in the IE 78K0 NS A 37 38 IE 78K0 NS P04 IE 780818 NS EM4 NEC The above steps configure a circuit and enable clock output to be supplied from the mounted oscillator to the emulation device Figure 3 16 IE 78K0 NS A side Emulation Device Vcc IE 78K0 NS A side Emulation device Crystal S oscillator d A Y B O VHC157 3 When using an external clock No hardware settings are required for this situation Make sure that the parts holder with a shortcut between 6 and 8 is in the socket marked X2 When starting the integrated debugger ID78K0 NS open the configuration dialog and select External in the area Clock for selecting the CPU s clock source this selects the user s clock NEC IE 78K0 NS P04 IE 780818 NS EM4 3 2 5 Examples of Main System Clock Setting 1 Standard Clock 8 00 MHz offered by the Emulation Board IE 78K0 NS P04 Main Board JP6 3 4 JP7 1 2 Emulation Board X2 with shortcut between 6 8 ID78KO NS Internal 2 Clock mounted by the User on the Emulation Board User related Clock Main Board JP6 3 4 JP7 1 2 Emulation Board X2 with parts hol
40. the emulation board IE 78K0 NS P04 to the option board G 78KOH lt 7 gt When user clock as main clock is used the main system clock can be mounted by using a parts holder or a crystal oscillator see chapter clock setting lt 8 gt Setup of the probe board IE 780818 NS EM4 Figure 3 4 Emulation Board IE 780818 NS EM4 Jumper Positioning LI Wa Kd co ns ES O W Z NEC IE 78KO NS PO4 IE 780818 NS EM4 Jumper JP1 Table 3 17 User RESET mode Jumper Position User RESET Function 1 2 To probe User Reset IE connected to the probe default 2 3 Pull up User Reset IE pull up by resistor 10K Jumper JP2 Table 3 18 DCAN Out Transmit Buffer Selection Jumper Position DCAN out Function 1 2 Pin emulator Reserved 2 3 FPGA DCAN transmit line from FPGA via transistor to probe default Jumper JP3 Table 3 19 DCAN in Buffer Type Selection Jumper 3 Position DCAN in Function 1 2 Pin emulator Original buffer default 2 3 FPGA Buffer type different timing optimized limitation USRVDD 2 4 5 V 29 IE 78K0 NS P04 IE 780818 NS EM4 NEC 3 2 Clock Settings 3 2 1 Overview of clock settings Main system clock Select from 1 to 3 below as the main system clock and subsystem clock to be used during debugging 1 Clock that is already mounted on emulation board 2 Clock that is mounted by
41. vice System clock Clock supply 15 IE 78K0 NS P04 IE 780818 NS EM4 NEC 16 1 4 Notes on Use of IE 78K0 NS P04 and IE 780818 NS EM4 1 2 Ensure that the power supply for the IE 78KO NS A and the target system is OFF before connecting or disconnecting to from the IE 78K0 NS A and the target device or changing switch settings etc When carrying out target device emulation using the IE 78KO NS P04 and IE 780818 NS EMA in conjunction with the IE 78K0 NS A there are certain differences from the operation of the actual device see Differences from Target Device The target system Vop must be between 4 0 V and 5 5 V Power on sequence 1 Power on IE 78K0 NS A 2 Power on target hardware 3 Start debugger ID78K0 NS Power off sequence 1 Exit from debugger ID78K0 NS 2 Power off target hardware 3 Power off IE 78KO NS A NEC IE 78K0 NS P04 IE 780818 NS EM4 Chapter 2 Part Names This chapter introduces the parts of the IE 78KO NS P04 and the IE 780818 NS EM4 The packaging boxes of the IE 78K0 NS P04 and the IE 780818 NS EM4 contain the following items 2 1 Package Components IE 78K0 NS P04 Components The IE 78KO NS P04 comprises the following components Please check that all these items are included in the package 1 IE 78KO NS P04 x 1 2 Parts holder with cover x2 3 Registration Card x 1 4 Readme First x 1 5 List of Contents x 1 IE 780818 NS EM4 Components The IE 7808
42. y Device availability Ordering information Product release schedule Availability of related technical literature host computers power plugs AC supply voltages and so forth Network requirements Development environment specifications for example specifications for third party tools and components In addition trademarks registered trademarks export restrictions and other legal issues may also vary from country to country NEC Electronics Inc U S Santa Clara California Tel 800 366 9782 Fax 800 729 9288 NEC Electronics Germany GmbH Duesseldorf Germany Tel 0211 65 03 02 Fax 0211 65 03 490 NEC Electronics UK Ltd Milton Keynes UK Tel 01908 691 133 Fax 01908 670 290 NEC Electronics Italiana s r l Milano Italy Tel 02 66 75 41 Fax 02 66 75 42 99 NEC Electronics Germany GmbH Benelux Office Eindhoven The Netherlands Tel 040 2445845 Fax 040 2444580 NEC Electronics France S A Velizy Villacoublay France Tel 01 30 67 58 00 Fax 01 30 67 58 99 NEC Electronics France S A Spain Office Madrid Spain Tel 01 504 2787 Fax 01 504 2860 NEC Electronics Germany GmbH Scandinavia Office Taeby Sweden Tel 08 63 80 820 Fax 08 63 80 388 NEC Electronics Hong Kong Ltd Hong Kong Tel 2886 9318 Fax 2886 9022 9044 NEC Electronics Hong Kong Ltd Seoul Branch Seoul Korea Tel 02 528 0303 Fax 02 528 4411 NEC Electronics Singapore Pte Ltd
Download Pdf Manuals
Related Search