XStend Board V2.1 Manual
Contents
1. Binding Posts Power Jack Connector Mounting Sockets E 3 3 gt gt Fo e 8 olols of ols 8 ojola oo 5 oloky O O NOLO GAD oooO O 00000000000000000000000000000 9 ej 219510 o 0 olol l olok O 0 DO NOT INSERT XS98 BOARD oloblQ O 0 oro 00000000000000000000000000000 lola 000000 olol olowO O 00000000 oo 000000000000000000WS 000000000 ojoj Js 00000000000 E 000000000000009p 1 oloa 98 00000000000000 0000000000000 3 oloa 98 0000000000000 00000000000000 4 o ofse 00000000000 00000000000000 8 ojos ae d000000000000000 9 ae 000000000 E e a alo COIF 000000 olo OS ojos So 092. aga C O 0 bs ca 2 09 ooz 8 09 olos 29 CODDDDDD0000000000000000000000 oe 9 olor ae 9 pa 5 ogi 168 Col Jet e e e O Pushbuttons POWER a g o Power Indicator E HE a j N AL AL a a Q G mmi In Out Stereo Audio RS 232 Port USB 1 1 DIP Switch 7 Segment Connectors Port LED Displays e Figure 1 Simplified layout of the XStend Board LEDs The XStend Board provides an XSA Board with a ten segment bargraph LED and two more LED seven segment displays All of these LEDs are active high meaning that an LED segment will glow when a high logic level is applied to it XSTEND BOARD V2 1 USER MANUAL 11 ATX Power Supply Connector Connector IDE Hard Disk 10 Segment LED Bargraph hows the connections from the FPGA on the XSA Board to the LEDs on the XStend Board expressed as UCF constraints click here for UCF syntax and usage tips e Listing 1 Connections between the XStend LEDs and the FPGA on the XSA Board net ledtwo lt 0 gt loc p47 rightmost 7 segment LED
3. a particular application m The stereo codec and dual channel analog input output circuitry are useful for processing of audio signals in combination with DSP circuits synthesized for the FPGA m The USB 1 1 interface lets the XSA Board appear as a low speed or full speed USB peripheral to a PC m The RS 232 interface is useful when the XSA Board needs to send information over a low speed serial communication link m The IDE interface provides the XSA Board with access to a hard disk for data storage and retrieval XSTEND BOARD V2 1 USER MANUAL 9 XStend Board Components The XStend Board extends the capabilities of the XSA Boards by providing additional bargraph LED and LED digits DIP switches and pushbuttons an RS 232 port a USB 1 1 peripheral interface an additional 128 Kbytes of static RAM an IDE interface to hard disks a stereo audio codec with left right input and output channels mounting sockets for an XSA Board a 42x2 header connector for add on daughterboards optional a 2 75 x3 5 prototyping area with access to both the 3 3V or 5V supply These resources are shown in the simplified view of the XStend Board Each of these resources will be described in the following sections XSTEND BOARD V2 1 USER MANUAL 10 158 XSTend Board V2 Power Supply 9VDC Daughterboard XSA Board
4. u ou Gy 8 9 11995 Prl 6S 8O EBOBZ 9Z 6 915 1 4zamod B y Butdhyoy o4d JSQUNN 2USUNDOG PES LTL Z EONNOY 0YA LNNOW ZH 4oyDauuej Atddns senod X1Y ON9 NO3 43MOd XLU Cy N asng amd nS lt E WOO 6 03 ZNG 9 HO Z WOO 9203 NO Sd lt TWOD Cy WOO ZINE E lt DNE E EME E 1S8STSW1 ZN G 8ZW 1 en aper 30 O O NG NG 1 4aMod 8404 21607 037 4amod STPUTW4Aal 4amod 8 6 19918 165380 26 6 91 JSQUNN USWNDOG teas sa ka 9284 4ST 301 ABTIIZA 8snasx 94 10d 8187050 9TSIOI S Aa aq mumummmmm mmummumm JITZE Sat
5. associated FPGA and or CPLD pin Columns 5 7 list the pins of devices on the Xstend Board that will connect to the FPGA and or CPLD when the XSA Board is inserted into an Xstend Board XSTEND BOARD V2 1 USER MANUAL 21 1nox19 85 u osO v9 PF 9505084 2 OGL G1d0 ZS LHOduVd GS LYOduWd S vS LYOduWd OZ S LYOduWd ve 14 1 zz 9d LNOduvd 9 1 vz SZ 2 1 LE LA 1YOJYVA ZE Od LNOduvd IGL d1d9 O LYOduVd 8Z SW1 G1d0 7O LHOduvd M9L 01dDLO LHOJSVA 08 ZL SWL NYLHYdS 84 roan WL 8 Ov OLY WYYAS 6V AWHOS 86 LYJ WYYAS 28 LEW WVvuds 96 ova Wvyds vel ZLY WYYAS EEL SO NVH0S 3MI9 NVYSOS LEL SYY NWYYAS 0 L AT19 NVYIOS 661 SVI NVIOS 9 HWO WYYAS vel SM Wveas EZL TWO WYYAS tl 80 NYYAS A ZO NYYAS 60 NYYAS SLL 90 AVH0S 211 OL0 Wvyds 9LL SO NYYAS SLL LLO WYYAS YLL YO NYYAS ELL ZLO NYYXAS ZLL 1 LW NVLYVdS LLL OW N
6. net rts loc p80 RS232 RTS port pin 7 net cts loc p62 RS232 CTS port pin 8 USB 1 1 Interface The XStend Board uses a Philips PDIUSBD11 USB to I C interface chip to provide the XSA Board with a USB communication link The FPGA accesses registers on the chip via the serial clock and data lines of the link By reading and writing these registers the FPGA can act as a USB peripheral with the USB interface chip handling the low level data transactions for the USB bus The USB interface chip also provides an interrupt signal to alert the FPGA when USB tranactions need to be processed In addition a SUSPEND signal is also output from the chip to alert the FPGA when the USB bus loses power or otherwise ceases operations Finally a clock output from the chip is made available to the XSA Board on its external clock input of the programmable oscillator The frequency of this clock is 48 MHz N 1 where N is a value loaded into a register on the chip through the interface Listing 4 shows the connections from the FPGA on the XSA Board to the USB interface chip on the XStend Board expressed as UCF constraints XSTEND BOARD V2 1 USER MANUAL 13 net net net net SRAM e Listing 4 Connections between the XStend USB interface chip and the FPGA on the XSA Board sda loc p85 I2C data signal scl loc p84 1206 clock signal susp loc p29 SUSPEND signal intr loc p28 INTERRUPT signal The XStend Board gives the XSA Bo
7. seven segment LED LED1 and DIP switch Therefore these components cannot be used in applications where the codec is needed RS 232 Port The RS 232 port on the XStend Board shares FPGA pins with the XSA Board Flash RAM and seven segment LED and with the XStend Board SRAM DIP switch bargraph LED and IDE interface The Flash RAM SRAM and IDE interface can be deselected using their respective chip select or read write signals so these components can be used simultaneously in an application with the RS 232 port The RS 232 port has resistors on its outputs that drive the FPGA pins so these signals will be overridden by the Flash RAM SRAM or IDE signals when they are active The DIP switch and LEDs on both the XSA and XStend Boards do not have chip selects Therefore these components cannot be used in applications where the RS 232 port is needed USB Interface The USB interface on the XStend Board shares FPGA pins with the XSA Board Flash RAM and the XStend Board SRAM and one seven segment LED LED2 The Flash RAM and SRAM can be deselected using their respective chip select signals so these components can be used simultaneously in an application with the USB interface The USB interface signals have resistors on the outputs that drive the FPGA pins so these signals will be overridden by the Flash RAM or SRAM signals when they are active The LED does not have a chip select Therefore it cannot be used in applications where
8. the USB interface port is needed XStend DIP Switch The DIP switch on the XStend Board shares FPGA pins with the XSA Board Flash RAM CPLD parallel port interface and the WRITE pin that controls configuration of the FPGA and with the XStend Board SRAM stereo audio codec and IDE interface Therefore the XStend Board DIP switches should be left in the OFF OPEN position if these other components are being used If the XStend Board DIP switch is used then the Flash RAM and SRAM should not be enabled and registers in the IDE interface should not be read or written Position 1 of the DIP switch should be in the OFF OPEN position so the WRITE signal of the FPGA can be controlled when the FPGA is being configured There are resistors in the outputs of the codec that drive the FPGA so these signals can be overridden if the DIP switch is used The CPLD on the XSA Board must also be programmed with the alternate parallel port XSTEND BOARD V2 1 USER MANUAL 18 interface found in the XSAldwnldpa2 svf file so it will not drive the pins of the FPGA that are already being pulled low by the DIP switch XStend LEDs The seven segment LED1 on the XStend Board shares FPGA pins with the XSA Board Flash RAM CPLD parallel port interface and DIP switch and with the XStend Board SRAM stereo audio codec and IDE interface Therefore these components cannot be used in applications where the seven segment LED1 on the XStend Board is needed The alternate
9. 0 04d uopouny WSX G1d9 V9d4 XStend Schematics The following pages show the detailed schematics for the XStend Board XSTEND BOARD V2 1 USER MANUAL 8 1 119915 e91 64 80 26 6 91 PASqUNN USsWNDOG a OTPNY 0319315 431006 bo J b T 3NZp Z 3 0 4 0Y39 3114433 6 22SNGSX 826 119945 6 4 80 26 6 195184 JSQUNN 1USUNIOJ ELSE UTA 103 p4eoq4e1ybneg pue 181505 YSX Z 8uI0YIHSX TP8yI0UIHSX Ev8u30YIHSX B E 1188Us 6 806 26 6 91 PASqUNN USsWNDOG a suong pue 5 9ESNASX ZESNESX Z9SNESX GGSNGSXx 5 ZOSNESX aZsnasx 6 G SNasx 6 SNESXxX 8 SNESXxX Z SNESX 93 po ta 39 L by 39903 19384 16 al p9 PY q8 by 39903 19384 oeg 328 6 8 294 ES rie 994 an WEE __H9Y 6 8 34398 T 5 394 ZAG go ziy go giz ot T BEE __ 353 rie IGN on Bee _ HGN 6 8 3684 T 5 3084 z g gay ST ot Tt 9OSNEASX TZSN
10. 4 ESS Corporation XStend Board V2 1 Manual How to install and use your new XStend Board RELEASE DATE 12 29 2002 Copyright 1998 2003 by X Engineering Software Systems Corporation All XS prefix product designations are trademarks of XESS Corp All XC prefix product designations are trademarks of Xilinx All rights reserved No part of this publication may be reproduced stored in a retrieval system or transmitted in any form or by any means electronic mechanical photocopying recording or otherwise without the prior written permission of the publisher Printed in the United States of America XSTEND BOARD V2 1 USER MANUAL 1 Table of Contents XSTEND BOARD V2 1 USER MANUAL 2 XSTEND BOARD V2 1 USER MANUAL Preliminaries Here are some places to get help if you encounter problems m If you can t get the XStend Board hardware to work submit a problem report at http www xess com help html Our web site also has m answers to frequently asked questions m example designs for the XS Boards m application notes m a place to sign up for our email forum where you can post questions to other XS Board users m The XStend Board V2 1 is not compatible with the XS95 XS40 or XSTE5 Boards Do not plug XS95 XS40 or XSTE5 Boards into the XStend Board V2 1 m f you are connecting a 9VDC power supply to your XStend Board please make sure the center terminal of the plug is positive and the outer sleeve is n
11. ASX 18 85 85 85 T8esnasx GESNESX 8ESNESX SESNESX 94snasx 8a4snasx TGSsnasx Z asnasx SSNESXx 5 8snasx 82ZSNESX Z8snasx 5 6ZSNASX E8snasx 8 199US 6 8 6 2 5 Z T Z EONNOY 0YdA 1NNOW gasn zanosa c Cansa O 5 TH e41 69 80 EBOZ 9Z 6 1 JSQUNN USsWNDOG T Z 15X 3 1111 5928149141 gsn Pue Zez Ssg ON9 3 0 923 T NE E 3NZp eza 22_gz la Nizd Nita 1N0Z1 NIZL NITL Z9 en Oo clan Tidasnidd 1NI ONadsns 33 1 19 13534 1S31 OY SF LO NSO 00 3461 Tt 5 EE_36TY zig Idr taf aes came geld ar z ee_YETY 91 Z 0 ZTdf 85 85 T8esnasx 8Tsnasx g8asnasx 6TSNASX ZSNASX TGSsnasx 5 8 4 11995 Prl 6S 8O EBOBZ 9Z 6 915 PASqUNN USWNDOG sa Lil 85 8 T8snasx 8 SESNESX 1 8XA8Z TWO S da Kan Ken lt a van Kan Ken Ken Ken Kan Ken Kon Kon Ken Ken Kon Ken Kaa Ka Ka dnttnd s ptaoad Hala SDUTS p p
12. RAM and SRAM can be deselected using their respective chip select signals so these components can be used simultaneously in an application The IDE interface can also be used at the same time as these other two components by activating its read or write control signal only when the Flash RAM and SRAM are not selected The codec DIP switches on both the XSA and XStend Boards LEDs on both the XSA and XStend Boards and USB port do not have chip selects Therefore these components cannot be used in applications where the Flash RAM is needed The default parallel port interface programmed into the XSA Board CPLD will disable outputs that interfere with the operations of the Flash RAM Therefore it can be used without modification in applications that employ the Flash RAM XSA Seven Segment LED The seven segment LED on the XSA Board shares FPGA pins with the XSA Board Flash RAM and the XStend Board SRAM bargraph LED RS 232 port and IDE interface Therefore these components cannot be used in applications where the seven segment LED on the XSA Board is needed XSA SDRAM The synchronous DRAM chip on the XSA Board does not share any FPGA pins with any other components Therefore any application can use the SDRAM regardless of the other components that are to be used XSTEND BOARD V2 1 USER MANUAL 17 XStend Codec The stereo audio codec on the XStend Board shares FPGA pins with the XSA Board Flash RAM and the XStend Board bargraph LED
13. VLYVdS 9 604 A ZI NVLUVdS 901 EO NYYAS 0 ELO NYYAS ZOL ZO NYYXAS LOL vLO NVIOS 001 LO WH0S 66 SLO NVHOS 96 OD AVWH0S 96 9 84 V6 sz NOLIM8HSNAVLVO ZSd 66 16 y0 YILSYN 88 3 ve 48 3 ez 98 vas asn Oz 38 Tos 85 6l 78 zezsy 8L 68 suonouny X Z 1SX Uld 0 01d WSX G1d9 3 51 ZMSdid 8 08 8MSdid 39 NVE i 62 29 9S 1YOdYVd 84 9MSAIA XION 6 Ll 3 10311 OJOS oiany 9 QV HSV14 69 9 MSdIa 10S 11 SV HSV14 09 EMSdIO ILAS 02 bv HSV14 19 PL SNOG NVLYWdS ZZ LaHSNd 99 WVYSONd NVLYVdS 6 69 oq Sql vaatava 24 Lo LINI NVLYVdS 8 39 a d31uvg OL OS GATZG HSV14 9 SMSdId ZY NYJ S V HSWV13 89 99 sia adl 3 1091 EV AVE y ta LYOdHYd ZLV HSW1W3 99 99 ova 3 gLMSdIQ SLY HSYT4 ZS 59 zya da 1031 SV WVY v8 OLMSdIG 9LV HSV14 _ 1S 59 SLO zezsy sa 3 9 da7yva LO NVY 18 ZS d3190 HSV1W3 6 29 ay zezse 9a 2 da7yvg 0d NVE 08 S GATSG HSV14 8 09 0l d318Va Orany 99 13839 HSvlW 09 65 adl ZMSAIA 3M NVE z9 90 LYOdYHYd SW HSV14 va 9 3 11 8 e a wvy se SS GAT vG HSV1s 2 43 Ls9 v 1g31 9V AVE 58 OLMSAIOZLV HSVIW4 8v 99 oso 301 3 1031 V NVE 8 VIMSdIC vLV HSV14 ZY EZ 3 8 431 61 GO LYOd
14. ank select 0 register bank select 1 register address lines data I O lines The XStend Board has an stereo audio codec that accepts two analog input channels digitizes the analog values and sends the digital values to the XSA Board as a serial bit steam The codec also accepts a serial bit stream from the XSA Board and converts it into two analog output signals that exit the XStend Board Listing 7 shows the connections from the FPGA on the XSA Board to the codec interface on the XStend Board expressed as UCF constraints e Listing 7 Connections between the XStend stereo codec and the FPGA on the XSA Board net mclk net lrck net sclk XSTEND BOARD V2 1 USER MANUAL loc p77 loc p59 loc p75 master clock to codec left right codec chaneel select serial data clock 15 net sdin loc p74 serial data stream to codec net sdout loc p76 serail data stream from codec The analog stereo input and output signals enter and exit the XStend Board through the 3 5mm jacks J1 and J2 respectively The output of an audio CD player can be input through J1 and a set of small stereo headphones can be connected to J2 for listening to the processed output In addition a passive microphone can be connected to J1 by placing shunts on jumpers JP2 and JP3 and removing shunts from JP4 and JP5 XSA Board Mounting Sockets The XSA Board is mounted using the inner rows of the double row sockets on the XStend Board These sockets connect
15. ard access to a Cypress CY7C109 128 KByte SRAM hows the connections from the XSA Board to the SRAM on the XStend Board expressed as UCF constraints ne ne ne ne ne ne ne ne ne ne ne ne ne ne ne ne ne ne ne ne ne ne ne ne ne ne ne ne ET EI ae ae EN OS ae ee IDE Interface e Listing 5 Connections between the XStend SRAM and the FPGA on the XSA Board ceb oeb web a lt 0 gt a lt 1 gt a lt 2 gt a lt 3 gt a lt 4 gt a lt 5 gt a lt 6 gt a lt 7 gt loc p79 loc p43 loc p58 loc p27 loc p38 loc p66 loc p65 loc p64 loc p63 loc p56 loc p54 a lt 8 gt loc p42 a lt 9 gt loc p40 a lt 10 gt loc p28 a lt 11 gt loc p29 a lt 12 gt loc p51 a lt 13 gt loc p47 a lt 14 gt loc p50 a lt 15 gt loc p48 a lt 16 gt loc p39 d lt 0 gt loc p60 d lt 1 gt loc p62 d lt 2 gt loc p67 d lt 3 gt loc p57 d lt 4 gt loc p49 d lt 5 gt loc p46 d lt 6 gt loc p44 d lt 7 gt loc p68 chip enable active low output enable active low write enable active low address lines He de HE HE data lines The XStend Board provides the XSA Board with access to a hard disk through the IDE interface connector The FPGA stores and retrieves data from the disk by reading and writing registers on the disk through the IDE interface These registers are accessed using the read a
16. d to the data signal of the USB interface default JP11 Off Removing this shunt disconnects the XSA Board from the clock signal of the USB interface On Placing a shunt on this jumper connects the XSA Board to the clock signal of the USB interface default JP12 Off Removing this shunt disconnects the XSA Board from the clock output of the USB interface On Placing a shunt on this jumper connects the XSA Board to the clock output of the USB interface default XSTEND BOARD V2 1 USER MANUAL 8 Programmer s Models This section describes the various sections of the XStend Board and shows how the prototyping header pins of the XSA Board are connected to the XStend Board circuitry Please refer to the complete schematics and pin list at the end of this document if you need more details XStend Board Capabilities The XSA Boards offer a flexible low cost method of prototyping FPGA designs However their small physical size limits the amount of support circuitry they can hold The XStend Board removes this limitation by providing additional support circuitry that the XSA Boards can access through their prototyping header interfaces The XStend Board contains resources that extend the range of applications of the XSA Boards into these new areas m The pushbuttons DIP switches LEDs and prototyping area are useful for basic lab experiments m The static RAM can be used when the larger SDRAM on the XSA Board is overkill for
17. e RS 232 port and USB interface both have resistors on their outputs that drive the FPGA pins so these signals will be overridden by the SRAM signals when they are active So the RS 232 port USB interface and IDE interface can all be used in the same application The alternate parallel port interface found in the XSAldwnIdpa2 svf file must also be programmed into the CPLD on the XSA Board so it does not drive the pins of the FPGA that are already being driven on the SRAM XSTEND BOARD V2 1 USER MANUAL 20 XStend XSA Pin Connections The following table lists the connections between the XStend Board components and the components of the XSA Board The columns of the table are arranged as follows Column 1 lists the Spartan Il FPGA pin It is left blank if there is no connection to the FPGA for this function Pins marked with are useable as general purpose I O through the prototyping header pins denoted with can be used as general purpose I O only if the CPLD interface is reprogrammed with the alternate parallel port interface stored in the dwnldpa2 svf file pins with no marking cannot be used as general purpose at all Column 2 lists the XC9572XL CPLD pin It is left blank if there is no connection to the CPLD for this function Column 3 lists the pins of other devices on the XSA Board that are connected to the associated FPGA and or CPLD pin Column 4 lists the pin of the XSA prototyping header that is connected to the
18. e the jumper settings only if you are manually reseting the audio codec circuit accepting audio signals from a low amplitude source e g a passive microphone m not using the USB interface e Table 1 Jumper settings for XSA Boards Jumper Setting Purpose JP1 Off Removing this shunt allows the audio codec to process stereo audio signals default On Placing a shunt on this jumper resets the audio codec and halts any input or output of stereo audio signals JP2 Off Removing this shunt interrupts power to a passive microphone attached to the left stereo input default channel On Placing a shunt on this jumper provides power to a passive microphone attached to the left stereo input channel JP3 Off Removing this shunt interrupts power to a passive microphone attached to the right stereo input default channel On Placing a shunt on this jumper provides power to a passive microphone attached to the right stereo input channel JP4 Off Removing this shunt sets the gain on the left stereo input channel to 48 On Placing a shunt on this jumper sets the gain on the left stereo input channel to 1 default JP5 Off Removing this shunt sets the gain on the right stereo input channel to 48 On Placing a shunt on this jumper sets the gain on the right stereo input channel to 1 default JP10 Off Removing this shunt disconnects the XSA Board from the IC data signal of the USB interface On Placing a shunt on this jumper connects the XSA Boar
19. egative Packing List Here is what you should have received in your package m an XStend Board m anXSTOOLs CDROM with software utilities and documentation for using the XStend Board XSTEND BOARD V2 1 USER MANUAL 4 Installation Inserting the XSA Board into an XStend Board The XSA Board is inserted into the XStend Board as shown below The XSA Board is inserted into the inner most columns of the socket strips Orient the parallel port VGA port and PS 2 port connectors on the XSA Board as indicated on the XStend Board A 7 E a a a e ARA 12345678 XSTEND BOARD V2 1 USER MANUAL Applying Power to Your XStend Board You can supply power to your XStend Board in four ways Do not apply power from more than one source at a time You can attach a 9V DC power supply to the XSA Board and the XStend Board will draw its power through the XSA Board prototyping header as shown below The power supply should have a 2 1 mm female center positive plug and be capable of delivering at least 500 mA Or you can attach the 9V DC power supply directly to jack J7 on the XStend Board Now the XSA Board will draw its power from the XStend Board LOT Vp way ila XSTEND BOARD V2 1 USER MANUAL 6 You can also attach a standard ATX PC power supply to the XStend Board through connector J6 Finally you can power
20. ls When pressed each pushbutton pulls the connected pin of the XS Board to ground Otherwise the pin is pulled high through a resistor Listing 2 shows the connections from the FPGA on the XSA Board to the switches on the XStend Board expressed as UCF constraints 12 e Listing 2 Connections between the XStend DIP pushbutton switches and the FPGA on the XSA Board net pushsw lt 3 gt loc p78 pushbuttons net pushsw lt 4 gt loc p26 net pushsw lt 5 gt loc p23 net dipsw lt 1 gt loc p30 DIP switches net dipsw lt 2 gt loc p58 net dipsw lt 3 gt loc p74 net dipsw lt 4 gt loc p75 net dipsw lt 5 gt loc p66 net dipsw lt 6 gt loc p77 net dipsw lt 7 gt loc p80 net dipsw lt 8 gt loc p79 RS 232 Port The XStend Board has a 9 pin RS 232 port that provides the XSA Board with the transmit and receive serial data streams TD and RD respectively as well as the flow control signals RTS and CTS respectively The pin functions on the XStend Board RS 232 port are identical to those found on a PC serial port so a null modem cable that swaps the TD RD and CTS RTS lines is needed if the XStend Board and PC are to communicate Listing 3 shows the connections from the FPGA on the XSA Board to the RS 232 port pisn on the XStend Board expressed as UCF constraints e Listing 3 Connections between the XStend RS 232 port and the FPGA on the XSA Board net td loc p83 RS232 TD port pin 3 net rd loc p60 RS232 RD port pin 2
21. nd write strobes in combination with the register bank select lines the three bit register address bus and the sixteen bit IDE data bus XSTEND BOARD V2 1 USER MANUAL 14 In addition to polled access the IDE interface also allows DMA access using the DMA request and acknowledge signals along with the I O ready signal hows the connections from the FPGA on the XSA Board to the IDE interface chip on the XStend Board expressed as UCF constraints e Listing 6 Connections between the XStend IDE interface and the FPGA on the XSA Board net ide resetb net ide dmarq net ide dmackb net ide intrq net ide iordy net ide diorb net ide diowb net ide cs0b net ide cslb net ide da lt 0 gt net ide da lt 1 gt net ide da lt 2 gt net ide d lt 0 gt net ide d lt 1 gt net ide d lt 2 gt net ide d lt 3 gt net ide d lt 4 gt net ide d lt 5 gt net ide d lt 6 gt net ide d lt 7 gt net ide d lt 8 gt net ide d lt 9 gt net ide d lt 10 gt net ide d lt 11 gt net ide d lt 12 gt net ide d lt 13 gt net ide d lt 14 gt net ide d lt 15 gt Stereo Audio Codec loc p31 loc p27 loc p38 loc p40 loc p39 loc p86 loc p87 loc p54 loc p56 loc p64 loc p66 loc p63 loc p68 loc p44 loc p46 loc p49 loc p57 loc p62 loc p60 loc p67 loc p42 loc p43 loc p47 loc p48 loc p50 loc p51 loc p58 loc p65 reset DMA request DMA acknowledge interrupt I O ready read strobe write strobe register b
22. net ledtwo lt 1 gt loc p40 net ledtwo lt 2 gt loc p28 net ledtwo lt 3 gt loc p29 net ledtwo lt 4 gt loc p27 net ledtwo lt 5 gt loc p42 net ledtwo lt 6 gt loc p48 net ledtwo lt 7 gt loc p38 net ledone lt 0 gt loc p64 leftmost 7 segment LED net ledone lt 1 gt loc p65 net ledone lt 2 gt loc p76 net ledone lt 3 gt loc p50 net ledone lt 4 gt loc p51 net ledone lt 5 gt loc p54 net ledone lt 6 gt loc p56 net ledone lt 7 gt loc p63 net barled lt 1 gt loc p68 bargraph LED net barled lt 2 gt loc p44 net barled lt 3 gt loc p46 net barled lt 4 gt loc p49 net barled lt 5 gt loc p57 net barled lt 6 gt loc p62 net barled lt 7 gt loc p60 net barled lt 8 gt loc p67 net barled lt 9 gt loc p39 net barled lt 10 gt loc p59 DIP Switch and Pushbuttons The XStend has a bank of eight DIP switches and three pushbuttons that are accessible by an XSA Board There is a fourth pushbutton labeled PROG which is used to initiate the programming of the XSA Board It 15 not intended to be a general purpose input When closed or ON each DIP switch pulls the connected pin of the XS Board to ground XSTEND BOARD V2 1 USER MANUAL When the DIP switch is open or OFF the pin is pulled high through a resistor When not being used the DIP switches should be left in the open or OFF configuration so the pins of the XSA Board are not tied to ground and can freely move between logic low and high leve
23. parallel port interface found in the XSAldwnldpa2 svf file must also be programmed into the CPLD on the XSA Board so it does not drive the segments of LED1 when the FPGA tries to do so The seven segment LED2 on the XStend Board shares FPGA pins with the XSA Board Flash RAM CPLD parallel port interface and DIP switch and with the XStend Board SRAM USB interface and IDE interface Therefore these components cannot be used in applications where the seven segment LED2 on the XStend Board is needed The alternate parallel port interface found in the XSA dwnidpa2 svf file must also be programmed into the CPLD on the XSA Board so it does not drive the segments of LED2 when the FPGA tries to do so The bargraph LED on the XStend Board shares FPGA pins with the XSA Board Flash RAM and seven segment LED and with the XStend Board SRAM stereo audio codec RS 232 port and IDE interface Therefore these components cannot be used in applications where the bargraph LED on the XStend Board is needed XStend IDE Interface The IDE interface on the XStend Board shares FPGA pins with the XSA Board Flash RAM seven segment LED CPLD parallel port interface and DIP switch and with the XStend Board SRAM RS 232 port bargraph and seven segment LEDs and DIP switch The Flash RAM and SRAM can be deselected using their respective chip select signals so these components can be used simultaneously in an application with the IDE interface The IDE interface can al
24. rd This causes interactions that may make it difficult or impossible to use these components in the same application This section will provide an overview of some of the possible interactions between the components These discussions are overly pessimistic in terms of what components cannot be used together in a single application so advanced users are encouraged to check the list of pin assignments in Appendix A for more details XSTEND BOARD V2 1 USER MANUAL 16 XSA Pushbutton Interactions The pushbutton on the XSA Board connects to the same FPGA pin as the data pin of the XSA Board s PS 2 port These components cannot be used simultaneously XSA VGA Port Interactions The horizontal and vertical sync signals of the XSA Board use the same FPGA pins as two of the pushbuttons on the XStend Board SW3 and SW4 These components cannot be used simultaneously XSA DIP Switches The DIP switch on the XSA Board shares FPGA pins with the XSA Board Flash RAM and the XStend Board SRAM chip seven segment LED LED1 and the IDE interface Therefore the XSA Board DIP switches should be left in the OFF OPEN position if these other components are being used XSA Flash RAM The Flash RAM on the XSA Board shares FPGA pins with the XSA Board DIP switch seven segment LED and CPLD parallel port interface and with the XStend Board SRAM both seven segment LEDs bargraph LED stereo audio codec DIP switch USB port and IDE interface The Flash
25. so be used at the same time as these other two components by activating its read or write control signal only when the Flash RAM and SRAM are deselected The DIP switches and LEDs on both the XSA and XStend Boards do not have chip selects Therefore these components cannot be used in applications where the IDE interface is needed The RS 232 port has resistors on its outputs that drive the FPGA pins so these signals will be overridden by the IDE signals when they are active So the RS 232 port and IDE interface can both be used in the same application The alternate parallel port interface found in the XSAldwnIdpa2 svf file must also be programmed into the CPLD on the XSA Board so it does not drive the pins of the FPGA that are already being driven through the IDE interface XSTEND BOARD V2 1 USER MANUAL 19 XStend SRAM The SRAM on the XStend Board shares FPGA pins with the XSA Board Flash RAM seven segment LED CPLD parallel port interface and DIP switch and with the XStend Board RS 232 port bargraph and seven segment LEDs DIP switch USB interface and IDE interface The Flash RAM and IDE interface can be deselected using their respective chip select or read write signals so these components can be used simultaneously in an application with the SRAM The DIP switches and LEDs on both the XSA and XStend Boards do not have chip selects Therefore these components cannot be used in applications where the SRAM is needed Th
26. the XStend Board from a dual 5V 3 3V power supply directly to binding posts on the XStend Board The binding posts are not provided Making Connections to Your XSA and XStend Boards You can make the same connections to your XSA Board whether it is inserted into the XStend Board or used stand alone A 6 DB25 male to male cable attaches from the parallel port on the PC to the female DB 25 connector J8 at the top on the XSA Board You can connect a VGA monitor to the 15 pin connector J3 at the bottom of your XSA Board And you can accept inputs from a keyboard or mouse by connecting it to the PS 2 connector J4 at the bottom of your XSA Board XSTEND BOARD V2 1 USER MANUAL 7 The XStend Board offers some additional connection opportunities You can connect the peripheral end of a USB 1 1 cable to the USB port J5 on the XStend Board while the host end attaches to a PC USB port You can perform serial communications by attaching a 9 pin RS 232 null modem cable between the DB9 connector J9 on the XStend Board and a serial port on a PC You can capture audio output from a CD player or a microphone by attaching them to the 3 5mm stereo input jack J1 on the XStend Board while audio can be sent to a pair of headphones through the stereo output jack J2 Setting the Jumpers on Your XStend Board The default jumper settings shown in Table 1 configure your XStend Board for use in 8 logic design environment You will need to chang
27. the prototyping header of the XSA Board to the components of the XStend Board In addition the outer rows of each socket provide access points for probing the signals that go through the sockets Each hole in the outer rows is electrically connected to the horizontally adjacent hole on the inner rows Small wires 22 gauge or less can be inserted in the holes on the outer rows and logic or oscilloscope probes can be attached to monitor the signals going through the mounting socket Daughterboard Connector Daughterboards with specialized circuitry can be connected to the XStend board through connector J4 This 42x2 connector brings all the I O and VCC GND from the XSA Board to the daughterboard Prototyping Area The XStend Board has a prototyping area consisting of component through holes on an 0 1 x0 1 grid Components in this area can access to the 5V 3 3V and signal ground by making connections to the appropriate pins on the JP9 header Connections from the XSA Board to the prototyping area are made through the daughterboard header Each pin on J4 is explicitly labeled with the corresponding number of the FPGA pin it connects to on the XSA Board For example the pin at the bottom left of J4 on the XStend Board is connected to pin 111 of the FPGA on the XSA Board Interactions Between the XSA Board and XStend Board Components Many of the FPGA pins on the XSA Board are connected to two or more components on the XSA and or XStend Boa
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