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DAQ NI 6624 User Manual

1. Peripheral component interconnect a high performance expansion bus architecture originally developed by Intel to replace ISA and EISA It is achieving widespread acceptance as a standard for PCs and work stations it offers a theoretical maximum transfer rate of 132 Mbytes s programmable function input A communications connection on a computer or a remote controller A digital port consisting of lines of digital input and or output parts per billion The division of frequency of an input signal that is to be used as SOURCE of a counter G 6 ni com programmed I O PXI R reflection RG ribbon cable ringing RTSI Bus Save register source SOURCE start trigger synchronous National Instruments Corporation G 7 Glossary A data transfer method in which the CPU reads or writes data as prompted by software Modular instrumentation standard based on CompactPCI developed by National Instruments with enhancements for instrumentation A high speed signal transition behaves like a wave and is reflected like a wave at an inadequately terminated endpoint This phenomenon is referred to as reflection Reserved ground Pins that are marked RG on the I O connector are no connects if you use the SH100 100 S2 shielded cable while they are ground pins if you use the R100100 unshielded ribbon cable A flat cable in which the conductors are side by side The oscillation of a signal about a high voltage o
2. Connecting the NI 6624 as Referenced to Ground Connect the external device to the IN pin and connect the device ground to the IN pin as shown in Figure 3 4 LNV aa IN i e IN lt 7Vss or GND NI6624 Figure 3 4 Connecting as Referenced to Ground Connecting the NI 6624 as Referenced to the Supply Connect the Vdd on the external device to the NI 6624 IN and connect the output of the external device to the IN pin as shown in Figure 3 5 NV cd i i e IN Your Device eIN ss or GND NI 6624 Figure 3 5 Connecting as Referenced to the Supply gi Note Connecting the NI 6624 as referenced to the supply reverses the digital logic To operate the NI 6624 with TTL devices connect the NI 6624 as referenced to the supply NI 6624 User Manual 3 10 ni com Outputs Chapter 3 Signal Connections The outputs on the NI 6624 consist of N channel MOSFETs that are connected as low side switches A Schottky diode blocks reverse connections Figure 3 6 shows an example of connecting a single NI 6624 isolated output Voltage i vue Regulator A Load es l So Out O Vsource Gate Control gt Current i TIO D IZD 4 Sensor po e Vss N6624 So Sra Figure 3 6 Connecting a Single NI 6624 Isolated Output In order for the output circuit to fu
3. viii Chapter 1 Introduction About NI 6624 Devicer snini nnna oii rano da 1 1 Using PXI with CompactPEI sis sesse ese se Re se SR Re aa ESE ees eg Ee seed beds ER EE ees 1 2 Getting Started AE OR EE AE N EL 1 3 Installing NIEDAQ 7 56 2 RE RE OE OR EE so Tae 1 3 Installing Other Software i 1 3 Installing HardWware ss seistsse Kerse Eseg ie enable area 1 3 Accessories and Cables sa Se ER EE ER ai 1 4 Chapter 2 Device Overview Duplicate Count Prevention Re ee ke ee e ana a ee ee 2 1 Example Application That Works Correctly No Duplicate Counting 2 1 Example Application That Works Incorrectly Duplicate Counting 2 2 Example Application That Prevents Duplicate Counting 2 2 Enabling Duplicate Count Prevention in NI DAQMX ii 2 3 When to Use Duplicate Count Prevention i 2 4 When Not to Use Duplicate Count Prevention i 2 4 Transfer Rate nk a GE acilia Galia 2 4 Chapter 3 Signal Connections Programmable Function Interfaces PFIS rrenan 3 1 Digital Filteniioi oes eg Rd es gee a eg Eg oe e ai 3 1 Power On State sis ms GEK ENG REED eo tei o ee De ada AeA 3 3 lS dei RR OE N ian EE EE 3 4 VO Connector Pinout EES Ee EE tid athe ea ae EG Gee Oe is 3 7 ri EE EE EE N EE OD EE 3 9 Connecting the NI 6624 as Referenced to Ground se ee ee ee 3 10 Connecting th
4. 42 92 PFI 4 NC 43 93 NC NC 44 94 NC NC 45 95 NC NC 46 96 NC NC 47 97 NC NC 48 98 NC NC 49 99 NC NC 50 100 NC NI 6624 User Manual 3 6 ni com Chapter 3 Signal Connections 1 0 Connector Pinout Figure 3 2 shows the NI 6624 I O connector pin assignments National Instruments Corporation 3 7 NI 6624 User Manual Chapter 3 Signal Connections NI 6624 User Manual ES FI 39 CTR 0 SOURCE 1 51 FI 39 CTR 0 SOURCE 2 52 FI 38 CTR 0 GATE 3 53 FI 38 CTR 0 GATE 4 54 FI 37 CTR 0 AUX 5 55 FI 37 CTR 0 AUX 6 56 FI 36 Vdd CTR 0 Vdd 7 57 FI 36 CTR 0 Vss 8 58 FI 36 CTR 0 OUT 9 59 FI 36 CTR 0 Vss 10 60 FI 35 CTR 1 SOURCE 11 61 FI 35 CTR 1 SOURCE 12 62 FI 34 CTR 1 GATE 13 63 FI 34 CTR 1 GATE 14 64 FI 33 CTR 1 AUX 15 65 FI 33 CTR 1 AUX 16 66 Fl 32 Vdd CTR 1 Vdd 17 67 FI 32 Vss CTR 1 Vss 18 68 Fl 32 CTR 1 OUT 19 69 FI 32 Vss CTR 1 Vss 20 70 FI 31 CTR 2 SOURCE 21 71 FI 31 CTR 2 SOURCE 22 72 FI 30 CTR 2 GATE 23 73 FI 30 CTR 2 GATE 24 74 FI 29 CTR 2 AUX 25 75 FI 29 CTR 2 AUX 26 76 FI 28 Vdd CTR 2 Vdd 27 77 FI 28 Vss CTR 2 Vss 28 78 Fl 28 CTR 2 OUT 29 79
5. PFI 20 Vdd Vdd PFI 36 CTR 0 Vss 8 58 CTR 4 Vss PFI 20 Vss Vss PFI 36 CTR 0 OUT 9 59 CTR 4 PFI 20 OUT PFI 36 CTR 0 Vss 10 60 CTR 4 Vss PFI 20 Vss Vss PFI 35 channel A 1 CTR 1 SRC 11 61 CTR 5 channel A 5 PFI 19 SRC PFI 35 channel A 1 CTR 1 SRC 12 62 CTR 5 channel A 5 PFI 19 SRC PFI 34 index z 1 CTR 1 GATE 13 63 CTR 5 index z 5 PFI 18 GATE PFI 34 index z 1 CTR 1 GATE 14 64 CTR 5 index z 5 PFI 18 GATE PFI 33 channel B 1 CTR 1 AUX 15 65 CTR 5 channel B 5 PFI 17 AUX NI 6624 User Manual 3 4 ni com Chapter 3 Table 3 2 NI 6624 Connector Pin Assignments Continued Signal Connections Motion Counter Counter Motion Signal Encoder Context Pin Pin Context Encoder Signal Name Context Default Number Number Default Context Name PFI 33 channel B 1 CTR 1 AUX 16 66 CTR 5 channel B 5 PFI 17 AUX PFI 32 CTR 1 Vdd 17 67 CTR 5 Vdd PFI 16 Vdd Vdd PFI 32 CTR 1 Vss 18 68 CTR 5 Vss PFI 16 Vss Vss PFI 32 CTR 1 OUT 19 69 CTR5 PFI 16 OUT PFI 32 CTR 1 Vss 20 70 CTR 5 Vss PFI 16 Vss Vss PFI 31 channel A 2 CTR 2 SRC 21 71 CTR 6 channel A 6 PFI 15 SRC PFI 31 channel A 2 CTR 2 SRC 22 72 CTR 6 channel A 6 PFI 15 SRC PFI 30 index z 2 CTR 2 GATE 23 13 CTR 6 index z 6 PFI 14 GATE PFI 30 index z 2 CTR 2 GATE 24 74 CTR 6 index z 6 PFI 14 GA
6. Chapter 3 Signal Connections The minimum pulse width and period listed in Table 3 5 is the minimum required for the internal signals The NI 6624 has signal requirements in order to pass through the isolation circuitry For more information about these signal requirements refer to the NI 6624 Specifications document available for download from ni com manuals Table 3 5 Minimum Pulse Width for CtrnGate Internal Signals Minimum with RTSI Parameter Minimum Connector Description Tgatepw l us 5 ns CtrnGate minimum pulse width Note For buffered measurements the minimum period required for the CtrnGate signal is determined by how fast the system can transfer data from your device to computer memory Counter n Auxiliary Signal You can select any PFI or RTSI as well as many other internal signals as the Counter n Auxiliary CtrnAux signal Much like this CtrnGate signal the CtrnAux signal is configured in edge detection or level detection mode depending on the application performed by the counter The aux signal can perform many different operations including starting and stopping the counter generating interrupts and saving the counter contents You can also use this signal to control the counting direction in edge counting applications Figure 3 12 shows the timing requirements for the CtrnAux signal Tauxpw CtrnAux EE Tauxpw Figure 3 12 Timing Requi
7. SHOULD NOT BE RELIANT SOLELY UPON ONE FORM OF ELECTRONIC SYSTEM DUE TO THE RISK OF SYSTEM FAILURE TO AVOID DAMAGE INJURY OR DEATH THE USER OR APPLICATION DESIGNER MUST TAKE REASONABLY PRUDENT STEPS TO PROTECT AGAINST SYSTEM FAILURES INCLUDING BUT NOT LIMITED TO BACK UP OR SHUT DOWN MECHANISMS BECAUSE EACH END USER SYSTEM IS CUSTOMIZED AND DIFFERS FROM NATIONAL INSTRUMENTS TESTING PLATFORMS AND BECAUSE A USER OR APPLICATION DESIGNER MAY USE NATIONAL INSTRUMENTS PRODUCTS IN COMBINATION WITH OTHER PRODUCTS IN A MANNER NOT EVALUATED OR CONTEMPLATED BY NATIONAL INSTRUMENTS THE USER OR APPLICATION DESIGNER IS ULTIMATELY RESPONSIBLE FOR VERIFYING AND VALIDATING THE SUITABILITY OF NATIONAL INSTRUMENTS PRODUCTS WHENEVER NATIONAL INSTRUMENTS PRODUCTS ARE INCORPORATED IN A SYSTEM OR APPLICATION INCLUDING WITHOUT LIMITATION THE APPROPRIATE DESIGN PROCESS AND SAFETY LEVEL OF SUCH SYSTEM OR APPLICATION Compliance Compliance with FCC Canada Radio Frequency Interference Regulations Determining FCC Class The Federal Communications Commission FCC has rules to protect wireless communications from interference The FCC places digital electronics into two classes These classes are known as Class A for use in industrial commercial locations only or Class B for use in residential or commercial locations All National Instruments NI products are FCC Class A products Depending on where it is operated this Class A product could be subject to rest
8. minimum for internal signals table 3 17 NI 6624 User Manual 1 2 PXI backplane clock phase locking 3 20 to 3 21 R real time system integration bus See RTSI related documentation viii RISI connector 3 1 Counter n Auxiliary signal 3 17 Counter n Auxiliary signal table 3 18 Counter n Gate signal 3 16 Counter n Gate signal table 3 17 Counter n Internal Output signal 3 18 Counter n Source signal table 3 15 description 3 19 digital filtering 3 2 MAX viii PXI compatible products 1 2 signal connection for PCI 3 20 signal connection for PXI 3 21 triggers 3 19 3 20 S signals Counter n Auxiliary signal 3 17 to 3 18 Counter n Gate 3 16 to 3 17 Counter n Internal Output 3 18 Counter n Source 3 14 to 3 16 software counter applications 3 19 software NI resources A 1 start triggers 3 18 ni com Index T W technical support A 1 Web resources A 1 training and certification NI resources A 1 transfer rates 2 4 to 2 5 transfer rates maximum table 2 5 transmission line effects 3 3 troubleshooting NI resources A 1 O National Instruments Corporation 1 3 NI 6624 User Manual
9. uses and can radiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case the user is required to correct the interference at their own expense Canadian Department of Communications This Class A digital apparatus meets all requirements of the Canadian Interference Causing Equipment Regulations Cet appareil num rique de la classe A respecte toutes les exigences du R glement sur le mat riel brouilleur du Canada Compliance with EU Directives Users in the European Union EU should refer to the Declaration of Conformity DoC for information pertaining to the CE marking Refer to the Declaration of Conformity DoC for this product for any additional regulatory compliance information To obtain the DoC for this product visit ni com certification search by model number or product line and click the appropriate link in the Certification column The CE marking Declaration of Conformity contains important supplementary information and instructions for the user or installer Contenis About This Manual dIE ian a und a poa Ra OE NE vii Related Documentation siriani RESINE ARE ae RETI A GR Ee SR EDE duna snes puro GN RE Gee viii Training Course Sisane ila ed Mea To da sounds Ls anta ge eil eee Bowe Vili Technical Support on the Web
10. you can export the CtrOSource signal to the PFI 39 CTR 0 SRC pin even if another PFI is inputting the CtrOSource signal This output is set to high impedance at startup For most applications unless you select an external source the 80MHzTimebase signal if available 20MHzTimebase signal or 100kHzTimebase signal generates the CtrnSource signal Figure 3 9 shows the timing requirements for the CtrnSource signal Tsrcper Tsrcpw CtrnSource Lo Tgatepw Figure 3 9 Timing Requirements for CtrnSource Signal Figure 3 9 shows the minimum period and pulse width that you must use for the CtrnSource signal This signal must satisfy both minimum criteria If the high phase of the CtrnSource signal is Tsrcpw ns the low phase must be Tsrcper Tsrcpw 3 14 ni com Chapter 3 Signal Connections The minimum pulse width and period listed in Table 3 3 is the minimum required for the internal signals The TIO device has signal requirements in order to pass through the isolation circuitry For more information about these signal requirements refer to the NI 6624 Specifications document which is available at ni com manuals Table 3 3 Minimum Pulse Width Signal for CtrnSource Internal Signals Parameter Minimum with Minimum RTSI Connector Description Tsrcpw without prescaling 1 Hs 5 ns CtrnSource minimum pulse width without prescaling Tsrcpw with prescal
11. 100 000 77 Continuous Operation Buffer Size Samples Rate kS s Buffer Size Samples Rate kS s 100 44 100 7 1 000 202 1 000 46 10 000 212 10 000 75 100 000 245 100 000 76 default 212 default 75 3 Note Transfer rates may vary depending on your computer hardware operating system and system activity This benchmark data was determined on an AMD Athlon XP 1800 computer with 128 MB of PC 2100 DDR RAM running Windows XP and LabVIEW using one counter of the TIO device For continuous measurements the transfer rate is the maximum sustained rate for 30 seconds on one counter The maximum sustainable transfer rates for the NI 6624 were found using internal signals to provide the stimulus for the measurement The numbers do not reflect the transfer rates through the optical isolation National Instruments Corporation 2 5 NI 6624 User Manual Signal Connections This chapter describes how to make input and output signal connections to the NI 6624 device by way of the device I O connector and the RTSI connector Programmable Function Interfaces PFIs The NI 6624 has 34 PFI lines with 26 inputs and eight outputs The PFI lines are unidirectional They are set either as inputs or outputs An input cannot be configured as an output and an output cannot be configured as an input through software Digital Filtering Each PFI line coming from the I O connector can be passed through a simp
12. A indicate movement in one direction while pulses on channel B indicate movement in the opposite direction This type of encoder is also referred to as up down encoder A type of digital input or output in which software reads or writes the digital line or port states directly without using any handshaking or hardware controlled timing functions Also called immediate nonhandshaking or unlatched digital I O The signal that determines whether a counter increments or decrements volts volts direct current volts in Virtual Instrument A LabVIEW program so called because it models the appearance and function of a physical instrument G 8 ni com Glossary wire Data path between nodes O National Instruments Corporation G 9 NI 6624 User Manual Index A accessories 1 4 backplane clock phase locking 3 20 to 3 21 C cables 1 4 calibration A 2 calibration certificate NI resources A 2 CompactPCI 1 2 connector pinout 3 7 to 3 8 conventions used in the manual vii counters counter applications 3 19 Counter n Auxiliary signal 3 17 to 3 18 Counter n Gate signal 3 16 to 3 17 Counter n Internal Output signal 3 18 Counter n Source signal 3 14 to 3 16 counter pairs 3 18 crosstalk 3 3 3 21 3 22 to 3 23 D data transfer counter applications 3 19 DMA channels 2 4 transfer rates 2 4 to 2 5 Declaration of Conformity NI resources A 1 diagnostic tools NI resources A 1 digital filter de
13. FI 28 Vss CTR 2 Vss 30 80 FI 27 CTR 3 SOURCE 31 81 FI 27 YCTR 3 SOURCE 32 82 iO 0 U UE OU o ORIO ORTO ORIO ORIO TO DEE DE DEE DE DES DE DE RIO RIO ORIO IO U FI 26 CTR 3 GATE 33 83 FI 26 CTR 3 GATE 34 84 FI 25 CTR 3 AUX 35 85 FI 25 CTR 3 AUX 36 86 FI 24 Vdd CTR 3 Vdd 37 87 Fl 24 Vss CTR 3 Vss 38 88 Fl 24 CTR 3 OUT 39 89 FI 24 Vss CTR 3 Vss 40 90 FIO 41 91 PROS 42 92 NC 43 93 NC 44 94 NC 45 95 NC 46 96 NC 47 97 NC 48 98 NC 49 99 NC 50 100 me PFI 23 CTR 4 SOURCE PFI 23 CTR 4 SOURCE PFI 22 CTR 4 GATE PFI 22 CTR 4 GATE PFI 21 CTR 4 AUX PFI 21 CTR 4 AUX PFI 20 Vdd CTR 4 Vdd PFI 20 Vss CTR 4 Vss PFI 20 CTR 4 OUT PFI 20 Vss CTR 4 Vss PFI 19 CTR 5 SOURCE PFI 19 CTR 5 SOURCE PFI 18 CTR 5 GATE PFI 18 CTR 5 GATE PFI 17 CTR 5 AUX PFI 17 CTR 5 AUX PFI 16 Vdd CTR 5 Vdd PFI 16 Vss CTR 5 Vss PFI 16 CTR 5 OUT PFI 16 Vss CTR 5 Vss PFI 15 CTR 6 SOURCE PFI 15 CTR 6 SOURCE PFI 14 CTR 6 GATE PFI 14 CTR 6 GATE PFI 13 CTR 6 AUX PFI 13 CTR 6 AUX PFI 12 Vdd CTR 6 Vdd PFI 12 Vss CTR 6 Vss PFI 12 CTR 6 OUT PFI 12 Vss CTR 6 Vss PFI 11 CTR 7 SOURCE PFI 11 CTR 7 SOURCE PFI 10 CTR 7 GATE PFI 10 CTR 7 GATE PFI 9 CTR 7 AUX PFI 9 CTR 7 AUX PFI 8 Vdd CTR 7
14. Vdd PFI 8 Vss CTR 7 Vss PFI 8 CTR 7 OUT PFI 8 Vss CTR 7 Vss PFI4 PFI 4 NC NC NC NC NC NC NC NC NC No Connect Figure 3 2 NI 6624 Connector Pinout 3 8 ni com Chapter 3 Signal Connections Inputs The inputs on the NI 6624 can be driven referenced to either the supply or ground of the external device connected to them They have a current limiter that protects the optical isolator The optical isolator transfers the externally connected signals to the TIO A diode protects against reverse connected signals Figure 3 3 shows a single NI 6624 isolated input Overvoltage IN and Overcurrent Protection De IN e K i Reverse Voltage i Blocker i NI 6624 Figure 3 3 NI 6624 Isolated Input Inputs can be connected to be referenced to either the supply or ground of the external device depending on whether or not this device can source the amount of current required by the NI 6624 input circuitry The minimum amount of current required by the NI 6624 inputs to guarantee a digital HIGH is 2 2 mA The overvoltage and overcurrent protector does not allow the amount of current flowing through the input circuitry to exceed 10 mA National Instruments Corporation 3 9 NI 6624 User Manual Chapter 3 Signal Connections Use the following guidelines for connecting the NI 6624 to be referenced to either the supply or ground
15. Web sites which provide up to date contact information support phone numbers email addresses and current events NI 6624 User Manual A 2 ni com Glossary Symbol Prefix Value c centi 10 7 m milli 10 3 u micro 10 6 n nano 10 9 k kilo 103 M mega 106 degree negative of or minus per percent plus or minus positive of or plus A amperes ANSI American National Standards Institute API application programming interface arm To enable a counter to start an operation If the application requires a trigger an armed counter waits for the trigger to begin the operation ASIC application specific integrated circuit National Instruments Corporation G 1 NI 6624 User Manual Glossary asynchronous base address buffer buffered bus clock cm CMOS CompactPCI crosstalk current drive capability NI 6624 User Manual A property of an event that occurs at an arbitrary time without synchronization to a reference clock Bit one binary digit either O or 1 Byte eight related bits of data an eight bit binary number Also used to denote the amount of memory required to store one byte of data A memory address that serves as the starting address for programmable registers All other addresses are located by adding to the base address A block of memory used to store measurement results A type of measurement in which multiple measurements are
16. in device functions For example the RTSI bus on a PXI TIO Series device is available in a PXI chassis but not in a CompactPCI chassis The specification permits vendors to develop sub buses that coexist with the basic PCI interface on the bus Compatible operation is not guaranteed between devices with different sub buses nor between devices with sub buses and PXI The standard implementation for does not include these sub buses The PXI TIO Series device works in any standard chassis adhering to the PICMG 2 0 R3 0 core specification 1 2 ni com Chapter 1 Introduction PXI specific features are implemented on the J2 connector of the bus The PXI device is compatible with any chassis with a sub bus that does not drive the lines used by that device Even if the sub bus is capable of driving these lines the PXI device is still compatible as long as those pins on the sub bus are disabled by default and never enabled UN Caution Damage can result if these lines are driven by the sub bus NI is not liable for any damage resulting from improper signal connections Getting Started Before installing your DAQ device you must install the software you plan to use with the device Installing NI DAQ 7 x If you are using NI DAQ 7 1 or later refer to the DAQ Getting Started Guide which you can download at ni com manuals The DAQ Getting Started Guide offers NI DAQ users step by step instructions for installing software and hardware confi
17. made consecutively and measurement results are stored in a buffer The group of conductors that interconnect individual circuitry in a computer Typically a bus is the expansion vehicle to which I O or other devices are connected Examples of PC buses are the AT EISA and PCI bus Celsius Hardware component that provides timing for various device operations centimeters complementary metal oxide semiconductor An electrical superset of the PCI bus architecture with a mechanical form factor suited for industrial applications An unwanted signal on one channel due to activity on a different channel The amount of current a digital or analog output channel is capable of sourcing or sinking while still operating within voltage range specifications G 2 ni com current sinking current sourcing DAQ DAQ STC DC decode device DIO DLL Glossary The ability of a DAQ board to dissipate current for analog or digital output signals The ability of a DAQ board to supply current for analog or digital output signals data acquisition Collecting and measuring electrical signals from sensors transducers and test probes or fixtures and inputting them to a computer for processing Collecting and measuring the same kinds of electrical signals with A D and or DIO boards plugged into a computer and possibly generating control signals with D A and or DIO boards in the same computer A custom ASIC developed by Nation
18. DAQ NI 6624 User Manual NI PCI 6624 and NI PXI 6624 Devices December 2006 7 NATIONAL 372142A 01 INSTRUMENTS Worldwide Technical Support and Product Information ni com National Instruments Corporate Headquarters 11500 North Mopac Expressway Austin Texas 78759 3504 USA Tel 512 683 0100 Worldwide Offices Australia 1800 300 800 Austria 43 0 662 45 79 90 0 Belgium 32 0 2 757 00 20 Brazil 55 11 3262 3599 Canada 800 433 3488 China 86 21 6555 7838 Czech Republic 420 224 235 774 Denmark 45 45 76 26 00 Finland 385 0 9 725 725 11 France 33 0 1 48 14 24 24 Germany 49 0 89 741 31 30 India 91 80 41190000 Israel 972 0 3 6393737 Italy 39 02 413091 Japan 81 3 5472 2970 Korea 82 02 3451 3400 Lebanon 961 0 1 33 28 28 Malaysia 1800 887710 Mexico 01 800 010 0793 Netherlands 31 0 348 433 466 New Zealand 0800 553 322 Norway 47 0 66 90 76 60 Poland 48 22 3390150 Portugal 351 210 311 210 Russia 7 495 783 68 51 Singapore 1800 226 5886 Slovenia 386 3 425 42 00 South Africa 27 0 11 805 8197 Spain 34 91 640 0085 Sweden 46 0 8 587 895 00 Switzerland 41 56 200 51 51 Taiwan 886 02 2377 2222 Thailand 662 278 6777 Turkey 90 212 279 3031 United Kingdom 44 0 1635 523545 For further support information refer to the Technical Support and Professional Services appendix To comment on National Instruments documentation refer to the National Instruments Web site at ni com info and enter the info code feedback O 2006 National Instrumen
19. PXI architecture and describes the electrical mechanical and software requirements for PXI Training Courses If you need more help getting started developing an application with NI products NI offers training courses To enroll in a course or obtain a detailed course outline refer to ni com training Technical Support on the Web For additional support refer to ni com support or zone ni com gi Note You can download these documents at ni com manuals NI 6624 User Manual viji ni com About This Manual DAQ specifications and some DAQ manuals are available as PDFs You must have Adobe Acrobat Reader with Search and Accessibility 5 0 5 or later installed to view the PDFs Refer to the Adobe Systems Incorporated Web site at www adobe com to download Acrobat Reader Refer to the National Instruments Product Manuals Library at ni com manuals for updated documentation resources O National Instruments Corporation ix NI 6624 User Manual Introduction This chapter describes the NI 6624 device lists what you need to get started and describes optional equipment If you have not already installed the NI 6624 device refer to the DAQ Getting Started Guide for installation instructions About NI 6624 Device The NI 6624 is an isolated counter timer device that uses two TIO ASICs application specific integrated circuits developed by National Instruments It has eight counters each with three individually isolated inputs an
20. TE PFI 29 channel B 2 CTR 2 AUX 25 79 CTR 6 channel B 6 PFI 13 AUX PFI 29 channel B 2 CTR 2 AUX 26 76 CTR 6 channel B 6 PFI 13 AUX PFI 28 CTR 2 Vdd 27 77 CTR 6 Vdd PFI 12 Vdd Vdd PFI 28 CTR 2 Vss 28 78 CTR 6 VSS PFI 12 Vss Vss PFI 28 CTR 2 OUT 29 79 CTR 6 PFI 12 OUT PFI 28 CTR 2 Vss 30 80 CTR 6 Vss PFI 12 Vss Vss PFI 27 channel A 3 CTR 3 SRC 31 81 CTR7 channel A 7 PFI 11 SRC PFI 27 channel A 3 CTR 3 SRC 32 82 CTR7 channel A 7 PFI 11 SRC National Instruments Corporation 3 5 NI 6624 User Manual Chapter 3 Signal Connections Table 3 2 NI 6624 Connector Pin Assignments Continued Motion Counter Counter Motion Signal Encoder Context Pin Pin Context Encoder Signal Name Context Default Number Number Default Context Name PFI 26 index z 3 CTR 3 GATE 33 83 CTR7 index z 7 PFI 10 GATE PFI 26 index z 3 CTR 3 GATE 34 84 CTR 7 index z 7 PFI 10 GATE PFI 25 channel B 3 CTR 3 AUX 35 85 CTR7 channel B 7 PFI 9 AUX PFI 25 channel B 3 CTR 3 AUX 36 86 CTR7 channel B 7 PFI 9 AUX PFI 24 CTR 3 Vdd 37 87 CTR 7 Vdd PFI 8 Vdd Vdd PFI 24 CTR 3 Vss 38 88 CTR 7 Vss PFI 8 Vss Vss PFI 24 CTR 3 OUT 39 89 CTR7 PFI 8 OUT PFI 24 CTR 3 Vss 40 90 CTR 7 Vss PFI 8 Vss Vss PFI 0 41 91 PFI 4 PFI 0
21. a MasterTimebase signal from the RTSI trigger bus Any TIO device can drive its 20MHzTimebase signal onto the RTSI Trigger 7 pin Although some TIO devices have a 80MHzTimebase the RTSI bus cannot carry the 80MHzTimebase signal for bandwidth reasons By default TIO devices do not drive the RTSI Trigger 7 bus clock line Figure 3 13 shows the RTSI signal connection scheme for PCI TIO devices aX S lt gt CirnSource Trigger lt 0 6 gt D lt gt CirnGate B lt 7 gt 2 gt CirnAux OC E at CtrnlnternalOutput v na D lt E e T RTSI Trigger7 4 20 MHz Timebase D t Master Timebase oc a Figure 3 13 RTSI Signal Connection Scheme for PCI PXI TIO devices use PXI trigger line 7 as their RTSI clock line The maximum timebase provided by the PXI TIO device is phase locked to the 10 MHz PXI backplane clock By using other PXI modules that phase lock 3 20 ni com Chapter 3 Signal Connections their board clocks to the 10 MHz PXI backplane clock you can better synchronize operation in a multi module PXI system The phase locking is enabled by default and can be disabled by way of software If the module is used in a compact PCI chassis that does not have the 10 MHz PXI backplane clock the phase locking is automatically disabled Additionally PXI trigger line 6 corresponds to PXI star trigger on PXI TIO devices Figure 3 14 shows the RTSI signal con
22. al Instruments that provides timing information and general purpose counter timers on National Instruments E Series boards direct current Used in the context of motion encoders The two channels of a motion encoder indicate information about movement and direction of movement of an external device Decoding refers to extracting this information from the signals on these channels A plug in data acquisition board card or pad that can contain multiple channels and conversion devices Plug in boards PCMCIA cards and DAQ devices that connect to your computer parallel port are all examples of DAQ devices digital input output Dynamic link library a software module in Microsoft Windows containing executable code and data that can be called or used by Windows applications or other DLLs Functions and data in a DLL are loaded and linked at run time when they are referenced by a Windows application or other DLLs O National Instruments Corporation G 3 NI 6624 User Manual Glossary DMA driver E EEPROM EISA encode ETS FSK GATE glitch GND H hardware HW NI 6624 User Manual Direct memory access a method by which data can be transferred to from computer memory from to a device or memory on the bus while the processor does something else DMA is the fastest method of transferring data to from computer memory Software that controls a specific hardware device such as a DAQ board Electrically e
23. as short as possible For more information about connections to inductive loads refer to the Driving Inductive Loads section of this document Driving Inductive Loads When one of the outputs on the NI 6624 is driving a fairly inductive load make sure that the high voltages that appear because of suddenly switching the current through the inductor do not cause damage to the output circuit or the load You can avoid this problem by adding flyback diodes across your inductive load as shown in Figure 3 7 i Devi Vda e i e Flyback nos 3 Diode Out e e Vss os DV No NI 6624 Figure 3 7 Adding Flyback Diodes across Inductive Load gi Note Ensure the diode you chose is capable of handling the amount of current the load is holding when the output is ON NI 6624 User Manual 3 12 ni com Chapter 3 Signal Connections Input Threshold Voltage When you want a threshold higher than the default 4 V max for HIGH you can insert a zener diode in series with an input to shift its threshold by the zener breakdown voltage You can install the zener diode in the connector block Figure 3 8 shows the polarity of the zener diode with respect to the NI 6624 input Vz IN shifted e X o IN Zener Diode IN shifted e e IN NI 6624 Figure 3 8 Polarity of Zener Diode with Respect to NI 6624 Input After inserting the zener diode the new threshold becomes 4 Vz For example i
24. as the counter Source e The frequency of the external source is one fourth of the maximum onboard timebase e You can have the counter value and output to change synchronously with the maximum onboard timebase In all other cases do not enable duplicate count prevention When Not to Use Duplicate Count Prevention Use duplicate counter prevention only for buffered measurements with an external CtrnSource signal Do not use it when the CtrnSource signal is greater than one fourth of the maximum timebase Transfer Rates The maximum sustainable transfer rate the NI 6624 device can achieve for a buffered acquisition depends on the following factors e Amount of available bus bandwidth e Processor speed and operating system e Application software To reduce the amount of bus activity limit the number of devices generating bus cycles Because direct memory access DMA transfers are faster than interrupt driven transfers NI DAQmx uses DMA by default for buffered acquisitions B Note The maximum sustainable transfer rate is always lower than the peak transfer rate NI 6624 User Manual 2 4 ni com Chapter 2 Device Overview Table 2 1 lists the maximum transfer rates for the NI 6624 device Table 2 1 Maximum Transfer Rates DMA Interrupt Finite Operation Buffer Size Samples Rate kS s Buffer Size Samples Rate kS s 100 5 000 100 77 1 000 2 150 1 000 77 10 000 1 600 10 000 77 100 000 1 350
25. cal support options in your area visitni com services or contact your local office at ni com contact Training and Certification Visit ni com training for self paced training eLearning virtual classrooms interactive CDs and Certification program information You also can register for instructor led hands on courses at locations around the world System Integration If you have time constraints limited in house technical resources or other project challenges National Instruments Alliance Partner members can help To learn more call your local NI office or visit ni com alliance Declaration of Conformity DoC A DoC is our claim of compliance with the Council of the European Communities using the manufacturer s declaration of conformity This system affords the user protection for electronic compatibility EMC and product safety You can obtain the DoC for your product by visiting ni com certification A 1 NI 6624 User Manual Appendix A Technical Support and Professional Services e Calibration Certificate If your product supports calibration you can obtain the calibration certificate for your product at ni com calibration If you searched ni com and could not find the answers you need contact your local office or NI corporate headquarters Phone numbers for our worldwide offices are listed at the front of this manual You also can visit the Worldwide Offices section of ni com niglobal to access the branch office
26. d one isolated output It allows operation at up to 48 V with robust protection against higher voltage transients and short circuits There are also two additional PFI inputs The inputs on the NI 6624 are driven referenced to either the supply or ground and protected by current limiting circuits Outputs are open drain low side switches that are protected against short circuits at all speeds of operation All inputs and outputs are protected against reverse polarity connection O National Instruments Corporation 1 1 NI 6624 User Manual Chapter 1 Introduction Figure 1 1 illustrates the key functional components of the NI 6624 device VO Connector PEI Lines Isolation KZ 20 MHz Address Oscillator y Decoder mad lea EEPROM Address Data MITE Control PCI i Interface TIO 1 Nv OD PCI Bus Interrupt Board Lines gt y E A TIO 0 gt Interrupt RTSI PXI Trigger Bus Figure 1 1 NI 6624 Block Diagram Using PXI with CompactPCl NI 6624 User Manual Using PXI compatible products with standard products is an important feature provided by PXI Hardware Specification Revision 2 1 If you use a PXI compatible plug in module in a standard chassis you cannot use PXI specific functions but you can still use the basic plug
27. e NI 6624 as Referenced to the SupplY ses see se ee 3 10 O National Instruments Corporation v NI 6624 User Manual Contents OUTS aiaeei ernia ER EE ER EE ali 3 11 Driving Inductyve ER OE RE ER dass 3 12 Input Threshold Voltages Es ono RED hed eta cde sd RE GESE gee suas cubana sua o 3 13 Counters ia elena aiar Na ira 3 13 Counter n Source Signal eee 3 14 Counter Source to Counter Out Delay i 3 15 Counter n ST EE EE crt 3 16 Counter n Auxiliary Signal nni aaa 3 17 Counter n Internal Output Signal ii 3 18 Hardware Arm Start Triggers eretas 3 18 Counter TE OE EE OE RE EE EN 3 18 Counter Applications susse ee sg EE Gee KEER ga nia ES Ag Ee ge RE es 3 19 Real Time System Integration BUS i 3 19 AR Ee SR EE EE RE EE dali Ai 3 20 OS TE RE isa IL ilaele 3 21 Field Wiring Considerations se se ee Re ee AR Se Re ee ee 3 21 EE ER OE ER KA OIE HEN 3 22 Crosstalk ops riene DE EE EE OE EE EE 3 22 Appendix A Technical Support and Professional Services Glossary Index NI 6624 User Manual vi ni com About This Manual Conventions This manual describes the electrical and mechanical aspects of the National Instruments NI 6624 device and contains information about device operation and programming Unless otherwise noted text applies to both the PCI 6624 device and the PXI 6624 device The PCI and PXI imple
28. e pulled high Initial PFI state At power on all PFI lines are active high unless configured otherwise by software An active level 1 corresponds to a high voltage and an inactive level 0 corresponds to a low voltage SL Note After an output is used its default state as determined by the driver becomes LOW the output MOSFET being ON If such a behavior is undesirable because of continuous power dissipation in the load for example you can change this default state to HIGH switching the output MOSFET to OFF through software National Instruments Corporation 3 3 NI 6624 User Manual Chapter 3 Signal Connections Pin Assignments Table 3 2 lists the NI 6624 I O connector pin assignments Table 3 2 NI 6624 Connector Pin Assignments Motion Counter Counter Motion Signal Encoder Context Pin Pin Context Encoder Signal Name Context Default Number Number Default Context Name PFI 39 channel A 0 CTR 0 SRC 1 51 CTR 4 channel A 4 PFI 23 SRC PFI 39 channel A 0 CTR 0 SRC 2 52 CTR 4 channel A 4 PFI 23 SRC PFI 38 index z 0 CTR 0 GATE 3 53 CTR 4 index z 4 PFI 22 GATE PFI 38 index z 0 CTR 0 GATE 4 54 CTR 4 index z 4 PFI 22 GATE PFI 37 channel B 0 CTR 0 AUX 3 55 CTR 4 channel B 4 PFI 21 AUX PFI 37 channel B 0 CTR 0 AUX 6 56 CTR 4 channel B 4 PFI 21 AUX PFI 36 CTR 0 Vdd 7 57 CTR 4 Vdd
29. e several measurement functions to a common trigger or timing event In a PCI system the RTSI bus consists of the RTSI bus interface and a ribbon cable The bus can route timing and trigger signals between several functions on as many as five DAQ devices in the computer In a PXI system the RTSI bus consists of the RTSI bus 1 When used with the NI 6624 the encoder should be able to drive the minimum 2 2 mA required by the NI 6624 Refer to the Inputs section for more information If the encoder cannot drive but can sink that amount of current then the NI 6624 can be connected as referenced to the supply In this case the signals read by the NI 6624 are inverted The index z input should always be positive logic in order for the encoder input of the NI 6624 to operate properly This means that the index z will not work when referenced to the supply and as a result should be left disconnected National Instruments Corporation 3 19 NI 6624 User Manual Chapter 3 Signal Connections RTSI Triggers NI 6624 User Manual interface and the PXI trigger signals on the PXI backplane This bus can route timing and trigger signals between several functions on as many as seven DAQ devices in the system For a RTSI connector pinout go to ni com info and enter rtsipin TIO devices require a frequency timebase for its operation This frequency timebase must come from the onboard crystal oscillator and is required even if the device is receiving
30. f you choose the zener diode such that Vz is approximately equal to 7 5 V when its current Iz varies from 1 10 mA the threshold voltage between IN shifted and IN shifted is approximately 4 7 5 11 5 V Counters The counters on TIO devices are a superset of the DAQ system timing controller DAQ STC general purpose counters developed by National Instruments These counters are backward compatible with the DAQ STC in functionality and software programming The same software API and functions are used to program the DAQ STC general purpose counters and the counters on TIO devices The counters on TIO devices have two internal timebases 100 kHz and 20 MHz Each counter has a gate auxiliary and source input Each of these inputs can be an internal or external signal that connects to the I O connector Each counter also has an output signal National Instruments Corporation 3 13 NI 6624 User Manual Chapter 3 Signal Connections Counter n Source Signal NI 6624 User Manual You can select any PFI as well as many other internal signals as the Counter n Source CtrnSource signal The CtrnSource signal is configured in edge detection mode on either the rising or falling edge The selected edge of the CtrnSource signal increments and decrements the counter value depending on the application the counter is performing You can export the CtrnSource signal to the I O connector s default PFI input for each CtrnSource For example
31. graphical errors exist National Instruments reserves the right to make changes to subsequent editions of this document without prior notice to holders of this edition The reader should consult National Instruments if errors are suspected In no event shall National Instruments be liable for any damages arising out of or related to this document or the information contained in it EXCEPT AS SPECIFIED HEREIN NATIONAL INSTRUMENTS MAKES NO WARRANTIES EXPRESS OR IMPLIED AND SPECIFICALLY DISCLAIMS ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE CUSTOMER S RIGHT TO RECOVER DAMAGES CAUSED BY FAULT OR NEGLIGENCE ON THE PART OF NATIONAL INSTRUMENTS SHALL BE LIMITED TO THE AMOUNT THERETOFORE PAID BY THE CUSTOMER NATIONAL INSTRUMENTS WILL NOT BE LIABLE FOR DAMAGES RESULTING FROM LOSS OF DATA PROFITS USE OF PRODUCTS OR INCIDENTAL OR CONSEQUENTIAL DAMAGES EVEN IF ADVISED OF THE POSSIBILITY THEREOF This limitation of the liability of National Instruments will apply regardless of the form of action whether in contract or tort including negligence Any action against National Instruments must be brought within one year after the cause of action accrues National Instruments shall not be liable for any delay in performance due to causes beyond its reasonable control The warranty provided herein does not cover damages defects malfunctions or service failures caused by owner s failure to follow the National Instruments installation operatio
32. guring channels and tasks and getting started developing an application Installing Other Software If you are using other software refer to the installation instructions that accompany your software Installing Hardware The DAQ Getting Started Guide contains non software specific information about how to install PCI PXI PCMCIA and USB IEEE 1394 devices as well as accessories and cables National Instruments Corporation 1 3 NI 6624 User Manual Chapter 1 Introduction Accessories and Cables Table 1 1 lists the accessories and cables available for use with the NI 6624 device Table 1 1 Accessories and Cables Accessory Description SH100 100 F 100 pin shielded cable 2 m R1005050 Ribbon cable with a 100 pin connector to two 50 pin connectors 1 m or 2m RTSI cable Cable that connects to the RTSI bus CB 50 50 pin connector block CB 50LP Low cost 50 pin connector block SCB 100 100 pin connector block yl Note The R1005050 requires two 50 pin connector blocks to enable connection to all NI 6624 lines The CB 100 kit contains two CB 50 connector blocks and a R1005050 1 m cable Go to ni com for more information about this kit and other optional equipment available from National Instruments NI 6624 User Manual 1 4 ni com Device Overview This chapter provides information about NI 6624 device functionality Duplicate Count Prevention Duplicate count prevention or synchron
33. hat Works Incorrectly Duplicate Counting In Figure 2 2 after the first rising edge of Gate no Source pulses occur so the counter does not write the correct data to the buffer Gate Source Counter Value 6 X7 X 1 Buffer 7 No Source edge so no value written to buffer Figure 2 2 Example Application That Works Incorrectly Example Application That Prevents Duplicate Counting NI 6624 User Manual With duplicate count prevention enabled the counter synchronizes both the Source and Gate signals to the maximum onboard timebase By synchronizing to the timebase the counter detects edges on the Gate even if the Source does not pulse This enables the correct current count to be 2 2 ni com Chapter 2 Device Overview stored in the buffer even if no Source edges occur between Gate signals Figure 2 3 shows an example application that prevents duplicate counting Gate Source Counter detects rising Gate edge Counter value increments only one time for each Source pulse 80 MHz Timebase Counter Value Buffer 6 X Xo XA Na RE Figure 2 3 Example Application That Prevents Duplicate Counting Even if the Source pulses are lo
34. he proper names of disk drives paths directories programs subprograms subroutines device names functions operations variables filenames and extensions National Instruments Corporation vii NI 6624 User Manual About This Manual Related Documentation The following documents contain information that you might find helpful as you use this manual e NI6624 Specifications This document contains specifications for the NI 6624 device It available for download at ni com manuals e DAQ Getting Started Guide This guide describes how to install the NI DAQ 7 x software and the DAQ device and how to confirm that the device is operating properly e NI DAQmx Help This help file contains information about using NI DAQmx to program National Instruments devices NI DAQmx is the software you use to communicate with and control your DAQ device e Measurement amp Automation Explorer Help for NI DAQmx This help file contains information about configuring and testing DAQ devices SCXI devices SCC devices and RTSI cables using Measurement amp Automation Explorer MAX for NI DAQmx and information about special considerations for operating systems e DAQ Assistant Help This help file contains information about creating and configuring channels tasks and scales using the DAQ Assistant 3 Note You can download these documents at ni com manuals e PXI Hardware Specification Revision 2 1 This document introduces the
35. hese two ranges may or may not pass depending on the phase of the pulse with respect to the filter clock timebase Table 3 1 summarizes the properties of the different filter settings Table 3 1 Filter Settings Filter Setting Pulse Width Passed Pulse Width Blocked 5 us 5 us 2 5 us lus 1 us 500 ns NI 6624 User Manual 3 2 ni com Table 3 1 Filter Settings Continued Chapter 3 Signal Connections Filter Setting Pulse Width Passed Pulse Width Blocked 500 ns 500 ns 250 ns 100 ns 100 ns 50 ns Programmable setting trek titrelk with period of clock tape You individually configure the filter setting for each PFI line The filters are useful to maintain signal integrity They can prevent measurement errors caused by noise crosstalk or transmission line effects 3 Note The NI 6624 has 1 us digital filters enabled on all PFI lines by default Power On State For more information about using the digital filters on your device refer to Digital Filtering for Counters in the NI DAQmx Help When the NI 6624 is powered on the lines are in the following states Initial input state At power on all input lines are pulled low if nothing is driving them externally for example through the I O connector Initial output state At power on all output lines are off Initial RTSI state At power on all RTSI lines are at high impedance The voltage levels of the RTSI lines ar
36. ing l us 3 5 ns CtrnSource minimum pulse width with prescaling Tsrcper without prescaling 2 us 50 ns CtrnSource minimum period without prescaling Tsrcper with prescaling 2 Us 16 67 ns CtrnSource minimum period with prescaling Counter Source to Counter Out Delay Figure 3 10 shows the CtrnSource to CtrnInternalOutput delay CtrnSource Tso Tso CtrninternalOutput Figure 3 10 CtrnSource to CtrninternalOutput Delay Figure 3 10 shows the delay between the active edge of the CtrnSource signal and the active edge of the CtrnInternalOutput signal In the figure the CtrnSource and CtrnInternalOutput signals are active high If you use the pulse output mode for the CtrnInternalOutput signal you will see the TC pulse one CtrnSource period before the CtrnInternalOutput toggles under the toggle output mode The output delay listed in Table 3 4 is for internal signals The corresponding delay values at a connector block are larger due to cable National Instruments Corporation 3 15 NI 6624 User Manual Chapter 3 Signal Connections Parameter Typical Maximum Description delays The TIO device s isolation circuitry delays the signals further For more information about these signal delays refer to the NI 6624 Specifications document available for download at ni com manuals Table 3 4 Out
37. le digital debouncing filter The filter operates off a filter clock and a fast internal sampling clock The filter circuit samples the signal on the PFI line on each rising edge of the sampling clock A change in the signal is propagated only if it maintains its new state for at least the duration between two consecutive rising edges of the filter clock timebase The frequency of the filter clock timebase determines whether a transition in the signal may propagate or not The function of the internal sampling clock is to increase the sampling rate and prevent aliasing Figure 3 1 demonstrates the function of this filter External Signal l I on PFI Line Filter Clock 1 L Lo L L Maximum Timebase 1 l LI l l External Signal Sample by Maximum Timebase EDS ia SES Bs Filtered PFI Line Figure 3 1 Digital Filtering National Instruments Corporation 3 1 NI 6624 User Manual Chapter 3 3 Signal Connections In Figure 3 1 the low to high transition is guaranteed to be passed through only if the signal remains high for at least two periods of the filter clock timebase and is sampled high at each sampling clock rising edge during this time Although the low to high transition is shown in this example the same is true for high to low transitions Note The effect of filtering is that the signal transition i
38. mentations are the same in functionality their primary difference is the bus interface lt gt bold italic monospace The following conventions are used in this manual Angle brackets that contain numbers separated by an ellipsis represent a range of values associated with a bit or signal name for example AO lt 3 0 gt The symbol leads you through nested menu items and dialog box options to a final action The sequence File Page Setup Options directs you to pull down the File menu select the Page Setup item and select Options from the last dialog box This icon denotes a note which alerts you to important information This icon denotes a caution which advises you of precautions to take to avoid injury data loss or a system crash When this symbol is marked on a product refer to the Read Me First Safety and Radio Frequency Interference document for information about precautions to take Bold text denotes items that you must select or click in the software such as menu items and dialog box options Bold text also denotes parameter names Italic text denotes variables emphasis a cross reference or an introduction to akey concept Italic text also denotes text that is a placeholder for a word or value that you must supply Text in this font denotes text or characters that you should enter from the keyboard sections of code programming examples and syntax examples This font is also used for t
39. n or maintenance instructions owner s modification of the product owner s abuse misuse or negligent acts and power failure or surges fire flood accident actions of third parties or other events outside reasonable control Copyright Under the copyright laws this publication may not be reproduced or transmitted in any form electronic or mechanical including photocopying recording storing in an information retrieval system or translating in whole or in part without the prior written consent of National Instruments Corporation National Instruments respects the intellectual property of others and we ask our users to do the same NI software is protected by copyright and other intellectual property laws Where NI software may be used to reproduce software or other materials belonging to others you may use NI software only to reproduce materials that you may reproduce in accordance with the terms of any applicable license or other legal restriction Trademarks National Instruments NI ni com and LabVIEW are trademarks of National Instruments Corporation Refer to the Terms of Use section on ni com legal for more information about National Instruments trademarks Other product and company names mentioned herein are trademarks or trade names of their respective companies Members of the National Instruments Alliance Partner Program are business entities independent from National Instruments and have no agency partnership or joi
40. nction you must provide and connect 5 to 48 V between Vdd and Vss Reverse connections of Vdd and Vss do not damage the circuit as long as these connections do not exceed the 60 VDC as listed in the NI 6624 Specifications document available for download from ni com manuals If the amount of current the MOSFET conducts exceeds a certain level 800 mA typical such as when a short occurs in the load the MOSFET turns off for 250 ms to protect itself and the load After this period of time the output tries to switch on If the short still exists it will be turned off for another 250 ms This process continues until the overcurrent or short condition is removed after which switching automatically resumes National Instruments Corporation 3 11 NI 6624 User Manual Chapter 3 Signal Connections SG Note Add bypass capacitor s between Vdd and Vss at the load to reduce the chances of ringing when the output switches on and off especially when the connecting wires are long B Note After you use an output its default state as determined by the driver becomes LOW the output MOSFET being ON If you want to change this state for example to eliminate continuous power dissipation in the load during the idle state you can change the default to HIGH switching the output MOSFET to OFF through software gi Note NI recommends that you connect both Vss terminals at the connector block to the available reference or ground and keep all connections
41. nection scheme for PXI TIO devices PXI Star 6 CtrnSource d 7 E O E j CtrnGate D O S PXI Trigger 2 ii c jd CtrnnternalOutput e lt 0 5 gt O no a B E PXI Trigger 7 20 MHz Timebase D Master Timebase oc Figure 3 14 RTSI Signal Connection for PXI 1 0 Signals Field Wiring Considerations To prevent incorrect results caused by environmental noise and crosstalk make sure the NI 6624 and the peripheral device share a common ground reference Connect one or more NI 6624 device D GND lines to the ground reference of your peripheral device You can also use the digital filters available on each PFI line to reduce errors that these problems might cause National Instruments Corporation 3 21 NI 6624 User Manual Chapter 3 Signal Connections Noise For noise immunity take the following precautions e When routing signals to the NI 6624 device keep cabling away from noise sources e Separate the NI 6624 device signal lines from high current or high voltage lines High current or high voltage lines that run in parallel paths at a close distance can induce currents in or voltages on the NI 6624 device signal lines To reduce the coupling between lines separate parallel lines by a reasonable distance or run the lines at right angles to one another e Do not run signal lines through conduits that also contain power lines e Protect signal lines from magnetic and electric fields ca
42. ng the counter increments only once for each source pulse Normally the counter and Counter n Internal Output signals change synchronously to the Source signal With duplicate count prevention the counter value and Counter n Internal Output signals change synchronously to the maximum onboard timebase Notice that duplicate count prevention should only be used if the frequency of the Source signal is one fourth of the maximum onboard timebase Enabling Duplicate Count Prevention in NI DAQmx You can enable duplicate count prevention in NI DAQmx by setting the Enable Duplicate Count Prevention attribute property For specific information on finding the Enable Duplicate Count Prevention attribute property refer to the help file for the API you are using Refer to the NJ DAQm x Help for more information O National Instruments Corporation 2 3 NI 6624 User Manual Chapter 2 Device Overview When to Use Duplicate Count Prevention Use duplicate count prevention for buffered measurements that use an external CtrnSource signal and the frequency of the signal is less than or equal to one fourth of the maximum onboard timebase Use this mode if you are using a low frequency or you expect zero CtrnSource edges between successive edges of the CtrnGate signal You should use duplicate count prevention if the following conditions are true e You are making a buffered counter input measurement e You are using an external signal such as PFI x
43. nother counter This pairing allows some counter signals to connect to signals on the other counter The counters are paired as shown in Table 3 7 Table 3 7 Counter Pairs ctr ctrl ctr2 ctr3 ctr4 ctr5 ctr6 ctr7 3 18 ni com Chapter 3 Signal Connections CtrOInternalOutput which you can connect to Ctrl Gate is an example of two signals that you can connect between the ctr0 ctrl pair Conversely to connect CtrOInternalOutput to Ctr2Gate you must use other circuitry on the NI 6624 device such as RTSI Triggers Counter Applications You can use the NI 6624 device in the following counter based applications e Counting Edges e Frequency Measurement e Period Measurement e Position Measurement with Linear and Angular Encoders e Pulse Width Measurement e Semi Period Measurement e Two Edge Separation Measurement e Pulse Generation You can perform these measurements through programmed I O interrupt or DMA data transfer mechanisms The measurements can be finite or continuous in duration Some of the applications also use start triggers pause triggers and hardware arm triggers 3 Note For more information about programming counter applications and triggers in software refer to the NI DAQmx Help and or use the examples that are available with NI DAQmx Real Time System Integration Bus TIO devices use the National Instruments Real Time System Integration RTSI bus to easily synchroniz
44. nputs the latter ones should be digitally filtered You can reduce crosstalk related problems by using a ribbon cable and separating the fast edged and slow edged signals on the cable For example when you use PFI 12 as an output you should avoid connecting a slowly changing signal to either PFI 11 or PFI 13 As another example if you are connecting a fast edged signal to PFI 10 you should avoid connecting a slowly changing signal to either PFI 9 or PFI 11 National Instruments Corporation 3 23 NI 6624 User Manual Technical Support and Professional Services Visit the following sections of the National Instruments Web site at ni com for technical support and professional services O National Instruments Corporation Support Online technical support resources at ni com support include the following Self Help Resources For answers and solutions visit the award winning National Instruments Web site for software drivers and updates a searchable KnowledgeBase product manuals step by step troubleshooting wizards thousands of example programs tutorials application notes instrument drivers and so on Free Technical Support All registered users receive free Basic Service which includes access to hundreds of Application Engineers worldwide in the NI Discussion Forums at ni com forums National Instruments Application Engineers make sure every question receives an answer For information about other techni
45. nt venture relationship with National Instruments Patents For patents covering National Instruments products refer to the appropriate location Help Patents in your software the patents txt file on your CD or ni com patents WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS 1 NATIONAL INSTRUMENTS PRODUCTS ARE NOT DESIGNED WITH COMPONENTS AND TESTING FOR A LEVEL OF RELIABILITY SUITABLE FOR USE IN OR IN CONNECTION WITH SURGICAL IMPLANTS OR AS CRITICAL COMPONENTS IN ANY LIFE SUPPORT SYSTEMS WHOSE FAILURE TO PERFORM CAN REASONABLY BE EXPECTED TO CAUSE SIGNIFICANT INJURY TO A HUMAN 2 IN ANY APPLICATION INCLUDING THE ABOVE RELIABILITY OF OPERATION OF THE SOFTWARE PRODUCTS CAN BE IMPAIRED BY ADVERSE FACTORS INCLUDING BUT NOT LIMITED TO FLUCTUATIONS IN ELECTRICAL POWER SUPPLY COMPUTER HARDWARE MALFUNCTIONS COMPUTER OPERATING SYSTEM SOFTWARE FITNESS FITNESS OF COMPILERS AND DEVELOPMENT SOFTWARE USED TO DEVELOP AN APPLICATION INSTALLATION ERRORS SOFTWARE AND HARDWARE COMPATIBILITY PROBLEMS MALFUNCTIONS OR FAILURES OF ELECTRONIC MONITORING OR CONTROL DEVICES TRANSIENT FAILURES OF ELECTRONIC SYSTEMS HARDWARE AND OR SOFTWARE UNANTICIPATED USES OR MISUSES OR ERRORS ON THE PART OF THE USER OR APPLICATIONS DESIGNER ADVERSE FACTORS SUCH AS THESE ARE HEREAFTER COLLECTIVELY TERMED SYSTEM FAILURES ANY APPLICATION WHERE A SYSTEM FAILURE WOULD CREATE A RISK OF HARM TO PROPERTY OR PERSONS INCLUDING THE RISK OF BODILY INJURY AND DEATH
46. ous counting mode ensures that a counter returns correct data in applications that are a slow or non periodic external source Duplicate count prevention applies only to buffered counter applications such as measuring frequency or period For such buffered applications the counter should store the number of times an external source pulses between rising edges on the Gate signal Example Application That Works Correctly No Duplicate Counting Figure 2 1 shows an external buffered signal as the period measurement Source Rising Edge of Gate Counter detects rising edge of Gate on the next rising edge of Source Gate Source Counter Value 6 Xz X1 Ya x 1 Buffer 7 Le 7 Figure 2 1 Example Application That Works Correctly National Instruments Corporation 2 1 NI 6624 User Manual Chapter 2 Device Overview On the first rising edge of the Gate the current count of 77 is stored On the next rising edge of the Gate the counter stores a 2 because two Source pulses occurred after the previous rising edge of Gate The counter synchronizes or samples the Gate signal with the Source signal So the counter does not detect a rising edge in the Gate until the next Source pulse In this example the counter stores the values in the buffer on the first rising Source edge after the rising edge of Gate Example Application T
47. put Delay for Internal Signals Tso 16 ns 26 ns CtrnSource to CtrnInternalOutput delay gi Note When us ing duplicate count prevention mode the minimum period of signal used as the source of the counter must be greater than or equal to four times the period of the maximum timebase For more information refer to the Duplicate Count Prevention section of Chapter 2 Device Overview gi Note You cannot export the CtrnSource signal to the I O connector on the NI 6624 Counter n Gate Sig NI 6624 User Manual nal You can select any PFI or RTSI as well as many other internal signals like the Counter n Gate CtrnGate signal The CtrnGate signal is configured in edge detection or level detection mode depending on the application performed by the counter The gate signal can perform many different operations including starting and stopping the counter generating interrupts and saving the counter contents You can export the CtrnGate signal to the I O connector s default PFI input for each CtrnGate For example you can export the gate signal connected to counter 0 to the PFI 38 CTR 0 GATE pin even if another PFI is inputting the CtrOGate signal This output is set to high impedance at startup Figure 3 11 shows the timing requirements for the CtrnGate signal Tgatepw CtrnGate L Tgatepw Figure 3 11 Timing Requirements for CtrnGate Signal 3 16 ni com
48. r low voltage state immediately following a transition to that state Real time system integration bus the National Instruments timing bus that connects DAQ boards directly by means of connectors on top of the boards for precise synchronization of functions seconds See HW Save register In the counter context source refers to the signal that causes the counter to increment or decrement In the context of signals source refers to the device that drives a signal The signal that causes the counter to increment or decrement A TTL level signal having two discrete levels a high and a low level that starts an operation A property of an event that is synchronized to a reference clock NI 6624 User Manual Glossary TC termination timebase trigger tri state TTL two pulse encoder U unstrobed digital I O UP_DOWN V V VDC Vin VI NI 6624 User Manual Terminal count a strobe that occurs when a counter reaches zero from either direction Matching of impedances at the end of a signal path to minimize reflections Another term used for the SOURCE of a counter Usually indicates an internal SOURCE provided by or derived from an onboard oscillator Any event that causes starts or stops some form of data capture A third output state other than high or low in which the output is undriven transistor transistor logic A motion encoder that has two channels channels A and B Pulses on channel
49. rasable programmable read only memory ROM that can be erased with an electrical signal and reprogrammed extended industry standard architecture Used in the context of motion encoders Motion encoders provide information about movement and direction of movement of an external device The process of producing the pulses that contain this information is called encoding equivalent time sampling frequency shift keying The signal that controls the operation of a counter This signal may start or stop the operation of a counter reload the counter or save the results of a counter A brief unwanted change or disturbance in a signal level ground The physical components of a computer system such as the circuit boards plug in boards chassis enclosures peripherals cables and so on hardware G 4 ni com HW Save register Hz VO in interrupt interrupt level IOH IOL IRQ ISA L LabVIEW m max maximum timebase min O National Instruments Corporation G 5 Glossary A register inside the NI TIO ASIC that stores the result of a measurement Hertz a unit of frequency One hertz corresponds to one cycle or event per second Input output the transfer of data to from a computer system involving communications channels operator interface devices and or data acquisition and control interfaces inches A computer signal indicating that the CPU should suspend its current task to service a de
50. rements for the CtrnAux Signal O National Instruments Corporation 3 17 NI 6624 User Manual Chapter 3 Signal Connections Table 3 6 Minimum Pulse Width for CtrnAux Internal Signals Minimum with RTSI Parameter Minimum Connector Description Tauxpw 1 us 5 ns CtrnAux minimum pulse width Counter n Internal Output Signal The Counter n Internal Output CtrnInternalOutput signal is available only as an output on the CTR n OUT pin where n is the number of your counter For example the CtrOInternalOutput signal is available as an output on the PFI 36 CTR 0 OUT pin You can also route the CtrnInternalOutput signal to other locations on the board such as RTSI The CtrnInternalOutput signal reflects the terminal counter TC of counter n The counter generates a terminal count when its count value rolls over The two software selectable output options are pulse on TC and toggle output polarity on TC The output polarity is software selectable for both options This output is set to high impedance at startup Hardware Arm Start Triggers Counter Pairs NI 6624 User Manual You can arm each counter using a software command or by using the Arm Start Trigger The Arm Start Trigger may be an internal or an external signal By using the Arm Start Trigger you can start more than one counter simultaneously by configuring each counter to use the same Arm Start Trigger signal Each counter on the NI 6624 is paired with a
51. rictions in the FCC rules In Canada the Department of Communications DOC of Industry Canada regulates wireless interference in much the same way Digital electronics emit weak signals during normal operation that can affect radio television or other wireless products All Class A products display a simple warning statement of one paragraph in length regarding interference and undesired operation The FCC rules have restrictions regarding the locations where FCC Class A products can be operated Consult the FCC Web site at www fcc gov for more information FCC DOC Warnings This equipment generates and uses radio frequency energy and if not installed and used in strict accordance with the instructions in this manual and the CE marking Declaration of Conformity may cause interference to radio and television reception Classification requirements are the same for the Federal Communications Commission FCC and the Canadian Department of Communications DOC Changes or modifications not expressly approved by NI could void the user s authority to operate the equipment under the FCC Rules Class A Federal Communications Commission This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates
52. s shifted by two filter clock timebase periods The figure shows that if sampling was done at each rising edge of the filter clock timebase alone the first two pulses would have been seen as one continuous transition However using the faster sampling clock detects the glitch thus the two short pulses are ignored The intent of the filter is to eliminate glitches that may appear on a signal The filter is sensitive to the duration for which a digital signal transitions from one state to another If a square wave is applied to the filter its propagation will depend on its frequency and duty cycle There are four filter settings available in the TIO devices 5 us 1 us 500 ns and 100 ns The 5 us filter will pass all pulse widths high and low that are 5 us or longer It will block all pulse widths that are 2 5 us one half of 5 us or shorter Pulse widths between 2 5 us and 5 us may or may not pass depending on the phase of the pulse with respect to the filter clock timebase The same relationship extends to all other filter clocks In addition to these hard wired filter clocks you can use any PFI RTSI or internal signal as the source for the filter clock timebase Use signals with a duty cycle as close to 50 percent as possible If the period of the filter clock timebase is tag this filter guarantees to pass pulse widths that are 2 tyrek or longer and to block pulse widths that are trrcik OT Shorter A pulse with a width between t
53. scription 3 1 to 3 3 example figure 3 1 settings table 3 2 National Instruments Corporation l 1 DMA counter applications 3 19 transfer rates 2 4 to 2 5 transfer rates table 2 5 documentation conventions used in the manual vii NI resources A 1 related documentation viii drivers NI resources A 1 duplicate count prevention 2 1 to 2 4 application that prevents example 2 4 application that works correctly example 2 1 application that works incorrectly example 2 2 when not to use 2 4 when to use 2 4 E examples NI resources A 1 F field wiring considerations 3 21 filter digital description 3 1 to 3 3 example figure 3 1 settings table 3 2 H hardware arm start triggers 3 18 help technical support A 1 NI 6624 User Manual Index T O connector pinout 3 7 to 3 8 installation hardware 1 3 software 1 3 instrument drivers NI resources A 1 interrupts counter applications 3 19 Counter n Auxiliary signal 3 17 to 3 18 Counter n Gate signal 3 16 to 3 17 transfer rates 2 4 to 2 5 K KnowledgeBase A 1 National Instruments support and services A 1 noise 3 3 3 21 3 22 0 outputs 3 11 to 3 12 P PFIs 3 1 phase lock 3 20 pin assignments 3 4 to 3 6 pinout 3 7 to 3 8 power on state 3 3 programmable function interfaces 3 1 programming examples NI resources A 1 pulse width digital filtering 3 2 digital filtering table 3 2 minimum 3 14 3 17
54. signated activity The relative priority at which a device can interrupt current output high current output low interrupt request signal industry standard architecture Laboratory Virtual Instrument Engineering Workbench a National Instruments graphical programming application meters maximum The fastest internal timebase available on a device minimum NI 6624 User Manual Glossary motion encoders NI DAQ NI TIO noise 0 OCXO operating system PCI PFI port ppb prescaling NI 6624 User Manual Transducers that generate pulses to indicate the physical motion of a device The most common type of motion encoders are quadrature encoders Two pulse encoders also referred to as up down encoders are another example NI driver software for DAQ hardware A custom ASIC developed by National Instruments that provides counter and digital I O functionality An undesirable electrical signal noise comes from external sources such as the AC power line motors generators transformers fluorescent lights soldering irons CRT displays computers electrical storms welders radio transmitters and internal sources such as semiconductors resistors and capacitors Noise corrupts signals you are trying to send or receive oven controlled crystal oscillator Base level software that controls a computer runs programs interacts with users and communicates with installed hardware or peripheral devices
55. ts Corporation All rights reserved Important Information Warranty The NI 6624 devices are warranted against defects in materials and workmanship for a period of one year from the date of shipment as evidenced by receipts or other documentation National Instruments will at its option repair or replace equipment that proves to be defective during the warranty period This warranty includes parts and labor The media on which you receive National Instruments software are warranted not to fail to execute programming instructions due to defects in materials and workmanship for a period of 90 days from date of shipment as evidenced by receipts or other documentation National Instruments will at its option repair or replace software media that do not execute programming instructions if National Instruments receives notice of such defects during the warranty period National Instruments does not warrant that the operation of the software shall be uninterrupted or error free A Return Material Authorization RMA number must be obtained from the factory and clearly marked on the outside of the package before any equipment will be accepted for warranty work National Instruments will pay the shipping costs of returning to the owner parts which are covered by warranty National Instruments believes that the information in this document is accurate The document has been carefully reviewed for technical accuracy In the event that technical or typo
56. used by monitors electric motors welding equipment breakers transformers or other devices by running them through special metal conduits e Use appropriate digital filtering to remove noise Crosstalk Crosstalk mainly occurs when the capacitance between lines in a cable induces a smaller transition on another line Figure 3 15 shows an example of crosstalk Zs1 WW Cable fre EMI j O Capacitance EE 10 Zso n VT gt MNM Vo PFI 10 PFI 11 N Figure 3 15 Crosstalk Example In Figure 3 15 PFI 10 and PFI 11 are configured as inputs V drives PFI 10 and V drives PFI 11 When PFI 10 the offending line transitions from one state to another it induces a small transition in PFI 11 the victim NI 6624 User Manual 3 22 ni com Chapter 3 Signal Connections line The magnitude of the transition or crosstalk induced in PFI 11 is proportional to the following e The speed of the transition on the offending line PFI 10 in the previous example e The length of the cable and the proximity of the victim to the offending line e The source impedance of the victim line V in the previous example and the level of the offending line Vo Crosstalk most often causes measurement errors when the victim line is connected to a slowly changing signal When any of the outputs is running at higher than 5 V and or when fast edged signals are mixed with slow edged signals at the i

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