Microsoft PowerPoint - 5.\273\264\303P\244W\244\342Andes\266
Contents
1. AG101P 16M Logeing Burner tool IntelJ3 Target board ag101p 16mb AE210 Burner tool SPI Target board None ANDES Confidential TECHNOLOGY Driving Innovations 90 90 90 Quick boot up ANDES Confidential 37 TECHNOLOGY Driving Innovations Quick Boot Up ES B to AN AS IM R AE Baud Rate 38400 Data 8 bits Parity none 4 Stop 1 bit 4 Flow control none 38 Driving Innovations uick Boot Up cont d Mj SoS ADP XC7KFFE76 02 130916 E012 Page 36 ANDES Confidential ANDES TECHNOLOGY Quick Boot Up 1 ZSystem Enable PWR_SW1 tE z3LEDSs ZAR 99 y Hconsole amp 87r F HE Y E Bank 1 size ogdoogooooe Bank 2 sizez0m4000000 cpuid d revision 1 04 Check SD Carde SD Card is not Exist on Card Slot Please press a GPIO Button tor booting GPIO owi Run Setup amp Diagnesise GPIO Loyva Burnin Teste ANDES Confidential 40 Driving Innovations TECHNOLOGY Quick Boot Up 2 GPIO1 j 8 SW1 Diagnosis program TRT esiisa b7 yk EH console 87 Diagnosis Menu m 00 7 UU Andes Development Platform Diagnosis Menu for ADF22 environment Built Jul 12 2012 v1 91 This is Engineering Board PMU_BASE ox ol zox2oigoyiol e EO 25 5 S E 55 EEE E r ee ey Cia SDRAM Test 2 Timer Test a DMA Teste C5 UART Loopback Test 63 UART CDMA Te2. I File Xilinx Description Extension Software Tool BitGen generated by BIT file is a raw storage of the programming bits for the FPGA and default can be loaded directly to the FPGA via JTAG using IMPACT PROMGen or MCS file is what you load into a PROM non volatile memory which IMPACT stores the programming information BitGen generated if Binary configuration data file with no header information Can g binary yes be used for custom configuration solutions for example option is set or microprocessors or in some cases to program third party PROMGen PROMs ANDES Confidential is eri Driving Innovations PFLASH 128MB 0x4000000 0x7FFFFFF Total ENE 128MB NOR flas Address 0x0 Ox3FFFFFF Total 64MB FA25 0 FPGA configuration space ANDES Confidential 14 TECHNOLOGY Driving Innovations x a ANDES TECHNOLOGY FPGA by Andes Burner ing Program 243 A 3 A Lj bm O O E O TY n W A Z lt 12V Power Adapter Power Switch TE I tie BM 11 VL lil PI Dut rage ATI u s a BAR N ANDES Confidential 16 Driving Innovations TELIA MF ED CCC Y Programming Tools Xilinx IMPACT 14 5 4 ZZ AndeSight STD AndeSight MCU or BSP ADP XC7KFF676 programming package B orca bat script file H orca cmd script file for
3. 5 EEE programming done elapsed time 53 seconds verifying done verifying elapsed time 54 seconds d silinx 14 5 LabToolz P x ANDES Confidential 23 Driving Innovations x a ANDES TECHNOLOGY Programing FPGA by Xilinx Burner 243 M i kil omil O O E O TY n W A Z lt Programing FPGA by IMPACT xe 1 Checki fil S 5 A R is KB EI aa cm i DVDICD ROM IDE ATA ATAPI B MAA Ek acer E iid 3E FH Erle t ETE BE Generic USB Hub Generic USB Hub Intel Ri 6 Series 3300 Series Chipset Family USB Enhanced Host Controller 1026 Intel R 6 Series 200 Senes Chipset Family USB Enhanced Host Controller 12D IT3B Composite Device USB Root Hub USB Root Hub ng HER COM 0 LPT N EES RAE E ik ARDES C Confidential 25 Driving Innovations TECHHOLO 1 42 552A RlXilinx Design Tools gt Lab Tools14 6 gt IMPACT WindowsCatslog J Windows Update ETEA rod BREF Offce a Offce scit Ec MEEME k M OrCAD15 7 h M 4 a FID br E h M Accessories h 3 RESTER L Lab Tools 14 7 E Documentation k 3 7 aH S ChipScope Pro Analyzer an BH EE SE TED ATE Eats UT aN JES Confidential 26 Driving Innovations Burn MCS file to PROM 2 Automatic Project File Load No Automatic Project File Load 9 Do yo
4. XC7K160T B676 FPGA xtension Slot n gt ANDES Confidential 7 Driving Innovations TELIA FD CCC Y Board of the Feature Xilinx Kintex 7 FPGA XC7K160T L C 162240 Package 676 speed grade 1M 1 GB on board DDR3 SDRAM 800MHz 128MB on board NOR flash 64MB for FPGA configuration and 64MB for system storage 10 100 Ethernet compatible RJ45 MII interface 4 DB9 UART port Null modem cable SD memory card slot 4 IDE GPIOs connector for extension o e Driving Innovations ANDES Confidential TECHNOLOGY Board of the Feature 4 Support 2W 5W 7W JTAG pins on AICE ports 8 user defined push buttons 3 7 LCD module connector with RGB interface MIC in Line in and Line out with AC97 audio codec Two 7 segment LED displays SPI Flash ROM 16Mb I2C EEPROM 128Kb gt ANDES Confidential 9 Driving Innovations Optional device USB 2 0 OTG port USB 1 1 device port 10 100 1000 Ethernet PCI E x8 I F 10 Driving Innovations Leopard vs Orca On board Flash 32MB 64MB Be Board to Board Connection POLE 3 AICE Port 1 Fixed Voltage 1 Multi Voltage 3 3V 2 5V 1 8V JE Adaptive 5V 3A 2 0mm 12V 5A 1 7mm ANDES Confidential 11 Driving Innovations HH OL Program FPGA netlist and system program 4e oo oe oo 12 Driving Innovations Xilinx Configuration File Format
5. 11 aE tz OK Device Programming Properties Device 1 Programming Properties Design Specific Erase Before Progranuning F After programmis Flash automatically load FPGA with Flash content lt default 1 Configuration Bank Voltage Based on CECBYS pin A cmm am J me jJ FANDES Confidential 33 Driving Innovations TECHNOLOGY Burn MCS file to PROM 12 GH 5G si Progress Dialog 3 Executing command 13 XC PX Program Succeeded 34 Driving Innovations Burn System program by AndeSig HX Flash Burner AndeSight Andesight Patch BSP3 2 1 EN cone demo lomfsrcfert E AndeSizght MCU Tersion File Edit MHavisate Search Eun Project Window Help 2 ci mE U em i te O Q d F FBM iw lt lt gt Build Project Clean Project EREefrezh lose Project Build Confizuratian Make Targets Index Target Confizurationi Flash Burner Eun A Debug 4 Profile A g Compare Wath Restore from Local Histor F File Explorer JA ltr Enter ANDE I ANDES Confidential 35 Driving Innovations Burn System program by AndeSig Flash programming 1 2 burner tool ATUM Wizan 2 41 flash image file peer Q 3 381 Target board AGIOIP 4G Programming Start Address Burner tool IntelJ3 oo Target board XC5 MND SEE MEE Misc Arguments
6. config file B isp agi101p exe burner tool B burn fpga encrypt bit FPGA config file B ag101 chip bin FPGA netlist file 4 Xilinx Platform Cable USB Andes AICE MCU ANDES Confidential 17 Driving Innovations Burn BIN file to PROM 1 Copy all files in ADP XC7KFF676 programming package to Xilinx 14 5 Lab Tools 2 3 amp 5 Xilinx download Cable to ADP XC7KFF676 and host PC 3 ADP XC7KFF676 Bassi PWR_SW1 RARA LEDs LED12 to LED17 4 f amp zXilinx cable EBJZEIS SE ANDES Confidential 18 Driving Innovations F Firefox on L E oft Outlook w haray Adobe Reader XI Intemet Explorer TaS Fa KE Microsoft Excel 2011 Ps Microsoft PowerPoin f WordPad D gt ANDES Confidential ej Mozilla Firefox Skype F Windows Live Adobe Reader XI M mm Cadence SFB Switch Release M OMAD 15 7 Cadence Design Systems Google Drive Andestech FilesFrog Update Checker m CCleaner FileZilla FileZilla FTP Client Acute HERAT EE F Jawa doPDF 7 m ESS Digilent 7 Pathon 2 7 lan Notepad Windows Search Windows T Upgrade Advisor i i d TF Fr jil P fr Fr Fr Fr v fr fr TF Fr Fr Fr Fr Fr TF F fr Documentation tz Chipscope Pro Analyzer z iMPACT 19 m Ga P 5 BAX ISE Design Suit Command Prompt from Start Prog
7. PPP P P F F P F PF P P P mF F P F P P P PF F PF P P P P PF F F FF F P PF PF F P FP Fw FP F P PP P FP PF pP PF PP P F mF F PFP PP P PF P PP P PP P P FP re a ANDES Confidential 29 Driving Innovations TECHNOLOGY Burn MCS file to PROM 6 Auto Assign Configuration Files Query Dialog t i No E Anto Assigzn Confiroraton Files Query Dialog ND Do wou want to continue and aien configuration tiesiasi ANDES Confidential 30 Driving Innovations Burn MCS file to PROM Right click device to select operations Add SPI BPI Flash Eight click device to select operations 8 Add PROM File gt n13c0 ag101c43 mcs BEBE AIR tann nl 3c0 a2101c43 ta SRA TI MCE Files m i 22 ANDES Confidential 31 Driving Innovations Burn MCS file to PROM 9 2272 PROME Bia B BPI PROM B 28FOOAM29EW m Data Width 16 m Select RS 1 0 b Pin Address Bits NOT USED AS AE TT PA t OK elect the PROM attached to FPGA EPI PROM Data Vid th select Es l 0 5b Pin Address Bits ANDES Confidential 32 Driving Innovations Burn MCS file to PROM 10 tEFlash711 1 1258 ER be e t Program Fight click device to select operations E fee eae et eee js TPI Erase Blank Check E Readback i ret Device Checken kri Tom sien Mew Configuration File Dele te met Programmidinze Properties met Era Properties Edit Attached Flash Properties
8. ma E _ TECHNOLOGY ka Innovat XC7KFF676 RA F FAndes BSj2 ts ADP IONS IV Dr ing MES o ERA ip Seat A E EXE a pet jchenGandestech com lt B 2 HH fs s vi E Email WWW ANDESTECH COM Agenda Product information Board introduction 4 Program FPGA netlist and system program Quick boot up 2 Driving Innovations Product information 90 90 90 RA gt i ANDES Confidential 3 Driving Innovations TECHNOLOGY Product Information Product Name m ADP XC KFF676 4 Release bitmap B Support all of Andes core and AG101 AE210 platform IP B CPU AHB APB clock rate 30 30 15MHz N7 N8 60 30 15 MHz N9 N10 N12 N13 N13 CPU clock up to 144MHz gt ANDES Confidential 4 Driving Innovations Product Document Document Number Revision Start Guide UM 099 ANDES Confidential 5 Driving Innovations Board introduction 4e eo eo eo ANDES Confidential TECHNOLOGY Driving Innovations 7 wire aice connector PEN wire aice connector LCD CON1 CD CON2 POWER 6 i 1 ACK1 iu y x J gt pone PIO Push Buttons MGE e go p J x8 Q witch of K T power adjust Basen 128MB USB1 1 lash device 1111 1 USB OTG USB 2 0 a RESET button PWR ON button
9. ra gt Xilinx Design Tools Lab Tools 14 5 Accessories Check For Updates Me JISE Pesan SUE Command Prompt software Download Center C Uninstall x Info system Checker Driving Innovations 6 HITOrca bat d silinx 14 5 LabTools orca bat 20 Driving Innovations 7 FPGA config file ix XIN 43 98 G UGGIHT Supply Current Reading 1 649 U Min Reading 1 646 U Reading 1 652 U 1 YUCCAUR Supply Current Reading 1 869 U Min Heading 1 8686 U Reading 1 872 U IMFO 1MPAGT Creating ZG7E16HT device 717 Programming device Match cycle 2 LCK_cycle Mollait LCE cycle NoWait done IMFO Cze Status register values IMFO Gse BHi 1111 8181 1118 HAHA 1668 6108 818 IMF Gse 717 Completed downloading bit file to device INFO CGse 717 Programming completed successfully Match cycle 2 LCK_cyucle Mollait LCE cycle NoWait INFO iMPACT 1 Checking done pin done 71 Programmed successfully Elapsed time 17 sec FPGA DONE Unplug and plug the USE cable of AIGE MGU yait mit LED on AICE MCU lights up 8 te AICE MCU to your host PC n h ANDES Confidential 21 Driving Innovations Burn BIN file to PROM 9 Done LEDS HE ANDES Confidential 22 Driving Innovations TESHAKHOL OG Y 10 ELT ASEN BA 11 FPGA netlist file fk px 7 1e TR F ES HI
10. st C gj Watchdog Teste 10 Watchdogs Reset Test 11 MAC Loopback Test 12 Flash Teste 14 SDRAM bnk 2 17 ACo Tv Test 18 ACG DMA Teste 213 LCD Test foo LCD Menu 29 Cery KTC 24 RTC Alarm Test Sr GFIO Test 351 gP Teste La USE 1 1 Test Cag LISE 2 2 Test ao USB Crits Teste 41 USB Host Test 53 Enable Cache sa Disable Cache Cosi CLI 67 Set Console s UART 75 Burn in Teste 95 Production 96 N DS BOOT Cov CopyimaceFrom Card 08 Linux test from SD card oq Setupe 4 Command gt gt a 3 Then the system is ready to use ANDES Confidential 41 Driving Innovations TECHNOLOGY Boot Up to Linux In Diagnosis Menu 4 Command gt gt 55 e CLI go 0x80400000 Enter Into Linux command line B 0M1 38400baud Tera Term YT File Edit Setup Contol Window Help ANDE FANDES Confidential 42 Driving Innovations TECHNOL Thank You A mtt I ANDES Confidential 43 Driving Innovations TECHNOLOGY
11. u want the system to automatically create and save a project file for vou vy Don t show this message agam save the sette in preference x a ANDES Confidential 27 Driving Innovations TECHNOLOGY Burn MCS file to PROM 4 ei create new project ipf 12 7 OK E ISE iMPACT P 68d OAS AT iMPACT Flows O x val Boundary Scan SystemACE E Create PROM File FROM File Formatter WebTalk Data E Hew iMPACT Project I want to CO load most recent project defaultipi Browse IMPACT Processes Load most recent project file when iMPACT starts ST an Console Welcome to iMPACT IMPACT Version 14 6 AANDES Confidential TECHNOLOGY 28 Driving Innovations Burn MCS file to PROM 5 324 Configure devices using Boundary Scan JTAG FE OK ISE iMPACT P 684 File Edit View Operations Output Debug Window Help igi ml n ul Boundary Scan E Create PROM File PROM File Formatter WebTalk Data E Welcome to iMPACT Please select an action from the list below Automatically connect to a cable and identify BoundaneScan chain C3 Prepare a PROM File Prepare a System ACE File O Prepare a Boundary Scan File F PP F PF P P P PF P PF P P P PF P P E iMPACT Processes O 5 x P e P L r P r e F r Consule Welcome to iMPACT iMPACT Version 14 6 F FP m P PF FF F F F PPP PP PPP
Download Pdf Manuals
Related Search