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Type ACPU/QCPU-A (A Mode)(Common Instructions

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1. 1 i x oO Classi Instruction 95 0 A fication 5 Symbol Symbol Contents of Processing tion Con 25 gle Applicable CPU Page dition D E 25 FROM FROM ni n2 p n3 A Not applicable to 2 and A52G 7 59 5 FROMP rrome ni n2 p ns E 91 Not applicable to A2C 528 7 59 Date Reads data from the special read function module DFRO ni 2 D A Not applicable to A2C 529 7 59 S DFROP 11 2 9 0 A Not applicable to A2C and A52G 7 59 TO nl n2 S n3 Not applicable to A2C and 52 7 61 5 z TOP 01 12 5 E A Not applicable to A2C and A52G 7 61 Date Writes data to the special write function module ni n2 n3 11 A Not applicable to A2C and A52G 7 61 o ks DTOP nl na ule Notapplicable to 2 and A52G 7 61 FROM wie 9 Dedicated to and A52G 7 63 gv PRC m n FROMP nl n2 D n3 FROMP Sate A Dedicated to A2C and A52G 7 63 Data Reads data from remote
2. 9 ERROR CODE LIST MELSEC A Table 9 1 Error Code List for the An AnN A3H A3M A3V A0J2H AnS A2C A73 A52G A1FX and Error Message Error Code D9008 CPU States A3N board Continue Error and Cause Corrective Action CAN T 15 Stop 1 Although the interrupt module is 1 Check for the presence of EXECUTE I used there is no number of interrupt program which Checked at the interrupt pointer which corresponds to the interrupt unit occurrence of corresponds to that module in the create the interrupt program and interruption program or there are multiple reduce the same numbers of I numbers 2 Check if there is IRET 2 instruction has been instruction in the interrupt entered in the interrupt program program and enter the IRET 3 There is IRET instruction in instruction other than the interrupt program 3 Check if there is IRET instruction in other than the interrupt program and delete the IRET instruction CASSETTE 16 Stop The memory cassette is not loaded Turn off the power insert the memory ERROR cassette and turn on the power again Checked at power on An AnN only ROM ERR 17 Stop Parameters and or sequence 1 Correctly write par
3. x o oc 2 co mnmj j o APP 93 APPENDICES MELSEC A Sheet format 1 5 CHECKED PREPARED SHEET NO MELSEC A BY EY WORD DEVICE LIST Data Data 16 bits data Description 16 bits data Description 0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 APP 94 APPENDICES MELSEC A Sheet format 1 6 CHECKED PREPARED SHEET NO MELSEC A BY ANNUNCIATOR LIST Failure Failure Type Condition Troubleshooting Point Memory External Failure Name Number F 0 AJOJN AJOJN C I APP 95 APPENDICES Sheet format 1 7 MELSEC A TIMER COUNTER LIST Number Set Value K Description MELSEC A CHECKED PREPARED SHEET NO BY Application Operation Count Input etc 96 WARRANTY Please confirm the following product warranty details befo
4. Indicates the instruction symbol DSFR DSFL Setting data Head number of device which stores data to be shifted Number of shift device Functions DSFR 1 Shifts the word devices of n points which begin with the device specified at D to the right by one bit Shift range n points s D n 1 D n 2 D n 3 0 2 1 Before execution ES gt as E SS z pai pM After execution 0 2 The highest bit changes to 0 3 For T C the present value count value is shifted The shift of set value cannot be performed DSFL 1 Shifts the word devices of n points which begin with the device specified at D to the left by one bit Shift range n points s 2 1 2 3 0 2 0 1 D wa p EN ois M F4 Y entered After execution NS Before execution 2 The lowest bit changes to 0 3 In regards to T C the present value count value is shifted The shift of set value cannot be performed 7 APPLICATION INSTRUCTIONS Execution Conditions ON Shift command OFF Executed Executed per scan per scan gt lt gt gt Executed Executed only once only once Operation Error In the following case operation error occurs and
5. Right rotation commands Indicates the instruction symbol DROR DRCR Setting data p e cg Wo a Number of times 010 31 Functions DROR Rotates the data of and 1 n bits to the right without including the carry flag The carry flag is 1 or 0 depending on the status prior to the execution of DROR Al AO b s S Carry flag b31 b30 b29 b16 615 b2 bl M9012 gt A n bit rotation DRCR Rotates the data of AO and 1 0 bits to the right including the carry flag Al AO Carry flag M9012 b31 b30 b29 628 b27 b18 617 bl6 b15 b5 b4 63 b2 bl b0 n bit rotation e The carry is 1 or 0 depending on the status prior to the execution of ON Execution Conditions Right rotation command OFF Executed Executed per scan per scan gt lt gt _ Executed Executed only once only once 7 APPLICATION INSTRUCTIONS MELSEC A Program Examples DROR Program which rotates the contents of AO and 1 three bits to the right when XC turns on X00A Coding 0 DMOV 1 A0 D EH 2092 i 1 DMOVP 1 8
6. CHG instruction execution CHG instruction execution Main sequence sequence f y T f Timing chart Subsequence 4 D 4 Subsequence 4 CHG instruction execution gt instruction execution OFF ON coil OFF 4 coil OFF OFF 6 Temlains unchanged gt Ceu CO count value is incremented by 1 after END Operation CU GEM value by 1 END FEND CHG is executed during the first scan of the ON FEND is executed during the first scan of the depending on rogram selected by the CHG instruction program selected by the CHG instruction executed X0 ON OFF prog y after is switched on status OFF count value is incremented by 1 after END count value is incremented by 1 after END ON FEND CHG is executed FEND CHG is executed Ladder example 2 When the A3N A73 and A3V are used execution contents are always same The following program is written at step 0 of the main and subsequence programs K10 CO Timing chart Main sequence program run Subsequence program run ON ruction execution CO coil OFF
7. 2 M9012 M9010 9011 n 1 Left rotation commands Indicates the instruction symbol ROL RCL Setting data Number of times 0 to 15 Functions ROL Rotates the data of AO n bits to the left without including the carry flag The carry flag is 1 or 0 depending on the status prior to the execution of ROL AO Carry flag M9012 b15 14 b13 612 bll b10 b9 68 57 b6 65 b3 bl b0 ra n bit rotation RCL Rotates the data of AO 0 bits to the left including the carry flag The carry flag is 1 or 0 depending on the status prior to the execution of RCL AO Carry flag b15 14 613 612 11 b10 b9 b8 b7 be b5 b4 63 62 bl M9012 wa 4 bit rotation Execution Conditions DN Left rotation command OFF k Executed Executed per scan per scan gt imi Executed _ Executed only once only once 7 APPLICATION INSTRUCTIONS MELSEC A Program Examples ROL Program which rotates the contents of AO three bits to the left when XC turns on iia Pu XO om 3 1 ROLP K3 4
8. Indicates the instruction symbol Decode encode commands DECO ENCO Setting data Decode encode data or head device number stor ing decode encode data Head device number which will store the op eration result Effective bit length 1 to 8 Functions DECO 8 256 bit decode 1 Decodes the lower n bits of device specified at S and stores the result of decode data to 2 bits which begin with the device specified at D 2 For n 1 to 8 can be specified 3 When n is 0 no processing is performed and the contents of 2 bits which begin with the device specified at D do not change 4 A bit device is treated as one bit and a word device as 16 bits ENCO 256 8 bit decode 1 Encodes the data of 2 bits which begin with S and stores the result to D 2 For n 0 to 8 can be specified 3 When n is 0 no processing is performed and the contents of D do not change 4 The bit device is treated as one bit and the word device as 16 bits 5 When multiple bits are 1 processing is performed for the last bit position 7 APPLICATION INSTRUCTIONS Execution Conditions ON 4 Decode Encode command OFF Executed Executed per scan per scan gt imi Executed gt Executed only once only once Operation Errors In the following case operation error occurs
9. gt Digits higher than the specified digit are regarded as 0 2 Performs subtraction of the BCD data specified at S1 and the BCD data speci fied at S2 and stores the subtraction result into the device specified at D1 51 1 51 52 1 52 D 1 D1 Upper 4 digits Lower 4 digits Upper 4 digits Lower 4 digits Upper 4 digits Lower 4 digit 5 6 7 8 9 1 2 3 0 als 2 3 4 5 6 E gt 5 5 5 5 4 5 5 6 L Digits higher than the specified digit are regarded as 0 3 At S 51 S2 and D 0 to 99999999 BCD 8 digits can be specified 4 115 required to judge whether the operation result is positive or negative by use of the program Execution Conditions e ON n ition subtraction OFF commands Executed Executed k K P 1 Executed lt _ Executed only once only once 6 BASIC INSTRUCTIONS Program Examples DB MELSEC A Program which performs the addition of BCD data 98765400 and 123456 and stores the result to 0888 and D887 and at the same time outputs it to Y30 to 4F M9036 P H 01 DMOV 98765400 P H DB 00123456 DMOV 0887 e Coding 0 LD M9036 1 DMOVP H98765400 8 DB P 0123456 17 DMOVP 0887 24 0887 0887 K8
10. Functions CML Cl Indicates the instruction symbol CML DCML Setting data Data to be reversed or head number of device which stores data Head number of device which will store reverse result Reverses the 16 bit data of S per bit and transfers the result to D Before execution After execution DCML Reverses the 32 bit data of S per bit and transfers the result to D Before execution After execution DE e iem ede RS ig a Ae a n ee uo gu xb ee uem e RE 1 0 1 1 0 1 0 0 1 1 0 0 1 0 Reverse D 0 1 0 0 T 0 1 1 0 0 0 1 1 0 1 Syl S oet a Ry ovis e d tt uoce ES TCO eS EUIS oa G 0 3 E NN 2 2 p Reverse TA D 1 S 1 gt 0 T 0 0 1 0 alt 1 0 0 NN 0 l 1 0 1 22 22 6 BASIC INSTRUCTIONS Execution Conditions ON Negative transfer command OFF Executed Executed per scan per scan lt gt Executed Executed only once only once Program Examples CML 1 Program which reverses the data of to 7 and tr
11. Ladder example X000 0 __ PLS MO H sd instruction execution a CHG instruction execution 1 A Main sequence A E Main sequence 6l y f program run 1 4 Subsequence E Subsequence 4 1 Nw Timing chart pos en ON 1 CHG instruction execution program fun instruction execution QER OFF ON ON MO OFF MO OFF OFF is not switched on MO is not switched on MO is only switched on during the first scan of the c MO is only switched on during the first scan after y 9 subsequence program selected by CHG t X0 switched by the CHG instruction I instruction executed after is switched on status OFF is only switched on during 1 scan MO is only switched on during 1 scan ON Ladder example 2 When the A3N A73 and A3V are used execution contents are always same The following program is written at step 0 of the main and subsequence programs Input condition X000 of PLS Timing chart instruction execution Main sequence program run Subsequence program run instruction execution Operation MO is not switched on MO is only switched on during the first scan of the subsequence program se
12. mir De lO oF ODM Opi opm Op Appli OPM ON miONnM 95m Appli 5 g 33 NE 8 g 59 c H a 16 points occupying module 4 x 32 points occupying module 64 points occupying module x 2 2 D Gc amc o o Loaded module type name MELSEC A EXTENSION BASE MODULE ARRANGEMENT TABLE type name APP 91 APPENDICES Sheet format 1 3 MELSEC A CODING SHEET Step Number Instruction Device MELSEC A PREPARED SHEET NO Remarks APP 92 APPENDICES MELSEC A Sheet format 1 4 CHECKED PREPARED SHEET NO MELSEC A BY BIT DEVICE LIST Signal Description Signal Description cjoj jojocn ilo mj lo dwoi lo ojo L1joj mj oj doc o oj oc 25 c J nm
13. APPENDICES Table 1 4 Number Extension file 09035 register Use block No Total number of stations The devise number used for getting direct access to each device for extension file register For designation extension file register device numbers LED indication priority Step or time during Sampling trace f ping sampling trace Expansion file register block number to be used as the work area for the execution of a SFC program SFC program execution work area Code number of error occurred in the SFC program SFC program error code Error block an error occurred Priority 1 to 4 Priority 5 to 7 Block number in which MELSEC A Special Register List Continue Applicable CPU Usable with AnA A2AS AnU and QCPU A A Mode Stores the block of the extension file register being used in BCD code Sets the total number of stations 1 to 64 of modules and remote terminal modules which are connected to an A2C or A52G Designate the device number for the extension file register for direct read and write in 2 words at D9036 and D9037 in BIN data Use consecutive numbers beginning with RO of block No 1 to designate device numbers Usable with A2C and A52G Usable with AnA A2AS AnU and QCPU A A Mode Usable with A2C AnS AnSH A1FX A0J2H A52G AnA A2AS AnU and QCPU A A Mode Extension file r
14. 6 BASIC INSTRUCTIONS MELSEC A 6 4 3 16 bit data block transfer BMOV BMOVP FMOV FMOVP All CPUs Available Device 2 s 2ix sS ES Bit device Word 16 bit device Constant Pointer Level o u 2 X Y M LI S BI F T C D W R 0 2 I N 5 M9012 M9010 M9011 0 0 0 0 0 0 0 0 0 0 0 0 K1 to BMOV D K4 n K1 to D olololololololololol o K4 Indicates the instruction symbol BMOV FMOV Setting data Transfer commands Head number of device which stores data to be transferred Head number of device which will store transfer red data Number of transferred points Functions BMOV Transfers the content of n points which begin with the device specified at S in blocks to n points which begin with the device specified at D S 1234 D 1234 S 1 5678 D 1 5678 5 2 7FFO Block 2 7FFO 5 3 6FFF E 3 D 43 6FFF S n 2 553F D n 2 553F S n 1 8886 D n 1 8886 Y When the same devices have been specified at source and destination
15. Exclu WXOR si s2 p 71 7 11 Sive L logical 51 XOR S2 D sum WXORP WXORP 31 32 7 7 11 0 1 D XOR 1 S 0 1 D 32 bits 1 For the number of steps when extension devices are used or when index qualification is performed to bit devices for AnA A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 1 2 The A mark in the Index column indicates that index qualification can be performed with the AnA A2AS AnU QCPU A A Mode and A2USH board only 8 The A mark in the Subset column indicates that subset processing can be performed with the A3H AnA A2AS AnU QCPU A A Mode and A2USH board only 2 16 2 INSTRUCTIONS MELSEC A Table 2 17 Logical Operation Instructions Continue SE x 9 Classi Instruction Symbol Contents of Processing tion Con 2 2 Applicable CPU Page fication 2 Symbol P EZ 5 dition 25 WXNR WXNR SD 5 7 15 D S D WXNRP WXNRP S D 5 7 15 WXNR WXNR S1 s2 D 7 7 1 exclu TIERS e 5 sive 51 XOR S2 D
16. 6 84 6 7 9 Partialirefresh SEQ c run itte echt e rte ede PUER 6 87 APPLICATION esee nennen nnn natn nan tn nass tasa tn nasa 7 1 7 133 7 1 Logical Operation 1 nennt 7 2 7 1 1 16 32 bit data logical product WAND WANDP DAND 7 3 7 1 2 16 32 bit data logical add WOR WORP DOR DORP 7 7 7 1 3 16 32 bit data exclusive logical add WXOR WXORP DXOR 7 11 7 1 4 16 32 bit data NOT exclusive logical add WXNR WXNRP DXNR DXNRP 7 15 715 BIN 16 bit data 2 s complement NEG 7 19 storie Mtem ee cae eee ne es a hee vane Heep 7 21 7 2 1 16 bit data right rotation ROR RORP PCRP 7 22 7 2 2 16 bit data left rotation ROL ROLR RCL 7 24 7 2 8 32 bit data right rotation DROR DRORP 7 26 7 2 4 32 bit data left rotation DROL DROLP DRCL DRCLP 7 28 fads SHITE INSUUCTIONS bud o dd Ree e ede ke Ex AME NEAR PER Hue 7 30 7 3 1 16 bit data n bit ri
17. e When is contained CJ Delete NOP ut LDI and ANI substitute P254 HNOPH D1 2 E Not displayed in ladder mode e When label P254 is not contained CJ J k Herk D1 D2 9 gt Insert label P254 e When the number of contact points exceeds 150 e P254 CHK D1 D2 c Reduce contact points below 150 x 151 or more contact points e When there is no circuit block of CJ pasa EA H HH cerk D1 0 gt Add a circuit block of CJ Operation error occurs when the NOP instruction is in the format determined by the CHK instruction Check the NOP instruction in list mode because it is not displayed in the ladder mode of GPP 7 116 7 APPLICATION INSTRUCTIONS MELSEC A 7 10 3 Status latch set reset pore STL SLTR ADJ2H A Mode 210 0 o 1 Unusable with A1N Remark 2 Unusable with A1 Available Device Bit device Word 16 bit device Constant Pointer Level M L S D W 1 K H P 1 M9012 M9010 M9011 Digit specification
18. After the first shift input SFT M12H A 3 0 After the second shift input SFT M11 4 o o o na o 1 1 ol X2ON X002 de SFT M10 5 fo o After the third shift input a P 6 After the fourth shift input 7 1 After the fifth shift input At 8 to 15 1 indicates ON and 0 indicates OFF 5 SEQUENCE INSTRUCTIONS Program Example SFT 1 Program which shifts the Y57 to 5B when X8 turns on MELSEC A gt Perform programming in order of X008 05 05 059 058 X007 M8 M8 Y057 X008 P o SFT Y05B P When X8 turns shift is executed Y P larger device numbers SFT Y059 _ Y058 X007 13 When X7 turns on Y57 is M8 turned on 17 SET 057 ON xg OFF r q Coding ON LD sg OEE l 1 SFTP f ON 4 STFP OFF4 Y57 7 ON Li 10 SFTP OFF y YS8 13 LD OFF Y 14 PLS Ve cS OFF ON 19 END Y5B OFF x 5 SEQUENCE INSTRUCTIONS MELSEC A 5 5 Master Control Instructions Applicable 5 5 1 Master control set reset MC
19. Station Station No 1 No 5 AX11C AX11C ET 4 stations 4 stations USC Head station number of N red remote terminal modules X000 X020 5 9 9 to to A2C XO1F 0616 20 6 4 stations 05 Station Station 17 13 AY51C A68ADC p 4 stations 4 stations 080 060 to to YO9F 07F 2 A52G specify n1 with head number of remote terminal module 100 Example When the head number of remote terminal module is 9 specify K109 9 100 3 The bit device specified at D2 is used as a communication complete flag This device turns ON after execution of the END instruction of the scan during which communication processing with a specified remote terminal module is completed and turns OFF after execution of the END instruction of the next scan Step 0 END Step 0 END Step 0 END Step 0 Communication start ENDStep 0 NS Communication end ON 7 APPLICATION INSTRUCTIONS 4 MELSEC A Though the data specified at D3 is dummy data which calls for no processing in the program specify any output Y number at this Devices specified at D3 can be freely used in the program Data communication is performed according to the data in the communication request registration areas which are registered by executing the FROM P and DFRO
20. X10 ON HA78D8ED gt A78 DB8ED gt 31 to 916 b15 to 1 1 11 1 1 11 110 1 1 11110 1 1 01 1 DO gt 7 X 78 b31 to b16 BLS to 1 1 11 11 11 D10 3 INSTRUCTION STRUCTURE MELSEC A 3 5 Index Qualification 1 The index qualification is used to specify the device number be providing an index Z V to the device and adding the specified device number and index content 2 The index qualification can be used for devices X Y M L S B F T C D R W K H and P 3 The indexes Z V are provided with a sign and can be set in the range of 32768 and 32767 4 The index qualification is as shown below X010 H MOV FFFF Z FFFH 1 is stored to Z X011 2 010 DO E Data of D10Z D 10 rs 1 09 is stored to DO Index qualification Example When the index qualification is performed the actual processing devices are as shown below 2 20 V 5 Ladder Example Actual Processing Device K MOV 20 X011 K __ MOV 120 K MOV 5 Explanation KZ RUE K 100 20 K120 W53V 53 5 4 Ly Hexadecimal MOV X011 K2 K1 mov X064 M33 Explanation K2X50Z K2X 50 14 K2 64 Y K20 is converted into hexadecimal K
21. 7 19 storie Mtem ee cae eee ne es a hee vane Heep 7 21 7 2 1 16 bit data right rotation ROR RORP PCRP 7 22 7 2 2 16 bit data left rotation ROL ROLR RCL 7 24 7 2 8 32 bit data right rotation DROR DRORP 7 26 7 2 4 32 bit data left rotation DROL DROLP DRCL DRCLP 7 28 fads SHITE INSUUCTIONS bud o dd Ree e ede ke Ex AME NEAR PER Hue 7 30 7 3 1 16 bit data n bit right shift left shift SFR SFRP SFL 7 31 7 3 2 n bit data 1 bit right shift left shift BSFR BSFRP BSFL BSFLP 7 33 7 3 8 n word data 1 word right shift left shift DSFR DSFRP DSFL DSFLP 7 35 TA Data Processing Instructions ete t ete ati ae tere bee hte ceste 7 37 7 4 1 16 bit data search SER SERP 7 38 7 4 2 16 32 bit data bit check SUM SUMP DSUM DSUMP 7 40 7 4 8 8 o 256 bit decode encode DECO DECOP ENCO 7 42 7 4 4 segment decode
22. Total number of 1s is stored into AO Program which stores the number of bits which are on 1 in the data of X20 to 5B to D18 when XB turns on aoe r ECC E Searching the data of X20 to 3F the number of bits 0 DSUM X020 nm which are is stored into AO P MOV A0 D18 H Data of AO is stored into 018 DSUM Sad 4 Searching the data of X40 to 5B the number of bits which are on is stored into AO XSF 018 Data of AO and that of 018 are added and stored into D18 Coding 0 LD X00B 1 DSUMP K8X020 4 MOVP AO D18 9 DSUMP K7X040 12 018 17 END Transfer Dy MOVE instruction AEE D18 16 16 Addition by P instruction Number of data which are on among X20 to 5B gt 7 APPLICATION INSTRUCTIONS MELSEC A 7 4 3 8 o 256 bit decode encode DECO DECOP ENCO ENCOP All CPUs Available Device Carry flag Error flag Bit device Word 16 bit device Constant Pointer Level Digit specification Index X Y S B C D 1 2 V K P 1 M9012 M9010 M9011
23. Carry flag set input Set of carry flag Carry flag reset input Reset of carry flag Functions STC 1 Sets turns on the carry flag contact M9012 CLC 1 Resets turns off the carry flag contact M9012 Execution Conditions Carry flag set input OFF Carry flag reset input OFF 7 N Loo STC Executed only once Ag M CLC Executed only once flag M9012 Sg 7 121 7 APPLICATION INSTRUCTIONS Program Example STC CLC MELSEC A Program which performs addition of the BCD data of to F and the BCD data of DO when MO turns on and turns on the carry flag M9012 when the result is more than 9999 and turns off the carry flag when the result is 9999 or less MO K4 0 B X000 DO D1 K4 10 gt X000 Mt gt 00 D1 1 21 STC 1 23 CLC Coding 0 LD MO 1 B P K4X000 DO 10 LD gt K4X000 D1 15 OR DO D1 20 OUT 21 LD M1 22 STC 23 LDI M1 24 CLC 25 END 7 122 BCD data of to F and that of DO are added and the result is stored into D1 When gt addition result augend gt addition result M1 is turned on When 1 turns on carry flag is turned on When 1 is off carry flag is off D1 7 APPLICATION
24. 32 bits a gt D 1 0 1 1 1 0 1 0 1 0 Before execution DXOR S 1 1 11 1 0 0 0 0 1 1 1 1 NU After execution D p Ae 0 1 0 0 1 0 1 1 0 1 0 2 When operation is performed the digits of bit device higher than the specified are regarded as 0 Execution Conditions ON k Operation command OFF ERES Executed Executed per scan per scan lt gt Executed yl Executed only once only once 7 12 7 APPLICATION INSTRUCTIONS MELSEC A Program Examples WXOR 1 Program which performs exclusive OR of the data of D10 and that of D20 and stores the result to D10 when XA turns on STOA Coding P 0 LD X00A L WXOR D2 D1 0 9 0 9 1 WXORP D20 D10 6 END 2 Program which performs the exclusive OR of the data of X10 to 1B and data of 033 and sends the result to the Y30 to 3B when XA turns on X00A g P K3 _ Exclusive OR of the data of X10 to 1B and the o WXOR X010 D33 data of D33 is performed and the result is stored into D33 DEM K3 033 030 Data of 033 is sent to Y30 to e Coding 0 LD X00A 1 WXORP K3X010 D33 6 MOVP 033 K3Y030 11 END 3 Program which performs exclusive OR of the data of D10 and that of D20 and stores the result to 033
25. Operation depending on X0 ON OFF status count value remains unchanged CO count value is incremented by 1 after END FEND CHG is executed during the first scan of the program selected by the CHG instruction executed after is switched on CO count value is incremented by 1 after END FEND CHG is executed 3 When the A3U 40 and QO6H are used execution contents are always same 6 BASIC INSTRUCTIONS MELSEC A The following program is written at step 0 of the main and subsequence programs K10 Ladder example CO 1 scan instruction execution lt gt Main sequence program run f Subsequence D Timing chart M M i tion execution OFF C0 coil OFF CO count value remains 0 1 2 Operation count value is incremented by 1 after END FEND is executed during the first scan of the program depending on selected by the CHG instruction executed after is switched on X0 ON OFF status CO count value is incremented by 1 after END FEND CHG is executed 6 BASIC INSTRUCTIONS MELSEC A Timing of Timer Used with CHG Instruction Each of the CPUs with which the CHG instruction can be used has two timer set value storage areas one for the
26. X5 OFF Yoro 7 YO10 Y10 OFF the status of the device does not change 1 When the RST input turns on the specified device changes as described below Device Status Y M L S B F Coil and contact are turned off T C Present value is set to 0 and coil and contact are turned off D W R AO A1 Z V Content is set to 0 2 When the RST input is off the status of device does not change 5 19 5 SEQUENCE INSTRUCTIONS Execution Conditions MELSEC A 8 The functions of RST D W R AO A1 Z V are the same as those of the following circuit RST input RST input X010 X010 K 2 __ RST D50 gt 0 050 Device number Device number D W R AO A1 Z V D W R AO A1 Z V If the annunciator relay 1 is turned ON OFF display contents of LED indicators and ERROR LEDs on the CPU module and contents of special registers change For details refer to the ACPU Programming Manual Fundamentals 1 The SET RST instructions are executed on the following conditions ON SET RST instruction SET RST Y M L S B Executed every scan SET RST F gt lt 2 SET RST instructions Executed ever scan lt Executed only In refresh mode the SET RST instructions
27. x Classi Instruction Symbol Contents of Processing tion Con 2 3 Applicable CPU Page fication 2 Symbol 5n EZ 5 dition 25 SER 1 52 n 51 7 38 Date n search Coinciding number SERP SERP 51 52 n A1 Coinciding quantity 9 e 7 38 3 SUM SUM 5 7 40 15 0 3 SUMP SUMP S Y gt AO Quantity of 1 A 7 40 Bit check 2 DSUM DSUM S 7 40 5 2 S Quantity of 1 DSUMP DSUMP S 7 40 DECO DECO S D n Decode from 8 to 256 7 42 5 Decode D 2 DECOP DECOP S Dn NE 9 e 7 42 5 amp ENCO ENCO 5 Decode from 256 to 8 9 e 7 42 e Encode D pad 2 bis 9 ENCOP con lola 9 7 42 7 seg d m 3 ment J 5 i 7 A Not applicable to 7 44 decode Yj BSET BSET D 7 e 7 46 15 0 BSETP BSETP Dijon 1 7 7 46 reset E BRST BRST D n D 7le 7 46 15 n 0 2 A 2 BRSTP Dn 9 7 46 All40bit DIS S D n x e DIS TE 7 48 0 1 5 _ D 2 Accocia DISP DISP s p when Acre 9le 7 48 tion ius Dissoci mde ation UNI m 5 4 bits Abit 9 e 7 48 5 5 1 e E H UNIP UNIP s D n Wh n hoec o 9 7 48 ASCII Converts alphanumeric characters AIphanumerid into ASCII codes and stores into 4 ASC cha
28. Example M9036 K DMOV 107 DO 1 D11 D10 DMOV 79 510 2 D gt D10 M5 H M5 turns ON M9036 K DMOV 256 DO K D1 11 10 86 D10 Ts gt D gt DO 010 J 5 H Since values of 32 bit data 010 and 011 are determined by content of D11 the comparison result is unknown 6 BASIC INSTRUCTIONS MELSEC A 6 1 1 16 bit data comparison lt gt gt lt lt gt Applicable All CPUs CPU Available Device gt S oo 5 Bit device Word 16 bit device Constant Pointer Level 9 E 9 2 2 M9012 M9010 9011 S 10 0 K1 Indicates the instruction symbol lt gt gt lt lt gt Setting data S1 Compared data or head number of device which S2 stores compared data Functions 1 Handled as a NO contact and used for the comparison of 16bits 2 The comparison operation result is as shown below Comparison Condition Operation Result Comparison Condition Operation Result Instruction Symbol in Instruction Symbol in
29. Processing Time us AnS A1SJH A1SH A2SH S1 Instruction Condition Direct Mode Refresh Refresh Direct Refresh Direct Mode id ah X Y Mode Mode Mode Mode ENCOSDn 2 164 163 195 92 6 93 1 69 5 69 4 5 Dn 2 164 163 195 92 6 93 1 69 4 69 4 BSETDn n 5 90 90 23 6 23 9 17 7 18 0 BSETPDn 5 90 90 23 6 24 1 17 5 18 0 BRSTDn 5 97 96 25 0 25 5 18 7 18 8 BRSTPDn n 5 97 96 25 0 25 5 18 7 18 8 UNISDn 1 131 131 28 8 29 1 21 5 21 6 UNIPSDn 1 131 131 28 8 29 1 21 5 21 6 DISSDn 1 154 153 37 6 38 1 28 1 28 4 DISPSDn 1 154 153 37 6 37 9 28 1 28 4 ASC 120 120 120 30 7 30 7 23 1 23 0 FIFW 101 101 123 69 0 69 3 55 3 55 2 101 10 123 27 2 43 3 20 5 20 4 FIFR 118 118 134 53 8 54 3 40 3 40 3 FIFRP 118 118 134 82 2 54 3 40 3 40 2 n2 1 190 190 190 48 4 48 3 36 4 36 6 LRDP n1 SD n2 n2 32 190 190 190 48 4 48 3 36 4 36 6 n2 1 200 200 200 51 2 51 2 38 8 38 6 LWTP n1DSn2 n2 32 446 446 446 115 2 115 6 86 8 86 6 n3 1 172 172 172 43 4 53 2 32 8 45 0 RFRP n1 n2 D n3 n3 16 172 172 172 43 4 53 4 32 8 45 0 n3 1 176 176 176 44 0 54 0 33 4 45 4 RTOP n1 n2 S n3 16 176 176 176 44 4 54 0 33 6 45 6 WDT 64 64 64 16 2 16 3 12 2 12 2 WDTP 64 64 64 16 2 16 3 12 2 12 2 1 condition 240 240 97 0 77 0 contact 50 condition 3905 3905 118 2 92 8 CHK contacts Fault check instruction 100 condition 7820 7820 140 0 109 0 contacts 150 condition 11472 11472
30. WawpPsts2D 3 WonSD J tH worso WoRSIS2D 98 130 WoRPSIS2D w w WXORSD 040 WxomSD w DXOR 23 pxo 229 WxonSiS2D 130 WxomstseD 9 WXNRSD J osu osu 5 258 ___ 5 258 WXNRPSIS2D 134 o 9 Neg ____ 9 g APP 85 APPENDICES MELSEC A Table 2 9 Instruction Processing Time of QCPU A A Mode Continue TTE Instruction Condition Device QnCPUA A QnHCPU A sensisen hs 59 SERP S1S2n n5 _ ___ 132 507 86 APPENDICES MELSEC A Instruc Table 2 9 Instruction Processing Time of QCPU A A Mode Continue Instruction ETAR Time us Instruction Condition Device QnCPUA A QnHCPU A DECOSDn h seo SSS 996 LRDP n1 SDn2 n1 12 0 n2 D n3 n1 n2 S n3 APP 87 APPENDICES MELSEC A Table 2 9 Instruction Processing Time of QCPU A A Mode Continue Instruction Processing Time us Condition Device QnCPU A QnHCPU A When the number of conditional contacts is 1 When the number of conditional contacts is 100 When the number of conditional contacts is 150 TRAR 5 5 5 5 5 C P L i 8K points LTR H T C T R H
31. 6 BASIC INSTRUCTIONS MELSEC A 6 7 2 Link refresh enable disable DI oue 20 board A0J2H Applicable QCPU A CPU A Mode N X xX X X X Remark Valid only when special relay M9053 is OFF The EI DI instructions change in function depending on the status of special relay M9053 as follows When M9053 is ON Link refresh enable disable When M9053 is OFF Interruption enable disable See Section 6 5 3 for details Available Device Bit device Word 16 bit device Constant Pointer Level Digit specification M L S D W 1 K H P 1 M9012 M9010 M9011 Link refresh disable area Functions DI 1 Disables link refresh until the EI instruction is executed 2 Sequence processing is started with link refresh enabled 3 Link refresh is always enabled during END processing EI 1 Enables link refresh 6 BASIC INSTRUCTIONS MELSEC A Execution 1 EI DI instructions are not used Conditions Sequence 2 Sequence 2 Sequence 5 processing E 5 i processing D 5 5 processing g 5 el 5 S l
32. Fig 3 9 Ladder Examples and Judgements When an AnA A2AS or AnU is used the above specification does not cause operation error and the sequence program incorrectly runs See Section 3 8 4 for details 6 When an AnA A2AS or AnU is used index qualification can be performed also to bit devices used for the LD OUT and other instructions 3 11 3 INSTRUCTION STRUCTURE 3 6 Subset Processing 3 7 Operation Error MELSEC A Subset processing is used to increase processing speed provided with the following conditions when bit devices are specified in basic or application instructions Instruction symbols are same as those of normal processings CPU Type Table 3 4 Conditions for Subset Processing Index Qualification Bit Device Word Device An AnN A3V A2C A52G A0J2H AnS AnSH A1FX A73 board e Must not be used Digit specification must be K4 16 bit processing orK8 32 bit processing The bit device specified must be a multiple of 8 No condition provided Must be used Digit specification must be K4 16 bit processing orK8 32 bit processing The bit device specified must be a multiple of 16 File register R must not be used AnA A2AS AnU e Must not be used to bit devices Digit specification must be K4 16 bit processing or K8 32 bit processing The bit device spe
33. 1 X47 X46 1 1 gt Regarded as 0 931 b30 b29 b28 b27 b26 b25 624 623 622 0 0 0 0 0 0 1 bags Set to 0 2 Program which performs logical product of the 32 bit data of DO and 1 and the 32 bit data of D108 and 109 and sends the result to the Y100 to 11F when M16 turns on M16 0 1 DAND DMOV D108 e Coding 0 LD M16 1 DANDP DO 10 DMOVP D108 17 END D108 K8 Y100 D108 K8Y100 Logical product of the 32 bit data of DO and 1 and the 32 bit data of D108 and 109 is performed and the result is stored into D108 and 109 Data of D108 and 109 is sent to the Y100 to 11F 7 APPLICATION INSTRUCTIONS MELSEC A 7 1 2 16 32 bit data logical add WOR WORP DOR DORP Applicable All CPUs CPU Available Device 5 65 ES Bit device Word 16 bit device Constant Pointer Level 8 E 9 RE Xx Y IM L 5 B F T DW R 1 2 V K H P 1 5 M9012 M9010 M9011 K1 D WOR S1 O O O O O O O O 0O 0O 0O O to 2 10 0 KA 01 5 1 D
34. Program which rotates the contents of AO three bits to the right when XC turns on 709G P K E X00C 0 ROR 3 1 RORP K3 4 END b15 b14 b13 b12 b11 b10 b9 b8 57 b6 Before execution A0 o h Sos B15 To B15 Contents of BO Eu NR Carry flag before execution lt nu M9012 1 gt 1 Contents of BO when n 1 2 Contents of BO when 2 AO after execution RCR Program which rotates the contents of AO three bits to the right when XC turns on dus i E X00C 0 73 1 1 RCRP 4 END Carry flag M9012 b15 bl4 b13 612 611 b10 b9 b8 67 b6 65 b4 Before execution Contents of 2 EQ CENE N To carry flag before execution 1 1 Contents of BO Progress whennca EXE To carry flag Contents of BO When n 2 After execution n 3 Before execution carry is either 1 or 0 MELSEC A 7 APPLICATION INSTRUCTIONS MELSEC A 7 2 2 16 bit data left rotation ROL ROLR RCL RCLP Applicable CPUs CPU Available Device 2 gt 8 oo ez 525 5 Bit device Word 16 bit device Constant Pointer Level 9 o
35. 1 D2 5 6 56 D1 lt gt 02 Z XCHP D1 D2 5 6 56 change DXCH 1 D2 6 56 E 01 1 01 02 1 D2 gt pxcHP Di p2 6 56 b Program branch instructions Table 2 14 Program Branch Instructions A Execu x Classi Instruction i PENA Contents of Processing tion Con 8 o 2 Applicable CPU Page fication gt Symbol dition E 25 ES Jumps to P after the input 3 CJ PS condition is enabled d Jumps to P beginning with 3 Jump SCJ SCJ P the next scan after the input 6 58 condition is enabled 3 JMP H JMP Unconditionally jumps to 6 58 3 CALL p 3 6 62 GATE Executes the subroutine l IES eub program at P after the input 3 ub AME ied inel CALLP ER px condition is enabled A sle o call ET Returns execution from the RET RET subroutine program to the 1 6 62 _ Enables interrupt program run Not applicable to A2C and T E ET Valid for An
36. instructions to 32 or less MELSEC A 9 ERROR CODE LIST MELSEC A Table 9 3 Error Code List for ANACPU and Board Continue Error Detailed Error Massage Code Error and Cause Corrective Action D9008 Code States D9091 CHK FORMAT Instructions including NOP other Check the program of the ERR than LDX LDIX ANDX and instruction and correct it referring to Checked at ANIX included in the contents of detailed error codes STOP PAUSE instruction circuit block RUN Multiple CHK instructions are given The number of contact points in the CHK instruction circuit block exceeds 150 The LEDA CHK instructions are not paired with the LEDA CHKEND instructions or 2 or more pairs of them are given Format of the block shown below which is provided before the instruction circuit block is not as specified P254 34 1 Device number of D1 in the 91 02 instruction is different from that of the contact point before the CJ Pi instruction Index qualification is used in the check pattern circuit 1 Multiple check pattern circuits of the LEDA CHKEND instructions are
37. e n 35 minutes A2CCPUC24 minute second secare uan an t FO 48 seconds PRF Minute Second H3548 Stores the status of writing to the standard ROM 0 Writing enabled F1u During RAM operation Result of writing DU the ate F2 Writing to standard ROM disabled writing to the standard QCPU A to standard ROM ROM F3u Failed to erase A Mode F4u Failed to write FE Checking erasing FFu During writing Two day of the week is stored to D9076 in BCD codes as shown below B15 B12 B11 d Dedicated to Clock data These digits are always Day of the week D9076 data day of the week set to 0 Sunday A2CCPUC24 Monday PRF Tuesday Wednesday Thursday Friday Saturday APP 23 APPENDICES Table 1 4 MELSEC A Special Register List Continue Applicable CPU D9076 D9077 D9080 D9081 D9082 D9085 D9090 D9091 Status of writing to standard ROM Sequence accumulation time measurement Number of executable CC Link dedicated instructions Number of vacant registration areas for communication requests Final connected station number Time check time Microcomputer subroutine input data area head device number Instruction error Microcomputer subroutine call error code Stores the status of writing enabled disabled to the standard ROM Accumulation time setting Stores the n
38. nennen nnne nan 7 77 771 FOR to NEXT FOR enne 7 77 7 8 Local Remote Station Access Instructions nenn 7 79 7 8 1 Local station data read write LRDP LWTP 7 80 7 8 2 Remote I O station data read Write RFRP RTOP 7 86 79 Display Instructions oreet iere ii loniae R 7 92 7 9 1 ASCII code print instructions PR 7 94 7 9 2 ASCII code comment display instructions LED LEDC 7 100 7 9 3 Character display instructions LEDB 7 103 7 9 4 reset instruction LEDR esee 7 105 7210 Other Instructions hin etre ot han Ghee bate od ee dtu eld 7 108 7 10 1 WDT reset WDT nnns sinn 7 109 7 10 2 Specific format failure check CHK sssssssssssseseseeeeeen enne nenne 7 111 7 10 3 Status latch set reset SLT nnns 7 117 7 10 4 Sampling trace set reset STRA 7 119 7 10 5 Carry flag
39. 1 step x Total 3 steps Index qualification REMARK Even when index qualification is used in a 1 step sequence instruction such as LD OUT with index registers Z1 to Z6 V1 to V6 extended by AnA A2AS AnU QCPU A A Mode and A2USH board the number of steps increases only one Example X000 V6 ED 073 141 2 steps _73 lt YO40 VL OUT Y40V6 1 1 2 steps Vasa Total 4 steps 3 15 3 INSTRUCTION STRUCTURE MELSEC A 3 8 2 Instructions of variable functions The following instructions vary in content of processing when used in the dedicated instructions blocks for the AnA A2AS AnU QCPU A A Mode and A2USH board For details refer to the AnSHCPU AnACPU AnUCPU Programming Manual Dedicated Instructions Instruction Normal In the Extension instruction Blocks PRC Comment output MELSECNET MINI S3 support instruction FROM DFRO Special function module MELSECNET MINI S3 support TO Device memory access instruction DTO LEDA LEDB Unusable Dedicated instruction start LEDC LED comment display Device specification DXNR NOT exclusive logical sum operation 32 bit constant specification LEDR LED and annunciator clear Dedicated instruction termination SUB Unusable 16 bit constant specification REMARK The dedicated instruction block of AnA A2AS AnU QCPU A A Mode and A2USH board is as sh
40. Multiplication division commands Indicates the instruction symbol DB DB Setting data Multiplicand dividend or head device number stor S1 S2 ing multiplicand dividend Multiplier divider or head device number storing multiplier divider oP 51 S2 D Head device number which will store the result Function DB 1 Performs multiplication of the BCD data specified at S1 and the BCD data specified at S2 and stores the multiplication result into the device specified at D SHL S1 S2 1 52 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 D33 D32 091 0 o gt 9 9 9 9 9 9 9 8 0 0 0 0 0 0 0 26 2 If D is a bit device the 8 lower digits 32 lower bits of the multiplication result may only be specified K1 1 lower digit BO to 3 K4 4 lower digits BO to 15 K8 8 lower digits BO to 31 3 At S1 and S2 0 to 99999999 BCD 8 digits can be specified 6 BASIC INSTRUCTIONS DB MELSEC A 1 Performs division of the BCD data specified at 81 and the BCD data specified at S2 and stores the division result into the device specified at D 5191 51 5291 52 5 6 7 8 9 1 2 3 i 0 1 2 3 4 5 6 7 Digit higher than the specified digit is regarded as 0 0191 D
41. ae e ath et ib iu 3 12 3 8 Cautions on Using A2AS AnU QCPU A A Mode A2USH 3 14 3 8 1 number of steps used 5 3 14 3 8 2 Instructions of variable functions nene enn 3 16 3 8 8 Set values for the extension timer and 3 17 3 8 4 Cautions on using index qualification ssssssseeeeeenneens 3 17 3 8 5 Storing 32 bit data in index 3 20 3 9 Operation when the OUT Instruction SET RST Instruction and PLS PLF Instruction are from the Same Device 3 21 INSTRUCTION FORMAT er eaer nhan sna rape ieSe dein dHe rinon aaa iis 4 1 4 3 SEQUENCE 5 4 5 41 5a Contact Instructions eec addidi spas cR enun 5 2 5 1 1 Operation start series connection parallel connection ED AND OB ait itle te eae n dea 5 2 5 2 Connection INStrUCtIONS 5 5 5 2 1 Ladder block series connection parallel connection ANB ORB 5 5 5 2 2 Operation result push
42. 16 bits C S1 1 0 0 1 0 1 1 1 0 1 1 0 al 0 0 0 Before execution WXNR N S2 0 0 0 1 0 0 TP 1 0 al 0 1 0 1 1 v After execution 1 1 1 1 l12 0 1 1 1 1 0 0 0 0 3 When operation is performed the digits of bit device higher than the specified are regarded as 0 DXNR 1 Performs the exclusive NOR of the 32 bit data of device specified at D and the 32 bit data of device specified at S and stores the result into the device specified at D 32 bits D 1 1 o0 o0 1 a 1 Before execution WXNR S 1 0 1 0 1 0 T 0 1 0 1 After execution o ailo o a 2 When operation is performed the digits of bit device higher than the specified are regarded 50 Execution Conditions Operation command OFF KU IM Kex orm Executed Executed per scan per scan lt gt gt le Executed gt Executed only once only once The DXNR instruction in the AnA A2AS AnU QCPU A A Mode and A2USH board dedicated instructions changes to the 32 bit constant setting instruction For details refer to the AnSHCPU AnACPU AnUCPU Programming Manual Dedicated Instructions 7 16 7 APPLICATION INSTRUCTIONS MELSEC A Program Examples WXNR 1 Program which compar
43. 5 NT TROD U OTON cuam 1 1 1 3 INSTRUCTIO NS oes CU PEDE 2 1 2 24 24 OlassiflCatiOnz o o nd iad dac eA a odd dd e mtis 2 1 2 2 nstruction List o tee e e tn tam ee 2 2 2 21 Explanation for instructions lists 2 2 2 2 2 SEQUENCEINSIFUCUONS pte e et eap 2 5 2 2 3 BASIC o sna Dee ep te Deve te V Deut 2 8 2 2 4 Application instructions eee mener nnne nennen 2 16 INSTRUCTION STRUGCTURE cuan Eae 3 1 3 24 3 12 Instruction StU CHUNG ic 3 1 3 2 Bit PrOCESSING eere ree E Editer eec eder pac Ee adde ce EE eode 3 3 3 2 1 bit PLOCOSSING eis eee cecs coeteee ecce kennt ace ev ae Y nee de ne ee 3 3 3 2 2 Digit specification nennen 3 3 3 3 Handling of Numeric Values ee ee nennen ener 3 6 3 4 Storing S2 bit sire E 3 8 3 5 jIndex QUalifiCatiOn s c 6er ia a t tia Rd OR GR Fr 3 10 3 6 S bset Dae ep CC UH e e ERE Pe EH dials 3 12 327 alata ae e ath et ib iu 3 12 3 8 Cautions on Using A2AS AnU QCPU A A Mode A2USH 3 14 3 8
44. 6 42 6 4 Data Transfer amp nennen enne nnne nnne nnne 6 46 6 4 1 16 32 bit data transfer MOV MOVP DMOV DMOWP 6 47 6 4 2 16 32 bit data negation transfer CML DCML 6 49 6 4 3 16 bit data block transfer BMOV FMOV 6 52 6 4 4 16 32 bit data exchange XCHP DXCH DXCHP 6 56 6 5 Program Branch nstr ctions nee tea e Re Eh EE N Penta 6 58 6 5 1 Conditional jump unconditional jump CJ SCJ 6 58 6 5 2 Subroutine call return CALL CALLP 6 62 6 5 3 Interrupt enable disable return El DI 6 64 6 5 4 Microcomputer program call SUB SUBP sssssssse eee 6 67 6 6 Program Switching Instructions sess nnne nennen nnn enne 6 69 6 6 1 Main lt gt subprogram switching sse 6 69 0 7 Link sRetreshINStruCtOns ss trie 6 82 6 7 1 Link refresh aa aa oaae ae aaan aadal en ensis trt 6 82 6 7 2 Link refresh enable disable El DI
45. 77 sesenta APP 90 8 MICROCOMPUTER MODE MELSEC A 8 MICROCOMPUTER MODE This section gives the microcomputer mode specifications memory map and data memory configuration of the ACPU modules Note that the AnA A2AS AnU QCPU A A Mode and A2USH board cannot use the microcomputer mode SL I III III WWIII SPD LIP III IV 81 Specifications of Microcomputer Mode CPU Microcomputer Instructions which Clock Program Area 1 ATO Area Slack Area cannot be used 2 0 to 10K bytes 8086 0 to 26K bytes 8 MHZ to 58K bytes Main 0 to 58K bytes Sub 0 to 10K bytes 0 to 26K bytes 0 to 58K bytes Main 0 to 58K bytes Sub 0 to 58K bytes Main INT INTO IRET IN 0 to 58K bytes Sub OUT HLT WAIT 0 to S8K bytes Main User area 128 bytes No LOCK ESC 0 to 58K bytes Sub to ATFFH Setting required by the 4 256 bytes 529 0 to 14K bytes user A1SH A1SJH A2SH S1 0 to 26K bytes 0 to 26K bytes 0 to 14K bytes 0 to 14K bytes 0 to 58K bytes Main 0 to 58K bytes Sub SUAE WEIT IN 0 to 58K bytes Main LOCK ESC CLI sn 0 to 58K bytes Sub 0 to 14K bytes Table 8 1 Specifications of Microcomputer Mode 1 Specify the microcomputer program area in multiples of 2K bytes The relation between the main sub program sequence program and microcom
46. A3U 40 and Q06H program Always on Always on 9036 9051 9057 M9036 9051 M9056 ad A A A A FEND Main sequence program Subsequence program CAUTION When modifying a subprogram during main program run or vice versa M9051 M9056 and M9057 contacts should be used to disable the CHG instruction so that the CHG instruction may not switch the currently running program to the program currently being corrected 6 BASIC INSTRUCTIONS MELSEC A AnU A2AS C A2USH S1 6 7 Link Refresh Instructions Applicable QCPU A CPU A Mode N 6 7 1 Link refresh COM Remark Execution is not possible while an interrupt program is being run Available Device Bit device Word 16 bit device Constant Pointer Level M L S D W 1 K H P 1 M9012 M9010 M9011 Digit specification COM Functions 1 The COM instruction is used to make faster data communication with a remote I O station or to receive data positively when the scan time of the master station sequence program is longer than that of the local station sequence program 2 On execution of the COM instruction the PC CPU temporarily stops the sequence program processing and performs general data processing
47. Executed 4 Executed only once only once Operation Errors In the following case operation error occurs and the error flag turns on FIFO table head address pointer value exceeds the corresponding device range when the FIFW P instruction is used The FIFR P instruction has been executed when the pointer value is 0 7 APPLICATION INSTRUCTIONS FIFW MELSEC A Program which uses D38 to 47 as a FIFO table and temporarily stores the data of X20 to 2F when XB turns on When the data exceeds 9 this program turns on Y60 to disable the execution of FIFW instruction The data storage location is as shown below when the pointer value is 5 K o gt D38 Yoo X00B 060 K4 X020 038 o Coding 0 LD gt D38 K8 5 OUT 060 6 LD X00B 7 ANI 060 8 FIFWP K4X020 038 15 END Pointer Before execution X20 to 2 8100 When pointer D38 is 9 or more Y60 is turned on Data of X20 to 2F is stored into FIFO table After execution 8100 7 APPLICATION INSTRUCTIONS MELSEC A FIFR Program which reads data from 038 to 45 of the FIFO table when XB turns on and outputs the data to the Y30 to Data is read as shown below when the pointer value is 7 When pointer 038 is 0 Y60 is oH 0 yoso
48. Multiplicand DB Multiplier Program which performs division of the BCD data of X20 to 3F and the BCD data of D8 and 9 and stores the result to D765 to 768 when X1B turns on X01B P 0 _ DB Coding K8 X020 D8 D765 0 LD X01B 1 K8X020 D8 D765 12 END D9 D8 Upper 4 digits Lower 4 digits 2 6 3 17 8 Dividend Divisor D766 D765 D76 D767 Upper 4 digits Lower 4 digits Upper 4 digits Lower 4 digi 0 0 6 8 8 178 3 3 y Quotient Remainder 6 BASIC INSTRUCTIONS MELSEC A 6 2 9 16 bit BIN data increment decrement INC INCP DEC DECP All CPUs Available Device Bit device Word 16 bit device Constant Pointer Level Digit specification D A1 K H P 1 M9010 M9011 Indicates the instruction symbol INC DEC Setting data D Head device number for INC 1 DEC 1 Functions INC 1 Performs the addition of 1 to the device 16 bit data specified at D 5678 BIN Eu 5679 BIN 2 If INC or INCP is executed when the content of device specified at D is 3276
49. P 9 1 9 3 Error Code List for AnSHCPU nnns nnns sn trn nnns snnt 9 7 9 4 Error Code List for the ennt nre 9 13 9 5 Error Code List for the ANUCPU A2ASCPU and A2USH board 9 22 9 6 Error Code List for the QCPU A A Mode internen 9 33 nuage APP 1 APP 96 APPENDIX 1 LISTS OF SPECIAL RELAYS AND SPECIAL REGISTERS APP 1 dad LEistof Special Relays s edente tete en e eh ee e EA I APP 1 127 Special Relays for EINK 2 ier tert rte ette P tet ER APP 13 1 3 Special Registers eene iae eti eoa ere pre es pride APP 16 1 4 Special Registers for enne enne APP 34 APPENDIX 2 OPERATION PROCESSING TIME eene emen nne APP 39 2 1 Instruction Processing Time of Small Size Compact APP 41 2 2 Instruction Processing Time of nennen nennen APP 66 2 3 Instruction Processing Time of QCPU A APP 79 APPENDIX ASCII CODE TABLE iiini ipea aaa ea aaa APP 89 APPENDIX 4 FORMATS OF PROGRAM SHEETS
50. pin Contents of Processing con Applicable CPU ymbol dition BCD BCD S D BCD conversion 5 6 39 5 gt D BCD a BCDP BCDP S 0 10 9999 5le e 6 39 conver sion P DBCD 5 BCD conversion 6 39 5 141 S1 0 1 D _ Ss BIN 0 to 99999999 6 39 5 BIN BIN 5 BIN conversion d n 5 6 42 2 9 gt D EM BINP S D BCD 0 to 9999 5 6 42 conver Sion DBIN DBIN 5 D BIN conversion 9 O 6 42 9 141 S1 _ 0 1 D DBINP DBINP 5 BCD 0 to 99999999 9 O 6 42 4 Data transfer instructions Table 2 13 Data Transfer Instructions Continue i Execu x Classi Instruction i 52 5 i fication Symbol Symbol Contents of Processing pond 25 vje Applicable CPU Page ition 55 25 MOV S D 5 6 47 2 S gt D move 5 1 6 47 Transfer DMOV S D 7 e e oOo 6 47 a S 1 S gt D 1 D 5 p 6 47 CML 5 5 6 49 8 A S gt D CM
51. 8 14 8 MICROCOMPUTER MODE MELSEC A Device Address File register head address 1 20000 memory cassette RAM capacity comment capacity file register capacity Memory cassette RAM capacity 0 16 bytes 2 16 bytes 4 32 bytes 8 64 bytes A3MCA 12 96K bytes A3NMCA 16 96K bytes actual capacity 128K bytes File register 18 144 bytes R A3MCA 24 144K bytes actual capacity 192K bytes block No 0 A3NMCA 40 144K bytes actual capacity 320K bytes A2 A3NMCA 56 144K bytes actual capacity 448K bytes A2 S1 Value for calculation A2N A2N S1 p File register capacity Number of file registers x 2 bytes A3M A3V Use 1024 bytes in place of 1K bytes in calculation mentioned above A2C A52G 2 File register head address by each block 1 A73 20000H memory cassette RAM capacity comment capacity board file register capacity status latch capacity sampling trace capacity 4000H x n Comment capacity Number of comments x 16 bytes 1k bytes Comment capacity Number of comments x 16 bytes 1K bytes Extension register R File register capacity Number of file registers x 2 bytes block NO 1109 Status latch capacity Number of set bytes Sampling trace capacity When setting is provited 8k bytes n Block No 1 In the case of an AnS AnSH and A1FX
52. O 0O 0O O ojo to O Indicates the instruction symbol Multiplication division commands o S1 52 D Setting data Multiplicand dividend or head device number storing multiplier dividend DP S1 S2 D Multiplicand divider or head device number storing multiplier divider Head device number which will store the result Functions D 1 Performs the multiplication of BIN data specified at 51 and the BIN data speci fied at S2 and stores the multiplication result into the device specified at D 51 1 51 5221 52 D 3 D 2 D 1 D B63 beh lt lt 31 bl6 b15 50 31 bl6bl5 b48 b32 b16 bo gt 70109427840 BIN 567890 BIN X 123456 BIN 2 When D is a bit device up to the lower 32 bits can be specified and the upper 32 bits cannot be specified Example K1 Lower 4 bits bO to 3 K4 Lower 16 bits bO to 15 K8 32 bits bO to 31 When the upper 32 bit data of multiplication result is required for the bit device store the data to the word device and then transfer the data 0 2 and 0 3 of word device to the specified bit device 3 At S1 and S2 2147483648 to 2147483647 BIN 32 bits can be specified 4 The judgment of whether the data of 51 and S2
53. ener ener rennen nnne nnns 8 2 8 3 Using User Written Microcomputer Programs sseeeeene nennen nen 8 4 8 321 Memory Ea cua p eua E 8 6 8 3 2 Data memory area address configuration sse 8 6 8 3 3 Differences in operations called by microcomputer instructions according to CPU 8 7 8 3 4 Configuration of data memory sse 8 8 9 ERROR CODE e iecore esee terrent 9 1 9 41 9 1 Reading Error Codes aan ine niin id eee p ia il eo ater eun EE aie 9 1 9 2 Error Code List for the An AnN 2 AnS A2C A73 A52G A1FX and P 9 1 9 3 Error Code List for AnSHCPU nnns nnns sn trn nnns snnt 9 7 9 4 Error Code List for the ennt nre 9 13 9 5 Error Code List for the ANUCPU A2ASCPU and A2USH board 9 22 9 6 Error Code List for the QCPU A A Mode internen 9 33 nuage APP 1 APP 96 APPENDIX 1 LISTS OF SPECIAL RELAYS AND SPECIAL REGISTERS APP 1 dad LEistof Special Relays s edente tete en
54. ones EU ene e 3 Data of bit devices above digit specification is operated as 0 1 Performs the logical add of the 32 bit data of device specified at D and the 32 bit data of device specified at S per bit and stores the result into the device specified at D 32 bits E gt o Before execution DOR i Ne After execution o lolslolslsl 11112 P 2 When operation is performed the digits of bit device higher than the specified are regarded as 0 Execution Conditions Operation command OFF AS Executed Executed per scan per scan lt gt le Executed M Executed only once only once 7 APPLICATION INSTRUCTIONS MELSEC A Program Examples WOR 1 Program which performs logical add of the data of D10 and that of D20 and stores the result to D10 when XA turns on STOA Coding P 0 LD X00A 02 D1 V 9 0 9 1 WORP 020 D10 6 END 2 Program which performs logical add of the data of X10 to 1B and the data of 033 and sends the result to the Y30 to when XA turns on X00A g P K3 _ Logical add of the data of
55. 100 H f nesting of FOR is allowed X002 0 L NEXT NEXT y NEXT J Operation Errors In the following cases operation occurs and the PC stops its operation e After the execution of FOR instruction the END FEND instruction has been executed before the NEXT instruction is executed The NEXT instruction has been executed before the FOR instruction is executed The number of the FOR instructions is different from that of the NEXT instructions The JMP instruction is executed in the FOR to NEXT processing to exit from the FOR to NEXT processing There is a STOP instruction in the FOR to NEXT processing Program Example FOR NEXT 1 Program which executes the FOR to NEXT instructions when X8 is off and does not execute the FOR to NEXT instructions when X8 is on 0 i CJ P8 Coding 0 LD X008 MO K 1 CJ P8 4 z 4 LDI MO K 5 MOV KO 2 10 FOR 4 10 FOR K4 M E 13 LDI MO 13 4 MOV 2 po 14 MOV 7 007 19 INC 2 22 NEXT INC 2 24 10 X00A 22 NEXT 25 OUT 033 P8 X00A 26 END 23 Y033 H 7 APPLICATION INSTRUCTIONS MELSEC A 7 8 Local Remote I O Station Access Instructions Local remote I O station access instructions are used to transfer data in a data link system Four instructions are provided as shown below The local and remote I O station access instruc
56. 2 Do not place contact instructions before the MCR instruction 3 Use the MC instruction and MCR instruction of the same nesting number as a set However when the MCR instructions are nested in one place all master controls can be terminated with the lowest nesting N number Refer to the Precautions for nesting in the program example 5 SEQUENCE INSTRUCTIONS MELSEC A The MC instructions can be used by nesting Range of each instruction is identified by a nesting number Nesting numbers are used in the range of NO to N7 Using nesting circuits which sequentially restrict execution conditions of a program can be made The diagrams below show an example of circuit which uses nesting Ladder as displayed in the GPP ladder mode Ladder as it actually operates A NO M15 H MC NO M15 15 No 15 Executed 1 1 when A is B ON s M 1 M16 MEN M16 uM ael eut Executed N1 M16 T and B are H 9 6 MC N2 M17 Es d Execute EMG Ne MM ou when A B Saad and C are M17 gt N2 _ Executed MCR N2 H N whenA H ON MCR N1 H Executed
57. Available Device gt oo 2 68 ES Bit device Word 16 bit device Constant Pointer Level 9 o i 2 12 K H P M9012 M9010 M9011 D1 O10 0 0 0 0 0 0 0 0 0 0 0 0 0 K1 to XCH Interchange commands Indicates the instruction symbol D1 D2 Setting data Head number of device which stores data to be interchanged Functions XCH Interchanges the 16 bit data of D1 and D2 D1 D2 16 bit lt 16 bit Before execution 9 1 1 1 0 0 0 1 1 0 0 1 0 1 0 1 1 011011010 o o o o m m z m m o o iX o o m a m o o o bs jd o o m o BG o After execution DXCH Interchanges the 32 bit data of D1 and D2 D1 1 D1 D2 2 D2 16 bit gt lt 16 bit gt lt 16 bit gt lt 16 bits gt Before execution After executio
58. For bit device output reverse refer to Section 5 3 4 With the AnA A2AS AnU QCPU A A Mode and A2USH board failure check which allows format specification can be performed using dedicated instructions For details refer to the ANSHCPU AnACPU AnUCPU Programming Manual Dedicated Instructions Available Device gt To e x ss SES Bit device Word 16 bit device Constant Pointer Level 3 3 8 X L 5 B F T D 0 1 2 V K H P 1 N 5 M9012 M9010 M9011 D1 01 4 1 For the number of steps when is used refer to Section 3 8 1 Device specified at D1 Device input X only can be used XD peo D1 02 The CHK instruc R tion should be Check conditions J NO contact only is e The number of the device to be turned ON when pointer P254 NC contact is ignored failure is detected by CHK instruction execution Execution condition of the CJ instruction block Up to 150 contacts can be connected The number of the device to store error code when failure is detected by CHK instruction execution 7 111 7 APPLICATION INSTRUCTIONS MELSEC A Functions 1 The CHK instruction is used for error check of a circu
59. LRDP instruction OFF Incomplete complete ON Complete Used as a condition contact for resetting M9200 and M9201 after the LRDP instruction is complete Use the RST instruction to reset Depends on whether or not the LWTP word device write instruction has been received Used in the program as an interlock for the LWTP LWTP instruction OFF Unreceived received ON Received nstruction Use the RST instruction to reset Depends on whether or not the LWTP word device write instruction execution is complete Used as a condition contact to reset M9202 and M9203 after the WTP instruction is complete LWTP instruction OFF Incomplete complete ON Complete Use the RST instruction to reset M9206 Link parameter error in OFF Normal Depends on whether or not the link parameter setting of the the host ON Error host is valid Depends on whether or not the link parameter setting of the OFF Normal master station in tier two matches that of the master station in ON Unmatched tier three in a three tier system Valid only for the master stations in a three tier system M9210 Link card error OFF Normal Depends on presence or absence of the link card hardware master station ON Error error Judged by the CPU OFF Online Depends on whether t
60. P Executed only once Executed only once i ified at D2 B Device specifie Communication complete flag Operation Errors In the following cases operation error occurs and the error flag turns on When the station number specified at n1 is not of a remote terminal When n3 points which start with the device specified at S exceed the specified device range When the device specified at D1 is not a usable device When the communication request registration areas are full Program Examples A program which writes constant K100 to address 3 of buffer memory of the AD61C head station number 1 when XO is turned ON X000 K K K K 0 LITO 1 3 100 1 PRC MO YOOO H MO turns ON when communication B processing is completed e Coding 0 LD X000 1 TO K1 K3 K100 K1 10 PRC MO Y000 17 END DTO PRC A program which writes content of D1000 to address 5 and content of D1001 to address 6 of buffer memory of the AD61C head station number 1 when is turned ON X000 K K K 0 K DTO 1 5 D1000 1 PRC 1 YOOO 1 MO turns when communication processing is completed e Coding 0 LD X000 1 DTO K1 K5 D1000 K1 10 PRC M1 Y000 19 END 7 APPLICATION INSTRUCTIONS 7 6 5 Special module special block 1 2 word data read FROM FROMP DFRO DFROP AnU A2AS A2USH S1 2
61. S 1 S o o o o o m x x x x 102 10 m x arn OTN s QU c s QD c s QD NAO N dO YNA side BCD 99999999 1 10 1 1 0 01 1 0 01 1 0 01 1 00 1 1 000 1 Y T Y 2 Y Y Y Y o v2 5 5 E 2 2 52 82 92 gt Poo 55 855 55 5 mo 5 39 5 5 pa BIN conversion D 1 D NANNNANNANANNNANNNANNNANANNANANANA NAA A D side BIN 99999999 0 0 0 0 01 0 1 11 1 1 0 10 1 11 1 0 O O O O 1 nem 1 Always set to 0 Execution Conditions ON k k BIN conversion command OFF k Executed Executed per scan per scan r gt Executed Executed only once only once CAUTION In some cases of execution of the BIN or DBIN instruction with a NO contact operation error occurs due to BCD switch timing It is recommended when the BIN or DBIN instruction is used that BIN data conversion be executed using the BIN conversion command after data setting M9036 K4 X000 K4 BIN conversion command Operation error sometimes occurs After data setting is turned ON and data is read Operation Error In the following case op
62. Servo program execution and set value change 7 125 to 7 133 2 INSTRUCTIONS 2 2 Instruction List 2 21 Explanation for instructions lists Instruction lists in Section 2 2 2 to 2 2 4 are in the following format Table 2 2 Explanation for Instructions Lists 1 E Instruction Symbol Contents of Processin iion 58 5 Applicable CPU Page 2 Symbol a dition FEE m 25 S D 5 6 10 D S D P P s A 5le e 6 10 51 52 D 7 6 10 51 S2 2 D P 51 52 6 10 2 2 Lee 5 5 e e 6 10 D S D P P S D 51 6 10 51 582 D 6 10 51 2 gt D mE P 51 52 7 6 10 2 3 4 5 6 7 8 9 10 11 Explanation 1 Classifies the instructions by applications 2 Indicates the unit of processing at the execution of instruction Unit of Processing Device Number of Points X Y M L E B Max 16 points in units of 4 points T C D W R A Z V 1 point X Y M L F B Max 32 points In units of 4 points T C D W R A0 Z 2 Points 16 bits 32 bits 2 INSTRUCTIONS MELSEC A 3 Indicates t
63. Subroutine execution commands Call of subroutine CALL p Setting data program Head pointer number of Head pointer number CALLP p program to label of subroutine rogram LA Return of subroutine program Functions CALL CALLP 1 Executes the subroutine program specified by the pointer P Subroutine program 2 Up to five levels of nesting of the CALL CALLP instruction are allowed RET 1 Executes the sequence program located at the next step to the CALL P instruction when the RET instruction is executed 2 Indicates the end of subroutine program For the PC CPUs shown below setting indicated below is required A0J2HCPU AnSCPU AnSHCPU A2CCPU AnCPU AnNCPU ASHCPU A3VCPU In a sequence between the RET instruction in a subroutine program and the END instruction at the end of a sequence program a dummy circuit must always be set Otherwise the PC will fail to operate correctly A NOP instruction has the same effect However take it into consideration that NOP batch deletion must not be executed by a peripheral device 6 BASIC INSTRUCTIONS The execution conditions of CALL and CALLP are a shown below BE OFF REN ON Executed per scan lt gt MELSEC A Executed per scan Executed Executed only once only once lt lt When
64. CPU bide mcd Refresh mode Set mode when either or both of input and output are in refresh mode An Failure check AnN AnS AnSH A1FX 7 AQJ2H A73 board Failure check Bit device output reverse A3M Failure check Failure check A3V AnA A2C A52G AnU A2AS QCPU Failure check A A Mode A2USH board For failure check refer to Section 7 10 2 Available Device Bit device Word 16 bit device Constant Pointer L D W R 1 K H Digit specification D1 d D2 1 Device used for D2 is a dummy data which has nothing to do with program processing Output reverse command Setting data Required device number Dummy data Any device number indi cated by 5 SEQUENCE INSTRUCTIONS MELSEC A Functions 1 Reverses the output status of the device D1 on the leading edge of the output reverse command 2 Though D2 is a dummy data specify any device number indicated with the mark for it If a bit device is specified for D2 specify the digit with K1 to K4 Specify any value since this digit specification value is a dummy data ON X005 K4 y E 010 7 V Y10 ON 4 al 4 OFF Device specified for D2 can be used freely for other purposes 3 The CHK instruction is only executed in re
65. MN QCPU A A Mode X Available Device Bit device Word 16 bit device Constant Pointer M L S D W 1 1 Digit specification Execution command Setting data Axis number to be started Servo program number to be executed Functions 1 Servo program start request is executed after the DSFRP instruction execution command was turned ON and the start enable flag M200n which corresponds to the axis to be started is set 2 Servo program number for which start request is executed is specified by n There are 2 ways of setting of servo program number direct setting and indirect setting 1 Direct setting Servo program number is set directly with numerals 0 to 4095 Example To set servo program number 50 set K50 for n 2 Indirect setting Servo program number is set with content of data register Data register number 000 to 799 Always use 3 digits Example 50 050 Data register Set K30 Example To set servo program number to be started with data in data register D50 set K30050 for n 30050 050 is specified t 7 126 7 APPLICATION INSTRUCTIONS Execution Conditions Operation Errors MELSEC A 3 At D set axis numbers to be started in the servo program sp
66. Not used 1 is stored when running 0 is stored when not running Error program Stores error servo program number 0 to 4095 when the Dedicated to Error program number number servo program setting error flag M9079 is turned on 73 Stores error code which corresponds to the error setting item when the servo program setting error flag M9079 is turned on Stores type of connected servo amplifier in the bit which corresponds to each axis number 0 MR SB MR SD MR SB K is connected or not connected Bit pattern of the axis General purpose servo amplifier is connected connected to a general purpose servo amplifier Data setting error number Dedicated to AT3 Data setting error Servo amplifier type Dedicated to AT3 Type of servo amplifier set at each axis is stored with or 1 APP 32 APPENDICES MELSEC A Table 1 4 Special Register List Continue Bit which corresponds to faulty module or remote terminal module is set 1 Bit which corresponds to a faulty station is set when normal communication cannot be restored after executing the number of retries set at D9174 If automatic online return is enabled bit which corresponds to a faulty station is reset 0 when the station is restored to normal Faulty station Bit pattern of the faulty Usable with A2C detection station 529 Data configuration Address 615 614 613 612 611 610
67. Symbol Contents of Processing tion Con 2 3 3 Applicable CPU Page dition 25 Not applicable to AnS AnSH A1FX Switch CHG H Switches between the main and 1 A1 2 51 A2N S1 6 69 ges subprograms CPUs other A2N S1 A2A S1 2 51 A2C than above 2 and A52G n Execu x Classi Instruction 52 9 0 fication 5 Symbol Symbol Contents of Processing yo bead 5 8 Applicable CPU Page 25 Link COM __ Executes refresh general data 3 Not applicable to A3V 6 82 refresh processing Not applicable to A3H A3M E EI 1 AnA A2AS AnU QCPU A 6 84 refresh Mode and A2USH board enable Not licabl An A3H _ lot applicable to An b disable DI pr Disables when 1 AnA A2AS AnU QCPU A 6 84 Mode and A2USH board Only executes refresh for the 2 SEG SEG 5 corresponding device during 1 7 Not ASN 6 86 scan Valid when M9052 is on i 1 For the number of steps when extension devices are used or when index qualification is performed to bit devices for A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 1 The A mark in the Index colu
68. h y gt when A is H J MCR NO H Sud S eet s No relation V4 E with A B lt J Cautions when Using Nesting Architecture 1 Nesting is available in 8 levels from NO to N7 Nest MC starting with lower nesting numbers N and MCR with higher numbers If the nesting numbers are used reverse nesting is not configured and the PC does not operate correctly Ladder as displayed in the GPP ladder mode Ladder as it actually operates A MC M15 H MC N1 M15 N1 M15 1 _ 15 N C A H fa CA B B MC NO M16 H MC NO M16 M16 pg NO M16 A Ux 1 N H gt NL o MCR N1 p H MCR MCR wo P aiies H Vi NC D Nesting numbers for MCR are Not a normal MC circuit since bus lines reverse are crossing 5 SEQUENCE INSTRUCTIONS MELSEC A 2 If the MCR instructions gather at one place of nesting use the lowest nesting number once to end all MCs X001 X001 MC NO M15 H MC NO M15 H NO M15 NO M15 H X002 X002 MC M16 H MC N1 M16 H N1 M16 Nhe M16 H X003 X003 MC N2 M17 H MC N2 M17 H M17 M
69. sna rape ieSe dein dHe rinon aaa iis 4 1 4 3 SEQUENCE 5 4 5 41 5a Contact Instructions eec addidi spas cR enun 5 2 5 1 1 Operation start series connection parallel connection ED AND OB ait itle te eae n dea 5 2 5 2 Connection INStrUCtIONS 5 5 5 2 1 Ladder block series connection parallel connection ANB ORB 5 5 5 2 2 Operation result push read MPS MRD 5 9 5 37 Output Instr ctlonis deua 5 14 5 3 1 Bit device timer counter output 1 5 14 5 3 2 Bit device set reset SET RST 5 19 5 3 8 Edge triggered differential output PLS 5 23 5 3 4 device output reverse CHK nennen nnns 5 25 5 4 SSMU InSER GLIOTIS citer reed ree eret caste a dde rae ed ep debt eT E Le s 5 27 5 4 1 Bit device shift SFT 5 27 5 5 Master Control 5 29 5 5 1 Master control set reset MC 5 29 5 6 Termination Instructions eite ete px Er ep ea Ru 5 33 5 6 1 Main
70. DFRO Reads the 2xn3 words of data from the buffer memory address specified by n2 in the special module special block specified by 1 and writes the data to the A1FXCPU beginning with the device number specified by D Buffer memory in the special module Device number A1FXCPU special block specified by D n2 2xn3 N 2xn3 words gt points Execution FROM and DFRO instructions are executed every scan while the read instruction is Conditions ON FROMP and DFROP instructions are executed only once at the rising edge OFF gt ON of the read instruction ON OFF Read command Executed Executed per scan per scan lt r gt Executed Executed only once only once Operation Errors In the following cases operation error occurs and the error flag turns on Access to a special module special block is not possible e designation is other than 0 to 7 When n3 points which start with the device specified at 5 exceed the specified device range REMARK Set the order number of the special module special block in question to n1 counted from the A1FXCPU Special module Expansion unit Special module Special block Expansion block Special block Set 0 at n1 Set 1 at n1 7 APPLICATION INSTRUCTIONS MELSEC A Program Example F
71. MELSEC A 2 A program to change positioning speed of axis 2 to the BCD data set at X90 to XAF when X81 is turned ON 24 28 30 X081 PLS M11 SET M10 K8 DBIN X090 P I DSFL 02 RST Coding 24 LD X081 25 PLS M11 28 LD M11 29 SET M10 30 LD M10 31 DBIN K8X090 40 DSFLP D2 K1 47 RST M10 48 END 7 133 Mii jJ The speed change storage flag M10 is set when X81 is turned ON M10 E The BCD data of X90 to XAF are stored in D968 D968 and D969 positioning speed change K registers 1 The DSFLP instruction is executed M10 The speed change storage flag is reset D968 5 NT TROD U OTON cuam 1 1 1 3 INSTRUCTIO NS oes CU PEDE 2 1 2 24 24 OlassiflCatiOnz o o nd iad dac eA a odd dd e mtis 2 1 2 2 nstruction List o tee e e tn tam ee 2 2 2 21 Explanation for instructions lists 2 2 2 2 2 SEQUENCEINSIFUCUONS pte e et eap 2 5 2 2 3 BASIC o sna Dee ep te Deve te V Deut 2 8 2 2 4 Application instructions eee mener nnne nennen 2 16 INSTRUCTION STRUGCTURE cuan Eae 3 1 3 24 3 12 Instruction StU CHUNG ic 3 1 3 2 Bit PrOCESSING eere ree E Editer eec eder pac Ee adde ce EE eode 3 3 3 2 1 bit PLOCOSSING eis eee cecs coeteee
72. Po oo 2 525 Word 16 bit device Constant Pointer Level 5 o o Xx Y M L S B F T DW 2 K H P 1 5 M9012 M9010 M9011 Q K1 n1 to K4 n2 0 K1 to n3 K8 1 Bit devices cannot be used with the An and CPUs 2 K1 to when the FROM P instruction is used K1 to K8 when the DFRO P instruction is used Indicates the instruction symbol FROM DFRO Setting data Read commands Head number of special function module Specified with the upper two digits 6 TS when the head I O number is expressed in 3 hexadecimal digits Head address of data to be read Device number which will store read data Number of data to be read FROM Reads the data of n3 words which start at the address specified at n2 of buffer memory inside the special function module specified at n1 and stores the data into devices which begin with the device specified at D Special function module buffer memory Functions P Device specified at D Ta n2 3 words gt n3 points DFRO Reads the data of n3x2 words which start at the address specified at n2 of buffer memory inside the special function module specified at n1 and stores the data into
73. Status latch command Execution of status latch Reset of status latch Functions SLT 1 When executed the SLT instruction stores the contents of data memories and file registers set by the parameter setting of peripheral unit AGGPP A6PHP AGHGP into the memory for status latch in the user memory area 2 Stausu latch is allowed for the following devices Data memory ON OFF displays of X Y M B and F Present valuses of T and C Contents of D W A1 Z and V Contents of file registers 3 When the SLT instruction is executed only once 4 The result of status latch can be monitored by the AGGPP A6PHP A6HGP SLTR 1 Areset instruction of SLT instruction 2 By executing the SLTR instruction the SLT instruction is enabled again Execution Conditions ON A 5 Status latch command OFF _ S P ON j Reset command OFF Z K d N VA SLT y gt lt _ Executed SLTR only once 4 Executed only once 7 117 7 APPLICATION INSTRUCTIONS MELSEC A When the status latch SLT instruction is executed the scan time of program mable controller CPU increases as shown in the following table Latch of Only Latch of Both Device Device Memory Memory and File Register A2 S1 A2C A0J2H A52G A3 11 ms 31 ms A2N S1 ATSCS1 A1SJ
74. T flow gt LS Communication start Communication end Device No ON specified at 01 orr 7 APPLICATION INSTRUCTIONS MELSEC A 4 Though the data specified at D2 is dummy data which calls for no processing in the program specify any output Y number at this 5 Data communication is performed according to the data in the communication request registration areas which are registered by executing the TO P and DTO P instructions as shown below Execution of these instructions is completed when data are registered in the communication request registration areas And then following instructions are executed A2C A52G Communication request Remote terminal registration areas module I O module Area No 1 NN K K K K 1 3 100 1 Area No 2 Area No 3 MO YOO0 Area No 4 Area No 5 gt n Registration of Area No 6 t communication request Area No 7 Remote terminal J module module to N y Area No 31 Area No 32 n Once registration is completed by execution of an instruction communication processing is executed to the end even though the condition signal before the TO P DTO P instructions is turned OFF 6 The device number specified at D1 is checked If the same device number was already specified to execute a pr
75. board QCPU A A Mode MELSEC A A0J2H X Available Device gt To ez 525 5 Bit device Word 16 bit device Constant Pointer Level 9 o 2 Xx L S B F T D 0 1 2 V K H P 1 N 5 M9012 M9010 M9011 ni 2 0 n3 K1 to when the FROM P instruction is used K1 to K8 when the DFRO P instruction is used Read commands Function FROM TS Indicates the instruction symbol FROM DFRO Setting data A1FXCPU 0 to 7 Sets the position of the special module or the special block counted from the data is read The head address of the special module or the special block where the The device number of the A1FXCPU where the read data is stored Number of data to be read Reads the n3 words of data from the buffer memory address specified by n2 in the special module special block specified by and writes the data to the A1FXCPU beginning with the device number specified by D Buffer memory in the special module special block n2 Device number specified by D n3words 75 A1FXCPU n8 points 7 APPLICATION INSTRUCTIONS MELSEC A
76. MELSEC A DUTY When X8 is turned ON M9021 turns on for 1 scan and off for 3 scans M9021 X008 K DUTY 1 3 Coding 0 LD X008 1 DUTY K3 M9021 8 END orr ON 1 scans 3 scans Even if the timing pulse input turns off the timing pulse by the DUTY instruction does not turn off Therefore to stop the timing pulse execute the circuit as shown below M9020 H Special relay number M9020 to 4 which stops timing pulse Timing pulse stop input K 0 DUTY 0 Scan during which timing pulse is off Scan during which timing pulse is on Be sure to set to 0 7 124 7 APPLICATION INSTRUCTIONS MELSEC A 7 11 Servo Program Instructions Servo program instructions are used with the A73 for start request and data change of servo programs There are 2 servo program instructions as shown below Symbol Refer to Name Symbol Refer to DSFLP 7 130 Name Start request DSFRP 7 125 Data change For control parameters positioning devices positioning procedures and preparation of servo programs required for positioning control with the A73CPU refer to the A73CPU Reference Manual Servo program instructions are dedicated to the A73CPU The DSFRP and DSFLP instructions used with other types of CPUs perform 1 word shift processing of n word data 7 125 7 APPLICATION INSTRUCTIONS MELSEC A AnU A2AS 7 11 1 Servo program start DSFRP
77. Manufactured July 1999 APP 7 Dedicated to QCPU A A Mode Dedicated to A73 Dedicated to A73 Can be used only with AnU A2US or AnSH QCPU A A Mode 4 APPENDICES MELSEC A Table 1 1 Special Relay List Continue OFF Communication request to remote Registration area terminal modules busy signal for enabled communication Communication request request to remote terminal modules disabled Usable with AnA AnA AnU A2AS QCPU A A Mode A2C and A52G Indication of communication enable disable to remote terminal modules connected to the MINI S3 link module A2C or A52G Turned on when the final station number of the remote terminal modules and remote modules connected to the A2C or A52G disagrees with the total number of stations set in the initial setting Turned off when the final station number agrees with the total number of stations at STOP RUN Specify whether the following errors are to be checked or not after the END instruction is 2 Eia check OFF Checks enabled executed to set END instruction processing time M9084 ON Checks disabled Fuse blown unit verify error Battery error BASIC program OFF A3M BASIC stop Turned on when the is in RUN state 9086 flag ON turned off when it is in STOP state eer OFF Final station Final station number agreement number ON
78. P RA Ps After execution 5 0 to 0 0 is entered 3 In regards to T C the present value count value is shifted The shift of set value cannot be performed 7 31 7 APPLICATION INSTRUCTIONS Execution Conditions ON Shift d ift comman OFF Executed Executed gt lt gt _ Executed Executed only once only once Program Examples SFR Program which shifts the contents of D8 five bits to the right when X1C turns on X616 Coding P K LD X01 0 SFR D8 5 0 1 SFRP D8 K5 6 END 1561 4213212101009 b8 b7 b6 b5 b4 b3 52 b1 50 011110 Before execution Carry frag M9012 After execution zd Pe SFL Program which shifts the data of M6 to 13 two bits to the left when X8 turns on X008 P K awe 0 H SFL M6 2 H 1 SFLP K2M6 K2 6 END Specification range of SF M13 M12 11 10 9 M8 M7 Before execution 0 o o0 0 1 0 Carry flag 4 M9012 0 After execution 7 APPLICATION INSTRUCTIONS MELSEC A 7 3 2 n bit data 1 bit right shift left shift BSFR BSFRP BSFL BSFLP All CPUs Available Device gt S oo 5 Bit device Word 16
79. Stores the Minute and second in BCD 15 12 11 8 B7 B4 80 Example 2 Clock data Clock data NE tea hve 35 minutes D9027 Minute second Pg seconds Ssh Second H3548 815 812 B11 BO Example EUER Friday gt H0005 5 2 Unusable with Day of the week 2 Clock data Sund An A3M lock 0 must be set 69028 2109918 day of the week Monday ABV A2C and Tuesday AOJ2H Wednesday Thursday Friday Saturday D9021 Sets the head station number of remote terminal D9022 modules connected to A2C and A52G Setting is not necessarily in the order of station numbers A2CCPUC24 1 to 57 Other CPUs 1 to 61 Data configuration 09021 Remote terminal module No 1 area Remote terminal D9022 Remote terminal module No 2 area parameter setting 09029 D9033 Remote terminal module No 13 area D9034 Remote terminal module No 14 area Sets attribute of each remote terminal module connected to A2C and A52G with 0 or 1 at each bit 0 Conforms to the MINI standard protocol or remote terminal unit 1 No protocol mode of AU35PTF R2 Data configuration b15b14b13b12b11b10b9 b8 b7 b6 b5 b4 b3 b2 b1 bO Attribute of 0 MINI standard D9035 terminal protocol module 1 No protocol Remote terminal No 1 Remote terminal No 2 Remote terminal No 3 Remote terminal No 13 Remote terminal No 14 APP 20
80. board Number of steps 1 x 1 0 us A1SH 15 Number of steps 1 x 0 33 us Number of steps 1 x 0 25 us Number of steps 1 x 0 2 us Number of steps 4 x 0 2 us A3A A3U and A4U Number of steps 4 x 0 15 us A2USH S1 A2USH board Number of steps 1 x 0 09 us APP 65 APPENDICES MELSEC A 22 Instruction Processing Time of CPUs 1 Sequence instructions Table 2 4 Instruction Processing Time of CPUs Processing Time us A3A Instruction Condition Device An ANB A3H A3M aU A3U 4 R D R D R R LD LDI x 2 3 1 0 2 3 2 0 0 20 0 20 0 15 AND ANI OR ORI Y M L B 1 3 1 0 1 0 0 20 0 20 0 20 0 15 ORB 1 3 1 0 1 0 0 20 0 20 0 20 0 15 Unchanged 7 OFF gt OFF ON gt ON 2 3 1 0 2 3 0 35 0 35 0 40 0 30 Changed OFF gt ON ON 2 3 1 0 2 3 2 0 0 40 0 40 0 30 L S 1 3 1 0 0 35 0 35 0 35 040 0 30 M other than OFF OFF ON gt ON special M Changed OFF 2 ON OFF 1 3 1 0 1 0 0 40 0 40 0 40 0 30 Special M 37 37 0 40 0 40 0 80 0 60 Unexecuted Executed Instruction execution time Processing Unexecuted time at the execution After time out of END Exe instruction cuted Added D Instruction execution time Unexecuted Processing time at the execution After count out of END K instruction Added D Uncounted U
81. corresponding to the station number in the register becomes 1 ee mu B Example When station 7 switches to STOP mode bit 6 in 09212 D9215 staton Operating vetorss tre becomes 1 and when D9212 is monitored its value is 64 status 49 to 64 40x Stores the local station numbers which in error D9216 Local station error Stores the status of stations i Device ee mier messes ee eo o s ss 5 9 e P D9217 Local station error Stores the status of stations detection Local station error Stores the status of stations If a local station detects an error the bit corresponding to the station detection number becomes 1 f P Example When station 6 and 12 detect an error bits 5 and 11 in D9219 SIoris status of stations 09216 become 1 and when 09216 is monitored its value detection 49 to 64 is 2080 820 Local station parameter mismatched or remote Stores the status of stations Stores the local station numbers which contain mismatched 09220 station assignment parameters or of remote station numbers for which incorrect I O error assignment has been made Local station parameter Device Bit aaa eee ons ers ea e oro vo s 7 s os eo mismatched or remote Stores the status of stations Local station parameter mismatched or remote Stores the status of stations ja ical station
82. lt gt OR lt gt LDD lt gt ANDD lt gt ORD lt gt shown below LD lt AND lt OR lt LDD lt ORD lt ANDD lt LD gt gt OR LDD gt ANDD gt ORD gt The conditions by which the comparison operation instructions turn on are as 4 98 99 100 101 102 gt Dn K100 OFF ON OFF Dn K100 ON OFF ON Dn gt K100 OFF ON DnxK100 ON OFF Dn K100 ON OFF Dn2K100 OFF ON 6 BASIC INSTRUCTIONS MELSEC A CAUTION 1 The comparison instructions make the comparison regarding the specified data as a BIN value For this reason in the case of comparison made in BCD value or hexadecimal when a numeric value 8 to F having 1 at the highest bit B15 in a 16 bit instruction or B31 a 32 bit instruction is specifies the comparison is made with the numeric value regarded as the negative of the BIN value Example Comparison with 4 digit BCD value RES gt H8731 H0568 10 bd Regarded as Regarded as 30927 in 1384 in BIN BIN value value Since the result is 30927 1384 Y10 does not turn ON 2 When the comparison of 32 bit data is made specify the numeric value using the 32 bit instruction such as DMOV If a 16 bit instruction such as MOV is used comparison cannot be executed correctly
83. only 8 A3A only 2 A3 only 4 A3U and A4U Available Device Bit device Word 16 bit device Constant Pointer M L S A0 A1 K H P 1 Digit specification LED S LEDC 1 For the number of steps when AnA A2AS QCPU A A Mode A2USH board is used refer to Section 3 8 1 Display command Indicates the instruction symbol LED LEDC Setting data Head number of device which stores displayed data Device number of which com ment will be displayed Functions LED 1 Displays the ASCII data 16 characters stored at eight points which begin with the device specified at S at the LED indicator on the front face of CPU Display data S 42 B 41 A 5 1 44 43 NO AE LED indicator on front face of CPU 5 3 48 47 6 N 2 D E F G H I J K L M S 4 J 49 I S 5 4C L 4B K S 6 4E N 4D M 5 7 50 Y ASCII character Stored ASCII data hexadecimal 2 When the ASCII data is not stored at the eight points which begin with the device specified at S 1 T C D W Blank 2 R What will be displayed is unknown Blank when the file register R has been cleared 3 For
84. 56 6609 1609 3930 5 1227 6 4688 7 1115 6 The processing time shown above is the value when the AD71 is used as special function modules 1 n21000 when other than X and Y is specified with other CPU 112 when X and Y are specified 2 500 when other than X and Y is specified with other CPU n 56 when X and Y are specified APP 64 APPENDICES MELSEC A Table 2 3 Instruction Processing Time of Small Size Compact CPUs Processing Time us A2USH S1 A2AS S1 A2USH board A2C A52G A0J2H A1FX Instruction Condition Refresh Refresh Refresh Refresh Direct Mode Mode Mode Mode Mode Refresh Refresh Refresh Other Other Mode Mode Other Mode than X Y than X ad than X Y Aue 1 237 261 178 95 187 5 549 655 131 7 1 07 5749 2789 4085 1297 z 8261 2948 4576 7 FROM AD61C 435 FROMP AREPTE R2 n3 1 i E eee B AJ35PTF R2 n3 500 mE TS gt gt 1 244 266 183 5 189 8 561 661 141 8 n 500 261 2 4584 7 56 5669 1669 4086 951 2 826 636 DFRO AD61C 445 Ex DFROP 1 All the application instructions indicated above are used without index qualification 2 When unexecuted any instruction is processed during the following time An A2C and A0J2H Number of steps 1 x 1 25 us AnN AnS A73 and
85. 7 44 7 4 5 Word device bit set reset BSET BSETP BRST 7 46 7 4 6 16 bit data dissociation association DIS DISP 7 48 7 4 7 ASCII code conversion ASC sse ener nennen nnns 7 51 cene ra 7 53 7 5 1 FIFO table write read FIFW FIFWP 7 54 7 6 Buffer Memory Access Instructions 000 0 eee eee eeee ee ee teen eter ee 7 58 7 6 1 Special function module 1 2 word data read FROM FROMP DFRO DFROP 7 59 7 6 2 Special function module 1 2 word data write TOP 7 61 7 6 3 Remote terminal module 1 and 2 word data read FROM PRC FROMP DFRO PRC DFROP PRO 7 63 7 6 4 Remote terminal module 1 and 2 word data write PRC TOP PRC PRC 7 67 7 6 5 Special module special block 1 2 word data read FROM FROMP DFRO DFROP nennen nnne nennen snnt nnns 7 71 7 6 6 Special module special block 1 2 word data write TO 7 74 7 7 FOR to NEXT Instructions
86. Classification Description Refer to Contact instruction Operation start series connection parallel connection 5 2 Connection instruction Ladder block series connection parallel connection operation result storage 5 5 Output instruction Bit device output differential output set reset output reverse Shift instruction Bit device shift Master control instruction Master control set reset Termination instruction Other instruction Sequence program termination Sequence program stop no operation 5 SEQUENCE INSTRUCTIONS MELSEC A 5 1 Contact Instructions Applicable CPU All CPUs 5 1 1 Operation start series connection parallel connection LD LDI AND ANI OR ORI Available Device gt 2 oo x 3S8 5 Bit device Word 16 bit device Constant Pointer Level E 9 2 X Y M L s B F T C D W 2 9012 M9010 M9011 pai 1 Index qualification can be used with AnA A2AS AnU QCPU A Mode and A2USH board only X0011 Device number Functions LD LDI 1 LD is the contact A operation start instruction LDI is the contact B operation start instruction They draw
87. Corrective Action Use the peripheral device to read and correct the error step in the program Check the setting range of the device BCD conversion value and so on The data stored by the designated device or a constant exceeds the allowable range The setting quantity of handled data exceeds the allowable range Use the peripheral device to read and correct the error step in the program The number of special instructions for CC Link executed in each scan exceeds 64 Reduce the special instructions for CC Link executed in each scan to within 64 A special instruction for CC Link is executed to a CC Link module to which no parameter is defined Define parameters BATTERY ERROR 1 The battery voltage is low 2 The battery lead connector is not connected 9 12 1 Replace the battery 2 Connect the lead connector to use the built in RAM memory or power failure compensation function MELSEC A 9 ERROR CODE LIST 9 4 Error Code List for the and Board MELSEC A Table 9 3 shows the error messages error codes description and cause of error and corrective actions of detailed error codes Error codes detailed error codes and error steps are stored in the following special registers Error code D9008 Detailed error code D9091 Error step D9010 and D9011 Table 9 3 Error Code List for ANACPU and Board Detailed Error Cod
88. DMOV X020 023 24 bit data of X20 to 37 is stored into 023 and 24 8 K6 _ Logical add of the 24 bit data of M64 to 87 and DOR M64 D23 the 24 bit data of D23 is performed and the result is stored into D23 and 24 Coding LD M8 1 DMOVP K6X020 D23 8 DORP K6M64 D23 17 END 7 10 7 APPLICATION INSTRUCTIONS MELSEC A 7 1 3 16 32 bit data exclusive logical add WXOR WXORP DXOR DXORP Applicable All CPUs CPU Available Device gt S x BS Bit device Word 16 bit device Constant Pointer Level 8 E 9 u X L 5 B F T DW R 1 2 V K H P 1 5 M9012 M9010 M9011 K1 D WXOR S1 O O O to 52 10 0 KA 01 5 0 1 DXOR to x Operation commands Indicates the instruction symbol WXOR DXOR Setting data Data for which exclusive OR will be performed or head number of device which stores data Operation commands 52 01 Head number of device which will store th
89. lt gt gt lt lt eene nennen 6 4 6 1 2 32 bit data comparison D D lt gt D D lt D 6 6 6 2 Arithmetic Operation 1 4 ennt 6 8 6 2 1 BIN 16 bit addition subtraction P 6 10 6 2 2 BIN 32 bit addition subtraction D D P D 6 13 6 23 BIN 16 bit multiplication division P 6 16 6 2 4 BIN 32 bit multiplication division D D P D 6 19 6 25 BCD 4 digit addition subtraction B B P B 6 22 6 2 6 BCD 8 digit addition subtraction DB DB P DB 6 25 6 2 7 BCD 4 digit multiplication division B B P B 6 28 6 2 8 BCD 8 digit multiplication division DB DB P DB 6 31 6 2 9 16 bit BIN data increment decrement INC INCP DEC 6 34 6 2 10 32 bit BIN data increment decrement DINC DINCP DDEC 6 36 6 3 BCD o BIN Conversion Instructions ssesssssssssssseseseeeeee eene nnne en 6 38 6 3 1 BIN data gt BCD 4 8 digit
90. module data are different from those at power on The module including the special function module is incorrectly loaded or has been removed or a different unit has been loaded 1 Among special registers D9116 to D9123 the bit corresponding to the module of verify error is 1 Therefore use peripheral equipment to monitor the registers and check for the module with 1 and make replacement When the present unit arrangement is OK perform reset with the reset switch FUSE BREAK OFF Checked continuously Stop or Continue set by para meter A fuse is blown in an output module Check the fuse blown indicator LED of output module and change the fuse of module of which LED is on Among special registers D9100 to D9107 the bit corresponding to the unit of fuse break is 1 Replace the fuse of a corresponding module Monitor and check it The external output supply for AnS output load is not turned off or not connected Check if the external power supply for output load is turned on or off CONTROL BUS ERR Checked at the execution of FROM and TO instructions FROM and TO instructions can not be executed Error of control bus with special function module Since this is a hardware error of a special function module CPU module or base unit replace the module and check the defective module consult Mitsubishi representative
91. px 1 52 le e O 6 19 S141 51 x 52 1 S2 BN gt D 3 D 2 D 1 D 51 s2 D aai is D P 2 e O 6 19 multipli 2 cation S D 11 6 19 li iT D S1 2 D division 2 51 1 51 S241 52 gt Quotient 0 1 D D P fI giao Remainder D 3 D 2 A elo 6 19 Bt S D 7 6 22 D S gt D A B P B P 5 D 7 e 6 22 Bt s 52 D 6 22 51 52 2 D BCD 2 s 52 adigt 2 P 9e 6 22 addition 3 subtrac Q _ tion 8 B S ape Ma 6 22 D S 2 D 3 B P B P 5 D 6 22 B s s 52 9e O 6 22 51 S2 gt D 1 52 9 e O 6 22 DB DB 5 6 25 0 1 0 5 1 S BCD 0 1 D DB P S D 2 PB 9 6 25 addition subtrac Q m tion Q DB s 52 6 25 S141 51 52 1 52 0 1 D DB P DB P 51 52 6 25 DB DB S 91 O 6 25 D 1 D S 1 S BCD 0 1 D p DB P S D 2 DBP 9 6 25 addition subtrac Q z tion Q DB DB 81 2 D 11 e 6 25 S141 51 S241 S 0 1 D DB P DB P 51 52 D 11 6 25 1 For the number of steps when extension devices are used or when index
92. 1 Five or more network modules have been installed 2 A total of five or more of network modules and data link modules have been installed 1 Reduce the number to four or less 2 Reduce the total number to four or less An invalid base module is used Failure of base module hardware Use an available base module Replace the failed base module SP UNIT ERROR Checked at execution of the FROM TO instruction or the dedicated instructions for special function modules Stop or Contin ue set by param eter Module specified by the FROM TO instruction is not a special function module Read the error step using a peripheral device and check and correct contents of the FROM TO instruction of the step 1 Module specified by the dedicated instruction for special function module is not a special function module or not a corresponding special function module 2 A command was issued to a CC Link module with function version under B 3 A CC Link dedicated command was issued to a CC Link module for which the network parameters have not been set 1 Read the error step using a peripheral device and check and correct contents of the dedicated instruction for special function modules of the step 2 Replace with a CC Link module having function version B and above 3 Set the parameters MELSEC A 9 ERROR CODE LIST
93. 7 28 fads SHITE INSUUCTIONS bud o dd Ree e ede ke Ex AME NEAR PER Hue 7 30 7 3 1 16 bit data n bit right shift left shift SFR SFRP SFL 7 31 7 3 2 n bit data 1 bit right shift left shift BSFR BSFRP BSFL BSFLP 7 33 7 3 8 n word data 1 word right shift left shift DSFR DSFRP DSFL DSFLP 7 35 TA Data Processing Instructions ete t ete ati ae tere bee hte ceste 7 37 7 4 1 16 bit data search SER SERP 7 38 7 4 2 16 32 bit data bit check SUM SUMP DSUM DSUMP 7 40 7 4 8 8 o 256 bit decode encode DECO DECOP ENCO 7 42 7 4 4 segment decode 7 44 7 4 5 Word device bit set reset BSET BSETP BRST 7 46 7 4 6 16 bit data dissociation association DIS DISP 7 48 7 4 7 ASCII code conversion ASC sse ener nennen nnns 7 51 cene ra 7 53 7 5 1 FIFO table write read FIFW FIFWP 7 54 7 6 Buffer Memory Access Inst
94. 7 APPLICATION INSTRUCTIONS MELSEC A 7 4 5 Word device bit set reset BSET BSETP BRST BRSTP Applicable All CPUs CPU Available Device gt z S oo eix iss 5 Bit device Word 16 bit device Constant Pointer Level 9 3 9 28 M9012 M9010 M9011 D OjO O 0O O 0 0O 0 O n Set reset commands 1 Indicates the instruction symbol BSET BRST Setting data Device number for bit set reset Bit number for bit set reset Functions 1 Sets 1 the n th bit of word device specified at D 2 For n 0 to 15 are effective When 15 is exceeded the instruction is executed at the lower four bits P K 010 6 bIS4bEAS Upon einem uela C JETER bl Before execution D10 1 1 After execution D10 1 1 1 1 1 Resets 0 the n th bit of word device specified at D 2 For n 0 to 15 are effective When 15 is exceeded the instruction is executed at the lower four bits K BRST 010 11 BLS Bias s sos Epi dies ttc reg a er elo to eres bl Before execution D10 teac 1
95. Coding 0 LD X00A 1 WANDP 10 033 6 MOVP D33 K3Y030 11 END b15 614 b13 b12 611 b10 69 68 b7 1 1 1 0 0 WAND 1 X18 X17 0 Set to 0 3 Program which performs logical product of the data of X10 to 1B and the data of D33 and sends the result to the Y30 to 3B when XA turns on Coding X00A P K3 0 LD X00A 0L L WAND X010 033 Y030 1 WANDP K3X010 D33 K3Y030 8 END 1 X1A X19 X18 X17 X16 X15 X14 X13 X12 X11 1 0 0 1 1 0 0 1 WAND 0 b8 1 0 0 1 0 0 1 0 0 0 0 a Do not change 7 APPLICATION INSTRUCTIONS DAND MELSEC A 1 Program which performs logical product of the 24 bit data of X30 to 47 and the data of D99 and 100 then transfers the result to the M80 to 103 when X8 turns on X008 P 0 DAND _ DMOV e Coding 0 LD K6 X030 D99 X008 D99 K6 M80 1 DANDP K6xX030 099 10 DMOVP D99 17 END K6M80 b31 b30 b29 b28 b27 Logical product of the data of X30 to47 and the data of D99 and 100 is performed and the result is stored into D99 and 100 Data of D99 and 100 is transferred to the M80 to 103
96. Device number b15 b14 b13 D9232 In the above table F indicates a forward loop line and R a reverse loop line The bit corresponding to the station number at which the forward or reverse loop error has occurred becomes 1 Example When the forward loop line of station 5 has an error bit 8 of D9232 become 1 and when D9232 is monitored its value is 256 100 Stores the number of times the following transmission errors have been detected CRC OVER AB IF Count is made to a maximum of FFFFu RESET to return the count to 0 APP 37 APPENDICES MELSEC A 2 Link special registers only valid when the host station is a local station Table 1 6 Link Special Register List Own station number Stores a station number SC 5 09243 Allows local station to confirm its own station number check 0 to 64 Total number of slave Stores the number of slave stations station Indicates the number of slave stations in one loop Stores the number of times the following transmission errors have Number of receive been detected CRC OVER AB IF s Total number stored error detection times Count is made to a maximum of FFFFu RESET to return the count to 0 Stores the local station number which is in STOP or PAUSE mode Stores the status of stations 1to 16 Local station operating status Device B
97. Program which displays ABCDEFGHIJKLMNOP at the LED indicator on the CPU front when XC turns on X00C _ _ 0 LEDA ABCDEFGH LEDB IJKLMNOP Coding 0 LD X00C 1 LEDA ABCDEFGH 14 LEDB IJKLMNOP 27 END REMARKS First half 8 characters are specified Last half 8 characters are specified The second eight of the 16 characters displayed by the LED instruction will disappear if the first eight are rewritten by the LEDA instruction The first eight characters will disappear if the second eight are rewritten by the LED instruction 7 104 7 APPLICATION INSTRUCTIONS MELSEC A 7 9 4 Annunciator reset instruction LEDR All CPUs In the case of the CPU modules which have an LED indicator on its front side pressing the INDICATOR RESET switch executes the processing same as that called by the LEDR instruction o Available Device gt a pr 83 EG Bit device Word 16 bit device Constant Pointer 9 a o Q W R Ao 2 v K H P 1 5 m9012 m9010 m9011 1 Reset instruction Reses of the CPU annunciator display and the self diagnosis error display When there is a self diagnosis error though the CPU can continue the operation Reset the ERROR LED or error display on the front of the CPU when the self diagnosis error is
98. The number of steps is 11 when 2 word data is written by the DTO P instruction Example 2 2 So e 2 5 gt 8 xix xix 9g lt X lt lt 2 lt lt lt a aio X000 X010 X020 X030 040 060 Y080 Y090 to to to Lo to to to to XOOF 1 X02F 05 O7F 08 09 ag Head I O number to be written or H4 Write command OFF Executed Executed gt lt gt gt Executed Executed only once only once In the following cases operation error occurs and the error flag turns on e Access cannot be made to the special function module The I O number specified at n1 is not a special function module n3 points which begin with the device specified at D exceeds the specified device range TO Program which sets three channels to the address 0 of buffer memory of A68AD loaded I O numbers 040 to when X20 turns on Coding X000 P H K K K LD X000 oTo 0004 0 1 TOP Ho004 KO Ki 10 END DTO The following program writes D1 value to A68AD loaded in numbers 040 to 05F buffer memory address 0 and D2 value to address 1 when is switched on Coding X000 P H K K LD X000 DT 4 Di 1 x 20004 50 H 1 DTOP H0004 KO DI Ki 12 END If a TO instruction is executed for a special function module frequently in a short scan time the
99. e In addition to the ASCII code a strobe signal 10 msec ON 20 msec OFF is also output from the device specified at D 8 Until the execution of sending the ASCII code of 16 characters after execution of the PR instruction the PR instruction execution flag device D 9 is ON Multiple PR and instructions can be used In such a case however provide interlock by use of the PR instruction execution flag contact of device 0 9 so that the instructions may not turn on at the same time 7 APPLICATION INSTRUCTIONS MELSEC A 2 ASCII code output up to 00H code Unusable with the An and 1 The number of points used for the output module is 10 points which start at the Y number specified at D Device which store ASCII code Upper 8 bits Lower 8 bits Output Y D Defines ASCII code output end of Printer or ASCII indicator string Sequence Strobe signal output program PR instruction execution flag used for interlocking 2 480ms is required to transmit 16 codes as each code is transmitted 30ms by the output module 16 x 30ms 480ms The PR instruction performs processings during 10ms interrupts in order of data output strobe signal on strobe signal off Any other instruction is executed between the processings 2 In addition to the
100. n multipli cation division 51 52 D A ni 51 S2 2 Quotient D Remainder D 1 51 52 1 For the number of steps when extension devices are used or when index qualification is performed to bit devices AnA A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 1 2 The A mark in the Index column indicates that index qualification can be performed with the AnA A2AS AnU QCPU A A Mode and A2USH board only 3 The A mark in the Subset column indicates that subset processing can be performed with the A3H AnA A2AS AnU QCPU A A Mode and A2USH board only 2 10 2 INSTRUCTIONS MELSEC A Table 2 11 Arithmetic Operation Instruction Continue 1 E x 9 5 posing Symbol Contents of Processing tion Con 8215 Applicable CPU Page y dition 5 25 Dx
101. read R terminals ui DFRO 91 Dedicated to A2C and A52G 7 63 mi n DFROP 1 2 D 3 DFROP Dedicated to A2C and A52G 7 63 PRC m n 1 For the number of steps when extension devices are used or when index qualification is performed to bit devices for AnA A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 1 2 The A mark in the Index column indicates that index qualification can be performed with the AnA A2AS AnU QCPU A A Mode and A2USH board only 3 The A mark in the Subset column indicates that subset processing can be performed with the A3H AnA A2AS AnU QCPU A A Mode and A2USH board only 2 INSTRUCTIONS MELSEC A Table 2 22 Buffer Memory Access Instructions 1 E x 9 Classi Instruction Symbol Contents of Processing tion Con 2 Applicable CPU Page fication 2 Symbol diti EZ 5 25 ale Dedicated to and A52G 7 67 5 1 po 2 s TENE 9 Dedicated to A2C and A52G 7 67 Date Writes data from remote write mss us terminals le Dedicated to and A52G 7 67 2
102. 1 1 5 2 09010 Jump commands Setting data p Pointer number of jump destination PO to P255 Jump destination pointer number Label P255 indicates END and cannot be used as a label Functions cu 1 Executes the program of specified pointer number when the jump command is on Executes the program of the next step when the jump command is off 2 ON Jump command dp i Executed per scan lt SCJ 1 Executes the program of specified pointer number starting at the next scan when the jump command changes from off to on Executes the program of the next step when the jump command is off or changes from off to on 2 ON Jump command pu D SCJ 1 scan Executed per scan gt gt 6 BASIC INSTRUCTIONS MELSEC A JMP 1 Executes the program of specified pointer number unconditionally Consider the following when the jump instructions are used 2 Even if the timer of which coil is on is jumped by the CJ SCJ or JMP instruction after the coil of timer is turned on the timer continues counting 3 If the OUT instruction is jumped by CJ SCJ or JMP coil status is held unchanged 4 When a jump is made to a memory location by CJ SCJ or JMP the scan t
103. 2 Basic instruction Table 2 5 Instruction Processing Time of CPUs Processing Time us AnN A3V A73 A3N board D Other Other than X Y than X Y 70 2 8 62 1 8 66 3 2 157 157 A3H Instruction Condition ORD LD lt gt AND lt gt OR lt gt LDD lt gt ANDD lt gt ORD lt gt LD gt AND gt OR gt LDD gt ANDD gt ORD gt LD gt R Refresh mode D Direct mode With an processing time will be 20 us longer than the indicated time APP 70 APPENDICES MELSEC A Table 2 5 Instruction Processing Time of CPUs Processing Time us Instruction Condition S ASN board oar aqu Aau D D eno XY an y XY 4 50 72 44 45 59 1 6 1 6 9 2 2 8 2 1 PSD 72 44 45 59 1 6 1 5 9 2 2 8 2 1 D SD 110 69 69 90 3 0 3 0 18 4 0 3 0 D P SD 110 69 69 90 3 0 3 0 18 4 0 3 0 51520 112 77 77 103 1 8 1 8 13 3 2 2 4 5152 0 112 77 77 103 1 8 1 8 13 3 2 2 4 D 1 2 D 140 99 99 246 3 0 3 0 26 4 6 3 5 0 1 52 D 140 99 99 246 3 0 3 0 26 4 6 3 5 SD 74 45 45 59 1 6 1 6 9 2 2 8 2 1 PSD D SD D PSD S1 S2 D P S1 S2 D D S1 S2 D D P S1 S2 D S1 S2 D S1 S2 D D S1 S2 D D P S1 S2 D S1 S2 D P S1 S2 D D S1 S2 D D P S1 S2 D INC INCP DINC DINCP DEC DECP DDEC DDECP B S
104. 38 APPENDICES MELSEC A APPENDIX 2 OPERATION PROCESSING TIME The operation processing time of each instruction is shown in the tables on the following pages The operation processing time differs depending on values in the source and destination Use the values in the tables as a guide to processing time 1 Processing time varies depending on the I O control mode used with any instruction operating on inputs or ontputs 2 The processing time for each instruction is shown for refresh mode The refresh processing time after END can be calculated as follows Sequence program processing time instruction processing time END processing time refresh processing time Obtained from the list END processing time END instruction processing time T C processing time at END Refresh processing time e For AnN A3V A73 or A3N board Refresh processing time Input points Output points 16 x 5 4 usec For A0J2H Refresh processing time Number of modules used x 50 usec For A2C Refresh processing time 12 x Input stations 9 4 x Output stations 11 6 x Total stations usec For A2AS AnU and QCPU A A Mode Refresh processing time Input points xp Output points x sec 16 16 n1 and n2 are as shown below For A2A A2AS and A2U For and A4U For A2USH S1 For 002 For Q02H and Q06H APP 39 APPENDICES
105. D33 D 2 Upper 4 digits Lower 4 digits Upperd gits Lowerdigjts Quotient Remainder 5 A 0 0 0 0 0 0 4 5 0 1 2 3 3 6 0 8 In regards to the operation result the quotient and remainder are stored by use of 64 bits Quotient BCD 8 digits Stored to the lower 32 bits Remainder BCD 8 digits Stored to the upper 32 bits 3 D will not store the remainder of the division result if it is a bit device Execution Conditions Multiplication division on commands OFF Executed Executed per scan per scan mmmH gt lt Executed __ Executed only once only once Operation Errors In the following cases operation errors and the error flag turns on A value other than 0 to 9 exists in any digit of 51 52 The divisor S2 is 0 6 BASIC INSTRUCTIONS DB Program Examples MELSEC A Program which performs multiplication of the BCD data 68347125 and 573682 and stores the result to D505 to 502 and at the same time outputs the upper 8 digits to Y30 to 4F M9036 P o H Hoe H H Coding 68347125 00573682 0502 M9036 T 1 DB P H68347125 H00573682 D502 DMOV D504 Y030 12 DMOV D504 K8Y030 19 END 3 4 7111215 517131682
106. X00C P H DMOV 80000000 Before execution After execution Progress L 3 931 b30 529 Coding 0 LD X00A 1 DMOVP H80000000 8 LD X00C 9 DROLP 12 END BO 1 0 Carry flag M9012 n 1 AO Contents of B31 before execution Contents of B31 when n 1 Contents of B31 when n 2 Program which rotates the contents of AO and 1 three bits to the left when XC turns DRCL on X00A P H 0 DMOV 80000000 A0 X00C PK 8 DRCL 3 Before execution After execution b31 b30 029 b2 Al A 8 b27 Coding 0 1 X00A 1 DMOVP H80000000 8 LD X00C 9 DRCLP 12 END 916 b15 M9012 0 0 0 0 0 1 o gt o n 2 2 n 3 0 0 0 0 0 0 Before execution flag is either 1 0 7 APPLICATION INSTRUCTIONS 7T 3 Shift Instructions Classification Right shift The shift instructions perform the shifting of data Instruction Symbol Ref Page Classification Left shift In
107. cting s th master station of derives delectis parameter error or a remote station contains an invalid I O assignment eror the bit corresponding to the station number becomes 1 Son paranan Example When local station 5 and remote I O station 14 detect an mismatched or remote Stores the status of stations error bits 4 and 13 in 09220 become 1 and when 09220 is monitored its value is 8208 2010 APP 36 APPENDICES Table 1 5 Number Initial communication between local or remote I O stations D9224 Initial communication between local or remote I O stations Initial communication between local or remote I O stations Initial communication between local or remote I O stations Local or remote I O station error Local or remote I O station error Local or remote I O station error Local or remote I O station error Local or remote I O station loop error Local or remote I O station loop error Local or remote I O station loop error Local or remote I O station loop error Local or remote I O station loop error Local or remote I O station loop error Local or remote I O station loop error Local or remote I O station loop error Number of receive error detection times Stores the status of stations 1 to 16 Stores the status of stations Stores the status of stations 49 to 64 Stores the status of stations 1 to 16 Stores the status of stations 17
108. instruction was included in the program and executed though no sub program was provided Read the error step using a peripheral device and delete the CHG instruction circuit block 1 LEDA B IX and LEDA B 1 instructions are not paired 2 There are 33 or more sets of LEDA B IX and LEDA B IXEND instructions 1 Read the error step using a peripheral device check contents and correct program of the step 2 Reduce the number of sets of LEDA B IX and LEDA B IXEND instructions to 32 or less 9 ERROR CODE LIST MELSEC A Table 9 4 Error Code List for the AnU A2AS and A2USH board Continue Detailed Prror Error CPU Error Massage Code Error and Cause Corrective Action D9008 Code States D9091 CHK FORMAT Instructions including NOP other Check the program of the CHK ERR than LDX LDIX ANDX and instruction and correct it referring to Checked at ANIX are included in the contents of detailed error codes STOP PAUSE instruction circuit block RUN Multiple CHK instructions are given The number of contact points in the CHK instruction circuit block exceeds 150 The LEDA CHK instructions are not paired with the LEDA CHKEND instructions or 2 or mor
109. 1 1 0 1 1 1 1 1 After execution D10 KIA rd iall a d 0 0 m Set to 0 7 APPLICATION INSTRUCTIONS MELSEC A Execution Conditions ON 4 Set Reset command OFF Executed Executed per scan per scan EP gt m Executed le Executed Program Example BEST BRST only once only once Program which sets the 3rd bit and 8th bit of D19 when X18 turns on X00B P 01 BRST 08 X00B 08 Coding 0 LDI X00B 1 BRSTP 8 LD X00B 9 BSETP D8 16 END Before execution After execution K8 K3 The 8th bit of D8 is reset The 3rd bit of D8 is set 7 APPLICATION INSTRUCTIONS MELSEC A 7 4 6 16 bit data dissociation association DIS DISP UNI UNIP All CPUs Available Device gt z gt 2 gg E Bit device Word 16 bit device Constant Pointer Level 8 E 9 2 X 5 B F T D 1 2 K H P 1 5 M9012 M9010 M9011 S 0 0 0 0O 0O0 0O 0O 0O 0O DIS 0 K1 to O 5 4 UNI D OjO O O O 0O 0O 0O O n Indicates the instruction symbol Pus D
110. 160 8 125 4 contacts APP 60 APPENDICES MELSEC A Table 2 3 Instruction Processing Time of Small Size Compact CPUs Processing Time us A2USH S1 A2AS 51 A2USH A2C A52G 2 A1FX Instruction Condition board Refresh Refresh Refresh Refresh Refresh rie Refresh Mode Mode Mode Mode Mode Other than X 2 38 15 55 204 164 204 203 243 69 5 n 2 38 15 55 204 164 204 203 243 69 4 BSETDn n 5 9 6 4 37 112 90 112 112 17 7 5 9 6 4 37 112 90 112 112 17 5 BRST D n n 5 9 6 4 37 121 97 121 120 18 7 BRSTPDn n 5 9 6 4 37 121 97 121 120 18 7 UNISDn n 1 31 14 27 163 131 163 163 21 5 8 Dn 1 31 14 27 163 131 163 163 21 5 01 Dn n 1 25 11 37 192 154 192 191 28 1 DISPSDn n 1 25 11 37 192 154 192 191 28 1 ASC 3 4 1 55 150 120 150 150 150 23 1 FIFW 20 9 19 126 101 126 126 154 55 8 FIFWP 20 9 19 126 101 126 126 154 20 5 FIFR 69 32 45 147 118 147 147 167 40 3 FIFRP 69 32 45 147 118 147 147 167 40 3 LRDP n1 0 LWTP n1 2 RFRP n1 n2 D n3 RTOP n1 n2 S WDT WDTP 1 condition contact 50 condition CHK contacts Fault check instruction 100 condition contacts 150 condition contacts APP 61 APPENDICES MELSEC A Table 2 3 Instructio
111. 2 When the A3N A73 A3V and A3N board are used the CHG instruction is only executed on the leading edge of its input condition Since M9050 is not provided execution contents of the CHG instruction are always same The following program is written before END or FEND of the main and subsequence programs Input condition X000 Interlock Timing chart X0 CHG instruction execution in main sequence program Main sequence program Subsequence program instruction execution in subsequence program No switching between the main and subsequence programs 4 5 11 Operation depending The main sequence program is only switched to the subsequence program then back to the main sequence program on the first leading edge of the CHG instruction execution command 2 on ON OFF of XO Switched between the main and subsequence programs 1 6 12 Remarks When the CHG instruction is executed END processing e g timer timing counter counting WDT reset is performed for the current program and operation is started from step 0 of the other program 6 BASIC INSTRUCTIONS MELSEC A 3 When the AnA A3U 40 and QO6H are used the CHG instruction is executed repeatedly while its input condition is on Ladder example The following program is written before END or FEND
112. 207 211 69 52 ne 12 1 190 190 190 228 228 228 42 32 n2 32 190 190 190 228 228 228 42 32 A 200 200 200 236 236 236 49 37 n2 32 446 446 446 415 415 415 89 66 RFRPnin2D n3 1 172 172 172 183 183 183 32 24 n3 n3 32 172 172 172 183 183 183 32 24 nines n3 1 176 176 176 185 185 185 34 26 n3 n3 32 176 176 176 185 185 185 34 26 WDT 64 64 64 49 49 49 5 0 3 8 WDTP 64 64 64 49 49 49 5 0 3 8 771 771 282 282 282 33 25 contact CHK sas I 3380 3380 2210 2210 2210 1257 943 Fault check instruction ex 6887 6887 4180 4180 4180 2503 1877 contacts 10137 10137 6140 6140 6140 3753 2815 contacts R Refresh mode D Direct mode With an A3M processing time will be 20us longer than the indicated time APP 76 APPENDICES MELSEC A Table 2 6 Instruction Processing Time of CPUs Processing Time us AnN A73 A3A ASH A2U AAU Instruction Condition D D D R Other R Other R R than X Y than X Y X Y X Y Only SLT device 8448 8448 8448 4100 4100 4100 2915 2186 memory Device SLT memory 24598 24598 24598 10400 10400 10400 9996 7497 R SLTR 29 29 29 53 53 53 6 6 5 0 STRA 30 30 30 52 52 52 5 0 3 8 STRAR 28 28 28 52 52 52 5 0
113. 3 For 1 to 4 can be specified 4 When n is 0 no processing is performed and the contents of device of D do not change Execution Conditions ON Di iation gt issociation association OFF commands Executed Executed per scan per scan lt Executed Executed only once only once Operation Error In the following case operation error occurs and the error flag turns on e n is other than 0 to 4 Program Examples DIS Program which stores the 16 bit data of DO to the D10 to 13 per four bits when XO turns on Coding X000 P K 0 LD X000 DIS DO 010 4 0 1 DISP DO D10 K4 10 END Before execution After execution UJDI2DIL 2 bbb ba S 1 100 0 0 0 Set to 0 Storage area 7 APPLICATION INSTRUCTIONS MELSEC A UNI Program which stores the lower four bit data of DO to 2 to the D10 when XO turns on xod Coding P K 0 LD X000 2400 1 UNIP DO D10 K3 10 END Before execution After execution b4 b3 b2 bl 12011 b8b7 1 1 1 0 1 0 0 1 Data to be associated 7 APPLICATION INSTRUCTIONS MELSEC A 7 4 7
114. 3 4 Instruction Structure 1 Many instructions may be divided into an instruction part and a device as follows part Indicates the function Device Indicates the data for use with that instruction 2 The instruction structure may be largely classified as follows with the instruction part and device s combined a Instruction part Retains the device status and mainly controls the program Example END FEND g Instruction part device Switches the device on off controls the execution condition in accordance with the device status branches the program etc Example LD XO Device Instruction part C Instruction part Source device Destination device Operation is performed using the Example destination data and source data Exclu and the operation result is stored Destination device to the destination Source device Instruction part i Instruction part Source 1 device Source 2 device Destination device Lis Operation is performed Example using the source 1 data po 010 and source 2 data and the L Destination device operation result is stored ________ Source 2 device i i Source 1 device to the destination gt Instruction part e Others
115. 4 OUT T3 T CY066 END Before change YO16 Coding X000 0 LD OUT Changed to NOP Changed to LD T3 LD AND OUT END V Coding DOW 1 0 Y16 2 3 LD T3 4 OUT 3 Y66 5 END X000 Y016 X056 T003 066 X000 Y016 T003 066 X0 Y16 X56 Y66 X0 Y16 T3 Y66 5 SEQUENCE INSTRUCTIONS NOPLF Not displayed in the ladder mode Cording X000 K 0 LD X000 1 030 1 MOV K1 D30 NOPLF 6 M MOV 2 040 7 7 K2 D40 1 1 ed n 12 NOPLF 13 040 18 LD X001 14 OUT Y040 15 END The NOPLF instruction in the ladder block is ignored Not printed by ladder printing K MOV 2 D40 gt Page is changed when the NOPLF instruction is given at the end of a ladder block Not printed by ladder printing CIRCUIT END gt Page is changed after NOPLF is printed 6 BASIC INSTRUCTIONS 6 BASIC INSTRUCTIONS MELSEC A The basic instructions are instructions which are capable of handing numeric data expressed in 16 bits and 32 bits and are classified into the following instructions Classification of Basic Instructions Description Ref Page Comparison operation instruction Comparison such as gt and 6 2 Additi
116. A special function module is assigned in place of an I O module or vice versa at I O assignment of parameters on peripheral devices The input output modules or special function modules are loaded at the input output numbers exceeding the number of input output points or GOT is connected via bus line Access execution of FROM to instruction has been made to a location where there is not special function unit Reduce the computer link modules to two or less Reduce the data link modules to one or less Reduce the interrupt module to one Re set the assignment of parameter setting by use of peripheral devices according to the actually loaded special function module Review the input output numbers and remove the modules at the input output numbers beyond the number of input output points or GOT Read the error step by use of peripheral equipment and check and correct the content of FROM or instruction at that step LINK PARA ERROR Continue 1 If a data link CPU is used to set a master station station number 00 The contents written to the parameter area of link by setting the link range in the parameter setting of peripheral devices are different from the link parameter contents for some reason Or link parameters are not written The setting of the total number of Slave stations is 0 1 Write parameters again and make check Check setting
117. A2AS QCPU A A Mode A2C 2 AnS AnSH A1FX and A52G Usable with AnN and AnA which are compatible with SFC For the AnN and AnA which are compatible with SFC refer to the MELSAP II Programming Manual APP 21 APPENDICES Table 1 4 eer Register List Continue Stores the step number in which error 84 occurred in the side umberimwish SFC program in BIN code D9052 step Stores 0 when errors 80 81 and 82 occurred an error occurred Stored the block starting step number when error 83 occurred Transfer condition Stores the transfer condition number in which error 84 D9053 Error transfer number in which an occurred in the SFC program in BIN code error occurred Stored 0 when errors 80 81 82 and 83 occurred Sequence step number Stores the sequence step number of transfer condition D9054 3 in which an error and operation output in which error 84 occurred in the step occurred SFC program in BIN code Stores the step number when status latch is executed Stores the step number in a binary value if status latch 15 executed in a main sequence program Higher 8 bits xe esie argue ance step number prog Block No Step No BIN BIN Lower 8 bits i in July 1998 Manufactured in July 1998 Manufactured in July 1998 S W version Y A2USCPU 51 Manufactured in July 1998 S W version E A2USHCP 1 USHCPU
118. A2C 2 5 AnSH A1FX and A52G APPENDICES Table 1 4 Bit pattern in units of 16 points of verify error units MELSEC A Special Register List Applicable CPU When modules of which data are different from those entered at power on have been detected the I O unit numbers in units of 16 points are entered in bit pattern Preset I O unit numbers when parameter setting has been performed 1514131211109 87 6 54 32 10 Usable with all 09116 types of CPUs 09117 Only remote D9123 o I O station t Indicates module verify error information is valid for A2C module verify check is executed also to remote I O station modules If normal status is restored clear is not performed Therefore it is required to perform clear by user program 1 I O module verification error Annunciator detection quantity Bit pattern of verification error module Annunciator detection quantity When an I O module different from the I O module data registered during power on is detected this register indicates the bit pattern of the I O module number b15 b8 b7 66 65 b4 63 b2 b1 60 D9116 0 0 is fixed 0 L
119. CHK D1 D2 instruction is different from that of the contact point before the CJ instruction Index qualification is used in the check pattern circuit 1 Multiple check pattern circuits of the LEDA LEDA CHKEND instructions are given 2 There are 7 or more check condition circuits in the LEDA CHK LEDA instructions 3 The check condition circuits in the LEDA CHK instructions are written without using X and Y contact instructions or compare instructions 4 The check pattern circuits of the LEDA LEDA CHKEND instructions are written with 257 or more steps Corrective Action Check the program of the CHK instruction and correct it referring to contents of detailed error codes CAN T EXECUTE Checked at occurrence of interrupt The IRET instruction was given outside of the interrupt program and was executed Read the error step using a peripheral device and delete the IRET instruction There is no IRET instruction in the interrupt program Check the interrupt program if the IRET instruction is given in it Write the IRET instruction if it is not given Though an interrupt module is used no interrupt pointer I which corresponds to the module i
120. Combination of a to d 3 INSTRUCTION STRUCTURE MELSEC A 1 Source S 1 Source data is used for operation 2 Source data depends on the device specified as follows e Constant Specify the numeric value used for the operation This value is set while the program is being written and cannot be changed during run of the program Bit device word device Specify the device which stores the data used for the operation Hence the data must be stored to the specified device before the operation is initiated By changing the data to be stored to the specified device during program run the data used with the instruction can be changed 2 Destination D 1 Stores data after operation is performed When the instruction consists of instruction part source device destination device the data used for the operation must be stored to the destination before the operation is started 2 The device for storing data must be specified at the destination REMARK 1 In this manual the sources and destination are represented as follows Source S Source 51 Source2 S2 Destination D 3 INSTRUCTION STRUCTURE MELSEC A 3 2 Bit Processing Bit processing is performed when a bit device X Y M L S B F has been specified Either of 1 bit processing or digit specification processing with 16 bi
121. END processing and link refresh processing COM instruction executed COM instruction executed 0 General data processing General data processing Link refresh Link refresh 3 The COM instruction may be used any number of times in the sequence program In this case note that the sequence program scan time increases the period of general data processing and link refresh times REMARK By general data processing the following processings are performed Communication between the PC and peripheral devices Monitoring of other stations Read of buffer memory of other special function modules using a computer link module 6 BASIC INSTRUCTIONS Execution 1 Data communication using the COM instruction Conditions 1 Example without using the COM instruction Master station program 0 END 0 END 0 END 0 END 0 END 0 END 0 Data communication L 4 Se EN bet 3 Local station program 0 END H0 END H 0 END H 0 Remote station m H i refresh 2 Example using the COM instruction COM COM COM COM COM COM Mast
122. FROM FROMP DFRO DFROP 7 59 7 6 2 Special function module 1 2 word data write TOP 7 61 7 6 3 Remote terminal module 1 and 2 word data read FROM PRC FROMP DFRO PRC DFROP PRO 7 63 7 6 4 Remote terminal module 1 and 2 word data write PRC TOP PRC PRC 7 67 7 6 5 Special module special block 1 2 word data read FROM FROMP DFRO DFROP nennen nnne nennen snnt nnns 7 71 7 6 6 Special module special block 1 2 word data write TO 7 74 7 7 FOR to NEXT Instructions nennen nnne nan 7 77 771 FOR to NEXT FOR enne 7 77 7 8 Local Remote Station Access Instructions nenn 7 79 7 8 1 Local station data read write LRDP LWTP 7 80 7 8 2 Remote I O station data read Write RFRP RTOP 7 86 79 Display Instructions oreet iere ii loniae R 7 92 7 9 1 ASCII code print instructions PR 7 94 7 9 2 ASCII code comment display instructions LED L
123. Final station disagreement number disagreement Dedicated to A2C and A52G Unusable with An A2C and OFF A3M BASIC RUN Specifies enable disable of ASM BASIC execution BASIC program when the is in PAUSE state PAUSE flag ON A3M BASIC disable OFF A3M BASIC is executed Dedicated to A3M ON A3M BASIC is not executed Turns on if the power to the PC side is shut off when OFF Normal the external power supply is connected to the CPU ON Power off board It stays on even after the status becomes normal Turned on when an operation error detail factor is stored at D9091 and remains ON after normal state is restored Power supply problem status on the PC side Dedicated to A2USH board Usable with AnA A2AS AnU and QCPU A A Mode Unusable with AnA A2AS AnU and QCPU A A Mode Operation error OFF No error detail flag ON Error Microcomputer OFF No error Turned on when an error occurred at execution of subroutine call ON Error the microcomputer program package and remains error flag ON after normal state is restored External power Turns on when the external power supplied to OFF Normal supply problem the CPU board is shut off ON Power off status It stays on even after the status becomes normal Duplex power supply overheat error Dedicated to A2USH board OFF Normal Turned on when overheat of a duplex po
124. If the preceding condition is OFF that instruction executes an OFF processing Instruction which is executed during ON Executes instruction only while the preceding condition of that instruction is on When the preceding condition is off that instruction is not executed and not processed Instruction which is executed once during ON Executes instruction only at the positive transition of the preceding condition of instruction i e the condition changes from off to on Thereafter even if the condition is on that instruction is not executed and not processed Instruction which is executed once during OFF Executes instruction only at the negative transition of the preceding condition of instruction i e the condition changes from on to off Thereafter even is the condition is off that instruction is not executed and not processed 7 Indicates the number of steps of each instruction The number of steps which change depending on conditions is indicated in two stages For details refer to each instruction If extension devices are used or index qualification is performed with bit devices in the case of the instructions which need device specification for the AnA A2AS AnU QCPU A A Mode and A2USH board the number of steps increases Refer to Section 3 8 1 for details 8 The mark indicates that the instruction can be indexed 2 V The A mark indicates that the instruction can be inde
125. M2 Link M28 M25 M24 M23 M21 M20 M19 In relay B BO to M44 M41 M40 M39 M37 M35 x U nee e Stores PC operation results and allows read write 8 12 8 MICROCOMPUTER MODE MELSEC A Address Configuration Special relay M 5 Stores device ON OFF data in one bit locations Timer T TO to 255 0 indicates OFF and 1 ON contact Example MO to 47 are as follows Odd address Even address A S Counter b13 b12 611 510 b9 b8 b7 b6 b5 b4 b3 b2 C to 255 contact M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M29 M28 M27 M25 M24 M23 M22 M20 M19 M18 M45 M44 M43 M41 M40 M39 M38 M36 M35 M34 TO to 255 Es Not Stores PC operation results and allows read write o CO to 255 8 13 8 MICROCOMPUTER MODE MELSEC A Address Configuration Data register D Link register W Timer T present value devices consist of two bytes 16 bits Counter Example configuration of DO is as shown below C present value 8800 8800 b7 Special register D Accumu lator A0 1
126. MCR CPU Available Device Bit device Word 16 bit device Constant Pointer M L S D W 1 1 Digit specification D 1 Index qualification can be used with AnA A2AS QCPU A Mode and A2USH board only ON OFF command for MC ___ D lt Device Setting data Nesting NO to 7 Device number to be Nesting NO to 7 turned on Functions The MC instruction is used to allow the sequence program to perform efficient circuit switching by opening and closing the common bus of circuits The figure below shows an example of circuit when the MC instruction is used Circuit in the ladder mode of GPP Actual operation circuit X000 MO H e MC N1 MO 00 M7 X001 X003 7 oy He gt EUM pru eie MS M5 vag XO is ON YO4F Re X6 4 X006 X004 N1 MCR H E X00F Y40 YO10 H When program is written in the ladder mode of GPP it is not necessary to input contacts on the bus Those contacts are displayed automatically by performing conversion 5 SEQUENCE INSTRUCTIONS MELSEC A Functions MC 1 MC is master control start instruc
127. MELSEC A Table 9 5 Error Code List for the QCPU A A Mode Continue Detailed Error Code D9091 Error Code D9008 Error Massage CPU States Error and Cause Corrective Action LINK PARA 47 0 ERROR 470 471 472 473 474 Stop or Contin When using MELSECNET II 1 When the link range at a data link CPU which is also a master station station number 00 is set by parameter setting at a peripheral device for some reason the data written to the link parameter area differs from the link parameter data read by the CPU Alternatively no link parameters have been written 2 The total number of slave stations is set at 0 1 Write the parameters again and check 2 Check the station number settings 3 Persistent error occurrence may indicate a hardware fault Consult your nearest Mitsubishi representative explaining the nature of the problem When using MELSECNET 10 1 The contents of the network refresh parameters written from a peripheral device differ from the actual system at the base unit 2 The network refresh parameters have not been written When using MELSECNET 10 1 The transfer source device range and transfer destination device range specified for the inter network transfer parameters are in the same network 2 The specified range of transfer source devices or transfer destination devices for the inter network transf
128. Pay special attention if the mark is given 4 Circles are given to devices which can be used for instructions b Indicates digits which can be specified when the bit device requires digit specification 6 A circle is given to the instruction which can use index qualification Z or V is added A triangle A is given to the instruction which can use index qualification with some specific types of CPUs 7 A circle is given to the instruction which can turn the carry flag ON 8 A circle is given to the instruction which can turn the error flag ON when operation error occurs 9 Gives notes concerning 4 to 10 above Pay special attention if the O or x mark is given 10 Indicates the format of instructions in ladder mode 11 Described the instruction 12 Indicates the execution conditions of instructions 13 Indicates conditions which result in operation error 14 Describes program examples in ladder mode and list mode REMARK Program display in list mode is as follows LD M9036 1 DBIN K6X020 D9 10 D D9 K10000 D5 21 BIN K4X010 D3 26 MOV 04 31 D D3 D5 DO 42 END L I Step Instruction Devices For the input procedure of the program refer to the Operating Manual of respective peripheral device 5 SEQUENCE INSTRUCTIONS 5 SEQUENCE INSTRUCTIONS MELSEC A Sequence instructions are used for relay control circuits etc and classified as follows
129. SP UNIT DOWN Checked at the execution of FROM and TO instructions When the FROM or instruction is executed access has been made to the special function module but the answer is not given The accessed special function module is defective Since this is an accessed special function module error consult Mitsubishi representative LINK UNIT ERROR The data link module is loaded in the master station Remove the data link module from the master station After correction reset and start from the initialization 9 ERROR CODE LIST Table 9 1 Error Code List for the An AnN A3H A3M A3V A0J2H AnS A2C A73 A52G A1FX and A3N board Continue Error Message Error Code D9008 CPU States Error and Cause Corrective Action INT ERROR 43 Stop Although the interrupt module is not loaded interruption has occurred Since this is a hardware error of a specific module replace the module and check the defective module consult Mitsubishi representative SP UNIT LAY ERROR SP UNIT ERROR Checked at the execution of FROM and TO instructions Stop or Continue set by para meter 1 TO Three or more computer link units are loaded with respect to one CPU module A1SCPU24 R2 is also counted as one unit Two or more data link modules are loaded Two or more interrupt units are loaded
130. Upper 4 digits Lower 4 digits Upper 4 digits Lower 4 digits Upper 4 digitdLower 4 digit 0191817 1 0 6 8 2 x vd E 1 0 1 9 A 50 22 4 gt Digits higher than the specified digit are regarded as 0 2 Performs the addition of BCD data specified at 51 and the BCD data specified at S2 and stores the addition result into the device specified at D1 51 1 51 52 1 52 1 1 Upper 4 digit Lower 4 digits Upper 4 digit Lower 4 digits Upper 4 digit Lower 4 digit 5 6 7 112131 0171 2 3 4 5 6 7 lt gt 5 8 0 2 3 6 9 0 gt Digits higher than the specified digit are regarded as 0 6 BASIC INSTRUCTIONS MELSEC A 3 At S 51 S2 and D 0 to 99999999 BCD 8 digits can be specified 4 Even if the addition result exceeds 99999999 the carry flag does not turn on and the carry digit is ignored DB 1 Subtracts the BCD data specified at S from the BCD data specified at D and stores the subtraction result into the device specified at D D 1 D 5 1 5 D 1 D Upper 4 digits Lower 4 digits Upper 4 digitsXLower 4 digits Upper 4 digits Lower 4 digit 0 9 8 7 1 0 6 8 0 0 3 2 3 4 5 6 gt 0 9 5 4 6 1 2
131. Write command OFF LWTP Executed only once Operation Errors In the following cases operation error occurs and the error flag turns on The station number specified at n1 is not a local station n2 points starting at D exceed the specified device range Specification of n2 is other than 1 10 32 If an LWTP instruction is executed by a CPU which is not for data link or when the mode select switch for the link card is set for OFFLINE no operation error occurs and M9202 LWTP instruction enable flag is set without the LWTP instruction processing 7 APPLICATION INSTRUCTIONS MELSEC A Program Examples LWTP A program to store data of D99 to D104 of the master station in D3 to D8 of the 3rd local station when X3 is ON Use a pulse signal for Provide interlock using If the LRDP instruction is used to the same station this command 1 the LWTP instruction provide interlock using the LRDP instruction execution flag execution flag X003 Ss 0 1 When is ON MO turns ON 4 HH SET MO 19505 179508 M9200 9201 K If the LRDP and LWTP instructions are not being 6 l 5 y y JLWTP 3 03 D9 6 _ executed when MO is ON the LWTP instruction itt oe RM aes for the 3rd station is executed and M9203 is turned ON RST MO At read completion 9202 and M9203 are 2 RST m9202 turned OFF RST
132. Y030 D887 D887 K8Y030 98765400 is stored into D888 and D887 in BCD BCD data 98765400 and 123456 are added and the result is stored into D888 and D887 Data of D888 and D887 is output to Y30 to 4F 6 BASIC INSTRUCTIONS MELSEC A 6 2 7 BCD 4 digit multiplication division B B P B B P All CPUs Available Device 2 gt oo 2 55 ES Bit device Word 16 bit device Constant Pointer Level o 2 5 2 M9012 M9010 M9011 6 K1 to 2 K4 O Indicates the instruction symbol B Setting data Multiplication division commands Multiplicand dividend or head device number stor St 52 D ing multiplicand dividend Multiplier divider or head device number storing multiplier divider 51 Head device number which will store the result Functions 1 Performs the multiplication of BCD data of device specified at 51 and the BCD data of device specified at S2 and stores the result into the device specified at D D 1 D S1 S2 Upper 4 digits Lower 4 digits 6 7 8 0 8
133. address starting with the one specified at n2 of buffer memory in the remote terminal module specified at n1 Remote terminal CPU module buffer memory Device specified at S 0 c to Y n2 132 Ee n3x2 points points REMARK The method for specifying n1 for an A2C is different from that for an A52G as mentioned below 1 A2C Head station number of remote terminal modules is specified at n1 Station Station 1 No 5 AX11C AX11C 4 stations 4 stations Head station number of js N pr remote terminal modules X000 X020 FOOTER to to A2C XO1F 0616 22 Mer 3 4 stations 05 Station Station 17 13 51 A68ADC p 4 stations 4 stations Y080 060 to to YO9F 07F 2 A52G specify n1 with head number of remote terminal module 100 Example When the head number of remote terminal module is 9 specify K109 9 100 3 The bit device specified at D1 is used as a communication complete flag This device turns ON after execution of the END instruction of the scan during which communication processing with a specified remote terminal module is completed and turns OFF after execution of the END instruction of the next scan Step 0 ENDStep 0 END Step 0 END Step 0 END Step 0 Sequence program __________ _____
134. and this is done for each OUT instruction that is executed Since the specified device is turned On or Off when each OUT instruction is executed it results in the device being switched On and Off repeatedly during 1 scan operation Operation in the case of a circuit for switching the same internal relay MO On and Off by inputs and X1 being created is shown in the following figure Circuit gt 1 gt Timing Chart MO goes On because MO goes Off because X1 is Off X1 is On MO goes On because is On remains Off because is Off In the case of a refresh type CPU module if output Y is specified by the OUT instruction the On Off state of the last Out instruction to be executed during 1 scan operation is output 3 INSTRUCTION STRUCTURE MELSEC A 2 If the SET RST instruction is used from the same device a The SET instruction turns On the specified device when the SET command goes On and when the SET command goes Off there is no processing For this reason when the SET instruction is executed multiple times in 1 scan from the same device if even one SET command goes On the specified device goes On b The RST instruction turns off the specified device when the RST command goes On and when the RST instruction goes Off there is no processing For this reason when a RST instruction is executed multiple times in
135. and check if the interrupt program that corresponds to the stored data is provided or if two or more interrupt pointers 1 of the same number are given Make necessary corrections CASSETTE ERROR Memory cassette is not loaded Turn off the PC power and load the memory cassette RAM ERROR Checked at power on OPE CIRCUIT ERROR Check during execution of END process The sequence program storage RAM in the CPU module caused an error The work area RAM in the CPU module caused an error The device memory in the CPU module caused an error The address RAM in the CPU module caused an error The operation circuit for index qualification in the CPU does not work correctly Hardware logic in the CPU does not operate correctly The operation circuit for sequential processing in the CPU does not operate correctly The operation circuit for indexing in the END process check of the CPU does not function correctly Hardware inside the CPU does not function in the END process check of the CPU Since this is CPU hardware error consult Mitsubishi representative Since this is CPU hardware error consult Mitsubishi representative WDT ERROR Checked at execution of END processing Scan time is longer than the WDT time 1 Scan time of the user s program has been extended due to certain conditions 2 Scan time has been
136. are positive or negative is made at the highest bit 631 and that of D at 663 6 19 6 BASIC INSTRUCTIONS MELSEC A D 1 Performs the division of BIN data specified at 81 and the BIN data specified at S2 and stores the division result into the device specified at D Quotient Remainder S131 S1 5231 52 291 D D43 Dj2 b3 bl5 b15 b31 bl6b15 b31 bl6bl15 b16 b0 b16 bo 567890BIN 12345681 gt 4BIN 740680 2 In regards to the operation result the quotient and remainder are stored by use of 64 bits in the case of word device and only the quotient is stored by use of lower 32 bits in the case of bit device Quotient Stored to the lower 32 bits Remainder Stored to the upper 32 bits Storable only in the case of word device 3 At 81 and S2 2147483648 to 2147483647 BIN 32 bits can be specified 4 The judgment of whether the data of 51 S2 D and 0 2 are positive or negative is made at the highest bit D31 Execution Conditions ON Multiplication division command OFF E Executed Executed per scan per scan lt lt gt gt Executed gt Executed only once only once Operation Errors In the following case operation error occurs and the error flag turns on A1 V are specified in 51 52 and AO A1 2 V specified in D T
137. data link network refresh processing and I O processing P 4 a CHG rat L Sequence program Timer counter processing Self diagnostic check general data processing data link network refresh processing and processing E END EN HS Sequence pregram END 2 For further information on functions and applications refer to the use of subprograms given in the ACPU Programming Manual Fundamentals 1 A4U s CHG instruction is used to switch subsequence programs 1 2 and 3 which are set in the main sequence program When up to subsequence program 2 has been set programs are switched as the main sequence program subsequence 1 subsequence program 2 main sequence program Main sequence Subsequence Subsequence program Program 1 Program 2 4 2 To switch specified programs use ZCHG dedicated instruction The AnACPU AnUCPU Programming Manual Dedicated Instructions gives details of the ZCHG instruction 6 BASIC INSTRUCTIONS Execution Conditions MELSEC A 1 When the is used the CHG instruction is only executed on the leading edge of its input condition Since operation result of the input condition changes with status of M9050 execution contents of the CHG instruction change with status of M9050 Status of M9050 OFF ON Ladder example The following program is written before END or FEND of the main and
138. data transfer is possible Transfer to the devices with the lower numbers is executed starting with S and that to the devices with the higher numbers is executed starting with S n 1 The number of S and D digits must be equal when both S and D are bit devices 6 BASIC INSTRUCTIONS MELSEC A FMOV Transfers the content of device specified at S in blocks to n points which begin with the device specified at D D 0 1 0 Transfer D 2 0 5 gt AA lt n D n 3 0 D n 2 0 D n 1 0 Execution Conditions ON e Transfer commands OFF Executed Executed per scan per scan x S Executed __ Executed only once only once Operation Error In the following case operation error occurs and the error flag turns on The transfer range exceeds the corresponding device range 6 BASIC INSTRUCTIONS MELSEC A Program Examples BMOV 1 Program which output the data of the lower 4 bits of D66 to 69 to the Y30 to 3F in units of 4 points Coding K1 K 0 LD M9038 9 E LBMOV 1566 TRE i 1 BMOV D66 K1Y030 4 10 Before execution Transfer source After execution Transfer destination 1 ND 0 1 Ignored 2 Program which outputs the data of X20 to X2F to D100 to
139. fuse of the output module which corresponds to the data I O head number Or monitor special registers D9100 to D9107 using a peripheral device and replace the fuse of the output module of which corresponding data bit is 1 3 Check the ON OFF status of the e xternal power supply for output I oad CONTROL BUS ERR Due to the error of the control bus which connects to special function modules the FROM instruction cannot be executed If parameter assignment is being executed special function modules are not accessible at initial communication At error occurrence the head I O number upper 2 digits of 3 digits of the special function module that caused error is stored at D9011 Since it is a hardware error of special function module CPU module or base module replace and check defective module s Consult Mitsubishi representative for defective modules SP UNIT DOWN Though an access was made to a special function module at execution of the FROM TO instruction no response is received If parameter I O assignment is being executed no response is received from a special function module at initial communication At error occurrence the head I O number upper 2 digits of 3 digits of the special function module that caused error is stored at D9011 Since it is hardware error of the special function module to which an access was made
140. instruction changed to other instruction code due to unknown cause MAIN CPU 26 STOP The main CPU is malfunctioning or Since this is CPU hardware error DOWN faulty consult Mitsubishi representative UNIT VERIFY 31 Stop or Current module information is Read detailed error code using a ERR Contin different from that recognised when the peripheral device and check or replace Checked ue set power was turned on the module which corresponds to the continuously by 1 The module including special data I O head number para function modules connection Or monitor special registers D9116 to meter became loose or the module was D9123 using a peripheral device and disconnected during operation or wrong module was connected check or replace the modules if corresponding data bit is 1 9 ERROR CODE LIST MELSEC A Table 9 5 Error Code List for the QCPU A A Mode Continue Detailed Error Code D9091 Error Code D9008 Error Massage FUSE BREAK OFF Checked continuously CPU States Stop or Contin ue set by param eter Error and Cause 1 There is an output module of which fuse is blown 2 The external power supply for output load is turned OFF or is not connected Corrective Action 1 Check the FUSE BLOWN indicator LED on the output module and replace the fuse 2 Read detailed error code using a peripheral device and replace the fus
141. operate correctly The operation circuit for sequential processing in the CPU does not operate correctly In the END processing check the operation circuit for index qualification in the CPU does not work correctly In the END processing check the hardware in the CPU does not operate correctly Since this is CPU hardware error consult Mitsubishi representative WDT ERROR Checked at execution of END processing Scan time is longer than the WDT time 1 Scan time of the user s program has been extended due to certain conditions 2 Scan time has been extended due to momentary power failure occurred during scanning 1 Calculate and check the scan time of user program and reduce the scan time using the instruction or the like Monitor contents of special register 09005 using a peripheral device If the contents are other than 0 power supply voltage may not be stable Check power supply and reduce variation in voltage END NOT EXECUTE Checked at execution of the END instruction Whole program of specified program capacity was executed without executing the END instructions 1 When the END instruction was to be executed the instruction was read as other instruction code due to noise 2 The END jinstruction changed to other instruction code due to unknown cause Reset and run the CPU again the same error recurs Sin
142. program uses the PLS and PLF instructions in the subroutine and when the ON OFF time of a subroutine execution designation signal is set shorter than the scan time the device designated with D of the subroutine PLS and PLF instructions may sometimes remain turned ON more than 1 scan Execution Conditions Subroutine execution command CALL CALLP X000 oO 4 CALL PO 29 FEND PO M9036 30 PLS PO 35 RET Operation Errors Program Example When the ON OFF time is shorter than the scan time X0 Scan time MO When the ON OFF time is longer than the scan time gt Scan time X0 MO In the following cases operation error occurs and the PC stops operation After the CALL P instruction is executed the END FEND instruction has been executed before executing the RET instruction The RET instruction has been executed before executing the CALL P instruction The label P255 has been called by the CALL P instruction e The JMP instruction was executed to exit from a subroutine before execution of the RET instruction Nesting is of six or more levels 1 Program which executes the subroutine program when X1 changes from off to YO11 013 FEND YO33 YO34 CALL RET on X008 0 X001 2 CALL X009 6 8 P33
143. provided to the head of destination of the CJ SCJ CALL CALLP JMP LEDA B FCALL and LEDA B BREAK instructions or at the label number of the interrupt pointer I provided to the head of an interrupt program Errors other than 101 to 107 mentioned above 9 ERROR CODE LIST Error Massage PARAMETER ERROR Checked at power on and at STOP PAUSE RUN Table 9 4 Error Code List for the AnU 2 5 and A2USH board Continue Error Code D9008 Detailed Error Code D9091 CPU States Error and Cause Capacity settings of the main and sub programs microcomputer program file register comments status latch sampl ing trace and extension registers are not within the usable range of the CPU Total of the set capacity of the main and sub programs file register comments status latch sampling trace and extension file registers exceeds capacity of the memory cassette Corrective Action Read parameters in the CPU memory check the contents make necessary corrections and write them again to the memory Latch range set by parameters or setting of M L or S is incorrect Sum check error Either of settings of the remote RUN PAUSE contact point by parameters operation mode at occurrence of error annunciator indication mode or STOP
144. read MPS MRD 5 9 5 37 Output Instr ctlonis deua 5 14 5 3 1 Bit device timer counter output 1 5 14 5 3 2 Bit device set reset SET RST 5 19 5 3 8 Edge triggered differential output PLS 5 23 5 3 4 device output reverse CHK nennen nnns 5 25 5 4 SSMU InSER GLIOTIS citer reed ree eret caste a dde rae ed ep debt eT E Le s 5 27 5 4 1 Bit device shift SFT 5 27 5 5 Master Control 5 29 5 5 1 Master control set reset MC 5 29 5 6 Termination Instructions eite ete px Er ep ea Ru 5 33 5 6 1 Main routine program termination seeeeeeeneenn nn 5 33 5 6 2 Sequence program termination 5 35 bif 5 37 5 7 1 Sequence program stop 4 5 37 54 2 operation NOB v Peel rto 5 39 BASIC INSTRUGTIONS 5 6 1 6 89 6 1 Comparison Operation Instructions eene nnne nes 6 2 6 1 1 16 bit data comparison
145. reset program WDTP WDTP A 1 O 7 108 Failure Failure D1 ON D2 Failure NO 2 checks CHK CHK D1 D2 Normal D1 OFF D2 0 When 5 A Not applicable to A1FX 7 111 ATN is in the direct mode m At the condition set by parameter 5 Sel SLT SLT setting data are stored into A 1 A Not applicable to A1 and A1N 7 117 memory for status latch a s S Re lt Status latch is reset SI T se SLTR SLTR instruction is enabled A 1 A Not applicable to A1 and A1N 7 117 At the condition set by parameter 5 se STRA STRA setting sampling data are stored A 1 A Not applicable to A1 and A1N 7 119 2 into memory for status latch STRAR SARAR Sampling trace is resumed 1 Not applicable to A1 and A1N 7 119 se STRA instruction is enabled STC PM NS Carry flag contact M9012 is 1 7421 turned on _ 5 5 re Re Aj Carry flag contact M9012 is in turned off 1 7 121 Timing clock shown below is ae 2 Timing _ clock 2 DUTY DUTY 11 2 7 7 123 1 For the number of steps when extension devices used or when index qualification is performed to bit devices for AnA A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 1 2 The A mark in the Index column indicates that index qualification can be performed with the
146. the dedicated instructions for special function modules Table 9 4 Error Code List for the AnU A2AS and A2USH board Continue Error Code D9008 Detailed Error Code D9091 CPU States Stop or Contin Error and Cause Module specified by the FROM TO jinstruction is not a special function module Corrective Action Read the error step using a peripheral device and check and correct contents of the FROM TO instruction of the step 1 Module specified by the dedicated instruction for special function module is not a special function module or not a corresponding special function module A command was issued to a CC Link module with function version under B A CC Link dedicated command was issued to a CC Link module for which the network parameters have not been set 1 Read the error step using a peripheral device and check and correct contents of the dedicated instruction for special function modules of the step Replace with a CC Link module having function version B and above Set the parameters LINK PARA ERROR When using MELSECNET II 1 When the link range at a data link CPU which is also a master station station number 00 is Set by parameter setting at a peripheral device for some reason the data written to the link parameter area differs from the link parameter data read by the CPU Alternati
147. time at the execution After count out of END ciuted K instruction Counted Uncounted Unexecuted Unchanged ON ON Changed OFF ON Executed Unexecuted L S Unchanged Executed Changed OFF ON Special M Unexecuted B Executed Unexecuted Executed R Refresh mode D Direct mode Value for ASUSH board APP 42 APPENDICES MELSEC A Table 2 1 Instruction Processing Time of Small Size Compact CPUs Processing Time us Instruction Condition Device A1SJH A1SH A2SH S1 R D R D Unexecuted 0 33 2 0 0 32 1 9 Unchanged Executed OFF OFF Changed ON OFF i 0 33 2 0 0 32 1 9 Unexecuted 0 33 0 32 Unchanged Executed OFF gt OFF Changed ON OFF 3 0 33 0 32 0 33 2 0 0 32 1 9 0 33 0 32 Special M Unexecuted 1 4 1 0 Executed 8 4 i 6 2 Unexecuted i 1 4 1 0 8 5 ON OFF 57 1 Unexecuted s 1 0 OFFOFF 8 3 ON OFF 9 0 Executed Executed Unexecuted 5 1 0 Executed 5 2 Unexecuted E 1 0 Executed 6 7 0 25 M9084 OFF 466 6 M9084 ON 451 3 Unexecuted 8 8 Executed 8 0 Unexecuted 8 8 Executed 8 0 5 2 R Refresh mode D Direct mode APP 43 APPE
148. 1 scan from the same device if even one RST command goes On the specified device goes Off c If there is a SET instruction and a RST instruction from the same device 1 scan the SET instruction turns the specified device On when the SET command goes On and the RST instruction turns the specified device Off when the RST command goes On If the SET command and RST command go Off the On Off state of the specified device does not change Circuit X0 EET X1 H Timing Chart M SET ser MoH x1 x1 rst END END END TT OFF i ON X OFF i i ON OFF RST and are not processed e ion because because X1 is Off SET and MO are not processed remains in the On state is Off goes On because is On MO remains in the On state 3 INSTRUCTION STRUCTURE MELSEC A 3 If the PLS instruction is used from the same device The PLS instruction turns the specified device On when the PLS command goes from Off to On and when the PLS command is not going from Onto Off Off gt Off On 2 On On Off the specified device goes Off If the PLS instruction from the same device is executed multiple times in 1 scan the specified device goes On when the PLS command in each PLS instruction goes from Off to Off and the specified device goes Off when the comma
149. 1 1 gt 0 1 0 1 0 1 0 1 Bit number b7 be bs b4 b3 b2 b1 Column 0 1 2 4 5 6 7 0 NUL TC7 DLE SP 0 P p olo 1 1 TC1 SOH DC1 1 2 STX 002 2 B R b r 0 0 11 1 3 TC3 ETX 3 S 5 0100 4 4 DC4 4 D T d t 1 0 1 5 TCs ENQ 5 6 TCs SYN amp 6 v f v 1 1 1 7 BEL TC10 ETB 1 8 FEo BS CAN 8 H X x 1101011 9 FE1 9 i y 1101110 10 LF NL SUB J 2 j 2 110 11 11 FEs VT ESC K k 1100 12 FE4 FF IS4 FS lt L 1 1 0 1 13 5 193 GS m 1110 14 0 132 RS gt N n 1 1 1 1 15 SI IS1 US _ o DEL ASCII Codes NUL Null character Blank columns indicate that there is no corresponding character APP 89 APPENDICES MELSEC A APPENDIX 4 FORMATS OF PROGRAM SHEETS Sheet format 1 1 2 MODULE7 lt VY uoge OHO Appli SHEET NO Jf Base unit for 8 modules 1 0 OPM opinionum OPM THE OPM l O Appli MODULE6 i UO Appli VO Appli OPM ODM yo MODULES5 lt gt ama tc n a gt uia I oODptm
150. 10 6 BASIC INSTRUCTIONS MELSEC A 3 At S 51 S2 and D 32768 to 32767 BIN 16 bits can be specified 4 The judgment of whether the data of S S1 82 and D are positive or negative is made at the highest bit b15 Qe Positive eee Negative 5 When the Oth bit has underflown the carry flag does not turn on When the 15th bit has overflown the carry flag does not turn on Functions 1 Performs the subtraction of BIN data specified at D and the BIN data specified at S and stores the subtraction result into the device specified at D 5678 BIN 1234 BIN gt 4444 BIN 2 Performs the subtraction of BIN data specified at 81 and the BIN data specified at 52 and stores the subtraction result into the device specified at D1 5678 BIN 1234 BIN gt 4444 BIN 3 At S S1 52 and D 32768 to 32767 BIN 16 bits can be specified 4 The judgement of whether the dates of S 81 S2 and D are positive or negative is made at the highest bit 615 0 rosis Positive Negative 5 When the Oth bit has underflown the carry flag does not turn on When the 15th bit has overflown the carry flag does not turn on 6 11 6 BASIC INSTRUCTIONS Execution Conditions k Addition subtraction ON OFF A Executed Executed per scan
151. 1128 1128 435 327 2060 FEND 2060 9084 ON 2400 17000 A73 988 988 285 214 73 7600 7600 y Unexecuted 85 43 44 6 4 2 6 1 2 0 90 MC Executed 50 39 41 6 4 2 6 1 2 0 90 M L Unexecuted 84 43 43 2 6 2 6 1 2 0 90 Executed 49 39 39 2 6 2 6 1 2 0 90 MCR 35 26 26 1 2 1 2 0 60 0 45 Unexecuted 65 59 61 5 6 1 8 2 2 1 7 Y ON 68 62 63 5 6 1 8 2 2 1 7 Executed PLS OFF 64 60 62 5 6 1 8 2 2 17 PLF Unexecuted 64 59 59 1 8 1 8 2 2 1 7 Met ON 67 62 62 1 8 1 8 2 2 1 7 B F Executed OFF 63 61 61 1 8 1 8 2 2 1 7 R Refresh mode D Direct mode APP 67 APPENDICES MELSEC A Table 2 4 Instruction Processing Time of CPUs Processing Time us A3A Instruction Condition Device An ANN PSY A3H A3M 2 A3U Board A2U A4U D R D R D R R Unexecuted 3 7 3 0 3 0 0 80 0 80 1 4 1 1 SFT Executed 49 38 39 11 9 1 4 4 3 3 SFTP IML Unexecuted 3 7 3 0 3 0 0 80 0 80 1 4 1 1 F Executed 48 38 38 9 1 9 1 44 3 3 1 3 1 0 1 0 0 20 0 20 0 20 0 15 MRD 1 3 1 0 1 0 0 20 0 20 0 20 0 15 MPP 1 3 1 0 1 0 0 20 0 20 0 20 0 15 CJ Without index qualification 49 39 39 4 0 4 0 6 6 5 0 With index qualification 48 48 7 2 7 2 6 6 5 0 SC Without index qualification 54 71 71 4 0 4 0 6 6 5 0 With index qualification 81 81 7 2 7 2 6 6 5 0 JMP
152. 13 7 9 9 10 0 ROLP n n 3 54 53 53 13 4 13 7 9 9 10 1 RCL n n 3 57 57 57 15 2 15 7 11 3 11 4 RCLP n n 3 57 57 57 15 2 15 5 11 5 11 4 DRORn n 3 70 69 69 18 4 18 7 13 7 13 8 DRORPn n 3 70 69 69 18 2 18 9 13 1 13 7 DRCRn n 3 72 72 72 18 0 18 3 13 5 13 5 DRCRP n n 3 72 72 72 18 0 18 5 13 5 13 4 DROL n n 3 69 69 69 18 4 18 7 13 7 13 8 DROLP n n 3 69 69 69 18 2 18 9 13 1 13 7 DRCL n n 3 68 68 68 18 8 19 1 14 1 14 1 DRCLP n n 3 68 68 68 18 8 18 9 14 1 14 0 SFRDn n 5 74 72 83 18 4 17 5 13 7 13 8 SFRPDn n 5 74 72 83 18 4 18 9 13 7 13 8 BSFRDn n 5 124 123 124 31 6 31 7 23 7 23 8 n 15 33 6 33 9 25 1 25 2 BSFRPDn n 5 124 123 124 31 6 31 9 23 5 23 5 n 15 33 6 33 9 25 3 25 0 DSFRDn n 5 118 116 m 30 2 30 5 22 5 22 6 DSFRPDn n 5 118 116 30 2 30 5 22 7 22 8 SFLDn 5 74 73 84 19 2 19 5 14 3 14 4 SFLPDn n 5 74 73 84 19 2 19 7 14 3 14 6 BSFLDn n 5 134 133 134 34 4 34 7 25 7 25 8 n 15 36 0 36 5 26 9 27 2 BSFIPn n 5 134 133 134 34 4 34 9 25 9 25 8 n 15 mE 36 0 36 5 27 1 27 0 DSFL n 5 118 17 EE 30 4 30 9 22 7 22 8 DSFLPDn n 5 118 17 30 4 30 9 22 9 22 8 SER 1 2 5 200 200 49 8 50 1 37 3 37 2 SERP 1 52 5 200 200 49 8 50 3 37 5 37 4 SUM 115 114 131 30 8 31 1 23 1 23 2 SUMP 115 114 131 30 8 31 3 23 3 23 2 DSUM 200 119 231 53 8 54 3 40 3 40 4 DSUMP 200 119 231 53 8 54 3 40 5 40 4 DECOSDn n 2 164 163 216 43 2 43 7 32 3 32 4 DECOPSDn n 2 164 163 216 43 2 43 9 32 5 32 4 SEG 91 91 155 25 7 25 7
153. 162 241 26 6 DB S1 S2 D 31 13 90 234 187 234 233 368 37 7 DB P S1 S2 D 31 13 90 234 187 234 233 368 37 5 B S D 6 2 2 73 154 125 154 156 232 24 9 B P S D 6 2 2 73 154 125 154 156 232 24 9 DB S D 32 14 09 219 175 219 219 351 35 3 DB P S D 32 14 09 219 175 219 219 351 35 1 B S1 S2 D 14 6 18 166 133 166 167 254 27 3 B P S1 S2 D 14 6 18 166 133 166 167 254 27 1 DB S1 S2 D 29 12 82 231 185 231 233 368 38 1 DB P S1 S2 D B S1 S2 D B P S1 S2 D S1 S2 D 1 S2 D B S1 S2 D B P S1 S2 D DB S1 S2 D DB P S1 S2 D BCD BCDP DBCD DBCDP BIN BINP DBIN DBINP APP 53 APPENDICES MELSEC A Table 2 2 Instruction Processing Time of Small Size Compact CPUs Processing Time us AnS A1SJH A1SH A2SH S1 Instruction Condition Direct Mode Refresh Refresh Direct Refresh Direct Mode god ia xX Y Mode Mode Mode Mode MOV 47 47 57 11 8 12 3 9 1 9 0 MOVP 47 47 57 11 8 12 5 8 9 9 0 DMOV 67 67 87 17 2 17 7 13 1 13 0 DMOVP 67 67 87 17 2 17 9 13 1 13 0 XCH 60 61 84 15 8 16 3 11 9 11 8 XCHP 60 61 84 15 8 16 3 11 9 11 8 DXCH 107 107 141 28 8 29 5 21 7 21 6 DXCHP 107 107 141 28 8 29 1 21 7 21 8 CML 43 43 57 10 8 11 5 8 3 8 4 CMLP 43 43 57 10 8 11 5 8 3 8 2 DCML 74 75 108 20 2 20 9 15 1 15 2 DCMLP 74 75 108 20 2 20 7 15 3 15 0 BMOVSDn n 96 399 400 7144 59 2 59 5 44 4 44 4 BMOVPSDn n 96 399 40
154. 19 8 19 7 APP 58 APPENDICES MELSEC A Table 2 3 Instruction Processing Time of Small Size Compact CPUs Processing Time us A2USH S1 A2AS 51 A2USH A2C A52G A0J2H A1FX Instruction Condition board Refresh Refresh Refresh Refresh Refresh Refresh Mode Mode Mode Mode Mode Other than X ROL n 3 11 2 66 67 54 67 67 67 9 9 ROLP n n 3 11 2 66 67 54 67 67 67 9 9 RCL n n 3 12 2 74 71 57 71 71 71 11 3 RCLP n n 3 12 2 74 71 57 71 71 71 11 5 DROR n n 3 5 8 5 02 87 70 87 87 87 13 7 DRORP n n 3 5 8 5 02 87 70 87 87 87 13 7 DRCR n n 3 6 4 5 38 89 72 89 90 90 13 5 DRCRP n n 3 6 4 5 38 89 72 89 90 90 13 5 DROL n n 3 10 4 74 87 70 87 87 87 13 7 DROLP n n 3 10 4 74 87 70 87 87 87 13 1 n n 3 12 5 11 84 68 84 85 85 14 1 DRCLP n n 3 12 5 11 84 68 84 85 85 14 1 SFRDn n 5 5 0 2 1 92 74 92 90 103 13 7 SFRP n 5 5 0 2 1 92 74 92 90 103 13 7 5 29 13 09 154 124 154 153 155 23 7 BSFRDn BSFRPDn DSFRDn DSFRPDn SFLDn SFLPDn BSFLDn BSFLP n DSFLDn DSFLP Dn SER S1 S2n SERP 1 2 SUM SUMP DSUM DSUMP DECOSDn DECOP SDn SEG APP 59 APPENDICES MELSEC A Table 2 3 Instruction Processing Time of Small Size Compact CPUs
155. 2 The A mark in the Index column indicates that index qualification can be performed with the AnA A2AS AnU QCPU A A Mode and A2USH board only 3 The A mark in the Subset column indicates that subset processing can be performed with the A3H AnA A2AS AnU QCPU A A Mode and A2USH board only 2 18 2 INSTRUCTIONS MELSEC A 3 Shift instructions Table 2 19 Shift Instructions 4 b ves x 9 Pest 5 Bioorg Symbol Contents of Processing tion Con 8 H 5 Applicable CPU Page y dition ES 25 SFR Dia 15 n 0 5 7 31 E 7 SFRP sFRP D n a cat 51 7 31 nbi 5 X shift SFL SFL D n 15 5 e e O 7 31 1567 a r K 0 Carry SFLP SFLP D n 9 te b 7 31 BSFR BSFR D n E D 7 o O 7 33 BSFRP BSFRP Dn 514 Y 4 5 1 7 7 33 1bit shift c 5 BSFL BSFL Dn 7 o 7 33 S p BSFLP serre Dln E yo Qm 7 7 33 DSFR DSFR Din D 7le Not applicable to A73 7 35 DSFRP 29782 H str 5 7 e 4 Not applic
156. 3 INSTRUCTION STRUCTURE MELSEC A 3 8 5 Storing 32 bit data in index registers It is possible to store 32 bit data in the index registers Z1 to Z6 V1 to V6 extended by the AnA A2AS AnU QCPU A A Mode and A2USH board The following index registers are used in pairs to store 32 bit data 1 Z1 and V1 2 Z2 and V2 3 Z3 and V3 Since Zn is regarded as the device for lower 16 bits Vn cannot be used in 32 bit 4 Z4 and V4 instructions Programs cannot be entered 5 Z5 and V5 6 Z6 and V6 Any pairs other than those mentioned above cannot store 32 bit data If one of paired devices is specified for index qualification in an instruction data in such index register is regarded as 16 bit data for index qualification 3 INSTRUCTION STRUCTURE MELSEC A 3 9 Operation when the OUT Instruction SET RST Instruction and PLS PLF Instruction are from the Same Device Here operation in the case that there is multiple execution of the OUT instruction SET RST instruction and PLS PLF instruction during 1 scan using the same device 1 In the case of the OUT instruction from the same device Do not carry out execution of the OUT instruction multiple times during 1 scan from the same device If execution of the OUT instruction multiple times during 1 scan from the same device is attempted the specified device is turned On Off in accordance with the calculation results up until the time the OUT command was executed
157. 3 3 Work area for Microcomputer program f 256K bytes Fig 8 4 Data Memory and Work Areas 8 3 2 Data memory area address configuration One address of the data memory area consists of 16 bits which are further divided into the odd and even areas 8 bits respectively 16 bits 1 address 8000H Odd 8 bit area Odd 8 bit area 8001H 8001H Fig 8 5 Configuration of 1 Address 16 bits 8 MICROCOMPUTER MODE MELSEC A 8 8 3 Differences in operations called by microcomputer instructions according to CPU models Microcomputer instruction processing operation differs according to the CPU to be used 1 REP LODSW REP LODSB instructions a AnSHCPU and A1FXCPU Disregarding the value at CX register the contents of memory indicated by the S1 register are sent only once to AL 8 bit operation or AX 16 bit operation register b CPU other than AnSHCPU and A1FXCPU The contents of memory indicated by the S1 register are sent to AL 8 bit operation or AX 16 bit operation register by the number of times specified by the CX register After the execution of the instruction the value at CX register is cleared to 0 To use CPU other than AnSHCPU and A1FXCPU same as AnSHCPU and A1FXCPU refer to the following example program Example program CPU other than AnSHCPU and A1FXCPU AnSHCPU and A1FXCPU STD STD MOV MOV CX 3 REP LODSB
158. 3 8 STC 28 28 28 1 2 1 2 1 2 24 1 8 CLC 31 31 31 1 2 1 2 1 2 24 1 8 DUTY 68 68 68 121 121 121 14 11 PR 226 226 226 183 183 183 74 59 PRC 141 141 141 145 145 145 37 31 CHK Bit reverse 121 121 121 output instruction LED 170 203 203 203 282 282 282 100 75 LEDC 210 265 265 265 320 320 320 142 109 LEDA 170 202 202 202 262 262 262 LEDB 172 211 211 211 262 262 262 LEDR 520 638 638 638 460 460 460 106 80 R Refresh mode D Direct mode With an processing time will be 20us longer than the indicated time APP 77 APPENDICES MELSEC A Table 2 6 Instruction Processing Time of CPUs Processing Time us AnN A73 AAN 20 40 Instruction Condi tion D Other R D R Other Other Other than X Y than X Y than X Y than X Y X Y X Y X Y X Y FROM 1 439 524 3347 300 400 490 237 261 178 196 FROMP 1000 6609 2358 12605 5050 5230 3130 5749 2789 4312 2092 DFRO n 1 449 529 3051 300 410 610 244 266 183 199 DFROP n 500 6609 2109 12595 5050 5270 1900 5669 1669 4252 1252 TO 1 _ 449 539 3247 300 410 520 243 266 182 200 TOP n 1000 6609 3918 22590 5050 5120 3300 5773 2117 4330 1588 DTO 1 454 544 3523 300 410 520 240 266 180 199 DTOP n
159. 48 ASCII conversion 7 APPLICATION INSTRUCTIONS MELSEC A 7 4 1 16 bit data search SER SERP All CPUs Available Device gt i S oo eixi iss 5 Bit device Word 16 bit device Constant Pointer Level 8 E 9 2 X Y ML F T C D WR 1 2 1 N 5 M9012 M9010 M9011 S1 OjO O 0O O 0O O O 0O 0O O S2 O0 0 0O 0 O Head number of device to be searched Search commands Setting data Device number which 51 52 stores data to be searched SERP 51 52 devices to be Functions 1 Searches the data of n points beginning with the 16 bit data of device specified at S2 by use of the 16 bit data of device specified at 51 as a keyword 2 Stores to A1 the number of data which have coincided with the keyword and stores to AO at which point from S2 the first coinciding device number relative value is located 3 When n is negative it is equal to O 4 When n is 0 no processing is performed Execution Conditions ON Search command OFF SER Executed Executed per scan per scan gt imi SERP p Executed Executed only once only once 7 APPLICATION INSTRUCTIONS MELSEC A Operation Error In the following case operation error occurs and the error flag turns on W
160. 5 0 3 8 BSFRDn n 5 145 124 123 124 116 116 154 29 22 BSFRP Dn n 5 145 124 123 124 116 116 154 29 22 DSFRDn n 5 133 118 116 15 15 18 8 14 1 DSFRPDn SFLDn SFLPDn BSFLDn BSFLP n DSFLDn DSFLPDn SER 51 S2n SERP 51 S2n SUM SUMP DSUM DSUMP R Refresh mode D Direct mode APP 75 APPENDICES MELSEC A Table 2 6 Instruction Processing Time of CPUs Processing Time us An NBI A3H A3M A2A A2U AU Instruction Condition D D D R Other R Other R R than X Y than X Y X Y X Y DECOSDn n 2 249 164 163 216 200 200 205 28 21 Dn n 2 249 164 163 216 200 200 205 28 21 SEG 170 91 155 34 34 11 6 4 48 n 2 478 164 163 195 188 188 193 38 28 ENCOPSDn n 2 478 164 163 195 188 188 193 38 28 BSETDn n 5 107 90 90 5 0 5 0 9 6 7 2 BSETP D n n 5 107 90 90 5 0 5 0 9 6 7 2 BRST Dn n 5 114 97 96 5 0 5 0 9 6 7 2 BRSTP Dn n 5 114 97 96 5 0 5 0 9 6 7 2 UNIS Dn n 4 159 131 131 155 155 31 24 5 Dn n 4 159 131 131 EN 155 155 31 24 DISSDn n 4 180 154 153 155 155 25 19 DISPSDn n 4 180 154 153 ae 155 155 25 19 ASC 140 120 120 120 107 107 107 34 2 6 FIFW 340 101 101 123 136 136 140 20 15 FIFWP 340 101 101 123 136 136 140 20 15 FIFR 202 118 118 134 207 207 211 69 52 FIFRP 202 118 118 134 207
161. 50 39 39 3 8 3 8 6 6 5 0 74 Without index qualification 74 74 8 2 8 2 10 7 8 CALL 69 7 With index qualification 78 78 12 12 10 7 8 Without index qualification 74 70 70 8 2 8 2 10 7 8 CALLP With index qualification 78 78 12 12 10 7 8 RET 249 50 50 5 8 5 8 7 0 5 3 EI 195 38 38 53 53 3 0 2 3 DI 46 66 66 53 53 3 2 2 4 IRET 249 120 120 62 62 3 4 2 6 79 Without index qualification 90 A3V 79 86 86 2473 SUB 85 With index qualification 85 88 88 2486 79 Without index qualification 90 79 86 86 2473 SUBP 85 With index qualification 85 88 88 E 2486 2420 M9084 OFF 8546 2420 1128 1128 450 338 16260 2340 M9084 ASV 2340 988 988 301 226 16260 FOR 64 53 53 5 8 5 8 5 8 4 4 NEXT 2532 41 41 6 4 6 4 8 0 6 0 R Refresh mode D Direct mode APP 68 APPENDICES MELSEC A 1 When not executed in the above table indicates that the input condition is off Input condition 27 2 When not counted of OUT C instruction indicates that the input condition remains on and the counter does not count 3 OFF of PLS and PLF instructions indicates that the input condition remains on 1 scan after it has turned on off for PLF and the pulse is not generated 4 T C count processing time and refresh time are not included in the FEND END CHG instruction processing times APP 69 APPENDICES MELSEC A
162. 500 um 6609 1609 19340 5050 5120 2200 5747 1501 4310 1126 R Refresh mode D Direct mode The processing time shown above is the value when the AD71 is used as special function modules 1 n321000 for the and n3 1000 when other than X and Y is specified with other CPU n3 112 when X and Y are specified 2 n3 500 for the n3 500 when other than X and Y is specified with other CPU n3 56 when X and Y are specified 1 All the application instructions indicated above are used without index qualification 2 When unexecuted any instruction is processed during the following time Number of steps 1 x 1 3 us AnN A73 and board Number of steps 1 x 1 0 us A3H and A3M Number of steps 1 x 0 2 us A2A and A2U Number of steps 4 x 0 2 us A3U and A4U Number of steps 4 x 0 15 us APP 78 APPENDICES MELSEC A 2 3 List of Instruction Processing Time of QCPU A A Mode The following table shows the instruction processing time of QCPU A A mode 1 Sequence instructions Table 2 7 Instruction Processing Time of QCPU A A Mode Condition Device Instruction Processing Time us nstruction ondition Device QnCPUA QnCPU A QnHCPU A 0 079 0 034 At change OFF ON ON OFF 0 158 0 068 M except for special M LSB At change OFF ON ON OFF At no execution At executi
163. 6 31 INC INC D D 1 gt D 16 bits BIN INCP D data 5 incre ment DINC DINC D 6 36 0 1 0 1 0 1 0 32 bits DINCP DINCP D DEC DEC D 2 6 34 D 1 gt D BIN DECP D 6 34 data decre ment DDEC DDEC D 6 36 0 1 D 1 2 0 1 D l ppEcP D 6 36 1 For the number of steps when extension devices are used or when index qualification is performed to bit devices for AnA A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 1 2 The A mark in the Index column indicates that index qualification can be performed with the AnA A2AS AnU QCPU A A Mode and A2USH board only 3 The A mark in the Subset column indicates that subset processing can be performed with the A3H AnA A2AS AnU QCPU A A Mode and A2USH board only 2 12 2 INSTRUCTIONS MELSEC A 3 BCD BIN conversion instructions Table 2 12 BCD gt BIN Conversion Instructions
164. 7 6 C 0 4 9 7 3 9 2 8 2 At S1 and S2 0 to 9999 BCD 4 digits can be specified 1 Performs devision of the BCD data specified at 51 and the BCD data specified at S2 and stores the division result into the device specified at D 51 52 D Quotient D 1 Remainder 3 9 2 8 7 4 9 8 7 ES Digit higher than the specified digit is regarded as 0 2 In regards to the operation result the quotient and remainder are stored by use of 32 bits Quotient BCD 4 digits Stored to the lower 16 bits Remainder BCD 4 digits Stored to the upper 16 bits 3 D will not store the remainder of the dividion result if it is a bit device 6 BASIC INSTRUCTIONS Execution Conditions Multiplication division gn commands OFF Executed Executed per scan per scan lt gt Executed x _ Executed only once only once Operation Errors In the following cases operation error occurs and the error flag turns on A value other than 0 to 9 exists in any digit of S1 S2 The divisor S2 is 0 Program Examples B Program which performs multiplication of the BCD data of to F and BCD data of D8 and stores the result into and A1 when X1B turns on Coding X01B P K4 0 LD X01B 0 X000 D8 1 B P K4X000 D8 A0
165. 8 0 MCR 0 60 0 27 26 26 26 33 5 2 R Refresh mode D Direct mode Value for A2USH board APP 44 APPENDICES MELSEC A Table 2 1 Instruction Processing Time of Small Size Compact CPUs Processing Time us Instruction Condition Device A1SJH A1SH A2SH S1 R D R D Unexecuted 16 8 16 8 11 7 13 7 ON 17 2 17 2 11 6 13 7 OFF 17 2 17 2 11 7 13 7 Unexecuted 15 2 15 2 11 7 11 7 ON 15 6 15 6 11 6 11 6 OFF 15 6 15 6 11 7 11 6 Unexecuted 1 4 1 4 1 0 1 0 Executed 12 4 12 4 8 1 10 1 Unexecuted 1 4 1 4 1 0 1 0 10 8 10 8 8 1 8 1 0 33 0 33 0 25 0 25 0 33 0 33 0 25 0 25 0 33 0 33 0 25 0 25 Without index qualification 10 2 10 2 7 6 10 0 With index qualification 12 6 12 6 9 5 11 9 Without index qualification 17 8 17 7 13 3 With index qualification 20 2 20 5 15 1 10 2 10 3 7 6 Without index qualification 17 8 17 9 13 3 With index qualification 20 2 20 3 15 1 Without index qualification 17 8 17 9 13 2 With index qualification 20 2 20 3 15 1 10 4 10 3 9 6 9 6 9 2 7 1 6 8 7 0 6 5 58 4 57 6 Without index qualification 39 8 17 6 With index qualification 41 4 19 2 Without index qualification 39 8 17 6 With index qualification 41 4 19 2 M9084 OFF M9084 ON Executed Executed R Refresh mode
166. 8 Applicable CPU Page 5 25 2 Master MC H Master control start 5 A 5 29 control MCR MCR n Master control reset 3 5 29 1 For the number of steps when extension devices are used or when index qualification is performed to bit devices for AnA A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 1 2 The A mark in the Index column indicates that index qualification can be performed with the AnA A2AS AnU QCPU A A Mode and A2USH board only 3 The A mark in the Subset column indicates that subset processing can be performed with the A3H AnA A2AS AnU QCPU A A Mode and A2USH board only 2 INSTRUCTIONS MELSEC A 6 Termination instructions Table 2 8 Termination Instructions Execu x g Classi Instruction l g fication 5 Symbol Symbol Contents of Processing ae 2 8 E 8 Applicable CPU Page 25 Always used at end of the main FEND FEND H routine program to 1 5 33 Program terminate processing end Always used at the end of the END sequence program to return to 1 5 35 step 0 7 Other instructions Table 2 9 Other Instructions E 1 x oO Classi Instruction 295 a fication 5 Symbol Symbol Contents of Processing tion Con 2 9 8 Applicable CPU Page dition a
167. 9 Classi Instruction Symbol Contents of Processing tion Con 2 3 Applicable CPU Page fication 2 Symbol diti 3 on 5 2 Zo 1 2 OUT Device output E 5 14 1 2 SET SET D Device set 5 19 1 2 RST ARST D Device reset 3 5 19 OUT Generates one program cycle 2 PLS PLS D pulses on the leading edge of input 3 5 23 signal Generates one program cycle 2 pulses on the trailing edge of input Y 3 5 23 signal VN Not applicable to An A3V A2C CHK cux p1 v2 Device nehm inven aL 5 A 520 AnA 2 5 5 25 QCPU A A Mode and AnU REMARK Execution Condition marked in 3 Output instructions When the device used is F annunciator When the other device is used 4 Shift instructions Table 2 6 Shift Instructions Execu Classi Instruction s2 0 fication 5 Symbol Symbol Contents of Processing p Con 2g 8 Applicable CPU Page ition 5 25 2 Shift SET SFT D 3 5 27 Shifts device 1 bit gt SFTP SFTP D A 5 27 gt 5 Master control instructions Table 2 7 Master Control Instructions j Execu x9 Classi Instruction 2 a oa T fication 5 Symbol Symbol Contents of Processing uon Con 2 9
168. A A Mode A2USH board Internal relay M L S 2048 to 8191 Timer T 256 to 2047 Counter C 256 to 1023 Link relay B 400 to FFF 400 to 1FFF Data register D 1024 to 6143 1024 to 8191 Link register 400 to 400 to 1FFF Annunciator F 256 to 2047 Index register Z 1106 Index register V 1106 If index qualification is performed to the extension device with the extension index register the number of steps increases only one Example When basic devices only are used TO LD 1step 00 W010 x DO 010 5 steps otal 6 steps e When extension devices are used T300 LD T300 EU I IUE 1 1 2 steps DO W800 A Extension device Extension device 800 5 1 6 steps 8 an 21 1 1000 1 1 2 steps 02000 W010 E Y Extension device Extension device 02000 Wo oa 9 TO 71 LD TOR ez 1 step RE o e 02000 0300 0200021 0300 5 1 6 steps Extension device Total 7 steps 3 14 3 INSTRUCTION STRUCTURE MELSEC A 2 If index qualification is used in a 1 step sequence instruction such as LD OUT the number of steps increases one Example When index qualification is not used x000 lt YO40 When index qualification is used ED 1 1 2 steps X00 I Z YO40 jl OUT 0
169. A3V A2C A52G A0J2H A73 A1S 15 51 15 A1SJ S3 25 25 51 A1SH A1SJH A2SH A2SH S1 A1FX board M L S 0 to 2047 BO to3FF FO to 255 TO to 255 CO to 255 TO to 255 CO to 255 All devices consist of one bit and store ON OFF data of device by use of eight bits at even addresses ON OFF of each device are as shown below 0 OFF 1 ON Example to 23 are as shown below Odd area Even area b4 b3 b2 M4 M3 M2 M12 M11 M10 M19 M18 i Used for operation result of PC and allows read write 8 10 8 MICROCOMPUTER MODE MELSEC A Address Configuration eee 8FFFH D Bou 9000 97FFH W A1 A2 A2 S1 A3 Present AIN to value of 99FFH timer T A2NS1 All devices consist of two bytes 16 bits 2 The configuration of DO is as shown below Present 525 value of aue to ud ae counter uis 9BFFH 8800H C A1S 15 51 8801 15 A1SJ S3 25 ARS SI gister A2SH A2SH S1 A1FX board REUMU 9FF8H to doch 8 11 8 MICROCOMPUTER
170. AnA A2AS AnU QCPU A A Mode and A2USH board only 3 The A mark in the Subset column indicates that subset processing can be performed with the AnA A2AS AnU QCPU A A Mode and A2USHboard only 2 23 2 INSTRUCTIONS MELSEC A 11 Instruction for servo programs Table 2 27 Instructions for Servo Programs x 9 Classi Instruction Symbol Contents of Processing tion Con 2 Applicable CPU Page fication 2 Symbol er 2 5 dition o E 25 i s DSFRP psFRP Requests start of servo programs A 7 gt Dedicated to A73 7 126 g Changes present position data of Date xz PSFLP psrip palin stopping axes and also changes A 7 Dedicated to A73 7 130 change axis feedrate during positioning and jog operation 1 For the number of steps when extension devices are used or when index qualification is performed to bit devices for AnA A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 1 2 The A mark in the Index column indicates that index qualification can be performed with the AnA A2AS AnU QCPU A A Mode and A2USH board only 3 The A mark in the Subset column indicates that subset processing can be performed with the A3H AnA A2AS AnU QCPU A A Mode and A2USH board only 3 INSTRUCTION STRUCTURE MELSEC A 3 INSTRUCTION STRUCTURE
171. Carry Reset CLC 7 121 Timing clock DUTY 7 123 7 108 7 APPLICATION INSTRUCTIONS MELSEC A 7 10 1 WDT reset WDT WDTP All CPUs Available Device Bit device Word 16 bit device Constant Pointer Level Digit specification M L S D W 0 1 K H P 1 M9010 M9011 WDT reset commands Functions 1 Resets the watch dog timer in a sequence program 2 Used when the period of time from step 0 to END FEND in the sequence program exceeds the set value of watch dog timer depending on conditions If the scan time exceeds the set value of watch dog timer at every scan change the set value of watch dog timer by the parameter setting of peripheral equipment AGGPP AGPHP AGHGP A7PU 3 Set the set value of the watch dog timer so that t1 from step 0 to WDT instruction and t2 from the WDT to END FEND instruction do not exceed the set value See the diagram below Step 0 END FEND X NBN 4 The WDT instruction can be used two or more times during one scan However care should be exercised because if error occurs the outputs cannot be turned off immediately b Values of scan time stored in special registers D9017 to D9019 and D9021 are not cleared though the WDT or WDTP instruction is executed Values of special registers may therefore become larger than the WDT values set w
172. Classi Instruction Symbol Contents of Processing tion Con 2 3 Applicable CPU Page fication 2 Symbol 5n EZ 5 dition 52 25 mures 5 15 3le 7 22 1 RORP n bit rotate to right 7 22 Right RORP n rotation RCR EN 15 0 7 22 gt rcr bit rotate to right 3 e 7 22 ROL cb ger i Carry 15 AO 0 7 24 lt Left ROLP ROLP n n bit rotate to left 7 24 rotation RCL c x m 3e 7 24 RCLP RCLP n n bit rotate to left O 7 24 A1 DROR DROR n 15 015 0 Cany 3 e 7 26 k gt Exil Y Right DRORP DRORP n n bit rotate to right 7 26 rotation A1 DRCR DRCR n Cary 15 015 0 O 7 26 gt DEREN DRCRP DRCRP n n bit rotate to right 7 26 g A1 DROL DROL n Carry 15 015 0 7 28 ps DROLP prore n Ir bit rotate to left A 7 28 i Ai rotation DRCL DRCL n 15 015 0 Carry 3 28 lt DRCLP DRCLP n n bit rotate to left 7 28 1 For the number of steps when extension devices used or when index qualification is performed to bit devices for AnA A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 1
173. Continuity Non Continuity status status Execution The execution conditions of LDO ANDO and are as indicated below Conditions Instruction Execution Condition LD Executed per scan AND Executed only when the preceding contact instruction is on OR Executed per scan 6 BASIC INSTRUCTIONS REMARK The number of steps is seven in the following cases Index qualification has been performed The digit specification of bit device is not K4 The head number of bit device is not a multiple of 8 A multiple of 16 when or ACPU is used Program Examples 1 Program which compares the data of to F and the data of Coding 4 0 LD K4X000 03 0 X000 D3 L 4Yos3 5 OUT Y033 6 END 2 Program which compares the BCD value 100 and the data of D3 e Coding M3 H 0 LD M3 0100 71 Y033 1 lt gt H0100 D3 6 OUT Y033 7 END gt 3 Program which compares the BIN value 100 and the data of D3 Coding M3 K 0 LD M3 0 1Hi 100 D3 JK Y033 1 LD K100 D3 M8 6 OR M8 7 8 OUT 033 9 END lt 4 Program which compares the data of DO and that of D3 Coding i o 1 AND M8 2 OR 00 D3 lt 00 D3 7 OUT Y033 8 END 6 BASIC INSTRUCTIONS MELSEC
174. D Direct mode APP 45 APPENDICES MELSEC A Table 2 1 Instruction Processing Time of Small Size Compact CPUs Instruction Condition Device Processing Time us A2C A52G A0J2H R R Unexecuted 59 59 ON 62 62 Executed OFF 60 60 Unexecuted 59 59 ON 62 62 Executed OFF 61 61 Unexecuted 3 0 3 0 Executed 47 38 Unexecuted 3 0 3 0 Executed 47 38 1 3 1 0 1 3 1 0 1 3 1 0 Without index qualification 49 39 With index qualification Without index qualification 60 48 With index qualification Without index qualification With index qualification Without index qualification With index qualification Without index qualification With index qualification Without index qualification With index qualification M9084 OFF M9084 ON APP 46 R Refresh mode D Direct mode APPENDICES MELSEC A 1 When not executed in the above table indicates that the input condition is off Input condition P O4 2 When not counted of OUT C instruction indicates that the input condition remains on and the counter does not count 3 of PLS and PLF instructions indicates that the input condition remains on 1 scan after it has turn
175. Devices and the Abbreviations Used in This Manual Abbreviations used in this manual Peripheral devices A6GPP IBM PC AT GPP function GPP A6HGP A7HGP A6PHP A7PHPE GPP function This manual cannot be used in reference to the AOJ2CPU P23 R23 For the instructions which can be used for the AOJ2CPU P23 R23 refer to the AOJ2CPU Programming Manual IB 66057 1 INTRODUCTION MELSEC A Also refer to the following manuals for writing programs for the A series PCs Topic Content Reference Manual Memory capacity and the number of devices of the CPU specifications STU mete Specifications of power supply modules base units etc User s Manual for respective CPU module System configuration for PC Performance and functions of the CPU module Processings of the CPU module CPU functions Lists of devices and parameters Programming procedures Description of devices and parameters ACPU programming Manual Fundamentals Kinds of programs IB NA 66249 Configuration of memory areas Description of dedicated instructions AnSHCPU AnACPU AnUCPU Programming Manual extended application instructions Dedicated Instructions IB NA 66251 AnACPU AnUCPU Programming Manual AD57 Instructions IB NA 66257 AnACPU AnUCPU Programming Manual PID Instructions IB NA 66258 Writing programs To use A2A S1 and ASACPU Description of the AD57 control instructions Description of the PID c
176. END AO Carry flag M9012 b15 b14 b13 b12 11 b10 b9 68 67 b6 Before execution 1 mc Contents of B15 Y before execution 1 Contents of B15 Progress Pa 5 LIA 0 7 Contents of B15 Y when n 2 0 After execution Before execution flag is either 1 0 RCL Program which rotates the contents of AO three bits to the left when XC turns on red Min X00C 0 DREA H 1 RCLP K3 4 END Carry flag b15 b14 b13 b12 b11 b10 b9 bl M9012 Before execution 1 0 1 Progress To carry flag n 2 ED To carry flag After execution 3 Before execution flag is either 1 0 7 APPLICATION INSTRUCTIONS MELSEC A 7 2 8 32 bit data right rotation DROR DRORP DRCR DRCRP Applicable All CPUs CPU Available Device gt 8 oo ez 525 ru Bit device Word 16 bit device Constant Pointer Level 9 o 2 5 M9012 M9010 9011 n 1
177. Head number specified by the LEDA B RFFP LEDA B RTOP RTOP instructions is not of a remote station 506 Head number specified by the LEDA B RFRP LEDA RTOP RFRP RTOP instructions is not of a special function module 507 1 When the AD57 S1 or AD58 Read the error step using a peripheral was executing instructions in device and provide interlock with divided processing mode other special relay M9066 or modify program instructions were executed to structure so that when the AD57 S1 or either of them AD58 is executing instructions in 2 When an AD57 S1 or AD58 was divided processing mode other executing instructions in divided instructions may not be executed to processing mode other either of them or to another AD57 S1 instructions were executed in or AD58 in divided mode divided mode to another AD57 S1 or AD58 508 A CC Link dedicated command was The CC Link dedicated command can issued to three or more CC Link be issued only to two or less CC Link modules modules 9 ERROR CODE LIST MELSEC A Table 9 4 Error Code List for the AnU A2AS and A2USH board Continue Detailed Frror Error CPU Error Massage Code Error and Cause Corrective Action D9008 Code States D9091 OPERATION 1 An instruction which cannot be Read the error step u
178. If scan time is larger than the content of 09019 the value Maximum scan time Usable with all D9019 time per 10 ms is newly stored at each END Namely the maximum t CPU P value of scan time is stored into D9019 in BIN code types o S Sets the interval between consecutive user program Constant scan time starts in multiples of 10 ms Unusable with ER Constant scan Setbyuserin 10 ms 0 No setting A increments 1to 200 Set Program is executed at intervals of set n value x 10 ms BIN f 09021 time 1 ms unit time is stored and updated in code after every E em Wes the PC CPU starts running it starts counting 1 A2AS AnU AnA every second board and 1 second counter Counts 1 every second It starts counting up from 0 to 32767 then down to QCPU A 32768 and then again up to 0 Counting repeats this A Mode routine Indicates which sequence program is run presently One Dedicated to value of 0 to B is stored in BIN code AnU APP 19 APPENDICES MELSEC A Table 1 4 Special Register List Continue Stores the year 2 lower digits and month in BCD 15 12 11 8 7 4 2 lock Clock data 987 July 09025 Year month 1 d is roo i c1 8707 Unusable with 2 Glocicdata Clock data TT T ides An 09026 Day hour d i d i ac o lock A3V A2C and H3110 2
179. Indicates the module for setting switch 0 Indicates the module for setting switch 1 Indicates the module Dedicated to for setting switch 2 Indicates the module A0J2H for setting switch 3 Indicates the module for setting Switch 4 or the module for extension base unit slot 0 Indicates the module for setting Switch 5 or the module for extension base unit slot 1 Indicates the module for setting Switch 6 or the module for extension base unit slot 2 Indicates the module for setting switch 7 or the module for extension base unit slot 3 When of to 255 FO to 2047 for AnA and AnU is turned on by SET F 1 is added to the contents of D9124 When RST F or LEDR instruction is executed 1 is subtracted from the contents of D9124 If the INDICATOR RESET switch is provided to the CPU pressing the switch can execute the same processing Usable with all types of CPUs Quantity which has been turned on by SET is stored into D9124 in BIN code The quantity turned on with SET F 15 stored up to 8 APP 27 APPENDICES MELSEC A Table 1 4 Special Register List Continue When one of to 255 FO to 2047 for AnA and AnU is turned on by SET F F number which has turned on is entered into D9125 to D9132 in due order in BIN code number which has been turned off by is erased from D9125 to D9132 and the contents of dat
180. JMP instruction is given within FOR to NEXT loop causing the processing to exit the loop Processing exited subroutine by the JMP instruction before execution of the RET instruction Processing jumped into a step in FOR to NEXT loop or into a subroutine by the JMP instruction The STOP instruction is given in an interrupt program a subroutine program or in a FOR to NEXT loop CHK FORMAT Instructions including NOP Check the program in the ERR except LD X LDI X3 AND X CHK instruction circuit block Checked at and ANI are included in the according to items 1 to 6 in the left CHK instruction circuit block column RUN Multiple CHK instructions are Correct problem using the peripheral given and perform operation again The number of contact points in the CHK instruction circuit block exceeds 150 There is no 2 1CJ PLH circuit block before the CHK instruction circuit block The device number of D1 of the CHK D1 D2 instruction is different from that of the contact point before the CJ instruction Pointer P254 is not given to the head of the CHK instruction circuit block P2544 H H HCHK D1 D2 H
181. LODSB Loop A 8 MICROCOMPUTER MODE MELSEC A 8 3 4 Configuration of data memory area The data memory area 8000 to 9FFF stores device data The memory area of each device and its configuration are as indicated below Device Address Configuration Al 8000 A1N Odd address Even address AS to to FF m A1 SJ S3 803FH 15 b14 b13 b12 b11 510 p9 b8 b7 b6 5 b4 b3 b2 bl 2 8000H XIM7 XIM5 XIM4 XIM3 XIM2 XIMI XIMO X7 X6 x5 4 2 X1 xo 8000H 8002H XIMD XIMC XIMB 9 XIM8 XE XD XB XA 9 M X0 to 1FF 8004H XIM7 XIM6 XIM5 XIMA XIM3 XIM2 XIM1 XIMO X17 X16 X15 X14 X13 X12 X11 X10 H A1S 81 25 S A2 S1 8000H 4 lj X A2N S1 to to 7 X A2S S1 80FFH Used for storing ON OFF data Used for storing ON OFF data from remote station and allows from input unit and allows only A3 read write read A3N Stored data area as follows Stored data area as follows 0 0 7 1 ON 1 ON board 8000H to AiSH lo 7FF A1SJH Obtain actual input by the A2SH following expre
182. MELSEC A Table 2 5 Instruction Processing Time of CPUs Processing Time us AnN A3V A73 A3A An AN Board A3H A3M A2A 20 A4U Instruction Condition D D D R Other R Other R R thanx y XY thanx XY BMOVPSDn n 96 7498 699 400 7144 132 132 862 72 54 96 1118 229 228 1029 66 66 435 32 24 Dn 96 1118 229 228 1029 66 66 435 32 24 R Refresh mode D Direct mode 1 All the basic instructions indicated above are used without index qualification 2 When unexecuted any instruction is processed during the following time Number of steps 1 x 1 3 us AnN A73 board Number of steps 1 x 1 0 us A3H and A3M Number of steps 1 x 0 2 us A2A and A2U Number of steps 4 x 0 2 us A3U and A4U Number of steps 4 x 0 15 us APP 73 APPENDICES MELSEC A 3 Application instructions Table 2 6 Instruction Processing Time of CPUs Processing Time us An 20 40 Instruction Condition D D D R Other R Other R R than X Y than X Y X Y X Y WAND 90 60 59 72 1 6 1 6 9 2 2 8 2 1 D 90 60 59 72 1 6 1 6 9 2 2 8 2 1 DAND 276 140 139 240 27 27 43 13 9 5 DANDP 276 140 139 240 27 27 43 13 9 5 WAND 1 52 D 179 96 96 152 21 21 32 7 6 5 7 WANDP 51 52 0 179 96 96 1
183. Message SP UNIT LAY ERROR Error Code D9008 Detailed Error Code D9092 CPU States Error and Cause Three or more computer link modules are installed for a single CPU module Two or more MELSECNET Il MELSECNET B or 10 data link modules are installed Two or more interrupt modules are installed A special function module is installed to a slot assigned to the module with parameter setup of the peripheral device or vice versa The I O module or special function module is installed outside the following I O number ranges or GOT is connected to the bus A1SH A1SJHCPU to XFF A2SHCPU S1 X0 to X1FF Corrective Action Reduce the number of computer link modules to within two Reduce the number of MELSECNET 1 MELSECNET B and MELSECNET 10 data link modules to one Reduce the number of interrupt modules to one Using the peripheral device correct the parameter I O assignment according to the actual state of installation of the special function modules Examine the I O number and remove the modules and GOT installed outside the range specified on the left SP UNIT ERROR Stop or Contin ue set by para meter Access execution of FROM or instruction has been made to a location where no special function module is installed Use the peripheral device to read and correct the FROM and or instruction at the err
184. P 6 31 6 16 B 6 28 IP 6 16 B P 6 28 D 6 19 DB 6 31 6 BASIC INSTRUCTIONS MELSEC A Arithmetic operation with BIN Binary f the operation result of an addition instruction exceeds 32767 2147483647 in the case of a 32 bit instruction the result becomes a negative value If the operation result of a subtraction instruction is less than 32768 2147483648 in the case of a 32 bit instruction the result becomes a positive value e The operation of a positive value and a negative value is as follows 5 8 gt 13 5 8 gt 3 5 3 15 5x3 15 5 3 gt 15 5 3 1 and remainder 2 5 3 1 and remainder 2 5 3 1 and remainder 2 Arithmetic operation with BCD f the operation result of an addition instruction has exceeded 9999 99999999 in the case of a 32 bit instruction carry is ignored pera 1 9 1 gt is ignored e When the subtrahend is less than the minuend in the subtraction instruction the following occurs Carry m B N 9997 lg 0 0 0 5 L gt 6 BASIC INSTRUCTIONS MELSEC A 6 2 1 BIN 16 bit addition subtraction 5 P All CPUs Available Device gt 5
185. RUN indication mode is incorrect The MNET MINI automatic refresh setting by parameters is incorrect Timer setting by parameters is incorrect Counter setting by parameters is incorrect Read parameters in the CPU memory check the contents make necessary corrections and write them again to the memory MISSING END INS Checked at STOP RUN The END FEND instruction is not given in the main program Write the END instruction at the end of the main program The END FEND instruction is not given in the sub program if the sub program is set by parameters 1 When subprogram 2 is set by a parameter there is no END FEND instruction in subprogram 2 When subprogram 2 is set by a parameter subprogram 2 has not been written from a peripheral device When subprogram 3 is set by a parameter there is no END FEND instruction in subprogram 3 When subprogram 3 is set by a parameter subprogram 2 has not been written from a peripheral device Write the END instruction at the end of the sub program MELSEC A 9 ERROR CODE LIST Error Massage CAN T EXECUTE P Checked at execution of instruction MELSEC A Table 9 4 Error Code List for the AnU A2AS and A2USH board Continue Error Code D9008 Detailed Error Code D9091 CPU States Er
186. Read the parameter contents of CPU memory check and correct the contents and write them to CPU again Install the RAM and write parameter contents from a peripheral device MISSING END INS Checked at STOP RUN There is END FEND instruction in the program When subprogram has been set by the parameter there is no END instruction in the subprogram Write END instruction at the end of program 9 ERROR CODE LIST MELSEC A Table 9 1 Error Code List for the An AnN A3H A3M A3V A0J2H AnS A2C A73 A52G A1FX and A3N board Continue Error Message pies n Error and Cause Corrective Action CAN T 13 Stop There is no jump destination or Read the error step by use of EXECUTE P multiple destinations specified by peripheral equipment and correct the Checked at the SCJ CALL program at that step the execution of CALLP JMP instruction Insert a jump destination or reduce instruction There is a CHG instruction and multiple destinations to one no setting of subprogram Although there is CALL instruction the RET instruction exists in the program and has been executed The CJ SCJ CALL CALL P or JMP instruction has been executed with its jump destination located below the END instruction The number of the FOR instructions is different from that of the NEXT instructions A
187. S3 A2S S1 8 5 ms Sos 73 A3N board 8 5 ms 37 ms A3H A3M 4 1 ms 10 4 ms A2A S1 20 A2AS S1 S30 S60 2 9 ms 12 9 ms A3U 4 A3A 2 2 ms 9 7 ms A2USH S1 A2USH board A1SH A1SJH 1 5 ms 3 8 ms A2SH S1 1 4ms 3 0 ms A1FX 1 4ms 3 0 ms Q02 4 6 ms 6 1 ms Q02H Q06H 1 7 ms 2 3 ms 11 ms 21 ms 1 3 ms 4 5 ms Set the watch dog timer of programmable controller CPU after considering the above increase in scan time 7 118 7 APPLICATION INSTRUCTIONS 7 10 4 Sampling trace set reset ieee STRA STRAR MELSEC A A2USH 2 QCPU A A Mode 1 2 A 1 Unusable with A1N Remark eme 2 Unusable with A1 Available Device Bit device Carry flag Error flag Word 16 bit device Constant Pointer Level E Digit specification Index W R Ao H P 1 T C D M9012 M9010 M9011 Execution of sampling trace Reset of sam pling trace Functions Sampling trace command Reset command STRA 1 6 When M9047 is switched on the sampling trace data specified by the peripheral device is stored to the dedicated memory area the specified number of times After the specified number of times is reach
188. Stores the number of vacant registration areas for communication requests executed to remote terminal modules connected to MINI S3 link module A2C and A52G A2USCPU S1 A2USHCPU S1 Usable with AnA A2AS QCPU A A Mode AnU A2C and A52G Stores the final station number of remote I O modules and remote terminal modules connected to A2C and A52G Sets the time check time of the data link instructions for the MELSECNET 10 Setting range 1 5 to 65535 5 1 to 65535 Setting unit 15 Default value 10 s If 0 has been set default 10 s is applied Usable with A2C and A52G Usable with AnU and A2AS QCPU A A Mode Unusable with AnA A2AS QCPU A A Mode and AnU Usable with AnA A2AS QCPU A Mode AnA board and AnU Unusable with AnA A2AS QCPU A Mode AnA board and AnU For details refer to the manual of each microcomputer program package Stores the detail code of cause of an instruction error For details refer to the manual of each microcomputer program package APP 24 APPENDICES MELSEC A Table 1 4 Special Register List Continue Applicable CPU SFC program D9091 detail error number 2 3 Changed I O 09094 module head address Operation state of the A3VTS System and A3VCPU Dip switch information A3VCPUA Self check error A3VCPU B Self check error A3VCPU C D3099 Self
189. The PC CPU uses these areas when the RFRP instruction only is used So be sure to set the range of master to remote station link registers 2 Remote Master station station SSS RFRP instruction Data Use link registers W Assignment of remote station to master station link register Control of OS e Use link registers 7 Assignment of remote station to DDPDDDDP PPL Py The number of points which is equal to the number of special function modules of remote I O stations are required 7 APPLICATION INSTRUCTIONS MELSEC A 7 9 Display Instructions 1 Display instructions are used to output ASCII codes to the output modules to display data on the LED display on the front panel of the CPU module and to reset the annunciator 2 The display instructions are available in the following seven types Classification Instruction Symbol Ref Page PR 7 94 PRC 7 94 ASCII code output Display Display reset The LEDA and LEDB instructions cannot be used with the A3A A3U and 4 Their use is changed to the start command for dedicated instructions To perform processings equivalent to the LEDA and LEDB instructions with the A3A A3U and AAU edit character string data using dedicated instructions provided for the AnA AnU before using the LED instruction 3 The priority of display at the LED indicator is as indicated be
190. a 25 Resets output after the input condition is enabled and stops the Stop STOP STOP H sequence program The sequence 1 5 37 program is resumed by setting the RUN key switch to RUN No No operation xig a For program erasure space 1 5 39 1 For the number of steps when extension devices are used or when index qualification is performed to bit devices for AnA A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 1 2 The A mark in the Index column indicates that index qualification can be performed with the AnA A2AS AnU QCPU A A Mode and A2USH board only 3 The A mark in the Subset column indicates that subset processing can be performed with the A3H AnA A2AS AnU QCPU A A Mode and A2USH board only 2 INSTRUCTIONS MELSEC A 2 2 3 Basic instructions 1 Comparison instructions Table 2 10 Comparison Operation Instructions Continue i Exe
191. aadal en ensis trt 6 82 6 7 2 Link refresh enable disable El DI 6 84 6 7 9 Partialirefresh SEQ c run itte echt e rte ede PUER 6 87 APPLICATION esee nennen nnn natn nan tn nass tasa tn nasa 7 1 7 133 7 1 Logical Operation 1 nennt 7 2 7 1 1 16 32 bit data logical product WAND WANDP DAND 7 3 7 1 2 16 32 bit data logical add WOR WORP DOR DORP 7 7 7 1 3 16 32 bit data exclusive logical add WXOR WXORP DXOR 7 11 7 1 4 16 32 bit data NOT exclusive logical add WXNR WXNRP DXNR DXNRP 7 15 715 BIN 16 bit data 2 s complement NEG 7 19 storie Mtem ee cae eee ne es a hee vane Heep 7 21 7 2 1 16 bit data right rotation ROR RORP PCRP 7 22 7 2 2 16 bit data left rotation ROL ROLR RCL 7 24 7 2 8 32 bit data right rotation DROR DRORP 7 26 7 2 4 32 bit data left rotation DROL DROLP DRCL DRCLP
192. and the error flag turns on e n in other than 0 to 8 e 0 exists in all devices from S to 2n when the encode instruction is used Program Examples DECO Coding K 0 LD MO i DECO X000 H 1 DECOP X000 M10 K3 10 END Data X2 X1 X0 1 1 1 When 3 is specified at X0 to 2 When 8 is specified at effective bits 256 points are occupied 1265 an n tw 0 K 1 Decode result When 3 is specified as effective bits 8 points are occupied v M13 at the third position from M10 turns on ENCO xn Coding P K 0 LD X00C 0 ENCO M10 D8 3 E H 1 ENCOP M10 D8 K3 CIRCUIT END 10 END When 8 is specified as effective bits 256 points are occupied ues NT D L 0 0 0 S 0 0 0 0 0 0 0 0 ip 0 0 0 When 3 is specified as effective bits 8 points are occupied Device D8 L 1 Encode result Which point counting from M10 is on is stored in BIN 7 APPLICATION INSTRUCTIONS SEG MELSEC A AnU A2AS 744 7 segment decode ADUSH S1 i A2USH board A0J2H Applicable QCPU A CPU A Mode a N Remark Valid only when special relay M
193. bit device Constant Pointer Level 9 E 9 28 2 M9012 M9010 9011 D 0 0 0 0 0 0 Shift commands Indicates the instruction symbol BSFR BSFL Setting data Head number of device which stores data to be shifted Number of shift device Functions BSFR Shifts n bits which begins with the bit device specified at D to the right by one bit Shift range n points ra gt D n 1 D n 2 1 D Before execution Sy K EN MCN E Carry flag 0 is enterederea N ost g M901 x a M9012 After execution i BSFL Shifts n bits which begin with the bit device specified at D to the left by one bit Shift range n 4 D n 10 2 1 Before execution P di g 4 Carry flag Je 74 rag 0 is entered M9012 7 Y After execution Execution Conditions ON Shift command OFF Executed Executed per scan per scan K P x __ Executed Executed only once only once 7 APPLICATION INSTRUCTIONS MELSEC A Operation Error In the following case operation er
194. cannot be used a program which outputs a pulse signal during one scan In this case output Y must be changed to direct mode or add the partial refresh command as shown below Direct mode Refresh mode M9036 0 dE T N9052 stc K1B1 0 SET Y10 xo 11 SET Y10 RST Y10 sec K4Y10 K1B1 RST Y10 3 END SEG K4Y10 K1B1 REMARK The number of steps is 3 when any of the following devices is used SET instruction Special relay M Link relay B Annunciator F RST instruction Special relay M Word devices All 5 SEQUENCE INSTRUCTIONS Program Examples SET RST MELSEC A 1 Program which sets turns on Y8B when X8 turns on and which resets turns off Y8B when X9 turns on X009 o RST YO8B X008 2 SET 8 Coding 0 LD RST LD SET END X8 SET input OFF NN X9 RST input OFF X009 Y08B X008 Y08B Y8B OFF 2 Program which sets the content of data register to 0 X000 K4 o DM UE X005 6 RST D8 When X5 turns on the content of De8issettoO Coding 0 LD X000 1 MOV K4X010 D8 6 LD X005 7 RST D8 10 END 5 SEQUENCE INSTRUCTIONS 3 Program which resets the 100ms retentive timer and counter X004 K18000 0 225 1225 turns on after X4 has been on for 30 minutes T225 K16 2 C23
195. case the value monitored is 15 T200 started by the main sequence program does not time out while the subsequence program is running Operation It times out on the following condition when the main sequence program is run again Present value lt 0 set value lt present value Uatatalatatalalatalatatatalal PADDR AADA 6 BASIC INSTRUCTIONS MELSEC A Execution of OUT Instruction Used with CHG Instruction When the CPUs with which the CHG instruction can be used are used the coil switched on off in the main sub sequence program remains unchanged during sub main sequence program run even if its input condition changes The following program is written after the main sequence program and the same coil is not used in the subsequence program Ladder example YO7O Main sequence program run Subsequence Timing chart program run Y70 is switched on off when is switched on off during main sequence program run Y70 remains unchanged if is switched on off during subsequence program run Operation 6 BASIC INSTRUCTIONS Program Examples P1 CHG MELSEC A The following programs are used with the A3CPU and other types of CPUs to output pulses in accordance with the input condition of the PLS instruction while alternately running the main and subprograms 1 For A3CPU It is necessary to compare the ope
196. converted into ASCII code and stored into the D88 to 91 Eight characters to P are converted into ASCII code and stored into the D92 to 95 D88 D92 7 APPLICATION INSTRUCTIONS MELSEC A 7T 5 FIFO Instructions The FIFO instructions perform the write and read of data to and from the FIFO table Classification Instruction Symbol Ref Page FIFW 7 54 FIFWP 7 54 FIFR 7 54 FIFRP 7 54 Write Read 7 APPLICATION INSTRUCTIONS MELSEC A 751 FIFO table write read FIFW FIFWP FIFR FIFRP CPUs Available Device t S L IES 28 Bit device Word 16 bit device Constant Pointer Level 8 3 5 L 5 B F T DW 2 V K H P 1 5 M9012 M9010 M9011 O O O O O 0O 0O 0O 0O 0O 0O 0O 0O 0O 0O 0O 0 O 5 FIFW D 0O 0O0 0O 0O O K1 5 B FIFR Indicates the instruction symbol Read commands FIFW FIFR Setting data Data to be written to FIFO table or head number of device which stores data Device number which will store data read Head device number of FIFO table Functions FIFW 1 Performs the following actions 1 Stores the data specified at S into the data table of FIFO table The st
197. destination pointer P 1 The RET i instruction was included in the program and executed though the CALL instruction was not given 2 The NEXT LEDA B BREAK instructions were included in the program and executed though the FOR instruction was not given 3 Nesting level of the CALL CALLP and FOR instructions is 6 levels or deeper and the 6th level was executed 4 There is NEXT instruction at execution of the CALL or FOR instruction 1 Read the error step using a peripheral device check contents and correct program of the step 2 Reduce the number of nesting levels of the CALL CALLP and FOR instructions to 5 or less The CHG instruction was included in the program and executed though no sub program was provided Read the error step using a peripheral device and delete the instruction circuit block 1 LEDA B IX and LEDA B 1 instructions are not paired 2 There are 33 or more sets of LEDA B IX and LEDA B IXEND instructions 9 15 1 Read the error step using a peripheral device check contents and correct program of the step 2 Reduce the number of sets of LEDA B IX and LEDA B
198. device Constant Pointer Level 9 o 2 M9012 M9010 9011 n 1 Left rotation commands Indicates the instruction symbol DROL DROL Setting data Number of times 0 to 31 Functions DROL Rotates the data of AO and 1 n bits to the left without including the carry flag Al AO Carry flag lt 8 M9012 b31 b30 b29 228 b17 616 p15 614 b3 2 b0 n bit rotation DRCL Rotates the data of and 1 n bits to the left including the carry flag The carry flag is 1 or 0 depending on the status prior to the execution of DRCL Al AO Carry flag b31 b30 629 b28 527 b18 b17 616 615 514 b5 b4 b3 b2 bl 9012 n bit rotation en ON Execution Conditions Left rotation command OFF Executed Executed per scan per scan xy gt A kT P Executed gt _ _ Executed only once only once 7 APPLICATION INSTRUCTIONS Program Examples DROL MELSEC A Program which rotates the contents of AO and 1 three bits to the left when XC turns on X00A
199. extended due to momentary power failure occurred during scanning 9 17 1 Calculate and check the scan time of user program and reduce the scan time using the CJ instruction or the like Monitor contents of special register 09005 using a peripheral device If the contents are other than 0 power supply voltage may not be stable Check power supply and reduce variation in voltage MELSEC A 9 ERROR CODE LIST Error Massage END NOT EXECUTE Checked at execution of the END instruction MAIN CPU DOWN UNIT VERIFY ERR Checked continuously FUSE BREAK OFF Checked continuously Table 9 3 Error Code List for ANACPU and Board Continue Error Code D9008 Detailed Error Code D9091 CPU States Stop or Contin ue set by para meter Stop or Contin ue set by para meter Error and Cause Whole program of specified program capacity was executed without executing the END instructions 1 When the END instruction was to be executed the instruction was read as other instruction code due to noise The instruction changed to other instruction code due to unknown cause The main CPU is malfunctioning or faulty Current module information is different from that recognized when the power was turned on 1 The I O module including special function modules connection became loose or the mod
200. given 2 There are 7 or more check condition circuits in the LEDA CHKEND instructions The check condition circuits in the LEDA CHKEND instructions are written without using X and Y contact instructions or compare instructions The check pattern circuits of the LEDA CHKEND instructions are written with 257 or more steps 9 16 9 ERROR CODE LIST Error Massage CAN T EXECUTE 1 Checked at occurrence of interrupt Table 9 3 Error Code List for ANACPU and Board Continue Error Code D9008 Detailed Error Code D9091 CPU States Error and Cause The IRET instruction was given outside of the interrupt program and was executed There is no IRET interrupt program instruction in the Though an interrupt module is used no interrupt pointer 1 which corresponds to the module is given in the program Upon occurrence of error the problem pointer I number is stored at D9011 Corrective Action Read the error step using a peripheral device and delete the IRET instruction Check the interrupt program if the IRET instruction is given in it Write the IRET instruction if it is not given Monitor special register D9011 using a peripheral device
201. ii loniae R 7 92 7 9 1 ASCII code print instructions PR 7 94 7 9 2 ASCII code comment display instructions LED LEDC 7 100 7 9 3 Character display instructions LEDB 7 103 7 9 4 reset instruction LEDR esee 7 105 7210 Other Instructions hin etre ot han Ghee bate od ee dtu eld 7 108 7 10 1 WDT reset WDT nnns sinn 7 109 7 10 2 Specific format failure check CHK sssssssssssseseseeeeeen enne nenne 7 111 7 10 3 Status latch set reset SLT nnns 7 117 7 10 4 Sampling trace set reset STRA 7 119 7 10 5 Carry flag set reset STC nennen 7 121 7 10 6 Pulse regeneration instruction DUTY ssessseeeem ene 7 123 7 11 Servo Program Instructions 7 125 7 11 1 Servo program start 7 126 7 11 2 Present position data and speed change instruction DSFLP 7 130 8 MICROCOMPUTER e de 8 1 8 16 8 1 Spec
202. indicated on the CPU front LED display A73 and A3N board Unusable with 2 data read OFF No processing Reads clock data to D9025 D9028 in BCD when An A3H A3M ON Read request M9028 is on A2C and 2 M9029 on in the sequence program to process all data communication requests which have been received in the entire scan during END process of Data the scan 2 communication OFF No batch process The data redu st batch process Usable with AnU request batch ON Batch process and A2US H procs be turned on or off during operation OFF in default state Each data communication request is processed at the END process in the order of reception APP 2 APPENDICES Table 1 1 MELSEC A Special Relay List Continue Applicable CPU 0 05 M9030 0 1 second clock Seconds 0 05 seconds 0 1 0 2 second clock seconds 0 1 Seconds 0 5 seconds 0 5 seconds 1 second 1 second 1 second clock M9033 2 second clock 036 Normally ON Normally OFF On only for 1 scan after run 30 seconds 30 seconds O M9037 N FF N FF ON OFF 41 scan RUN flag off only for 1 scan after run coil contact Stop status contact opr sean OFF OFF PAUSE disabled ON PAUSE enabled OFF Not during pause ON During pause OFF Not during stop ON During stop M9040 M90
203. is contained in the MC instruction such EI and DI are executed without regard to execution of the MC instruction Operation Error If the IRET instruction is executed prior to the run of interrupt program the PC stops its operation Sequence program IRET When IRET instruction is executed PC stops operation e Interrupt program 6 BASIC INSTRUCTIONS MELSEC A Program Example EI DI Disable enable program of the run of interrupt program by DI and EI X000 0 CJ P10 H 4 DI Enables execution of interrupt program when is on and P10 X000 d disables execution of interrupt 5 CJ P20 program when is off 10 EI HJ P20 X003 3 Coding LD X000 1 CJ P10 4 Dl 5 P10 6 LDI X000 7 P20 10 EI 11 P20 12 LD X003 6 BASIC INSTRUCTIONS MELSEC A 6 5 4 Microcomputer program call SUB SUBP Applicable A2USH boardAOJ2H X Remark The SUB instruction of the AnA 2 5 AnU QCPU A A Mode and A2USH board becomes the 16 bit constant setting instruction in the extension application instructions For details refer to the ANSHCPU AnACPU AnUCPU Programming Manual Dedicated Instructions Available Device Bit device Word 16 bit device Constant Po
204. is not provided with data link 4 Specified station number is not of the local station Operation error b If the LRDP instruction is executed with a local station operation error occurs Execution Conditions ON Read command OFF LRDP Executed only once Operation Errors In the following cases operation error occurs and the error flag turns ON e The station number specified at n1 is not of a local station n2 points starting at S exceed the specified device range Specification of n2 is other than 1 10 32 If the CPU to execute the LRDP instruction is not for data link operation or if the mode switch of the link card is set offline no operation error occurs and only M9200 LRDP instruction acceptance flag is turned on Processing of the LRDP instruction is not performed 7 APPLICATION INSTRUCTIONS MELSEC A LRDP A program to store data of 03 to D8 of the 3rd local station in 099 to 0104 of the master station when X3 is ON Program Examples Provide interlock using the LRDP instruction execution flag If the LWTP instruction is used to the same station provide interlock using the LWTP instruction execution flag Use a pulse signal for this command 1 X003 0 PLS M1 UM When is ON turns ON 40 SET MO M9200 M9201 M9202 M9203 If the LRDP and LWTP instructions ar
205. logical S m WXNRP WxNRP 51 52 7 o O 7 15 a DXNR DXNR 5 7 15 B D 1 D XOR S 1 S 0 1 D DXNRP DXNRP 5 7 15 25 NEG NEG D 7 19 2 ment 2 0 D gt D 7 NEGP D 3 e 7 19 1 For the number of steps when extension devices are used or when index qualification is performed to bit devices for AnA A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 1 2 The A mark in the Index column indicates that index qualification can be performed with the AnA A2AS AnU QCPU A A Mode and A2USH board only 3 The A mark in the Subset column indicates that subset processing can be performed with the AnA A2AS AnU QCPU A A Mode and A2USH board only 2 17 2 INSTRUCTIONS MELSEC A 2 Rotation instructions Table 2 18 Rotation Instructions x 9
206. m S i DTOP nl n2 1 DTOP A 11 Dedicated to A2C and A52G 7 67 7 NEXT instructions Table 2 23 NEXT Instructions A Execu x oO Classi Instruction i og a fication 5 Symbol Symbol Contents of Processing tion Con 2 615 2 Applicable CPU Page dition Eu 25 2 3 FOR 7 77 Repeti FOR n Executes the program area between FOR and NEXT tion times 2 NEXT 1 A 7 77 8 Local remote station access instructions Table 2 24 Local Remote Station Access Instructions x oO Classi Instruction 295 0 fication 5 Symbol Symbol Contents of Processing tion Con 2 98 Applicable CPU Page dition 25 berg LRDP trop ni Reads data from the local station A le 7 80 data read R write LWTP wre nl D n2 Writes data to the local station A 1 e O 7 80 o Remote Reads data from the special RERP nl 2 D n3 function module in the remote 1 e Not applicable to 7 86 station station mi e W d h I fi read 2 flag eps as rites data to the special func
207. main sequence program and the other for the subsequence program In these areas the set value of the timer not in use 15 0 The set value of 0 is regarded as infinite and the timer does not time out When the main sub sequence program is switched to the sub main sequence program by the CHG instruction after the timer in the main sub sequence program has started timing the timer does not time out during execution of the sub main program because the timer set value specified in the main sub program is in the sub main program timer set value storage area The following program is written after the main sequence program and the same timer number is not used in the subsequence program Ladder example K15 1 1 5 lt 20 mea 40 mg 60 ms Main sequence FA program run m Subsequence END END END CHG END END i T2 il T200 coil is not switched off as ers 29 eol OUT T200 is not executed when Timing chart is switched off 1 10ms timer tim 6 6 6 4 6 ing value T200 contact OFF 0 8 4 2 2 4 6 20 6 26 6 32 6 38 6 44 4 48 6 T200 present 25 7 i12 214 20 7 26 7 32 7 38 8 7 54 value I The timer does not time out as the set value in the sub sequence program is 0 The timer times out as the set value is greater than the present value In this
208. microcomputer program area of the CPU using the system floppy disk for a peripheral device which has microcomputer mode 1 Processes from writing the source program to storing it in the microcomputer program area The flow chart below describes processes from writing the source program to storing itin the microcomputer program area in the CPU using the CP M 86 which is booted with the SW C BAS type GPP BASIC package Insert the SW _ C BAS system disk in drive of the AGGPP to boot CP M 86 CP M 86 system booting Write the source program using the ED text editor command Assemble the source Use the ED command to write the source program in the 8086 assembly language and to store it on a user s floppy disk File identifier ASM Assemble the source program written in assembly language program using the ASM86 assembler command Generate the load program using the GENCMD CMD file generation command and generate the object program using the 86 command File identifier HEX Use the GENCMD command to generate the load program from the object program which can be executed File identifier COM Y Unite the microcomputer program with the sequence program using the UPC unite command Unite the load program which can be executed with the sequence program and store it on a user s floppy disk using the UPS command 2 Precautions on preparing t
209. no operation instruction and has no effect on the previous operation 2 The NOPLF instruction is used to specify page and at a desired point during the GPP printer output operation 1 For printing ladder diagrams Page is changed if the NOPLF instruction is given at the end of each ladder block The NOPLF instruction given in a ladder block is ignored The NOPLF instruction given in a ladder block is handled as follows if conversion is performed in the ladder mode of the GPP Deleted when the number of steps increses Converted to NOP when the number of steps decreases 2 For printing instuction lists Page is changed after NOPLF is printed 3 For the GPP printer output refer to the Operating Manual for peripheral devices 5 SEQUENCE INSTRUCTIONS Program Examples NOP 1 Program which stops the PC when X8 turns on Before change X008 Y096 Codi 0 A Yo gt Coding LD AND 0 1 Changed to NOP 2 ANI 3 OUT 4 END After change Coding LD NOP 0 2 ANI X008 Y096 ERE 3 OUT 0 YO1 gt 4 END MELSEC A X008 Y097 Y096 Y012 X008 Y096 Y012 2 Short of contact LD 101 If LD or LDI is changed to NOP the circuit changes completely Therefore caution should be exercised Before change X000 Coding 0 016 1 OUT T3 2 D 2 Muss 3 AND 4 OUT 5 Changed to After change Coding 0 x Y016 RS AND
210. number of ON times of T225 is counted RST T225 When T225 has turned on T225 is reset C23 7 055 When C23 has counted up Y55 turnes on X005 9 RST C23 H When X5 turns on C23 is reset Coding 0 LD X004 1 OUT T225 K18000 2 LD T225 3 OUT C23 K16 4 RST T225 7 LD C23 8 OUT 055 9 X005 10 RST C23 13 END 5 SEQUENCE INSTRUCTIONS 5 3 3 Edge triggered differential output MELSEC A PLS PLF All CPUs Available Device gt x S oo e x ss 5 Bit device Word 16 bit device Constant Pointer Level 9 3 2 5 5 M9012 9010 9011 1 0 1 Index qualification can used with AnA A2AS AnU QCPU A Mode and A2USH board only PLS command Function PLS Setting data Device number to be con PLF command verted into pulse 1 When the PLS command changes from Off to On the specified device goes On for 1 scan and when the PLS command is in a state other than Off On Off gt Off On On On Off the device goes Off If there is one PLS instruction from the specified device D within 1 scan the specified device goes On for 1 scan See Section 3 9 concerning operation in the case that the PLS instruction from the same device is
211. obtain advice SP UNIT DOWN Though an access was made to a special function module at execution of the FROM TO instruction no response is received If parameter I O assignment is being executed no response is received from a special function module at initial communication At error occurrence the head I O number upper 2 digits of 3 digits of the special function module that caused error is stored at 09011 Since it is hardware error of the special function module to which an access was made consult Mitsubishi representative LINK UNIT ERROR Contin ue Two of data link module is specified as master stations Specify one of data link module as a master station and another as a local station I O INT ERROR STOP Though the interrupt module is not loaded an interrupt occurred Since it is hardware error of a module replace and check a defective module For defective modules consult Mitsubishi representative 9 ERROR CODE LIST Error Massage SP UNIT LAY ERR Table 9 5 Error Code List for the QCPU A A Mode Continue Error Code D9008 Detailed Error Code D9091 CPU States Error and Cause A special function module is assigned as an I O module or vice versa in the assignment using parameters from the peripheral device Corrective Action Execute assignment again using parameter
212. of local stations is set at 0 Read the error step using a peripheral device and check and correct contents of the dedicated instruction for special function modules of the step 1 Write in parameters again and check 2 Check setting of station numbers 3 If the same error indication is given again it is hardware failure Consult Mitsubishi representative OPERATION ERROR Checked at execution of instruction Stop or Contin ue set by para meter When file registers R are used operation is executed outside of specified ranges of device numbers and block numbers of file registers R 2 File registers are used in the program without setting capacity of file registers Combination of the devices specified by instruction is incorrect Stored data or constant of specified device is not in the usable range Set number of data to be handled is out of the usable range 1 Station number specified by the LEDA B LRDP LCDA B LWTP LRDP LWTP instructions is not a local station Head number specified by LEDA B RFRP LEDA RTOP RTOP instructions is not of a remote station Head I O number specified by the LEDA B LEDA B RTOP RFRP RTOP jinstructions is not of a special function module Read the error step using a per
213. of station numbers When the error is displayed again it is hardware error Therefore consult Mitsubishi representative OPERATION ERROR Checked during execution of instruction Continue The result of BCD conversion has exceeded the specified range 9999 or 99999999 Operation impossible because specified device range has been exceeded File registers used in program without capacity setting Operation error occurred during execution of the RFRP LWTP LRDP instruction Read the error step using peripheral devices and check the program at the error step and correct it Check the specified device range BCD conversion or the like MELSEC A 9 ERROR CODE LIST Table 9 1 Error Code List for the An AnN A3H A3M A3V A0J2H AnS A2C A73 A52G A1FX and Error Message Error Code D9008 CPU States A3N board Continue Error and Cause Corrective Action MAIN CPU DOWN Interrupt fault AnNCPU only 60 Stop INT instruction processed in microcomputer program area CPU malfunction due to noise Hardware error of CPU module Because the INT instruction cannot be used in the microcomputer program remove it Take measures against noises Replace the CPU module BATTERY ERROR Checked at power on Continue The battery voltage has dropped to
214. of the device specified at S into BCD and transfers the result to the device specified at D 5 1 Upper 16 bits S Lower 16 bits QW NN QN NN QN NN NN NN NN NN QN QN NN NN A S side BIN 99999999 0 00 0 0 1 0 1 1 1 11 0 1 01 1 1 1 0 0 0 O O 1 1 1 1 1 1 1 1 Y ES A Be sure to set to 0 Upper 5 bits BCD conversion e a pd x x x X 104 x x 102 x 101 1 lt 00 INAO 00 NAO c D side BCD 99999999 1 0 0 1 1 0 0 1 1 0 0 1 1 001 1 0 0 1 1 0 0 1 1 00 1 1 000 1 Y Y Y Y Y y o o 5 n o c 2 2 Se Poe 884 So Be gt o 25 25 255 do 925 355 z zo 5 ao 5 5 c c 5 T 5 T gt D 1 Upper 4 digits D Lower 4 digits Execution Conditions ON BCD conversion command OFF Executed Executed per scan per scan gt Executed Executed only once only once Operation Errors In the following case operation error occurs and the error flag turns on When BCD instruction is used The data of source S is outside the range of 0 to 9999 When DBCD instruction is used The data of source S is outside the r
215. on whether or not a tier three station has received M9247 Data unreceived ON Unreceived data from its master station in a three tier system Loopback execution OFF Received Depends on whether or not link parameters have been M9250 Parameter unreceived ON Unreceived received from the master station OFF Normal M9251 Link break Depands on the data link condition at the local station ON Break OFF Unexecuted ES Depends on whether not the local station is executing M9252 Loop test status ON Forward or reverse loop test forward or a reverse loop test is being executed operating status ON STOP or PAUSE mode PAUSE mode other local stations ON STOP or PAUSE mode is in STOP or PAUSE mode local stations ON Error is in error APP 15 APPENDICES MELSEC A Appendix 1 3 Special Registers Special registers are data registers of which applications have been determined inside the PC Therefore do not write data to the special registers in the program except the ones with numbers marked 2 in the table Table 1 4 Special Register List When fuse blown modules are detected the lowest number of detected units is stored in hexadecimal Example When fuses of Y50 to 6F output modules have Unusable with blown 50 is stored in hexadecimal To monitor the AQJ2H D9000 Fuse blow Fuse blow module number by peripheral devices perform monitor operation On
216. or Contin ue set by param eter Error and Cause When using MELSECNET 10 1 The contents of the network parameters for the third link unit written from a peripheral device differ from the actual network system 2 The link parameters for the third link unit have not been written 3 The setting for the total number of stations is 0 When using MELSECNET 10 1 The contents of the network parameters for the fourth link unit written from a peripheral device differ from the actual network system 2 The link parameters for the fourth link unit have not been written 3 The setting for the total number of stations is 0 A link parameter error was detected by the CC Link module Corrective Action 1 Write the parameters again and check 2 Check the station number settings 3 Persistent error occurrence may indicate a hardware fault Consult your nearest Mitsubishi representative explaining the nature of the problem OPERATION ERROR Checked at execution of instruction Stop or Contin ue set by param eter 1 When file registers R are used operation is executed outside of specified ranges of device numbers and block numbers of file registers R 2 File registers are used in the program without setting capacity of file registers Combination of the devices specified by instruction is incorrect Stored data or constant of spec
217. or more CC Link modules The CC Link dedicated command can be issued only to two or less CC Link modules 1 An instruction which cannot be executed by remote terminal modules connected to the MNET MINI S3 was executed to the modules 2 Though there are 32 entries of FROM instructions registered with a PRC instruction in the mailbox memory area waiting for execution another PRC instruction is executed to cause an overflow in the mail box memory area waiting for execution 3 The PIDCONT instruction was executed without executing the PIDINIT instruction The PID57 instruction was executed without executing the PIDINIT or PIDCONT instruction The program presently executed was specified by the ZCHG instruction 4 The number of CC Link dedicated command executed in one scan exceeded 10 1 Read the error step using a peripheral device and correct the program meeting loaded conditions of remote terminal modules 2 Use special register D9081 number of empty entries in mailbox or special relay M9081 BUSY signal of mail box to suppress registration or execution of the PRC instruction 3 Correct the program specified by the ZCHG instruction to other 4 Set the number of CC Link dedicated commands executed in one scan to 10 or less MAIN CPU D
218. per scan lt f gt Executed x _ Executed only once only once Program Examples Program which adds the content of AO to the content of D3 and outputs the result to Y38 to 3F when X5 turns on Coding X005 P K2 LD X005 o D8 A0 9038 H 1 D3 A0 K2Y038 8 END Program which outputs the difference between the set value and present value timer T3 to Y40 to 53 in BCD X003 K18000 Coding 0 T8 1 OUT T 9036 OU 2000 2 18000 T3 D3 ep M9036 e 3 P K18000 T3 D3 DBCD D3 vog 10 DBCD 03 K5Y040 19 END 6 12 6 BASIC INSTRUCTIONS MELSEC A 6 2 2 BIN 32 bit addition subtraction D D P D D P Applicable All CPUs CPU Available Device gt n gt 0 oo 2 xis E E Bit device Word 16 bit device Constant Pointer Level 8 3 9 2 X Y M L S B F T DW 2 V K H P 1 5 M9012 M9010 M9011 S 0 0O0 0O 0O 0O 0O 0O 0O O O 0O O O 0 K1 S1 0 0O0 0O 0O 0O 0O 0O 0O O O 0O O O to O Indicates the instruction symbol vi Addition subtraction commands Setting data Addend subtrahend or head device number stor ing addend subtrahend Head device
219. settings Persistent error occurrence may indicate a hardware fault Consult your nearest Mitsubishi representative explaining the nature of the problem A ink parameter error was detected by the CC Link module 1 2 Write the parameters in again and check If the error appears again there is a problem with the hardware Consult your nearest System Service sales office or branch office MELSEC A 9 ERROR CODE LIST MELSEC A Table 9 4 Error Code List for the AnU A2AS and A2USH board Continue Detailed CPU Error Massage Code Error and Cause Corrective Action D9008 Code States D9091 OPERATION 50 501 Stop or 1 When file registers R are used Read the error step using a peripheral ERROR Contin operation is executed outside of device and check and correct program Checked at ue set specified ranges of device of the step execution of by numbers and block numbers of instruction para file registers R meter 2 File registers are used in the program without setting capacity of file registers 502 Combination of the devices specified by instruction is incorrect 503 Stored data or constant of specified device is not in the usable range 504 Set number of data to be handled is out of the usable range 505 1 Station number specified by the LEDA B LRDP LCDA B LWTP LRDP LWTP instructions is not a local station 2
220. station Head address inside intelligent RFRP module which stores data to be read Write command Address inside special function module where data will be written RTOP Head number of link register which will store read data Head number of link register which stores data to be written Number of data read written 1 to 16 REMARK e n1 is specified by the head number of special function module when viewed from the master station Example Remote station No 2 is assigned by parameters to X100 to X17F and Y140 to Y190 X000 X010 X020 X030 040 060 5080 Y090 Station to to to to to te to to No 2 XOOF 1 X02F 05 07F YO8F 9 numbers of the station E E E E 5222 222 2 19 lt amp c a H To other station numbers viewed from the master station X100 X110 X120 X130 140 160 180 190 to to to to to to to i To other station X Use these in the RFRP RTOP instructions Head number H140 7 APPLICATION INSTRUCTIONS MELSEC A Functions RFRP Execution Conditions Operation Errors 1 Read command OFF RFRP Stores data of n3 points from the address specified at n2 of buffer memory in the special function module specified at the number in the remote station assig
221. station specified at n1 to the devices starting with the one specified at D of the master station Local station No n1 Master station Device specified at S Device specified at D gt n2 points gt gt n2 points Transfer 2 When the LRDP instruction is being executed M9200 of the master station turns ON When the execution is completed M9201 of the master station turns ON Since M9200 and M9201 remain ON after the completion of execution turn them off by the sequence program 7 APPLICATION INSTRUCTIONS MELSEC A 3 It is impossible to execute 2 or more LRDP instructions simultaneously or to execute the LRDP instruction and the LWTP instruction simultaneously to one local station Provide interlock using M9200 M9201 M9202 and 9203 so that the LRDP instruction and or the LWTP instruction may not be executed during the data read from local stations by the LRDP instruction Read command M9200 M9201 M9202 M9203 K K 6 1 3 D3 099 4 Values of D9200 of the master station indicate the execution result of the LRDP instruction as mentioned below D9200 value Execution result 0 Normally completed Device setting error Operation error Devices specified at S or D exceed the device range of the master or local 2 stations e value is other than 1 to 64 n2 value is other than 1 to 32 3 Specified local station
222. subsequence programs Input condition X000 Inter lock Timing chart instruction execution in main sequence program Main sequence program Subsequence program CHG instruction execution in subsequence program instruction execution in main sequence program Main sequence program Subsequence program instruction execution in subsequence program No switching between the main and subsequence programs 4 5 11 No switching between the main and subsequence programs 4 5 11 Operation depending on ON OFF of instruction is executed every scan and switches between the main and subsequence programs 2 3 7 8 9 10 The main sequence program is only switched to the subsequence program then back to the main sequ ence program on the first leading edge of the CHG instruction execution command 2 Switched between the main and subsequence prog rams 1 6 12 Switched between the main and subsequence prog rams 1 6 12 Remarks Ladder example When the CHG instruction is executed END processing e g timer timing counter counting WDT reset is performed for the current program and operation is started from step 0 of the other program
223. the ON OFF data of the specified device and use the data as an operation result AND ANI 1 AND is the NO contact series connection instruction and ANI is the NC contact series connection instruction They read the ON OFF data of the specified device performs the AND operation of that data and the previous operation result and use it as a new operation result 2 There are no restrictions on the use of AND and ANI However the following conditions are provided in ladder mode on the GPP 1 Write When AND or ANI is connected serially a circuit of up to 21 stages can be written 2 Read When AND or ANI is connected serially a circuit of up to 24 stages can be displayed at one time if a circuit has 25 or more stages stages 1to 24 are displayed at one time 5 SEQUENCE INSTRUCTIONS MELSEC A OR ORI 1 ORis the parallel connection instruction of one contact A and ORI is the parallel connection instruction of one contact B They draw the ON OFF data of the specified device performs the OR operation of that data and the previous operation result and use it as a new operation result 2 There are no restrictions on the use of OR and ORI However the following conditions are provided in ladder mode on the GPP 1 Write A circuit in which up to 23 ORs or ORIs are connected consecutively may be written 2 Read A circuit in which up to 23 ORs or ORIs are connected consecutively may be displ
224. the gratis warranty term Mitsubishi shall not be liable for compensation to damages caused by any cause found not to be the responsibility of Mitsubishi chance losses lost profits incurred to the user by Failures of Mitsubishi products damages and secondary damages caused from special reasons regardless of Mitsubishi s expectations compensation for accidents and compensation for damages to products other than Mitsubishi products and other duties 5 Changes in product specifications The specifications given in the catalogs manuals or technical documents are subject to change without prior notice 6 Product application 1 In using the Mitsubishi MELSEC programmable logic controller the usage conditions shall be that the application will not lead to a major accident even if any problem or fault should occur in the programmable logic controller device and that backup and fail safe functions are systematically provided outside of the device for any problem or fault 2 The Mitsubishi general purpose programmable logic controller has been designed and manufactured for applications in general industries etc Thus applications in which the public could be affected such as in nuclear power plants and other power plants operated by respective power companies and applications in which a special quality assurance system is required such as for Railway companies or National Defense purposes shall be excluded from the programmable logic controller a
225. the status of the contact of an retentive timer does not change until the RST instruction is executed If T256 to T2047 are used with the AnA A2AS AnU QCPU A A Mode and A2USH board specify set values as described in Section 3 8 3 A negative number 32768 to 1 cannot be set as a set value When set value is 0 it is regarded as infinite and therefore the timer does not reach time out For the counting process of timers refer to the ACPU Programming Manual Fundamentals OUT C 1 When the operation result of the instructions preceding the OUT instruction have changed from OFF to ON 1 is added to the present value count value When the counter has counted out counted value set value the state of the contact is as indicated below NO contact Continuity NC contact Non continuity When the operation result of the instructions preceding the OUT instruction remain on counting is not performed It is not necessary to convert the count input into a pulse After the counter has counted out the count value and the status of contact do not change until the RST instruction is executed If C256 to C1023 are used with the AnA A2AS AnU QCPU A A Mode and A2USH board specify set values as described in Section 3 8 3 A negative number 32768 to 1 cannot be used as a set value When the set value is 0 the same processing as for 1 is performed For the counting process of counters refer to the ACPU Programmi
226. turns on and displays the ASCII data of D88 to 95 at the LED indicator on the front face of CPU when X16 turns on X008 _ ight ch AtoH 0 ASC 088 Eight characters A to are converted into ASCII code and stored into the D88 to 91 Eight characters to P are converted into s ASC 092 H ASCII code and stored into the 092 to 95 X016 _ ASCII data of 088 to 95 are displayed on 27 1 LED 088 H the LED indicator Coding 0 LD X008 1 ASC ABCDEFGH D88 14 IJKLMNOP D92 27 LD X016 28 LED D88 31 END LEDC Program which displays the comment of DO to D15 at intervals of 30 seconds M9036 K300 0 T5 H T5 30 seconds are counted 2 RST 5 r Z Comment of D 0 Z is displayed on the LED DO indicator on the front of the CPU INC 2 H When 5 turns from off to 2 1 is executed K 12H 16 7 H RST 7 H When Z 16 2 is set to 0 Coding LD M9036 1 OUT T5 K300 2 LD T5 3 RST T5 6 LEDC 004 9 2 12 LD K16 Z 17 RST Z 20 END 7 102 7 APPLICATION INSTRUCTIONS MELSEC A AnU A2AS 7 9 3 Character display instructions boardlAQJ2H LEDA LEDB CPU A ado a 2 1 only Remark 2 A3 only The LEDA LEDB instructions are used as the star
227. when XA turns on e Coding ird 010 D20 033 HOUR o 1 WXORP D10 D20 D33 8 END 4 Program which performs exclusive OR of the data of X10 to 1B and the data of 033 and sends the result to the Y30 to 3B when XA turns on Coding X010 K3 0 LD X010 0 L WXOR X010 D33 LEE 1 WXORP K3X010 D33 K3Y030 8 END 7 13 7 APPLICATION INSTRUCTIONS MELSEC A DXOR 1 Program which compares the 32 bit data of X20 to and the bit pattern of data of D9 and 10 and stores the number of different bits to D16 when X6 turns on Xi T ee pg q Exclusive OR of the 32 bit data of X20 to and a the data of D9 and 10 is performed P 4 Comparing 32 bit data of D9 and 10 the total SM PE a number of 1 bits is stored into AO P MOV 016 Data of AO is stored into 016 Coding 0 LD X006 1 DXORP K8X020 D9 10 DSUMP D9 13 MOVP D16 18 END 7 14 7 APPLICATION INSTRUCTIONS MELSEC A 7 1 4 16 32 bit data NOT exclusive logical add WXNR WXNRP DXNR DXNRP Applicable All CPUs CPU Available Device S L IES ES Bit device Word 16 bit device Constant Pointer Level 8 E 9 RE Xx Y IM L 5 B F T DW R 1 2 V K H P 1 5 M9012 M9010 M9011 K1 D 51 O O
228. 0 7144 59 2 59 5 44 5 44 3 FMOV SDn n 96 229 228 1029 33 8 34 5 25 4 25 4 96 229 228 1029 33 8 34 3 25 5 25 4 54 APPENDICES MELSEC A Table 2 2 Instruction Processing Time of Small Size Compact CPUs Processing Time us A2USH S1 A2AS 51 A2USH A2C A52G A0J2H 1 Instruction Condition board Refresh Refresh Refresh Refresh Refresh Refresh Mode Mode Mode Mode Mode Other than X 1 2 0 55 59 47 59 59 71 9 1 MOVP 1 2 0 55 59 47 59 59 71 8 9 DMOV 3 2 1 45 84 67 84 84 109 13 1 DMOVP 3 2 1 45 84 67 84 84 109 13 1 2 8 1 27 75 60 75 76 105 11 9 2 8 1 27 75 60 75 76 105 11 9 DXCH 4 2 1 82 134 107 134 134 177 21 7 DXCHP 4 2 1 82 134 107 134 134 177 21 7 CML 2 4 1 09 54 43 54 54 72 8 3 CMLP 2 4 1 09 54 43 54 54 72 8 3 DCML 3 2 1 45 93 74 93 94 136 15 1 DCMLP 3 2 1 45 93 74 93 94 136 15 3 5 Dn 96 72 32 73 499 399 499 501 8931 44 4 Dn 96 72 32 73 499 399 499 501 8931 44 5 96 32 14 65 286 229 286 286 1287 25 4 1 All the basic instructions indicated above are used without index qualification 2 When unexecuted any instruction is processed during the following time An A2C and A0J2H Number of steps 1 x 1 3 us AnN AnS A3V A73 and A3N board Number of steps 1 x 1 0
229. 0 Except below STOP instruction execution Remote RUN STOP by computer 0 RUN 1 STOP 2 PAUSE x When the CPU is in RUN mode and M9040 is off the CPU remains in RUN mode if changed to PAUSE mode APP 18 APPENDICES MELSEC A Table 1 4 Special Register List Indicates the setting of memory select One value of Usable with A1 0 to 2 is stored in BIN code and A1N Main program Indicates which sequence program is run presently One ROM value of 0 to 2 is stored in BIN code Unusable with A1 Main program 2 is not stored when AnS AnSH A1FX A0J2H A2C and A1N Subprogram RAM A2 A2N A2AS and 20 is used Main program ROM Main program RAM Subprogram 1 RAM Subprogram 2 RAM Subprogram 3 RAM Program number 5 Subprogram 1 ROM Subprogram 2 ROM Subprogram 3 ROM Main program Subprogram 1 E PROM A Subprogram 2 B Subprogram 3 If scan time is smaller than the content of 09017 the Minimum scan value is newly stored at each END Namely the Usable with all D9017 time SA z per 10 ms minimum value of scan time is stored into D9017 in BIN types of CPUs code 7 I IUS le with all D9018 Scan time Scan time per 10 ms Scan time is stored in BIN code at each END and always Usable with al rewritten types of CPUs
230. 000 P 1 d CHG instruction execution scan CHG instruction execution PA Main sequence fo Main sequence HEC ELM program run fi program run i f Subsequence 4 D 4 Subsequence 4 N Timing chart program run on Urs CHG instruction execution prograrytun se TIS instruction execution orF opel ON ON MOVP OFF MOVP OFF OFF MOVP instruction is not executed MOVP instruction is not executed Operation The MOVP instruction ie executed during the first MOVP instruction is only executed during the first depending ON scan after switched by the CHG MERE scan of the subsequence program selected by the on y instruction executed after is switched on ON OFF OFF sratus instruction is only executed once MOVP instruction is only executed once Ladder example 2 When the A3N A73 and A3V are used execution contents are always same The following program is written at step 0 of the main and subsequence programs X000 4 0 Timing chart 1scan re Main sequence CHG instruction execution program run Subsequence 4 program run instruction execution MOVP instruction is not executed Operation depending on MOVP instruction is only executed duing the first scan of the subsequence program selected
231. 008 of CPU B is cleared Error code of self check error on CPU C is stored in BIN code Cleared when D9008 of CPU C is cleared Dedicated to Self check error code Dedicated to Dedicated to Dedicated to Self check error code Self check error code Usable with AnN and AnA which are compatible with SFC For the AnN and AnA which are compatible with SFC refer to the MELSAP II Programming Manual APP 25 APPENDICES Table 1 4 Special Register List Continue MELSEC A Applicable CPU 1 Output module numbers units of 16 points of which D9100 fuses have blown are entered in bit pattern Preset output unit numbers when parameter setting has been D9101 performed 1514131211109 87654 32 10 D9102 09100 oj0 o1 o 0 0 1 0 0 0 0 0 O O O m s Fuse blown a pen in vine of 16 09101 10 NET E Pedes 052 205 D9107 1 t Indicates fuse blow modules D9105 Fuse blow check is executed also to the output module of remote I O station D9106 If normal status is restored clear is not performed Therefore it is required to perform clear by user D9107 program Stores the output module number of the fuses have blown in the bit pattern b15 b8 b7 66 b5 b4 63 62 b1 60 D9100 0 0 LENS HE L Indicates the module 0 is fixe
232. 08 Step transfer monitoring timer start corresponds to D9109 Step transfer monitoring timer start corresponds to D9110 Usable with AnN Step transfer monitoring timer FF Monitoring ti ru iul Turned on when the step transfer monitoring timer is A2AS QCPU A start started Turned off when the monitoring timer is A Mode A2C corresponds to ON Monitoring timer P reset start A0J2H AnS D9111 AnSH A1FX and Step transfer A52G monitoring timer start corresponds to D9112 Step transfer monitoring timer start corresponds to D9113 Step transfer monitoring timer start corresponds to D9114 Usable with AnN and AnA which are compatible with SFC For the AnN and AnA which are compatible with SFC refer to the MELSAP II Programming Manual APP 10 APPENDICES MELSEC A Table 1 1 Special Relay List Continue Usable with AnN AnU i Ti h li f all ifi Active step OFF Trace start urned on when sampling trace of all speci ied M9180 trace blocks is completed Turned off when sampling trace ON Trace complete complete flag is started Active step OFF Trace not executed Turned on when sampling trace is being executed M9181 trace ON Trace being Turned off when sampling trace is completed or execution flag executed suspended A2AS QCPU A 2 AnS Selects sampling trace exec
233. 08 K6 0 1 DBIN X020 D9 T Coding LD X H D 09 10000 D5 p 008 1 DBIN K6X020 D9 K4 10 D D9 K10000 D5 BIN D3 21 BIN X K4X010 D3 K 26 MOV 04 0 04 31 0 03 05 00 42 De D3 05 Do CAUTION If BCD values above 2147483647 are set at X10 to X37 they are outside the range which can be handled with the 32 bit devices Values of DO and D1 accordingly become negative For details refer to Section 3 3 6 BASIC INTRUCUTIONS MELSEC A 6 4 Data Transfer Instructions The data transfer instructions are instructions which perform data transfer interchanging data the negative reverse data transfer etc Classification Instruction Symbol Ref Page MOV 6 47 MOVP 6 47 Transfer DMOV 6 47 DMOVP 6 47 CML 6 49 CMLP 6 49 Negative transfer DCML 6 49 DCMLP 6 49 BMOV 6 52 Block transfer BMOVP 6 52 Same data FMOV 6 52 block transfer FMOVP 6 52 XCH 6 56 XCHP 6 56 Interchange DXCH 6 56 DXCHP 6 56 The data moved by the data transfer instruction transfer interchanging negative transfer block transfer block transfer of the same data is retained until new data is transferred Therefore even if the execution command of each instruction turns off the data does not change 6 BASIC INTRUCUTIONS MELSEC A 6 4 1 16 32 bit data transfer MOV MOVP DMOV DMOVP Applicable All CPUs CPU Av
234. 1 number of steps used 5 3 14 3 8 2 Instructions of variable functions nene enn 3 16 3 8 8 Set values for the extension timer and 3 17 3 8 4 Cautions on using index qualification ssssssseeeeeenneens 3 17 3 8 5 Storing 32 bit data in index 3 20 3 9 Operation when the OUT Instruction SET RST Instruction and PLS PLF Instruction are from the Same Device 3 21 INSTRUCTION FORMAT er eaer nhan sna rape ieSe dein dHe rinon aaa iis 4 1 4 3 SEQUENCE 5 4 5 41 5a Contact Instructions eec addidi spas cR enun 5 2 5 1 1 Operation start series connection parallel connection ED AND OB ait itle te eae n dea 5 2 5 2 Connection INStrUCtIONS 5 5 5 2 1 Ladder block series connection parallel connection ANB ORB 5 5 5 2 2 Operation result push read MPS MRD 5 9 5 37 Output Instr ctlonis deua 5 14 5 3 1 Bit device tim
235. 10 END Al Upper 4 digits A0 Lower 4 digits 6 4 2 gt 8 4 2 8 5 4 2 Multiplicand Multiplier Multiplication result 6 BASIC INSTRUCTIONS B MELSEC A Program which performs the division of BCD data 5678 and 1234 and stores the result to D502 and 503 and at the same time outputs the quotient to Y30 to 3F M9036 o 5678 MOV Coding 0 LD M9036 1 B P H5678 10 MOVP D502 15 END H 1234 D502 D502 K4 Y030 H1234 K4Y030 Division of BCD data 5678 and 1234 is performed and the remainder is stored into D502 and D503 The quotient D502 is output to the Y30 to 3F D502 Quotient Remainder Quotient 6 BASIC INSTRUCTIONS MELSEC A 6 2 8 BCD 8 digit multiplication division DB DB P DB DB P All CPUs Available Device 2 gt 5 oo e xl8S i8 Bit device Word 16 bit device Constant Pointer Level 9 o X Y ML S B F T C D AO A1 Z V K 1 N 5 M9012 M9010 M9011 S ojo K1 52 to O D 0 K8
236. 133 133 203 36 2 36 9 27 3 27 0 B P 1 2 D 133 133 203 36 2 36 7 27 1 27 0 DB 1 S2 D 185 186 294 50 4 50 6 38 1 37 8 DB P S1 S2 D 185 186 294 50 4 51 1 37 9 37 4 B S1 S2 D 299 300 358 79 8 80 1 60 1 59 4 B P S1 S2 D 299 300 358 80 0 80 1 59 7 59 8 DB S1 S2 D 941 939 1044 245 6 246 3 184 3 184 2 DB P 1 S2 D 941 939 1044 245 8 246 1 184 3 184 2 B S1 S2 D 235 236 274 61 4 61 7 46 2 46 6 B P S1 S2 D 235 236 274 61 2 61 7 46 1 46 6 DB S1 S2 D 896 894 954 246 4 246 9 185 1 184 8 DB P S1 S2 D 896 894 954 246 0 276 5 184 5 184 8 BCD 82 83 90 22 0 22 3 16 3 16 5 BCDP 82 83 90 22 0 22 5 16 7 16 6 DBCD 219 220 284 59 2 59 7 44 3 44 4 DBCDP 219 220 284 59 2 59 7 44 5 44 8 BIN 79 78 86 20 8 21 5 15 7 16 0 BINP 79 78 86 20 8 21 3 15 7 15 8 DBIN 215 216 280 58 2 58 9 43 9 43 8 DBINP 215 216 280 58 2 58 9 43 7 43 8 APP 52 APPENDICES MELSEC A Table 2 2 Instruction Processing Time of Small Size Compact CPUs Processing Time us A2USH S1 A2AS 51 A2USH A2C A52G 2 A1FX Instruction Condition board Refresh Refresh Refresh Refresh Refresh Refresh Mode Mode Mode Mode Mode Other X Y Mode than X Y i B SD 6 4 2 82 154 123 154 154 229 25 3 B P SD 6 4 2 82 154 123 154 154 229 25 2 DB SD 34 15 17 219 175 219 221 351 35 2 DB P 34 15 17 219 175 219 221 351 35 4 1 S2 D 14 6 54 161 129 161 162 241 26 5 B P 5152 D 14 6 54 161 129 161
237. 16 bit data of device specified at S 16 bits Before execution is 1 1 0 0 1 0 1 1 1 R Tetai number of 1s After execution A0 5 Total number of 15 is stored BIN 8 pcs this example The A0J2HCPU stores the total number of bits also 09003 DSUM Stores to AO the total number of bits which are one found in the 32 bit data of device specified at S 32 bits x Before execution S 1 0 0 1 1 1 0 0 1 0 1 0 0 1 1 1 0 0 0 1 0 0 0 0 1 1 1 1 O 1 1 0 b15 a NS an After execution 0 1 0 00 Total number of 15 is stored in BIN 16 pcs in this example Execution Conditions ON 4 Operation command OFF Executed Executed per scan per scan lt lt gt __ Executed only once only once 7 APPLICATION INSTRUCTIONS MELSEC A Program Examples SUM Program which obtains the number of bits which are on 1 in the data of X30 to when X8 turns on Coding X008 0 LD X008 M X030 0 1 SUMP K4X030 4 END Counted data
238. 17 H H H MCR NO H 1 H H 5 SEQUENCE INSTRUCTIONS MELSEC A 5 6 Termination Instructions Applicable 5 6 1 Main routine program termination CPU FEND Available Device Bit device Word 16 bit device Constant Pointer Level Digit specification 5 D W 1 K H P 1 M9012 M9010 M9011 FEND Functions 1 Terminates the main routine program 2 When the FEND instruction is executed the PC returns to step 0 after the processing such as timer counter processing and self diagnostic check after the execution of END instruction and resumes operation from step 0 3 The sequence program located after FEND instruction can also be displayed on the GPP The GPP displays a circuit up to the END instruction 0 CALL P Le yv Main routine hi I program Jump by CJ Main routine Operation when TER instruction program CJ instruction is lt a not exectuted Main routine when m program instruction is Subroutind executed program 5 FEND I Main routine Interrupt program program END FEND d END a By use of CJ instruction b There are subroutine program and interrupt p
239. 1FXCPU Addition Section 7 6 5 7 6 6 8 3 3 Correction SAFETY PRECAUTIONS CONTENTS Section 2 1 2 2 3 3 1 3 4 6 4 3 6 5 2 6 6 1 7 4 6 7 6 1 7 9 1 7 10 2 8 3 4 9 2 9 3 9 4 APP 1 3 APP 2 A2NCPU P21 R21 F ABNCPU P21 R21 S1 F A3NCPU P21 R21 F A373CPU P21 R21 Jan 2000 IB NA 66250 D Addition of Models 002 Q02HCPU A Q06HCPU A A2USHCPU S1 A2USH board Addition Section 9 5 APP 2 3 Correction Section 5 3 2 6 7 3 7 8 APP 2 1 Dec 2000 IB NA 66250 E Addition Section 3 9 Correction Section 2 2 3 3 8 4 5 3 3 6 7 1 Dec 2002 IB NA 66250 F Addition Section 9 3 Correction Section 9 2 9 4 9 5 9 6 APP 1 1 APP 1 3 Jun 2003 IB NA 66250 G Correction Section 5 5 1 9 2 9 3 APP 1 3 Dec 2003 IB NA 66250 H Correction Section 9 4 Japanese Manual Version SH NA 3436 O This manual confers no industrial property rights or any rights of any other kind nor does it confer any patent licenses Mitsubishi Electric Corporation cannot be held responsible for any problems involving industrial orovertv riahts which mav occur as a result of usina the contents noted in this manual 1990 Mitsubishi Electric Corporation INTRODUCTION Thank you for choosing the Mitsubishi MELSEC A Series of General Purpose Programmable Controllers Please read this manual carefully so that the equipment is used to its optimum A copy of this manual should be forwarded to the end User
240. 1M38 38 5 K1M33 X011 K3 Mov 020 12 H Explanation 00 D 0 20 020 K3Y12F K3Y 12F 5 K3Y12A gt Hexadecimal Fig 3 7 Ladder Examples and Actual Devices Processed 3 10 3 INSTRUCTION STRUCTURE MELSEC A 5b In the following cases the basic instruction and application instruction result in operation error a When the index qualification is performed and the device range has been exceeded In this case however K and H are excluded Circuit Example Judgement MOV Since T 9 10 T 1 operation error occurs MOV K MOV 10 2 Since D 1020 10 01030 and the range of DO to 1024 7 is exceeded operation error occurs MOV D1020 Y033 K MOV 10 Since K 32767 10 K 32759 operation error does not occur 2 32767 10 8009 32759 MOV 32367 DO Fig 3 8 Ladder Example and Judgements b When the index qualification is performed and the head number of bit device has exceeded the corresponding device range Circuit Example Judgement MOV Although K4B3FF B 3F0 BSFF is specified operation error does not occur MOV Since K4B400 B 3F0 10 B400 is specified and the corresponding device range is exceeded operation error occurs
241. 20 to O I T 1DXNR X020 016 H and the data of D16 and 17 is performed P 5 4 Among 32 bit data of 016 and 17 the total DSUM number of 1 bits is stored into AO P 018 H Data of AO is stored into 018 Coding 0 LD X006 1 DXNRP K8X020 D16 10 DSUMP D16 13 MOVP D18 18 END 7 18 7 APPLICATION INSTRUCTIONS 7 1 5 BIN 16 bit data 2 s complement NEG NEGP Applicable CPU CPUs Available Device gt 5 oo 52 Bit device Word 16 bit device Constant Pointer Level 3 3 9 2 2 5 M9012 M9010 M9011 D Ma O 2 s complement execution commands D Setting data Head number of device which stores data for which 2 s complement will be performed Functions 1 Reverses the sign of the 16 bit data of device specified at D and stores the result in device specified at D 16 bits a gt Before execution D 1 1 1 1 2 0 1 of 2 of a OQ em 21846 Sign conversion E a 011101 110 1 0 di ge 1 0 110 AA After execution D areala ahale RICE 21846 2 Used to reverse the positi
242. 22 K4 K4 SEG Y020 B001 H CAUTION Pulse signals cannot be output using the programs above when the A2CPU is used 5 NT TROD U OTON cuam 1 1 1 3 INSTRUCTIO NS oes CU PEDE 2 1 2 24 24 OlassiflCatiOnz o o nd iad dac eA a odd dd e mtis 2 1 2 2 nstruction List o tee e e tn tam ee 2 2 2 21 Explanation for instructions lists 2 2 2 2 2 SEQUENCEINSIFUCUONS pte e et eap 2 5 2 2 3 BASIC o sna Dee ep te Deve te V Deut 2 8 2 2 4 Application instructions eee mener nnne nennen 2 16 INSTRUCTION STRUGCTURE cuan Eae 3 1 3 24 3 12 Instruction StU CHUNG ic 3 1 3 2 Bit PrOCESSING eere ree E Editer eec eder pac Ee adde ce EE eode 3 3 3 2 1 bit PLOCOSSING eis eee cecs coeteee ecce kennt ace ev ae Y nee de ne ee 3 3 3 2 2 Digit specification nennen 3 3 3 3 Handling of Numeric Values ee ee nennen ener 3 6 3 4 Storing S2 bit sire E 3 8 3 5 jIndex QUalifiCatiOn s c 6er ia a t tia Rd OR GR Fr 3 10 3 6 S bset Dae ep CC UH e e ERE Pe EH dials 3 12 327 alata
243. 3 5 DI 1 M9036 _ 6 RST M9053 M9036 30 SET M9053 34 El M9036 35 RST M9053 39 DI 1 Processing is started with link refresh enabled Enables the interrupt program as M9053 is off Disables link refresh as M9053 is on Enables link refresh as M9053 is on 2 The interrupt program is started with interrupt disabled 3 After the EI DI instruction is executed M9053 may either be on or off 4 If the El or DI instruction is contained in the MC instruction such and DI are executed regardless of execution of the MC instruction 6 BASIC INSTRUCTIONS MELSEC A 6 7 3 Partial refresh SEG MU A2USH board A0J2H A Mode x NON N x Remark Valid only when special relay M9052 is OFF The SEG instruction changes in function depending on the status of special relay M9052 as follows When M9052 is ON Partial refresh When M9052 is OFF 7 segment decode See Section 7 4 4 for details Available Device gt oo 2 55 ES Bit device Word 16 bit device Constant Pointer Level o 2 Xx Y M L S B F T D 0 1 2 V K H P 1 N 5 M9012 M9010 M9011 S K1 4 to A K4 Setting data Head device number for refresh Number of points refresh ed Set in
244. 32768 and over or 32769 and below in decimal notation use 32 bit data for processing 3 INSTRUCTION STRUCTURE MELSEC A 3 4 Storing 32 bit Data 32 bit data is stored using digit specification of K1 to 8 when it is stored in bit devices or using two consecutive words when it is stored in word devices 1 Storing data in bit devices Refer to Section 3 2 2 2 2 Storing data in word devices a Two consecutive word devices are used to store 32 bit data X010 K _ DMOV 175692781 DO H D1 DO X10 ON 175692781 pp dre b31 to b16 015 to bo oe ee E ae a 4 Di SR Sign flag Consecutive b To store the data of bit devices with which digit specification of K1 to K8 was done in word devices with 32 bit instructions refer to Section 3 2 2 1 c Cautions 1 Even if the storing word device is assigned to the final device number of each device no error will occur and contents of devices other than specified may change X010 H E _ DMOV 0A78DBED D1023 H HA78DBED ns 10 X10 ON ACPU H A78 DBED T D1023 J D6143 for ACPU Data contents of devices other than specified change 3 INSTRUCTION STRUCTURE MELSEC A 2 Index registers can
245. 41 M9042 OFF During sampling trace ON Sampling trace completion Sampling trace completion OFF STRA Same as execution ON OFF STRAR Same as execution Sampling trace OFF WDT not reset ON WDT reset Watchdog timer WDT reset 0 1 second 0 2 second 1 second 2 second and 1 minute clocks are generated Not turned on and off per scan but turned on and off even during scan if corresponding time has elapsed Starts with off when power is turned on or reset is performed Unusable with Used as dummy contacts of initialization and application instruction in sequence program M9036 and M9037 are turned on and off without regard to position of key switch on CPU front M9038 and M9039 are under the same condition as RUN status except when the key switch is at STOP position and turned off and on Switched off if the key switch is in STOP position M9038 is on for one scan only and 9039 is off for one scan only if the key switch is not in STOP position Usable with all types of CPU When RUN key switch is at PAUSE position or remote pause contact has turned on and if M9040 is on PAUSE mode is set and 9041 is turned on Usable with all types of CPU Turned on upon completion of sampling trace performed the number of times preset by parameter after STRA instruction is executed Reset when STRAR instruction is executed Turning on off M
246. 5 SEQUENCE INSTRUCTIONS MELSEC A 2 Printing example by use of MPS and MPP instructions Circuit printing X000 X001 X002 X003 X004 X005 X006 X007 X008 X009 X00A o HH IH T EST IH ERIS IR IRR IM Yee YO41 Y042 L YO43 YO44 L Y045 L YO46 L YO47 L YO48 L YO49 i pee espero Me spe c Tope ape miS YO4A CIRCUIT END List printing 0 LD X000 22 MPP 1 MPS 23 OUT 041 2 AND X001 24 MPP 3 MPS 25 OUT Y042 4 AND X002 26 MPP 5 MPS 27 OUT Y043 6 AND X003 28 MPP 7 MPS 29 OUT 044 8 X004 30 MPP 9 MPS 31 OUT Y045 10 AND X005 32 MPP 11 MPS 33 OUT Y046 12 X006 34 MPP 13 MPS 35 OUT 047 14 X007 36 15 MPS 37 OUT Y048 16 AND X008 38 MPP 17 MPS 39 OUT Y049 18 AND X009 40 MPP 19 MPS 41 OUT YO4A 20 AND X00A 42 END 21 OUT Y040 5 13 5 SEQUENCE INSTRUCTIONS 5 3 Output Instructions 5 3 1 Bit device timer counter output OUT Applicable CPU All CPUs MELSEC A Available Device gt G gt oo o zog Bit device Word 16 bit device Constant Pointer Level 9 2 L S B F D W R A0 A1 Z V K H P 1 5 M9012 9010 9011 1 Bit device 0 0 A Device 2 2 Se
247. 5 35 5 4 CLC 24 1 09 38 31 38 38 38 5 7 DUTY 14 6 36 85 66 85 85 85 13 1 PR 74 27 19 282 226 282 282 282 52 5 PRC 37 14 64 162 141 176 176 176 31 5 CHK Bit reverse 15 0 151 121 151 151 151 23 2 output instruction LED 100 253 LEDC 142 331 LEDA 252 LEDB 263 APP 63 APPENDICES MELSEC A Table 2 3 Instruction Processing Time of Small Size Compact CPUs Processing Time us AnS A1SJH A1SH A2SH S1 Instruction Condition Direct Mode Direct Mode Direct Mode Refresh Mode Refresh Mode Refresh Mode Other than Other than Other than X Y X Y X Y X Y X Y X Y 1 439 524 150 6 211 6 131 7 188 6 FROM n 1000 12 6609 2358 3880 5 1372 6 4576 7 1289 6 1 439 524 150 7 211 6 131 8 188 6 n 1000 12 6609 2358 3926 5 1372 6 4624 7 1289 6 1 449 529 161 9 211 6 141 8 183 6 DFRO n 500 56 6609 2109 3888 5 773 6 4584 7 1257 6 1 449 529 161 9 211 6 141 8 183 6 DFROP n 500 56 6609 2109 4012 5 773 6 4632 7 1257 6 1 449 539 152 4 190 6 135 0 162 6 1 pcs 6609 3918 3882 5 1827 6 4568 7 1587 6 n 1 449 539 152 4 190 6 135 0 162 6 TOP i is 6609 3918 3946 5 1827 6 4688 7 1587 6 1 454 544 157 2 199 6 138 2 165 6 500 56 6609 1609 3882 5 1227 6 4584 7 1115 6 1 454 544 157 2 199 6 138 2 165 6 DTOP n 500
248. 52 21 21 32 7 6 5 7 WORSD 90 61 60 72 1 6 1 6 9 2 2 8 2 1 WORPSD 90 61 60 72 1 6 1 6 9 2 2 8 2 1 DOR 276 140 139 240 27 27 43 13 9 5 DORP 276 140 139 240 27 27 43 13 9 5 WOR 1 52 176 97 96 152 21 21 32 7 6 5 7 1 2 0 176 97 96 152 21 21 32 7 6 5 7 WXOR D 91 60 59 72 1 6 1 6 9 2 2 8 2 1 WXORP SD DXOR DXORP WXOR 51 S2 D WXORP 1 S2 D WXNR SD WXNRP S D DXNR DXNRP WXNR 1 52 D WXNRP 1 520 NEG NEGP RORn RORP n RCRn RCRP n R Refresh mode D Direct mode APP 74 APPENDICES MELSEC A Table 2 6 Instruction Processing Time of CPUs Processing Time us An NBI 20 E AU Instruction Condition D D D R Other R Other R R than X Y than X Y X Y X Y ROLn 5 68 54 53 53 4 6 4 6 4 6 5 8 4 4 ROLP n 5 68 54 53 53 4 6 4 6 4 6 5 8 4 4 RCL n n 5 74 57 57 57 6 8 6 8 6 8 6 4 4 8 RCLP n n 5 74 57 57 57 6 8 6 8 6 8 6 4 4 8 DROR n n 5 97 70 69 69 11 11 11 11 8 3 DRORP n n 5 97 70 69 69 11 11 11 11 8 3 DRCRn n 5 95 72 72 72 13 13 13 12 9 2 DRCRP n n 5 95 72 72 72 13 13 13 12 9 2 DROL n n 5 101 70 69 69 11 11 11 10 7 8 DROLP n n 5 101 70 69 69 11 11 11 10 7 8 DRCL n 5 98 68 68 68 13 13 13 12 87 DRCLP n 5 98 68 68 68 13 13 13 12 87 SFRDn n 5 102 74 72 83 4 0 4 0 7 8 5 0 3 8 SFRPDn n 5 102 74 72 83 4 0 4 0 7 8
249. 6 bit data search 7 37 decode and encode FIFO instruction Read write of FIFO table 7 53 Buffer memory access instruction Read write of buffer memory in special function 7 58 module FOR to NEXT instruction FOR to NEXT 7 77 Local remote I O station access instruction Read write of data in local remote station 7 79 Display instruction Output of character code indication of data on LED 7 92 display Instructions which are not included in the above Miscellaneous classification such as WDT reset and carry flag 7 108 set reset 7 APPLICATION INSTRUCTIONS MELSEC A 7 1 Logical Operation Instructions 1 The logical operation instructions are instructions which perform the logical operations such as logical add and logical product 2 The logical operation instructions are available in the following 26 types Classifica Instruction Classifica Instruction Classifica Instruction tion Symbol Ref Page tion Symbol Ref Page tion Symbol Ref Page WAND 7 3 WXOR 7 11 2 s NEG 7 19 complement Logical WANDP 7 3 Exclusive WXORP 7 11 Sign reversal NEGP 7 19 prouet DAND 7 3 OR DXOR 7 11 DANDP 7 3 DXORP 7 11 WOR 7 7 WXNR 7 15 Logical WORP dd Exclusive WXNRP 7 15 7 7 NOR DXNR 7 15 DORP 7 7 DXNRP 7 15 REMARK The logical operation instructions perform the following processings in units of one bit Example B 0 Classifica
250. 7 32768 is stored into the device specified at D DEC 1 Performs the subtraction to 1 from the device 16 bit data specified at D 5678 BIN 1 gt 5677 BIN 2 If DEC or DECP is executed when the content of device specified at D is 0 1 is stored into the device specified at D Execution Conditions ON INC DEC commands Executed Executed per scan per scan P Executed Executed Program Examples INC only once only once 6 BASIC INSTRUCTIONS 11 MELSEC A Program which outputs the present value of counters CO to C20 in BCD to Y30 to each time X8 turns on When the present value 9999 X008 P 2 K4 BCD CO Yo30 H The present value of C 0 Z is output to the Y30 to 3F in BCD P INC Z H Z 1 is executed K H 21 Z JH RST 2 H Zis setto 0 when Z 21 or by X7 reset input X007 Coding X008 1 COZ K4Y030 6 INCP Z 9 LD K21 Z 14 OR X007 15 RST Z 18 END DEC Down counter program X007 PK MOV 100 08 H When X7 turn on 100 is transferred to 08 x008 I 08 4 When M38 is off 08 1 is executed if X8 turns from off to on K 0 D8 7 M38 When 08 0 M38 turns on Coding LD X007 1 MOVP K100 D8 6 LD X008 7 M38 8 DECP D8 11 LD D8 16 OUT M38 17 END 6 BASIC INSTRUCTIONS MELSEC
251. 76 61 76 77 101 12 9 OR 2 8 2 00 84 67 84 83 106 13 7 LDD 10 5 18 166 133 166 168 149 27 5 ANDD 5 9 4 64 155 124 155 156 263 25 3 1 99 ORD 6 3 166 133 166 167 273 27 3 4 53 LD lt gt 4 1 1 91 86 69 86 87 108 14 5 lt gt 2 6 1 45 75 60 75 75 99 12 3 OR lt gt 2 8 2 00 83 66 83 82 105 13 1 LDD lt gt 10 5 18 164 131 164 166 272 26 9 ANDD lt gt 5 9 4 64 161 129 161 162 269 26 7 1 99 ORD lt gt 6 1 161 129 161 161 268 25 9 4 53 LD gt 4 1 1 91 84 67 84 84 106 14 3 AND 2 6 1 45 75 60 75 75 99 12 7 OR 2 8 2 00 83 66 83 81 104 12 9 Value for ASUSH board APP 49 APPENDICES MELSEC A Table 2 2 Instruction Processing Time of Small Size Compact CPUs Processing Time us AnS A1SJH A1SH A2SH S1 Instruction Condition Direct Mode Refresh Refresh Direct Refresh Direct Mode n X Y Mode Mode Mode Mode 50 44 45 59 11 6 11 9 8 7 8 6 44 45 59 11 4 12 1 8 6 8 6 0 0 69 69 90 18 2 18 5 13 7 13 6 D P SD 69 69 90 18 0 18 3 13 6 13 2 S1 S2 D 77 77 103 20 2 20 7 15 3 15 2 P S1 S2 D 77 77 103 20 2 20 5 15 2 14 8 D S1 S2 D 99 99 246 25 6 25 9 19 3 19 2 D P S1 S2 D 99 99 246 25 8 26 3 19 4 19 2 SD 45 45 59 11 6 12 1 8 7 8 6 PSD 45 45 59 11 8 12 1 8 6 8 6 D SD 69 69 90 18 0 18 5 13 7 13 6 D P SD 69 6
252. 8 or less Reduce the data link modules to 1 or less There are 7 or more modules such as a computer link module loaded to one CPU module Reduce the computer link modules to 6 or less There are 2 or more interrupt modules loaded Reduce the interrupt modules to 1 or less Modules assigned by parameters for MNT MINI automatic refresh from the peripheral device do not conform with the types of station modules actually linked Perform again module assignment for MNT MINI automatic refresh with parameters according to actually linked station modules The number of modules of I O assignment registration number of loaded modules per one CPU module for the special function modules which can use dedicated instructions is larger than the specified limit Total of the number of computers shown below is larger than 1344 AD59 x 5 AD57 S1 AD58 x 8 AJ71C24 SS3 S6 S8 x 10 AJ7IUC24 x 10 AJ71C21 S1 S2 x 29 AJ71PT32 S3 in extension mode x 125 Total gt 1344 Reduce the number of loaded special function modules 1 Five or more network modules have been installed 2 A total of five or more of network modules and data link modules have been installed Make the total of the installed network modules and data link modules four or less MELSEC A 9 ERROR CODE LIST Error Massage SP UNIT ERROR Checked at execution of the FROM TO instruction or
253. 9 1 13 RET r 0 Coding LD OUT LD CALLP LD OUT FEND P33 LD OUT OUT RET END X008 011 X001 X009 Y013 X000 Y033 Y034 6 BASIC INSTRUCTIONS MELSEC A 6 5 3 Interrupt enable disable return PUTET El DI IRET 2 X NIx Remark El and Dl instructions are valid only when special relay M9053 is OFF The EI and DI instructions used with the AnN AnS AnSH A1FX A0J2H and A73 vary in function with status of special relay M9053 as mentioned below When M9053 is ON Link refresh enable disable See Section 6 7 2 for details When M9053 is OFF Interrupt enable disable Available Device Bit device Word 16 bit device Constant Pointer M9012 M9010 M9011 Digit specification El Program execution continues Required to the AnN 5 AnSH A1FX A0J2H A73 and A3N board A I Interrupt pointer 10 to 31 IRET Interrupt Label program Functions DI 1 Disables the interrupt program until the El instruction is executed so that interrupt signals are ignored 2 When the PC CPU is RESET interrupt program execution is disabled EI 1 Enables the interrupt pr
254. 9 13 Read the error step using a peripheral device and correct the program of the step 9 ERROR CODE LIST Error Massage MELSEC A Table 9 3 Error Code List for ANACPU and Board Continue Error Code D9008 Detailed Error Code D9091 CPU States Error and Cause Corrective Action PARAMETER ERROR Checked at power on and at STOP PAUSE RUN 11 111 112 113 114 115 116 117 118 STOP Capacity settings of the main and sub programs microcomputer program file register comments status latch sampl ing trace and extension file registers are not within the usable range of the CPU Total of the set capacity of the main and sub programs file register comments status latch sampling trace and extension file registers exceeds capacity of the memory cassette Read parameters in the CPU memory check the contents make necessary corrections and write them again to the memory Latch range set by parameters or setting of M L or S is incorrect Sum check error Either of settings of the remote RUN PAUSE contact point by parameters operation mode at occurrence of error annunciator indication mode or STOP RUN indication mode is incorrect The MNET MINI automatic refresh Setting by parameters is incorrect Timer setting by parameters is incorrect Counter setting by parameters is incorrect Read par
255. 9 90 18 0 18 7 13 6 13 2 S1 S2 D 79 79 107 20 8 21 3 15 7 15 6 P S1 S2 D 79 79 107 20 8 21 3 15 8 15 6 D S1 S2 D 99 99 130 27 0 25 7 20 3 20 4 D P S1 S2 D 99 99 130 26 8 27 3 20 4 20 2 S1 S2 D 94 95 168 22 0 22 7 16 5 16 4 S1 S2 D 94 95 168 21 8 22 7 16 6 16 6 D S1 S2 D 341 340 370 98 2 98 3 73 7 73 6 D P S1 S2 D 341 340 370 98 2 98 5 73 6 73 8 S1 S2 D 102 103 99 23 2 23 9 17 7 17 4 P S1 S2 D 102 103 99 23 2 23 9 17 4 17 4 D S1 S2 D 393 394 412 106 8 107 5 80 1 80 2 D P S1 S2 D 393 394 412 106 6 107 3 80 2 80 2 INC 29 29 38 7 2 7 5 5 7 5 4 INCP 29 29 38 7 4 7 7 5 4 5 4 DINC 42 42 132 10 6 11 3 8 1 8 0 DINCP 42 42 132 10 6 11 1 7 9 7 8 DEC 31 31 39 7 8 8 5 6 1 5 8 DECP 31 31 39 7 8 8 3 5 9 5 8 DDEC 42 42 54 10 6 11 1 8 1 8 0 DDECP 42 42 54 2 7 1 9 8 1 7 8 APP 50 APPENDICES MELSEC A Table 2 2 Instruction Processing Time of Small Size Compact CPUs Processing Time us A2USH S1 A2AS 51 A2USH A2C A52G A0J2H A1FX Instruction _ Condition board Refresh Refresh Refresh Refresh Refresh Refresh Mode Mode Mode Mode Mode Other than X 50 2 8 1 28 55 44 55 56 74 8 7 PSD 2 8 1 28 55 44 55 56 74 8 6 D SD 4 0 1 82 86 69 86 87 113 13 7 D P SD 4 0 1 82 86 69 86 87 113 13 6 S1 S2 D 3 2 1 45 96 77 96 97 129 15 3 P S1 S2 D 3 2 1 45 96 77 96 97 129 15 2 D S1 S2 D 4 6 2 09 124 99 124 124 308 19 3 D
256. 9044 can execute STRA STRAR instruction M9044 is forcibly turned on off by a peripheral device When switched from OFF to ON When switched from ON to OFF instruction The value stored in D9044 is used as the condition for the sampling trace At scanning at time Time 10 msec unit Unusable with A1 and A1N STRA instruction STRAR Turn on M9045 to reset the WDT upon execution of a ZCOM instruction or data communication request batch process Use this function for scan times exceeding 200 ms APP 3 APPENDICES MELSEC A Table 1 1 Special Relay List Continue Dee pue ee mm Dmm De Em DERI naa ean preparation ON Sampling trace start Sampling trace is interrupted if M9047 is turned off and A1N ON Flickers at annunciator on OFF flicker at annunciator on OFF Low voltage is not detected ON Low voltage is detected OFF Up to NUL code are Switching the e When M9049 is off up to NUL 00v code are output output number of output When M9049 is on ASCII codes of 16 characters ON 16 characters are characters are output output Sets whether the RUN LED flickers or not when the Usable with 2 x 2 RUN LED flicker M9048 is used Turned ON when the drop in the battery voltage for the memory card is detected Automatically turned OFF
257. 9052 is OFF The SEG instruction for the CPUs except An changes in function depending on the status of special relay M9052 as follows When M9052 is ON Partial refresh See Section 6 7 3 for details When M9052 is OFF 7 segment decode Available Device 5 Bit device Word 16 bit device Constant Pointer 8 7 X 5 B F T C D W R AO A1 Z V K H P 1 5 M9012 M9010 M9011 S K1 K1 D 0 0 0 0 0 0 0 O 0O O O O O O bii 1 If the CPUs other than A3M AnA A2AS AnU QCPU A A Mode and A2USH board are used digit specification is ignored and 8 bit 2 digits data is always output Decode command Not necessary for the An Setting data Data to be decoded or head number of device Functions which stores data to be decoded Head number of device which will store decode result 1 Decodes the data of 0 to F specified at the lower four bits of S to seven segment display data and stores the result to D 2 When the device is a bit device Y M L S B F indicates the head number of device which will store the seven segment display data When the device is a word device T C D AO A1 Z V indicates the device number which will store the seven segment display data 3 The data is stored into the b
258. 9077 from ON to OFF and clears the accumulation time When M9077 is already OFF clears the accumulation time When 1 to 255 is designated at 09077 M9077 is turned ON at the first scan When the value other than 1 to 255 is designated at D9077 the value in D9077 is reset to 0 and M9077 is always turned OFF Turned on when test mode is not available though a test mode request was made from a peripheral device Turned off if test mode becomes available by making another test mode request Turned on when the positioning data of the servo program designated by the DSFRP instruction has an error Turned off when the data has no error after the instruction is executed again Turned ON OFF according to the number of remaining instructions RIRD RIWT RISEND RIRCY being executable simultaneously at one scan OFF Number of remaining instructions executable simultaneously 1 to 10 ON Number of remaining instructions executable simultaneously 0 By assigning M9080 as execution condition the number of instructions above executed simultaneously at one scan can be limited to 10 or less 4 This function is available with the CPU of the following S W versions or later QO6HCPU A A1SJHCPU ATSHCPU Available with all versions A2UCPU S1 ASUCPU Manufactured in July 1999 A4UCPU S W version E A2 PU S1 Manufactured in July 1999 S W version L A2USHCPU S1
259. A 6 1 2 32 bit data comparison Dz D lt gt D gt D lt D lt D gt Applicable All CPUs CPU Available Device gt S oo 5 Bit device Word 16 bit device Constant Pointer Level 9 E 9 2 2 M9012 M9010 9011 S ojo K1 Instruction symbol D D lt gt D gt D lt D lt D gt Setting data S1 Compared data or head number of device which S2 stores compared data Functions 1 Handled as a NO contact and used for the comparison of 32bits 2 The comparison operation result is as shown below Comparison Condition Operation Result Comparison Condition Operation Result Instruction Symbol in Instruction Symbol in Continuity Non Continuity status status Execution The execution conditions of LDO ANDO and are as indicated below Conditions Instruction Execution Condition LD Executed per scan AND Executed only when the preceding contact instruction is on OR Executed per scan 6 BASIC INSTRUCTIONS ME
260. A 6 2 10 32 bit BIN data increment decrement DINC DINCP DDEC DDECP All CPUs Available Device Bit device Word 16 bit device Constant Pointer Level Digit specification D 0 1 K H P 1 M9010 M9011 5 Indicates the instruction symbol DINC DDEC Setting data D Head device number for DINC 1 DDEC 1 Functions DINC 1 Performs the addition of 1 to the device 32 bit data specified at D 73500 BIN spa EL 73501 BIN 2 If DINC or DINCP is executed when the content of device specified at D is 2147483647 2147483648 is stored into the device specified at D DDEC 1 Performs the subtraction of 1 from the device 32 bit data specified at D 73500 BIN 1 gt 73499 BIN 2 If DDEC or DDECP is executed when the content of device specified at D is 0 lis stored into the device specified at D Execution Conditions ON DINC DDEC commands Executed Executed per scan per scan p Executed Executed Program Examples DINC I Dyo erly one 6 BASIC INSTRUCTIONS MELSEC A 1 Program which adds 1 to
261. ASCII characters which can be displayed refer to 3 in the section of the LEDC instruction 4 For the conversion of alphanumeric characters into ASCII data in a sequence program use the ASC instruction 7 100 7 APPLICATION INSTRUCTIONS MELSEC A LEDC 1 Displays the comment 15 characters of device specified at S at the LED indicator on the front of CPU 2 When the device specified at S is not annotated with a comment or when it is specified outside the comment range the LEDC instruction results as follows Specification of S Operation of LED Comment of device is displayed at LED with comment nat Inside comment indicator range specification Without comment Display of LED indicator is cleared No Processing Display of LED indicator Outside comment range specification does not change 3 If the comment contains characters which cannot be displayed on the LED indicator display cannot be done correctly Characters which can be displayed are as follows e Numerals 0to9 e Alphabets A to 2 capitals e Special symbols lt gt Execution Conditions ON Display command OFF cx Ya I LED LEDC gt Executed Executed only once only once 7 101 7 APPLICATION INSTRUCTIONS MELSEC A Program Examples LED Program which converts ABCDEFGHIJKLMNOP into ASCII code and stores it to the D88 to 95 when X8
262. ASCII code a strobe signal 10 msec ON 20 msec OFF is also output from the device specified at D 8 Until the execution of sending the ASCII code of 16 characters after execution of the PR instruction the PR instruction execution flag device D 9 is ON Multiple PR and instructions can be used In such a case however provide interlock by use of the PR instruction execution flag contact of device D 9 so that the instructions may not turn ON at the same time If contents of the device which stores ASCII codes are changed while ASCII codes are output the changed data are output 7 If code 00H is not found in the specified device operation error occurs 7 APPLICARTION INSTRUCTIONS MELSEC A PRC 1 Outputs the comment ASCII code of the device specified at S to the output module specified at D The number of points used for the output module is eight points which start at the Y number specified at D Comment of x1 Output Y A B CID E F G H 30 Head of output ASCII code output L Printer or indicator ______________ Sequence Strobe signal output program E PRC instruction execution flag used for interlocking 2 480ms is required to transmit 16 codes as each code is transmitted 30ms by the out
263. ASCII code conversion ASC Applicable All CPUs CPU Available Device Bit device Word 16 bit device Constant Pointer M L S D W 0 1 K H 1 Digit specification Setting data Head number of device ASCII characters D which will store ASCII code Function Converts the specified alphanumeric characters into the ASCII code and stores the result into devices of four points which begin with the device specified at D After execution Before execution Lower Upper ASC ABCDEFGH D9 8 bits 8 bits D9 42 B 41 A D10 44 D 43 i D11 46 F 45 Conversion into ASCII code D12 48 H 47 G 1 ASCII code to be stored hexadecimal Executed Conditions ON Conversion command ER ASG Executed Executed a only once only once 7 APPLICATION INSTRUCTIONS Program Example ASC MELSEC A Program which converts ABCDEFGHIJKLMNOP into the ASCII code and stores the result to the D88 to 95 when X8 turns on and displays the ASCII data of D88 to 95 at the LED indicator on the front face of CPU when X16 turns on Coding 0 LD X008 1 ASC ABCDEFGH 14 IJKLMNOP 27 END ASC ABCDEFGH 088 ASC 092 Eight characters to H are
264. All execution conditions when the SFC A2AS QCPU A 21SFC program OFF Initial start program stopped are cleared and the program A Mode A2C M9102 starting status JON Continuous start is started with the initial step of block O Usable with AnN Selects consecutive or step by step transfer of steps AnA Consecutive step OFF Consecutive step of which transfer conditions are established when all A2AS QCPU A 2 transfer disable of the transfer conditions of consecutive steps are transfer A Mode A2C M9103 enable disable ON Consecutive step established transfer enable ON Consecutive transfer is executed 2 AnS OFF One step per one scan is transferred AnSH A1FX and A52G Usable with AnN Turned on when consecutive transfer is not executed AnA Consecutive with consecutive transfer enabled Turned off when A2AS QCPU A OFF Transfer complete 9104 transfer transfer of one step is completed A Mode A2C ON Transfer incomplete prevention flag Consecutive transfer of a step can be prevented by 2 AnS writing an AND condition to corresponding M9104 AnSH A1FX and 526 Usable with AnN and AnA which are compatible with SFC For the AnN and AnA which are compatible with SFC refer to the MELSAP II Programming Manual APP 9 APPENDICES MELSEC A Table 1 1 Special Relay List Continue Step transfer monitoring timer start corresponds to D91
265. B C For the parallel connection of one contact 4 _use OR or ORI Functions ANB 1 This instruction performs the AND operation of block A and Block B and uses it as an operation result 2 The symbol of ANB is not a contact symbol but a connection symbol 3 ANB can be written consecutively up to the number of instructions mentioned below For AnA A2AS AnU QCPU A A Mode and A2USH board 15 instructions 16 blocks For CPUs other than AnA A2AS AnU QCPU A A Mode and A2USH board 7 instructions 8 blocks If more ANBs are written consecutively the PC cannot perform proper opera tion 5 SEQUENCE INSTRUCTIONS MELSEC A ORB 1 This instruction performs the OR operation of block A and block B and uses it as an operation result 2 ORB performs parallel connection of circuit blocks with two or more contacts For parallel connection of circuit blocks which have only one contact OR and ORI are used and ORB is not required See below X000 X001 e Coding 0 7010 0 LD X000 1 AND X001 X002 X003 55 ore i 3 AND X003 X004 4 ORB 5 OR X004 6 OUT Y010 7 END 3 The symbol of ORB is not a contact symbol but a connection symbol 4 ORB can be written consecutively up to the number of instructions mentioned below For AnA A2AS AnU QCPU A A Mo
266. CDP CPU Available Device 2 gt 5 oo 68 Bit device Word 16 bit device Constant Pointer Level o 2 X Y M L 1 2 5 M9012 M9010 M9011 K1 BCD to D K1 DBCD to Indicates the instruction symbol BCD DBCD Setting data BIN data or head number of device which stores BIN data Head number of device which will store BCD data Functions BCD Converts BIN data 0 109999 of the device specified at S into BCD and transfers the result to the device specified at D 32768163848192 4096 20481024 512 256 128 64 32 16 8 4 2 1 S side BIN 9999 1 1 1 11 1 1 1 1 Y BCD conversion Be sure to set to 0 BCD conversion will be exceeded if not 8000 4000 2000 1000 800 400 200 100 80 40 20 10 8 4 2 1 D side BCD 9999 1 1 1 0 0 1 10 0 1 1 0 1 A 4 Thousands Hundreds Tens digits Units digits digits digits 6 BASIC INSTRUCTIONS MELSEC A DBCD Converts BIN data 0 to 99999999
267. D DUTY K C C K P L T E LEDA LEDB LEDR 3 1 Y SA FROMP 112 X Y n3 1 X Y DFRO SA DFROP n3 56 X Y 3 1 X Y TO SA TO n3 112 X Y n3 1 X Y lt lt o o 3 3 3 3 o 5 lt lt 5 o lt o 5 5 m o 5 5 o a 2 Q 2 ct 2 amp 2 X lt 515 Q 2 2 5 gt e X lt 2 Q 2 2 amp 2 are X o lt 5 Q 2 2 amp 5 o X lt 5 Q 2 T 2 amp 2 zu X lt 5 Q 2 2 5 gt lt 2 Q 2 ct 2 amp 2 X lt DTO DTOP n3 56 X Y 2 9 zy 2 D gt lt lt 1 All the application instructions indicated above are used without index qualification 2 When unexecuted any instruction is processed during the following time QO2CPU A Number of steps 1 x 0 079 us QO2HCPU A Q06HCPU A Number of steps 1 x 0 034 us APP 88 APPENDICES MELSEC A APPENDIX 3 ASCII CODE TABLE 0 0 0 0 1 1 1 1 gt 0 0 1 1 0 0
268. D B P SD DB S D DB P S D B S1 S2 D B P S1 S2 D DB S1 S2 D R Refresh mode D Direct mode With an A3M processing time will be 20 us longer than the indicated time APP 71 APPENDICES MELSEC A Table 2 5 Instruction Processing Time of CPUs Processing Time us AnN A3V A73 A3A Instruction Condition S oar sa D D dane y XY i DB P S1 S2D 321 187 186 294 274 274 308 31 23 B SD 210 125 125 185 3 6 3 6 11 6 2 4 7 B P SD 210 125 125 185 3 6 3 6 11 6 2 4 7 DB S D 318 175 175 208 47 47 6 2 32 24 DB P S D 318 175 175 280 47 47 6 2 32 24 B S1 S2 D 212 133 133 203 23 23 34 14 11 B P S1 S2 D 212 133 133 203 23 23 34 14 11 DB S1 S2 D 322 185 186 294 261 261 306 29 22 DB P S1 S2 D 322 185 186 294 261 261 306 29 22 B S1 S2 D B P S1 S2 D S1 S2 D 1 S2 D B S1 S2 D B P S1 S2 D DB S1 S2 D DB P S1 S2 D BCD BCDP DBCD DBCDP BIN BINP DBIN DBINP MOV MOVP DMOV DMOVP XCH XCHP DXCH DXCHP CML CMLP DCML DCMLP Refresh mode D Direct mode With an A3M processing time will be 20 us longer than the indicated time APP 72 APPENDICES
269. D103 in units of 4 points M9038 P puis K1 K LD M9038 oH evo TOUS LOTOO 1 BMOV D66 D100 K4 10 END X2F to X2CX2B to X28X27 to X24X23 to X20 Before 11 11 execution After execution destination b4b3 to to 0 6 BASIC INSTRUCTIONS MELSEC A FMOV 1 Program which outputs the data of the lower 4 bits of DO to Y10 to 23 in units of 4 points when XA turn on S blBss e n nnd 54 53521 50 d Nds ea E A D SA bo eb Ignored Transfer X00A Coding P K1 K 0 LD X00A M EM DO SUC 2 1 FMOVP DO K1Y010 K5 10 END 2 Program which outputs the data of X20 to X23 to D100 to 0103 when is turned on X2F to X2CX2B to X28X27 to X24X23 to X20 Before execution 1 0 1 1 0 1 1 1 0 0 1 0 11 1 0 Ignored After execution destination b4b3 to 011 to 0 XODA Coding P K1 K 0 LD X00A 0 E CMS 1 FMOVP K1X020 D100 K4 10 END 6 BASIC INSTRUCTIONS MELSEC A 6 4 4 16 32 bit data exchange XCH XCHP DXCH DXCHP Applicable All CPUs CPU
270. DROR 3 7 8 088 9 DRORP K3 12 END Al A b31 230 b29 b28 b27 b17 b16 b15 b14 b13 Before execution olo l Contents of BO D s NN EX Bel before execution a Carry flag n 1 9012 Contents of BO ETT ERI To B31 when n 1 s Progress n 2 K lt 0 Contents of BO when n 2 After execution 3 DRCR Program which rotates the contents of AO and 1 three bits to the right when XC turns on X00A Coding PK 0 DMOV 1 A0 7 M Ec eu E 1 DMOVP 1 AO X00C 3 DRCR 3 8 LD X00C 9 DRCRP 12 1 Carry flag 4 v M9012 b31 b30 16 615 Before execution Contents of BO before execution 1 1 S N S Contents of BO 1 2 Progress To carry flag Ds Contents of BO when 2 SR To carry flag After execution 3 lolol amp lolol amp 22 22 Before execution carry flag is either 1 0 7 APPLICATION INSTRUCTIONS MELSEC A 7 2 4 32 bit data left rotation DROL DROLP DRCL DRCLP Applicable All CPUs CPU Available Device 2 gt 8 oo ez 525 5 Bit device Word 16 bit
271. DSFL DSFLP 1 Available Device Bit device Word 16 bit device Constant Pointer Level Diait specification M L S D M9012 M9010 M9011 D 1 For the number of steps when At ACPU is used refer to Section 3 8 1 2 Subset processing can be used with ASHCPU A3MCPU and Az ACPU only Shift commands LIIndicates the instruction symbol DSFR DSFL Setting data V Head number of device which stores data to be shifted Number of shifts D DSFR 1 Shifts the word devices of to the right by one bit 11 gt Functions n points which begin with the device specified at D Shift range pointspints 4 gt D n 1 D n 2 D n 3 2 D 1 Before execution C 2 The highest bit changes to 0 3 For T C the present value count value is shifted The shift of set value cannot be performed Ois entered xea After execution DSFL 1 Shifts the word devices of the left by one bit n points which begin with the device specified at D to Shift range n points t5 p n 1 2 Dis n 3 092 Ds1 D Before execution vv ois After execution S 0 2 The lowest bit changes to 0 3 In regard
272. EC A When the range of numeric values handled in 16 bits and 32 bits exceeds that specified overflow underflow this is indicated as in the following table Table 3 3 processing Outside the Allowed Numeric Value Range Processing of 16 bit Data Processing of 32 bit Data Decimal display Hexadecimal display Decimal display Hexadecimal display 32765 8003 2147483645 80000003 32766 8002 Over 2147483646 80000002 Over 32767 8001 flow 2147483647 80000001 Overflow flow _32768 8000 2147483648 80000000H 32767 7FFFH 2147483647 7FFFFFFFH 32766 7FFEH 2147483646 7FFFFFFEH 32765 7FFDH 2147483645 7FFFFFFDH 32764 7FFCH 2147483644 7FFFFFFCH Processing of 16 bit Data Processing of 32 bit Data Decimal display Hexadecimal display Decimal display Hexadecimal display 32765 8003H 2147483645 80000003 32766 8002 2147483646 80000002 32767 8001H 2147483647 80000001H Underflow 32768 8000 2147483648 80000000H 32767 7FFFH 2147483647 7FFFFFFFH Under 32766 7FFEH Under 2147483646 7FFFFFFEH flow 32765 7FFDH flow 2147483645 7FFFFFFDH 32764 7FFCH 2147483644 7FFFFFFCH Even in the case of overflow and underflow the carry flag and error flag do not change Decimal display corresponds to hexadecimal display as shown below Decimal display Hexadecimal display 0005H 0004H 0003H 0002H 0001H 0000H FFFFH FFFEH FFFDH FFFCH FFFBH l 8000H To use values
273. ED indicators To avoid this use the SET instruction to turn ON the annunciator If the OUT instruction is used to turn ON the annunciator the annunciator coil turns OFF when the operation result of instructions preceding the OUT instruction turns OFF However display contents of LED indicators and ERROR LEDs on the CPU module and contents of special registers do not change For details refer to the ACPU Programming Manual Fundamentals REMARK The number of steps is 3 when either of the following devices is used for OUT instruction Special relay M e Annunciator F 5 15 5 SEQUENCE INSTRUCTIONS MELSEC A OUT T 1 Type of Timer When the operation result of instructions preceding the OUT instruction are on the coil of timer turns on and counts up to the set value When the timer times out counted value set value the contact is as indicated below NO contact Continuity NC contact Non continuity When the operation result of instructions preceding the OUT instruction change from ON to OFF the following occurs Present Value Before Out After Time Out Timer Coil of Timer NO contact NC contact NO contact NC contact 100ms timer 10ms timer OFF 0 Non continuity Continuity Non continuity Coninuity 100ms retentive timer OFF Present value Non continuity Continuity Continuity Non continuity is retained After the timer has timed out
274. EDC 7 100 7 9 3 Character display instructions LEDB 7 103 7 9 4 reset instruction LEDR esee 7 105 7210 Other Instructions hin etre ot han Ghee bate od ee dtu eld 7 108 7 10 1 WDT reset WDT nnns sinn 7 109 7 10 2 Specific format failure check CHK sssssssssssseseseeeeeen enne nenne 7 111 7 10 3 Status latch set reset SLT nnns 7 117 7 10 4 Sampling trace set reset STRA 7 119 7 10 5 Carry flag set reset STC nennen 7 121 7 10 6 Pulse regeneration instruction DUTY ssessseeeem ene 7 123 7 11 Servo Program Instructions 7 125 7 11 1 Servo program start 7 126 7 11 2 Present position data and speed change instruction DSFLP 7 130 8 MICROCOMPUTER e de 8 1 8 16 8 1 Specifications of Microcomputer 8 1 8 2 Using Utility Program
275. Forward run when the backward stroke end sensor is not actuated Yi gt Condition 5 4 SET MO Error code 5 DO Backward run when the forward stroke end sensor is not actuated Xo Condition 6 At At SET MO _ Error code 6 DO The CHK instruction performs error check following the circuit pattern illustrated above The circuit pattern cannot be changed 7 113 7 APPLICATION INSTRUCTIONS MELSEC A 8 Devices D1 and D2 must be reset before execution of the CHK instruction If devices D1 and D2 are not reset after execution of the CHK instruction the CHK instruction cannot be executed again Contents of D1 and D2 are retained till they are reset by the sequence program 4 Always provide pointer P254 to the head of the CHK instruction block 5 The CHK instruction can be written to any desired step in the sequence program However it is impossible to use it at 2 or more points simultaneously 6 Other contact commands cannot set check condition If the ANI instruction is used to set check condition the processing about the check condition will not be performed The error numbers mentioned in 8 below are assigned also to this ANI instruction P254 X005 X009 XO X006 X002 m gt Check is not performed a Set check condition with the LD or AND instruction before the CHK inst
276. H board Continue Error Code D9008 Detailed Error Code D9091 CPU States Error and Cause When using MELSECNET 10 1 2 3 The contents of the network parameters for the first link unit written from a peripheral device differ from the actual network System The link parameters for the first link unit have not been written The setting for the total number of stations is 0 When using MELSECNET 10 1 2 3 The contents of the network parameters for the second link unit written from a peripheral device differ from the actual network system The link parameters for the second link unit have not been written The setting for the total number of stations is 0 When using MELSECNET 10 1 2 3 The contents of the network parameters for the third link unit written from a peripheral device differ from the actual network System The link parameters for the third link unit have not been written The setting for the total number of stations is 0 When using MELSECNET 10 1 2 3 The contents of the network parameters for the fourth link unit written from a peripheral device differ from the actual network system The link parameters for the fourth link unit have not been written The setting for the total number of stations is 0 1 Corrective Action Write the parameters again and check Check the station number
277. INSTRUCTIONS MELSEC A 7 10 6 Pulse regeneration instruction DUTY All CPUs Available Device gt E To 585 E Bit device Word 16 bit device Constant Pointer Level 3 Xx Y IM L 5 B F T D 1 2 K H P 1 5 M9012 M9010 M9011 ni n2 0 1 Index qualification can be used with AnA AnU only Setting data Start input Number of scans during which timing pulse is on Number of scans during which timing pulse is off Timing clocks for user M9020 to 4 Functions 1 Sets the timing clock for user M9020 to 9024 specified at D to ON at the scan count specified at n1 and to OFF at the scan count specified at n2 2 Atthe initial status when the timing pulse input is off the timing pulse is off 3 When n1 and n2 are set to 0 the timing pulse is as described below n1 2 0 The timing pulse remains off n1 0 n2 2 0 The timing pulse remains on Execution Conditions ON Start input OFF DUTY Executed only once gt lt Timing pulse scans al n2 scans Operation Error In the following case operation error occurs and the error flag turns on e The setting of D is other than M9020 to 9024 7 123 7 APPLICATION INSTRUCTIONS Program Example
278. IS UNI Dissociation association commands Setting data Head device number stor S D n ing data to be dissociated 5 0 n Device number which will store data dissociated associated ni dissociation 1 to 4 Number of data associ ated 1 to 4 Functions DIS 1 Stores the data of lower n digits one digit consists of four bits of 16 bit data specified at S into the lower four bits of devices of n points which begin with the device specified at D Before execution After execution b15 51261 b8b7 b4b3 K Set to 0 Storage area 2 The upper 12 bits of devices of n points which begin with the device specified at D are set to 0 3 For 1 to 4 can be specified 4 When n is 0 no processing is performed and the contents of n points beginning with the device of D do not change 7 APPLICATION INSTRUCTIONS MELSEC A UNI 1 Associates the data of lower four bits of 16 bit data in devices of n points which begin with the device specified at S to the 16 bit device specified at D Before execution After execution bilo B b4b3 M D Ignored Data to be associated 2 The bits of upper 4 n digits of device specified at D are set to 0
279. Instructions 1 Execu x Classi Instruction F i le gl fication 5 Symbol Symbol Contents of Processing e Con 2 98 Applicable CPU Page 5 25 xeu Saar e ANDs logical blocks d ANB iro Series connection of blocks 1 idi dE Ors logical blocks j DRE I Exiit y 1 Parallel connection of blocks 1 o 5 5 tion 5 en Stores the operation result 1 5 9 Reads the operation result MED from MPS s d Reads the operation result from T MPP MPS and clears the result o 5 9 1 For the number of steps when extension devices used or when index qualification is performed to bit devices for AnA A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 1 2 The A mark in the Index column indicates that index qualification can be performed with the AnA A2AS AnU QCPU A A Mode and A2USH board only 3 The A mark in the Subset column indicates that subset processing can be performed with the A3H AnA A2AS AnU QCPU A Mode and A2USH board only 2 INSTRUCTIONS MELSEC A 8 Output instructions Table 2 5 Output instructions 1 x
280. K7 K7 LD X000 030 H 1 D P K7X010 D9 K7Y030 12 END D The following Program subtracts MO to 23data from A1 data and stores to 010 011 when XB is switched on Coding X00B K6 oD 0 MO 010 H 1 DP A0 D10 12 END 6 15 6 BASIC INSTRUCTIONS MELSEC A 6 2 3 BIN 16 bit multiplication division P All CPUs Available Device gt 2 gt oD oo 5 Bit device Word 16 bit device Constant Pointer Level 8 3 9 2 X Y ML S B F T C D WR AO A1 Z V K 1 N 5 M9012 M9010 M9011 81 10 0 K1 2 10 0 to O Indicates the instruction symbol Setting data St 52 D Multiplicand dividend head device number storing multiplier dividend Multiplication division commands Multiplicand divider or head device number storing multiplier divider Head device number which will store the result Functions 1 Performs the multiplication of BIN data specified at 51 and the BIN data specified at S2 and stores the multiplication result into the device specified at S1 S2 0 1 D bi5 bO b15
281. LP 5 6 49 Nega CMLP S D ele Oo tion t f slp 7 6 49 E 5 1 S 2 2 1 D gt pomp peme S D 7 e e O 6 49 1 For the number of steps when extension devices are used or when index qualification is performed to bit devices AnA A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 1 2 The A mark in the Index column indicates that index qualification can be performed with the AnA A2AS AnU QCPU A A Mode and A2USH board only 3 The A mark in the Subset column indicates that subset processing can be performed with the A3H AnA A2AS AnU QCPU A Mode and A2USH board only 2 13 2 INSTRUCTIONS MELSEC A Table 2 13 Data Transfer Instructions sa age x 9 Classi Instruction Symbol Contents of Processing tion Con 2 Applicable CPU Page fication 5 Symbol diti 3 on 5 2 o 25 8 BMOV sloln 8 D 6 52 MEET ETE EFE E 3 5 Xx 91 6 52 Block 5 transfer 3 FMOV rwov 5 91 6 52 5 ENS EU 3 FMOVP 4 S D n 91 6 52 XCH
282. LSEC A 1 b ves x 9 Pest jor Symbol Contents of Processing tionCon 8 2 3 Applicable CPU Page y dition ES 25 Y S 51 S n D S gt D F slp A 5 510 i 51 52 D 6 10 51 52 gt D ent tE E addition 2 m n 5 D 51 910 D S 2 D P S 5 le e 6 10 s 2 D 6 10 81 52 2 D P S1 S2 D 6 10 5 9 ee 29 0 1 D 41 S M gt 0 1 D D P D S 6 13 D m 51 1 51 52 1 52 T 0 1 D 32bit D P D 51 52 d addition 5 subtrac e tion B DS SP dos 0 1 D S 1 S 2 0 1 D D P D S 6 13 D D 5152 D ee S141 51 52 1 52 0 1 D m D P D P s 52 1 0 6 13 51 52 1 81 x S2 2 0 1 D BIN 16bit 2 a 1 52
283. LSEC A Program Examples D 1 Program which compares the data of XO to and the data of D3 and D4 Coding K8 0 LDD K8X000 D3 0 D X000 D3 L 4Yos3 11 OUT Y033 12 END 0 lt gt 2 Program which compares the BCD value 18000 and the data of 03 and DA Coding M3 H 0 LD M3 0 lt 00018000 D3 Y033 1 lt gt H00018000 D3 12 OUT Y033 13 END D gt 3 Program which compares the BIN value 80000 and the data of D3 and D4 Coding M3 0 LD M3 0 HiD 8000 D3 1 033 1 LDD 80000 D3 M8 12 OR M8 13 ANB 14 OUT Y033 15 D 4 Program which compares the data of D1 and DO that of D3 and D4 Coding M3 M8 0 LD M3 ol muse 1 AND M8 2 ORD DO D3 0 lt DO D3 13 OUT Yo03s3 14 END 6 BASIC INSTRUCTIONS MELSEC A 6 2 Arithmetic Operation Instructions The arithmetic operation instructions are instructions which perform the addition subtraction multiplication and division of two BIN data or BCD data The arithmetic operation instructions are available in the following 56 types BIN BCD Classification ren Ref Page Ref Page 6 10 6 22 6 10 6 22 D 6 13 DB 6 25 D P 6 13 DB P 6 25 6 10 B P P 6 10 B P 6 22 D 6 13 DB 6 25 D P 6 13 DB P 6 25 6 16 6 28 6 16 B P 6 28 D 6 19 DB 6 31 D P 6 19 DB
284. M neo i DO 1 lins e 1 FROM H0004 JK10 DO K1 10 END DFRO Program which reads the data of two words from the address 10 of buffer memory of A68AD loaded in numbers 040 to to DO and 1 Coding X000 H K K 0 LD X000 Oe OFRO 0004 1 DFRO H0004 KI 10 END If a FROM instruction is executed for a special function module frequently in a short scan time the objective special function module may fail to process correctly To execute a FROM instruction for a special function module set the execu tion intervals meeting the processing and conversion time of that module using the timer and the constant scan function of it 7 APPLICATION INSTRUCTIONS AnU A2AS A2USH S1 7 6 2 Special function module 1 2 word board AOJ2H data write TO TOP DTO DTOP CPU fed Remark Available Device 5 E Bit device Word 16 bit device Constant Pointer Level 5 3 o X YI M ILIS BI FI IT C D IW R 1 2 HH P M9012 M9010 M9011 a K1 ni to 4 2 5 0 K1 to n3 K8 1 Bit devices cannot be used with the An and A3H 2 Constant setting range for S HO to FFFF K 32768 to 32767 8 K1 to when the T
285. M9203 Coding LD X003 1 PLS M1 4 LD M1 5 SET MO Executed onlv once 6 LD MO lt 7 MPS ON 8 ANI M9202 4x ANI M92 UN 9 9203 Turned ON by Turned OFF by the 10 M9200 the PCCPU sequence program 11 ANI M9201 uS 12 LWTP K3 03 099 Turned OFF by the 23 sequence program 24 AND M9203 2 25 5 MO 26 RST M9202 29 RST M9203 32 END M Executed only once 1 The contact which corresponds to M1 shown in the program example should be converted into a pulse If a pulse is not used following execution of the LWTP instruction will be disabled 2 The contact which corresponds to MO shown in the program example should be turned ON by the SET instruction If the OUT or PLS instruction is used the LWTP instruction may often be executed incorrectly 7 APPLICATION INSTRUCTIONS MELSEC A AnU A2AS 7 8 2 Remote I O station data read Write dd rad QCPU A A Mode Remark Available Device 2 T S F Bit device Word 16 bit device Constant Pointer Level o M 8 X L S B F T D 0 1 2 V K H P 1 5 M9012 M9010 M9011 ni 2 5 0 Setting data Head number of special function module specified by Read command master
286. MELSEC A 3 The following processings may take a slightly longer period of time a Device specified indirectly as source or destination is used with the index register V 2 Example MOV K400 0102 Index qualification b The number of digits specified for the devices used with any basic or application instruction is not K4 or K8 and or the device number specified is not 0 or a multiple of 8 0 or a multiple of 16 when the A3M AnA A2AS AnU or QCPU A A Mode is used Example MOV K3X02 K3Y14 Not 0 or a multiple of 8 0 or a multiple of 16 for the AnA A2AS AnU QCPU A A Mode Not K4 or K8 APP 40 APPENDICES 2 1 Instruction Processing Time of Small Size Compact CPUs Instruction 1 Sequence instructions MELSEC A Table 2 1 Instruction Processing Time of Small Size Compact CPUs Condition Device Processing Time us A1SJH A1SH A2SH S1 R D R D LD LDI AND ANI OR ORI X 2 1 0 25 1 9 Y M L B F T C 0 25 0 25 ANB ORB 0 25 0 25 Unchanged OFF OFF ON gt 0 25 1 9 Changed OFF ON ON OFF 0 25 L Unchanged M other than OFF OFF ON gt ON special M 0 25 Changed OFF ON OFF 0 25 Special M 7 2 F Unexecuted 12 8 Executed 52 2 Instruction execu
287. MITSUBISHI Type ACPU QCPU A A Mode Common Instructions Programming Manual Mitsubishi Programmable Logic Controller SAFETY CAUTIONS You must read these cautions before using the product In connection with the use of this product in addition to carefully reading both this manual and the related manuals indicated in this manual it is also essential to pay due attention to safety and handle the product correctly The safety cautions given here apply to this product in isolation For information on the safety of the PC system as a whole refer to the CPU module User s Manual Store this manual carefully in a place where it is accessible for reference whenever necessary and forward a copy of the manual to the end user REVISIONS The manual number is given on the bottom left of the back cover Print Date Manual Number Revision Oct 1990 IB NA 66250 A First edition Aug 1993 IB NA 66250 B Descriptions of ANUCPU A52GCPU and A1SCPU are added Subset and Number of steps in the Available Device in Sections 5 to 7 are deleted May 1998 IB NA 66250 C Addition of Models A1SCPU S1 A1SJCPU A1SJCPU S3 A1SCPUC24 R2 A2SCPU A2SCPU S1 A1SHCPU A1SJHCPU A2SHCPU A2SHCPU S1 A2ASCPU A2ASCPU S1 A2ASCPU S30 A2ASCPU S60 A2CCPU S3 A
288. MODE MELSEC A Address Configuration Odd address Even address b15 614 b13 612 11 610 b9 b8 b7 b6 b5 b4 b3 b2 bl XF XE XD XC XB X9 X8 X6 x5 X4 X3 X2 Xl X1E X1C XIB 1 X19 X13 X12 X11 X2E X2C X2B X29 X23 X22 X21 to Vv Stores ON OFF data from an input unit read only 0 indicates OFF and 1 ON Odd address Even address b15 614 b13 612 611 610 b9 b8 b7 b6 5 b4 b3 b2 YE YD YC YB YA v9 Y8 Y5 Y4 Y3 Y2 8200H 1 YIE Y1D Y1C 1 Y19 Y18 Y17 15 Y14 Y13 Y12 8202 Y2F Y2E Y2D 20 y2B Y2A Y29 Y28 Y27 Y25 Y24 Y23 Y22 8204 NU Output YO to 7FF Y Stores PC operation results and allows read write 0 indicates OFF and 1 ON The output memory is accessed as below Write Output module Output refresh after Read END instruction is y executed Direct mode Refresh mode Output memory Internal Stores device ON OFF data in one bit locations relay M e 0 indicates OFF and 1 ON Latch M L S Example MO to 47 are as follows relay L 010 2047 Step relay S b13 Odd area Even area A 612 511 610 969 298 67 bS 64 52 M12 M10 M9 M8 M7 M5 M4 M3
289. N with M9053 off A52G Interrupt d E Disables interrupt program run Not applicable to A3V A2C and PM D pi Valid for AnN with M9053 off A52G 6 64 Returns execution from the interrupt Not applicable to 2 and IRET IRET program to the sequence program A52G 6 64 Not applicable to AnA A2AS Micro SUB n QCPU A A Mode and 6 67 Executes the microcomputer A2USH board program program specified by n A Not applicable to AnA A2AS call SUBP SUBP n AnU QCPU A A Mode 6 67 A2USH board 1 For the number of steps when extension devices are used or when index qualification is performed to bit devices for AnA A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 1 2 The A mark in the Index column indicates that index qualification can be performed with the AnA A2AS AnU QCPU A A Mode and A2USH board only 3 The A mark in the Subset column indicates that subset processing can be performed with the A3H AnA A2AS AnU QCPU A Mode and A2USH board only 2 14 2 INSTRUCTIONS 6 Program switching instruction Table 2 15 Program Switching Instruction MELSEC A 7 Refresh instructions Table 2 16 Refresh Instructions stl x 5 prn 5
290. NDICES Table 2 1 Instruction Processing Time of Small Size Compact CPUs Processing Time us A2AS A2USH S1 Instruction Condition Device A2USH A2C A52G A0J2H A1FX S1 board R R R R R D R Unexecuted 0 40 0 17 1 3 1 0 1 3 2 3 0 32 Unchanged Y 0 40 0 17 1 3 1 0 1 3 2 3 0 32 Executed OFF OFF Changed ON OFF 0 40 0 17 1 3 1 0 1 3 2 3 0 32 Unexecuted 0 40 0 17 1 3 1 0 1 3 1 3 0 32 Unchanged L S 0 40 0 17 1 3 1 0 1 3 1 3 0 32 Executed OFF Changed OFF 0 40 0 17 1 3 1 0 1 3 1 3 0 32 Special M Unexecuted 0 80 0 36 3 0 3 0 3 0 3 0 1 0 B Executed 0 80 0 36 40 32 40 40 6 2 Unexecuted 2 0 0 91 3 0 3 0 3 0 3 0 1 0 5 39 66 Executed 150 596 447 596 596 ONGOFF RST 67 09 57 1 Unexecuted 1 4 0 64 3 0 3 0 3 0 3 0 1 0 8 3 Executed 5 6 2 55 54 43 54 54 ON OFF 9 0 Unexecuted 1 4 0 64 3 0 3 0 3 0 3 0 1 0 V Z D M AO A1 3 91 V Z Executed 8 4 Other 34 28 34 34 5 2 than V Z 1 12 Unexecuted 1 4 0 64 3 0 3 0 3 0 3 0 1 0 Executed 4 6 2 27 43 35 43 43 6 7 NOP 0 20 0 09 1 3 1 0 1 3 1 3 0 25 YO ON 466 6 M9084 OFF 435 342 2688 2150 2688 2688 OE FEND 432 6 END YO ON 451 3 M9084 ON 285 264 2575 2060 2575 2575 OFF 415 3 Unexecuted 1 2 0 54 54 43 54 56 8 8 Me Executed 1 2 0 54 39 39 39 51 8 0 Unexecuted 1 2 0 54 43 43 43 54 8 8 M L B F Executed 1 2 0 54 39 39 39 49
291. O OO 0707070 0 to 2 0 0 0O0 0 0 0 0 0 O O0O O 0O 0O 0O O O O KA 01 5 1 K1 DXNR to x Operation commands Indicates the instruction symbol WXNR DXNR Setting data Data for which exclusive NOR will be performed or head number of device which stores data Operation commands 52 01 Head number of device which will store the result of exclusive NOR WXNR may only be used in the areas marked Functions WXNR 1 Performs the exclusive NOR of the 16 bit data of device specified at D and the 16 bit data of device specified at S and stores the result into the device specified at D 16 bits e D T 0 0 1 0 1 1 1 0 1 1 0 1 0 0 0 Before execution WXNR S 0 0 0 1 0 0 1 1 0 1 0 1 0 1 3b 1 After execution D 0 1 1 1 1 0 1 1 1 1 7 15 7 APPLICATION INSTRUCTIONS MELSEC A 2 Performs the exclusive NOR of the 16 bit data of device specified at 51 and the 16 bit data of device specified at 82 and stores the result into the device specified at D
292. O P instruction is used K1 to K8 when the DTO P instruction is used Indicates the instruction symbol Write commands TO DTO Setting data prop m R 5 Head number of special function module Head address where data will be written Device number which stores data to be written Number of data to written Functions TO Writes the data of n3 points which begin with the device specified at S to the addresses starting at the address specified at n2 of buffer memory inside the special function module specified at n1 Special function module CPU module buffer memory 0 Device specified at S ees to n3points gt n3 words 2 DTO Writes the data of n3x2 points which begin with the device specified at S to addresses starting at the address specified at n2 of buffer memory inside the special function module specified at n1 Special function module f CPU module buffer memory Device specified at S 0 S to 2 n3x2 LN n3x2 f points d words 7 APPLICATION INSTRUCTIONS Execution Conditions Operation Errors Program Examples MELSEC A REMARK e At n1 specify the upper two digits of the head number of slot where the special function module is loaded
293. O TO DTO instruction is suspended and the interruption program that corresponds to the occurred interrupt is executed While M9119 is OFF the FROM DFRO TO DTO instruction cannot be used in an interruption program Objective interrupt is 10 to I5 112 113 and 129 to 131 7 APPLICATION INSTRUCTIONS MELSEC A 7 7 FOR to NEXT Instructions All CPUs 7 7 1 FOR to NEXT FOR NEXT Available Device Carry flag Error flag Bit device Word 16 bit device Constant Pointer Level Digit specification Index X Y S B A0 1 2 V K 1 M9012 M9010 M9011 n Repeat program Functions 1 When the processing of FOR to NEXT instructions is executed n times unconditionally performs the processing of the next step to the NEXT Instruction 2 At n 1 to 32767 can be specified When 32767 to 0 has been specified the same processing an n 1 is performed positive integers 3 When it is not desired to execute the processing of FOR to NEXT instructions cause a jump by use of the CJ or SCJ instruction 7 APPLICATION INSTRUCTIONS MELSEC A 4 Up to five levels of the nesting of FOR is allowed K 5 H neg A K FOR 3 H xe t K Up to five levels of the 4
294. OR to x Operation commands Indicates the instruction symbol DOR Setting data Data for which logical add will be performed or head number of device which stores data Operation commands 52 01 Head number of device which will store the result of logical add WOR may only be used in the areas marked Functions WOR 1 Performs the logical add of the 16 bit data of device specified at D and the 16 bit data of device specified at S per bit and stores the result into the device specified at D 16 bits p 1 1 1 a 1 1 1 1 Before execution WOR 5 0 1 1 1 1 1 After execution D 1 1 1 11 11 1 7 APPLICATION INSTRUCTIONS MELSEC A 2 Performs the logical add of the 16 bit data of device specified at S1 and the 16 bit data of device specified at 82 per bit and stores the result into the device specified at D1 16 bits E gt 51 0 1 0 T 0 1 0 1 0 1 0 1 0 1 0 T Before execution WOR 52 0 0 0 0 T T 1 L 1 0 1 0 0 0 1 After execution DTG ge zx
295. OWN 1 The CPU malfunctioned due to noise 2 Hardware failure 1 Take proper countermeasures for noise 2 Since it is hardware error consult Mitsubishi representative 1 Failure of the power module CPU module main base unit or expansion cable is detected 1 Replace the power module CPU module main base unit or expansion cable BATTERY ERROR Checked at power on 1 The battery voltage for the CPU module has dropped below the specified value 2 The lead connector of the CPU module battery is disconnected M9006 is ON 3 The battery voltage for the memory card has dropped below the specified value M9048 is ON 1 Replace the battery of the CPU module 2 Connect the lead connector when using the standard RAM or the memory retention function during power failure 3 Replace the battery of the memory card MELSEC A APPENDICES MELSEC A Appendix 1 LISTS OF SPECIAL RELAYS AND SPECIAL REGISTERS Appendix 1 1 List of Special Relays The special relays are the internal relays that have specific applications in the sequencer Therefore do not turn the special register ON OFF on the program Except for the ones marked by 1 or 2 in the table Table 1 1 Special Relay List Applicable CPU 1 Fuse blown OFF Normal M9000 ON Fuse blown unit OFF Normal ON Error 2 1 O unit verify error MINI link master OFF Normal mo
296. P instructions as shown below Execution of these instructions is completed when data are registered in the communication request registration areas And then following instructions are executed A2C A52G Communication request Remote terminal registration areas module E module K K K Area No 1 T 1 18 010 1 Area No 2 Area No 3 IPRC MO Yo000 Area No 4 Area No 5 Registration of Area No 6 communication request Area No 7 Remote terminal module module to N y Area No 31 Area No 32 v Once registration is completed by execution of an instruction communication processing is executed to the end even though the condition signal before the FROM P DFRO P instructions is turned OFF The device number specified at D2 is checked If the same device number was already specified to execute a processing registration is not processed after execution of the FROM P DFRO P instructions After completion of a processing which is executed according to registered data the bit device specified at D2 is turned ON and deleted from the communication request registration areas The communication request registration areas can hold data for up to 32 requests If the number of registration data exceeds 32 operation error occurs and registration processing is not executed Status of registration in the communicati
297. P S1 S2 D 4 6 2 09 124 99 124 124 308 19 4 SD 2 8 1 27 56 45 56 57 74 8 7 PSD 2 8 1 27 56 45 56 57 74 8 6 D SD 4 0 1 82 86 69 86 87 113 13 7 D PSD 4 0 1 82 86 69 86 87 113 13 6 S1 S2 D 3 2 1 45 99 79 99 99 134 15 7 P S1 S2 D 3 2 1 45 99 79 99 99 134 15 8 D S1 S2 D 4 6 2 09 124 99 124 124 163 20 3 D P S1 S2 D 4 6 2 09 124 99 124 124 163 20 4 S1 S2 D 3 4 1 55 118 94 118 119 211 16 5 P S1 S2 D D S1 S2 D D P S1 S2 D S1 S2 D P S1 S2 D D S1 S2 D D P S1 S2 D INC INCP DINC DINCP DEC DECP DDEC DDECP APP 51 APPENDICES MELSEC A Table 2 2 Instruction Processing Time of Small Size Compact CPUs Processing Time us AnS A1SJH A1SH A2SH S1 Instruction Condition Direct Mode Refresh Refresh Direct Refresh Direct Mode ic X Y Mode Mode Mode Mode B SD 123 123 183 33 6 34 1 25 3 25 2 B P SD 123 123 183 34 0 34 3 25 2 25 0 DB SD 175 176 280 47 0 47 5 35 2 35 2 DB P D 175 176 280 46 8 47 7 35 4 35 0 1 2 D 129 129 192 35 2 35 7 26 5 26 4 B P 1 2 D 129 129 192 35 2 35 5 26 6 26 2 DB 1 2 D 187 186 294 50 2 50 9 37 7 37 8 DB P 1 2 0 187 186 294 50 2 50 5 37 5 37 8 B SD 125 125 185 33 2 33 7 24 9 24 8 B PSD 125 125 185 33 0 33 7 24 9 24 6 DB SD 175 175 280 46 8 47 3 35 3 35 0 DB PSD 175 175 280 46 8 47 3 35 1 35 0 1 20
298. PENDIX 1 LISTS OF SPECIAL RELAYS AND SPECIAL REGISTERS APP 1 dad LEistof Special Relays s edente tete en e eh ee e EA I APP 1 127 Special Relays for EINK 2 ier tert rte ette P tet ER APP 13 1 3 Special Registers eene iae eti eoa ere pre es pride APP 16 1 4 Special Registers for enne enne APP 34 APPENDIX 2 OPERATION PROCESSING TIME eene emen nne APP 39 2 1 Instruction Processing Time of Small Size Compact APP 41 2 2 Instruction Processing Time of nennen nennen APP 66 2 3 Instruction Processing Time of QCPU A APP 79 APPENDIX ASCII CODE TABLE iiini ipea aaa ea aaa APP 89 APPENDIX 4 FORMATS OF PROGRAM SHEETS 77 sesenta APP 90 7 APPLICATION INSTRUCTIONS MELSEC A 7 APPLICATION INSTRUCTIONS Application instructions are used when special processing is required They are classified as follows Classification of Application Instructions Description Ref Page Logical operation instruction Logical operation such as logical add and logical 7 2 product Rotation instruction Rotation of specified data 7 21 Shift instruction Shift of specified data 7 30 Data processing instruction Data processing such as 1
299. PUs CPU Available Device gt S L IES BS Bit device Word 16 bit device Constant Pointer Level 8 E um X Y M LI IS BI F T C 5 M9012 M9010 M9011 K1 BIN to D K1 DBIN to Indicates the instruction symbol BIN DBIN Setting data BCD data or head number of device which stores BCD data Head number of device which will store BIN data Function BIN Converts BCD data 0 to 9999 of device specified at S into BIN and transfers the result to the device specified at D 8000 4000 20001000 800 400 200 100 80 40 20 10 8 4 2 1 S side BCD 9999 SGEHECHSEXERSESESESESEXESESEZESEXE Thousands Hundreds Tens Units digits digits digits digits i d BIN conversion 32768163848192 4096 20481024 512 256 128 64 32 16 8 4 2 1 D side BIN 9999 0 0 1 0 0 1 1 1 0 0 0 0 11 1 41 BE Always set to 0 6 BASIC INSTRUCTIONS MELSEC A DBIN Converts BCD data 0 to 99999999 of device specified at S into BIN and transfers the result to the device specified at D
300. ROM The program to read 1 word data from K2000 of buffer memory in the second special module special block from the A1FXCPU and writes the read data to DO when X20 is turned ON X020 H K K 0 FROM 0001 2000 DO 1 DFRO The program to read 2 word data from K2000 of buffer memory in the second special module special block from the A1FXCPU and writes the read data to DO and D1 when X20 is turned ON X020 H K K 0 _ DFRO 0001 2000 DO 1 REMARK During the execution of the FROM DFRO TO DTO instruction M9119 can control the execution of an interruption program e When M9119 is OFF FROM TO is given priority While the FROM DFRO TO DTO instruction is executed interrupt is disabled and interruption program is not executed even at the occurrence of an interrupt For the interrupt occurred during the execution of the FROM DFRO TO DTO instruction the interruption program that corresponds to the occurred interrupt is executed after the completion of the FROM DFRO TO DTO instruction While M9119 is OFF the FROM DFRO TO DTO instruction can be used in an interruption program When 9119 is ON interrupt is given priority If an interrupt occurs during the execution of FROM DFRO TO DTO instruction execution of the FROM DFRO TO DTO instruction is suspended and the interruption program that corresponds to the occurred interrupt is executed While M9119 is OFF the FROM DFRO TO DTO instruction cannot be used in an inter
301. RST MO XME OFF M Y For 2 26 RST Y14F scans 27 END RTOP x Executed only once CAUTION Provide interlock using the special registers mentioned below so that the RTOP instruction may be executed when the data link with remote l O stations is normal and parameter communication is not being performed Remote station normal error judgment 09228 to 09231 Parameter communication execution non execution judgment D9224 to D9227 For details refer to the MELSECNET Il Data Link System Reference Manual 7 APPLICATION INSTRUCTIONS MELSEC A The area equal to the number of special function modules which are loaded to corresponding remote station starting with the head device number of the master to remote station link registers set with link parameters is used by PC CPU OS Therefore this area cannot be used as data storage registers Example Link parameter setting Link register W _ Master to remote I O station No 2 W050 to WO9F 2 o 2 module Remote module To other station __ Special function module x 2 To other station Power suppiy W050 and W051 2 points are used by the OS of the PC CPU Range of the link registers 1 2 of master to remote l O station No 2 set with E MP link parameters 7 From W052 to WO9F can be used for data storage WO9E Ne
302. RUCUTIONS MELSEC A Execution Conditions ON Transfer command OFF Executed Executed per scan per scan lt 2 gt Executed _ Executed only once only once Programs Examples MOV 1 Program which stores the data of inputs XO to B into D8 X9036 Coding 4 D8 0 LD M9036 1 MOVP K3X000 08 6 END 2 Program which stores 155 into D8 as a binary value when X8 turns on 7 008 Codin om MOV 155 9 0 LD OBEN 1 MOVP K155 D8 6 END b15 1 1101111 DMOV 1 Program which stores the data of AO and A1 into DO and D1 Coding M9036 0 LD M9036 o DMOV BO 1 DMOVP AO DO 8 END 2 Program which stores the data of XO to 1F into DO and D1 M9036 H DMOV X000 DO H pere 0 LD M9036 1 DMOVP K8X000 DO 8 END 6 BASIC INSTRUCTIONS 6 4 2 16 32 bit data negation transfer CML CMLP DCML DCMLP All CPUs MELSEC A Available Device S x ES Bit device Word 16 bit device Constant Pointer Level 8 3 5 B F T 40 2 H P 5 M9012 M9010 M9011 S olololololo K1 CML to D olololololo K4 5 K1 DCML to
303. S Manufactured in July 1998 Stores the software version of the CPU module s internal system in ASCII codes Example Stores 414 for version Note The software version of the internal system may be different from the version marked on the housing x5 This function is available with the CPU of the following S W versions or later A2ACPU P21 R21 09060 Software version Software version of 51 internal system A3ACPU P21 R21 A2UCPU S1 A3UCPU A4UCPU Manufactured in May 1998 Usable with AnN and AnA which are compatible with SFC For the AnN and AnA which are compatible with SFC refer to the MELSAP II Programming Manual APP 22 MELSEC A Applicable CPU CPU Usable with AnN AnA AnU A2S QCPU A A Mode A2C 2 AnS AnSH A1FX and 52 Usable with AnA A2AS AnA bpard AnU and QCPU A A Mode Can be used only with AnU A2US or AnSH 5 APPENDICES MELSEC A Table 1 4 Special Register List Continue Stores error code when M9061 is turned on communication with modules or remote terminal modules fails Total number of stations of I O modules or Usable with A2C remote terminal modules or number of retries is and A52G not normal Initial program contains an error Cable breakage or power supply of I O modules or remote terminal modules is turned off Stores the bit pattern of the base module in abnormal con
304. SD 5 psisD 58 240 pPstseD S58 240 51520 i i DePSIS2D Ot 49 BsiseD _ 558 240 i i BPSis2D 5 24 51520 355 153 DBPSIS2D 355 158 B sisaD 43 189 BPSis2D 4 189 i DB SS2D 247 107 _ DBPSIS2D 107 _ 1 posco ___ 818 223 i DBcDP 0 O 818 23 1 08 DBN 10 DBNP 29 10 _ Mov 02 O28 0 0 O 028 127 __ ___ 127 058 _ 048 xcHP ___ 040 _ DxcH 072 DxcHP Pte 072 em 0 0 0 0 0 0 0956 1 1 pem o t2 058 05 POINTS 1 All the basic instructions indicated above are used without index qualification 2 When unexecuted any instruction is processed during the following time QO2CPU A Number of steps 1 x 0 079 us QO2HCPU A Q06HCPU A Number of steps 1 x 0 034 us APP 84 APPENDICES MELSEC A 3 Application instructions Table 2 9 Instruction Processing Time of QCPU A A Mode Instruction Processing Time us Instruction Condition Device WANDSD O40 L J S 81 229 0 5 Ee
305. UCTIONS Minor Errors Program Examples MELSEC A In the following cases the minor error control change error occurs and present position data change or speed change is not executed The error detection flag Xn7 is set and the error code is stored in the minor error code areas which correspond to the troubled axis A e circular interpolation SB speed limit value DSFLP For present position data change the axis specified with D has started For speed change the axis specified with D is executing zero return or For speed change the axis specified with D is decelerating For speed change the speed specified with n is out of the range from 1 to the 1 program to change present position data of axis 2 to the BCD data set at X90 to XAF when X81 is turned ON X081 24 PLS M11 28 SET M10 M2002 30 M DBIN X090 P DSFL D2 RST Coding 24 LD X081 25 PLS M11 28 LD M11 29 SET M10 30 LD M10 31 M2002 32 DBINP K8X090 41 DSFLP D2 KO 48 RST M10 49 END 7 132 M11 M10 0966 H M10 The present position data change storage flag M10 is set when X81 is turned ON When axis 2 is not started the BCD data of X90 to XAF are stored in D966 and D967 present position data change registers The DSFLP instruction is executed The present position data change storage flag is reset D966 7 APPLICATION INSTRUCTIONS
306. VCPU OFF No error Turn on when a self check error occurred on the D selfcheck error Error A3VCPU C mounted next to the A3VCPU B iacu M9099 A3VTU selfcheck OFF No error Turned on when a self check error occurred on the Dedicated to A3V error ON Error A3VTU Usable with AnN AnU OFF SFC program A2AS QCPU A ON SFC program Turned on if the SFC program is registered and A Mode A2C registered turned off if it is not 2 AnS AnSH A1FX and A52G Usable with AnN Should be turned by the program if the SFC NA Ky ANY A2AS QCPU A 21SFC program OFF SFC program stop program is to be started If turned off operation A Mode A2C M9101 start stop ON SFC program start output of the execution step is turned off and the Duplex operation Dedicated to A3V verify error SFC program registration 2 AnS SFC program is stopped AnSH A1FX and A52G Once turned on the program is latched in the system 2 AnS and remains on even if the power is turned off AnSH A1FX and Should be turned off by the sequence program when 52 turning on the power or when starting with the initial step of block 0 Selects the starting step when the SFC program is restarted using M9101 ON Started with the step of the block being Usable with AnN x executed when the program stopped AnA OFF
307. X10 to 1B and the data o WOR X010 D33 H of D33 is performed and the result is stored into D33 _ K4 n 033 030 Data of 033 is sent to the Y30 to e Coding 0 LD X00A 1 WORP K3X010 D33 6 MOVP 033 K4Y030 11 END 3 Program which performs logical add of the data of D10 and that of D20 and stores the result to 033 when XA turns on e Coding 0 LD X00A 2000 OMS 1 WORP 010 020 033 8 END 4 Program which performs logical add of the data of X10 to 1B and the data of D33 and sends the result to the Y30 to 3B when XA turns on Coding X00A K3 0 LD X00A WOR X00 Y o wo 010 gt SS 1 WORP K3X010 033 K3Y030 8 END 7 APPLICATION INSTRUCTIONS MELSEC A DOR 1 Program which performs logical add of the 32 bit data of XO to 1F and the hexadecimal number of FOFFH and stores the result to D66 and 67 when XB turns on X008 H 7 0 DMOV 0000F0FF 066 Hexadecimal number of is stored into 066 and 67 FERE 008 Logical add of the 32 bit data of to 1F and the E 32 bit data of D66 and 67 is performed and the result is stored into D66 and 67 Coding 0 LD X00B 1 DMOVP HOOOOFOFF D66 8 DORP K8X000 D66 17 END 2 Program which performs logical add of the 24 bit data of M64 to 87 and the 24 bit data of X20 to 37 and stores the result to 023 and 24 when 8 turns on M8 P K6
308. a registers succeeding the data register where the erased F number was stored are shifted to the preceding data registers By executing LEDR instruction the contents of D9125 to D9132 are shifted upward by one With a CPU equipped with an INDICATOR RESET switch the same process occurs when the switch is pressed When there are 8 annunciator detections the 9th one is not stored into D9125 to 9132 even if detected Annunciator Annunciator detection SET SET SET RST SET SET SET SETSET SET SET Usable with all LEDR detection number number F50 F25 F99 125 FIS F70 UA Lap a types of CPUs Stores information of I O modules and remote terminal modules connected to the A2C and A52G corresponding to station number Information of I O modules and remote terminal modules is for input output and remote terminal module identification and expressed as 2 bit data remote terminal 00 module or remote terminal module or initial module or initial communication is impossible Remote terminal 01 Input module or remote terminal module usable with impossible 10 Output module A2C and Input moduleor Data configuration A52G remote terminal module Station Station Station Station Station 6 5 4 3 2 Output module Station Station Station Station Station 14 13 12 11 10 Station Station Station Statio
309. able to A73 7 35 1 shift DSFL DSFL Din Sse XB 7 Not applicable to A73 7 35 to E DSFLP Dn on E 7 e l4 A Not applicable to A73 7 35 1 For the number of steps when extension devices are used when index qualification is performed to bit devices for AnA A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 1 2 The A mark in the Index column indicates that index qualification can be performed with the AnA A2AS AnU QCPU A A Mode and A2USH board only 3 The A mark in the Subset column indicates that subset processing can be performed with the A3H AnA A2AS AnU QCPU A A Mode and A2USH board only 2 19 2 INSTRUCTIONS 1 Data processing instructions Table 2 20 Date Processing Instructions MELSEC A 1 vo
310. ailable Device gt S L IES BS Bit device Word 16 bit device Constant Pointer Level 8 E um M LI IS BI F T C 5 M9012 M9010 M9011 5 K1 MOV to D 5 OO O K1 DMOV to Indicates the instruction symbol MOV DMOV Setting data Data of transfer source or head number of device which stores data Head number of device at transfer destination Functions MOV Transfers the 16 bit data of the device specified at S to the device specified at D 16 bit gt Before transfer S 1 0 0 1 0 1 0 0 1 1 0 0 1 1 1 NA Transfer After transfer D 1 olo 1 0 1 1 0 0 1 31 0 0 cd DMOV Transfers the 32 bit data of the device specified at S to the device specified at D E 32 bit gt Before transfer 8 1 1 1 1 Sals ol olr ala Transfer After transfer D 1 S A L 6 BASIC INT
311. am is available in two types However proceed with the coding according to Coding example 1 x000 X001 0 X002 X003 X004 X005 X006 X007 Coding example 1 0 gt WD M LD AND LD AND ORB LD AND ORB LD AND ORB OUT END X000 X001 X002 X003 X004 X005 X006 X007 M7 M7 There is restriction on the number of ORBs used Coding example 2 0 LD AND LD AND LD AND LD AND ORB ORB ORB OUT END V X000 X001 X002 X003 X004 X005 X006 X007 M7 If ORBs are written consecutively exceeding the number mentioned below the PC cannot per form proper operation For AnA A2AS AnU QCPU A A Mode and A2USH board 15 instructions 16 blocks For CPUs other than AnA A2AS AnU QCPU A A Mode and A2USH board 7 instructions 8 blocks 5 SEQUENCE INSTRUCTIONS MELSEC A 5 22 Operation result push read pop MPS MRD MPP All CPUs Available Device Bit device Word 16 bit device Constant Pointer Level Digit specification M L S D W Al K H P 1 M9010 M9011 When the ladder is dispiayed MPS MRD and MPP are omitted Functions MPS 1 Stores the operation result ON OFF immediately preceding th
312. ameters and or programs are not correctly written to sequence programs to the the mounted memory cassette memory cassette 2 Remove the memory cassettes that contain no parameters or sequence programs Parameters stored in the memory 1 Adjust the program capacity for cassette have exceeded the limit of parameters to the memory available program capacity cassette used 2 Use the memory cassette of which Ex pick memory capacity is larger than the A1NMCA 2KE program capacity for parameters RAM ERROR 20 Stop The CPU has checked if write and Since this CPU hardware error consult Checked at read operations can be performed Mitsubishi representative power on properly to the data memory area of CPU and as a result either or both has not been performed OPE CIRCUIT 21 Stop The operation circuit which performs ERR the sequence processing in the CPU Checked at does not operate properly power on WDT ERROR 22 Stop Scan time exceeds watch dog error 1 Calculate and check the scan Checked at the monitor time time of user program and reduce execution of 1 Scan time of user program has the scan time using the CJ END processing been exceeded for some instruction or the like conditions 2 Monitor the content of special 2 Scan time has lengthened due to register D9005 by use of instantaneous power failure peripheral equipment When the which occurred during scan content is other than 0 line voltage is insuff
313. ameters in the CPU memory check the contents make necessary corrections and write them again to the memory MISSING END INS Checked at STOP RUN 12 121 122 STOP The END FEND instruction is not given in the main program Write the END instruction at the end of the main program The END FEND instruction is not given in the sub program if the sub program is set by parameters Write the instruction at the end of the sub program 9 14 9 ERROR CODE LIST Error Massage CAN T EXECUTE P Checked at execution of instruction Table 9 3 Error Code List for ANACPU and Board Continue Error Code D9008 Detailed Error Code D9091 CPU States Error and Cause The same device number is used at two or more steps for the pointers P and interrupt pointers I used as labels to be specified at the head of jump destination Corrective Action Eliminate the same pointer numbers provided at the head of jump destination Label of the pointer P specified in the SCJ CALL CALLP LEDA B or LEDA B instruction is not provided before the END instruction Read the error step using a peripheral device check contents and insert a jump
314. an D38 6 ane 1000 mcs D38 JH Data is read from FIFO table and output to Y30 to 3F Coding 0 LD 038 5 OUT Y060 6 LD X00B 7 Y060 8 FIFRP K4Y030 038 15 END Before executiomon After executionon Pointer E D38 D39 Y30 to 3 0123 D40 41 42 43 44 45 7 APPLICATION INSTRUCTIONS 7 6 Buffer Memory Access Instructions MELSEC A Buffer memory access instructions are used to read and write data of buffer memory of special function modules and remote terminal modules when the A2C A52G is used There are 16 types of buffer memory access instructions as shown below Classification Instruction Symbol Ref Page FROM 7 59 Special function FROMP 7 59 module data read DFRO 7 59 DFROP 7 59 TO 7 61 Special function TOP 7 61 module data write DTO 7 61 DTOP 7 61 FROM PRC 7 63 Remote terminal FROMP PRC 7 63 data read DFRO PRC 7 63 DFROP PRC 7 63 Remote terminal data write DTOP PRC 7 APPLICATION INSTRUCTIONS AnU A2AS 7 6 1 Special function module 1 2 word FESSES LU PNE oar data read FROM FROMP DFRO Appicable QCPU A Mod DFROP A Mode Available Device 5
315. ange of 0 to 99999999 6 BASIC INSTRUCTIONS Program Examples BCD MELSEC A Program which outputs the present value of C4 from the Y20 to 2F to the BCD indicator PC output unit Y2B Y26 8000 Y2F Output power source 400 2 200 Y29 100 728 80 Y27 40 20 1Y25 10 24 8 723 4 1Y22 2 Y21 1 20 1000 2 80 BCD DBCD E o B a e o S o E EN AE EN 7 element indicator Coding 202 LD M9036 1 BCDP C4 K4Y020 6 END Program which outputs the 32 bit data of DO and D1 to Y40 to Y67 Input power Y67 to Y64Y63 to Y60Y5F to Y5CY5B to Y58Y57 to Y54Y53 to Y50Y4F to Y4CY4B to Y48Y47 to Y44Y43 to Y4C PC output unit Source LEE 2 1 EEE l S _ 1 Pues __ 7 element indicator 0 D2 1 Coding E 0 LD M9036 K8 _ 1 D DO K10000 D2 Yo50 12 DBCD D2 K8Y050 K4 21 BCD D4 K4Y040 040 26 END 6 BASIC INSTRUCTIONS MELSEC A 6 3 2 BCD 4 8 digit BIN data conversion BIN BINP DBIN DBINP Applicable All C
316. ansfers the result to DO ko Coding M9038 oH X000 DO dire M9038 1 CML K2X000 DO 6 END The number of bits of S The number of bits of D 7 X0 These bits are pede o all regarded 0 Pe Sid d E ed fsa bed ec ed JL CML b15 to b8 b7 to 1 1 1 1 1 1 1 1 0 0 1 1 1 1 2 Program which reverses the data of M16 to 31 and transfers the result to the Y40 to M9038 K2 K3 Coding omk 16 Y040 0 LD M9038 1 CML 2 16 K3Y040 6 END The number of bits of S The number of bits of D gt 23 to T6 These bits are repe all regarded 0 1 0 1 1 50748 Y47 Y40 1 1 1 1 1 0 1 0 0 0 1 1 3 Program which reverses the data of DO and stores the result to D16 when X3 turns on X003 P Coding 249 CML DO 016 0 LD X003 1 CML DO D16 6 END b15 to 1111011110 01111 01110111111 615 to DIS 1001 0 0 1 1 0 011 01140000 6 BASIC INSTRUCTIONS DCML 1 Program which reverses the data of XO to 1F and transfers the result to DO a
317. at S1 and stores the subtraction result into the device specified at D1 S1 52 D1 3 c 0 6 7 8 0 2 3 4 2 0 4 4 4 gt Digit higher than the specified digit is regarded as 0 3 At S 51 S2 and D 0 to 9999 BCD 4 digits can be specified 4 It is required to judge whether the operation result is positive or negative by use of the program Execution Conditions ON a Addition subtraction OFF commands Executed Executed O _ Executed __ _ Executed only once only once Operation Errors In the following cases operation error occurs and the error flag turns on A value other than 0 to 9 exists in any digit of S 51 S2 D 6 BASIC INSTRUCTIONS MELSEC A Program Examples Program which performs the addition of BCD data 5678 and 1234 and stores the result to D993 and at the same time outputs it to to M9036 P H 0 MOV 5678 0993 5678 is stored into 0993 in BCD P H 1234 0993 BCD data 1234 and 0993 are added and the result is stored into D993 P 4 0993 YO30 Data of D993 is output to the Y30 to e Coding 0 LD M9036 1 MOVP H5678 D993 6 B P H1234 D993 13 MOVP D993 K4Y030 18 END B Program which performs subtraction of the BCD data of D3 and tha
318. ates that index qualification can be performed with the AnA A2AS AnU QCPU A A Mode and A2USH board only 3 The A mark in the Subset column indicates that subset processing can be performed with the AnA A2AS AnU QCPU A Mode and A2USH board only 2 INSTRUCTIONS Table 2 10 Comparison Operation Instructions MELSEC A x Classi Instruction 290 fication 5 Symbol Symbol Contents of Processing tion Con 98 Applicable CPU Page dition 52 a 25 LDD LDD 51 52 1 e 6 6 Continuity when S141 S1 i E a S21 52 ANDD B Non continuity when 51 1 51 6 6 S2 1 S2 ORD 51 52 6 6 LDD lt gt LDD lt gt s s2 1 e 6 6 Continuity when S141 S1 Mi E ET z S241 S2 FANSE Non continuity when S1 1 S1 1 e 6 6 2 1 52 ORD lt gt ORD lt gt 51 52 6 6 LDD gt LDD gt 51 52 1 e 6 6 Continuity when 51 1 51 vun g
319. ayed A circuit containing more than 23 ORs or ORIs cannot be completely displayed Execution Executed every scan independently of the device status and operation result Conditions 5 SEQUENCE INSTRUCTIONS Program Examples LD 602 AND OR ORI X003 033 nh X004 X005 X005 M11 034 X006 X003 M6 M9 A Yo33 X004 X007 Y ong X005 M8 M11 Vy Y034 ANB X005 04 YO085 gt X008 YO36 gt X009 YO37 L Coding 0 LD OR OR OUT LD AND ORI OUT END Coding 0 OA gt ON ln N LD AND LDI ANI ORB ANI OUT LD LD OR ANB ANI OUT END e Coding 0 oar LD OUT AND OUT ANI OUT END X003 X004 X005 Y033 X005 M11 X006 Y034 X003 M6 X004 X007 Mg Y033 X005 M8 Mg M11 Y034 X005 Y035 X008 Y036 X009 Y037 MELSEC A 5 SEQUENCE INSTRUCTIONS MELSEC A 5 2 Connection Instructions 5 2 1 Ladder block series connection parallel connection ANB ORB Available Device Bit device Word 16 bit device Constant Pointer Level M L S 1 K H P 1 M9010 M9011 Digit specification Block
320. b31 16215 bO 5678 BIN 1234 BIN gt 7006652 BIN 2 When D is a bit device specify the bits beginning with the lower bits Example K1 Lower 4 bits bO to 3 K4 Lower 16 bits bO to 15 K8 32 bits bO to 31 3 At S1 and S2 32768 to 32767 BIN 16 bits can be specified 4 The judgment of whether the data of 51 and S2 are positive or negative is made at the highest bit 615 and that of D at 631 6 16 6 BASIC INSTRUCTIONS MELSEC A 1 Performs the division of BIN data specified at 51 and the BIN data specified at S2 and stores the result into the device specified at D Quotient Remainder S1 S2 D D 5678BIN 1234RIN mi 4 7428IWN 2 In regards to the operation result the quotient and remainder are stored by use of 32 bits in the case of word device and only the quotient is stored by use of 16 bits in the case of bit device Quotient Stored to the lower 16 bits Remainder Stored to the upper 16 bits Storable only in the case of word device 3 At S1 and S2 32678 to 32767 BIN 16 bits can be specified 4 The judgment of whether the data of 51 and S2 are positive or negative is made at the highest bit 615 and that of D at 615 Execution Conditions ON Multiplication division command Executed Execute
321. b9 b8 09196 09197 09198 P7 D9199 1 Error 0 Normal 1 Special registers are cleared when the PC is switched off or the RESET switch is set to LATCH CLEAR or RESET Data remains unchanged when the RUN key switch is set to STOP 2 The above special registers marked 1 above are latched and their data will remain unchanged after normal status is restored For this reason use one of the following methods to clear the registers a Method by user program Clear execution Insert the circuit shown at right into FT peoos the program and turn on the clear iip nd execution command contact to clear Special function register to be cleared the contents of register b Method by peripheral equipment Set the register to 0 by changing the present value by the test function of peripheral equipment or set to by forced reset For the operation procedure refer to the Instruction Manual for peripheral equipment c By moving the RESET key switch at the CPU front to the RESET position the special register is set to O 3 Data is written to special registers marked 2 above in the sequence program 4 Data is written to special registers marked 3 above in test mode of the peripheral equipment APP 33 APPENDICES MELSEC A Appendix 1 4 Special registers for link The link special register stores the result of any error etc which may occur du
322. below the specified value The lead connector of the battery is not connected Replace battery Connect the lead connector if RAM memory or power failure compensation function is used MELSEC A 9 ERROR CODE LIST MELSEC A 9 3 Error Code List for ANSHCPU Table 9 2 shows the error messages description and cause of error and corrective actions for A1SJH S8 A1SH and A2SH S1 Detailed error codes are stored in D9092 only when a dedicated instruction for CC Link is used Table 9 2 Error Code List for ANSHCPU Detailed Error CPU Error Message Code Error and Cause Corrective Action D9008 Code States D9092 INSTRCT 10 E Stop Instruction code which cannot be 1 Read the error step by use of CODE ERR decoded by CPU module is included peripheral equipment and correct in the program the program at that step 1 Memory cassette including 2 In the case of memory cassette instruction code which cannot rewrite the coments or replace be decoded has been loaded the cassette with a memory 2 Since the memory contents have cassette which stores correct changed for some reason contents instruction code which cannot be decoded has been included 101 Instruction code which cannot be 1 Read the error step by use of decoded by CPU module is included peripheral equipment and correct in the program the program at that step 1 Memory casse
323. ble Device gt 5 oo ez 525 rc Bit device Word 16 bit device Constant Pointer Level 9 o 2 M9012 M9010 9011 n 1 Right rotation commands Indicates the instruction symbol NE E ROR ROR Setting data Number of times 0 to 15 Functions ROR Rotates the data of AO n bits to the right without including the carry flag The carry flag is 1 or 0 depending on the status prior to the execution of ROR AO 3 Carry flag b15 b14 613 612 511 b10 b9 68 b7 b6 b5 b4 b3 b2 bl 50 9012 n gt gt n bit rotation RCR Rotates the data of AO 0 bits to the right including the carry flag e The carry flag is 1 or 0 depending on the status prior to the execution of RCR AO Carry flag A M9012 915 614 b13 612 DIL b10 69 68 b7 b6 b5 b4 b3 b2 bl bO gt n bit rotation Execution Conditions 2 A Right rotation command OFF Executed Executed per scan per scan gt gt al Executed _ Executed 7 APPLICATION INSTRUCTIONS Program Examples ROR
324. blocks of 8 points Functions 1 Partial refresh allows specified devices only in 1 scan to be refreshed and also allows incoming signals to be received and output signals to be output to output modules 2 Partial refresh is used to change ON OFF status of input X and output Y during 1 scan when the I O control mode is the refresh mode 3 In normal refresh mode input and output signals are handled in batch after execution of the END instruction It is accordingly impossible to output pulse signals during 1 scan If partial refresh is used input X or output Y of specified device number is forcedly refreshed and this allows pulse signals to be output during 1 scan 1 When the A2C is used pulse signals cannot be output during 1 scan due to data communication with I O modules though partial refresh of output Y is done with the SEG instruction For details refer to the A2CCPU User s Manual 2 The B used in this instruction does not mean link relay but means that the refresh bit number is B bit When the network is configured it can be used for all link relays 6 BASIC INSTRUCTIONS MELSEC A Execution 1 Data must be set as shown below Conditions M9052 Specifies partial refresh _ K4 SEG 010 001 H Set the number of points gt refreshed in blocks of 8 points Valid for B only May be any of K1 K2 K3 or K4 Function is always t
325. by the CHG instruction executed after is switched on ON OFF status MOVP instruction is only executed once 6 BASIC INSTRUCTIONS MELSEC A 3 When the 40 and QO6H are used the CHG instruction is executed repeatedly while its input condition is on The following program is written at step 0 of the main and subsequence programs Ladder example X000 PK 0 DO instruction execution Main sequence program run Subsequence 4 Timing chart program run Nd CHG instruction execution MOVP instruction is not executed Operation depending on ON OFF status MOVP instruction is only executed once MOVP instruction is only executed duing the first scan of the subsequence program selected by the CHG instruction executed after is switched on 6 BASIC INSTRUCTIONS Counting of Counter Used with CHG Instruction MELSEC A 1 When the is used execution contents of the counter change with status of M9050 when other input conditions are same Status of M9050 OFF ON Ladder example The following program is written at step 0 of the main and subsequence programs X000 K10 CO 1 scan 1 scan
326. c Operation 1 4 ennt 6 8 6 2 1 BIN 16 bit addition subtraction P 6 10 6 2 2 BIN 32 bit addition subtraction D D P D 6 13 6 23 BIN 16 bit multiplication division P 6 16 6 2 4 BIN 32 bit multiplication division D D P D 6 19 6 25 BCD 4 digit addition subtraction B B P B 6 22 6 2 6 BCD 8 digit addition subtraction DB DB P DB 6 25 6 2 7 BCD 4 digit multiplication division B B P B 6 28 6 2 8 BCD 8 digit multiplication division DB DB P DB 6 31 6 2 9 16 bit BIN data increment decrement INC INCP DEC 6 34 6 2 10 32 bit BIN data increment decrement DINC DINCP DDEC 6 36 6 3 BCD o BIN Conversion Instructions ssesssssssssssseseseeeeee eene nnne en 6 38 6 3 1 BIN data gt BCD 4 8 digit conversion BCD BCDP DBCD DBCDP 6 39 6 3 2 BCD 4 8 digit BIN data conversion BIN BINP DBIN DBINP
327. ce goes On when the PLF command in each PLF instruction goes from On to Off and the specified device goes Off when the PLF command is other than On Off For this reason if the PLF command from the same device is executed multiple times in 1 scan the device turned On by the PLF command may not go On in 1 scan Circuit X1 PLF mo 4 Timing Chart When the On Off timing of XO and X1 differ the specified device does not go On in 1 scan xo P MoH PrF 1 PLF MoH HPLF X OFF ON Mo OFF MO goes Off because X1 is ff x1 hi apes a because XT Is not MO remains in the state MO goes On because is On Off goes Off because is not On Off remains in the Off state e When the On Off of and X1 are the same timing goes On because X1 is gt MO A Off because X1 is remains in the On state not On Off MO remains in the Off state goes On because is On gt Off goes Off because is not On Off 4 INSTRUCTION FORMAT MELSEC A 4 INSTRUCTION FORMAT The explanations of instructions given in the following sections use the format described in this section Applicable CPU 2 gt Remark 7 8 3 n word data 1 word right shift leftshift DSFR DSFRP
328. ce this is CPU hardware error consult Mitsubishi representative MAIN CPU DOWN STOP The main CPU is malfunctioning or faulty Since this is CPU hardware error consult Mitsubishi representative UNIT VERIFY ERR Checked continuously Stop or Contin ue set by para meter Current module information is different from that recognized when the power was turned on 1 The module including special function modules connection became loose or the module was disconnected during operation or wrong module was connected Read detailed error code using a peripheral device and check or replace the module which corresponds to the data I O head number Or monitor special registers D9116 to D9123 using a peripheral device and check or replace the modules if corresponding data bit is 1 9 ERROR CODE LIST Table 9 4 Error Code List for the AnU A2AS and A2USH board Continue Detailed Error Code D9091 Error Code D9008 Error Massage FUSE BREAK OFF Checked continuously CPU States Stop or Contin ue set by para meter Error and Cause There is an output module of which fuse is blown The external power supply for output load is turned OFF or is not connected Corrective Action 1 Check the FUSE BLOWN indicator LED on the output module and replace the fuse 2 Read detailed error code using a peripheral device and replace the
329. ch output state Dedicated to torage areas for Stores output state of limit switch function 73 1 2 b15b14b13b12b11b10 b9 b8 b7 b6 65 b4 b3 b2 bi Limit switch output state duo de ace tis storediin Dedicated to the bit which storage areas Tpit pattern of iit mme AR Y axes 3 and 4 LZ output Y which switch function output le 4 Limit switch IY1 3 13 Yt 3 state is stored when output state fyer output state is Dedicated to 5 33 Y30 is turned on 0 Y xis Y storage areas for le xis 6 rte Axis turned off A73 axes 5 and 6 onis Limit switch e axis 8 ple output state Dedicated to storage areas for A73 axes 7 and 8 Stores error codes occurred at the PCPU in BIN code Normal A73CPU hardware error Cause of PCPU POP error code PCPU error Dedicated to error 7 error 73 error A7OMDF error AY42 error Servo amplifier connection state is checked and the result is stored in the bit which corresponds to each axis number Connection state is continuously checked Axes which changed from disconnected state to connected state are Bit pattern of servo regarded as connected But axes which changed from amplifier connection connected state to disconnected state are still regarded Dedicated to state as c
330. check error D9099 A3VTU amp lchacie amor code Error code of self check error on A3VTU is stored in BIN Self check error code Detail error number of the error which occurred in a SFC program Usable with AnA A2AS QCPU A Mode AnA board and AnU Unusable with AnA A2AS QCPU A Mode AnA board and AnU Dedicated to Stores the detail error number of the error occurred in a SFC program in a binary value Stores upper 2 digits of the head address of I O modules to be loaded or unloaded during online mode in BIN code Example Input module X2F0 H2F Changed module head address Monitors operation state of the A3VTS system and the A3VCPU 815 812 09095 EM EM IN 2 lt cpl B Y CPU A CPU System operation state Stores operation with 4 hexadecimal digits Operation state RUN STEP RUN PAUSE Operation state RUN STAND BY STEP RUN NO RIGHT OF OPERATION Dip switch information of CPU module is stored as follows 0 ON 1 OFF B15 to D9095 0 B4 B2 B1 BO Usable wtih QCPU A A mode only Dip switch information SW1 SW2 SW3 SW4 I SW5 Error code of self check error on CPU A is stored in BIN code e Cleared when 09008 of CPU A is cleared Error code of self check error on CPU B is stored in BIN code Cleared when D9
331. cient When the content is other than 0 the power voltage is unstable END NOT When the END instruction was Reset and run the CPU module again EXECUTE to be executed the instruction If the same error is displayed again it was read as other instruction is the CPU hardware error consult code due to noise or the like Mitsubishi representative 2 The END Jinstruction has changed to another instruction code for some reason WDT ERROR The CJ instruction or the like causes Check the program for an endless loop a loop in execution of the sequence and correct program to disable execution of the END instruction 9 ERROR CODE LIST Error Message UNIT VERIFY ERR Error Code D9008 MELSEC A Table 9 2 Error Code List for ANSHCPU Continue Detailed Error Code D9092 CPU States Error and Cause module data are different from those at power on 1 The module including the special function module is incorrectly loaded or has been removed or a different unit has been loaded Corrective Action The bit in special registers D9116 to D9123 corresponding to the module causing the verification error is 1 Use a peripheral device to monitor the registers to locate the 1 bit and check or replace the corresponding module To accept the current module arrangement operate the RUN STOP key switch to res
332. cified must be a multiple of 16 File register R and index registers Z and V must not be used Z and V are excluded when index qualification is performed to word devices 1 In the following cases the basic instruction and application instruction result in operation error a Error described in the explanation of each instruction has occurred b When the result of index qualification includes error See Section 3 5 5 If the specified range of a device has exceeded the allowable device range data will be written to devices other than the specified one without causing an operation error Therefore caution shuld be exercised X010 DO DMOV DO K4 B3F8 3 12 WSFF H Although B3F8 to 407 have been specified B400 to 407 do not exist Although W3FF and 400 have been specified W400 does not exist actually 3 INSTRUCTION STRUCTURE MELSEC A 2 Error processing If an operation error has occurred during the execution of basic instructions or application instructions the error flag M9010 9011 is turned on and the error step number is stored into the error step storage register D9010 9011 M9010 Turned on by operation error and turned off when the next basic instruction or application instruction is valid Error flag M9011 Turned on and latched by the first operation error 09010 Stores the head step number of the in s
333. consult Mitsubishi representative LINK UNIT ERROR 1 Either data link module is loaded to the master station 2 There are 2 link modules which are set to the master station station 0 1 Remove data link module from the master station 2 Reduce the number of master stations to 1 Reduce the link modules to 1 when the 3 tier system is not used I O INT ERROR Though the interrupt module is not loaded an interrupt occurred Since it is hardware error of a module replace and check a defective module For defective modules consult Mitsubishi representative MELSEC A 9 ERROR CODE LIST Table 9 4 Error Code List for the AnU A2AS and A2USH board Continue Detailed Error Code D9091 Error Code D9008 Error Massage SP UNIT LAY ERR CPU States Error and Cause A special function module is assigned as an I O module or vice versa in the assignment using parameters from the peripheral device Corrective Action Execute I O assignment again using parameters from the peripheral device according to the loading status of special function modules There are 9 or more special function modules except the interrupt module which can execute interruption to the CPU module loaded There are 2 or more data link modules loaded Reduce the special function modules except the interrupt module which can execute interrupt start to
334. conversion BCD BCDP DBCD DBCDP 6 39 6 3 2 BCD 4 8 digit BIN data conversion BIN BINP DBIN DBINP 6 42 6 4 Data Transfer amp nennen enne nnne nnne nnne 6 46 6 4 1 16 32 bit data transfer MOV MOVP DMOV DMOWP 6 47 6 4 2 16 32 bit data negation transfer CML DCML 6 49 6 4 3 16 bit data block transfer BMOV FMOV 6 52 6 4 4 16 32 bit data exchange XCHP DXCH DXCHP 6 56 6 5 Program Branch nstr ctions nee tea e Re Eh EE N Penta 6 58 6 5 1 Conditional jump unconditional jump CJ SCJ 6 58 6 5 2 Subroutine call return CALL CALLP 6 62 6 5 3 Interrupt enable disable return El DI 6 64 6 5 4 Microcomputer program call SUB SUBP sssssssse eee 6 67 6 6 Program Switching Instructions sess nnne nennen nnn enne 6 69 6 6 1 Main lt gt subprogram switching sse 6 69 0 7 Link sRetreshINStruCtOns ss trie 6 82 6 7 1 Link refresh aa aa oaae ae aaan
335. ct No 1 Refer to 2 for conditions 7 114 7 APPLICATION INSTRUCTIONS MELSEC A REMARK Error code numbers displayed after the CHK instruction execution indicate kind of the error occurred Prepare a troubleshooting table corresponding to the system for quick remedies Cause Corrective action o Conveyor 1 Backward run occurred Check limit switch X1 when the forward stroke end sensor d SOR Amit SWIG Wastiotactuated Check the conveyor Order of contact points Error code numbers Priority Error Code Numbers for the Instruction Execution The CHK instruction is executed every scan regardless of ON OFF status of check Conditions condition contact points The CHK instruction cannot be written and modified during PC CPU RUN 7 115 7 APPLICATION INSTRUCTIONS Operation Errors In the following cases operation error occurs and the PC CPU stops operation When parallel circuits are provided Bit device specified at 01 e CJ Pss Label 01 D2 gt Eliminate parallel contacts P254 gt Eliminate parallel contacts P254 in the circuit block of CJ HH H 01 D2
336. ction the RET instruction exists in the program and has been executed The CJ SCJ CALL CALLP or JMP instruction has been executed with its jump destination located below the END instruction The number of the FOR instructions is different from that of the NEXT instructions A JMP instruction is given within FOR to NEXT loop causing the processing to exit loop Processing exited subroutine by the instruction before execution of the RET instruction Processing jumped into a step in a FOR to NEXT loop or into a subroutine by the JMP instruction Corrective Action Read the error step by use of peripheral equipment and correct the program at that step Insert a jump destination or reduce multiple destinations to one CHK FORMAT ERR Instructions including NOP except LD X LDI X AND X and ANI X are included in the CHK instruction circuit block Multiple CHK instructions are given The number of contact points in the CHK instruction circuit block exceeds 150 There is no H CJ P 4 circuit block before the CHK instruction circuit block The device number of D1 of the CHK D1 02 instruction is different from that
337. ction module which has the same number Provide interlock using 1 1 X n1 1F 1 and Y n1 F so that other instructions may not be executed during data write to remote stations by the RTOP instruction Write instruction 1 1 TD 7 0140 10 WO052 10 1 1 1 1 4 Y n1 F is ON during execution of the RTOP instruction X n1 1F turns ON at completion of the execution Since Y n1 F remains ON after completion of the RTOP instruction execution turn it OFF by the sequence program 5 When the RTOP instruction cannot be executed due to error of specified special function module 1 10 turns ON If this is the case check the specified special function module If Y n1 D is turned ON X n1 1D turns OFF Execution Conditions ON Read command OFF RFRP Executed only once Operation Errors In the following cases operation error occurs and the error flag turns on e The specified station is not a remote station The head I O number specified at n1 is not a special function module The number of points n3 exceeds the link register range WO to 3FF 7 APPLICATION INSTRUCTIONS Program Examples Use a pulse signal for this command 1 MELSEC A RTOP A program to write data in W52 to 61 to addresses of 10 points starting with address 10 in the A68AD which is loaded in the slot for the remote stat
338. cu x 9 Classi Instruction Symbol Contents of Processing tion Con 2 3 3 Applicable CPU Page fication 2 Symbol EZ 5 dition 25 LD e 6 4 51 52 e 2 7 B Continuity when 51 52 5 AND rp Me 51152 Non continuity when S1 S2 7 e ea 5 OR s 521 7 6 4 5 LD lt gt LD lt gt 1 82 6 4 Continuity when 1 2 5 5 LANDE 51 182 Non continuity when 51 S2 64 5 OR lt gt lt gt gt H 7 6 4 5 LD gt LD gt 51 52 7 6 4 ER Fox Continuity when 51 gt 52 5 ANDS ana S192 Non continuity when S1 lt S2 7 6 4 16 bit OR OR 51 52 6 4 data 5 7 COM 5 parison LD LD 51 52 6 4 7 Continuity when 51 lt 52 5 _ AND lt lt 51152 Non continuity when 51 gt 52 tJ 7 64 Mona 2 OR lt OR lt 1 52 z 6 4 5 7 Continuity when 1 lt S2 5 Non continuity when 51 gt S2 7 5 7 5 7 Continuity when S1 gt 52 5 Non continuity when S1 S2 7 5 7 1 For the number of steps when extension devices are used or when index qualification is performed to bit devices for AnA A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 1 2 The A mark in the Index column indic
339. d Remains on if battery voltage becomes normal Turned on when error is found as a result of self diagnosis Turned on when F of F instruction is executed Switched off when D9124 data is zeroed Turned on when operation error occurs during execution of application instruction Turned off when error is eliminated Turned on when operation error occurs during execution of application instruction Remains on if normal status is restored FF ff Carry flag a Dun Carry flag used in application instruction APP 1 Usable with all types of CPUs Only remote I O station information is valid for A2C Usable with all types of CPUs Only remote I O station information is valid for A2C Dedicated to AnA A2AS AnU and QCPU A A Mode Usable with all types of CPUs Usable with all types of CPUs Usable with all types of CPUs Usable with all types of CPUs Usable with all types of CPUs Unusable with A3H AnA A2AS A3A board AnU and QCPU A A Mode Usable with all types of CPUs Usable with all types of CPUs APPENDICES MELSEC A Table 1 1 Special Relay List Continue Clears the data memory including the latch range Data memory OFF No processing other than special relays and special registers in Usable with all clear flag ON Output clear remote run mode from computer etc when M9016 is types of CPUs on Data memory OFF No processing ds tne unlateheg ga
340. d for setting switch 0 Indicates the module for setting switch 1 Indicates the module for setting switch 2 Indicates the module for setting switch 3 Indicates the module for setting Switch 4 or the module for extension base unit slot 0 1 Fuse blow Fuse blow module bit D9100 module pattern Indicates the module for setting Switch 5 or the module for extension base unit slot 1 Indicates the module for setting Switch 6 or the module for extension base unit slot 2 Indicates the module for setting switch 7 or the module for extension base unit slot 3 Sets value for the step transfer monitoring timer and the number of F which turns on when the monitoring timer timed out 615 to b8 67 to bO Step transfer Timer setting value and monitoring timer the F number at time setting out Timer setting 1 to 255 sec in seconds F number setting By turning on any of M9108 to M91 14 the monitoring timer starts If the transfer condition following a step which corresponds to the timer is not established within Set time set annunciator F is tuned on P P P oo Usable with AnN and AnA which are compatible with SFC For the AnN and AnA which are compatible with SFC refer to the MELSAP II Programming Manual APP 26 Usable with all types of CPUs Only remote station information is valid for A2C Dedicated to 2 Usable with AnN AnA AnU A2AS AnA board QCPU A A Mode
341. d per scan per scan gt gt Executed Executed only once E only once Operation Errors In the following case operation error occurs and the error flag turns on A1 or V has been specified at D The divisor S2 is 0 6 17 6 BASIC INSTRUCTIONS MELSEC A Program Examples ai 1 Program which stores the multiplication result of 5678 and 1234 in BIN to D3 and 4 when X5 turns on Coding X005 PK K 0 LD X005 0 38 8 12347 D3 1 5678 K1234 03 8 END 2 Program which outputs the multiplication result of the BIN data of X8 to F and the BIN data of X10 to 1B to Y30 to Coding M9038 K2 0 LD M9038 01 Xoo8 X010 YOSO H 1 K2X008 K3X010 K4Y030 8 END Program which outputs the quotient obtained by dividing the data of X8 to F by 3 14 to Y30 to when turns on X003 K _ e Coding 0 X008 100 0 LD X003 j K2X008 K100 DO Td im 8 K314 K4Y030 DO 314 H 7 15 END 6 18 6 BASIC INSTRUCTIONS MELSEC A 6 2 4 BIN 32 bit multiplication division D D P D D P Applicable CPU All CPUs Available Device gt e 8 EG Bit device Word 16 bit device Constant Pointer Level 8 E 9 2 2 M9012 M9010 9011 O 0O 0O O ojo K1 82
342. de and A2USH board 15 instructions 16 blocks For CPUs other than AnA A2AS AnU QCPU A A Mode and A2USH board 7 instructions 8 blocks If more ORBs are written consecutively the PC cannot perform proper opera tion 5 SEQUENCE INSTRUCTIONS Program Examples ANB MELSEC A When circuit blocks are serially connected consecutively the coding of program is available in two types However proceed with the coding according to Coding Coding example 2 example 1 X000 X002 X004 X006 X008 0 7 X001 X003 X005 ind X009 Coding example 1 0 LD X000 0 LD 1 OR X001 OR 2 LD X002 2 LD 3 OR X003 3 OR 4 ANB 4 LD 5 LD X004 5 OR 6 OR X005 6 LD 7 ANB 7 OR 8 LD X006 8 LD 9 OR X007 9 OR 10 ANB 10 ANB 11 LD X008 11 ANB 12 OR X009 12 ANB 13 ANB 13 ANB 14 OUT M7 14 OUT 15 END 15 END V X000 X001 X002 X003 X004 X005 X006 X007 X008 X009 M7 If ANBs are written consecutively exceeding the number mentioned below the PC cannot per There is no restriction on the number of ANBs used form proper operation For AnA A2AS AnU QCPU A A Mode and A2USH board 15 instructions 16 blocks For CPUs other than AnA A2AS AnU QCPU A A Mode and A2USH board 7 instructions 8 blocks 5 SEQUENCE INSTRUCTIONS ORB MELSEC A When circuit blocks are parallelly connected consecutively the coding of progr
343. des The detailed error codes added to AnUCPU A2ASCPU and A2USH board Error codes detailed error codes and error steps are stored in the following special registers Error code D9008 Detailed error code D9091 Error step D9010 and D9011 Table 9 4 Error Code List for the AnU A2AS and A2USH board Error Detailed Error Massage Code SHOE oe Error and Cause Corrective Action 09008 Code States D9091 INSTRCT Instruction codes which the CPU Read the error step using a CODE ERR cannot decode are included in the peripheral device and correct the Checked when program program of the step STOP RUN Check the ROM if it contains or at execution instruction codes which cannot be of instruction decoded If it does replace it with a correct ROM Index qualification is specified for a Read the error step using a peripheral 32 bit constant device and correct the program of the step Device specified by a dedicated instruction is not correct An dedicated instruction has incorrect program structure An dedicated instruction has incorrect command name Index qualification using Z or V is included in the program between LEDA IX and LEDA B 1 1 Index qualification is specified for the device numbers and set values in the OUT instruction of timers and counters Index qualification is specified at the label number of the pointer P
344. devices which begin with the device specified at D Special function module buffer memory P Device specified at D CPU edule 3 2 cs words n2 X 4 a n3x2 points 7 APPLICATION INSTRUCTIONS MELSEC A REMARK e Specify n1 with the upper two digits when the head number of the slot in which a special function module is inserted is expressed in 3 hexadecimal digits Example 3 25 8 8 Elx x gt ge 2 lt lt lt lt 2 lt lt lt M X000 X010 X020 X030 040 060 Y080 Yv090 to to to to to to to to XOOF 1 5 07F YO8F YO9F Head I O number to be read K4 or H4 Execution Conditions Read command OFF Executed Executed gt lt gt OP gt Executed Executed only once only once Operation Errors In the following cases operation error occurs and the error flag turns on e Access cannot be made to the special function module The I O number specified at n1 is not a special function module n3 points which begin with the device specified at D exceeds the specified device range Program Examples FROM Program which reads the data of one word from the address 10 of buffer memory of A68AD loaded in I O numbers 040 to to DO Coding 0 P FRO
345. disk into the peripheral device and read the parameters and sequence program from the user disk to the user program area gt Write the combined program onto user disk Read the utility program from the system disk to the utility program area Combine together the sequence program and utility program in the user user program area 8 MICROCOMPUTER MODE MELSEC A 2 Calling the utility program Call the utility program from the sequence program as described below Specify input data in any Specify the data required for program run device number for word device D W R storing the operation result etc in any word device Specify the head device The head device number storing the input data should be number storing the in specified in D9090 before calling the utility program be put data in D9090 cause D9090 is read to check the input data location when the utility program is executed Call the head address of the utility program using the SUB instruction For further information see the corresponding utility program operating manual 8 MICROCOMPUTER MODE MELSEC A 8 3 Using User Written Microcomputer Programs A source program written by the user in the 8086 assembly language is converted to a machine language using assembler commands of CP M or MS DOS This converted program is called the object program and is to be stored in the
346. displayed The contents in M9008 and D9008 are not reset so they should be reset by using the user s program At this time the annunciator is not reset When the annunciator is ON Functions CPU modules which do not have an LED indicator on the front panel Performs the following actions 1 Flickers and then turns off the ERROR LED 2 Resets the annunciator F stored in D9009 3 Resets D9009 and 9125 and shifts the F numbers of D9126 to 9131 to be processed 4 Transfers the F number which has been newly stored in D9125 to D9009 5 Reduces 1 from the data of 09124 However when 09124 is 0 the data remains 0 7 105 7 APPLICATION INSTRUCTIONS Before execu tion D9009 20 0 D9009 1 is Je JH D9124 ___ D9125 _ D9126 _ D9127 09128 09129 _ D9130 _ 09131 D9132 After execution 99 gt MELSEC A Number of entered F numbers annunciaor accumulator F number storage area CPU modules which have an LED indicator on the front panel Performs the following actions Resets the F number displayed at the CPU front Resets the annunciator F stored in D9009 Resets D9009 and 9125 and shifts the F numbers of D9126 to 9132 to be processed Transfers the F number which has been newly stored in D9125 t
347. dition When basic base module is abnormal Bit 0 turns ON When ist expansion base module is abnormal Bit 1 0 Normal 1 Initial data error 2 Line error Abnormal Bass Stores the bit pattern of turns ON Dedicated to D9068 the abnormal When 2nd expansion base module is abnormal Bit 2 QCPU A module turns ON A Mode When 7th expansion base module is abnormal Bit 7 turns ON PC In the loopback test mode of individual AJ71C24 the 09072 Pond AJ71C24 automatically executes data write read and Usable withal AJ71C24 pa types of CPUs check communication check Two digits showing the year XX of 19XX and month are stored to D9073 in BCD codes as shown below 15 12 11 8 B7 B4 lock D9073 Clock data RM t987Wuly year month ese ni eT diga Dedicated to A2CCPUC24 Two digits showing the day and time are stored to D9074 in BCD codes as shown below 15 12 11 B8 B3 BO Clock data Po oa Example 09074 Clock data sr g n rj 31th 10 day time deen tite he veas eet i y AX 4 o clock Day Time H3110 Two digits showing the minute and second are stored to D9075 in BCD codes as shown below Dedicated to Clock data 815 Example 09075 data Poa toa
348. dition of a local or remote I O station OFF Normal Depends on the error condition of the forward and reverse loop ON Error lines of a local or a remote station APP 14 APPENDICES MELSEC A 2 Link special relays only valid when the host is a local station Table 1 3 Link Special Relay List M9204 LRDP instruction OFF Incomplete On indicates that the LRDP instruction is complete at the complete ON Complete local station M9205 LWTP instruction OFF Incomplete On indicates that the LWTP instruction is complete at the complete ON Complete local station M9211 Link card error OFF Normal Depends on presence or absence of the link card error local station ON Error Judged by the CPU OFF Online cem i Depends on whether the local station is online or offline or is M9240 Link status ON Offline station to station station to station test test mode test test OFF Normal m 9241 Forward loop error ON Error Depends on the error condition of the forward loop line OFF Normal 2s 9242 Reverse loop error ON Error Depends on the error condition of the reverse loop line OFF Non executed Depends on whether or not loopback is occurring at the local ON Executed station OFF Received Depends on whether or not data has been received from the M9246 Data unreceived ON Unreceived master station OFF Received Depends
349. dule main base unit or module main base unit or expansion cable is detected expansion cable BATTERY Battery voltage has lowered Replace battery ERROR below specified level 2 If a RAM memory or power failure Checked at Battery lead connector is not compensation function is used power on connected connect the lead connector 9 ERROR CODE LIST MELSEC A 9 6 Error Code List for the QCPU A A Mode Meanings and causes of error message error codes detailed error codes and corrective actions are described Error Massage Error Code D9008 Table 9 5 Error Code List for the QCPU A A Mode Detailed Error Code D9091 CPU States Error and Cause Corrective Action INSTRCT CODE ERR Checked when STOP RUN or at execution of instruction 101 102 103 104 105 106 107 108 STOP Instruction codes which the CPU module cannot decode are included in the program 1 Read the error step using a peripheral device and correct the program of the step 2 Check the ROM if it contains instruction codes which cannot be decoded If it does replace it with a correct ROM Index qualification is specified for a 32 bit constant Device specified by a dedicated instruction is not correct A dedicated instruction has incorrect program structure A dedicated instruction has incorrect command name Index qualif
350. dule error ON Error DOWN M9005 OFF AC power good ON AC power DOWN OFF Normal M B 9008 low ON Battery low 1 OFF Normal B low latch ON Battery low M9007 M9008 ON Error ON Detected Annunciator 9009 detection OFF No error ON Error Operation error flag OFF No error ON Error 1 Operation M9011 error flag M9012 Turned on when there is one or more output units of which fuse has been blown or external power supply has been turned off only for small type Remains on if normal status is restored Output modules of remote stations are also checked fore fuse condition Turned on if the status of I O module is different from entered status when power is turned on Remains on if normal status is restored module verification is done also to remote I O station modules Reset is enabled only when special registers D9116 to D9123 are reset Turned on when the MINI S3 link error is detected on even one of the MINI S3 link modules being loaded Remains on if normal status is restored Turned on when an momentary power failure of 20 msec or less occurred Reset when POWER switch is moved from OFF to ON position Turned on when battery voltage reduces to less than specified Turned off when battery voltage becomes normal Turned on when battery voltage reduces to less than specifie
351. e D9091 Error Code D9008 Error Massage INSTRCT CODE ERR Checked when STOP RUN or at execution of instruction CPU States Error and Cause Instruction codes which the CPU cannot decode are included in the program Corrective Action Read the error step using a peripheral device and correct the program of the step Check the ROM if it contains instruction codes which cannot be decoded If it does replace it with a correct ROM Index qualification is specified for a 32 bit constant Device specified by a dedicated instruction is not correct An dedicated instruction has incorrect program structure An dedicated instruction has incorrect command name Index qualification using Z or V is included in the program between LEDA IX and LEDA B 1 1 Index qualification is specified for the device numbers and set values in the OUT instruction of timers and counters Index qualification is specified at the label number of the pointer P provided to the head of destination of the CJ SCJ CALL CALLP JMP LEDA B FCALL and LEDA B BREAK instructions or at the label number of the interrupt pointer I provided to the head of an interrupt program Errors other than 101 to 107 mentioned above
352. e MPS instruc tion 2 The MPS instruction can be used up to the number of times mentioned below For AnA A2AS AnU QCPU A A Mode and A2USH board 16 times For CPUs other than AnA A2AS AnU QCPU A A Mode and A2USH board 12 times However it can be used 11 times consecutively in ladder mode If an MPP instruction is used in between 1 is reduced from the number of used MPS instructions MRD 1 Reads the operation result stored by the MPS instruction and resumes the operation with that operation result starting at the next step 5 SEQUENCE INSTRUCTIONS MELSEC A MPP 1 Reads the operation result stored by the MPS instruction and resumes the operation with that operation result starting at the next step 2 Clears the operation result stored by the MPS instruction 1 When MPS MRD and MPP are used and when they are not used the circuits differ as shown below Circuit Using MPS MRD and MPP Circuit Not Using MPS MRD and MPP X002 X000 X001 X002 Y010 Y010 H X003 X004 X000 X001 X003 X004 vor IL YOM X005 X000 X001 X005 Y012 YO12 H 5 10 5 SEQUENCE INSTRUCTIONS MELSEC A 2 Set the numbers of used MPS and MPP instructions to the same If the used numbers differ the following occurs 1 When the number of MPS instructions is larger than that of MPP instructions the PC performs ope
353. e eh ee e EA I APP 1 127 Special Relays for EINK 2 ier tert rte ette P tet ER APP 13 1 3 Special Registers eene iae eti eoa ere pre es pride APP 16 1 4 Special Registers for enne enne APP 34 APPENDIX 2 OPERATION PROCESSING TIME eene emen nne APP 39 2 1 Instruction Processing Time of Small Size Compact APP 41 2 2 Instruction Processing Time of nennen nennen APP 66 2 3 Instruction Processing Time of QCPU A APP 79 APPENDIX ASCII CODE TABLE iiini ipea aaa ea aaa APP 89 APPENDIX 4 FORMATS OF PROGRAM SHEETS 77 sesenta APP 90 1 INTRODUCTION MELSEC A 1 INTRODUCTION This manual explains how to use the MELSEC A series sequence control instructions and microcomputer programs MELSEC A series programmable controllers have a parameter which is used to designate functions and device use ranges The functions and device use ranges are determined by the parameter values The parameters of CPU are set to default values If the default can be used for the purpose it is not necessary to set the parameter The user s programs for the MELSEC A series PCs are classified as follows ACPU Programming Manual fundamental gives the programs which can be used for CPUs Main rout
354. e not being d executed when is ON the LRDP instruction 6 i mp i r 11 144 3 03 099 6 hH ttt EE es UAE RORIS for the 3rd station is executed and M9200 is turned ON RST MO At read completion M9200 and M9201 are 2 RST m9200 turned OFF RST M9201 Coding LD X003 1 PLS M1 4 LD M1 ET M 7 m Executed only once 6 LD MO N lt 7 MPS 8 ANI M9200 o ANI M9201 nt Turned ON by Turned OFF by the 10 M9202 the PC CPU sequence program 11 M9203 ZEN 12 LRDP K3 D3 D99 K6 Turned OFF by the 23 MPP sequence program 24 AND M9201 25 RST MO 26 RST M9200 29 RST M9201 gt 32 END Executed only once 1 1 The contact which corresponds to M1 shown the program example should be converted into pulse If a pulse is not used following execution of the LRDP instruction will be disabled 2 The contact which corresponds to MO shown in the program example should be turned ON by the SET instruction If the OUT or PLS instruction is used the LRDP instruction may often be executed incorrectly 7 APPLICATION INSTRUCTIONS MELSEC A LWTP 1 Stores the data of n2 points which begin with the device specified at S of master station to devices which begin with the device specified at D of local station specified at n1 Master station Local station No n1 Device specified at S Devic
355. e of the output module which corresponds to the data I O head number Or monitor special registers D9100 to D9107 using a peripheral device and replace the fuse of the output module of which corresponding data bit is 1 3 Check the ON OFF status of the external power supply for output load CONTROL BUS ERR Due to the error of the control bus which connects to special function modules the FROM TO instruction cannot be executed If parameter I O assignment is being executed special function modules are not accessible at initial communication At error occurrence the head number upper 2 digits of 3 digits of the special function module that caused error is stored at D9010 Hardware failure Since it is a hardware error of special function module CPU module or base module replace and check defective module s Consult Mitsubishi representative for defective modules 1 The expansion cable is not properly connected 2 QA1S base failure The base information is different from that obtained at power on The failed base is stored in D9068 as a bit pattern The failed base is stored in D9010 from the upper stage 1 Connect the expansion cable properly 2 The hardware failure occurs in the special function CPU or base module Replace the module and find the faulty one Describe the problem to the nearest system service retail store or corporate office and
356. e pairs of them are given Format of the block shown below which is provided before the instruction circuit block is not as specified P254 1 CJ 4 Device number of D1 in the CHK D1 D2 instruction is different from that of the contact point before the CJ instruction Index qualification is used in the check pattern circuit 1 Multiple check pattern circuits of the LEDA CHK CHKEND instructions are given 2 There are 7 or more check condition circuits in the LEDA CHKEND instructions The check condition circuits in the LEDA CHKEND instructions are written without using X and Y contact instructions or compare instructions The check pattern circuits of the LEDA CHKEND instructions are written with 257 or more steps CAN T The IRET instruction was given Read the error step using a peripheral EXECUTE 1 outside of the interrupt program and device and delete the IRET instruction Checked at was executed occurrence of interrupt There is no IRET instruction in the Check the interrupt program if the interrupt program IRET instruction is given in it Write the IRET instruction if it is n
357. e result of exclusive OR WXOR may only be used in the areas marked Functions WXOR 1 Performs the exclusive OR of the 16 bit data of device specified at D and the 16 bit data of device specified at S per bit and stores the result into the device specified at D 16 bits gt D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Before execution WXOR S 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 z After execution D 1 1 1 1 1 1 1 1 7 11 7 APPLICATION INSTRUCTIONS MELSEC A 2 Performs the exclusive OR of the 16 bit data of device specified at 51 and the 16 bit data of device specified at 82 per bit and stores the result into the device specified at D 16 bits gt 1 1 1 Before execution WXOR 52 1 1 1 1 111 11 After execution 0 1 0 1 1 0 1 0 0 1 0 1 1 0 1 0 3 When operation is performed the digits of bit device higher than the specified are regarded as 0 DXOR 1 Performs the exclusive OR of the 32 bit data of device specified at D and the 32 bit data of device specified at S per bit and stores the result into the device specified at D
358. e specified at D n2points gt n2 points Transfer 2 When the LWTP instruction is being executed M9202 of the master station turns ON When the execution is completed M9203 of the master station turns ON Since M9202 and M9203 remain ON after the completion of execution turn them OFF by the sequence program 3 It is impossible to execute 2 or more LWTP instructions simultaneously or to execute the LRDP instruction and the LWTP instruction simultaneously to one local station Provide interlock using M9200 M9201 M9202 and M9203 so that the LRDP instruction and or the LWTP instruction may not be executed during the data read from local stations by the LWTP instruction Write command M9200 M9201 M9202 M9203 K K WE WTP 3 03 099 6 4 Values of 09201 of the master station indicate the execution result of the LWTP instruction as mentioned below D9200 value Execution result 0 Completed correctly Device setting error Operation error Devices specified at S or D exceed the device range of the master or local stations e ni value is other than 1 to 64 e n2 value is other than 1 to 32 Specified local station is not connected in the data link Specified station number is not of the local station Operation error b If the LWTP instruction is executed with a local station operation error occurs 7 APPLICATION INSTRUCTIONS Execution Conditions ON
359. e them again to the memory 9 ERROR CODE LIST Error Massage PARAMETER ERROR Checked at power on and at STOP PAUSE RUN MELSEC A Table 9 5 Error Code List for the QCPU A A Mode Continue Error Code D9008 Detailed Error Code D9091 CPU States Error and Cause Either of settings of the remote RUN PAUSE contact point by parameters operation mode at occurrence of error annunciator indication mode or STOP RUN indication mode is incorrect The MNET MINI automatic refresh Setting by parameters is incorrect Timer setting by parameters is incorrect Counter setting by parameters is incorrect Corrective Action Read parameters in the CPU memory check the contents make necessary corrections and write them again to the memory MISSING END INS Checked at STOP RUN The END FEND instruction is not given in the main program Write the END instruction at the end of the main program The END FEND instruction is not given in the sub program if the sub program is set by parameters Write the END instruction at the end of the sub program CAN T EXECUTE P Checked at execution of instruction The same device number is used at two or more steps for the pointers P and interrupt pointers 1 used as labels to be specified at the head of ju
360. ecce kennt ace ev ae Y nee de ne ee 3 3 3 2 2 Digit specification nennen 3 3 3 3 Handling of Numeric Values ee ee nennen ener 3 6 3 4 Storing S2 bit sire E 3 8 3 5 jIndex QUalifiCatiOn s c 6er ia a t tia Rd OR GR Fr 3 10 3 6 S bset Dae ep CC UH e e ERE Pe EH dials 3 12 327 alata ae e ath et ib iu 3 12 3 8 Cautions on Using A2AS AnU QCPU A A Mode A2USH 3 14 3 8 1 number of steps used 5 3 14 3 8 2 Instructions of variable functions nene enn 3 16 3 8 8 Set values for the extension timer and 3 17 3 8 4 Cautions on using index qualification ssssssseeeeeenneens 3 17 3 8 5 Storing 32 bit data in index 3 20 3 9 Operation when the OUT Instruction SET RST Instruction and PLS PLF Instruction are from the Same Device 3 21 INSTRUCTION FORMAT er eaer nhan
361. ecified with n as shown below SS Ly Starting axis numbers e 1 axis Set for 1 axis 1 digit 2 axes Set for 2 axes 2 digits 3 axes Set for 3 axes 3 digits Use 1 to 8 for each digit Device symbol Only D is usable Example Specify starting axes as follows To start axis 4 in the servo program eem 04 To start axes 4 and 5 in the servo program D45 To start axes 4 5 and 6 in the servo program D456 1 To start multiple axes simultaneously set one of the axes to be started in each servo program If axes 2 and 3 are used for linear interpolation and axes 4 and 5 for circular interpolation specify either of axes 2 and 3 and either of axes 4 and 5 for simultaneous start 2 The DSFRP instruction used with the A73CPU cannot use index qualification for specification of D and n If the DSFRP instruction with index qualification is executed operation error will result Execution conditions of the servo program start request instruction are as follows ON Execution command d DSFRP P Specified servo program In the following cases operation error occurs and the DSFRP instruction is not executed D is set with 4 digits Set value of D is other than 1 to 8 Two same axis numbers are set at D Set value of n is outside of 0 to 4095 or 30000 to 30799 Axes not spec
362. ed the data sampled is latched and the sampling trace is stopped If M9047 turns off during the sampling the sampling is stopped Sampling trace data are as follows X Y M L S B T C coil contact Maximum of eight contacts Maximum of 16contacts with A2AS and AnU D W AO 1 Z V Maximum of three points Maximum of 10 points with AnA A2AS and AnU Upon completion of the sampling trace after the execution of STRA instruction M9043 turns on The STRA instruction is executed only once The sampling trace result can be monitored by the peripheral device The STRA and STRAR instructions cannot be executed during ROM operation STRAR 1 2 3 Reset instruction for the STRA instruction By executing the STRAR instruction the STRA instruction is enabled again Turns off M9043 7 119 7 APPLICATION INSTRUCTIONS Excecution Conditions ON Sampling trace command OFF Reset command OFF Kc STRA Executed only once Executed only once Le TE lt A STRAR only once 7 120 7 APPLICATION INSTRUCTIONS MELSEC A 7 10 5 Carry flag set reset STC CLC Applicable All CPUs CPU Available Device Bit device Word 16 bit device Constant Pointer Level M L S D W 0 1 K H P 1 M9012 M9010 M9011 Digit specification
363. ed on off for PLF and the pulse is not generated 4 T C count processing time and refresh time are not included in the FEND END CHG instruction processing times APP 47 APPENDICES MELSEC A 2 Basic Instructions Table 2 2 Instruction Processing Time of Small Size Compact CPUs Processing Time pus AnS A1SJH A1SH A2SH S1 Instruction Condition Direct Mode Refresh Refresh Direct Refresh Direct Mode ue vm X Y Mode Mode Mode Mode LD 70 70 87 19 2 19 6 14 7 14 6 AND 61 62 81 17 0 17 0 12 9 12 8 OR 67 66 85 18 0 18 2 13 7 13 6 LDD 133 134 119 36 4 37 1 27 5 27 5 ANDD 124 125 210 33 6 34 3 25 3 25 5 ORD 133 133 218 36 2 36 9 27 3 27 5 LD lt gt 69 69 86 19 4 19 2 14 5 14 5 AND lt gt 60 60 79 16 2 16 2 12 3 12 3 OR lt gt 66 66 84 17 4 17 6 13 1 13 0 LDD lt gt 131 132 217 35 6 35 6 26 9 26 7 ANDD lt gt 129 129 215 35 2 35 4 26 7 26 7 APP 48 APPENDICES MELSEC A Table 2 2 Instruction Processing Time of Small Size Compact CPUs Processing Time us A2USH S1 A2AS 51 A2USH A2C A52G A0J2H Instruction board Direct Mode Refresh Refresh Refresh Refresh Refresh Refresh Mode Mode Mode Mode Mode Other XY Mode than X Y d LD 3 8 1 91 88 70 88 88 109 14 7 AND 2 6 1 45
364. ee Section 3 9 concerning operation in the case that the PLF instruction from the same device is executed multiple times in 1 scan X005 ON MO P 4 Cam MO OFF lt I 1 1 scan 2 If the instruction generating the pulse is off and the RUN key switch is moved from the RUN to STOP position and then returned to the RUN position again the PLF instruction is not executed If a PLS or PLF instruction is caused to jump by a CJ instruction if the sub routine program executed by a PLS PLF command was not called by a CALL instruction the device specified by D will go On 1 scan or longer so exercise caution Program Examples PLS Program which executes the PLS instruction when 9 turns on X009 Coding 1 PLS M9 ON 4 END X9 OFF M9 OFF 1 scan ini PLF Program which executes the PLF instruction when 9 turns off Coding ABUS 0 LD X009 PLF 9 1 PLF M9 4 END ON X9 OFF ON M9 OFF MELSEC A 5 SEQUENCE INSTRUCTIONS MELSEC A 5 3 4 Bit device output reverse 205 board A0J2H Applicable QCPU A CPU A Mode x x x x X x Remark Valid only when the input output control method is refresh method The CHK instruction varies in function with 1 0 control mode as shown below control mode
365. egister Block No 1 area Block No 2 area 122222 09037 09036 Device No BIN data Sets priority of ERROR LEDs which illuminate or flicker to indicate errors with error code numbers Configuration of the priority setting areas is as shown below b15 09038 Priority 4 Priority Priority 2 Priority 1 Priority 7 1 Priority 6 1 Priority 5 For details refer to the applicable CPUs User s Manual and the ACPU Fundamentals Programming manual The value stored in D9044 is used as the condition of the sampling trace when M9044 is turned on or off with the peripheral device to start sampling trace STRA or STRAR Usable with A1 and A1N Time 10 ms unit Stores the value in BIN code for D9044 Stores the block number of the expansion file register which is used as the work area for the execution of a SFC program in a binary value Stores 0 if an empty area of 16K bytes or smaller which cannot be expansion file register No 1 is used or if M9100 is OFF Stores code numbers of errors occurred in the SFC program in BIN code 0 No error 80 SFC program parameter error 81 SFC code error 82 Number of steps of simultaneous execution exceeded 83 Block start error 84 SFC program operation error Stores the block number in which an error occurred in the SFC program in BIN code In the case of error 83 the starting block number is stored Usable with AnN AnA AnU
366. egister numbers are provided as follows Axis No Axis 1 Axis2 Axis3 Axis4 Axis5 Axis6 Axis7 Axis8 Upper date D961 D967 D973 D979 D985 D991 D997 D1003 Lower date D960 D966 D972 D978 D984 D990 D996 D1002 5 Speed change by the DSFLP instruction is performed as follows 1 The speed changing flag M200n which corresponds to the axis specified with D is set 2 Positioning speed currently executed is changed to the data of speed change registers which correspond to the axes specified with D 3 The speed changing flag M202n is reset Speed change register numbers are provided as follows Axis No Axis 1 Axis 2 Axis 3 Axis 4 Axis 5 Axis 6 Axis 7 Axis 8 Upper date D963 D969 D975 D981 D987 D993 D999 D1005 Lower date D962 D968 D974 D980 D986 D992 0998 01004 Execution conditions of present position data speed change are as follows Conditions ON Execution command OFF DSFLP instruction Operation Errors In the following cases an operation error occurs and the DSFLP instruction is not executed 1 Set value of D is other than 1 to 8 2 Set value of n is other than 0 TO 4 When set value of n is 2 to 4 see section 7 11 3 3 Index qualification is used for specification of D and n REMARK n stands for the number of axes n gt 1 when axis 1 is used 7 131 7 APPLICATION INSTR
367. en the TO P instruction is used K1 to K8 when the instruction is used 2 The constant setting range of S is HO to FFFF and k 32768 to 32767 Indicates the instruction symbol Write commands TO DTO Setting data f n3 A2C Head station number of remote terminal module 02 529 Head station number of remote terminal module 100 Head address where data is to be n3 written Number of the device which stores data o i PRC D1 D2 to be written Number of data to be written Not required when the AJ35PTF R2 RS232C interface unit is used For details Number of the device to be turned ON refer to 2 RS 232C interface unit user s manual at write completion Dummy data which has no meaning in program processing Functions 1 Writes data of n3 points which begin with the device specified at S to the address starting with the one specified at n2 of buffer memory in the remote terminal module specified at n1 Remote terminal CPU module buffer memory Device specified at S 0 to m n2 n3 S n3 points points 7 APPLICATION INSTRUCTIONS MELSEC A DTO PRC 2 Writes data of n3x2 points which begin with the device specified at S to the
368. er counter output 1 5 14 5 3 2 Bit device set reset SET RST 5 19 5 3 8 Edge triggered differential output PLS 5 23 5 3 4 device output reverse CHK nennen nnns 5 25 5 4 SSMU InSER GLIOTIS citer reed ree eret caste a dde rae ed ep debt eT E Le s 5 27 5 4 1 Bit device shift SFT 5 27 5 5 Master Control 5 29 5 5 1 Master control set reset MC 5 29 5 6 Termination Instructions eite ete px Er ep ea Ru 5 33 5 6 1 Main routine program termination seeeeeeeneenn nn 5 33 5 6 2 Sequence program termination 5 35 bif 5 37 5 7 1 Sequence program stop 4 5 37 54 2 operation NOB v Peel rto 5 39 BASIC INSTRUGTIONS 5 6 1 6 89 6 1 Comparison Operation Instructions eene nnne nes 6 2 6 1 1 16 bit data comparison lt gt gt lt lt eene nennen 6 4 6 1 2 32 bit data comparison D D lt gt D D lt D 6 6 6 2 Arithmeti
369. er parameters spans two or more networks 3 The specified range of transfer source devices or transfer destination devices for the inter network transfer parameters is not used by the network When using MELSECNET 10 The contents of the routing parameters written from a peripheral device differ from the actual network system Write the network refresh parameters again and check When using MELSECNET 10 1 The contents of the network parameters for the first link unit written from a peripheral device differ from the actual network system 2 The link parameters for the first link unit have not been written 3 The setting for the total number of stations is 0 When using MELSECNET 10 1 The contents of the network parameters for the second link unit written from a peripheral device differ from the actual network system 2 The link parameters for the second link unit have not been written 3 The setting for the total number of stations is 0 1 Write the parameters again and check 2 Check the station number settings 3 Persistent error occurrence may indicate a hardware fault Consult your nearest Mitsubishi representative explaining the nature of the problem 9 ERROR CODE LIST Error Massage LINK PARA ERROR Table 9 5 Error Code List for the QCPU A A Mode Continue Error Code D9008 Detailed Error Code D9091 CPU States Stop
370. er station program 0 END HH 0 END HH 0 END HH 0 END 40 END 0 ime oo DE Data communication ede ___ e e i COM COM COM MEME ICOMi 1 1 1 Local station program 0 0 END 0 0 NES UG DN ER END END END Remote station refresh 3 By using the COM instruction in the master station data communication can be made faster as the number of data communication times with the remote I O station can be increased unconditionally as shown in Example 2 4 Data may not be received as shown in Example 1 when the scan time of the local station sequence program is longer than that of the master station sequence program By using the COM instruction in the local station data can be received securely By using the COM instruction the local station a link refresh is made every time the local station receives the master station command between a Step 0 and COM instruction b COM instruction and COM instruction c COM instruction and END instruction 2 Even if the COM instruction is used in the master station data communication cannot be made faster when the link scan time is longer than the master station sequence program scan time Sequence program 0 COM 0 COM COM 0 COM END link scan TONO bd
371. er than An 0 LD X000 or A3V is used and M9049 is 1 ASC ABCDEFGH 00 OFF 00H must be specified 14 IJKLMNOP 04 in D8 in this example as an 27 MOVP D8 error will result without the 32 LD X001 NUL 00H code Not necessary for the An 33 PR DO 014 and 40 ABCDEFG ASCII code of A to is stored IJKLMNOP into DUto3 gt ASCII code of I to P is stored into D4 to 7 14 code Y1B PR instruction Strobe signal Y1C PR instruction m execution flag Y1D PR instruction execution 480 ms 7 APPLICARTION INSTRUCTIONS MELSEC A PRC Program which turns on Y35 and at the same time outputs the comment of 5 to the Y60 to 69 when turns on X000 o SET Y035 When XO turns on Y35 is turned and comment of Y35 is output to the Y60 to 69 Y035 Yo60 X003 9 RST Y035 Coding LD X000 1 SET Y035 2 PRC Y035 060 9 LD X003 10 RST Y035 11 END When comment of Y35 is ASCII code Strobe signal PRC instruction execution flag 7 APPLICATION INSTRUCTIONS MELSEC A AnU A2AS A2USH S1 7 9 2 ASCII code comment display instruc A2USH 2 tions LED LEDC CPU A Modo A 1 2 N A 1
372. eration Error In the following case operation error occurs and the error flag turns on e An area of more than the microcomputer program capacity has been specified at n 1 The processing time of a microcomputer program called by one SUB instruction must be 5 msec or less If it exceeds 5 msec operation combination between the microcomputer program processing and the internal processing of the PC becomes out of control and the PC cannot run correctly 2 If a microcomputer program which needs more than 5 msec for processing is to be executed divide it into several blocks which are called consecutively This method can shorten the processing time of a microcomputer program called by one SUB instruction 6 BASIC INSTRUCTIONS AnU A2AS 6 6 Program Switching Instructions is Applicable AnSH QCPU A CRU A Mode 6 6 1 Main lt gt subprogram switching p um 74 A A 1 A3N only 8 A3A only Remark 2 A3 only 4 A3U 40 and QO6H only Available Device Bit device Word 16 bit device Constant Pointer Level D W M9012 M9010 M9011 Digit specification Switching command Interlock contact Functions 1 Executes switching between the main program and subprogram after the timer counter processing and self diagnostic check general data processing
373. eration error occurs and the error flag turns on Each digit of source 5 is outside the range of 0 to 9 6 BASIC INSTRUCTIONS BIN Program Examples into D8 when X8 turns on MELSEC A Program which converts the BCD data of X10 to 1B into BIN and stores the result Input power source Digital switch g Ll EM Can be used for others Dig gt ooo eo eo 3 o Sw on nA oO EA A e SE ATE G 8 MK Xx ox bars abet lear oe Say x x PC input unit e Coding 0 LD 1 BINP 6 END K3 L 4BCD D8 X008 0 X008 K3X010 D8 6 BASIC INSTRUCTIONS DBIN MELSEC A Program which converts the BCD data of X10 to 37 into BIN and stores the result into DO and 1 Digital switch BCD T Input power source X37 to X34 X2F to X2C X27 to X24 X1F to 1 X17 to X14 X33 to X30 X2B to X28 X23 to X20 X1B to X18 X13 to X10 PC input unit X0
374. es the bit pattern of the 16 bit data of X30 to 3F and that of the 16 bit data of D99 and stores the number of the same bit patterns and the number of different bit patterns to D7 and 8 respectively when XC turns on X00C P K4 Exclusive NOR of the 16 bit data of X30 to 3F o WXNR X030 D99 and the data of D99 is performed and the result is stored into D99 _ SUM D99 1 Comparing the 16 bit data of D99 the total number of 1 bits is stored into AO SU D7 Data of AO number of the same bits is stored into 07 K MOV 16 D8 H 1615 stored into D8 in BIN AO Operation of 16 is performed and the result E L 4 number of different bits is stored into D8 Coding 0 LD X00C 1 WXNRP K4X030 099 6 SUMP D99 9 MOVP A0 D7 14 MOVP 16 D8 19 P 08 24 END 2 Program which compares the bit pattern of the 16 bit data of X30 to 3F and that of the data of D99 and stores the result to 07 when turns on e Coding 5000 P K4 701 1 WXNRP K4X030 099 D7 8 END 7 17 7 APPLICATION INSTRUCTIONS DXNR MELSEC A 1 Program which compares the bit pattern of the 32 bit data of X20 to 3F and that of the data of D16 and 17 and stores the number of the same bit patterns to D18 when X6 turns on X006 P 4 Exclusive NOR of the 32 bit data of X
375. esentative Checked at correctly power on 212 Hardware logic in the CPU does not operate correctly 213 The operation circuit for sequential processing in the CPU does not operate correctly OPE CIRCUIT 214 In the END processing check the ERR operation circuit for index qualification Checked at in the CPU does not work correctly execution of the 215 In the END processing check the END instruction hardware in the CPU does not operate correctly WDT ERROR 22 STOP Scan time is longer than the WDT 1 Check the scan time of the user s Checked at time program and shorten it using the CJ execution of 1 Scan time of the user s program instructions END has been extended due to certain 2 Monitor contents of special register processing conditions 09005 using a peripheral device If 2 Scan time has been extended due the contents are other than 0 power to momentary power failure supply voltage may not be stable occurred during scanning Check power supply and reduce variation in voltage END NOT 24 241 STOP Whole program of specified program 1 Reset and run the CPU again If the EXECUTE capacity was executed without same error recurs Since this is CPU Checked at executing the END instructions hardware error consult Mitsubishi execution of the 1 When the END instruction was to representative END be executed the instruction was instruction read as other instruction code due to noise 2 The END
376. ess 18 of buffer memory of the AD61C head station number 1 to 010 when is turned ON X000 K 0 FROM 1 18 010 1 YOOO E MO turns ON when communication processing is completed e Coding 0 LD X000 1 FROM K18 D10 K1 10 PRC MO Y000 17 END DFRO A program which reads data of 2 words from address 14 of buffer memory of the AD61C head station number 1 to 010 and D11 when is turned ON X000 K K K 0 H DFRO 1 14 D10 1 PRC MO YOOO H MO turns ON when communication processing is completed Coding 0 LD X000 1 DFRO K1 K14 D10 K1 10 PRC MO Y000 17 END 7 APPLICATION INSTRUCTIONS MELSEC A AnU A2AS i AnS A2USH S1 7 6 4 Remote terminal module 1 and AnN An A1FX AnA A2USH A73 iid 2 word data write AnSH Sal sell Se IF DTOP PRC Available Device 5 gt oo 2 x sS8 ES Bit device Word 16 bit device Constant Pointer Level E 9 o X YI M ILIS BI FI T C D IW R 0 1 2 HH P IJ N 5 M9012 9010 9011 K1 to FROM K4 n2 2 175 5 O O 0O O O ojo DFRO K1 to n3 K8 D1 02 1 K1 to wh
377. et FUSE BREAK OFF Stop or Contin ue set by para meter The fuse is blown in some output modules The external power supply for the output load is turned off or it is disconnected Check the ERR LED of the output module Replace the module with the lit LED Among special registers D9100 to D9107 the bit corresponding to the unit of fuse break is 1 Replace the fuse of a corresponding module Monitor and check it 3 Check ON OFF of the external power supply for the output load CONTROL BUS ERR SP UNIT DOWN The and instructions cannot be executed 1 Error of control bus with special function module There is no reply from the special function module during execution of the FROM TO instruction 1 The special function module being accessed is faulty The hardware of the special function module CPU module or base unit is faulty Replace the faulty module and check the faulty module Consult Mitsubishi representative The hardware of the special function module being accessed is faulty Consult Mitsubishi representative INT ERROR Interrupt occurs though no interrupt module is installed 9 10 The hardware of a module is faulty Replace the module and check the faulty module Consult Mitsubishi representative 9 ERROR CODE LIST MELSEC A Table 9 2 Error Code List for ANSHCPU Continue Error
378. eter T C set value Head address of gt Sequence program area microcomputer program SUBn area offset value Microcomputer program Microcomputer program area Head address of microcomputer program area which will be called actually offset value In the SUB instruction specify as shown below SUB By changing the offset value specified at n multiple programs can also be called Call gt OH Microcomputer program Call Microcomputer program Microcomputer 500 puter prog program mode Fig 8 3 Calling Method for Multiple Microcomputer Programs 8 MICROCOMPUTER MODE MELSEC A 1 The processing time of a microcomputer program called by one SUB instruction must be 5 msec or less If it exceeds 5 msec operation combination between the microcomputer program processing and the internal processing of the PC becomes out of control and the PC cannot run correctly If a microcomputer program which needs more than 5 msec for processing is to be executed divide it into several blocks which are called consecutively This method can shorten the processing time of a microcomputer program called by one SUB instruction 8 3 1 Memory The microcomputer program may be used in the following areas Data memory area 8K bytes i gt For details refer to Section 8
379. executed multiple times in 1 n X005 PLS MO He OFF EM 2 OFF 1 scan scan ox If the instruction generating the pulse is switched on and the RUN key switch is moved from the RUN to STOP position and the RUN key switch is moved from the RUN to STOP position and then returned to the RUN position again the PLS instruction is not executed X000 Move RUN key switch Move RUN key switch PLS MO of CPU unit from of CPU unit from RUN to STOP position STOP to RUN position Operation stop Operation stop time ON time of PC of PC gt 5 ON X0 OFF al M0 OFF CENSET 1scan of PLS MO lt 3 When a latch relay L is specified in a PLS instruction execution command after the power goes Off with the latch relay L in the On state when the power is turned On again the PLS command executes the PLS command so that it will change from Off to On in the first scan and turn the specified device On After the power goes On the device which was turned On in the first scan goes Off when the next PLS instruction is executed 5 23 5 SEQUENCE INSTRUCTIONS 1 When the PLF command changes from On to Off the specified device goes On for 1 scan and when the PLF command is in a state other than On Off Off gt Off Off 2 On On gt the device goes Off If there is one PLF instruction from the specified device D within 1 scan the specified device goes On for 1 scan S
380. f data link returns to normal status data link in forward loop values in D9205 and D9206 remain 1 and 3 Reset using sequence program or the RESET key eem _ Stores the data link processing time with all local and remote Link scan time Maximum value stations Input X output Y link relay B and link register W assigned in ink parameters communicate with the corresponding stations every link scan Link scan is a period of time during which data link is executed with Present value all connected slave stations independently of the sequence program scan time Stores the number of retry times due to transmission error Retry count Total number stored Count stops at maximum of FFFFe RESET to return the count to 0 Stores the number of times the loop line has been switched to reverse loop or loopback Count stops at maximum of RESET to return the count to 0 Loop switching count Total number stored APP 35 APPENDICES MELSEC A Table 1 5 Link Special Register List Continue 5 Stores the local station numbers which are in STOP or PAUSE mode Local station operating Stores the status of stations D9212 status Device con fs Tes eT oe s To e e T Ts e T 09213 Local station operating Stores the status of stations status D9214 Local station operating Stores the status of stations When a local station is switched to STOP or PAUSE mode the bit status
381. flag M1 is set MO 11 1 cia 13 d AT z 30010 cifying the servo program number stored in D10 RST Mi H When execution of the DSFRP instruction is completed the start request storage flag is reset Coding 0 LD M9036 1 OUT M2000 2 LD X080 3 K4X090 D10 8 PLS MO 11 LD MO 12 SET M1 13 LD M1 14 ANI M2001 15 ANI M2002 16 DSFRP 012 K30010 23 RST M1 24 END Servo program K0 ABS 2 AXIS 1 1000 AXIS 2 1000 SPEED 1000 K1 ax 7 ABS 2 AXIS 1 500 AXIS 2 5000 SPEED 2000 K2 ABS 2 AXIS 1 3000 AXIS 2 500 SPEED 200 7 129 7 APPLICATION INSTRUCTIONS 7 11 2 Present position data and speed change instruction DSFLP Applicable CPU AnU A2AS A2USH S1 2 board QCPU A A Mode MELSEC A A0J2H X Remark Available Device Bit device Word 16 bit device Constant Pointer L S D W 1 K H P Digit specification Execution command Functions Axis number for present position data speed change Setting of present position data change speed change 1 Either of the processings mentioned below is performed after the DSFLP instruction execution command was turned ON Present pos
382. fresh mode 4 The output reverse command on off period must be equal or greater than 1 scan time Program Example CHK The following program reverses the output status of Y10 when X9 is switched on o 1 ck Yo10 DO H Goding 1 CHK DO 6 END 5 SEQUENCE INSTRUCTIONS MELSEC A 5 4 Shift Instructions All CPUs 5 44 device shift SFT SFTP Available Device gt S oo 5 Bit device Word 16 bit device Constant Pointer Level 9 E 2 2 M9012 M9010 M9011 D 1 Index qualification can used with AnA A2AS AnU QCPU A Mode and A2USH board only SFT instruction Setting data Device number to be shifted D Functions 1 This instruction shifts the ON OFF status of a device number defined as D 1 to the device specified as D and turns off the device with the lower number 2 Turn on the head device to be shifted with the SET instruction 3 When the or SFTP instruction is used consecutively program higher device numbers first See below Shift input Shift range SFT M1 4H M15 M14 M13 M12 M11 M10 M9 M8 P 1 0 0 0 0 0 1 1 0 X2 ON SFT M13 H p P 2
383. function modules which can use dedicated instructions is larger than the specified limit Total of the number of computers shown below is larger than 1344 AD59 x 5 AD57 S1 AD58 x 8 AJ71C24 SS3 S6 S8 x 10 AJ7IUC24 x 10 AJ71C21 S1 S2 x 29 AJ71PT32 S3 in extension mode x 125 Total gt 1344 Reduce the number of loaded special function modules 9 19 9 ERROR CODE LIST Error Massage SP UNIT ERROR Checked at execution of the FROM TO instruction or the dedicated instructions for special function modules LINK PARA ERROR Table 9 3 Error Code List for ANACPU and Board Continue Error Code D9008 Detailed Error Code D9091 CPU States Stop or Contin Contin ue Error and Cause Module specified by the FROM TO instruction is not a special function module Corrective Action Read the error step using a peripheral device and check and correct contents of the FROM TO instruction of the step Module specified by the dedicated instruction for special function module is not a special function module or not a corresponding special function module 1 Data written to the parameter areas of the link of which range was set by parameters using a peripheral device does not conform with the data of link parameters read by the CPU Or link parameters are not written Total number
384. g 5 5 9S3 55 gt 9 zs 299 2 55 2 55 ze 28 2 Elinstruction is used Sequence gt Sequence P Sequence processing E S processing 5 processing o 2 o 2 B E 5 9 z 9 c eh 5 5 95 5 5 9s S Q ed 28 c8 S5 55 au 28 au 28 au 3 instructions are used Sequence 2 Sequence 2 Sequence MET processing 9 85 processing S85 processing indicates that link 2 9 9 Q e processing is possible D c c 8 c 9 ej rem There is no wait period 2 oS 52565 2 E amp 256 2 or constant scan when 8 3 9 35 3 jes 8 3 he constant scan facility 58 28 ou uit 28 is not specified e There is no I O refresh ime in direct mode 6 BASIC INSTRUCTIONS Program Example EI DI IE SET M9053 DI RST M9053 RST M9053 EI SET M9053 MELSEC A The following program allows the interrupt program to be called at any time and link refresh to be disabled until the El instruction is executed before the FEND instruction is executed END processing Program ON M9053 E OFF H E Enable Interrupt program Disable Enable Link refresh Disable 0 EI M9036 1 SET 905
385. g ON Complete by reset instruction OFF Other than P set request ON set request Provides P set request after transfer of the other program for example subprogram when main OFF Except during P program is being run is complete during run Subprogram 2 Set request Automatically switched off when P setting is M9060 P I set request ON During set complete Dedicated to 40 Subprogram 3 request M9061 P set request Unusable with An and EI DI instruction switching M9053 Unusable with An AnS AnSH A1FX A2C A0J2H and A52G Unusable with A1 and A1N Usable with A3 A3M 73 A3U 40 and M9056 Main program set request M9057 Subprogram 1 P set request board APP 4 APPENDICES MELSEC A Table 1 1 Special Relay List Continue Turned on when one of remote terminal modules has become a faulty station Communication error is detected when normal communication is not restored after the number of retries set at D9174 Remote terminal OFF Normal Turned off when communication with all re mote terminal modules is restored to normal with automatic online return enabled Remains on when automatic online return is disabled Not turned on or off when communication is suspended at error detection Turned on when comm
386. ge of K1 4 points Specification range of K2 8 points Specification range of K3 12 points Specification range of K4 16 points Specification range of K5 20 points Specification range of K6 24 points Specification range of K7 28 points Specification range of K8 32 points Fig 3 4 Digit Specification Range of 32 Bit Instruction 3 INSTRUCTION STRUCTURE MELSEC A 3 When there is digit specification on the source S side the range of numeric values handled as source data are as shown in Table 3 2 Table 3 2 List of Digit Specification and Handled Numeric Values specified Number 32 Bit Instruction Specified 32 Bit Instruction of Digits of Digits K1 4 points 01015 K5 20 points 0 to 1048575 K2 8 points 0 to 255 K6 24 points 0 to 167772165 12 points 0 to 4095 K7 28 points 0 to 268435455 K4 16 points 0 to 65535 K8 32 points 2147483648 to 2147483647 Ladder Example Processing 32 bit instruction X010 P Change to 0 __ DMOV X000 DO Source S data Change to 0 Fig 3 5 Ladder Example and Processing 4 When there is digit specification on the destination D side the number of points set by the digit specification is used on the destination side Circuit Example Processing Source S data is nu
387. ght shift left shift SFR SFRP SFL 7 31 7 3 2 n bit data 1 bit right shift left shift BSFR BSFRP BSFL BSFLP 7 33 7 3 8 n word data 1 word right shift left shift DSFR DSFRP DSFL DSFLP 7 35 TA Data Processing Instructions ete t ete ati ae tere bee hte ceste 7 37 7 4 1 16 bit data search SER SERP 7 38 7 4 2 16 32 bit data bit check SUM SUMP DSUM DSUMP 7 40 7 4 8 8 o 256 bit decode encode DECO DECOP ENCO 7 42 7 4 4 segment decode 7 44 7 4 5 Word device bit set reset BSET BSETP BRST 7 46 7 4 6 16 bit data dissociation association DIS DISP 7 48 7 4 7 ASCII code conversion ASC sse ener nennen nnns 7 51 cene ra 7 53 7 5 1 FIFO table write read FIFW FIFWP 7 54 7 6 Buffer Memory Access Instructions 000 0 eee eee eeee ee ee teen eter ee 7 58 7 6 1 Special function module 1 2 word data read
388. gram to read data of 10 points starting with address 10 of the A68AD which is loaded in the slot for the remote station of which I O numbers are 140 to 15F to W52 to 61 when X3 is ON Use a pulse signal for Provide interlock using If the RTOP instruction is used to the same station this command 1 the RFRP instruction provide interlock using the RTOP instruction execution flag execution flag X003 0 PLS M1 ME When X3 is ON MO turns ON 4d SET MO H MO XIBE Yi4F Xi5F H K K If the RFRP and RTOP instructions are not being RRP 0140 10 wos2 10 executed when is ON the RFRP instruction UC se a is executed and Y14E is turned ON RST MO 2 At read completion and Y14E are reset RST H 1 The contact which corresponds to M1 shown in the program example should be converted into pulse If a pulse is not used following execution of the RFRP instruction will be disabled 2 The contact which corresponds to MO shown in the program example should be turned ON by the SET instruction If the OUT or PLS instruction is used the RFRP instruction may often be executed incorrectly Coding ON 0 LD X003 Lt 1 PLS M1 OFF 4 LD M1 5 SET MO 6 LD MO Executed only once mw T MES ON Turned OFF by the 8 ANI Y14E gt sequence program 9 ANI OFF P 10 ANI Turned ON by 11 ANI X15F the special Turned OFF b
389. he A1FXCPU Special module Expansion unit Special module ATEXOEU Special block Expansion block Special block Set 0 at n1 Set 1 at n1 7 APPLICATION INSTRUCTIONS Program Examples MELSEC A TO The program to write 4603H to KO of buffer memory in the second special module special block from the A1FXCPU when X20 is turned ON X020 H K H K 0 0001 0 4603 1 DTO The program to write 2 point data beginning with DO to KO of buffer memory in the second special module special block from the A1FXCPU when X20 is turned ON X020 H K K 0 0001 0 00 1 During the execution of the FROM DFRO TO DTO instruction M9119 can control the execution of an interruption program When 9119 is OFF FROM TO is given priority While the FROM DFRO TO DTO instruction is executed interrupt is disabled and interruption program is not executed even at the occurrence of an interrupt For the interrupt occurred during the execution of the FROM DFRO TO DTO instruction the interruption program that corresponds to the occurred interrupt is executed after the completion of the FROM DFRO TO DTO instruction While M9119 is OFF the FROM DFRO TO DTO instruction can be used in an interruption program When M9119 is ON interrupt is given priority If an interrupt occurs during the execution of FROM DFRO TO DTO instruction execution of the FROM DFR
390. he same Set the head device number Valid for X Y only 2 Setting the head device number The head device number of devices to be refreshed is set If the number is set between YnO and Yn7 XnO and Xn7 refresh is done for the number of specifi ed points from YnO Xn0 and if the number is set between Yn8 and YnF Xn8 and XnF refresh is done for the number of specified points from Yn8 Xn8 3 Setting the number of points refreshed The actual points refreshed are set value x 8 points and may be up to 2048 points maximum B1 8 points B2 16 points BA 80 points BB 88 points B10 128 points BFF 2048 points 4 Partial refresh processing is still performed if the SEG instruction is executed with the CPU set in X Y direct mode but in this case input X output Y ON OFF status does not change b Setting BO 0 point refreshes all devices in the unit beginning with the head device number specified 6 BASIC INSTRUCTIONS MELSEC A Program Examples SEG 1 The following example refreshes Y10 to Y27 X001 Coding o SET M9052 LD X001 1 SET M9052 11 END 2 Pulse output using the SET RST instructions in direct mode should be changed as shown below when the I O control is changed to refresh mode X001 0 9052 X001 SET YO22 Oo SET YO22 K4 K4 SEG Y020 B001 RST 2 H 487 YO
391. he address specified by n2 in the special module special block specified by n1 A1FXCPU Device specified at S E Buffer memory in the special module special block n2 points bes n3 words 7 APPLICATION INSTRUCTIONS MELSEC A DTO Writes the data of 2nx3 points which begin with the device specified at S to addresses starting at the address specified at n2 of buffer memory inside the special module special block specified at n1 Buffer memory in the special module A1FXCPU special block Device specified at S a n2 2xn3 M 2xn3 points gt words Execution TO and DTO instructions are executed every scan while the write instruction is ON Conditions TOP and DTOP instructions are executed only once at the rising edge OFF ON of the write instruction ON Write command Executed Executed per scan per scan lt r gt Executed Executed only once only once Operation Errors In the following cases operation error occurs and the error flag turns on Access to a special module special block is not possible n1 designation is other than 0 to 7 When n3 points which start with the device specified at S exceed the specified device range REMARK Set the order number of the special module special block in question to n1 counted from t
392. he divisor 52 is 0 6 BASIC INSTRUCTIONS MELSEC A Program Examples D Program which stores the multiplication result of the BIN data of D7 and D8 and the BIN data of D18 and D19 to D1 to D4 when X5 turns on X005 P Coding 0 gt D7 D18 D1 H LD X005 1 D P D7 D18 D1 12 END D Program which outputs a value obtained by multiplying the data of X8 to F by 3 14 to Y30 to 3F when X3 turns on Coding X003 P K2 K _ o X008 314 DO LD X003 B T 1 P K2X008 K314 DO D 00 100 D2 8 D P DO K100 D2 19 02 K4Y030 MOV 02 24 END 6 BASIC INSTRUCTIONS MELSEC A 6 25 BCD 4 digit addition subtraction B B P B B P Applicable All CPUs CPU Available Device S L IES ES Bit device Word 16 bit device Constant Pointer Level 9 E 9 2 Xx Y IM L 5 B F T DW R 1 2 V K H P 1 5 M9012 M9010 M9011 S 0 0 0O 0O 0O 0O 0O 0O O O 0O 0O 0O 0O 0O 0O O O D O 0O O O 0O O 0O 0O 0O 0O O 0O O0O0 O0 O K1 Indicates the instruction symbol Setting data Addend subtrahend or head device number stor ing addend subtrahend Head device number storing augend minuend Addition subtraction commands Augend minue
393. he instruction symbol used for the program The instruction symbol is shown on a 16 bit instruction basis The symbols of a 32 bit instruction and an instruction executed only at the rise from OFF to ON are as indicated below 32 bit instruction D is added to the head of instruction Example D 16 bit instruction 32 bit instruction Instruction executed only at the rise from OFF to ON P is added to the end of instruction Example gt Instruction Instruction executed only during ON at the rise from OFF to ON 4 Indicates the symbol diagram in the circuit Indicates destination Indicates destination Indicates source gt Indicates source I Indicates instruction LL Indicates instruction symbol symbol Destination Indicates the destination of data after operation Source Stores data before operation 5 Indicates the processing of each instruction D S 2 D D1 D 1 5 gt D 1 D a Indicates 16 bits 16 bits 16 bits Indicates 32 bits D 1 D Upper 16 bits Lower 16 bits 6 Indicates the execution condition of each instruction and details are as described below Symbol Execution Condition 2 INSTRUCTIONS MELSEC A No entry Instruction which is always executed regardless of ON OFF of the preceding condition
394. he master station is online or offline or is M9224 Link status ON Offline station to station in station to station test test mode test or self loopback test OFF Normal ON Error OFF Normal us 9226 Reverse loop error ON Error Depends on the error condition of the reverse loop line OFF Unexecuted JE Depends on whether or not the master station is executing Loop test status ON Forward or reverse loop test forward or a reverse loop test being executed Link parameter unmatched between master station Forward loop error Depends on the error condition of the forward loop line APP 13 APPENDICES MELSEC A Table 1 2 Link Special Relay List Continue status ON STOP or PAUSE mode PAUSE mode detect ON Error detected error in another station Local or remote I O OFF No error Depends on whether or not a local or a remote station has M9235 station parameter error i ON Error detected detected any link parameter error in the master station Local or remote I O m Depends on whether or not a local or a remote I O station is NINE OFF Noncommunicating Gin uni 9236 station initial rus communicating initial data such as parameters with the A ON Communicating communicating status master station Local or remote I O OFF Normal station error ON Error Local or remote I O station forward reverse loop error Depends on the error con
395. he microcomputer program 1 Provide the PUSH instruction at the start of the microcomputer program so that contents of the registers used during execution are saved in the stack areas Also provide the POP instruction at the end of the program so that the contents of registers saved in the stack areas are returned 2 Initialize the registers to be used in the microcomputer program at the start of the microcomputer program Contents of the registers when the microcomputer program is called from the sequence program are not definite 3 Since the microcomputer program is executed only when it is called from the sequence program with the SUB P instruction the sequence program is always required 4 To return from the microcomputer program to the sequence program use the RETF return to outside the segment instruction 8 MICROCOMPUTER MODE MELSEC A CP M and CP M 86 are trademarks of Digital Research Inc MS DOS is a trademark of Microsoft Corporation 3 Calling method of microcomputer program The microcomputer program is called by the execution of SUB instruction in the sequence program The format of the SUB instruction is as shown below Microcomputer program call command Setting data n Offset value of microcomputer program to be SUB called Fig 8 2 Format of SUB Instruction Example In the following memory map the specification of n is as shown below Param
396. he sequence program Special relays marked 3 above are switched on off in test mode of the peripheral equipment 5 Turn OFF the following special relays after resetting the related special resisters Unless the related special registers are reset the special relays will be turned ON again even if they are turned reset Special Relay Related Special Resister M9000 D9100 to D9107 M9001 D9116 to D9123 Special function relay to be reset 3 12 APPENDICES MELSEC A Appendix 1 2 Special Relays for Link The link special relays are internal relays which are switched on off by various factors occurring during data link operation Their ON OFF status will change if an error occurs during normal operation These special registers are applicable to all types of CPUs except the A3V For description of the special registers for link for the refer to the ASVTS Data Link System User s Manual 1 Link special relays only valid when the host is the master station Table 1 2 Link Special Relay List Depends on whether or not the LRDP word device read instruction has been received Used in the program as an interlock for the LRDP instruction Use the RST instruction to reset instruction OFF Unreceived received ON Received Depends on whether or not the LRDP word device read instruction execution is complete
397. hen n points are searched beginning with S2 the specified device range is exceeded Program Example SER Program which compares the data of D883 to 887 with 123 when XB turns on Coding PK K 0 LD Sr sem 123 D883 5 H 1 SERP K123 D883 K5 10 END Searched data Head number to be searched 123 D882 123 D883 10 Search result D884 0885 Coinciding Search range data 5 pcs gt 0886 1 0887 v D888 Coinciding position A1 Number of coincidences 7 APPLICATION INSTRUCTIONS MELSEC A 7 4 2 16 32 bit data bit check SUM SUMP DSUM DSUMP Applicable All CPUs CPU Available Device gt S EE Bit device Word 16 bit device Constant Pointer Level 9 E 2 9012 M9010 M9011 Ps DSUM 5 ia Operation commands Indicates the instruction symbol SUM DSUM Setting data Head number of device which counts the total number of bits which are 1 Functions SUM Stores in the total number of bits which are one found in the
398. ication using Z or V is included in the program between LEDA B IX and LEDA B IXEND 1 Index qualification is specified for the device numbers and set values in the OUT instruction of timers and counters 2 Index qualification is specified at the label number of the pointer P provided to the head of destination of the CJ SCJ CALL CALLP JMP LEDA and LEDA B BREAK instructions or at the label number of the interrupt pointer I provided to the head of an interrupt program Errors other than 101 to 107 mentioned above Read the error step using a peripheral device and correct the program of the step PARAMETER ERROR Checked at power on and at STOP PAUSE RUN 111 112 113 114 STOP Capacity settings of the main and sub programs microcomputer program file register comments status latch sampling trace and extension file registers are not within the usable range of the CPU Total of the set capacity of the main and sub programs file register comments status latch sampling trace and extension file registers exceeds capacity of the memory cassette Latch range set by parameters or setting of M L or S is incorrect Sum check error Read parameters in the CPU memory check the contents make necessary corrections and writ
399. icient When the content is other than 0 the power voltage is unstable SUB CPU 23 Stop Sub CPU is out of control or defective Since this CPU hardware error consult ERROR During run Mitsubishi representative Checked 26 continuously At power on 9 ERROR CODE LIST MELSEC A Table 9 1 Error Code List for the An AnN A3H A3M A3V A0J2H AnS A2C A73 A52G A1FX and Error Message Error Code D9008 CPU States A3N board Continue Error and Cause Corrective Action END NOT EXECUTE Checked at the execution of END instruction 24 Stop When the END instruction was to be executed the instruction was read as other instruction code due to noise or the like 2 The END jinstruction has changed to another instruction code for some reason Perform reset and run If the same error is displayed again it is the CPU hardware error consult Mitsubishi representative WDT ERROR Checked continuously The CPU is executing an endless loop Since the program is in an endless lop due to the JMP and CJ instructions check the program MAIN CPU DOWN Checked continuously Main CPU is out of control or defective Sub CPU checked it Since this is a CPU hardware error consult Mitsubishi representative UNIT VERIFY ERR Checked continuously Stop or Continue set by para meter
400. ifications of Microcomputer 8 1 8 2 Using Utility Program ener ener rennen nnne nnns 8 2 8 3 Using User Written Microcomputer Programs sseeeeene nennen nen 8 4 8 321 Memory Ea cua p eua E 8 6 8 3 2 Data memory area address configuration sse 8 6 8 3 3 Differences in operations called by microcomputer instructions according to CPU 8 7 8 3 4 Configuration of data memory sse 8 8 9 ERROR CODE e iecore esee terrent 9 1 9 41 9 1 Reading Error Codes aan ine niin id eee p ia il eo ater eun EE aie 9 1 9 2 Error Code List for the An AnN 2 AnS A2C A73 A52G A1FX and P 9 1 9 3 Error Code List for AnSHCPU nnns nnns sn trn nnns snnt 9 7 9 4 Error Code List for the ennt nre 9 13 9 5 Error Code List for the ANUCPU A2ASCPU and A2USH board 9 22 9 6 Error Code List for the QCPU A A Mode internen 9 33 nuage APP 1 APP 96 AP
401. ified device is not in the unable range Set number of data to be handled is out of the unable range 1 Station number specified by the LEDA B LRDP LEDA B LWTP instructions is not a local station Head I O number specified by the LEDA B RFRP LEDA B RTOP RFRP instructions is not of a remote station Head number specified by the LEDA B LEDA B RTOP RTOP instructions is not of a special function module Read the error step using a peripheral device and check and correct program of the step MELSEC A 9 ERROR CODE LIST Table 9 5 Error Code List for the QCPU A A Mode Continue Detailed Error Code D9091 Error Code D9008 Error Massage OPERATION ERROR Checked at execution of instruction CPU States Stop or Contin ue set by param eter Error and Cause 1 When the AD57 S1 or AD58 was executing instructions in divided processing mode other instructions were executed to either of them 2 When an AD57 S1 or AD58 was executing instructions in divided processing mode other instructions were executed in divided mode to another AD57 S1 or AD58 Corrective Action AD57 S1 and AD58 cannot be used with QCPU A Review the program A CC Link dedicated command was issued to three
402. ified at D are used in the servo program specified with n Index qualification is used for specification of D and n 7 127 7 APPLICATION INSTRUCTIONS Program Example MELSEC A 1 A program to execute a specified servo program only once when X80 is ON M9036 0 4 M2000 X080 2 PLS MO MO _ 6 LSET M1 M1 M2001 M2002 P K 8 _ _ 4 DSFR 012 1 RST M1 Coding 0 LD M9036 1 OUT M2000 2 LD X080 3 PLS MO 6 LD MO 7 SET M1 8 LD M1 9 M2001 10 ANI M2002 11 DSFRP 012 K1 18 RST M1 19 END Servo program K1 pe ae ABS 2 AXIS 1 10000 AXIS 2 27000 SPEED 1000 7 128 H READY is ON After X80 is turned on the start request storage flag M1 is set If the specified axis is not started the DSFRP instruction is executed When execution of the DSFRP instruction is completed the start request storage flag is reset 2 axis linear interpolation of axes 1 and 2 7 APPLICATION INSTRUCTIONS MELSEC A 2 program to execute only once the servo program of which number is specified with the BCD data at X90 to X9F when X80 is ON This servo program is to perform 2 axis linear interpolation of axes 1 and 2 M9036 o M2000 PC READY is ON X080 P K4 2 BIN X090 D10 After X80 is turned on the BCD data of X90 to X9F are stored in D10 and MO the start request storage
403. ill be performed or head number of device which stores data Operation commands 52 01 Head number of device which will store the result of logical product WAND may only be used in the areas marked Functions WAND 1 Performs the logical product of the 16 bit data of device specified at D and the 16 bit data of device specified at S per bit and stores the result into the device specified at D 16 bits C D 3 bs se te s re e cn a Before execution WAND 5 1 1 1 1 1 After execution D 1 1 1 7 APPLICATION INSTRUCTIONS MELSEC A 2 Performs the logical product of the 16 bit data of device specified at S1 and the 16 bit data of device specified at 52 per bit and stores the result into the device specified at D1 16 bits mi S1 1 1 x 1 1 1 0 0 0 0 di X 1 1 Before execution WAND S2 0 0 0 1 0 0 1 0 0 0 1 0 1 0 0 NU After execution 1 of of 1 1 1 3 Data of bit devices above digit specification is operated as 0 DAND 1 Performs the logical product of the 32 b
404. imer is shortened 5 The CJ SCJ and JMP instructions are also capable of jumping to a step with lower number However it is necessary to exit this closed loop before the watch dog timer times out P8 X000 YO40 H Closed loop X007 _ when is CJ P9 JH ON A008 P8 c Exits the loop when X7 is L J turned ON 9 X006 Y042 6 The device jumped by CJ SCJ does not change X00B 10 CJ P19 H When XB turn on jump is made to the label P19 X00C 14 YO43 Even if XB and C turn on off during the execution of CJ instruction Y43 and 49 do not change X00B 16 Y049 P19 X009 18 Y04C L 7 The label P occupies one step X008 10 CJ P9 H M33 14 Y030 H Occupies M3 one step 16 Y036 P9 M36 18 Y039 X009 21 6 BASIC INSTRUCTIONS MELSEC A Operation Errors In the following cases operation error occurs and the PC stops its operation When there are mult contacts of the same labels a jump has been made to that label by the CJ SCJ or JMP instruction There is no label at the jump destination of CJ SCJ or JMP instruction e Jump has been made to a label located below the END instruction e Jump has been made to a step between FOR and NEXT e Jump has been made into a subroutine Program Examples SCJ 1 Program which causes a jump dur
405. ine program Sequence program Subroutine program Interruption program Main program Utility program Microcomputer program User creating gers microcomputer program program Main routine program Subsequence Subroutine program Subprogram program Interruption program Submicrocomputer User creating program microcomputer program Table 1 1 gives the applicable CPUs the abbreviations used in this manual 1 INTRODUCTION MELSEC A Table 1 1 Applicable CPUs and the Abbreviations Used in This Manual Abbreviations used in this manual Applicable CPUs A1 A1CPU P21 R21 An A2 S1 A2CPU P21 R21 A2CPU P21 R21 S1 A3CPU P21 R21 A1NCPU P21 R21 A2NCPU P21 R21 AENCPU P21 R21 S A3NCPU P21 R21 A3HCPU P21 R21 A3MCPU P21 R21 A3VCPU P21 R21 A2ACPU P21 R21 A3ACPU P21 R21 A0J2HCPU P21 R21 A1SCPU A1SCPU S1 A1SCPUC24 R2 A1SJCPU A1SJCPU S3 A2SCPU A2SCPU S1 A1SH A1SHCPU A1SJHCPU A1SJHCPU S8 A2SH A2SHCPU A2SHCPU S1 A2C A2CCPU P21 R21 ASCCPUDC24 A2CCPUC24 PRF A2CCPU S3 A3N board A7BDE A3N PT32 S3 A2USH board Type AB0BDE A2USH S1 PLC CPU Board A73CPU P21 R21 A52GCPU T21B A2U S1 A2UCPU A2UCPU S1 A3U A3UCPU A4U A4UCPU A2AS S1 A2ASCPU A2ASCPU S1 530 A2USH S1 A2USHCPU S1 002 Q02CPU A QCPU A A Mode Q02H Q02HCPU A Q06H Q06HCPU A A1FXCPU 21 821 5 Table 1 2 Peripheral
406. ing the next scan to END when XC turns on X00C When XC turns on jump is made from the next 0 SCJ P255 H scan to END X00C X013 P255 represents END 4 Y093 H X017 Executed when XC turns off or turns from off YO99 to on X00B 11 Y083 Coding 0 LD X00C 1 SCJ P255 4 10 X00C 5 MPS 6 AND X013 7 OUT Y093 8 MPP 9 AND X017 10 OUT 099 11 LD X00B 12 OUT Y083 13 END 6 BASIC INSTRUCTIONS MELSEC A 2 Program which causes a jump during the next scan to P3 when XC turns on X00C 0 SCJ P3 X030 4 YOGF P3 X041 6 YO7E Coding 0 A LD SCJ LD OUT P3 LD OUT END X00C X030 YO6F X041 YO7E 3 Program which causes a jump to the END instruction when X9 turns X000 0 Y030 X009 2 CJ P255 6 FEND X011 7 041 Coding 0 OMAN DWN LD OUT LD CJ FEND LD OUT END X000 Y030 X009 P255 X011 041 6 BASIC INSTRUCTIONS MELSEC A 6 5 2 Subroutine call return CALL CALLP RET All CPUs Available Device Carry flag Error flag Bit device Word 16 bit device Constant Pointer Level M9012 M9010 M9011 Digit specification Index X Y M L S B 0 1 2 V K H P P
407. inter Digit specification 5 Microcomputer program execution commands SUB Setting data Head address of micro computer program Functions 1 Calls the microcomputer program created by user and allows the run of microcomputer program 2 When the run of microcomputer program is completed runs the sequence program again starting at the next step to the SUB or SUBP instruction 3 The SUB and SUBP instructions can be used for the sequence program and subsequence program Parameter Set value of timer counter SUB P Sequence program area Main sub END program area Microcomputer program RET Microcomputer program area 6 BASIC INSTRUCTIONS 4 In the microcomputer program area multiple microcomputer programs can be created Head of microcomputer 0 X010 H SUB 0500 a a Icrocomputer he X011 H 300m program SUB 0930 Microcomputer program Y 930H b For the details of microcomputer program see Section 8 Execution The execution conditions of SUB and SUBP instructions are as shown below Conditions ON Microcomputer program execution command SUB Executed Executed U per scan per scan lt SUBP gt Executed Executed only once only once Op
408. ion of which I O numbers are 140 to 15F when X3 is ON Provide interlock using If the RTOP instruction is used to the same station the RTOP instruction provide interlock using the RTOP instruction execution flag execution flag X003 0 PLS M1 Mt When X3 is ON MO turns ON 4d AC SET Mo H MO Y14E XiBE H K K If the RFRP and RTOP instructions are not being 6 0140 10 W052 10 H executed when is ON the instruction CA wn is executed and Y10F is turned on RST MO 2 At read completion X11F turns on and MO and RST Y14F Y10F are reset 1 The contact which corresponds to M1 shown in the program example should be converted into a pulse If a pulse is not used following execution of the RTOP instruction will be disabled 2 The contact which corresponds to MO shown in the program example should be turned ON by the SET instruction If the OUT or PLS instruction is used the RTOP instruction may often be executed incorrectly Coding 0 LD X003 1 PLS M1 4 LD M1 5 SET MO 6 LD MO Executed only once fe eios ON Turned OFF by the 8 ANI Y14F be lt Sequence program 9 ANI X15F 10 ANI TumedONby 11 X15E the special Turned OFF by the 12 H0140 K10 W052 K10 SOE function module Sequence program 23 MPP Turned ON by 24 AND X15F the special function module 25
409. ipheral device and check and correct program of the step 1 When the AD57 S1 or AD58 was executing instructions in divided processing mode other instructions were executed to either of them When an AD57 S1 or AD58 was executing instructions in divided processing mode other instructions were executed in divided mode to another AD57 S1 or AD58 Read the error step using a peripheral device and provide interlock with special relay M9066 or modify program structure so that when the AD57 S1 or AD58 is executing instructions in divided processing mode other instructions may not be executed to either of them or to another AD57 S1 or 058 in divided mode MELSEC A 9 ERROR CODE LIST Error Massage OPERATION ERROR Checked at execution of instruction Table 9 3 Error Code List for ANACPU and Board Continue Error Code D9008 Detailed Error Code D9091 CPU States Error and Cause 1 An instruction which cannot be executed by remote terminal modules connected to the MNET MINI S3 was executed to the modules When the instruction was executed to a remote terminal the communication request registration areas overflowed The PIDCONT instruction was executed without executing the PIDINIT instruction The PID57 instruction was executed without executing the PIDINIT or PIDCONT i
410. is executed the Data recovery of setting data stored in the CPU module is recovered Usable with AnU M9199 online sampling OFF Data recovery OFF to enable restart trace status ON recovery ON Turn on M9199 to execute again A2AS and QCPU A latch There is no need to write data with the peripheral A Mode device Selects the operation output when block stop is Usable with AnN Usable with AnN and AnA which are compatible with SFC For the AnN and AnA which are compatible with SFC refer to the MELSAP II Programming Manual APP 11 APPENDICES MELSEC A POINTS 1 Contents of the M special relays are all cleared by power off latch clear or reset with the reset key switch When the RUN key switch is set in the STOP position the contents are retained 2 The above relays with numbers marked 1 remain on if normal status is restored Therefore to turn them off use the following method a Method by use program Hase execution Insert the circuit shown at right into the command user program and turn on the reset E ix veoj execution command contact to clear the special relay M b Use the test function of the peripheral device to reset forcibly For the operation procedure refer to the manuals for peripheral devices c By moving the RESET key switch on the CPU front to the RESET position the special relays are turned off Special relays marked 2 above are switched on off in t
411. is not loaded an interrupt occurred A special function module is assigned as I O module or vice versa in the assignment using parameters from the peripheral device Since it is hardware error of a module replace and check a defective module For defective modules consult Mitsubishi representative Execute I O assignment again using parameters from the peripheral device according to the loading status of special function modules There are 9 or more special function modules except the interrupt module which can execute interruption to the CPU module loaded Reduce the special function modules except the interrupt module which can execute interrupt start to 8 or less There are 2 or more data link modules loaded Reduce the data link modules to 1 or less There are 7 or more modules such as a computer link module loaded to one CPU module Reduce the computer link modules to 6 or less There are 2 or more interrupt modules loaded Reduce the interrupt modules to 1 or less Modules assigned by parameters for MNT MINI automatic refresh from the peripheral device do not conform with the types of station modules actually linked Perform again module assignment for MNT MINI automatic refresh with parameters according to actually linked station modules The number of modules of I O assignment registration number of loaded modules per one CPU module for the special
412. it number pis 614 pta b12 b11 610 bs 67 ee 65 b3 eo b1 bo De248 116 115 i4 113 12 i io te us 17 16 15 14 13 12 f Local station operating Stores the status of stations D9249 132 131 130 L29 128 127 126 125 124 123 122 121 120 119 118 117 status 17 to 32 09250 148 147 L46 145 144 L43 142 L41 L40 L39 138 L37 136 135 L34 L33 D9251 164 163 L62 L61 Leo L59 L58 L57 L56 L55 L54 L53 L52 L51 L50 L49 Local station operating Stores the status of stations The bit corresponding to the station number which is in STOP or status 33 to 48 PAUSE mode becomes 1 Example When local stations 7 and 15 are in STOP mode bits 6 and 14 of D9248 become 1 and when D9248 is monitored its value is 16448 4040 Stores the local station number other than the host which is in error Stores the status of stations 49 to 64 Local station operating status Stores the status of stations 1 to 16 Device number Local station error Stores the status of stations Local station error Stores the status of stations Local station error The bit corresponding to the station number which is in error becomes 1 Local station error 1 and when 09252 is monitored its value is 2048 800 APP
413. it data of device specified at D and the 32 bit data of device specified at S per bit and stores the result into the device specified at D 32 bits lt gt D TA ae ut 1 11 1 2 Before execution DAND S 1 12 21 0 1 of o After execution 1 1 olo 2 When operation is performed the digits of the bit device higher than these specified are regarded as 0 Execution Conditions ON Operation command OFF Executed Executed per scan per scan 4 35 P Executed 4 Executed only once only once Program Examples WAND 1 Program which masks the digit of tens the second digit from the right among the BCD four digits of D10 and sets it to 0 when XA turns on D10 1234 1204 X00A PH Coding 0 4AWAND FFOF 010 0 ED ADU 1 WANDP 010 6 END 7 APPLICATION INSTRUCTIONS MELSEC A 2 Program which performs logical product of the data of X10 to 1B and the data of D33 and outputs the result to the Y30 to 3B when XA turns on X00A P K3 Logical product of the data of X10 to 1B and the o WAND X010 D33 4 data of D33 is performed and the result is stored into D33 ___ K3 033 Y030 Data of D33 is output to the Y30 to 3F
414. it device and word device as shown below Before execution After execution Bit device SEG K7 K2Y48 b SIENESE Y p 8 points D8 lew See 2s ET Bris MEE 05 SEG K7 D8 gt 0 0 o o o ofofojojoj i1flof ojfijaji Upper 8 bits are set to 0 7 segment display data is stored into lower 8 bits 4 For the seven segment display data refer to the next page 7 APPLICATION INSTRUCTIONS Execution Conditions ON Decode command OFF SEG Executed Executed per scan gt gt S Configuration of Displayed Data Hexadecimal Bit pattern 7 segment 00 NX number 0 0000 1 0001 0010 0011 0100 0101 0110 0111 1000 20 2 3 4 5 6 7 8 9 A B C D E F DL 1 Head of bit device The lowest bit of word device Program Example SEG Program which converts the data of XC to F to seven segment display data and sends the display data to Y38 to 3F when turns on Coding X000 0 LD X000 0 L SEG XO00C Yo38 1 SEG K1X00C K2Y038 8 END Y38 to 3F Y38 to do not change until the next data is output
415. it which is to detect abnormality in reciprocating movements provided with sensors on both stroke ends as shown below If an error is detected D1 is turned ON and the error code is stored in D2 Contact commands before the CHK instruction are not to control execution of the CHK instruction but to set check conditions 1 Since the CHK instruction is provided to detect the cause of error when an error such as cycle time over occurred the circuit which contains the CHK instruction should be skipped when there is no error Use the CJ SCJ or JMP instruction to skip the CHK instruction X060 If the cycle time over error occurred Y60 o CJ P30 is turned on and the CHK instruction is executed If the error is detected by the X010 X015 X008 X01A instruction execution MO is turned ON CHK MO and processing jumps to label P30 2 When a CHK FORMAT ERR is detected the error step number is not stored Error step remains O Example Forward motion command X4 SS N Forward run Y50 2 Forward ra lt C S Backward run Y51 Backward Turns ON if forward Turns ON if backward stroke end sensor stroke end sensor X1 4 is turned ON is turned ON Backward motion command X5 Create the following circuit to check cycle time over in the system illustrated above Follow these inst
416. ith parameters the and AnA A2AS and AnU use fixed WDT values 7 109 7 APPLICATION INSTRUCTIONS Execution Conditions WDT reset command WDT WDTP Program Example WDT ON OFF Executed per scan Executed only once MELSEC A f Executed per scan Executed only once Program used when the setting of watch dog timer is 200 ms and the period of from 0 to END FEDN instruction is 300 ms depending on the execution conditions of program Program of DE Program of MS 300 ms gt wer hH T Program of 150 ms END END 7 110 7 APPLICATION INSTRUCTIONS MELSEC A 7 10 2 Specific format failure check ABUSE A2USH board A0J2H QCPU A A Mode X A Remark Valid only when the input output control method is direct method The CHK instruction varies in function with I O control mode as shown below control mode CPU Refresh mode Direct mode when either or both of input and output are in refresh mode An Failure check AnN AnS AnSH A1FX A0J2H Failure check Bit device output reverse 73 board Failure check Failure check AnA A2C RAS Failure check QCPU A A Mode A2USH board
417. ition data feed position data of axes which are currently not moving are changed to the data of present position data change registers Speed data of axes which are moving are changed to the data of speed change registers 2 Axes for present position data speed change are set with D as follows un Starting axes number Example Use 1 to 8 for axis number setting For interpolation set either of the interpolation axes Device symbol Only D is usable Starting axes are set as follows e Axis 4 nterpolation with axes 4 and 5 below e Present position data change Speed change D4 or D5 3 Select present position data speed change by setting data at n as mentioned KO or HO K1 or H1 The DSFLP instruction used with the A73CPU cannot use index qualification for specification of D and n If the DSFLP instruction with index qualification is executed operation error will result 7 130 7 APPLICATION INSTRUCTIONS MELSEC A 4 Present position data change by the DSFLP instruction is performed as follows 1 The start enable flag M200n which corresponds to the axis specified with D is set 2 Present position data is changed to the data of present position data change registers which correspond to the axes specified with D 3 When present position data change is completed the start enable flag M200n is reset Present position data change r
418. lected by the CHG instruction executed after is switched on MO is only switched on during 1 scan 6 BASIC INSTRUCTIONS MELSEC A 3 When the ASH A3M A3U A4U and 06 are used the CHG instruction is executed repeatedly while its input condition is on The following program is written before END or FEND of the main and subsequence programs nput condition Ladder example X000 0 PLS H scan CHG instruction execution gt P Et Main sequence program run Subsequence E program run EN Timing chart 1 nstruction execution X0 MO is not switched on MO is only switched on during the first scan of the subsequence program selected by the CHG instruction X0 executed after is switched on status Operation MO is only switched on during 1 scan 6 BASIC INSTRUCTIONS Execution of Instruction Used with CHG Instruction MELSEC A 1 When the A3 is used execution contents of the PLS instruction change with status of M9050 when other input conditions are same Status of M9050 OFF ON The following program is written at step 0 of the main and subsequence programs Ladder example X
419. link in forward loop Normal LWTP instruction setting fault processing Corresponding station error LWTP cannot be executed in the corresponding station Data link in forward loop Forward loop Reverse loop Data link in reverse loop Loopback in forward reverse deed D9204 direction station Sank Continue Loopback in forward direction Loopback in reverse direction Data link impossible Data link in reverse loop Forward loop Reverse loop Loopback in forward reverse loops Master staton Station 1 station 2 ate 3 Station n Forward loopback Reverse loopback APP 34 APPENDICES MELSEC A Table 1 5 Link Special Register List Continue Number Name Loopback in forward loop only Forward loopback D3204 sidus Loopback in reverse loop only Station 3 Station n Reverse loopback Stores the local or remote station number at which loopback is Loopback executing Station executing forward Deing executed station loopback Master station j Station 1 Station 2 3 Station n Forward loop Reverse loop Loopack executing Station executing reverse station loopback In the above example 1 is stored into D9205 and 3 into D9206 I
420. low Priority High 1 Display due to self diagnostic error 2 Display due to CHK 3 Display of annunciator F number 4 Display due to LED LEDC LEDA or LEDB Low 5 BATTERY ERROR The above priority can be changed on the A3A A3U and A4U For details refer to the A2A S1 A3ACPU User s Manual or the 20 S1 A3U A4UCPU User s Manual 4 When there is a display at the LED indicator due to 1 to 3 the execution of display instruction does not change the display When there is a display at the LED indicator due to 5 the execution of display instruction provides the display of that display instruction 7 APPLICATION INSTRUCTIONS MELSEC A b When the display instruction is executed the display is as shown below Display 16 characterscs 16 characters are displayed at the LED indicator by LED instruction First half 8 characters 4 Latter half 8 characters I The first half 8 characters are displayed at the LED indicator by LEDA instruction The latter half 8 characters are blanked LED gt LEDA L Blank The latter half 8 characters are displayed at the LED indicator LEDB by LEDB instruction The latter half 8 characters are displayed at the LED indicator LEDB Y A by LEDB instruction The first half 8 characters do not N change Comment is displayed at the LED indicator by LEDC instruction LEDC The latter half 8 characters are displayed a
421. lue of C10 to 10 when turns on and to 20 when X1 turns on X000 PK 0 MOV 10 X001 PK 6 MOV 20 X003 12 C10 14 DO DO DO C10 Y030 Coding 0 1 6 7 12 13 14 15 16 5 18 LD MOVP LD MOVP LD OUT LD OUT END X000 K10 X001 K20 X003 C10 C10 Y030 When turns on 10 is stored to DO When X1 turns on 20 is stored to DO C10 counts the data which is stored in DO as a set value When C10 counts out Y30 turns on DO DO DO 5 SEQUENCE INSTRUCTIONS 5 3 2 Bit device set reset SET RST Applicable CPU Available Device MELSEC A All CPUs Bit device Word 16 bit device Constant Pointer D W R A0 A1 K H P 1 Digit specification SET RST 1 Index qualification can be used with AnA A2AS QCPU A A Mode and A2USH board only RST input Functions SET Setting data Device number to be set turned on Device number to be reset 1 When the SET input turns on the specified device is turned on 2 The turned on device rem can be turned off by the RST instruction X005 SET X007 _RST 3 When the SET input is off RST ains on even if the SET input turns off The device ON
422. ly remote number given in hexadecimal station in Cleared when all contents of D9100 to D9107 are reset formation is 100 valid for 2 Fuse blow check is executed also to the output modules of remote I O stations Stores the module numbers corresponding to setting switch numbers or base slot numbers when fuse blow occurred Module for A0J2 Extension Base Unit Setting Base Unit Switch Stored Data Slot No Stored Data D9001 Fuseblow Fuse blow module I Dedicated to a number T A0J2H In case of remote I O station module I O number 10x 1 is stored modules of which data are different from data entered are detected when the power is turned on the first number of the lowest number unit among the detected units is stored in hexadecimal Storing method is the same as that of D9000 To monitor the number by peripheral devices perform monitor operation given in hexadecimal Cleared when all contents of D9116 to D9123 are reset module I O module verify error to 0 unit number module verify check is executed also to the modules of remote I O terminals If an I O module of which data is different from data entered is detected when the power in turned on the I O number corresponding to the setting switch No or base unit No is stored Storing method is the same as that of D9001 In case of remote I O station mod
423. m subroutine program and FOR NEXT If the STOP instruction is provided operation error occurs 5 SEQUENCE INSTRUCTIONS MELSEC A Program Examples STOP 1 Program which stops the PC when X8 turns on X008 0 sTOP H When X8 turns on is stopped 2 013 Sequence program 4 023 4 Coding 0 LD X008 1 STOP 2 LD X00A 3 OUT Y013 4 LD X00B 5 OUT Y023 6 END 5 SEQUENCE INSTRUCTIONS MELSEC A All CPUs 5 7 2 No operation NOP NOPLF The NOPLF instruction can be used with the GPP of which software is SW4GP GPPA SW01X GPPAE Available Device Carry flag Error flag Bit device Word 16 bit device Constant Pointer Level S B F T C DW 0 1 2 V KK P 1 M9012 M9010 M9011 Digit specification Index When the ladder is displayed NOP is omitted a NOP E e When the ladder is displayed NOPLF is omitted Functions NOP 1 This is a no operation instruction and has no effect on the previous operation 2 NOP is used in the following cases 1 To provide space for debugging of sequence programs 2 To delete an instruction without changing the number of steps Overwrite with NOP 3 To delete an instruction temporarily NOPLF 1 This is a
424. meric value 878123456 0 X010 P H K5 DMOV 78123456 MO Destination D side ot change Source S data is word device X010 P DMOV Destination D side change Fig 3 6 Ladder Example and Processing For digit specification processing any desired value can be used for the head device number of bit devices 3 INSTRUCTION STRUCTURE MELSEC A 3 3 Handling of Numeric Values In the A series there are instructions which handle numeric values in 16 bits and 32 bits The highest bits of 16 bits and 32 bits are used for the judgement of positive and negative Therefore numeric values handed by 16 bits and 32 bits are as follows 16 bits 32768 to 32767 32 bits 2147483648 to 2147483647 1 Numeric value setting procedure a Decimal X010 10 is stored D10 in BIN value 10 is stored to 010 in BIN value b Hexadecimal X010 m Mov D10 1015 stored to D10 in hexadecimal 2 When FFFEH is divided by 2 the following occurs 16 bit instruction is stored to DO et et FFFE A010 P H H Since FFFE is 2 2 2 1 FFFFH DO 32 bit instruction X010 PH Since FFFE is 65534 65534 2 32767 DO H 7FFF is stored to DO HD ooooFFFE 3 INSTRUCTION STRUCTURE MELS
425. mn indicates that index qualification can be performed with the AnA A2AS AnU QCPU A A Mode and A2USH board only The A mark in the Subset column indicates that subset processing can be performed with the A3H AnA A2AS AnU QCPU A Mode and A2USH board only 2 3 2 15 2 INSTRUCTIONS MELSEC A 2 24 Application instructions 1 Logical operation instructions Table 2 17 Logical Operation Instructions Classi Instruction 52 5 fication 5 Symbol Symbol Contents of Processing ya 5 8 Applicable CPU Page 25 WAND WAND 5 7 3 D AND S D o WANDP 5 5le e 7 3 Logical WAND WAND S1 s2 D 7l e 7 3 51 AND S2 D WANDP WANDP 51 52 7 e 73 DAND DAND S D 9 e O 7 3 5 0 1 D AND S 1 S g D 1 D DANDP DANDP S O 7 3 WOR WOR 5 7 7 D OR S D WORP WORP 5 D A 5 7 7 eo 8 WOR 81 2 7 7 7 Logical sum 51 OR 52 D 2 1 D OR 1 S 0 1 D 32 bits
426. mp destination Eliminate the same pointer numbers provided at the head of jump destination Label of the pointer P specified in the CJ 5 CALL CALLP LEDA B FCALL or BREAK instruction is not provided before the END instruction Read the error step using a peripheral device check contents and insert a jump destination pointer P 1 The RET instruction was included in the program and executed though the CALL instruction was not given 2 The NEXT and LEDA B BREAK instructions were included in the program and executed though the FOR instruction was not given Nesting level of the CALL CALLP and FOR instructions is 6 levels or deeper and the 6th level was executed 4 There is no or NEXT instruction at execution of the CALL or FOR instruction 1 Read the error step using a peripheral device check contents and correct program of the step 2 Reduce the number of nesting levels of the CALL CALLP and FOR instructions to 5 or less The CHG instruction was included in the program and executed though no sub program was provided Read the error step using a peripheral device and delete
427. n 1 21 Ta To lo a K a 1 JoJo 6 BASIC INSTRUCTIONS Execution Conditions ON Interchange command OFF Executed Executed p per scan per scan gt lt gt Executed gt __ Executed only once only once Program Examples XCH 1 Program which interchanges the present value of TO and the content of DO when X8 turns on Coding X008 P 0 LD X008 o XcH 00 H 1 XCHP TO DO 6 END 2 Program which interchanges the content of DO and the data of M16 to 31 when X10 turns on Coding X010 P LD X010 0 XCH M16 1 XCHP 16 6 END DXCH 1 Program which interchanges the content of DO and 1 and the data of M16 to 47 when X10 turns on Coding K8 0 LD X010 0 H iDXCH Mo H 1 DXCHP DO K8M16 8 END 2 Program which interchanges the content of DO and 1 with that of D9 and 10 when MO turns on us Coding P 0 LD MO 9 1iDXCH D3 1 DXCHP DO D9 8 END 6 BASIC INSTRUCTIONS MELSEC A 6 5 Program Branch Instructions RT a Applicable 6 5 1 Conditional jump unconditional jump cru ANGUS CJ SCJ JMP Available Device 2 Six mss BE Bit device Word 16 bit device Constant Pointer Level s 8
428. n Station 4 19 18 tation Station Station Station Statiorrsvamurrrsramon Station 56 55 54 53 52 51 50 49 D9140 Station Station Station Station Station Station Station Station 64 63 62 61 60 59 58 57 module card information APP 28 APPENDICES MELSEC A Table 1 4 Special Register List Continue Stores the number of retries executed to I O modules 09144 remote terminal modules which caused communication 09145 error D9146 Retry processing is executed the number of times set at Donar 09148 Data becomes 0 when communication is restored to normal D9149 Station number setting of I O modules and remote D9150 D9151 terminal modules is as shown below 1 7 D9152 b15 to 68 67 to bO D9153 D9141 Station 2 Station 1 D9154 D9142 Station 4 Station 3 D9155 D9143 Station 6 Station 5 D9156 _ of times Usable with A2C D9157 jofretry execution D9171 Station 62 Station 61 and A52G D9158 D9159 D9172 Station 64 Station 63 D9160 Retry counter uses 8 bits for one station D9161 7 b n 6 b n 5 4 3 2 1 b n 0 09162 0 1 09163 09164 Number of retries D9165 0 Normal D9166 1 Station error D9167 n is determined by station number of module or D9168 remote terminal module D9169 Odd number stations 60 to b7 n 0 D9170 E
429. n Processing Time of Small Size Compact CPUs Processing Time us AnS A1SJH A1SH A2SH S1 Instruction Condition Direct Mode Refresh Refresh Direct Refresh Direct Mode d ie X Y Mode Mode Mode Mode Only SLT device 8448 8448 8448 1088 5 1561 5 878 7 1381 3 memory Device SLT memory 24598 24598 24598 3314 5 3787 5 2480 7 3035 3 R SLTR 29 29 29 7 6 7 7 5 8 5 8 STRA 30 30 30 7 5 7 5 5 7 5 6 STRAR 28 28 28 7 1 7 2 5 4 5 4 STC 28 28 28 7 1 7 2 5 4 5 4 CLC 31 31 31 7 4 7 5 5 7 5 6 DUTY 68 68 68 17 3 17 4 13 1 13 0 PR 226 226 226 68 7 70 4 52 5 54 4 141 141 141 41 9 41 9 31 5 31 4 CHK Bit reverse 121 121 121 30 7 23 2 output instruction LED 203 203 203 LEDC 265 265 265 APP 62 APPENDICES MELSEC A Table 2 3 Instruction Processing Time of Small Size Compact CPUs Processing Time us A2USH S1 A2AS 51 A2USH A2C A52G A0J2H Instruction Condition board Direct Mode Refresh Refresh Refresh Refresh Refresh Refresh Mode Mode Mode Mode Mode Other than X 3 SLT device 2915 1324 9 10560 8448 10560 10560 10560 878 7 memory Device SLT memory 9996 4543 2 30747 24598 30747 30747 30747 2480 7 SLTR 6 6 3 0 37 29 37 37 37 5 8 STRA 5 0 2 27 38 30 38 38 38 5 7 STRAR 5 0 2 27 35 28 35 35 35 5 4 STC 2 4 1 09 35 28 35 3
430. nd is other than Off 2 On For this reason if the PLS command from the same device is executed multiple times in 1 scan the device turned On by the PLS command may not go On in 1 scan Circuit PLS PLS Timing Chart e When the On Off timing of XO and X1 differ the specified device does not go On in 1 scan ps mo mo jiis MOH ee mo END ae ni FH ON X OFF goes Off because X1 goes On because X1 is not Off gt On goes from Off to On i MO goes Off because is not Off gt On M X ff gt On Mx M E ON MO remains in the Off state When the Off On of and X1 are the same timing X0 ris xi PLS MO END END a ES H goes On because X1 is gt MO goes Off because X1 is On remains in the On state not Off On MO remains MO goes On because is Off gt On in the Off state MO goes Off because is not Off gt On 3 INSTRUCTION STRUCTURE MELSEC A 4 If the PLF instruction is used from the same device The PLF instruction turns the specified device On when the PLF command goes from On to Off and when the PLF command is not going from Off to On Off gt Off Off 2 On On On the specified device goes Off If the PLF instruction from the same device is executed multiple times in 1 scan the specified devi
431. nd 1 M9038 kg Coding o DCML X000 DO H 0 LD M9038 1 DCML K8X000 DO 8 END The number of bits of S The number of bits of D X1B to to X8 X7 to 0 These pits are SS olalololK amp lolalalalololalola alo o all regarded 0 J DCML V b31 tob28 b27tob24 to b8 b7 to 1 1 KS 2 2 1 o 1 o o i 1 2 Program which reverses the data of M16 to 35 and transfers the result to the Y40 to 53 M9038 K5 K6 Coding 0 DCML M16 Y040 LD M9038 1 DCML K5M16 K6Y040 8 END The number of bits of S lt The number of bits of D M35 to to M24 M23 to M16 These bits are 0 0100 NN 0 1 1 1 0 0 1 0 1 1 0 0 DCML Y63 to Y56 to 48 Y47 to Y40 DO 1 2 21 ofa al oli ol ofa 3 Program which reverses the data of DO and 1 and stores the result 016 and 17 when X3 turns on Codin X003 P 0 016 0 LD X003 1 DCMLP DO D16 8 END b31 to b24 to b8 b7 to b0 DO 01000001010 NN 0 11 1 1 0 0 1 0 1 1 0 0 C y DCML b31 to b24 to b8 b7 to 11115101 1 i o o o 1 1 o 1 o
432. nd or head device number storing au 82 D1 gend minuend Addend subtrahend or head device number stor ing addend subtrahend 2 1 390977 Head device number which will store the operation result Functions 1 Performs the addition of BCD data specified at D and the BCD data specified at S and stores the addition result into the device specified at D D S D A A 5 6 7 8 1 2 3 4 2 Performs the addition of BCD data specified at S1 and the BCD data specified at S2 and stores the addition result into the device specified at D1 51 52 21 A A 5 6 7 8 1 2 3 4 gt 6 9 1 2 3 At S S1 S2 and D 0 to 9999 BCD 4 digits can be specified 4 Even if the addition result exceeds 9999 the carry flag does not turn on and the carry digit is ignored 6 BASIC INSTRUCTIONS MELSEC A B 1 Performs the subtraction of BCD data specified at D and the BCD data specifi ed at S and stores the subtraction result into the device specified at D D S D 0 6 7 8 0 2 3 4 2 0 4 4 4 gt Digit higher than the specified digit is regarded as 0 2 Performs the subtraction of BCD data specified at S2 and the BCD data speci fied
433. ned by the master station in the link registers starting with the one specified at D of the master station The link registers W to be specified at D should be specified in the range of parameter assignment from the remote I O station to the master station For parameter setting refer to POINT below Y n1 E is ON during execution of the RFRP instruction X n1 1E turns ON at completion of the execution Since Y n1 E remains ON after completion of the RFRP instruction execution turn it OFF by the sequence program When the RFRP instruction cannot be executed due to error of specified special function module 1 10 turns ON If this is the case check the specified special function module If Y n1 D is turned ON X n1 1D turns OFF Provide interlock using 1 1 X n1 1F 1 and Y n1 F so that other RFRP RTOP instructions may not be executed during data read from remote I O stations by the RFRP instruction Read command 1 1 K ERP 0140 10 052 10 1 1 X n1 1F Executed only once In the following cases operation error occurs and the error flag turns on The specified station is not a remote station The head I O number specified at n1 is not a special function module The number of points n3 exceeds the link register range WO to 3FF 7 APPLICATION INSTRUCTIONS MELSEC A Program Examples RFRP A pro
434. nexecuted Unchanged ON ON Changed OFF Executed Unexecuted M L S B Unchanged ON ON Executed Changed OFF ON Special M Unexecuted B Executed Unexecuted Executed R Refresh mode D Direct mode APP 66 APPENDICES MELSEC A Table 2 4 Instruction Processing Time of CPUs Processing Time us A3A Instruction Condition Device An ANN S OTS A3H A3M PA A3U A3N Board A2U A4U D R D R D R R Unexecuted 2 3 1 0 2 3 0 35 0 35 0 40 0 30 Y Unchanged ON ON 2 3 1 0 2 3 0 35 0 35 0 40 0 30 Executed Changed OFF ON 2 3 1 0 2 3 2 0 0 40 0 40 0 30 Unexecuted 3 7 1 0 1 0 0 35 0 35 0 40 0 30 M Unchanged 41 1 0 1 0 0 35 0 35 0 40 0 30 Executed Changed OFF ON 41 1 0 1 0 0 40 0 40 0 40 0 30 Special Unexecuted 8 0 3 0 0 80 0 80 080 0 60 B Executed 32 32 1 4 1 4 0 80 0 60 RST Unexecuted 37 3 0 30 080 20 1 5 Executed 680 477 477 427 427 150 115 Tc Unexecuted 3 7 3 0 3 0 0 80 0 80 1 4 1 1 Executed 57 43 43 5 2 5 2 5 6 4 2 D W Unexecuted 3 7 3 0 3 0 0 80 0 80 1 4 1 1 AO A1 2 34 28 28 0 80 0 80 8 4 6 3 R Unexecuted 3 7 3 0 3 0 0 80 0 80 1 4 1 1 Executed 41 35 35 57 57 4 6 3 5 NOP 1 3 1 0 1 0 0 20 0 20 0 20 0 15 M9084 OFF 2400 2150 2150
435. ng Manual Fundamentals 5 16 5 SEQUENCE INSTRUCTIONS MELSEC A Execution Conditions This instruction is executed per scan irrespective of the operation result of the instructions preceding the OUT instruction Program Examples OUT 1 Program which switches an output at the output unit X005 Coding 0 Y033 H LD X005 X006 1 OUT Yo033 2 Y034 2 LD X006 OUT 034 YO35 4 OUT 035 5 END 2 Program which turns on Y10 and Y14 10 seconds after turns on X000 K100 Coding 0 cn H LD X000 T1 1 OUT T1 K100 2 YO10 H 2 LD T1 3 OUT Y010 014 4 OUT YO14 5 END 3 Program which uses the BCD data of X10 to 1F as the set value of the timer 0 2000 EN D10 Data of X10 to 1F is converted into BIN and stored into D10 6 002 A When X2 turns on the data stored in D10 is counted as a set value T2 8 Y015 When T2 counts out Y15 turns on Coding 0 LD X000 1 K4X010 010 6 LD X002 7 OUT T2 D10 8 LD T2 9 OUT Y015 0 END 5 17 5 SEQUENCE INSTRUCTIONS MELSEC A 4 Program which turns on after turns on 10 times and which turns off when X1 turns on X000 K10 0 C10 C10 2 YO30 X001 4 RST C10 Coding 0 LD OUT LD OUT LD RST END X000 C10 K10 C10 Y030 X001 C10 5 Program which changes the set va
436. nsfer instruction Transfer of specified data 6 46 to 6 57 Program branch instruction Program jump subroutine interrupt program call 6 58 to 6 68 Program switching instruction Switching between main and subprogram 6 69 to 6 81 Refresh instruction Link refresh partial refresh execution 6 82 to 6 88 Logical operation instruction Logical operation such as logical sum and logical product 7 2 to 7 20 Rotation instruction Rotation of specified data 7 21 to 7 29 Shift instruction Shift of specified data 7 30 to 7 36 Data processing instruction Data processing such as 16 bit data search decode and encode 7 37 to 7 52 FIFO instruction Read write of FIFO table 7 53 to 7 57 duse Buffer memory access instruction Application Data read write with special function modules and remote terminals A2C A52G 7 58 to 7 76 instruction FOR to NEXT instruction Program repeated between FOR and NEXT instruction 7 77 to 7 78 Local remote station access instruction Local remote I O station data read write 7 79 to 7 91 Display instruction code print character display on LED etc 7 92 to 7 107 Others Instructions which are not included in the above classification such as WDT reset and set reset of carry flag 7 108 to 7 124 Instructions for servo programs
437. nstruction Corrective Action Read the error step using a peripheral device and correct the program meeting loaded conditions of remote terminal modules Provide interlock using M9081 communication request registration areas BUSY signal or D9081 number of vacant areas in the communication request registration areas when the instruction is executed to a remote terminal Execute the PIDCONT instruction after execution of the PIDINIT instruction Execute the PID57 instruction after execution of the PIDINIT and PIDCONT instructions MAIN CPU DOWN BATTERY ERROR Checked at power on Contin ue The CPU malfunctioned due to noise Hardware failure Take proper countermeasures for noise Hardware failure Failure in the power module CPU module main base unit or expansion cable is detected Battery voltage has lowered below specified level Battery lead connector is not connected Replace the power module CPU module main base unit or expansion cable Replace battery If a RAM memory or power failure compensation function is used connect the lead connector MELSEC A 9 ERROR CODE LIST MELSEC A 9 5 Error Code List for the AnNUCPU A2ASCPU and A2USH board Table 9 4 shows the error messages error codes description and cause of error and corrective actions of detailed error co
438. number storing augend minuend Addition subtraction commands Augend minuend or head device number storing au gend minuend Addend subtrahend or head device number stor ing addend subtrahend Head device number which will store the opera tion result Functions D 1 Performs the addition of BIN data specified at D and the BIN data specified at S and stores the addition result into the device specified at D D 1 D S 1 S D 1 D b31 616 b15 b31 016 b15 bO b31 bl6bl15 bd 567890 BIN 123456 BIN a 691346 BIN 2 Performs the addition of BIN data specified at S1 and the BIN data specified at S2 and stores the addition result into the device specified at D1 511 51 5221 52 1 1 D1 5 DLE bls b31 016 615 bo baie scc 567890 BIN 123456 BIN ES 691346 BIN 6 13 6 BASIC INSTRUCTIONS MELSEC A 8 At S S1 S2 and D 2147483648 to 2147483647 BIN 32 bits can be specified 4 The judgement of whether the datas of S S1 82 and D are positive or negative is made at the highest bit b31 0 Positive doses Negative b When the Oth bit has underflown the carry flag does not turn on When the 31st bit has overflown the carry flag does not turn on o 1 Performs the subtracti
439. o D9009 Reduces 1 from the data of 09124 However when 09124 is 0 the data remains O Displays the F number stored in 09009 at the LED indicator When 09124 is 0 the F number is not displayed Before execution After execution 200 29009 1 is 0 reduced M 9124 09125 D9126 __ D9127 _ 09128 09129 __ D9130 __ D9131 D9132 7 106 gt Since D9124 is 0 F E number is not displayed at LED indicator Number of entered F numbers annunciator accumulator 7 APPLICATION INSTRUCTIONS MELSEC A Execution Conditions Reset command OFF LEDR lt Executed Executed only one only one The LEDR instruction is used as the end command for the extended application instructions for the AnA F and AnU For details refer to the AnSHCPU AnACPU AnUCPU Programming Manual Dedicated Instructions 7 107 7 APPLICATION INSTRUCTIONS MELSEC A 7 10 Other Instructions Instructions which perform operations such as the reset of WDT the failure check and the set and reset of carry flag Classification Instruction Symbol Ref Page WDT reset WDT 7 109 Failure check CHK 7 111 Set SLT 7 117 Status latch Reset SLTR 7 117 Set STRA 7 119 Sampling trace Reset STRAR 7 119 Set STC 7 121
440. objective special function module may fail to process correctly To execute a TO instruction for a special function module set the execution intervals meeting the processing and conversion time of that module using the timer and the constant scan function of it 7 APPLICATION INSTRUCTIONS 7 6 3 Remote terminal module 1 and 2 word data read MELSEC A AnU A2AS A2USH S1 IA2USH board A0J2H QCPU A A Mode FROM PRC FROMP PRC X DFRO PRC DFROP PRC Remark Available Device 5 gt X oo 5 Bit device Word 16 bit device Constant Pointer Level E 9 ao 5 0 1 2 HH P IJ N 5 M9012 M9010 M9011 a K1 ni to FROM K4 n2 Oojo D1 0 DFRO K1 to n3 K8 D2 03 71 K1 to when the FROM P instruction is used K1 to K8 when the DFRO P instruction is used Indicates the instruction symbol Read commands FROM DFRO Setting data A2C Head station number of remote terminal module A52G Head station number of remote terminal module 100 Head address of data to be read Head number of the device which store read data Number of data to be read N
441. ocessing registration is not processed after execution of the TO P DTO P instructions 7 After completion of a processing which is executed according to registered data the bit device specified at D1 is turned ON and deleted from the communication request registration areas 8 The communication request registration areas can hold data for up to 32 requests If the number of registration data exceeds 32 operation error occurs and registration processing is not executed 9 Status of registration in the communication request registration areas can be confirmed by M9081 and D9081 M9081 Turns ON when the communication request registration areas are full Turns OFF when there is a vacant area D9081 Stores the number of vacant areas in the communication request registration areas M9081 and D9081 can therefore be used as handshake signals at execution of instructions 7 APPLICATION INSTRUCTIONS MELSEC A 10 If the instructions are executed to a remote terminal module which is communicating with other module execution of the instructions is again performed to the same remote terminal module immediately after the processing being executed Execution Conditions ON Read command OFF Executed every Executed every completion of completion of communication communication Device specified 02 Communication complete flag
442. of the contact point before the CJ instruction Pointer P254 is not given to the head of the CHK instruction circuit block P2544 H H H CHK D1 D2 4 1 Check the program in instruction circuit block according to item 1 to 7 in the left column Correct problem using the peripheral equipment and perform operation again This error code is only effective when the input output control method is a direct method 9 ERROR CODE LIST MELSEC A Table 9 2 Error Code List for ANSHCPU Continue Detailed Frror Error CPU Error Message Code Error and Cause Corrective Action D9008 Code States D9092 CAN T 1 Although the interrupt module is Check for the presence of EXECUTE 1 used there is no number of interrupt program which interrupt pointer which corresponds to the interrupt unit corresponds to that module in the create the interrupt program and program or there are multiple reduce the same numbers of numbers Check if there is IRET No IRET instruction has been instruction in the interrupt entered in the interrupt program program and enter the There is IRET instruction in instruction other than the interrupt program Check if there is IRET instruction in other than the interrupt program and delete the IRET instruction ROM ERR Parameters and or sequence Correctly
443. of the main and subsequence programs X000 Inter lock A 1 2 3 4 5 6 7 8 9 10 11 12 ON PONE instruction execution in main sequence program Timing chart Main sequence program Y 4 4 K P yl j Subsequence program 4 DA 4 CHG instruction execution s in subsequence program OFF No switching between the main and subsequence programs 4 5 11 Operation CHG instruction is executed every scan and switches between the main and subsequence programs 2 3 ON depending 7 8 9 10 on OFF Switched between the main and subsequence programs 1 6 12 ON When the CHG instruction is executed END processing e g timer timing counter counting WDT reset is performed for the current program and operation is started from step 0 of the other program 6 BASIC INSTRUCTIONS Execution of PLS Instruction Used with CHG Instruction MELSEC A 1 When the A3 is used execution contents of the PLS instruction change with status of M9050 when other input conditions are same Status of M9050 OFF ON The following program is written at step 0 of the main and subsequence programs Input condition
444. ogram Sequence program DI Any interrupt signal occuring between DI and El instructions is disabled Sequence program until the processing between the DI and El instructions is completed after El which the interrupt program is run FEND Interrupt program 6 BASIC INSTRUCTIONS MELSEC A IRET 1 Indicates the termination of processing of interrupt program 2 Performs the processing of counter for interruption and returns the processing to the sequence program after the RET instruction is executed With the CPUs other than A3H AnA A2AS AnU QCPU A A Mode and A2USH board interrupt counter processing is performed 1 When a counter is used in the interrupt program use the counter for interruption The AnA A2AS AnU QCPU A A Mode and A2USH board do not have any counter which may be used in the interrupt program 2 The pointer for interruption occupies one step 110 X00C 50 YO10 H X005 Stored into 53 step 50 55 IRET 3 For the interrupt conditions refer to the ACPU Programming Manual Fundamentals 4 During the execution of interrupt program DI interruption inhibition is set Do not allow multiple interrupt programs to be run simultaneously This can be prevented by using the EI instruction in the interrupt programs b If the El or DI instruction
445. on Instruction execution time D 3a 14 At no counting 0 105 0 045 After counting up 0 105 0 045 At execution K 0 720 At counting 1 91 0 823 At no execution 0 158 0 068 At no change ON gt ON 0 158 0 068 At execution At change OFF ON 0 158 0 068 At no execution 0 158 0 068 At no change ON gt ON 0 158 0 068 At execution At change OFF ON 0 158 0 068 Special M Instruction execution time 0 158 0 068 Time for no execution 0 105 0 045 M L 5 8 79 APPENDICES MELSEC A Table 2 7 Instruction Processing Time of QCPU A A Mode Continue TE Condition D Instruction Time us nstruction ondition Device QnCPUA A QnHCPU A 0 316 0 136 0 316 0 136 At no execution At execution 0 158 0 068 0 158 0 068 0 158 0 068 0 158 0 068 0 158 0 068 At execution 0 158 0 068 At no execution At execution At execution At no execution At execution At no execution At execution At no execution At execution At no execution At execution _ C o _ pM IWhenM908MisON o uo 0 482 0 208 0 237 no execution _ 0 877 0 376 lAtnoexecution 0 877 0 376 Mem DN 0 877 0 376 ru execution 0 877 0 376 rca execution APP 80 APPENDICES MELSEC A Table 2 7 Instruction Processing Time of QCPU A A Mode Continue TE Condition D Instruction Processing Time us n
446. on error has occurred during execution of Step number at which application instruction the step number at which the Unusable with D9010 step operation error has error has occurred is stored in BIN code Thereafter and occurred each time operation error occurs the contents of D9010 are renewed When operation error has occurred during execution of Step number at which application instruction the step number at which the 1 Error step operation error has error has occurred is stored in BIN code Since storage Usable with all D9011 into 09011 is made when M9011 changes from off to on types of CPUs the contents of D9010 cannot be renewed unless M901 1 is cleared by user program The control mode set is returned in any of the VO control mode following numbers Unusable with control mode 0 Both input and output in direct mode An A3H and number M 1 Input in refresh mode output in direct mode A3M 3 Both input and output in refresh mode The operation states of CPU as shown below are stored in D9015 15 12 B11 B8 B7 B4 B3 BO A 7 v A CPU key switch Remains the same in remote RUN STOP mode RUN STOP PAUSE x STEP RUN CPU operating Operating states of Usable with all B9013 states CPU types of CPUs Remote RUN STOP by parameter setting 0 RUN 1 STOP 2 PAUSE Status in program
447. on of BIN data specified at D and the BIN data specified at S and stores the addition result into the device specified at D D 1 D S 1 5 0 1 D b31 016 b15 bO b31 b16 b15 bd b31 016 b15 bO 567890 BIN 123456 BIN gt 444434 BIN 2 Performs the subtraction of device specified at S1 and the device specified at S2 and stores the result into the device specified at D1 511 51 521 52 D1 1 D1 b31 bl6b15 bO b31 b16 b15 60 b31 016 b15 bO 567890 BIN 123456 BIN gt 444434 BIN 8 At S S1 S2 and D 2147483648 to 2147483647 BIN 32 bits can be specified 4 The judgement of whether the dates of S S1 52 and D are positive or negative is made at the highest bit b31 Positive diss Negative b When the Oth bit has underflown the carry flag does not turn on When the 31st bit has overflown the carry flag does not turn on 6 14 6 BASIC INSTRUCTIONS MELSEC A Execution Conditions ON Addition subtraction OFF command Executed Executed per scan per scan P Executed Executed g only once only once Program Examples D Program which adds the 28 bit data of X10 to 2B and the date of D9 and 10 and outputs the result to to 4B when turns Coding X000 P
448. on request registration areas can be confirmed by M9081 and D9081 M9081 Turns ON when the communication request registration areas are full Turns OFF when there is a vacant area D9081 Stores the number of vacant areas in the communication request registration areas M9081 and D9081 can therefore be used as handshake signals for execution of instructions 7 APPLICATION INSTRUCTIONS MELSEC A 10 If the FROM P DFRO P instructions are executed to a remote terminal module which is communicating with other module execution of the instructions is again performed to the same remote terminal module immediately after the processing being executed Execution Conditions ON Read command OFF __ Executed every Executed every completion of completion of communication communication Sr Device specified at 02 Communication complete flag P Executed only once Executed only once Device specified 02 4 Communication complete flag Operation Errors In the following cases operation error occurs and the error flag turns ON When the station number specified at n1 is not of a remote terminal When n3 points which start with the device specified at 01 exceed the specified device range When the device specified at D1 is not a usable device Program Examples FROM A program which reads data of 1 word from addr
449. on subtraction multiplication Arithmetic operation instruction and division in BIN and BCD 6 8 INC DEC BCD lt gt BIN conversion instruction RI 6 38 Data transfer instruction Transfer of specified data 6 46 Program branch instruction Jump call interrupt enable disable 6 58 Program switching instruction Switching between main and subprogram 6 69 Refresh instruction Data link refresh and I O partial refresh 6 82 6 BASIC INSTRUCTIONS MELSEC A 6 1 Comparison Operation Instructions 1 The comparison operation instructions make numerical magnitude comparisons such as gt and between two pieces of data They are handled as a contact and turn on when their preceding condition holds The application of comparison operation instruction is the same as that of the contact instruction for the corresponding sequence instruction as indicated below LD LDI LD LDD AND AND ANDD e OR ORI ORD 3 The comparison operation instructions are available in the following 36 types Classifica tion Instruction Symbol Classifica Ref Page tion Instruction Symbol Ref Page Classifica tion Instruction Symbol Ref Page LD AND OR LDD ANDD ORD LD gt AND gt OR gt LDD gt ANDD gt ORD gt LD lt AND lt OR lt LDD lt ANDD lt ORD lt LD lt gt
450. onnected 73 68 67 to 50 0 axis axis axis axis axis axis axis axis 6 5 4 3 2 1 Servo amplifier connection data Connected 1 Disconnected 0 APP 31 APPENDICES MELSEC A Table 1 4 Special Register List Continue Stores error code when the manual pulse generator axis setting error flag M9077 is turned on in the bit each corresponds to each axis number b15 to b8 b7 For For For For For For For For For For axis axis axis axis axis axis axis axis 0 7 6 5 4 3 2 1 P3 P2 1 is stored the bit Not used 1 is stored in which corresponds to the the bit which Manual pulse Manual pulse generator axis number which corresponds to Dedicated to caused 1 pulse input the manual axis setting error code magnification setting pulse generator A73 error number which 0 Normal caused manual 1 Input magnification is pulse generator out of the range from axis setting 1 to 100 error 0 Normal 1 Axis setting is out of the range from 1108 generator axis setting error Stores axis number in the bit which corresponds to the axis which was running when a test mode request was Starting axis given and test mode request error occurred number at test 015 Dedicated to Starting axis number af Fon mode request A73 error
451. ontrol instructions Positioning control To Use 7 Writing servo programs A73CPU Reference Manual IB NA 66233 Description of auxiliary and application functions 2 INSTRUCTIONS 2 2 1 INSTRUCTIONS Classification MELSEC A The instructions of MELSEC A series are largely classified into sequence instruc tions basic instructions and application instructions These instructions are shown in Table 2 1 Table 2 1 Classification of Instructions Classification of instructions Description page Contact instruction Operation start series connection parallel connection 5 2 to 5 4 Connection instruction Ladder block connection operation result storage read 5 5 to 5 13 Sequence Output instruction Bit device output pulse output output reverse 5 14 to 5 26 Shift instruction Bit device shift 5 27 to 5 28 Master control instruction Master control 5 29 to 5 32 Termination instruction Program termination 5 33 to 5 36 Other instructions Program stop no operation etc 5 37 to 5 42 Comparison operation instruction Comparison such as gt and lt 6 2 to 6 7 Arithmetic operation instruction Addition subtraction multiplication and division of BIN and BCD 6 8 to 6 37 Basic BCD o BIN conversion instruction Conversion from BCD to BIN and BIN to BCD 6 38 to 6 45 instruction Data tra
452. oo 23 i8 Bit device Word 16 bit device Constant Pointer Level o 2 X Y ML F T C D WR AO A1 Z 1 N 5 M9012 M9010 M9011 5 0O 0 O O0j JO OO O OO D K 5 IoOolojlolojojolojolojolojojloiojolojojo to O K4 52 10 0 Indicates the instruction symbol Setting data Addend subtrahend or head device number stor ing addend subtrahend Head device number storing augend minuend Addition subtraction commands Augend minuend or head device number storing au S2 D1 gend minuend Addend subtrahend or head device number stor 51 52 01 ing addend subtrahend Head device number which will store the opera tion result Functions 1 Performs the addition of BIN data specifies at D and the BIN data specified at S and stores the addition result into the device specified at D 5678 BIN 1234 BIN bs 6912 BIN 2 Performs the addition of BIN data specified at 51 and the BIN data specified at S2 and stores the addition result into the device specified at D1 5678 BIN 1234 BIN E gt 6912 BIN 6
453. opmo Optm onm OFM Opu OFM yo MODULE4 FPD OPM IPD onm OHM OPM lO Appli OFM VP MIOOM OFM Opu OPM OFM lt 5 opm ptr OOM OPM OVP HON OHM VO Appli Top OPM ODRIODO THe ODM Opi lO Appli Base unit for 2 modules Base unit for 5 modules MODULE MODULEO MODULE1 MODULE2 MODULE3 5 2 a 95 O i g XE 16 points occupying module 32 points occupying module 64 points occupying module connecter type name Loaded module MELSEC A BASIC BASE MODULE ARRANGEMENT TABLE POWER MODULE type name APP 90 APPENDICES MELSEC A Sheet format 1 2 gt MODULE7 lt Be opm SM SHEET Base unit for 8 modules opm optmiopo mr MODULE6 MODULE5 lO Appli CHECKED PREPARED BY BY Base unit for 2 modules Base unit for 5 modules VO VO MODULEO MODULE1 MODULE2 MODULES3 lt gt wur OHM OYM MODULE4 l O Appli
454. or step There is inconsistency in the module name between the special instruction for CC Link and I O assignment of the parameter The location designated by the special instruction for CC Link is not the master module Correct the module name of I O assignment of the parameter to that of the special instruction for CC Link Use the peripheral device to check and correct the special instruction for CC Link at the error step LINK PARA ERROR Stop or Contin ue set by para meter There is inconsistency for some reason between the data which is written by the peripheral device in the parameter area of the link under link range designation using parameter setup and the link parameter data read by the CPU module The total number of stations is set at 0 9 11 Write parameters and check again If the error persists there is a fault in hardware Consult Mitsubishi representative 9 ERROR CODE LIST Error Message OPERATION ERROR Error Code D9008 Table 9 2 Error Code List for ANSHCPU Continue Detailed Error Code D9092 CPU States Error and Cause The result of BCD conversion exceeds the rated range 9999 or 99999999 There is a setting exceeding the rated device range disabling execution of calculation 3 The file register is used on the program without designation of the capacity of the file register
455. orage position of data is as indicated below Data storage position head address of data table content of pointer 2 Adds 1 to the content of pointer For the pointer use the device specified at D Head of FIFO table The number of data stored in data table is stored Device number of ee a Data table destination Data written by FIFW or FIFWP in struction is stored 2 To use the FIFW instruction for the first time clear the pointer specified at D before executing the instruction 3 To perform the management of the number of data which may be written to multiple FIFO tables use the user program 7 APPLICATION INSTRUCTIONS MELSEC A FIFR 1 Reads data from the first device after the pointer of FIFO table and stores the data into the of S 2 The data of data table is shifted to the front one by one and the preceding data is set to O i e data is lost 3 Subtracts 1 from the content of pointer 4 If the FIFR instruction is executed when the content of pointer is 0 operation error 5 1 is reduced gt Pointer 11 Y Movement of R12 data Stored into device T at S T Data table 2 No Execution Conditions ON OFF Read write command Executed Executed per scan per scan gt k
456. ot given Though an interrupt module is used Monitor special register D9011 using a no interrupt pointer 1 which peripheral device and check if the corresponds to the module is given in interrupt program that corresponds to the program Upon occurrence of the stored data is provided or if two or error the problem pointer I number more interrupt pointers 1 of the same is stored at D9011 number are given Make necessary corrections 9 ERROR CODE LIST Error Massage CASSETTE ERROR MELSEC A Table 9 4 Error Code List for the AnU A2AS and A2USH board Continue Error Code D9008 Detailed Error Code D9091 CPU States Error and Cause Memory cassette is not loaded Corrective Action Turn off the PC power and load the memory cassette RAM ERROR Checked at power on The sequence program storage RAM in the CPU module caused an error The work area RAM in the CPU module caused an error The device memory in the CPU module caused an error The address RAM in the CPU module caused an error Since this is CPU hardware error consult Mitsubishi representative OPE CIRCUIT ERROR Checked at power on OPE CIRCUIT ERR Checked at execution of the END instruction The operation circuit for index qualification in the CPU does not work correctly Hardware logic in the CPU does not
457. ot required when the 2 RS232C interface unit is used For details Number of the device to be turned on at read completion refer to AJ35PTF R2 RS 232C interface unit user s manual Functions FROM PRC Dummy data which has no meaning in program processing 1 Reads data of n3 words which begin with the address specified at n2 of buffer memory in the remote terminal module specified at n1 and stores the data in the devices starting with the one specified at D1 Remote terminal buffer memory Device specified at D1 n2 n3 words gt CPU module points 7 APPLICATION INSTRUCTIONS MELSEC A DERO PRC 2 Reads data of n3x2 words which begin with the address specified at n2 of buffer memory in the remote terminal module specified at n1 and stores the data in the devices starting with the one specified at D1 Remote terminal buffer memory CPU module Device specified at D1 n2 REMARK n3x2 words v Ta 4 n3x2 points The method for specifying n1 for an A2C is different from that for an A52G as mentioned below 1 A2C Head station number of remote terminal modules is specified at n1 Sequence program flow Device No specified at 02 orr
458. own below LEDA RESQUE L H The instructions mentioned above vary in function if used in this section Specifies an dedicated instruction LEDR H Instructions other than those mentioned above cannot be used in the dedicated instruction blocks 3 16 3 INSTRUCTION STRUCTURE MELSEC A 3 8 3 Set values for the extension timer and counter Set values for the timer and counter shown below extended by the AnA A2AS AnU QCPU A A Mode and A2USH board used for the OUT instruction devices should be set with the devices D W specified by parameters For details refer to the A2A S1 ASACPU User s Manual the A2U S1 A3U A4UCPU User s Manual or the ACPU Fundamentals Programming Manual A2ASCPU S1 Usds Manual Timer T 256 to 2047 Counter C 256 to 1023 Example When the set value device for T256 is specified at 0370 with parameters Set value device is not necessary Example When x T256 input the set value device D370 for T256 is displayed automatically 3 8 4 Cautions on using index qualification 1 Check device numbers when index qualification is used The AnA A2AS AnU QCPU A A Mode and A2USH board does not check device numbers when index qualifi cation is used in order to increase the speed of operation processing Because of this error occurred in the result of index qualification is not detec
459. pplications Note that even with these applications if the user approves that the application is to be limited and a special quality is not required application shall be possible When considering use in aircraft medical applications railways incineration and fuel devices manned transport devices equipment for recreation and amusement and safety devices in which human life or assets could be greatly affected and for which a particularly high reliability is required in terms of safety and control system please consult with Mitsubishi and discuss the required specifications Type ACPU QCPU A Mode Common Instructions Programming Manual MODEL ACPU COMMON P E MODE 134741 IB NA 66250 H 0312 MEE s MITSUBISHI ELECTRIC CORPORATION HEAD OFFICE 1 8 12 OFFICE TOWER Z 142 HARUMI CHUO KU 104 6212 JAPAN NAGOYA WORKS 1 14 YADA MINAMI 5 CHOME HIGASHI KU NAGOYA JAPAN When exported from Japan this manual does not require application to the Ministry of Economy Trade and Industry for service transaction permission Specifications subject to change without notice
460. process 32 bit instructions when Z and V are used in pairs In this case Z is regarded as the lower 16 bit device and therefore V cannot be used in a 32 bit instruction Programs cannot be entered X010 H HA78D8ED _ DMOV 0A78D8ED 2 A78 DB8ED V 2 If either of Z or V is specified for index qualification in the instruction index qualification is performed regarding data in Z and V as 16 bit data even when 32 bit data is stored in Z and V X010 H DMOV 12345678 2 Hee Data 12345678H is stored in 2 and V 2 D2 00 jH Data in DO and D1 become equal to D 2 5678H and D 3 5678H respectively REMARK To handle 32 bit data with extension index registers Z1 to Z6 and V1 to V6 of AnA A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 5 3 If one of two consecutive word devices used to store 32 bit data is used in a 16 bit instruction processing goes as follows X010 H 0A78D8ED 00 010 When DO is specified z E Data 60 to 615 of DO and 01 are z handled as DO data MOV D1 011 When D1 is specified Data b16 to b31 of DO and D1 are handled as D1 data
461. put module 16x30 ms 480 ms The PRC instruction performs process ings during 10ms interrupts in order of data output strobe signal on strobe signal off Any other instruction is executed between the processings 3 In addition to the ASCII code a strobe signal 10 msec ON 20 msec OFF is also output from the device specified at D 8 4 Until the execution of sending the ASCII code of 16 characters after execution of the instruction the PRC instruction execution flag device D 9 is ON 5 Multiple PR and PRC instructions can be used In such a case however provide interlock by use of the PRC instruction execution flag contact of device D 9 so that the instructions may not turn ON at the same time 7 APPLICARTION INSTRUCTIONS Execution conditions ON ASCII print command PR PRC Executed only once gt lt Program Examples PR Program which converts ABCDEFGHIJKLMNOP into an ASCII code and stores the code into the DO to 7 when turns on and outputs the ASCII code of DO to 7 into the Y14 to 1D when 1 turns on X000 0 I ASC ABCDEFGH DO When turns on ABCDEFGHIJKLMNOP is converted into ASCII code and stored into the B DO to 7 ASC IJKLMNOP 04 MOV 0 D8 209 x E When X1 turns on ASCII code of DO to 7 is 32 PR 014 H output to the Y14 to 1D seeding When a CPU oth
462. puter program capacities is as indicated below Main sub sequence microcomputer program memory program memory program memory capacity capacity capacity 2 Never use the instructions specified as those which cannot be used in preparing microcomputer programs If they are used the PC CPU will malfunction when a microcomputer program is run 8 MICROCOMPUTER MODE 8 2 Using Utility Program SW 1 0 System disk Utility program MELSEC A Various types of control and operation e g PID control function operation code conversion can be executed by calling the utility program from the microcomputer program area 1 Utility program entry procedure Combine together the utility program with the user program in the following procedure Peripheral device with FDD function e g AGGPP Utility program area Utility program Internal memory User program area Parameter sequence program Utility program User disk Parameter t sequence program Utility program System disk for the peripheral used e g 5 Fig 81 Entering the Utility Program By loading the SW system disk write the sequence program and set microcomputer capacity of parameters Then register the program and the parameters to the user s floppy disk Ho Load the SW _ UTLP __ _ isystem
463. qualification is performed to bit devices AnA A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 1 2 The A mark in the Index column indicates that index qualification can be performed with the AnA A2AS AnU QCPU A A Mode and A2USH board only 3 The A mark in the Subset column indicates that subset processing can be performed with the A3H AnA A2AS AnU QCPU A A Mode and A2USH board only 2 11 2 INSTRUCTIONS MELSEC A Table 2 11 Arithmetic Operation Instructions 1 Execu i X 5 5 Contents of Processing tion Con 2 Applicable CPU Page y dition ES 3 25 3 px 1 52 D 9 le A O 6 28 81 x S2 2 9 1 D BCD 2 B P 1 52 E 4dgi 5 6 28 multipli 3 cation Q division Be a s 52 5 6 28 81 S2 2 Quotient D Remainder D 1 3 B8 s 2 6 28 DB s 52 D 11 6 31 51 1 51 52 1 52 BCD o 0 3 0 2 0 1 D 80 18210 4 6 31 multipli co cation o DB DB 11 6 31 division amp oe cao at S141 51 241 52 2 Quotient D 1 D DB P FREE Remainder 0 3 0 2
464. r less Usable with all D9005 AC DOWN count of rating while the CPU unit is performing operation and 1 Shelf diagnostic Self diagnostic error When error is found as a result of self diagnosis error Usable with all D9008 number number is stored in BIN code types of CPUs When one of FO to 255 is turned on by OUT F SET the F number which has been detected earliest among the F numbers which have turned on is stored in BIN code 09009 can be cleared by RST or LEDR instruction If another F number has been detected the clearing of 09009 causes the next number to be stored in 09009 F number at which 09009 Annunciator extemaldsill re hes When one of FO to 255 is turned on by OUT F or detection SET the number which has been detected earliest occurred among the F numbers which have turned on is stored in Unusable with A3 A3N A3A A73 and A3N board Usable with A3 A73 and board BIN code 09009 can be cleared by executing RST or LEDR instruction or moving INDICATOR RESET switch on CPU front to ON position If another F number has been detected the clearing of D9009 causes the nest number to be stored in D9009 APP 17 APPENDICES MELSEC A Table 1 4 Special Register List Continue When operati
465. racter points beginning with the 791 sion devices D 1 For the number of steps when extension devices are used or when index qualification is performed to bit devices for AnA A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 1 2 The A mark in the Index column indicates that index qualification can be performed with the AnA A2AS AnU QCPU A A Mode and A2USH board only 3 The A mark in the Subset column indicates that subset processing can be performed with the A3H AnA A2AS AnU QCPU A Mode and A2USH board only 2 INSTRUCTIONS MELSEC A b FIFO instructions Table 2 21 FIFO Instructions x Classi Instruction Symbol Contents of Processing tion 12 2 8 Applicable CPU Page fication 2 Symbol diti EZ 5 ition 5 o 25 D Pointer _ rrew s H 7 7 54 Write in Frene sn d 7 7 54 2 gt 22 P ter te FIFR FIFR D1 2 H Ju 7 7 54 D1 Read RM FIFRP FIFRP D1 D2 7 7 54 6 Buffer memory Access instructions Table 2 22 Buffer Memory Access Instruction Continue
466. ration in the changed circuit Before change X000 AOI X002 03 04 MPP is changed to NOP After change X001 Coding 0 gt 1 1 LD AND MPS AND OUT MRD AND OUT MPP AND OUT END Coding 0 LD AND MPS AND OUT MRD AND OUT NOP AND OUT END 2 If the number of MPP instructions is larger than that of MPS instructions this results in circuit plotting error and the PC cannot perform proper operation 5 11 5 SEQUENCE INSTRUCTIONS MELSEC A Program Examples 5 1 Program which uses MPS MRD and MPP X01C M8 Coding 04 1 YO30 0 LD X01C 5 2 AND 2 YO31 Hj 4 Senne y0 XO1D 4M9 M68 2 4 MPP 6 Yo32 gt 5 OUT 031 TO 6 LD X01D 5 YO33 Mo 3 7 MPS 8 AND Mg YO H 9 9 MPS 2 10 AND M68 ROVE MB M36 11 OUT 032 17 7035 H lt B 12 MPP M97 13 AND TO 8 Y036 H 14 OUT Y033 M98 gt 6 15 MPP 9 YO37 H 16 OUT Y034 17 LD X01E L yos H J 7 19 MPS 20 AND M96 21 OUT Y035 8 22 MRD 23 AND M97 24 OUT Y036 9 25 MRD 26 AND M98 27 OUT YO37 10 28 MPP 29 OUT Y038 30 END 5 12
467. ration result of a scan with that of the previous scan to allow correct output of the PLS instruction M9050 must therefore be turned ON when the CHG instruction is executed to save the operation result of the previous scan which has been stored in the operation result storage memory in the save area Since the CHG instruction for the ASCPU is executed only when input conditions are turned ON programs must be written in the forms shown below Main sequence program Always on M9036 M9050 MO MO MO _ CJ P1 MO M9051 M9057 CHG M9051 M9057 CHG MO M9051 LCJ 2 For A3N A73 and A3V CPUs P1 Sub sequence program Always on M9036 M9050 M1 M1 H M1 y CJ P1 M1 M9051 M9056 H CHG 4 M1 M9051 M9056 L CHG M1 M9051 _ Af _CJ FEND Since the CHG instruction for the A3NCPU is executed only when input conditions are turned ON programs must be written in the forms shown below MO MO MO CJ P1 MO M9051 M9057 CHG Mo M9051 M9057 CHG MO M9051 CJ PO FEND Main sequence program P1 M1 M1 H M1 CJ P1 H M1 M9051 M9056 y CHG M1 M9051 M9056 CHG H Mi M9051 FEND Sub sequence program 6 BASIC INSTRUCTIONS MELSEC A 3 For
468. re starting use 1 Gratis Warranty Term and Gratis Warranty Range If any faults or defects hereinafter Failure found to be the responsibility of Mitsubishi occurs during use of the product within the gratis warranty term the product shall be repaired at no cost via the dealer or Mitsubishi Service Company Note that if repairs are required at a site overseas on a detached island or remote place expenses to dispatch an engineer shall be charged for Gratis Warranty Term The gratis warranty term of the product shall be for one year after the date of purchase or delivery to a designated place Note that after manufacture and shipment from Mitsubishi the maximum distribution period shall be six 6 months and the longest gratis warranty term after manufacturing shall be eighteen 18 months The gratis warranty term of repair parts shall not exceed the gratis warranty term before repairs Gratis Warranty Range 1 The range shall be limited to normal use within the usage state usage methods and usage environment etc which follow the conditions and precautions etc given in the instruction manual user s manual and caution labels on the product 2 Even within the gratis warranty term repairs shall be charged for in the following cases 1 Failure occurring from inappropriate storage or handling carelessness or negligence by the user Failure caused by the user s hardware or software design 2 Failure caused by unapproved modifica
469. replace this value with the internal memory capacity to calculate the file register head address 8 15 8 MICROCOMPUTER MODE Device CPU Address Type Memory cassette When A3MCA 16 is used When A3NMCA 24 40 or 56 is used Block No Head address Block No Head address 11 380004 28 A0000 10 3C0004 27 4000 26 A8000H 25 ACOO0H 2 24 B0000H 2 51 23 B4000H pH 22 B8000 Extension A2N H file register A2N S1 21 BCO000H R A3N block 20 0000 10 to 28 A3M 19 C4000H A73 18 C8000H board 17 CCOO0H 16 00000 15 D4000H 14 D8000H 13 DCO000H 12 E4000H 11 E8000H 10 ECO000nH 8 16 9 ERROR CODE LIST MELSEC A 9 ERROR CODE LIST If an error occurred when the PC is in RUN mode error indication is given by self checking function and corresponding error code and error step are stored in special registers This section gives description of cause and corrective action for each case of error 9 1 Reading Error Codes If an error occurred corresponding error code can be read from the peripheral For details refer to the operation manual of the peripheral 9 2 Error Code List for the An AnN A3V A0J2H AnS A2C A73 A52G A1FX board Table 9 1 shows the error messages description and cause of error and corrective actions Error codes and e
470. ring data communication as a numeric value By monitoring the link special register any station number with an error or fault diagnosis can be read These special registers are applicable to all types of CPUs except the A3V For description of the special registers for link for the refer to the A3VTS Data Link System User s Manual 1 Link special registers only valid when the host station is the master station Table 1 5 Link special Register Number Description Stores the execution result of the LRDP word device read Normal instruction LRDP instruction LRDP instruction setting fault Faulty setting of the LRDP 7 Setting fault instruction constant source processing Corresponding station and or destination error i i ne of th ions is n cannot be Corresponding station error E Sad B s is not executed in the dg ae an corresponding station LRDP cannot be executed in the sta ion IS a corresponding station remote I O station Stores the execution result of the LWTP word device write instruction instruction setting fault Faulty setting of the LWTP instruction constant source and or destination Corresponding station error One of the stations is not communicating LWTP cannot be executed in the The specified station is corresponding station remote I O station Stores the present path status of the data link Data
471. riting to standard ROM is enabled Turns ON when DIP switch and M9073 are ON Turned on when there is an error in the contents of manual pulse generator axis setting Turned off if all axes are normal when the manual pulse generator enable flag is turned on APP 6 MELSEC A Applicable CPU Usable with and A2US H Dedicated to A2CCPUC24 PRF Dedicated to QCPU A A Mode Dedicated to A73 Dedicated to A2CCPUC24 PRF Dedicated to QCPU A A Mode Dedicated to A73 Dedicated to QCPU A A Mode Dedicated to A73 Dedicated to A2CCPUC24 PRF Dedicated to QCPU A A Mode Dedicated to A73 APPENDICES Table 1 1 Special Relay List Continue MELSEC A Applicable CPU Sequence accumulation OFF Time not elapsed time ON Time elapsed measurement Test mode OFF No error request error flag ON Error Servo program No data error setting error flag ON Data error OFF Number of remaining instructions executable simultaneously 1to 10 Number of remaining instructions executable simultaneously 0 BUSY flag for execution of CC Link dedicated instruction Compares the setting value at D9077 with the time elapsed from the start of measurement accumulation time at every scan Then performs the following operations Setting value Accumulation time Turns M9077 ON and clears the accumulation time Setting value Accumulation time Turns M
472. rned on when line check with I O modules and return disabled remote terminal modules is performed Usable with A2C Communication Turned off when communication with modules and A52G suspended at and remote terminal modules is per formed online error Line check M9068 mode Sets whether all outputs are turned off or retained at All outputs are communication error Output at line turned off OFF All outputs are turned off at Usable with A2C error Outputs are communication error and A52G retained 5 Outputs before communication error are retained APP 5 APPENDICES Time required for search of A8UPU A8PUJ Clock data set request Setting of writing to flash ROM PCPU ready complete flag Clock data error Request for writing to flash ROM Test mode flag Successful completion of writing to standard ROM External emergency stop input flag Clock data read request Status of writing to standard ROM Manual pulse generator axis setting error flag Table 1 1 OFF Reading time reduction OFF ON Reading time reduction ON OFF No processing Special Relay List Continue Turn on to reduce the search time of ASUPU A8PUJ In this case the scan time of the CPU module extends by 10 The clock data registered in D9073 to D9076 is written to the clock device after the execution of the ON Set request is made END instruction of the scan in which the s
473. rogram Operation Errors In the following cases operation error occurs and the PC stops its operation After the CALL P instruction is executed the FEND instruction has been executed before executing the RET instruction e After the FOR instruction is executed the FEND instruction has been executed before executing the NEXT instruction 5 SEQUENCE INSTRUCTIONS MELSEC A Program Example FEND 1 Program which uses the CJ instruction X000 0 YO20 X00B 2 CJ P23 H When XB is on jump is made to label P23 and execution is performed from the next step to P23 X013 6 Y030 H X014 Executed when XB is off 8 Y031 H 10 H the end of sequence program when XB is off P23 X001 022 H Coding LD X000 1 OUT Y020 2 LD X00B 3 P23 6 LD X013 7 OUT Y030 8 LD X014 9 OUT Y031 10 FEND 11 P23 12 LD X001 13 OUT Y022 14 END 5 SEQUENCE INSTRUCTIONS MELSEC A 5 6 2 Sequence program termination END All CPUs Available Device Carry flag Error flag Bit device Word 16 bit device Constant Pointer Level Digit specification Index S B F T CD W 0 1 2 V KK P 1 M9012 M9010 M9011 When the ladder is displayed END is omitted Functions 1 This instruction indicates the end of program At this step the
474. ror and Cause The same device number is used at two or more steps for the pointers P and interrupt pointers I used as labels to be specified at the head of jump destination Corrective Action Eliminate the same pointer numbers provided at the head of jump destination Label of the pointer P specified in the SCJ CALL CALLP LEDA B FCALL or LEDA B BREAK instruction is not provided before the END instruction Read the error step using a peripheral device check contents and insert a jump destination pointer P 1 The RET instruction was included in the program and executed though the CALL instruction was not given 2 The NEXT LEDA instructions were included in the program and executed though the FOR instruction was not given 3 Nesting level of the CALL CALLP and FOR instructions is 6 levels or deeper and the 6th level was executed 4 There is or NEXT instruction at execution of the CALL or instruction 1 Read the error step using a peripheral device check contents and correct program of the step 2 Reduce the number of nesting levels of the CALL CALLP FOR instructions to 5 or less and The CHG
475. ror occurs and the error flag turns on e is a negative value Program Examples BSFR Program which shifts the data of M668 to 676 to the right when X8F turns on K H Coding 0 BSFR M668 9 0 LD 1 BSFRP M668 K9 8 END Specification range of BSFRP instruction M678M677M67 6M675M67 4M673M672M671M670M669M668M667 Before execution 1 11111 1 1 CN x Carry flag 0 is entered Ae N M9012 After execution BSFL Program which shifts the outputs of Y60 to 6F to the left when X4 turns on X004 P K Coding _ BSFL YO60 16 H 0 LD X004 1 BSFLP Y060 16 8 END Y6FY6EY6DY6CY6BY6AY69Y68Y67Y66Y65Y64Y63Y62Y61Y60 Before execution s Carry d M9012 y y yy After execution t 01011 7 APPLICATION INSTRUCTIONS 7 3 3 n word data 1 word right shift left 2 board shift DSFR DSFRP DSFL DSFLP Bit device Word 16 bit device Constant Pointer Level MELSEC A AnU A2AS A0J2H A2USH S1 Available Device Carry flag Error flag L M9012 M9010 M9011 Digit specification Index
476. routine program termination seeeeeeeneenn nn 5 33 5 6 2 Sequence program termination 5 35 bif 5 37 5 7 1 Sequence program stop 4 5 37 54 2 operation NOB v Peel rto 5 39 BASIC INSTRUGTIONS 5 6 1 6 89 6 1 Comparison Operation Instructions eene nnne nes 6 2 6 1 1 16 bit data comparison lt gt gt lt lt eene nennen 6 4 6 1 2 32 bit data comparison D D lt gt D D lt D 6 6 6 2 Arithmetic Operation 1 4 ennt 6 8 6 2 1 BIN 16 bit addition subtraction P 6 10 6 2 2 BIN 32 bit addition subtraction D D P D 6 13 6 23 BIN 16 bit multiplication division P 6 16 6 2 4 BIN 32 bit multiplication division D D P D 6 19 6 25 BCD 4 digit addition subtraction B B P B 6 22 6 2 6 BCD 8 digit addition subtraction DB DB P DB 6 25 6 2 7 BCD 4 digit multiplication divi
477. rror steps are stored in the following special registers Error code D9008 Error step 09010 and 09011 Table 9 1 Error Code List for the An AnN A3H A3M A3V A0J2H AnS A2C A73 A52G A1FX and Error Message Error Code D9008 CPU States A3N board Error and Cause Corrective Action INSTRCT CODE ERR Checked at the execution of instruction 10 Stop Instruction code which cannot be decoded by CPU is included in the program 1 EP ROM or memory cassette which cannot be decoded has been loaded 2 Since the memory contents have changed for some reason instruction code which cannot be decoded has been included Read the error step by use of a peripheral equipment and correct the program at that step In the case of EP ROM or memory cassette rewrite the contents or replace with an EP ROM or memory cassette which stores correct contents PARAMETER ERROR Checked at power on STOP RUN and PAUSE RUN Capacity larger than the memory capacity of CPU module has been set with the peripheral equipment and then write to CPU module has been performed The contents of parameters of CPU memory have changed due to noise or the improper loading of memory RAM is not loaded to the A1 or A1NCPU 3 Check the memory capacity of CPU with the memory capacity set by peripheral equipment and re set incorrect area Check the loading of CPU memory and load it correctly
478. ruction CHK D1 02 detected error codes of high priority only are stored High P254 X Priority X005 X009 X01A ed as shown below X006 X002 Low Error check is performed in order of contact numbers If two or more errors are D1 D2 Error codes stored in 02 by the instruction vary with conditions establish P254 Xt XU XU XU XU XU I IE HET H dE Contact Contact Contact Contact Contact Contact No 1 No 50 No 51 N No 150 Condition established Condition Nos 1 to 50 o 100 No 101 Condition Nos 51 to 100 CHK D1 H Condition Nos 101 to 150 Condition No 1 data of error code No 1 100 2x contact No 1 400 2x contact No 1 700 2x contact No 1 Condition No 2 data of error code No 101 2x contact No 1 401 2x contact No 1 701 2x contact No 1 Condition No 3 data of error code No 200 2x contact No 1 500 2x contact No 1 800 2x contact 1 Condition No 4 data of error code No 201 2x contact No 1 501 2x contact No 1 801 2x contact No 1 Condition No 5 data of error code No 301 2x contact No 1 601 2x contact No 1 901 2x contact No 1 Condition No 6 data of error code No 300 2x contact No 1 600 2x contact No 1 900 2x conta
479. ruction by the CJ SCJ or JMP instruction 2 The subroutine program or interrupt program located below the END instruction has been executed 5 SEQUENCE INSTRUCTIONS MELSEC A 5 7 Other Instructions CPUs 571 Sequence program stop STOP Available Device Bit device Word 16 bit device Constant Pointer Level Digit specification M L S D W 1 K H P 1 M9012 M9010 M9011 ae Stop input Functions 1 When the stop input turns on resets the outputs Y and stops the operation of PC The same function as when the RUN key switch is moved to the STOP position 2 When the STOP instruction is executed B8 of the special register D9015 is set to 1 b15 014 013012 011010 9 b8 29015 0 0 0 0 0 1 3 To resume the operation of PC after the execution of STOP instruction move the RUN key switch from the RUN to the STOP position and then move it to the RUN position again Setto 1 4 Even if the RESET switch is moved to the LATCH CLEAR position when the STOP instruction has been executed latch clear is not executed To execute the latch clear move the RUN key switch to the STOP position and then move the RESET switch to the LATCH CLEAR position b Do not provide the STOP instruction in the interrupt progra
480. ructions 000 0 eee eee eeee ee ee teen eter ee 7 58 7 6 1 Special function module 1 2 word data read FROM FROMP DFRO DFROP 7 59 7 6 2 Special function module 1 2 word data write TOP 7 61 7 6 3 Remote terminal module 1 and 2 word data read FROM PRC FROMP DFRO PRC DFROP PRO 7 63 7 6 4 Remote terminal module 1 and 2 word data write PRC TOP PRC PRC 7 67 7 6 5 Special module special block 1 2 word data read FROM FROMP DFRO DFROP nennen nnne nennen snnt nnns 7 71 7 6 6 Special module special block 1 2 word data write TO 7 74 7 7 FOR to NEXT Instructions nennen nnne nan 7 77 771 FOR to NEXT FOR enne 7 77 7 8 Local Remote Station Access Instructions nenn 7 79 7 8 1 Local station data read write LRDP LWTP 7 80 7 8 2 Remote I O station data read Write RFRP RTOP 7 86 79 Display Instructions oreet iere
481. ructions in creating a circuit containing the CHK instruction 1 Contact numbers X of the forward stroke end sensor and the backward stroke end sensor must be continuous Contact number of the forward stroke end sensor X _ must be lower than that of the backward stroke end sensor 2 The internal relay of which number is same as the contact number X of forward stroke end sensors must be controlled as follows In forward run Turn it ON In backward run Turn it OFF 7 112 7 APPLICATION INSTRUCTIONS MELSEC A 2 The CHK instruction executes processing equivalent to the circuit shown below with one specified contact E CJ PO Peri ie CHK MO DO Both of the forward stroke end and backward stroke end sensors are actuated in forward run XO Max 150 contact points Condition 1 SET MO Errorcode1 DO Both of the forward stroke end and backward stroke end sensors are actuated in forward run XO Condition 2 E E Xt SET MO MOV Error code 2 DO Backward run when the forward stroke end sensor is actuated YO gt Condition 3 SET MO Example Processing is perfomed 3s S Error code 3 DO ET SAt and Yr e YO Forward run when the backward stroke end sensor is actuated Condition 4 SET MO Error code 4 DO
482. ruption program Objective interrupt is 10 to 15 112 113 and 129 to 131 7 APPLICATION INSTRUCTIONS 7 6 6 Special module special block 1 2 word data write TO TOP DTO DTOP MELSEC A AnU A2AS A2USH S1 A2USH board A0J2H QCPU A A Mode X Remark Available Device gt gt oo 2ix sS ES Bit device Word 16 bit device Constant Pointer Level 3 3 2 L 5 B F T D 0 1 2 V K H P 1 N 5 M9012 M9010 M9011 ni 2 5 n3 K1 to when the TO P instruction is used K1 to K8 when the DTO P instruction is used The constant setting range of S is HO to FFFF and k 32765 to 32767 Write commands T4 T ETS TS Function m Tw T8 T9 TO Indicates the instruction symbol TO DTO Setting data Sets the position of the special module or the special block counted from the A1FXCPU 0 to 7 The head address of the special module or the special block where the data is read The device number of the A1FXCPU where the read data is stored Number of data to be read Writes the n3 point data from the device number specified by S to the buffer memory addresses beginning with t
483. s A2USH S1 A2AS 51 A2USH A2C A52G A0J2H A1FX Instruction Condition board Refresh Refresh Refresh Refresh Refresh Refresh Mode Mode Mode Mode Mode Other X Y Mode than X Y WAND SD 2 8 1 29 74 60 74 73 90 11 5 WANDP SD 2 8 1 29 74 60 74 73 90 11 5 DAND 13 5 75 174 140 174 173 300 27 1 DANDP 13 5 75 174 140 174 173 300 27 1 WAND 1 S2D 7 6 3 47 119 96 119 120 190 19 3 WANDP S1 S2D 7 6 3 47 119 96 119 120 190 19 3 WORSD 2 8 1 29 76 61 76 75 90 11 1 WORP SD 2 8 1 29 76 61 76 75 90 11 1 DOR 13 5 74 174 140 174 173 300 27 3 DORP 13 5 74 174 140 174 173 300 27 8 WOR S1 S2D 7 6 3 47 121 97 121 120 190 19 3 SORP 51 S2D 7 6 3 47 121 97 121 120 190 19 3 WXORSD 2 8 1 29 74 60 74 73 90 11 5 WXORP SD 2 8 1 29 74 60 74 73 90 11 5 DXOR 13 5 74 174 140 174 173 300 27 1 DXORP WXOR S1 S2D WXORP 1 S2D WXNR SD WXNRP D DXNR DXNRP WXNR 1 S2D WXNRP S1 S2D NEG NEGP RORn RORP n RCRn RCRP n APP 57 APPENDICES MELSEC A Table 2 3 Instruction Processing Time of Small Size Compact CPUs Processing Time us AnS A1SJH A1SH A2SH S1 Instruction Condition Direct Mode Refresh Refresh Direct Refresh Direct Mode yd em X Y Mode Mode Mode Mode ROLn n 3 54 53 53 13 2
484. s from the peripheral device according to the loading status of special function modules There are 9 or more special function modules except the interrupt module which can execute interruption to the CPU module loaded There are 2 or more data link modules loaded Reduce the special function modules except the interrupt module which can execute interrupt start to 8 or less Reduce the data link modules to 1 or less There are 7 or more modules such as a computer link module loaded to one CPU module Reduce the computer link modules to 6 or less There are 2 or more interrupt modules loaded Reduce the interrupt modules to 1 Modules assigned by parameters for MNT MINI automatic refresh from the peripheral device do not conform with the types of station modules actually linked Perform again module assignment for MNT MINI automatic refresh with parameters according to actually linked station modules The number of modules of I O assignment registration number of loaded modules per one CPU module for the special function modules which can use dedicated instructions is larger than the specified limit Total of the number of computers shown below is larger than 1344 A18J71C24 R2 PRF R4 x 10 A1SJ71UC24 x 10 A1SJ71PT32 S3 x 125 A1SJ71PT32 S3 x 125 Total gt 1344 Reduce the number of loaded special function modules Available when the extension mode is used
485. s given Converts the comment in the Specified device into ASCII code PRC PRC and outputs to the output module 71 A Not applicable to A2C and A52G 7 94 The comment in device 1 may be output Display Applicable to A8 A3N A3M LED LED S 16 charact4 A4U A73 A3V and 7 100 board Iph i Appli A3H A3M LEDA EEDA eer Indicates the specified alpha 13 di d AN od 7 103 Display numeric characters on the display LEDA First 8 characters ER Alphanumeri LEDB h Applicable to _ LEDB LEDB 8 5 13 T A73 A3V and A3N board 7 103 Applicable to LEDC 1 0 5 Displays the comment in 3e A3U 40 A73 7 100 device S board pid LEDR LEDR Reset the display indication 1 O 7 105 10 Other instructions Table 2 26 Other Instructions Execu x S Classi Instruction i 52 o 0 fication 5 Symbol Symbol Contents of Processing y 2 5 Applicable CPU Page on o 25 WDT wor 1 7 108 WDT WDT is reset in sequence
486. s given in the program Upon occurrence of error the problem pointer I number is stored at D9011 Monitor special register D9011 using a peripheral device and check if the interrupt program that corresponds to the stored data is provided or if two or more interrupt pointers 1 of the same number are given Make necessary corrections CASSETTE ERROR 1 A memory card is inserted or removed while the CPU module is ON 2 An invalid memory card is inserted 1 Do not insert or remove a memory card while the CPU module is ON 2 Insert an available memory card MELSEC A 9 ERROR CODE LIST Error Massage Table 9 5 Error Code List for the QCPU A A Mode Continue Error Code D9008 Detailed Error Code D9091 CPU States Error and Cause Corrective Action MELSEC A RAM ERROR 20 201 STOP The sequence program storage RAM Since this is CPU hardware error Checked at in the CPU module caused an error consult Mitsubishi representative power on 202 The work area RAM in the CPU module caused an error 203 The device memory in the CPU module caused an error 204 The address RAM in the CPU module caused an error OPE CIRCUIT 21 211 STOP The operation circuit for index Since this is CPU hardware error ERROR qualification in the CPU does not work consult Mitsubishi repr
487. s to T C the present value count value is shifted The shift of set value cannot be performed 1 2 gt Execution Conditions Shift commands OFF a Executed Executed per scan per scan lt gt J Executed Executed only once only once 1 3 Operation Error In the following case n is a negative value operation error occurs nd the error flag turns on 4 INSTRUCTION FORMAT MELSEC A 1 4 p Program Examples DSFR Program which shifts the contents of D683 to 689 to the right when XB turns on Coding 0 LD XB 0 osrrp 0683 Kr 1 DSFRP D683 K7 8 END Specification range of DSFRP instructingst ruct ion D684 683 Before execution 32765 5003 After execution DSFL Program which shifts the contents of D683 to 689 to the left when XB turns on Coding 0 LD XB D683 1 DSFLP 0683 7 8 END Before execution After execution 4 INSTRUCTION FORMAT MELSEC A Explanations 1 Indicates section number and title and symbol of instruction 2 Indicates usable CPUs Usable Usable with some CPUs or needs special operations for use X Unusable If the instruction is usable with all types of CPUs it is indicated as follows Applicable CPU CPUs 3 Describes details of 2
488. scan returns to step 0 Sequence program END 2 The END instruction cannot be used midway through the sequence program or subsequence program If END processing is necessary halfway through the program use the FEND instruction 3 When a program is written in the ladder mode of GPP it is not necessary to input the END instruction It is input automatically by performing conversion 5 SEQUENCE INSTRUCTIONS MELSEC A 4 Use the END and FEND instructions in the main routine program subroutine program interrupt program and subsequence program as shown below Main routine program FEND D FEND instruction is always required Subroutine program Main sequence program area Interrupt program END gt END instruction is always required Main routine program FEND gt FEND instruction is always required Subroutine program Subsequence program area Interrupt program END E gt END instruction is always required Fig 5 1 Use of the END FEND Instructions 5 If the END instruction is not given in the program operation error occurs and the PC does not run If parameters are used to set subprogram capacity operation error occurs when the END instruction is not given in the subprogram Operation Errors In the following cases operation error occurs and the PC stops its operation 1 Jump has been made to a step below the END inst
489. set reset STC nennen 7 121 7 10 6 Pulse regeneration instruction DUTY ssessseeeem ene 7 123 7 11 Servo Program Instructions 7 125 7 11 1 Servo program start 7 126 7 11 2 Present position data and speed change instruction DSFLP 7 130 8 MICROCOMPUTER e de 8 1 8 16 8 1 Specifications of Microcomputer 8 1 8 2 Using Utility Program ener ener rennen nnne nnns 8 2 8 3 Using User Written Microcomputer Programs sseeeeene nennen nen 8 4 8 321 Memory Ea cua p eua E 8 6 8 3 2 Data memory area address configuration sse 8 6 8 3 3 Differences in operations called by microcomputer instructions according to CPU 8 7 8 3 4 Configuration of data memory sse 8 8 9 ERROR CODE e iecore esee terrent 9 1 9 41 9 1 Reading Error Codes aan ine niin id eee p ia il eo ater eun EE aie 9 1 9 2 Error Code List for the An AnN 2 AnS A2C A73 A52G A1FX and
490. sing a ERROR executed by remote terminal peripheral device and correct the Checked at modules connected to the program meeting loaded execution of MNET MINI S3 was executed to conditions of remote terminal instruction the modules modules Though there are 32 entries of Use special register D9081 FROM instructions number of empty entries in registered with a PRC mailbox or special relay M9081 instruction in the mailbox BUSY signal of mail box to memory area waiting for suppress registration or execution execution another of the PRC instruction PRC instruction is executed to Correct the program specified by cause an overflow in the mail box the ZCHG instruction to other memory area waiting for Set the number of CC Link execution dedicated commands executed in The PIDCONT instruction was one scan to 10 or less executed without executing the PIDINIT instruction The PID57 instruction was executed without executing the PIDINIT or PIDCONT instruction The program presently executed was specified by the instruction The number of CC Link dedicated command executed in one scan exceeded 10 MAIN CPU The CPU malfunctioned due to Take proper countermeasures for DOWN noise noise Hardware failure Hardware failure Failure in the power module Replace the power module CPU CPU mo
491. sion B B P B 6 28 6 2 8 BCD 8 digit multiplication division DB DB P DB 6 31 6 2 9 16 bit BIN data increment decrement INC INCP DEC 6 34 6 2 10 32 bit BIN data increment decrement DINC DINCP DDEC 6 36 6 3 BCD o BIN Conversion Instructions ssesssssssssssseseseeeeee eene nnne en 6 38 6 3 1 BIN data gt BCD 4 8 digit conversion BCD BCDP DBCD DBCDP 6 39 6 3 2 BCD 4 8 digit BIN data conversion BIN BINP DBIN DBINP 6 42 6 4 Data Transfer amp nennen enne nnne nnne nnne 6 46 6 4 1 16 32 bit data transfer MOV MOVP DMOV DMOWP 6 47 6 4 2 16 32 bit data negation transfer CML DCML 6 49 6 4 3 16 bit data block transfer BMOV FMOV 6 52 6 4 4 16 32 bit data exchange XCHP DXCH DXCHP 6 56 6 5 Program Branch nstr ctions nee tea e Re Eh EE N Penta 6 58 6 5 1 Conditional jump unconditional jump CJ SCJ 6 58 6 5 2 Subrou
492. ssion A2SH S1 Input X XIM V X A1FX rane 8200H Odd address Even address 15 to YO to FF At SJ S3 823FH IMO So eE eRe ley pese bee id m E ex b8 57 b5 b4 62 bl A2 8200H y7 Y6 y5 YA y3 y2 Y1 A2N 8202 YF YE YD yc YA Y9 v8 A2C 8000H A52G to YO to 1 8204H yi7 vi6 vis vi4 y13 v12 vi1 10 A0J2H 827 A1S S1 25 Output A2 S1 8200 Used for storing operation Y A2N S1 to YO to 3FF result of PC and allows A2S S1 82FFH read write Stored data area as follows 0 1 am 1 73 board 8200 to V0 to 7FF Write gt Output module A1SH 83FFH Read 1 4 Direct mode A1SJH ___ Refresh mode A2SH Output memory A2SH S1 Output refresh after END A1FX instruction is executed 8 MICROCOMPUTER MODE MELSEC A REMARK Communication of input output information with an input output module is executed only in the address range indicated below X Y20 to FF A1SH A1SJH to FF A2SH X YO to 1FF A2SH S1 X YO to 8 MICROCOMPUTER MODE Address MELSEC A Configuration Internal relay M Latch relay L Step relay S Link relay B Annunci ator F Special relay M Contact of timer Contact of counter C Coil of timer T Coil of counter C A1 A2 2 51 A1N A2N A2NS1 A3N
493. struction Symbol MELSEC A Ref Page 7 APPLICATION INSTRUCTIONS MELSEC A 7 3 1 16 bit data n bit right shift left shift SFR SFRP SFL SFLP Applicable CPU CPUs Available Device gt g 5 oo 3 5 Bit device Word 16 bit device Constant Pointer Level 8 3 9 u 2 9012 M9010 9011 0 ES ojo n 1 Indicates the instruction symbol SFR SFL Setting data Head number of device which stores data to be shifted Number of shifts Functions SFR E Di cq AP ILIA Before execution D L Carry M DEM SESS flag ax he c M9012 a 7 After execution D 0 to 0 gt 015 entered 2 n bits which begin with the highest bit change to 0 3 For T C the present value count value is shifted The shift of set value cannot be performed SFL 1 Shifts the 16 bit data of device specified at D to the left by n bits 2 n bits which begin with the lowest bit change to 0 16 bits me gt n bits Before execution a Pd bit Carry
494. struction ondition Device QnCPU A QnHCPU A 0 561 0 242 At execution 0 561 0 242 At execution MPS ba a O O 1 75 0 755 0 079 0 034 0 079 0 034 ___ 00 0 084 Without index qualification 2 72 1 17 Without index qualification With index qualification 147 2 72 1 17 6 81 2 93 e s index qualification With index qualification With index qualification Without index qualification CALLP TES ET With index qualification ET 6 81 2 93 2 93 2 79 1 20 054 1 27 0 548 IRET 0586 pei Without index gualificanon e APP 81 E ir Ben ERN ln 2 31 3 19 APPENDICES MELSEC A 2 Basic instructions Table 2 8 Instruction Processing Time of QCPU A A Mode Instruction Time us Instruction Condition Device QnCPUA A QnHCPU A 0 546 APP 82 APPENDICES MELSEC A Table 2 8 Instruction Processing Time of QCPU A A Mode Continue Instruction Condition Device QnCPUA A QnHCPU A B P 51 20 ma ss pesis2D 832 APP 83 APPENDICES MELSEC A Table 2 8 Instruction Processing Time of QCPU A A Mode Continue Instruction Processing Time us Instruction Condition Device QnCPU A QnHCPU A Beso _ 247 107 __ Beso Joo noto 3 DB SD _ O 127 548 i DBeP
495. t 52 1 52 ANDD E UE SES Non continuity when S1 1 S1 5 lt 52 1 52 32bit ORD gt gt s 52 le 6 6 data 5 com g parison LDD lt LDD lt s s2 6 6 Continuity when S141 S1 zl i EXE lt 821 52 ANDDSS 2 SIRE Non continuity when S1 1 51 1 oe gt 52 1 52 ORD ORD s 52 _ 6 6 LDD LDD s 22 1 e 6 6 Continuity when S141 S1 i zt lt 8241 52 ANDDs BNDODS 55 152 Non continuity when 51 1 51 6 6 gt 52 1 52 ORD lt ORD lt 51 52 Es 1 e 6 6 LDD LDD gt 51 52 1 e 6 6 Continuity when S141 S1 H reos en gt S241 S2 ADDS ud Non continuity when 51 1 S1 1 e 69 lt S21 52 ORD Lj gt 51 52 2 1 e 6 6 2 3 For the number of steps when extension devices are used or when index qualification is performed to bit devices for AnA A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 1 The A mark in the Index column indicates that index qualification can be performed with the AnA A2AS AnU QCPU A A Mode and A2USH board only The A mark in the Subset column indicates that subset processing can be performed with the A3H AnA A2AS AnU QCPU A A Mode and A2USH board only 2 INSTRUCTIONS 2 Arithmetic operation instruction Table 2 11 Arithmetic Operation Instruction Continue ME
496. t S to the output module specified at D e Outputs an ASCII code from the device specified at S to code to the output module specified at D Note that the second function cannot be used with the An and These functions can be switched by ON OFF setting of M9049 CPUs other than An and A3V An A3V M9049 ON M9049 OFF Output of 16 characters X Output to 00H code X X 7 APPLICATION INSTRUCTIONS MELSEC A 1 ASCII code output of 16 characters 1 The number of points used for the output module is 10 points which start at the Y number specified at D Device which store ASCII code Upper 8 bits 6 Lower 8 bits Output Y Head of output D ASCII code output gt Printer or IP indicator Strobe signal output Sequence program S PR instruction execution flag used for interlocking 2 The output signal from the output module is sent at 30ms per character Therefore 480ms 16x30ms is required until 16 characters are sent However since the control during sending is performed by the interrupt processing at intervals of 10ms the sequence processing is performed continuously 10 points beginning with the Y number specified in D are provided to the output unit during sequence processing irrespective of I O refresh after END
497. t Value Device 2 2 Set value 1 Index qualification can be used AnA A2AS AnU QCPU A A Mode and A2USH board only ers are used with the AnA A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 3 2 If extension timers or coun OUT Y M L S B 0 Functions OUT Y M L Device number K50 lt Set value 1 to 32767 are valid Device number TO to 255 Set value Content of data resister 1 to 32767 are valid Device number TO to 255 504 Set value 1to 32767 are valid F 1 Device number CO to 255 lt Set value Content of data resister 1 to 32767 are valid Device number CO to 255 1 This instruction outputs the operation result for the elements pereceding the OUT instruction OUT Instruction Operation Contact Result Coil NO contact NC contact OFF OFF Non continuity Continuity ON ON Continuity Non continuity 5 14 5 SEQUENCE INSTRUCTIONS MELSEC A 1 When F annunciator is turned ON LED indicators and ERROR LEDs on the CPU module illuminate and the number of annunciator which is turned ON is stored in special registers For details refer to the ACPU Programming Manual Fundamentals If the OUT instruction is used to turn ON the annunciator annunciator coil status does not correspond to the display of L
498. t is a hardware error of special function module CPU module or base module replace and check defective module s Consult Mitsubishi representative for defective modules MELSEC A 9 ERROR CODE LIST Error Massage SP UNIT DOWN MELSEC A Table 9 3 Error Code List for ANACPU and Board Continue Error Code D9008 Detailed Error Code D9091 CPU States Error and Cause Though an access was made to a special function module at execution of the FROM TO instruction no response is received If parameter I O assignment is being executed no response is received from a special function module at initial communication At error occurrence the head I O number upper 2 digits of 3 digits of the special function module that caused error is stored at D9011 Corrective Action Since it is hardware error of the special function module to which an access was made consult Mitsubishi representative LINK UNIT ERROR 1 Either data link module is loaded to the master station 2 There are 2 link modules which are set to the master station station 0 1 Remove data link module from the master station 2 Reduce the number of master stations to 1 Reduce the link modules to 1 when the 3 tier system is not used I O INT ERROR SP UNIT LAY ERR 44 441 442 443 444 445 446 447 STOP Though the interrupt module
499. t of D8 and transfers the result to M16 to 31 when X1B turns on e Coding X01B P K4 LD X01B 0 B D3 D8 M16 1 B P D3 D8 K4M16 10 END 6 BASIC INSTRUCTIONS MELSEC A 6 2 6 BCD 8 digit addition subtraction DB P DB DB P Applicable All CPUs CPU Available Device gt S oo eix iss E Bit device Word 16 bit device Constant Pointer Level 8 E 9 2 X Y ML S B F T C D WR 1 2 1 N 5 M9012 M9010 M9011 S 0 ojo D 0 K1 Indicates the instruction symbol DB DB Setting data Addend subtrahend or head device number stor ing addend subtrahend Head device number storing augend minuend Addition subtraction commands Augend minuend or head device number storing au 82 D1 gend minuend Addend subtrahend or head device number stor ing addend subtrahend 2 1 390977 Head device number which will store the opera tion result Function 1 Performs the addition of BCD data specified at D and the BCD data specified at S and stores the addition result into the device specified at D D 1 D 5 1 5 D 1 D
500. t or 32 bit instructions may be selected 3 2 1 1 bit processing When the sequence instruction is used more than one bit one point cannot be specified for the bit device Example LD X0 OUT Y20 3 2 2 Digit specification processing When the basic and application instructions are used the number of digits may need to be specified for the bit device Up to 16 points can be specified in 4 point increments when a 16 bit instruction is used and up to 32 points can be specified when a 32 bit instruction is used 1 16 bit instruction K1 to 4 4 to 16 points Example Setting range by the digit specification of 16 bit data XO to F Specification range of K1 4 points Specification range of K2 8 points Specification range of K3 12 points Specification range of K4 16 points a Fig 3 1 Digit Specification Range of 16 Bit Instruction a When there is digit specification on the source S side the range of numeric values handled as source data are as shown in Table 3 1 Table 3 1 List of Digit Specification and Numeric Values Specified Number of Digits 16 Bit Instruction K1 4 points 01015 K2 8 points 0 to 255 K3 12 points 0 to 4095 K4 16 points 32768 to 32767 Ladder Example Processing 16 bit instruction X010 P Ki Change to 0 X000 DO b4 23 b2 1 b0 So
501. t the LED indicator by LEDB instruction The latter half 8 characters are blanked LEDB Blank 4 N 6 The following items can be displayed by the display instructions on the LED display on the front panel of the CPU module Numeral 0 to 9 e Alphabet A to Z Capitals e Special Symbol lt gt 7 APPLICATION INSTRUCTIONS MELSEC A AnU A2AS 7 9 1 ASCII code print instructions EN OR PR PRC A Mode X Remark With a PR instruction only output of 16 characters the ASCII code is possible Available Device gt z E Bit device Word 16 bit device Constant Pointer Level 5 Xx Y IM L 5 B F T D 1 2 V K H P 1 N 5 M9012 M9010 M9011 S O O PR o D Indicates the instruction symbol Setting data Head number of device which stores ASCII code Head number of output unit which outputs ASCII code Device number which prints comment Head number of output unit which outputs comment Functions PR The PR instruction has the following two functions Outputs an ASCII code of 16 characters stored in units of eight points beginning with the device specified a
502. ta orior than Usable with all special relays and special registers in remote run clear fla ON Output clear t f CPUs 9 P mode from computer etc when M9017 is on ii sind 2 Data link monitor OFF F link Specifies the lines to be monitored for link Dedicated to A3V M9018 switching ON R link monitoring User timing clock M9020 No 0 9 Relay that repeats on off at intervals of E predetermined scan User timing clock M9021 When power is turned on or reset is per formed the 1 n2 n2 Scan scan clock starts with off User timing cl ck Set the intervals of on off by DUTY instruction pects wilt No 2 types of CPUs User mi scan ser timing 9023 tin co M9024 User timing clock No 4 Writes clock data from D9025 D9028 to the clock 2 Clock data OFF No processing element after the instruction is executed Unusable with An A3H A3M A3V 2 and A0J2H M9025 ON Setrequested during the scan in which M9025 has changed from off to on Unusable with An OFF Switched on by clock D902 D902 i M9026 Clock data error o error witched on by clock data D9025 to D9028 error A3H A3M A3V ON Error and switched off without an error 2 and A0J2H Usable with A3N M9027 Clock data OFF No processing Clock data such as month day hour minute and A3A A3U A4U display ON Display minute are
503. tartup execution instruction is used in a FOR NEXT When a device which functions as a conditions for execution of the PLS instruction Startup execution command starts up the PLS command Startup execution instruction is executed 3 18 3 INSTRUCTION STRUCTURE FOR instruction M1Z SET F1Z MELSEC A 12 Device No ON OFF state Execution condition 1 Execution no execution state Device No ON OFF state 1st M1 ON 2 2 F1 2 2 M2 ON ON gt ON not established No execution F2 3rd not established No execution F3 4th M4 REMARKS 1 1 OFF ON established Execution F4 present states and that of one scan before previous time Present device M1 M2 4 M4 M1 M2 Device of one scan before previous time 2 2 Varies according to the M4 ON OFF state of one scan before Execution no execution is determined by comparing the device states between the SET F1Z F1Z M4 state of one Oni scan before xecution Device No ON OFF state condition execution state OFF ON established Execution ON ON not established No execution OFF 3 3 Device state changes in the order of M1 M2 and in 4 scans and returns to M1 in the 5th scan 3 19
504. tate of OFF Disables writing to ROM ON Enables writing to ROM OFF PCPU ready incomplete ON PCPU ready complete OFF No error ON Error occurred OFF ON Starts writing to ROM OFF Other than test mode Test mode Failed writing to ROM Successfully completed writing to ROM M9073 changes from OFF to ON Turned on to enable writing to the flash ROM DIP switch 3 should be set to ON Set if the motor is not running when it is checked at PC ready M2000 on Turned off when M2000 is turned off This goes ON when a clock data D9073 to D9076 error occurs This remains OFF when there is no error When turned from OFF to ON writing to the standard ROM is started Turned ON when a test mode request is made from a peripheral device Reset when test mode is finished Turned on when writing to the standard ROM is successfully completed This status is stored in D9075 External emergency Turned off when the external emergency stop input stop input is on connected to the EMG terminal of A70SF is turned External emergency on Turned on when the external emergency stop stop input is off No procesing Read request is made Writing to ROM disabled Writing to ROM enabled OFF All axes normal ON Error axis detected input is turned off When M9076 is ON clock data is read out to D9073 to D9076 in BCD values Turns ON when w
505. ted as operation error When error occurred in the result of index qualification data of the devices other than specified change Exercise great care in writing programs which contain index qualification 3 17 3 INSTRUCTION STRUCTURE MELSEC A 2 Turn on off instruction operations at index qualification When the turn on off instructions PLS PLF 1 are designated with index qualification when an AnA A2AS AnU QCPU A A Mode or A2USH board is used the instructions are executed only when the execution condition for the turn on off execution instruction is established Example 1 When M1 M2 and M4 are ON and M3 is OFF in the circuit shown below SET F1Z INC Z M1Z SET F1Z F1Z Number of scans Device No ON OFF state Execution Execution no Device ON OFF state condition 1 execution state 1st scan M1 ON 2 2 F1 ON gt 2nd scan M2 ON not established No execution F2 ON OFF not established OFF 5 established 3rd scan M3 No execution 4th scan Execution Example 2 1Z goes On when M1Z goes On Operation in the case where M1 M2 and are On and is Off in the circuit in the following figure RSTZ Z is cleared 2 FOR K4 Execution no execution of 1 2 SET F1Z INC Z 2 1 is executed NEXT Cautions when a PLS instruction with Index S
506. the CHG instruction circuit block 1 B IX and LEDA B 1 instructions are not paired 2 There are 33 or more sets of LEDA IX and LEDA B IXEND instructions 1 Read the error step using a peripheral device check contents and correct program of the step 2 Reduce the number of sets of LEDA B IX and LEDA B IXEND instructions to 32 or less 9 ERROR CODE LIST Table 9 5 Error Code List for the QCPU A A Mode Continue Detailed Error Code D9091 Error Code D9008 Error Massage CHK FORMAT ERR Checked at STOP PAUSE RUN CPU States Error and Cause Instructions including NOP other than LDX LDIX and are included in the CHK instruction circuit block Multiple CHK instructions are given The number of contact points in the CHK instruction circuit block exceeds 150 The CHK instructions are not paired with the CHKEND instructions or 2 or more pairs of them are given Format of the block shown below which is provided before the CHK instruction circuit block is not as specified P2544 H H HCHK D1 D2 Device number of D1 in the
507. the data of DO and 1when turns on X000 P Coding 0 DINC DO 0 LD X000 1 DINCP 00 4 END 2 Program which adds 1 to the data of X10 to 27 and stores the result to D3 and 4 when turns on X000 P K6 Coding 0 L 7L DMOV X010 0 LD X000 P 1 DMOVP K6X010 D3 D3 7 DINCP D3 11 END DDEC 1 Program which subtracts 1 from the data of DO and 1 when turns on X000 P Coding 04 DDEC 00 0 LD X000 1 DDECP 00 4 END 2 Program which subtracts 1 from the data of X10 to 27 and stores the result to 03 and 4 when turns X000 P K6 Coding 0 1DMOV X010 03 0 LD X000 P 1 DMOVP K6X010 D3 L DDEC D3 7 8 DDECP D3 11 END 6 BASIC INSTRUCTIONS MELSEC A 6 3 BCD BIN Conversion Instructions The BCD lt gt BIN conversion instructions are instructions which convert BCD data to BIN data and BCD data Classification sr Ref Page Classification instruction Ref Page symbol BCD 6 39 BIN 6 42 BCDP 6 39 BINP 6 42 DBCD 6 39 DBCDP 6 39 Numeric values usable for the BCD lt gt BIN conversion instructions are as follows BCD BCDP BIN BINP 0 to 9999 DBCD DBCDP DBIN DBINP 0 to 99999999 6 BASIC INSTRUCTIONS MELSEC A 6 3 1 BIN data BCD 4 8 digit conversion Applicable All CPUs BCD BCDP DBCD DB
508. the error flag turns on e n is a negative value Program Examples DSFR Program which shifts the contents of D683 to 689 to the right when XB turns on Coding K oH DSFR 0683 7 0 SED X00B 1 DSFRP D683 K7 8 END Specification range of DSFRP instruction D689 D688 D687 D686 D685 D684 D683 Before execution 100 503 600 336 3802 3276 5003 100 503 600 336 3802 32765 After execution DSFL Program which shifts the contents of D683 to 689 to the left when XB turns on X00B P K Coding 0 DSFL D683 7 H LD X00B 1 DSFLP D683 K7 8 END Specification range of DSFRP instruction D689 D688 D687 D686 D685 D684 D683 Before execution 100 336 3802 3276 5003 0 y After execution 32765 5003 0 7 APPLICATION INSTRUCTIONS MELSEC A 7 4 Data Processing Instructions The data processing instructions perform operations such as the search decode and encode of data Classification Instruction Symbol Ref Page SER 7 38 Search SERP 7 38 SUM 7 40 SUMP 7 40 Bit check DSUM 7 40 DSUMP 7 40 DECO 7 42 Decode DECOP 7 42 Encode ENCO 7 42 ENCOP 7 42 7 segment decode SEG 7 44 BSET 7 46 Bit BSETP 7 46 set reset BRST 7 46 BRSTP 7 46 DIS 7 48 16 bit data DISP 7 48 association dissociation UNI 7
509. tine call return CALL CALLP 6 62 6 5 3 Interrupt enable disable return El DI 6 64 6 5 4 Microcomputer program call SUB SUBP sssssssse eee 6 67 6 6 Program Switching Instructions sess nnne nennen nnn enne 6 69 6 6 1 Main lt gt subprogram switching sse 6 69 0 7 Link sRetreshINStruCtOns ss trie 6 82 6 7 1 Link refresh aa aa oaae ae aaan aadal en ensis trt 6 82 6 7 2 Link refresh enable disable El DI 6 84 6 7 9 Partialirefresh SEQ c run itte echt e rte ede PUER 6 87 APPLICATION esee nennen nnn natn nan tn nass tasa tn nasa 7 1 7 133 7 1 Logical Operation 1 nennt 7 2 7 1 1 16 32 bit data logical product WAND WANDP DAND 7 3 7 1 2 16 32 bit data logical add WOR WORP DOR DORP 7 7 7 1 3 16 32 bit data exclusive logical add WXOR WXORP DXOR 7 11 7 1 4 16 32 bit data NOT exclusive logical add WXNR WXNRP DXNR DXNRP 7 15 715 BIN 16 bit data 2 s complement NEG
510. ting command for the dedicated instructions for the AnA A2AS AnSH AnU QCPU A A Mode and A2USH board For details refer to the AnSHCPU AnACPU AnUCPU Programming Manual Dedicated Instructions Available Device Bit device Word 16 bit device Constant Pointer Level D W Digit specification M9010 M9011 Display command ASCII characters LEDA Specification of 16 characters displayed at LED indicator ASCII characters LEDB last 8 characters Functions 1 Displays the ASCII characters spexified by LEDA and LEDB at the LED indicator on the CPU front 2 The displays of LEDA and LEDB are as shown below LED indicator at CPU front 16 characters A B C D E E G H I J K L M N LEDB 2 Specification of first Specification of last half 8 characters half 8 characters 3 The following items can be displayed by the display instructions on the LED display on the front panel of the CPU module e Numeral 0109 Alphabet Ato Z Capitals e Special symbol lt gt Execution Conditions ON Display command OFF bo LEDA LEDB _ _ Executed Executed only once only once 7 103 7 APPLICATION INSTRUCTIONS Program Examples LEDA LEDB MELSEC A
511. tion 5 write BS module in the remote I O station Not applicable to ASV 7 86 1 For the number of steps when extension devices are used or when index qualification is performed to bit devices for AnA A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 1 2 The A mark in the Index column indicates that index qualification can be performed with the AnA A2AS AnU QCPU A A Mode and A2USH board only 3 The A mark in the Subset column indicates that subset processing can be performed with the AnA A2AS AnU QCPU A A Mode and A2USH board only 2 INSTRUCTIONS MELSEC A 9 Display instructions Table 2 25 Display Instructions 1 i Execu x Classi Instruction i hi NA Contents of Processing tion Con 5 o 2 Applicable CPU Page fication 2 Symbol dition E 25 Outputs ASCII codes 16 charac PR s p ters from the specified devices A 7 o A Not applicable to A2C and A52G 7 94 8 points to the output module Outputs ASCII codes sequentially from the specified Not applicable to An A3V A2C ASCII BER Spb devices to the output module and 529 7 94 print 5 until NUL 00H i
512. tion When the ON OFF command for the MC is on operation results from MC to MCR remain unchanged 2 Scanning between the MC and MCR instructions is executed even when the ON OFF command for the MC instruction is OFF Scan time does not therefore become shorter When ON OFF command for the MC is off the operation result of MC to MCR is as indicated below 100 msec and 10 msec timers Count value becomes 0 Coil and contact turn OFF 100 msec retentive timer and counter Coil turns OFF Count value and contact hold present status Devices in the OUT instruction All turn OFF Devices in the SET RST and SFT instructions basic and application Hold present status If an instruction which does not need a contact instruction immediately before it FOR to NEXT El DI etc is contained in the circuit in which the MC instruction is used the PC executes the instruction regardless of the status of the ON OFF command for the MC instruction 3 The MC instruction can use the same nesting N number repeatedly by changing the D device 4 When the MC instruction is ON the coil of device specified at D turns ON If a device is used twice for the OUT instruction it is treated as a duplicate coil To avoid this do not use a device specified at D in other instructions MCR 1 This is the instruction for recovery from the master control and indicates the end of the master control range of operation
513. tion Processing Operation Expression Set to 1 only when both inputs A and B are 1 Set 1 to 0 otherwise Logical product Set to 0 only when both inputs A and B 0 Set to 1 to 1 otherwise Logical add Set to 0 when inputs A and B are equal Set to 1 when they are different Exclusive OR Set to 1 when inputs A and B are equal Set to 0 Exclusive NOR when they are different 7 APPLICATION INSTRUCTIONS MELSEC A 7 1 1 16 32 bit data logical product WAND WANDP DAND DANDP Applicable All CPUs CPU Available Device gt S x BS Bit device Word 16 bit device Constant Pointer Level 8 E 9 u X L 5 B F T DW R 1 2 V K H P 1 5 M9012 M9010 M9011 K1 D WAND S1 O O O O O O O O Oj O 0O 0 0O 0O O O to 52 10 0 KA 01 1 K1 DAND to x Operation commands Indicates the instruction symbol WAND DAND Setting data Data for which logical product w
514. tion time 0 25 Processing Unexecuted 0 time at the After time out 20 0 execution Exe of END cited K 22 0 Added instruction D 24 0 Instruction execution time 0 25 Unexecuted 0 Processing time at the counted 0 execution After count out 0 of END ciuted K instruction Counted Unexecuted Unchanged ON ON Executed Changed OFF ON L Unexecuted Unchanged ON ON Executed Changed OFF ON Special M B Unexecuted Executed Unexecuted Executed APP 41 R Refresh mode D Direct mode APPENDICES MELSEC A Table 2 1 Instruction Processing Time of Small Size Compact CPUs Processing Time us Instruction Condition Device A2C A52G 2 R R LD LDI X 1 0 OR ORI Y M L F T C ANB ORB Unchanged OFF OFF ON gt ON Changed OF F2 ON ON OFF L Unchanged M other than OFF OFF gt ON special M Changed OFF ON ON OFF Special M Unexecuted Executed Instruction execution time Processing Unexecuted time at the After time out execution Exe of END cuted instruction D Instruction execution time Unexecuted Processing
515. tions etc to the product by the user 3 When the Mitsubishi product is assembled into a user s device Failure that could have been avoided if functions or structures judged as necessary in the legal safety measures the user s device is subject to or as necessary by industry standards had been provided 4 Failure that could have been avoided if consumable parts battery backlight fuse etc designated in the instruction manual had been correctly serviced or replaced 5 Failure caused by external irresistible forces such as fires or abnormal voltages and Failure caused by force majeure such as earthquakes lightning wind and water damage 6 Failure caused by reasons unpredictable by scientific technology standards at time of shipment from Mitsubishi 7 Any other failure found not to be the responsibility of Mitsubishi or the user 2 Onerous repair term after discontinuation of production 1 Mitsubishi shall accept onerous product repairs for seven 7 years after production of the product is discontinued Discontinuation of production shall be notified with Mitsubishi Technical Bulletins etc 2 Product supply including repair parts is not possible after production is discontinued 3 Overseas service Overseas repairs shall be accepted by Mitsubishi s local overseas FA Center Note that the repair conditions at each FA Center may differ 4 Exclusion of chance loss and secondary loss from warranty liability Regardless of
516. tions can be used in the sequence program of the master station only Classification Instruction Symbol Ref Page Local Read LRDP 7 80 station Write LWTP 7 80 Remote Read RFRP 7 86 station Write RTOP 7 86 CAUTION Local remote station access instructions LRDP LWTP RFRP can be used on MELSECNET II and MELSECNET B They cannot be used on the MELSECNET 10 7 APPLICATION INSTRUCTIONS MELSEC A 7 8 1 Local station data read write LRDP LWTP Applicable All CPUs CPU Available Device gt oo 2 55 ES Bit device Word 16 bit device Constant Pointer Level 9 o u 2 12 K H P 1 NIS M9012 M9010 M9011 ni 5 0 2 Setting data Local station number Read command Head device number of local station to be read LRDP ni S D n2 Head device number of master HRDP m b m2 Write command written Head device number of master LWTP station which will store read data Head device number of local station where data will be written Number of data read written 1 to 32 Functions LRDP 1 Stores data of n2 points which begin with the device specified at S of the local
517. to 32 Stores the status of stations 33 to 48 Stores the status of stations 49 to 64 Stores the status of stations 1 to 8 Stores the status of stations 9 to 16 Stores the status of stations 17 to 24 Stores the status of stations 25 to 32 Stores the status of stations 33 to 40 Stores the status of stations 41to 48 Stores the status of stations 49 to 56 Stores the status of stations 57 to 64 Total number stored MELSEC A Link Special Register List Continue Stores the local or remote station numbers while they are communicating the initial data with their relevant master station Device see ove ovo vo T Tee communicating the initial settings becomes 1 Example When stations 23 and 45 are communicating bit 6 of D9225 and bit 12 of D9226 become 1 and when D9225 is monitored its value is 64 40 and when 09226 is monitored its value is 4096 1000 Stores the local or remote station numbers which are in error Device number D9228 D9229 D9230 D9231 The bit corresponding to the station number with the error becomes 1 Example When local station 3 and remote station 14 have an error bits 2 and 18 of D9228 become 1 and when D9228 is monitored its value is 8196 2004 Stores the local or remote station number at which a forward or reverse loop error has occurred
518. truction which has caused the operation L Error step storage register error 09011 Stores the head step number of instruc tion which has caused operation error first The stored step number is latched Not provided to A3H A3M AnA A2AS AnU QCPU A A Mode and A2USH board 1 D9011 stores the step number of the instruction which has caused an operation error when M9011 changes from off to on Therefore if M9011 remains on the contents of D9011 do not change 2 Program the reset of M9011 and D9011 as shown below Reset command RST M9011 4 Resets turns off M9011 Resets D9011 RST D90114 Changes the content of D9011 to 0 Fig 3 10 Resetting the Special Relay Register 3 If an operation error has occurred sequence processing may be stopped or continued as selected by the parameter setting For details refer to the ACPU Programming Manual Fundamentals 3 13 3 INSTRUCTION STRUCTURE MELSEC A 3 8 Cautions on Using AnA A2AS AnU QCPU A A Mode and A2USH board This section gives the cautions to be exercised when AnA A2AS AnU QCPU A A Mode and A2USH board is used 3 8 1 The number of steps used in instructions 1 The number of steps increases by one every time a device assigned as shown below device extended by AnA A2AS AnU QCPU A A Mode and A2USH board is used in each instruction Range Device Name A2AS AnU AnA QCPU
519. tte including 2 In the case of memory cassette instruction code which cannot rewrite the contents or replace be decoded has been loaded the cassette with a memory 2 Since the memory contents have cassette which stores correct changed for some reason contents instruction code which cannot be decoded has been included 103 Device specified by a dedicated Read the error step using a peripheral instruction for CC Link is not correct device and correct the program of the 104 A dedicated instruction for CC Link has incorrect program structure 105 A dedicated instruction for CC Link has incorrect command name PARAMETER 11 Stop The contents of parameters of CPU 1 Load the memory cassette ERROR memory have changed due to noise correctly or the improper loading of memory 2 Read the parameter contents of CPU memory check and correct the contents and write them to CPU again MISSING END 12 Stop There is Write END instruction at the end of INS instruction in the program program 9 ERROR CODE LIST MELSEC A Table 9 2 Error Code List for ANSHCPU Continue Error Message CAN T EXECUTE P Error Code D9008 Detailed Error Code D9092 CPU States Error and Cause There is no jump destination or multiple destinations specified by the CJ SCJ CALL CALLP or JMP instruction Although there is no CALL instru
520. ule I O number 10x 1 is stored Unusable with 2 Only remote station in formation is valid for A2C D9002 Dedicated to 2 16 APPENDICES MELSEC A Table 1 4 Special Register List Continue The number of bits The number of bits detected by execution of the SUM Dedicated to 2 09003 Hon detected by SUM instruction are stored in BIN code and updated every ion bits detect instruction detection execution thereafter Error status of the MINI S3 link detected on loaded MINI S3 link module is stored b15 to b8 b7 to 60 7 5 5 2 6 5 Data communication Bits which correspond between the PLC CPU to the signals of MINI and MINI S3 link S3 link module 1 MINI link master detection status module is disabled shown below are D9004 module error turned on as the signals are turned on Hardware error X0 X20 MINI S3 link error detection X6 X26 Usable with AnA A2AS AnA board and AnU MINI S3 link communication error X7 X27 REDDIT the value is stored in BIN code types of CRUS Bits which correspond to CPU of which battery is low are turned on in D9006 as shown below Indicates the CPU B15 83 B2 Bi BO Dedicated da D9006 Battery low module of which 0 0 battery voltage is low 0 1 Battery low 1 is added each time input voltage becomes 85 o
521. ule was disconnected during operation or wrong module was connected There is an output module of which fuse is blown Corrective Action 1 Reset and run the CPU again If the same error recurs Since this is CPU hardware error consult Mitsubishi representative Since this is CPU hardware error consult Mitsubishi representative Read detailed error code using a peripheral device and check or replace the module which corresponds to the data I O head number Or monitor special registers D9116 to D9123 using a peripheral device and check or replace the modules if corresponding data bit is 1 1 Check the FUSE BLOWN indicator LED on the output module and replace the fuse 2 Read detailed error code using a peripheral device and replace the fuse of the output module which corresponds to the data I O head number Or monitor special registers D9100 to D9107 using a peripheral device and replace the fuse of the output module of which corresponding data bit is 1 CONTROL BUS ERR Due to the error of the control bus which connects to special function modules the FROM TO instruction cannot be executed If parameter I O assignment is being executed special function modules are not accessible at initial communication At error occurrence the head I O number upper 2 digits of 3 digits of the special function module that caused error is stored at D9011 9 18 Since i
522. umber of remaining CC Link dedicated instructions being executable Final connected station number 1sto65535s Depends on the micro computer program package to be used Instruction error detail number Depends on the micro computer program package to be used Stores the status of writing enabled disabled to the standard ROM Statuses of DIP switch 3 and M9073 0 SW3is OFF M9073 is OFF ON 1 SWSis ON M9073 is OFF 2 SW3is ON 9073 is ON Stores the accumulation time used by M9077 Setting range 1 to 255ms Default 5ms When the value other than 1 to 255 ms is designated the value in D9077 is reset to 0 Stores the number of remaining instructions RIRD RIWT RISEND RIRCV being executable simultaneously at one scan With QCUP A or AnUCPU Number of remaining instructions being executable 10 Number of instructions executed simultaneously With ANSHCPU Number of remaining instructions being executable 64 Number of instructions executed simultaneously 6 This function is available with the CPU of the following S W versions or later CPU Type Name QO2CPU A QO6HCPU A A1SJHCPU A1SHCPU A2SHCPU A2UCPU 51 Dedicated to QCPU A A Mode Dedicated to QCPU A A Mode Can be used only with AnU A2US QCPU A A Mode or AnSH Available with all versions Manufactured in July 1999 Manufactured in July 1999 Manufactured in July 1999
523. unication with a remote terminal module or an I O module is faulty Communication error occurs due to the following reasons Initial data error Communication OFF Normal Cable breakage Usable with A2C error ON Error Power off for remote terminal modules or I O and A52G modules Turned off when communication is restored to normal with automatic online return enabled Remains on when communication is suspended at error detection with automatic online return disabled Divided transfer OFF Other than divided Turned on when canvas screen transfer to AD57 Usable with AnA Lens processing S1 AD58 is done by divided processing and turned andARU Divided processing off at completion of divided processing 2 Transfer Batch transfer Turned on when canvas screen transfer to AD57 Usable with AnA M9066 cine Divided transfer S1 AD58 is done by divided processing and AnU Turned on when one of I O modules has become faulty station Communication error is detected when normal communication is not restored after the number of retries set at D9174 module error Turned off when communication with all modules Usable with A2C detection is restored to normal with automatic online return and A52G enabled Remains on when automatic online return 15 disabled Not turned on or off when communication is suspended at error detection Automatic online return enabled Automatic online Tu
524. urce S data x3 2 1 xo Fig 3 2 Ladder Example and Processing 3 INSTRUCTION STRUCTURE MELSEC A b When there is digit specification on the destination D side the number of points set by the digit specification is used on the destination side Circuit Example Processing Source S data is numeric value 1 2 3 4 H1234 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 X010 K2 M f MOV 1234 MLS se fees Ep pes Aad ME 24 By ty Ger ee MO K2M0 0 0 2 110 1 0 0 Destination D side c m Do not change 3 4 Source S data is word device bib RIED Vue DA utter 1S ef So Ss 105 dS 1 1 1 0 1 0 1 0 1 0 0 1 1 0 1 X010 P K2 E M100 S Mi T5 Zot eR o to zs M1OBMIOT omm 5 M100 TM K2M100 14 1 Destination D side Do not change Fig 3 3 Ladder Example and Processing 2 32 bit instruction K1 to 8 4 to 32 points Example Setting range by the digit specification of 32 bit data XO to 1F X1C X1B X18 X17 X14 X13 Specification ran
525. us A1SH A1SJH Number of steps 1 x 0 33 us A2SH 51 A1FX Number of steps 1 x 0 25 us and Number of steps 1 x 0 2 us A2A A2AS and A2U Number of steps 4 x 0 2 us A3A A3U and A4U Number of steps 4 x 0 15 us A2USH S1 A2USH board Number of steps 7 x 0 09 us APP 55 APPENDICES MELSEC A 3 Application Instructions Table 2 3 Instruction Processing Time of Small Size Compact CPUs Processing Time us AnS A1SJH A1SH A2SH S1 Instruction Condition Direct Mode Refresh Refresh Direct Refresh Direct Mode ue um X Y Mode Mode Mode Mode WAND S D 60 59 72 15 4 15 7 11 5 11 4 WANDP S D 60 59 72 15 4 15 7 11 5 11 6 DAND 140 139 240 36 2 36 5 27 1 27 2 DANDP 140 139 240 36 2 36 5 27 1 27 2 WAND S1 S2 D 96 96 152 25 8 26 1 19 3 19 2 WANDP S1 S2 D 96 96 152 25 8 26 1 19 3 19 2 WOR S D 61 60 72 15 0 15 5 11 1 11 2 WORP S D 61 60 72 15 0 15 5 11 1 11 2 DOR 140 139 240 36 4 36 7 27 3 27 2 DORP 140 139 240 36 4 36 9 27 3 27 2 WOR S1 S2 D 97 96 152 25 8 26 1 19 3 19 2 WORP 1 S2 D WXOR S D WXORP S D DXOR DXORP WXOR S1 S2 D WXORP S1 S2 D WXNR S D WXNRP S D DXNR DXNRP WXNR S1 S2 D WXNPP S1 S2 D NEG NEGP ROR n RORP n RCRn RCRP n APP 56 APPENDICES MELSEC A Table 2 3 Instruction Processing Time of Small Size Compact CPUs Processing Time u
526. ution enable disable y Active step OFF Trace ON Sampling trace execution is enabled sampling trace disable suspend OFF Sampling trace execution is disabled M9182 enable ON Trace enable If turned off during sampling trace execution AnSH A1FX and 528 Usable with AnN A2AS QCPU A A Mode A2C 2 5 AnSH A1FX and 528 Usable with AnN AnU A2AS QCPU A A Mode A2C 2 5 AnSH A1FX and 528 2 trace is suspended executed AnU ON Retains the ON OFF status of the coil being A2AS QCPU A A Mode A2C 2 5 AnSH A1FX and 528 2 output OFF Coil output off used by using operation output of the step M9196 block stop ON Ooil output on being executed at block stop OFF All coil outputs are turned off Operation output by the SET instruction is retained regardless of the ON OFF status of M9196 Usable with AnU A2AS and QCPU A A Mode numbers to be displayed M9197 Switches I O numbers in the fuse blow module Fuse blow I O X Y0 to 7FO storage registers D9100 to D9107 and I O module verify error X Y800 to FFO verify error storage registers 09116 to 09123 display switching X Y1000 to according to the combination of ON OFF of the OFFION 7 5 M9197 and M9198 M9198 1800 1FFO When sampling trace status latch
527. ve sign to the negative sign and vice versa Execution Conditions k 2 s complement OFF execution command Kor a Executed Executed NEG per scan per scan lt gt gt NEGP Executed gt Executed only once only once 7 19 7 APPLICATION INSTRUCTIONS MELSEC A Program Example NEG 1 Program which calculates D10 D20 when XA turns on and obtains the absolute value when the result is negative X00A 0 D10 020 M3 H When 010 lt 020 turns X00A P 7 D20 D10 D10 D20 is executed M3 P D10 1 When is on absolute value 2 s complement L Hog is obtained Coding 0 LD X00A 1 AND D10 D20 6 OUT M3 7 LD X00A 8 P D20 D10 13 14 010 17 END 7 APPLICATION INSTRUCTIONS MELSEC A 7 2 Rotation Instructions The rotation instructions rotate the data stored in the accumulator Classification ponen Ref Page Classification EU Ref Page ROR 7 22 ROL 7 24 RORP 7 22 ROLP 7 24 RCR 7 22 RCL 7 24 RCRP 7 22 RCLP 7 24 Right rotation Left rotation DROR 7 26 DROL 7 28 DRORP 7 26 DROLP 7 28 DRCR 7 26 DRCL 7 28 DRCRP 7 26 DRCLP 7 28 7 APPLICATION INSTRUCTIONS MELSEC A 7 2 1 16 bit data right rotation ROR RORP RCR PCRP All CPUs c Availa
528. vely no link parameters have been written The total number of slave stations is set at 0 When using MELSECNET 10 1 The contents of the network refresh parameters written from a peripheral device differ from the actual system at the base unit 2 The network refresh parameters have not been written Write the parameters again and check Check the station number settings Persistent error occurrence may indicate a hardware fault Consult your nearest Mitsubishi representative explaining the nature of the problem Write the network refresh parameters again and check When using MELSECNET 10 1 The transfer source device range and transfer destination device range specified for the inter network transfer parameters are in the same network The specified range of transfer Source devices or transfer destination devices for the inter network transfer parameters spans two or more networks The specified range of transfer source devices or transfer destination devices for the inter network transfer parameters is not used by the network Write the network parameters again and check When using MELSECNET 10 The contents of the routing parameters written from a peripheral device differ from the actual network System Write the routing parameters again and check MELSEC A 9 ERROR CODE LIST Error Massage LINK PARA ERROR Table 9 4 Error Code List for the AnU A2AS and A2US
529. ven number stations b8 10 615 n 8 D9171 D9172 APP 29 APPENDICES Number Name D9173 setting D9174 Setting of the number of retries Table 1 4 Number Name Description AppicabeCPU Automatic online return enabled Automatic online return disabled Transmission stop at online error Line check Number of retries X P Register List Continue Details Mode setting When an I O module or a remote terminal module caused communication error the station is placed offline Communication with normal stations is continued The station recovering from a communication error automatically resumes communication When I O module or a remote terminal module caused communication error the station is placed offline Communication with normal stations is continued Though faulty station returned to normal communication is not restored unless the station module is restarted When I O module or a remote terminal module caused communication error communication with all stations is stopped Though faulty station returned to normal communication is not restored unless the station module is restarted Checks hardware and connecting cables of I O modules and remote terminal modules Sets the number of retries executed to modules and remote terminal modules which caused communication error Set for 5 times at po
530. wer on Set range 0 to 32 If communication with an I O module or a remote terminal module is not restored to normal after set number of retries such module is regarded as a faulty station Stores the number of retries executed at line error time out MELSEC A Applicable CPU Usable with A2C and A52G Usable with A2C and A52G Line error P Usable with A2C D9175 y Number of retries Data becomes 0 when line is restored to normal and counter Ma and A52G communication with modules and remote terminal modules is resumed D9180 Stores error code of a faulty remote terminal module D9181 when M9060 is turned on The error code storage areas for each remote terminal D9182 module are as shown below D9183 09180 Remote terminal module No 1 D9184 Remote 09185 09181 Remote terminal module No 2 terminal _ D9182 Remote terminal module No 3 ei i emote terminal module No D9186 Remote terminal numbers 2 Usable with A2C module error Tom 1 to D9187 are set with and A52G number D9192 Remote terminal module No 13 D9020 to D9193 Remote terminal module No 14 D3994 2 09190 Error code is cleared in the following cases When the RUN key switch is moved from STOP to RUN D9180 to D9183 are all cleared When Yn4 of each remote terminal is set from OFF to ON APP 30 APPENDICES MELSEC A Table 1 4 Special Register List Continue Limit swit
531. wer supply ON Overheat module is detected Dedicated to A3V OFF Normal ON Failure or AC power supply down Duplex power supply error Turned on when a duplex power supply module caused failure or the AC power supply is cut down After the head address of the required module is set to 09094 switching M9094 on allows the module to be changed in online mode One module is only allowed to be changed by one setting Dedicated to Usable with An AnN AnA AnU OFF Changed To be switched on in the program or peripheral ON Not changed device test mode to change the module during CPU RUN To be switched on in peripheral device test mode to change the module during CPU STOP RUN STOP mode must not be changed until 1 0 module change is complete change flag APP 8 APPENDICES MELSEC A Table 1 1 Special Relay List Continue During duplex operation of the operating CPU with a OFF Normal f stand by CPU verification is performed by the both ON Duplex operation to each other Turned on when verify error verify error occurred A3VCPUA OFF No error Turn on when a self check error occurred on the D M9096 selfcheck error JON Error A3VCPU A mounted next to the A3VTU A3VCPU B OFF No error Turn on when a self check error occurred on the selfcheck error Error A3VCPU B mounted next to the A3VCPU A A3
532. when the voltage recovers to normal Memory card M9048 battery voltage detection Dedicated to QCPU A A Mode Unusable with An A2C 520 M9049 Operation result storage memory change contact for CHG instruction OFF Not changed Switched on to exchange the operation result Dedicated to A3 ON Changed storage memory data and the save area data M9050 Usable with A3 A3M A4U A73 and Unusable with An A3M A3V AnA AnU A3V and A3A board Switched on to disable the CHG instruction Switched on when program transfer is requested and automatically switched off when transfer is complete instruction OFF Enable SOS execution disable ON Disable Switched on to execute the instruction as a SEG instruction OFF 7SEG display partial refresh instruction switching ON Partial refresh Switched off to execute the instruction as a 7SEG display instruction M9052 OFF Sequence interrupt control Switched on to execute the link refresh enable ON Link interrupt disable El DI instructions control OFF Other than step run Switched on when the RUN key switch is in STEP M3054 DER HUN flag ON During step run RUN position Status latch OFF Not complete Turned on when status latch is completed Turned off M9055 complete fla
533. write parameters and or programs are not correctly written to sequence programs to the the mounted memory cassette memory cassette Remove the memory cassettes that contain no parameters or sequence programs Parameters stored in the memory Adjust the program capacity for cassette have exceeded the limit of parameters to the memory available program capacity cassette used Use the memory cassette of which memory capacity is larger than the program capacity for parameters Ex Default parameters program Capacity 6k steps are written to A1NMCA 2KE RAM ERROR The CPU has checked if write and Since this CPU hardware error consult read operations can be performed Mitsubishi representative properly to the data memory area of CPU and as a result either or both has not been performed OPE CIRCUIT The operation circuit which performs ERR the sequence processing in the CPU does not operate properly WDT ERROR Scan time exceeds watch dog error 1 Calculate and check the scan monitor time time of user program and reduce 1 Scan time of user program has the scan time using the CJ been exceeded for some instruction or the like conditions Monitor the content of special 2 Scan time has lengthened due to register D9005 by use of instantaneous power failure peripheral equipment When the which occurred during scan content is other than 0 line voltage is insuffi
534. xed with the AnA A2AS AnU QCPU A A Mode and A2USH board only 9 The mark indicates that the instruction is a subset instruction The mark indicates that the subset processing can be performed with the AnA A2AS AnU QCPU A A Mode and A2USH board only 10 Indicates applicable CPU The mark indicates that it is applicable to all types of CPUs The A mark indicates that it is applicable to some types of CPUs The mark indicates that it is applicable to specific CPUs 11 Indicates a page which explains each instruction 2 INSTRUCTIONS MELSEC A 2 22 Sequence instructions 1 Contact instructions Table 2 3 Contact Instructions 1 i x 9 Classi Instruction Symbol Contents of Processing tion Con 2 2 Applicable CPU Page fication 5 Symbol dition ESI 2 2 5 Logical operation start 2 f IP NO contact operation start 1 5 2 P d Logical NOT operation start 2 Eon A NC contact operation start 1 A 5 2 Logical product 2 AND NO contact series connection 1 A 5 2 Contact 5 Logical product NOT x An NC contact series connection 1 A o 52 Logical add 2 OR NO contact parallel connection D A 5 2 Logical add NOT 2 NC contact parallel connection 5 2 2 Connection instructions Table 2 4 Connection
535. y the 12 RFRP H0140 K10 W052 K10 Vi QE Pn module sequence program 23 MPP Turned ON by 24 AND X15E the special 25 RST MO 1 OFF M function module For 2 link 26 RST Y14E VN scans 27 END Executed only once lt CAUTION Provide interlock using the special registers mentioned below so that the RTOP instruction may be executed when the data link with remote l O stations is normal and parameter communication is not being performed Remote station normal error judgment 09228 to 09231 Parameter communication execution non execution judgment D9224 to D9227 For details refer to the MELSECNET Il Data Link System Reference Manual 7 APPLICATION INSTRUCTIONS MELSEC A Functions RTOP 1 Writes data of n3 points of the link registers W starting with the one specified at S to addresses starting with the one specified at n2 of buffer memory in the special function module of which number is specified at n1 the number in the remote station assigned by the master station 2 The link registers to be specified at S should be specified in the range of parameter assignment from the master station to the remote I O station For parameter setting refer to POINT below 3 It is not allowed to use two or more instructions or to use the and RFRP instructions simultaneously with a special fun

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