Designer Reference Manual
Contents
1. breakpoint A number written into the break address registers of the break module When a number appears on the internal address bus that is the same as the number in the break address registers the CPU executes the software interrupt instruction SWI break interrupt A software interrupt caused by the appearance on the internal address bus of the same value that is written in the break address registers bus A set of wires that transfers logic signals bus clock The bus clock is derived from the CGMOUT output from the CGM The bus clock frequency fop is equal to the frequency of the oscillator output CGMXCLK divided by four op byte A set of eight bits C The carry borrow bit in the condition code register The CPU08 sets the carry borrow bit when an addition operation produces a carry out of bit 7 of the accumulator or when a subtraction operation requires a borrow Some logical operations and data manipulation instructions also clear or set the carry borrow bit as in bit test and branch instructions and shifts and rotates CCR See condition code register central processor unit CPU The primary functioning unit of any computer system The CPU controls the execution of instructions CGM See clock generator module CGM clear To change a bit from logic 1 to logic 0 the opposite of set clock A square wave signal used to synchronize events in a computer clock ge2. and decryption object file 1 7 Test Description DRM013 Rev 0 e The solution was tested under different Windows operating systems on several brands of PCs e USBCheck version 3 2 and HIDView version 3 6 e Compatibility tests under Windows 98SE and Windows 2000 Compatibility tests under AMD 750 Intel 810 chip set Desktops and IBM Thinkpad 570 600E Designer Reference Manual MOTOROLA USB Security Key 15 For More Information On This Product Go to www freescale com Freescale Semiconductor Inc USB Security Key Designer Reference Manual DRM013 Rev 0 16 USB Security Key MOTOROLA For More Information On This Product Go to www freescale com Freescale Semiconductor Inc Designer Reference Manual DRM013 Section 2 Glossary A See accumulator A accumulator A An 8 bit general purpose register in the CPU08 The CPU08 uses the accumulator to hold operands and results of arithmetic and logic operations acquisition mode A mode of PLL operation during startup before the PLL locks on a frequency Also see tracking mode address bus The set of wires that the CPU or DMA uses to read and write memory locations addressing mode The way that the CPU determines the operand address for an instruction The M68HC08 CPU has 16 addressing modes ALU See arithmetic logic unit ALU arithmetic logic unit ALU The portion of the CPU that con
3. and the operand may be the quantity to be added oscillator A circuit that produces a constant frequency square wave that is used by the computer as a timing and sequencing reference OTPROM One time programmable read only memory A nonvolatile type of memory that cannot be reprogrammed overflow A quantity that is too large to be contained in one byte or one word page zero The first 256 bytes of memory addresses 0000 00FF parity An error checking scheme that counts the number of logic 1s in each byte transmitted In a system that uses odd parity every byte is expected to have an odd number of logic 1s In an even parity system every byte should have an even number of logic 1s In the transmitter a parity generator appends an extra bit to each byte to make the number of logic 1s odd for odd parity or even for even parity A parity checker in the receiver counts the number of logic 1s in each byte The parity checker generates an error signal if it finds a byte with an incorrect number of logic 1s PC See program counter PC peripheral A circuit not under direct CPU control phase locked loop PLL A oscillator circuit in which the frequency of the oscillator is synchronized to a reference signal PLL See phase locked loop PLL pointer Pointer register An index register is sometimes called a pointer register because its contents are used in the calculation of the address of an o
4. full duplex transmission Communication on a channel in which data can be sent and received simultaneously H The upper byte of the 16 bit index register H X in the CPU08 H The half carry bit in the condition code register of the CPU08 This bit indicates a carry from the low order four bits of the accumulator value to the high order four bits The half carry bit is required for binary coded decimal arithmetic operations The decimal adjust accumulator DAA instruction uses the state of the H and C bits to determine the appropriate correction factor hexadecimal Base 16 numbering system that uses the digits 0 through 9 and the letters A through F high byte The most significant eight bits of a word Designer Reference Manual DRM013 Rev 0 0 20 Glossary MOTOROLA For More Information On This Product Go to www freescale com Freescale Semiconductor Inc Glossary illegal address An address not within the memory map illegal opcode A nonexistent opcode The interrupt mask bit in the condition code register of the CPU08 When is set all interrupts are disabled index register H X A 16 bit register in the CPU08 The upper byte of H X is called H The lower byte is called X In the indexed addressing modes the CPU uses the contents of H X to determine the effective address of the operand H X can also serve as a temporary data storage location input output I O Input output i
5. send to PC Figure 1 3 Security Key Principle The security key demo firmware and PC software programs are written to demonstrate the ability to use the MC68HC908JB8 as a USB security device The security key stores an 8 byte pre defined private key of Motorola which can be changed by the demo PC software The Set Challenge command allows the user to set and send an 8 byte challenge to the security key and it will then respond with encrypted data Here are the brief descriptions of the commands Get KeyID gets and displays the private key Set KeylD sets the private key Set Challenge sets and sends the challenge to the private key then calls the Get Challenge command and the result is displayed Designer Reference Manual MOTOROLA USB Security Key 9 For More Information On This Product Go to www freescale com USB Security Key Freescale Semiconductor Inc The user can use the Set_KeylD function to change the 8 byte private key stored in the MC68HC908JB8 The user can also use the Get_KeylID function to read back the 8 byte data The DES function is demonstrated by using the Send_Challenge function Below is some information for the USB used in this demo e Vendor ID 0x0425 Motorola Vendor ID e Product ID 0x300 Assigned to this demo e Default KeyID Motorola e Set KeyID through HID Set_Report Input command e Get KeylD through HID Get_Report Output command e Send challenge th
6. when an arithmetic operation logical operation or data manipulation produces a result of 00 Designer Reference Manual DRM013 Rev 0 0 26 Glossary MOTOROLA For More Information On This Product Go to www freescale com Freescale Semiconductor Inc For More Information On This Product Go to www freescale com Freescale Semiconductor Inc DRM013 D HOW TO REACH US USA EUROPE LOCATIONS NOT LISTED Motorola Literature Distribution P O Box 5405 Denver Colorado 80217 1 303 675 2140 or 1 800 441 2447 JAPAN Motorola Japan Ltd SPS Technical Information Center 3 20 1 Minami Azabu Minato ku Tokyo 106 8573 Japan 81 3 3440 3569 ASIA PACIFIC Motorola Semiconductors H K Ltd Information in this document is provided solely to enable system and software Silicon Harbour Centre 2 Dai King Street implementers to use Motorola products There are no express or implied copyright Tai Po Industrial Estate Tai Po N T Hong Kong licenses granted hereunder to design or fabricate any integrated circuits or 852 26668334 integrated circuits based on the information in this document TECHNICAL INFORMATION CENTER Motorola reserves the right to make changes without further notice to any products 4 800 521 6274 herein Motorola makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does Motorola assume any HOME PAGE liability arising out of the applica
7. B Security Key e The KeylD can be changed by using the Set KeyID command hotoroies HID Dema Draca detected HodD_GelPreparsedDale The operation completed successtulky Hid P_Getlops The operation completed succassiuly SemuplaDestovbevicelnfoList The operon compicated succasshalhy e Click Set Challenge Freescale Semiconductor Inc Designer Reference Manual DRM013 Rev 0 12 USB Security Key MOTOROLA For More Information On This Product Go to www freescale com Freescale Semiconductor Inc USB Security Key Demo Operation e Preset Challenge displays and it can then be modified and sent out by clicking Send Sei Challenge a ce M M M Device detected HaD_GelPreparsedDale The operation completed suocesetulky Hid P_GesGees The opention completed sucmassaulhy HdO_FreePrepersedDista The operation completed successtully Credterile ReodHandie Tha operon completed succesatulhy Crastefvent The opershon completed successtulby Device detected SetupleDestoyDievicelntoListThe operon compigted succasstulhy e The device encrypts the challenge and sends the result to the PC e The PC then displays the result Freescale Semiconductor Inc DRM013 Rev 0 Designer Reference Manual MOTOROLA USB Security Key 13 For More Information On This Product Go to www freescale com Freescale Semiconductor Inc USB Security Key With the private key of Motorola and the default chal
8. Freescale Semiconductor Inc fe oye sic act alledrttin digital dna intelligence everywhere USB Security Key Reference Design Designer Reference Manual M68HC08 Microcontrollers Rev 0 0 3 2003 MOTOROLA COM SEMICONDUCTORS For More Information On This Product Go to www freescale com Freescale Semiconductor Inc For More Information On This Product Go to www freescale com Freescale Semiconductor Inc USB Security Key Reference Design Designer Reference Manual Rev 0 by Derek Lau Motorola Ltd Hong Kong DRM013 Rev 0 Designer Reference Manual MOTOROLA 3 For More Information On This Product Go to www freescale com Freescale Semiconductor Inc Designer Reference Manual DRM013 Rev 0 4 MOTOROLA For More Information On This Product Go to www freescale com Freescale Semiconductor Inc Designer Reference Manual DRM013 DRM013 Rev 0 1 1 1 2 13 1 4 1 5 1 6 1 7 Table of Contents Table of Contents Section 1 USB Security Key PGC o eeann e d e a 7 MC68HC908JB8 Features 5 2524540 4 bs ede ee SF SS ese eas 7 Hardware Descriptions 2u2e ex oo osue eet ceed eaters Eos 8 Security Key Principle 22252542056 c0sceeeeeesbedenvdc 9 erie Operation ss oe oee4e detinee i Ree een 11 Pinmware FES s isendit utaceae pei eia dai a a 14 Test DESCnpPUON s strone shed asad Je keee cate Be Re cod 15 Section 2 Glossary Designer Referen
9. access module DMA A M68HC08 Family module that can perform data transfers between any two CPU addressable locations without CPU intervention For transmitting or receiving blocks of data to or from peripherals DMA transfers are faster and more code efficient than CPU interrupts DMA See direct memory access module DMA DMA service request A signal from a peripheral to the DMA module that enables the DMA module to transfer data duty cycle A ratio of the amount of time the signal is on versus the time it is off Duty cycle is usually represented by a percentage EEPROM Electrically erasable programmable read only memory A nonvolatile type of memory that can be electrically reprogrammed EPROM Erasable programmable read only memory A nonvolatile type of memory that can be erased by exposure to an ultraviolet light source and then reprogrammed exception An event such as an interrupt or a reset that stops the sequential execution of the instructions in the main program external interrupt module IRQ A module in the M68HC08 Family with both dedicated external interrupt pins and port pins that can be enabled as interrupt pins fetch To copy data from a memory location into the accumulator firmware Instructions and data programmed into nonvolatile memory free running counter A device that counts from zero to a predetermined number then rolls over to zero and begins counting again
10. ansmit buffer Endpoint 2 with 8 byte transmit buffer and 8 byte receive buffer DRM013 Rev 0 Designer Reference Manual MOTOROLA USB Security Key 7 For More Information On This Product Go to www freescale com USB Security Key Direct drive LED pins 1 3 Hardware Descriptions Designer Reference Manual Freescale Semiconductor Inc Refer to the schematic of the security key Vss OSC1 OSC2 VREG VoD PTDO PTD1 PTD2 PTD3 PTD4 PTE1 TCHO PTE3 D PTE4 D PTCO 1 2 3 4 5 6 7 8 Vss OSC1 OSC2 VREG VDD PTDO 1 PTE1 TCHO PTE3 D PTE4 D PTCO gt ON DOF O N RST PTAO KBAO PTA1 KBA1 PTA2 KBA2 PTA3 KBA3 PTEO TCLK PTE2 TCH1 PTA4 KBA4 PTAS KBA5 PTA6 KBA6 PTA7 KBA7 PTD5 PTD6 IRQ RST PTAO KBAO PTA1 KBA1 PTA2 KBA2 PTA3 KBA3 PTA4 KBA4 PTA5 KBA5 PTA6 KBA6 PTA7 KBA7 IRQ Figure 1 2 28 Pin SOIC Pin Assignments Test points 1 to 5 are used for in circuit programming DRM013 Rev 0 8 USB Security Key For More Information On This Product Go to www freescale com MOTOROLA Freescale Semiconductor Inc USB Security Key Security Key Principle e R23 is optional since MC68HC908JB8 has internal USB pullups e D1 and D2 are LEDs used for status indication e R5 and C5 are used for future development 1 4 Security Key Principle DRM013 Rev 0 Enumeration Get User info Send challenge to key Encrypt challenge and
11. ce Manual MOTOROLA Table of Contents 5 For More Information On This Product Go to www freescale com Freescale Semiconductor Inc Table of Contents Designer Reference Manual DRM013 Rev 0 6 Table of Contents MOTOROLA For More Information On This Product Go to www freescale com Freescale Semiconductor Inc Designer Reference Manual DRM013 Section 1 USB Security Key 1 1 Introduction This user manual demonstrates a Universal Serial Bus Security Key by using the MC68HC908JB8 The main features of the key include e USB Specification 1 1 Compliant e USB HID Compliant e Windows 98SE and 2000 Compatible e 64 bit DES Encryption 1 2 MC68HC908JB8 Features The MC68HC908JB8 is a member of the low cost high performance M68HCO08 Family of 8 bit microcontroller units MCUs The MC68HC908JB8 has several packages including 44 pin quad flat pack QFP 28 pin small outline integrated circuit package SOIC 20 pin SOIC and 20 pin plastic dual in line package DIP The 28 pin and 20 pin SOIC are suitable for the security key implementation Main features of the MC68HC908JB8 include 3 MHz internal bus frequency using 6MHz crystal e 8 192 bytes of on chip FLASH memory e 256 bytes of on chip random access memory RAM e Full USB 1 1 low speed functions On chip 3 3V regulator for USB line pullup Endpoint 0 with 8 byte transmit buffer and 8 byte receive buffer Endpoint 1 with 8 byte tr
12. he input clock to the TIM counter This clock is the output of the TIM prescaler CPU See central processor unit CPU CPU08 The central processor unit of the M68HC08 Family CPU clock The CPU clock is derived from the CGMOUT output from the CGM The CPU clock frequency is equal to the frequency of the oscillator output CGMXCLK divided by four CPU cycles A CPU cycle is one period of the internal bus clock normally derived by dividing a crystal oscillator source by two or more so the high and low times will be equal The length of time required to execute an instruction is measured in CPU clock cycles CPU registers Memory locations that are wired directly into the CPU logic instead of being part of the addressable memory map The CPU always has direct access to the information in these registers The CPU registers in an M68HCO08 are e A 8 bit accumulator e H X 16 bit index register e SP 16 bit stack pointer e PC 16 bit program counter e CCR condition code register containing the V H I N Z and C bits CSIC customer specified integrated circuit cycle time The period of the operating frequency teye 1 fop decimal number system Base 10 numbering system that uses the digits zero through nine DRM013 Rev 0 0 Designer Reference Manual MOTOROLA Glossary 19 For More Information On This Product Go to www freescale com Freescale Semiconductor Inc direct memory
13. he stack RAM The stack RAM address is in the stack pointer PWM period The time required for one complete cycle of a PWM waveform RAM Random access memory All RAM locations can be read or written by the CPU The contents of aRAM memory location remain valid until the CPU writes a different value or until power is turned off RC circuit A circuit consisting of capacitors and resistors having a defined time constant read To copy the contents of a memory location to the accumulator register A circuit that stores a group of bits reserved memory location A memory location that is used only in special factory test modes Writing to a reserved location has no effect Reading a reserved location returns an unpredictable value reset To force a device to a known condition ROM Read only memory A type of memory that can be read but cannot be changed written The contents of ROM must be specified before manufacturing the MCU SCI See serial communication interface module SCl serial Pertaining to sequential transmission over a single line Designer Reference Manual DRM013 Rev 0 0 24 Glossary MOTOROLA For More Information On This Product Go to www freescale com Freescale Semiconductor Inc Glossary serial communications interface module SCI A module in the M68HC08 Family that supports asynchronous communication serial peripheral interface module SPI A module
14. in the M68HC08 Family that supports synchronous communication set To change a bit from logic 0 to logic 1 opposite of clear shift register A chain of circuits that can retain the logic levels logic 1 or logic 0 written to them and that can shift the logic levels to the right or left through adjacent circuits in the chain signed A binary number notation that accommodates both positive and negative numbers The most significant bit is used to indicate whether the number is positive or negative normally logic 0 for positive and logic 1 for negative The other seven bits indicate the magnitude of the number software Instructions and data that control the operation of a microcontroller software interrupt SWI An instruction that causes an interrupt and its associated vector fetch SPI See serial peripheral interface module SPI stack A portion of RAM reserved for storage of CPU register contents and subroutine return addresses stack pointer SP A 16 bit register in the CPU08 containing the address of the next available storage location on the stack start bit A bit that signals the beginning of an asynchronous serial transmission status bit A register bit that indicates the condition of a device stop bit A bit that signals the end of an asynchronous serial transmission subroutine A sequence of instructions to be used more than once in the course of a program The last instr
15. lenge you will get a result of D3 4E 9C 17 93 BA D4 and 32 d Mintorote HID Dema 0425 Hid D_GetPrepersedDete The operation completad successtulty CreaieFile AeedHand e The opersion completed successtulby Deica detected SetupOiDestroyDenacelntoListThe operon completed succasstully Reade Cverlapged VO operation is in progress Responsa d3 de 9017 97 ba dd 3z 1 6 Firmware Files Firmware is compiled under Code warrior version 2 1 from Metrowerks Freescale Semiconductor Inc Table 1 2 summarizes the functions of each firmware files Table 1 2 Input Report Examples Files Functions Define constants and variables Initialization JB8 KEY ASM Endpoint 1 data handling USB suspend resume handling Timer Interrupt Designer Reference Manual DRM013 Rev 0 14 USB Security Key MOTOROLA For More Information On This Product Go to www freescale com Freescale Semiconductor Inc USB Security Key Test Description Table 1 2 Input Report Examples Files Functions Set_KeylD Get_KeyID Set_Challenge and REXDASM Get_Challenge Hanlding USB HID ASM USB standard device requests handler HID class requests handler USB interrupt JBEINTASM USB control transfer handler MARCO8 H HC08 Macro commands USB KEYH Device configure interface HID endpoint string and report descriptors JB8 EQS H JB8 registers and memory definitions DES O DES encryption
16. lt unbuffered Utilizes only one register for data new data overwrites current data unimplemented memory location A memory location that is not used Writing to an unimplemented location has no effect Reading an unimplemented location returns an unpredictable value Executing an opcode at an unimplemented location causes an illegal address reset V The overflow bit in the condition code register of the CPU08 The CPU08 sets the V bit when a two s complement overflow occurs The signed branch instructions BGT BGE BLE and BLT use the overflow bit variable A value that changes during the course of program execution VCO See voltage controlled oscillator vector A memory location that contains the address of the beginning of a subroutine written to service an interrupt or reset voltage controlled oscillator VCO A circuit that produces an oscillating output signal of a frequency that is controlled by a dc voltage applied to a control input waveform A graphical representation in which the amplitude of a wave is plotted against time wired OR Connection of circuit outputs so that if any output is high the connection point is high word A set of two bytes 16 bits write The transfer of a byte of data from the CPU to a memory location X The lower byte of the index register H X in the CPU08 Z The zero bit in the condition code register of the CPU08 The CPU08 sets the zero bit
17. nerator module CGM A module in the M68HC08 Family The CGM generates a base clock signal from which the system clocks are derived The CGM may include a crystal oscillator circuit and or phase locked loop PLL circuit comparator A device that compares the magnitude of two inputs A digital comparator defines the equality or relative differences between two binary numbers computer operating properly module COP A counter module in the M68HC08 Family that resets the MCU if allowed to overflow Designer Reference Manual DRM013 Rev 0 0 18 Glossary MOTOROLA For More Information On This Product Go to www freescale com Freescale Semiconductor Inc Glossary condition code register CCR An 8 bit register in the CPU08 that contains the interrupt mask bit and five bits that indicate the results of the instruction just executed control bit One bit of a register manipulated by software to control the operation of the module control unit One of two major units of the CPU The control unit contains logic functions that synchronize the machine and direct various operations The control unit decodes instructions and generates the internal control signals that perform the requested operations The outputs of the control unit drive the execution unit which contains the arithmetic logic unit ALU CPU registers and bus interface COP See computer operating properly module COP counter clock T
18. nformation On This Product Go to www freescale com Freescale Semiconductor Inc LVI See low voltage inhibit module LVI M68HC08 A Motorola family of 8 bit MCUs mark space The logic 1 logic 0 convention used in formatting data in serial communication mask 1 A logic circuit that forces a bit or group of bits to a desired state 2 A photomask used in integrated circuit fabrication to transfer an image onto silicon mask option A optional microcontroller feature that the customer chooses to enable or disable mask option register MOR An EPROM location containing bits that enable or disable certain MCU features MCU Microcontroller unit See microcontroller memory location Each M68HC08 memory location holds one byte of data and has a unique address To store information in a memory location the CPU places the address of the location on the address bus the data information on the data bus and asserts the write signal To read information from a memory location the CPU places the address of the location on the address bus and asserts the read signal In response to the read signal the selected memory location places its data onto the data bus memory map A pictorial representation of all memory locations in a computer system microcontroller Microcontroller unit MCU A complete computer system including a CPU memory a clock oscillator and input output I O on a single integ
19. nterfaces between a computer system and the external world A CPU reads an input to sense the level of an external signal and writes to an output to change the level on an external signal instructions Operations that a CPU can perform Instructions are expressed by programmers as assembly language mnemonics A CPU interprets an opcode and its associated operand s and instruction interrupt A temporary break in the sequential execution of a program to respond to signals from peripheral devices by executing a subroutine interrupt request A signal from a peripheral to the CPU intended to cause the CPU to execute a subroutine 1 0 See input output 1 0 IRQ See external interrupt module IRQ jitter Short term signal instability latch A circuit that retains the voltage level logic 1 or logic 0 written to it for as long as power is applied to the circuit latency The time lag between instruction completion and data movement least significant bit LSB The rightmost digit of a binary number logic 1 A voltage level approximately equal to the input power voltage Vbp logic 0 A voltage level approximately equal to the ground voltage Vss low byte The least significant eight bits of a word low voltage inhibit module LVI A module in the M68HC08 Family that monitors power supply voltage DRM013 Rev 0 0 Designer Reference Manual MOTOROLA Glossary 21 For More I
20. otorola and the Stylized M Logo are registered in the U S Patent and Trademark Office digital dna is a trademark of Motorola Inc All other product or service names are the property of their respective owners Motorola Inc is an Equal Opportunity Affirmative Action Employer Motorola Inc 2003 For More Information On This Product Go to www freescale com
21. perand and therefore points to the operand polarity The two opposite logic levels logic 1 and logic 0 which correspond to two different voltage levels Vpp and Vss polling Periodically reading a status bit to monitor the condition of a peripheral device DRM013 Rev 0 0 Designer Reference Manual MOTOROLA Glossary 23 For More Information On This Product Go to www freescale com Freescale Semiconductor Inc port A set of wires for communicating with off chip devices prescaler A circuit that generates an output signal related to the input signal by a fractional scale factor such as 1 2 1 8 1 10 etc program A set of computer instructions that cause a computer to perform a desired operation or operations program counter PC A 16 bit register in the CPU08 The PC register holds the address of the next instruction or operand that the CPU will use pull An instruction that copies into the accumulator the contents of a stack RAM location The stack RAM address is in the stack pointer pullup A transistor in the output of a logic gate that connects the output to the logic 1 voltage of the power supply pulse width The amount of time a signal is on as opposed to being in its off state pulse width modulation PWM Controlled variation modulation of the pulse width of a signal with a constant frequency push An instruction that copies the contents of the accumulator to t
22. rated circuit modulo counter A counter that can be programmed to count to any number from zero to its maximum possible modulus monitor ROM A section of ROM that can execute commands from a host computer for testing purposes MOR See mask option register MOR most significant bit MSB The leftmost digit of a binary number multiplexer A device that can select one of a number of inputs and pass the logic level of that input on to the output N The negative bit in the condition code register of the CPU08 The CPU sets the negative bit when an arithmetic operation logical operation or data manipulation produces a negative result nibble A set of four bits half of a byte Designer Reference Manual DRM013 Rev 0 0 22 Glossary MOTOROLA For More Information On This Product Go to www freescale com Freescale Semiconductor Inc Glossary object code The output from an assembler or compiler that is itself executable machine code or is suitable for processing to produce executable machine code opcode A binary code that instructs the CPU to perform an operation open drain An output that has no pullup transistor An external pullup device can be connected to the power supply to provide the logic 1 output voltage operand Data on which an operation is performed Usually a statement consists of an operator and an operand For example the operator may be an add instruction
23. rough HID Set_Report feature command e Challenge result through HID Get_Report feature command Table 1 1 summarizes the HID commands used in this demo Table 1 1 HID Commands Usage BmRequest Command Type bRequest wValueL wValueL windex wLength Data Set KeylID 21 09 00 03 00 0008 KeylD Get KeyID 21 01 00 03 00 0008 KeylD Send Challenge 21 09 00 02 00 0008 Challenge ne 21 01 00 02 00 0008 KeylD Challenge After each command Endpoint 1 will acknowledge one byte status of the Command success Command failure e g programming failure command e 00 gt 01 e 02 Designer Reference Manual Error eg programming non existing FLASH area of device DRM013 Rev 0 10 USB Security Key For More Information On This Product Go to www freescale com MOTOROLA Freescale Semiconductor Inc Freescale Semiconductor Inc USB Security Key Demo Operation 1 5 Demo Operation Plug in the USB Security Key into PC and install the HID driver if needed e Run MotorolaHID exe J kiniorata HID Demo U e Input Product ID of 0300 for this demo e Click Get KeyID You will see Motorola under KeyID Read which is the private key DRM013 Rev 0 Designer Reference Manual MOTOROLA USB Security Key 11 For More Information On This Product Go to www freescale com Freescale Semiconductor Inc US
24. tains the logic circuitry to perform arithmetic logic and manipulation operations on operands asynchronous Refers to logic circuits and operations that are not synchronized by a common reference signal baud rate The total number of bits transmitted per unit of time BCD See binary coded decimal BCD binary Relating to the base 2 number system binary number system The base 2 number system having two digits 0 and 1 Binary arithmetic is convenient in digital circuit design because digital circuits have two permissible voltage levels low and high The binary digits 0 and 1 can be interpreted to correspond to the two digital voltage levels binary coded decimal BCD A notation that uses 4 bit binary numbers to represent the 10 decimal digits and that retains the same positional structure of a decimal number For example 234 decimal 0010 0011 0100 BCD bit A binary digit A bit has a value of either logic 0 or logic 1 DRM013 Rev 0 0 Designer Reference Manual MOTOROLA Glossary 17 For More Information On This Product Go to www freescale com Freescale Semiconductor Inc branch instruction An instruction that causes the CPU to continue processing at a memory location other than the next sequential address break module A module in the M68HC08 Family The break module allows software to halt program execution at a programmable point in order to enter a background routine
25. tion or use of any product or circuit and specifically http motorola com semiconductors disclaims any and all liability including without limitation consequential or incidental damages Typical parameters which may be provided in Motorola data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s technical experts Motorola does not convey any license under its patent rights nor the rights of others Motorola products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur Should Buyer purchase or use Motorola products for any such unintended or unauthorized application Buyer shall indemnify and hold Motorola and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part MOTOROLA M
26. uction in a subroutine is a return from subroutine RTS instruction At each place in the main program where the subroutine instructions are needed a jump or branch to subroutine JSR or BSR instruction is used to call the subroutine The CPU leaves the flow of the main program to execute the instructions in the subroutine When the RTS instruction is executed the CPU returns to the main program where it left off synchronous Refers to logic circuits and operations that are synchronized by a common reference signal TIM See timer interface module TIM DRM013 Rev 0 0 Designer Reference Manual MOTOROLA Glossary 25 For More Information On This Product Go to www freescale com Freescale Semiconductor Inc timer interface module TIM A module used to relate events in a system to a point in time timer A module used to relate events in a system to a point in time toggle To change the state of an output from a logic 0 to a logic 1 or from a logic 1 to a logic 0 tracking mode Mode of low jitter PLL operation during which the PLL is locked on a frequency Also see acquisition mode two s complement A means of performing binary subtraction using addition techniques The most significant bit of a two s complement number indicates the sign of the number 1 indicates negative The two s complement negative of a number is obtained by inverting each bit in the number and then adding 1 to the resu
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